From 281192c4db75443ff01565b8f6db5cbd6846b9a0 Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Sat, 20 Mar 2021 17:40:21 +0100 Subject: dt-bindings: arm: Convert nuvoton,npcm750 binding to YAML MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The general trend is to have devicetree bindings in YAML format, to allow automatic validation of bindings and devicetrees. Convert the NPCM SoC family's binding to YAML before it accumulates more entries. The nuvoton,npcm750-evb compatible string is introduced to keep the structure of the binding a little simpler. Signed-off-by: Jonathan Neuschäfer Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20210320164023.614059-1-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley --- .../devicetree/bindings/arm/npcm/npcm.txt | 6 ------ .../devicetree/bindings/arm/npcm/npcm.yaml | 23 ++++++++++++++++++++++ 2 files changed, 23 insertions(+), 6 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/npcm/npcm.txt create mode 100644 Documentation/devicetree/bindings/arm/npcm/npcm.yaml diff --git a/Documentation/devicetree/bindings/arm/npcm/npcm.txt b/Documentation/devicetree/bindings/arm/npcm/npcm.txt deleted file mode 100644 index 2d87d9ecea85..000000000000 --- a/Documentation/devicetree/bindings/arm/npcm/npcm.txt +++ /dev/null @@ -1,6 +0,0 @@ -NPCM Platforms Device Tree Bindings ------------------------------------ -NPCM750 SoC -Required root node properties: - - compatible = "nuvoton,npcm750"; - diff --git a/Documentation/devicetree/bindings/arm/npcm/npcm.yaml b/Documentation/devicetree/bindings/arm/npcm/npcm.yaml new file mode 100644 index 000000000000..894aefb70652 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/npcm/npcm.yaml @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/npcm/npcm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NPCM Platforms Device Tree Bindings + +maintainers: + - Jonathan Neuschäfer + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: NPCM750 based boards + items: + - enum: + - nuvoton,npcm750-evb # NPCM750 evaluation board + - const: nuvoton,npcm750 + +additionalProperties: true -- cgit v1.2.3 From 8a8cba741b58f367998cb29c99cdf834a2276dbf Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Sat, 20 Mar 2021 17:40:22 +0100 Subject: ARM: dts: Add board-specific compatible string to npcm750-evb devicetree MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit According to the revised binding, the devicetree needs a board-specific compatible string. Signed-off-by: Jonathan Neuschäfer Link: https://lore.kernel.org/r/20210320164023.614059-2-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley --- arch/arm/boot/dts/nuvoton-npcm750-evb.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nuvoton-npcm750-evb.dts b/arch/arm/boot/dts/nuvoton-npcm750-evb.dts index 9f13d08f5804..dea3dbc4a6a5 100644 --- a/arch/arm/boot/dts/nuvoton-npcm750-evb.dts +++ b/arch/arm/boot/dts/nuvoton-npcm750-evb.dts @@ -9,7 +9,7 @@ / { model = "Nuvoton npcm750 Development Board (Device Tree)"; - compatible = "nuvoton,npcm750"; + compatible = "nuvoton,npcm750-evb", "nuvoton,npcm750"; aliases { ethernet2 = &gmac0; -- cgit v1.2.3 From 9f6f07169207653f4ffd91b7d44e4a5bae9e1bbf Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Tue, 6 Apr 2021 14:09:12 +0200 Subject: dt-bindings: vendor-prefixes: Add Supermicro MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Super Micro Computer, Inc. (https://www.supermicro.com/en/), commonly known as Supermicro, is a manufacturer of server hardware. Signed-off-by: Jonathan Neuschäfer Acked-by: Rob Herring Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20210406120921.2484986-2-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index f6064d84a424..ec6d6ccfbbb3 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1085,6 +1085,8 @@ patternProperties: description: Shenzhen Sunchip Technology Co., Ltd "^SUNW,.*": description: Sun Microsystems, Inc + "^supermicro,.*": + description: Super Micro Computer, Inc. "^silvaco,.*": description: Silvaco, Inc. "^swir,.*": -- cgit v1.2.3 From f31fc98b6306fd26ac2bac05fa07e27f03b36034 Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Tue, 6 Apr 2021 14:09:13 +0200 Subject: dt-bindings: arm: npcm: Add nuvoton,wpcm450 compatible string MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The WPCM450 is an older BMC SoC in the Nuvoton NPCM family, originally marketed as Winbond WPCM450. Signed-off-by: Jonathan Neuschäfer Acked-by: Rob Herring Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20210406120921.2484986-3-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley --- Documentation/devicetree/bindings/arm/npcm/npcm.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/npcm/npcm.yaml b/Documentation/devicetree/bindings/arm/npcm/npcm.yaml index 894aefb70652..95e51378089c 100644 --- a/Documentation/devicetree/bindings/arm/npcm/npcm.yaml +++ b/Documentation/devicetree/bindings/arm/npcm/npcm.yaml @@ -14,6 +14,12 @@ properties: const: '/' compatible: oneOf: + - description: WPCM450 based boards + items: + - enum: + - supermicro,x9sci-ln4f-bmc # Supermicro X9SCI-LN4F server's BMC + - const: nuvoton,wpcm450 + - description: NPCM750 based boards items: - enum: -- cgit v1.2.3 From 9b39efacd6c13239a58952f4e5c43c68beff9a66 Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Tue, 6 Apr 2021 14:09:15 +0200 Subject: dt-bindings: watchdog: npcm: Add nuvoton,wpcm450-wdt MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a compatible string for the WPCM450 SoC, which has the same watchdog timer. Signed-off-by: Jonathan Neuschäfer Acked-by: Rob Herring Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20210406120921.2484986-5-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley --- Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt index 6d593003c933..9059f54dc023 100644 --- a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt @@ -5,7 +5,8 @@ The watchdog supports a pre-timeout interrupt that fires 10ms before the expiry. Required properties: -- compatible : "nuvoton,npcm750-wdt" for NPCM750 (Poleg). +- compatible : "nuvoton,npcm750-wdt" for NPCM750 (Poleg), or + "nuvoton,wpcm450-wdt" for WPCM450 (Hermon). - reg : Offset and length of the register set for the device. - interrupts : Contain the timer interrupt with flags for falling edge. -- cgit v1.2.3 From ece3fe93e8f4d0c9322b8ca24a250ea9292052fb Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Tue, 6 Apr 2021 14:09:16 +0200 Subject: ARM: npcm: Introduce Nuvoton WPCM450 SoC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The WPCM450 is an older BMC SoC in the Nuvoton NPCM family, originally marketed as Winbond WPCM450. Signed-off-by: Jonathan Neuschäfer Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20210406120921.2484986-6-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley --- arch/arm/mach-npcm/Kconfig | 12 +++++++++++- arch/arm/mach-npcm/Makefile | 1 + arch/arm/mach-npcm/wpcm450.c | 13 +++++++++++++ 3 files changed, 25 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-npcm/wpcm450.c diff --git a/arch/arm/mach-npcm/Kconfig b/arch/arm/mach-npcm/Kconfig index 7f7002dc2b21..658c8efb4ca1 100644 --- a/arch/arm/mach-npcm/Kconfig +++ b/arch/arm/mach-npcm/Kconfig @@ -1,11 +1,21 @@ # SPDX-License-Identifier: GPL-2.0-only menuconfig ARCH_NPCM bool "Nuvoton NPCM Architecture" - depends on ARCH_MULTI_V7 + depends on ARCH_MULTI_V5 || ARCH_MULTI_V7 select PINCTRL if ARCH_NPCM +config ARCH_WPCM450 + bool "Support for WPCM450 BMC (Hermon)" + depends on ARCH_MULTI_V5 + select CPU_ARM926T + select NPCM7XX_TIMER + help + General support for WPCM450 BMC (Hermon). + + Winbond/Nuvoton WPCM450 BMC based on the ARM926EJ-S. + config ARCH_NPCM7XX bool "Support for NPCM7xx BMC (Poleg)" depends on ARCH_MULTI_V7 diff --git a/arch/arm/mach-npcm/Makefile b/arch/arm/mach-npcm/Makefile index 1bc3a70bfab8..8d61fcd42fb1 100644 --- a/arch/arm/mach-npcm/Makefile +++ b/arch/arm/mach-npcm/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only AFLAGS_headsmp.o += -march=armv7-a +obj-$(CONFIG_ARCH_WPCM450) += wpcm450.o obj-$(CONFIG_ARCH_NPCM7XX) += npcm7xx.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o diff --git a/arch/arm/mach-npcm/wpcm450.c b/arch/arm/mach-npcm/wpcm450.c new file mode 100644 index 000000000000..f17b3dab45af --- /dev/null +++ b/arch/arm/mach-npcm/wpcm450.c @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright 2021 Jonathan Neuschäfer + +#include + +static const char *const wpcm450_dt_match[] = { + "nuvoton,wpcm450", + NULL +}; + +DT_MACHINE_START(WPCM450_DT, "WPCM450 chip") + .dt_compat = wpcm450_dt_match, +MACHINE_END -- cgit v1.2.3 From 328d1c1a92d9eea42943af9edd5393dcd06bd591 Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Tue, 6 Apr 2021 14:09:18 +0200 Subject: watchdog: npcm: Add support for WPCM450 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a compatible string for WPCM450, which has essentially the same watchdog mechanism as NPCM750. Signed-off-by: Jonathan Neuschäfer Acked-by: Guenter Roeck Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20210406120921.2484986-8-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley --- drivers/watchdog/npcm_wdt.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/watchdog/npcm_wdt.c b/drivers/watchdog/npcm_wdt.c index 765577f11c8d..28a24caa2627 100644 --- a/drivers/watchdog/npcm_wdt.c +++ b/drivers/watchdog/npcm_wdt.c @@ -229,6 +229,7 @@ static int npcm_wdt_probe(struct platform_device *pdev) #ifdef CONFIG_OF static const struct of_device_id npcm_wdt_match[] = { + {.compatible = "nuvoton,wpcm450-wdt"}, {.compatible = "nuvoton,npcm750-wdt"}, {}, }; -- cgit v1.2.3 From ed09d269b9589db37fb1aea04b793cff7ac183bb Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Tue, 6 Apr 2021 14:09:19 +0200 Subject: ARM: dts: Add devicetree for Nuvoton WPCM450 BMC chip MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The WPCM450 is an older BMC SoC in the Nuvoton NPCM family, originally marketed as Winbond WPCM450. This patch adds a devicetree with basic functionality. Signed-off-by: Jonathan Neuschäfer Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20210406120921.2484986-9-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley --- arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 76 ++++++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 arch/arm/boot/dts/nuvoton-wpcm450.dtsi diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi new file mode 100644 index 000000000000..d7cbeb187484 --- /dev/null +++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +// Copyright 2021 Jonathan Neuschäfer + +#include + +/ { + compatible = "nuvoton,wpcm450"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; + reg = <0>; + }; + }; + + clk24m: clock-24mhz { + /* 24 MHz dummy clock */ + compatible = "fixed-clock"; + clock-frequency = <24000000>; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&aic>; + ranges; + + serial0: serial@b8000000 { + compatible = "nuvoton,wpcm450-uart"; + reg = <0xb8000000 0x20>; + reg-shift = <2>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk24m>; + status = "disabled"; + }; + + serial1: serial@b8000100 { + compatible = "nuvoton,wpcm450-uart"; + reg = <0xb8000100 0x20>; + reg-shift = <2>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk24m>; + status = "disabled"; + }; + + timer0: timer@b8001000 { + compatible = "nuvoton,wpcm450-timer"; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb8001000 0x1c>; + clocks = <&clk24m>; + }; + + watchdog0: watchdog@b800101c { + compatible = "nuvoton,wpcm450-wdt"; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xb800101c 0x4>; + clocks = <&clk24m>; + status = "disabled"; + }; + + aic: interrupt-controller@b8002000 { + compatible = "nuvoton,wpcm450-aic"; + reg = <0xb8002000 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; -- cgit v1.2.3 From 37e9f9fa71fb8024c7c6c88b738d13f098401ca6 Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Tue, 6 Apr 2021 14:09:20 +0200 Subject: ARM: dts: Add devicetree for Supermicro X9SCi-LN4F based on WPCM450 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Supermicro X9SCi-LN4F is a server mainboard featuring the WPCM450 BMC. This patch adds a minimal devicetree for Linux running on the BMC. Signed-off-by: Jonathan Neuschäfer Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20210406120921.2484986-10-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley --- arch/arm/boot/dts/Makefile | 2 ++ .../dts/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts | 40 ++++++++++++++++++++++ 2 files changed, 42 insertions(+) create mode 100644 arch/arm/boot/dts/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 8e5d4ab4e75e..5a9d99d5443e 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -333,6 +333,8 @@ dtb-$(CONFIG_ARCH_LPC18XX) += \ dtb-$(CONFIG_ARCH_LPC32XX) += \ lpc3250-ea3250.dtb \ lpc3250-phy3250.dtb +dtb-$(CONFIG_ARCH_WPCM450) += \ + nuvoton-wpcm450-supermicro-x9sci-ln4f.dtb dtb-$(CONFIG_ARCH_NPCM7XX) += \ nuvoton-npcm730-gsj.dtb \ nuvoton-npcm730-kudo.dtb \ diff --git a/arch/arm/boot/dts/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts b/arch/arm/boot/dts/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts new file mode 100644 index 000000000000..83f27fbf4e93 --- /dev/null +++ b/arch/arm/boot/dts/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +// Copyright 2021 Jonathan Neuschäfer + +/dts-v1/; + +/* The last 16 MiB are dedicated to the GPU */ +/memreserve/ 0x07000000 0x01000000; + +#include "nuvoton-wpcm450.dtsi" + +/ { + model = "Supermicro X9SCi-LN4F BMC"; + compatible = "supermicro,x9sci-ln4f-bmc", "nuvoton,wpcm450"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0 0x08000000>; /* 128 MiB */ + }; +}; + +&serial0 { + /* + * Debug serial port. TX is exposed on the right pad of unpopulated + * resistor R1247, RX on the right pad of R1162. + */ + status = "okay"; +}; + +&serial1 { + /* "Serial over LAN" port. Connected to ttyS2 of the host system. */ + status = "okay"; +}; + +&watchdog0 { + status = "okay"; +}; -- cgit v1.2.3 From ef9c51b45cda2df86a31c1050141955ef4a9f4bd Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Tue, 6 Apr 2021 14:09:21 +0200 Subject: MAINTAINERS: Add entry for Nuvoton WPCM450 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit I am adding myself as the maintainer of WPCM450-related code. Signed-off-by: Jonathan Neuschäfer Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20210406120921.2484986-11-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index d92f85ca831d..661770e8e6fc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2194,6 +2194,15 @@ F: drivers/*/*npcm* F: drivers/*/*/*npcm* F: include/dt-bindings/clock/nuvoton,npcm7xx-clock.h +ARM/NUVOTON WPCM450 ARCHITECTURE +M: Jonathan Neuschäfer +L: openbmc@lists.ozlabs.org (moderated for non-subscribers) +S: Maintained +F: Documentation/devicetree/bindings/*/*wpcm* +F: arch/arm/boot/dts/nuvoton-wpcm450* +F: arch/arm/mach-npcm/wpcm450.c +F: drivers/*/*wpcm* + ARM/OPENMOKO NEO FREERUNNER (GTA02) MACHINE SUPPORT L: openmoko-kernel@lists.openmoko.org (subscribers-only) S: Orphan -- cgit v1.2.3 From 09e6d2b71ae673dccf9f59f0fc1e17109113b6f4 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Fri, 9 Apr 2021 15:15:11 +0930 Subject: ARM: config: Add WPCM to multi v5 This is a newly added ARM926 platform that is not covered by any other defconfigs. Signed-off-by: Joel Stanley Link: https://lore.kernel.org/r/20210409054511.1534181-1-joel@jms.id.au --- arch/arm/configs/multi_v5_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/configs/multi_v5_defconfig b/arch/arm/configs/multi_v5_defconfig index 9f862b21b40a..80a3ae02d759 100644 --- a/arch/arm/configs/multi_v5_defconfig +++ b/arch/arm/configs/multi_v5_defconfig @@ -33,6 +33,8 @@ CONFIG_SOC_IMX25=y CONFIG_SOC_IMX27=y CONFIG_ARCH_MVEBU=y CONFIG_MACH_KIRKWOOD=y +CONFIG_ARCH_NPCM=y +CONFIG_ARCH_WPCM450=y CONFIG_ARCH_ORION5X=y CONFIG_MACH_DB88F5281=y CONFIG_MACH_RD88F5182=y @@ -178,6 +180,7 @@ CONFIG_THERMAL=y CONFIG_KIRKWOOD_THERMAL=y CONFIG_AT91SAM9X_WATCHDOG=y CONFIG_ORION_WATCHDOG=y +CONFIG_NPCM7XX_WATCHDOG=y CONFIG_IMX2_WDT=y CONFIG_MFD_ATMEL_HLCDC=y # CONFIG_ABX500_CORE is not set -- cgit v1.2.3