From 213556235526abffe4b7fdec2aabf4d751a7c0f9 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Mon, 14 Feb 2022 13:58:31 +0000 Subject: dt-bindings: soc/microchip: update syscontroller compatibles The Polarfire SoC is currently using two different compatible string prefixes. Fix this by changing "polarfire-soc-*" strings to "mpfs-*" in its system controller in order to match the compatible string used in the soc binding and device tree Reviewed-by: Geert Uytterhoeven Signed-off-by: Conor Dooley Acked-by: Rob Herring Acked-by: Palmer Dabbelt Signed-off-by: Palmer Dabbelt --- .../bindings/mailbox/microchip,mpfs-mailbox.yaml | 47 ++++++++++++++++++++++ .../mailbox/microchip,polarfire-soc-mailbox.yaml | 47 ---------------------- 2 files changed, 47 insertions(+), 47 deletions(-) create mode 100644 Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml delete mode 100644 Documentation/devicetree/bindings/mailbox/microchip,polarfire-soc-mailbox.yaml (limited to 'Documentation/devicetree/bindings/mailbox') diff --git a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml new file mode 100644 index 000000000000..082d397d3e89 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller + +maintainers: + - Conor Dooley + +properties: + compatible: + const: microchip,mpfs-mailbox + + reg: + items: + - description: mailbox data registers + - description: mailbox interrupt registers + + interrupts: + maxItems: 1 + + "#mbox-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - "#mbox-cells" + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + mbox: mailbox@37020000 { + compatible = "microchip,mpfs-mailbox"; + reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318c 0x0 0x40>; + interrupt-parent = <&L1>; + interrupts = <96>; + #mbox-cells = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/mailbox/microchip,polarfire-soc-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/microchip,polarfire-soc-mailbox.yaml deleted file mode 100644 index bbb173ea483c..000000000000 --- a/Documentation/devicetree/bindings/mailbox/microchip,polarfire-soc-mailbox.yaml +++ /dev/null @@ -1,47 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: "http://devicetree.org/schemas/mailbox/microchip,polarfire-soc-mailbox.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" - -title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller - -maintainers: - - Conor Dooley - -properties: - compatible: - const: microchip,polarfire-soc-mailbox - - reg: - items: - - description: mailbox data registers - - description: mailbox interrupt registers - - interrupts: - maxItems: 1 - - "#mbox-cells": - const: 1 - -required: - - compatible - - reg - - interrupts - - "#mbox-cells" - -additionalProperties: false - -examples: - - | - soc { - #address-cells = <2>; - #size-cells = <2>; - mbox: mailbox@37020000 { - compatible = "microchip,polarfire-soc-mailbox"; - reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318c 0x0 0x40>; - interrupt-parent = <&L1>; - interrupts = <96>; - #mbox-cells = <1>; - }; - }; -- cgit v1.2.3