From 3e1aec4e2c415346df7d5429f7413837ddaaedd7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 12 Jan 2017 02:03:24 +0100 Subject: clk: vc5: Add support for IDT VersaClock 5P49V5923 and 5P49V5933 Add driver for IDT VersaClock 5 5P49V5923 and 5P49V5933 chips. These chips have two clock inputs, XTAL or CLK, which are muxed into single PLL/VCO input. In case of 5P49V5923, the XTAL in built into the chip while the 5P49V5923 requires external XTAL. The PLL feeds two fractional dividers. Each fractional divider feeds output mux, which allows selecting between clock from the fractional divider itself or from output mux on output N-1. In case of output mux 0, the output N-1 is instead connected to the output from the mux feeding the PLL. The driver thus far supports only the 5P49V5923 and 5P49V5933, while it should be easily extensible to the whole 5P49V59xx family of chips as they are all pretty similar. Signed-off-by: Marek Vasut Cc: Michael Turquette Reviewed-by: Laurent Pinchart Tested-by: Laurent Pinchart Cc: linux-renesas-soc@vger.kernel.org Signed-off-by: Stephen Boyd --- MAINTAINERS | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index cfff2c9e3d94..452df181e261 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6185,6 +6185,11 @@ S: Maintained F: drivers/mfd/lpc_ich.c F: drivers/gpio/gpio-ich.c +IDT VersaClock 5 CLOCK DRIVER +M: Marek Vasut +S: Maintained +F: drivers/clk/clk-versaclock5.c + IDE SUBSYSTEM M: "David S. Miller" L: linux-ide@vger.kernel.org -- cgit v1.2.3