From acc0ccffec502be0d64f477d4341957a897e4283 Mon Sep 17 00:00:00 2001 From: Yinbo Zhu Date: Thu, 23 Mar 2023 10:52:29 +0800 Subject: clk: clk-loongson2: add clock controller driver support This driver provides support for clock controller on Loongson-2 SoC, the Loongson-2 SoC uses a 100MHz clock as the PLL reference clock, there are five independent PLLs inside, each of which PLL can provide up to three sets of frequency dependent clock outputs. Signed-off-by: Yinbo Zhu Link: https://lore.kernel.org/r/20230323025229.2971-2-zhuyinbo@loongson.cn Signed-off-by: Stephen Boyd --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 1695009c1296..2f676da6b1d3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12121,6 +12121,7 @@ M: Yinbo Zhu L: linux-clk@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/clock/loongson,ls2k-clk.yaml +F: drivers/clk/clk-loongson2.c F: include/dt-bindings/clock/loongson,ls2k-clk.h LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI) -- cgit v1.2.3