From c920a669cec23eb4b28e3b1cc4f4f19474cc7f4f Mon Sep 17 00:00:00 2001 From: Antoine Tenart Date: Thu, 17 Apr 2014 10:45:29 +0200 Subject: ARM: dts: berlin: add the BG2CD GPIO nodes The Berlin BG2CD has 32 GPIOs in SoC power domain and 16 in the SM one. Signed-off-by: Antoine Tenart Signed-off-by: Sebastian Hesselbarth --- arch/arm/boot/dts/berlin2cd.dtsi | 102 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) (limited to 'arch/arm/boot/dts/berlin2cd.dtsi') diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi index 094968c27533..6eb1bdae23ac 100644 --- a/arch/arm/boot/dts/berlin2cd.dtsi +++ b/arch/arm/boot/dts/berlin2cd.dtsi @@ -87,6 +87,78 @@ ranges = <0 0xe80000 0x10000>; interrupt-parent = <&aic>; + gpio0: gpio@0400 { + compatible = "snps,dw-apb-gpio"; + reg = <0x0400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + porta: gpio-port@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <8>; + reg = <0>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <0>; + }; + }; + + gpio1: gpio@0800 { + compatible = "snps,dw-apb-gpio"; + reg = <0x0800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + portb: gpio-port@1 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <8>; + reg = <0>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <1>; + }; + }; + + gpio2: gpio@0c00 { + compatible = "snps,dw-apb-gpio"; + reg = <0x0c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + portc: gpio-port@2 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <8>; + reg = <0>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <2>; + }; + }; + + gpio3: gpio@1000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x1000 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + portd: gpio-port@3 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <8>; + reg = <0>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <3>; + }; + }; + timer0: timer@2c00 { compatible = "snps,dw-apb-timer"; reg = <0x2c00 0x14>; @@ -177,6 +249,36 @@ ranges = <0 0xfc0000 0x10000>; interrupt-parent = <&sic>; + sm_gpio1: gpio@5000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x5000 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + portf: gpio-port@5 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <8>; + reg = <0>; + }; + }; + + sm_gpio0: gpio@c000 { + compatible = "snps,dw-apb-gpio"; + reg = <0xc000 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + porte: gpio-port@4 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <8>; + reg = <0>; + }; + }; + uart0: serial@9000 { compatible = "snps,dw-apb-uart"; reg = <0x9000 0x100>; -- cgit v1.2.3 From 556f4a33a9c3ae4eea97220bd18942324a436630 Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Sat, 10 May 2014 15:22:48 +0200 Subject: ARM: dts: berlin: convert BG2CD to DT clock nodes This converts Berlin BG2CD SoC dtsi to make use of the new DT clock nodes for Berlin SoCs. Also add a binding include to ease core clock references. Signed-off-by: Sebastian Hesselbarth --- arch/arm/boot/dts/berlin2cd.dtsi | 53 ++++++++++++++++++---------------------- 1 file changed, 24 insertions(+), 29 deletions(-) (limited to 'arch/arm/boot/dts/berlin2cd.dtsi') diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi index 6eb1bdae23ac..1385caa6d029 100644 --- a/arch/arm/boot/dts/berlin2cd.dtsi +++ b/arch/arm/boot/dts/berlin2cd.dtsi @@ -12,6 +12,7 @@ */ #include "skeleton.dtsi" +#include #include / { @@ -30,24 +31,10 @@ }; }; - clocks { - smclk: sysmgr-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - }; - - cfgclk: cfg-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <75000000>; - }; - - sysclk: system-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <300000000>; - }; + refclk: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; }; soc { @@ -76,7 +63,7 @@ compatible = "arm,cortex-a9-twd-timer"; reg = <0xad0600 0x20>; interrupts = ; - clocks = <&sysclk>; + clocks = <&chip CLKID_TWD>; }; apb@e80000 { @@ -163,7 +150,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c00 0x14>; interrupts = <8>; - clocks = <&cfgclk>; + clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "okay"; }; @@ -172,7 +159,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c14 0x14>; interrupts = <9>; - clocks = <&cfgclk>; + clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "okay"; }; @@ -181,7 +168,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c28 0x14>; interrupts = <10>; - clocks = <&cfgclk>; + clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -190,7 +177,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c3c 0x14>; interrupts = <11>; - clocks = <&cfgclk>; + clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -199,7 +186,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c50 0x14>; interrupts = <12>; - clocks = <&cfgclk>; + clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -208,7 +195,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c64 0x14>; interrupts = <13>; - clocks = <&cfgclk>; + clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -217,7 +204,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c78 0x14>; interrupts = <14>; - clocks = <&cfgclk>; + clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -226,7 +213,7 @@ compatible = "snps,dw-apb-timer"; reg = <0x2c8c 0x14>; interrupts = <15>; - clocks = <&cfgclk>; + clocks = <&chip CLKID_CFG>; clock-names = "timer"; status = "disabled"; }; @@ -241,6 +228,14 @@ }; }; + chip: chip-control@ea0000 { + compatible = "marvell,berlin2cd-chip-ctrl"; + #clock-cells = <1>; + reg = <0xea0000 0x400>; + clocks = <&refclk>; + clock-names = "refclk"; + }; + apb@fc0000 { compatible = "simple-bus"; #address-cells = <1>; @@ -285,7 +280,7 @@ reg-shift = <2>; reg-io-width = <1>; interrupts = <8>; - clocks = <&smclk>; + clocks = <&refclk>; status = "disabled"; }; @@ -295,7 +290,7 @@ reg-shift = <2>; reg-io-width = <1>; interrupts = <9>; - clocks = <&smclk>; + clocks = <&refclk>; status = "disabled"; }; -- cgit v1.2.3 From 50cc24ffcdbce9d0904a4ed89ae14fdf76522de5 Mon Sep 17 00:00:00 2001 From: Antoine Tenart Date: Sun, 18 May 2014 20:15:57 +0200 Subject: ARM: dts: berlin: add the pinctrl node and muxing setup for uarts Add pinctrl bindings and system control nodes to what we currently know about Berlin SoCs. Where available, also set default pinctrl property for uarts, when there is only one pinmux option for it. Signed-off-by: Antoine Tenart Signed-off-by: Sebastian Hesselbarth --- arch/arm/boot/dts/berlin2.dtsi | 26 ++++++++++++++++++++++++++ arch/arm/boot/dts/berlin2cd.dtsi | 12 ++++++++++++ arch/arm/boot/dts/berlin2q.dtsi | 19 +++++++++++++++++++ 3 files changed, 57 insertions(+) (limited to 'arch/arm/boot/dts/berlin2cd.dtsi') diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi index 591d4b8c1c2b..2477dac4d643 100644 --- a/arch/arm/boot/dts/berlin2.dtsi +++ b/arch/arm/boot/dts/berlin2.dtsi @@ -296,6 +296,8 @@ reg-io-width = <1>; interrupts = <8>; clocks = <&refclk>; + pinctrl-0 = <&uart0_pmux>; + pinctrl-names = "default"; status = "disabled"; }; @@ -306,6 +308,8 @@ reg-io-width = <1>; interrupts = <9>; clocks = <&refclk>; + pinctrl-0 = <&uart1_pmux>; + pinctrl-names = "default"; status = "disabled"; }; @@ -316,9 +320,31 @@ reg-io-width = <1>; interrupts = <10>; clocks = <&refclk>; + pinctrl-0 = <&uart2_pmux>; + pinctrl-names = "default"; status = "disabled"; }; + sysctrl: system-controller@d000 { + compatible = "marvell,berlin2-system-ctrl"; + reg = <0xd000 0x100>; + + uart0_pmux: uart0-pmux { + groups = "GSM4"; + function = "uart0"; + }; + + uart1_pmux: uart1-pmux { + groups = "GSM5"; + function = "uart1"; + }; + + uart2_pmux: uart2-pmux { + groups = "GSM3"; + function = "uart2"; + }; + }; + sic: interrupt-controller@e000 { compatible = "snps,dw-apb-ictl"; reg = <0xe000 0x400>; diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi index 1385caa6d029..cc1df65da504 100644 --- a/arch/arm/boot/dts/berlin2cd.dtsi +++ b/arch/arm/boot/dts/berlin2cd.dtsi @@ -234,6 +234,11 @@ reg = <0xea0000 0x400>; clocks = <&refclk>; clock-names = "refclk"; + + uart0_pmux: uart0-pmux { + groups = "G6"; + function = "uart0"; + }; }; apb@fc0000 { @@ -281,6 +286,8 @@ reg-io-width = <1>; interrupts = <8>; clocks = <&refclk>; + pinctrl-0 = <&uart0_pmux>; + pinctrl-names = "default"; status = "disabled"; }; @@ -294,6 +301,11 @@ status = "disabled"; }; + sysctrl: system-controller@d000 { + compatible = "marvell,berlin2cd-system-ctrl"; + reg = <0xd000 0x100>; + }; + sic: interrupt-controller@e000 { compatible = "snps,dw-apb-ictl"; reg = <0xe000 0x400>; diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index cd3287c95f1a..81712f5954ef 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -294,6 +294,8 @@ interrupts = <8>; clocks = <&refclk>; reg-shift = <2>; + pinctrl-0 = <&uart0_pmux>; + pinctrl-names = "default"; status = "disabled"; }; @@ -304,9 +306,26 @@ interrupts = <9>; clocks = <&refclk>; reg-shift = <2>; + pinctrl-0 = <&uart1_pmux>; + pinctrl-names = "default"; status = "disabled"; }; + sysctrl: pin-controller@d000 { + compatible = "marvell,berlin2q-system-ctrl"; + reg = <0xd000 0x100>; + + uart0_pmux: uart0-pmux { + groups = "GSM12"; + function = "uart0"; + }; + + uart1_pmux: uart1-pmux { + groups = "GSM14"; + function = "uart1"; + }; + }; + sic: interrupt-controller@e000 { compatible = "snps,dw-apb-ictl"; reg = <0xe000 0x30>; -- cgit v1.2.3