From b7a1922814c617884a3fee9b107ffb784fa4cf94 Mon Sep 17 00:00:00 2001 From: Vignesh R Date: Wed, 20 Apr 2016 17:03:00 +0530 Subject: ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better throughput. Signed-off-by: Vignesh R Acked-by: Rob Herring Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra7-evm.dts | 6 ++---- arch/arm/boot/dts/dra72-evm-common.dtsi | 6 ++---- 2 files changed, 4 insertions(+), 8 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index 98bc5ca43340..bafcfac067ec 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -664,15 +664,13 @@ &qspi { status = "okay"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; m25p80@0 { compatible = "s25fl256s1"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; reg = <0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; - spi-cpol; - spi-cpha; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi index 2894759276d0..093538ea5b5f 100644 --- a/arch/arm/boot/dts/dra72-evm-common.dtsi +++ b/arch/arm/boot/dts/dra72-evm-common.dtsi @@ -681,15 +681,13 @@ &qspi { status = "okay"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; m25p80@0 { compatible = "s25fl256s1"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; reg = <0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; - spi-cpol; - spi-cpha; #address-cells = <1>; #size-cells = <1>; -- cgit v1.2.3