From 936748fd34be484c8638a8547b4ca85afdfdf3a6 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Wed, 4 Mar 2015 12:20:12 +0100 Subject: ARM: at91: remove ksz8081 phy fixup registration for sama5d4ek board Commit 2b0ba96cea60 ("net: phy: micrel: disable NAND-tree for KSZ8021, KSZ8031, KSZ8051, KSZ8081") automated the NAND-tree mode deactivation process, thus making this phy fixup useless. Remove it along with the associated headers inclusion. Signed-off-by: Boris Brezillon Acked-by: Alexandre Belloni [nicolas.ferre@atmel.com: remove selection of PHYLIB in at91 Kconfig] Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/mach-at91/Kconfig') diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index c74a44324e5b..d65981a8a4a9 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -24,7 +24,6 @@ config SOC_SAMA5 select GENERIC_CLOCKEVENTS select MEMORY select ATMEL_SDRAMC - select PHYLIB if NETDEVICES menu "Atmel AT91 System-on-Chip" -- cgit v1.2.3 From 896bc871a4a2db13212831749d21ffa7f405c73b Mon Sep 17 00:00:00 2001 From: Wenyou Yang Date: Mon, 9 Mar 2015 11:44:50 +0800 Subject: ARM: at91: move "select SRAM" under SOC_AT91SAM9 and SOC_SAMA5 To simply the PM config the CONFIG_AT91_SLOW_CLOCK option will be removed, so move "select SRAM" from under AT91_SLOW_CLOCK, add "select SRAM if PM" under SOC_AT91SAM9 and SOC_SAMA5 Signed-off-by: Wenyou Yang Acked-by: Alexandre Belloni Tested-by: Sylvain Rochet Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/Kconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-at91/Kconfig') diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index d65981a8a4a9..cd0e996565b3 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -24,6 +24,7 @@ config SOC_SAMA5 select GENERIC_CLOCKEVENTS select MEMORY select ATMEL_SDRAMC + select SRAM if PM menu "Atmel AT91 System-on-Chip" @@ -80,6 +81,7 @@ config SOC_AT91RM9200 select CPU_ARM920T select GENERIC_CLOCKEVENTS select HAVE_AT91_USB_CLK + select SRAM if PM config SOC_AT91SAM9 bool "AT91SAM9" @@ -93,6 +95,7 @@ config SOC_AT91SAM9 select HAVE_AT91_UTMI select HAVE_FB_ATMEL select MEMORY + select SRAM if PM help Select this if you are using one of those Atmel SoC: AT91SAM9260 @@ -117,7 +120,6 @@ comment "AT91 Feature Selections" config AT91_SLOW_CLOCK bool "Suspend-to-RAM disables main oscillator" - select SRAM depends on SUSPEND help Select this if you want Suspend-to-RAM to save the most power -- cgit v1.2.3 From 09fc78a601e59de89f125c8e6739fd21a7e2fd01 Mon Sep 17 00:00:00 2001 From: Wenyou Yang Date: Mon, 9 Mar 2015 11:45:35 +0800 Subject: ARM: at91/pm: remove CONFIG_AT91_SLOW_CLOCK config option The slow clock always exists, selecting CONFIG_AT91_SLOW_CLOCK config is unnecessary for the suspend to memory mode. For this mode the master clock should always switch to the slow clock. Signed-off-by: Wenyou Yang Acked-by: Alexandre Belloni Tested-by: Sylvain Rochet Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/Kconfig | 13 ------------- arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/pm.c | 12 +----------- 3 files changed, 2 insertions(+), 25 deletions(-) (limited to 'arch/arm/mach-at91/Kconfig') diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index cd0e996565b3..89276fb0052a 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -118,19 +118,6 @@ endif # SOC_SAM_V4_V5 comment "AT91 Feature Selections" -config AT91_SLOW_CLOCK - bool "Suspend-to-RAM disables main oscillator" - depends on SUSPEND - help - Select this if you want Suspend-to-RAM to save the most power - possible (without powering off the CPU) by disabling the PLLs - and main oscillator so that only the 32 KiHz clock is available. - - When only that slow-clock is available, some peripherals lose - functionality. Many can't issue wakeup events unless faster - clocks are available. Some lose their operating state and - need to be completely re-initialized. - config AT91_TIMER_HZ int "Kernel HZ (jiffies per second)" range 32 1024 diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 827fdbcce1c7..103c256ecb8b 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -13,7 +13,7 @@ obj-$(CONFIG_SOC_SAMA5) += sama5.o # Power Management obj-$(CONFIG_PM) += pm.o -obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o +obj-$(CONFIG_PM) += pm_slowclock.o ifeq ($(CONFIG_PM_DEBUG),y) CFLAGS_pm.o += -DDEBUG diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index a4473dcd0f7c..ea4d888994af 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -123,11 +123,9 @@ EXPORT_SYMBOL(at91_suspend_entering_slow_clock); static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0, void __iomem *ramc1, int memctrl); -#ifdef CONFIG_AT91_SLOW_CLOCK extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0, void __iomem *ramc1, int memctrl); extern u32 at91_slow_clock_sz; -#endif static int at91_pm_enter(suspend_state_t state) { @@ -151,10 +149,9 @@ static int at91_pm_enter(suspend_state_t state) * turning off the main oscillator; reverse on wakeup. */ if (slow_clock) { -#ifdef CONFIG_AT91_SLOW_CLOCK /* copy slow_clock handler to SRAM, and call it */ memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz); -#endif + slow_clock(at91_pmc_base, at91_ramc_base[0], at91_ramc_base[1], at91_pm_data.memctrl); @@ -263,7 +260,6 @@ static __init void at91_dt_ramc(void) at91_pm_set_standby(standby); } -#ifdef CONFIG_AT91_SLOW_CLOCK static void __init at91_pm_sram_init(void) { struct gen_pool *sram_pool; @@ -300,16 +296,10 @@ static void __init at91_pm_sram_init(void) sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base); slow_clock = __arm_ioremap_exec(sram_pbase, at91_slow_clock_sz, false); } -#endif - static void __init at91_pm_init(void) { -#ifdef CONFIG_AT91_SLOW_CLOCK at91_pm_sram_init(); -#endif - - pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : "")); if (at91_cpuidle_device.dev.platform_data) platform_device_register(&at91_cpuidle_device); -- cgit v1.2.3 From 1be27c62d61d23e8426834785d7989daa6745aa8 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 12 Mar 2015 15:54:23 +0100 Subject: ARM: at91: remove NEED_MACH_IO_H The mach/io.h header on at91 is used to support a nonstandard I/O space window for the cf card driver. This changes the driver to use pci_ioremap_io in order to have the standard location, and then removes the custom mach/io.h. [alexandre.belloni@free-electrons.com: Added PCI dependency] Signed-off-by: Alexandre Belloni Signed-off-by: Arnd Bergmann Signed-off-by: Nicolas Ferre --- arch/arm/Kconfig | 1 - arch/arm/mach-at91/Kconfig | 1 + arch/arm/mach-at91/include/mach/io.h | 27 --------------------------- drivers/pcmcia/Kconfig | 1 + drivers/pcmcia/at91_cf.c | 13 +++++++------ 5 files changed, 9 insertions(+), 34 deletions(-) delete mode 100644 arch/arm/mach-at91/include/mach/io.h (limited to 'arch/arm/mach-at91/Kconfig') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9f1f09a2bc9b..e7ce6612bc42 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -361,7 +361,6 @@ config ARCH_AT91 select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP select IRQ_DOMAIN - select NEED_MACH_IO_H if PCCARD select PINCTRL select PINCTRL_AT91 select USE_OF diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 89276fb0052a..4da6bae047f3 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -81,6 +81,7 @@ config SOC_AT91RM9200 select CPU_ARM920T select GENERIC_CLOCKEVENTS select HAVE_AT91_USB_CLK + select MIGHT_HAVE_PCI select SRAM if PM config SOC_AT91SAM9 diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h deleted file mode 100644 index 2d9ca0455745..000000000000 --- a/arch/arm/mach-at91/include/mach/io.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/io.h - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xFFFFFFFF -#define __io(a) __typesafe_io(a) - -#endif diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig index 3bb49252a098..075d5cd4c5ab 100644 --- a/drivers/pcmcia/Kconfig +++ b/drivers/pcmcia/Kconfig @@ -278,6 +278,7 @@ config BFIN_CFPCMCIA config AT91_CF tristate "AT91 CompactFlash Controller" + depends on PCI depends on PCMCIA && ARCH_AT91 depends on !ARCH_MULTIPLATFORM help diff --git a/drivers/pcmcia/at91_cf.c b/drivers/pcmcia/at91_cf.c index bfb799c7b343..e7775a41ae5d 100644 --- a/drivers/pcmcia/at91_cf.c +++ b/drivers/pcmcia/at91_cf.c @@ -317,13 +317,14 @@ static int at91_cf_probe(struct platform_device *pdev) } else cf->socket.pci_irq = nr_irqs + 1; - /* pcmcia layer only remaps "real" memory not iospace */ - cf->socket.io_offset = (unsigned long) devm_ioremap(&pdev->dev, - cf->phys_baseaddr + CF_IO_PHYS, SZ_2K); - if (!cf->socket.io_offset) { - status = -ENXIO; + /* + * pcmcia layer only remaps "real" memory not iospace + * io_offset is set to 0x10000 to avoid the check in static_find_io(). + * */ + cf->socket.io_offset = 0x10000; + status = pci_ioremap_io(0x10000, cf->phys_baseaddr + CF_IO_PHYS); + if (status) goto fail0a; - } /* reserve chip-select regions */ if (!devm_request_mem_region(&pdev->dev, io->start, resource_size(io), "at91_cf")) { -- cgit v1.2.3 From b53cdd03222391f76e82cd0c7d040816c919ab75 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Thu, 12 Mar 2015 13:07:31 +0100 Subject: ARM: at91: time: move the system timer driver to drivers/clocksource Import at91rm9200_time.c from mach-at91 as timer-atmel-st.c. Further cleanup is required to get rid of the mach-at91 headers. Signed-off-by: Alexandre Belloni Acked-by: Boris Brezillon Acked-by: Daniel Lezcano Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/Kconfig | 1 + arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/at91rm9200_time.c | 253 ----------------------------------- drivers/clocksource/Kconfig | 4 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-atmel-st.c | 253 +++++++++++++++++++++++++++++++++++ 6 files changed, 260 insertions(+), 254 deletions(-) delete mode 100644 arch/arm/mach-at91/at91rm9200_time.c create mode 100644 drivers/clocksource/timer-atmel-st.c (limited to 'arch/arm/mach-at91/Kconfig') diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 4da6bae047f3..24b59c75f6af 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -77,6 +77,7 @@ if SOC_SAM_V4_V5 config SOC_AT91RM9200 bool "AT91RM9200" select ATMEL_AIC_IRQ + select ATMEL_ST select COMMON_CLK_AT91 select CPU_ARM920T select GENERIC_CLOCKEVENTS diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index ea54c9824d89..38aaef7b994e 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -7,7 +7,7 @@ obj-y := soc.o obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o # CPU-specific support -obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o +obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o obj-$(CONFIG_SOC_AT91SAM9) += at91sam9.o obj-$(CONFIG_SOC_SAMA5) += sama5.o diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c deleted file mode 100644 index 7d062ab32674..000000000000 --- a/arch/arm/mach-at91/at91rm9200_time.c +++ /dev/null @@ -1,253 +0,0 @@ -/* - * linux/arch/arm/mach-at91/at91rm9200_time.c - * - * Copyright (C) 2003 SAN People - * Copyright (C) 2003 ATMEL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -static unsigned long last_crtr; -static u32 irqmask; -static struct clock_event_device clkevt; - -#define RM9200_TIMER_LATCH ((AT91_SLOW_CLOCK + HZ/2) / HZ) - -/* - * The ST_CRTR is updated asynchronously to the master clock ... but - * the updates as seen by the CPU don't seem to be strictly monotonic. - * Waiting until we read the same value twice avoids glitching. - */ -static inline unsigned long read_CRTR(void) -{ - unsigned long x1, x2; - - x1 = at91_st_read(AT91_ST_CRTR); - do { - x2 = at91_st_read(AT91_ST_CRTR); - if (x1 == x2) - break; - x1 = x2; - } while (1); - return x1; -} - -/* - * IRQ handler for the timer. - */ -static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id) -{ - u32 sr = at91_st_read(AT91_ST_SR) & irqmask; - - /* - * irqs should be disabled here, but as the irq is shared they are only - * guaranteed to be off if the timer irq is registered first. - */ - WARN_ON_ONCE(!irqs_disabled()); - - /* simulate "oneshot" timer with alarm */ - if (sr & AT91_ST_ALMS) { - clkevt.event_handler(&clkevt); - return IRQ_HANDLED; - } - - /* periodic mode should handle delayed ticks */ - if (sr & AT91_ST_PITS) { - u32 crtr = read_CRTR(); - - while (((crtr - last_crtr) & AT91_ST_CRTV) >= RM9200_TIMER_LATCH) { - last_crtr += RM9200_TIMER_LATCH; - clkevt.event_handler(&clkevt); - } - return IRQ_HANDLED; - } - - /* this irq is shared ... */ - return IRQ_NONE; -} - -static struct irqaction at91rm9200_timer_irq = { - .name = "at91_tick", - .flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL, - .handler = at91rm9200_timer_interrupt, - .irq = NR_IRQS_LEGACY + AT91_ID_SYS, -}; - -static cycle_t read_clk32k(struct clocksource *cs) -{ - return read_CRTR(); -} - -static struct clocksource clk32k = { - .name = "32k_counter", - .rating = 150, - .read = read_clk32k, - .mask = CLOCKSOURCE_MASK(20), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - -static void -clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev) -{ - /* Disable and flush pending timer interrupts */ - at91_st_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS); - at91_st_read(AT91_ST_SR); - - last_crtr = read_CRTR(); - switch (mode) { - case CLOCK_EVT_MODE_PERIODIC: - /* PIT for periodic irqs; fixed rate of 1/HZ */ - irqmask = AT91_ST_PITS; - at91_st_write(AT91_ST_PIMR, RM9200_TIMER_LATCH); - break; - case CLOCK_EVT_MODE_ONESHOT: - /* ALM for oneshot irqs, set by next_event() - * before 32 seconds have passed - */ - irqmask = AT91_ST_ALMS; - at91_st_write(AT91_ST_RTAR, last_crtr); - break; - case CLOCK_EVT_MODE_SHUTDOWN: - case CLOCK_EVT_MODE_UNUSED: - case CLOCK_EVT_MODE_RESUME: - irqmask = 0; - break; - } - at91_st_write(AT91_ST_IER, irqmask); -} - -static int -clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev) -{ - u32 alm; - int status = 0; - - BUG_ON(delta < 2); - - /* The alarm IRQ uses absolute time (now+delta), not the relative - * time (delta) in our calling convention. Like all clockevents - * using such "match" hardware, we have a race to defend against. - * - * Our defense here is to have set up the clockevent device so the - * delta is at least two. That way we never end up writing RTAR - * with the value then held in CRTR ... which would mean the match - * wouldn't trigger until 32 seconds later, after CRTR wraps. - */ - alm = read_CRTR(); - - /* Cancel any pending alarm; flush any pending IRQ */ - at91_st_write(AT91_ST_RTAR, alm); - at91_st_read(AT91_ST_SR); - - /* Schedule alarm by writing RTAR. */ - alm += delta; - at91_st_write(AT91_ST_RTAR, alm); - - return status; -} - -static struct clock_event_device clkevt = { - .name = "at91_tick", - .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, - .rating = 150, - .set_next_event = clkevt32k_next_event, - .set_mode = clkevt32k_mode, -}; - -void __iomem *at91_st_base; -EXPORT_SYMBOL_GPL(at91_st_base); - -static const struct of_device_id at91rm9200_st_timer_ids[] = { - { .compatible = "atmel,at91rm9200-st" }, - { /* sentinel */ } -}; - -static int __init of_at91rm9200_st_init(void) -{ - struct device_node *np; - int ret; - - np = of_find_matching_node(NULL, at91rm9200_st_timer_ids); - if (!np) - goto err; - - at91_st_base = of_iomap(np, 0); - if (!at91_st_base) - goto node_err; - - /* Get the interrupts property */ - ret = irq_of_parse_and_map(np, 0); - if (!ret) - goto ioremap_err; - at91rm9200_timer_irq.irq = ret; - - of_node_put(np); - - return 0; - -ioremap_err: - iounmap(at91_st_base); -node_err: - of_node_put(np); -err: - return -EINVAL; -} - -/* - * ST (system timer) module supports both clockevents and clocksource. - */ -static void __init atmel_st_timer_init(struct device_node *node) -{ - /* For device tree enabled device: initialize here */ - of_at91rm9200_st_init(); - - /* Disable all timer interrupts, and clear any pending ones */ - at91_st_write(AT91_ST_IDR, - AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS); - at91_st_read(AT91_ST_SR); - - /* Make IRQs happen for the system timer */ - setup_irq(at91rm9200_timer_irq.irq, &at91rm9200_timer_irq); - - /* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used - * directly for the clocksource and all clockevents, after adjusting - * its prescaler from the 1 Hz default. - */ - at91_st_write(AT91_ST_RTMR, 1); - - /* Setup timer clockevent, with minimum of two ticks (important!!) */ - clkevt.cpumask = cpumask_of(0); - clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK, - 2, AT91_ST_ALMV); - - /* register clocksource */ - clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); -} -CLOCKSOURCE_OF_DECLARE(atmel_st_timer, "atmel,at91rm9200-st", - atmel_st_timer_init); diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 68161f7a07d6..168035883afa 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -143,6 +143,10 @@ config ATMEL_PIT select CLKSRC_OF if OF def_bool SOC_AT91SAM9 || SOC_SAMA5 +config ATMEL_ST + bool + select CLKSRC_OF + config CLKSRC_METAG_GENERIC def_bool y if METAG help diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 752d5c70b0ef..5b85f6adb258 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -1,5 +1,6 @@ obj-$(CONFIG_CLKSRC_OF) += clksrc-of.o obj-$(CONFIG_ATMEL_PIT) += timer-atmel-pit.o +obj-$(CONFIG_ATMEL_ST) += timer-atmel-st.o obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o obj-$(CONFIG_SCx200HR_TIMER) += scx200_hrt.o diff --git a/drivers/clocksource/timer-atmel-st.c b/drivers/clocksource/timer-atmel-st.c new file mode 100644 index 000000000000..7d062ab32674 --- /dev/null +++ b/drivers/clocksource/timer-atmel-st.c @@ -0,0 +1,253 @@ +/* + * linux/arch/arm/mach-at91/at91rm9200_time.c + * + * Copyright (C) 2003 SAN People + * Copyright (C) 2003 ATMEL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include + +static unsigned long last_crtr; +static u32 irqmask; +static struct clock_event_device clkevt; + +#define RM9200_TIMER_LATCH ((AT91_SLOW_CLOCK + HZ/2) / HZ) + +/* + * The ST_CRTR is updated asynchronously to the master clock ... but + * the updates as seen by the CPU don't seem to be strictly monotonic. + * Waiting until we read the same value twice avoids glitching. + */ +static inline unsigned long read_CRTR(void) +{ + unsigned long x1, x2; + + x1 = at91_st_read(AT91_ST_CRTR); + do { + x2 = at91_st_read(AT91_ST_CRTR); + if (x1 == x2) + break; + x1 = x2; + } while (1); + return x1; +} + +/* + * IRQ handler for the timer. + */ +static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id) +{ + u32 sr = at91_st_read(AT91_ST_SR) & irqmask; + + /* + * irqs should be disabled here, but as the irq is shared they are only + * guaranteed to be off if the timer irq is registered first. + */ + WARN_ON_ONCE(!irqs_disabled()); + + /* simulate "oneshot" timer with alarm */ + if (sr & AT91_ST_ALMS) { + clkevt.event_handler(&clkevt); + return IRQ_HANDLED; + } + + /* periodic mode should handle delayed ticks */ + if (sr & AT91_ST_PITS) { + u32 crtr = read_CRTR(); + + while (((crtr - last_crtr) & AT91_ST_CRTV) >= RM9200_TIMER_LATCH) { + last_crtr += RM9200_TIMER_LATCH; + clkevt.event_handler(&clkevt); + } + return IRQ_HANDLED; + } + + /* this irq is shared ... */ + return IRQ_NONE; +} + +static struct irqaction at91rm9200_timer_irq = { + .name = "at91_tick", + .flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL, + .handler = at91rm9200_timer_interrupt, + .irq = NR_IRQS_LEGACY + AT91_ID_SYS, +}; + +static cycle_t read_clk32k(struct clocksource *cs) +{ + return read_CRTR(); +} + +static struct clocksource clk32k = { + .name = "32k_counter", + .rating = 150, + .read = read_clk32k, + .mask = CLOCKSOURCE_MASK(20), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +static void +clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev) +{ + /* Disable and flush pending timer interrupts */ + at91_st_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS); + at91_st_read(AT91_ST_SR); + + last_crtr = read_CRTR(); + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + /* PIT for periodic irqs; fixed rate of 1/HZ */ + irqmask = AT91_ST_PITS; + at91_st_write(AT91_ST_PIMR, RM9200_TIMER_LATCH); + break; + case CLOCK_EVT_MODE_ONESHOT: + /* ALM for oneshot irqs, set by next_event() + * before 32 seconds have passed + */ + irqmask = AT91_ST_ALMS; + at91_st_write(AT91_ST_RTAR, last_crtr); + break; + case CLOCK_EVT_MODE_SHUTDOWN: + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_RESUME: + irqmask = 0; + break; + } + at91_st_write(AT91_ST_IER, irqmask); +} + +static int +clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev) +{ + u32 alm; + int status = 0; + + BUG_ON(delta < 2); + + /* The alarm IRQ uses absolute time (now+delta), not the relative + * time (delta) in our calling convention. Like all clockevents + * using such "match" hardware, we have a race to defend against. + * + * Our defense here is to have set up the clockevent device so the + * delta is at least two. That way we never end up writing RTAR + * with the value then held in CRTR ... which would mean the match + * wouldn't trigger until 32 seconds later, after CRTR wraps. + */ + alm = read_CRTR(); + + /* Cancel any pending alarm; flush any pending IRQ */ + at91_st_write(AT91_ST_RTAR, alm); + at91_st_read(AT91_ST_SR); + + /* Schedule alarm by writing RTAR. */ + alm += delta; + at91_st_write(AT91_ST_RTAR, alm); + + return status; +} + +static struct clock_event_device clkevt = { + .name = "at91_tick", + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, + .rating = 150, + .set_next_event = clkevt32k_next_event, + .set_mode = clkevt32k_mode, +}; + +void __iomem *at91_st_base; +EXPORT_SYMBOL_GPL(at91_st_base); + +static const struct of_device_id at91rm9200_st_timer_ids[] = { + { .compatible = "atmel,at91rm9200-st" }, + { /* sentinel */ } +}; + +static int __init of_at91rm9200_st_init(void) +{ + struct device_node *np; + int ret; + + np = of_find_matching_node(NULL, at91rm9200_st_timer_ids); + if (!np) + goto err; + + at91_st_base = of_iomap(np, 0); + if (!at91_st_base) + goto node_err; + + /* Get the interrupts property */ + ret = irq_of_parse_and_map(np, 0); + if (!ret) + goto ioremap_err; + at91rm9200_timer_irq.irq = ret; + + of_node_put(np); + + return 0; + +ioremap_err: + iounmap(at91_st_base); +node_err: + of_node_put(np); +err: + return -EINVAL; +} + +/* + * ST (system timer) module supports both clockevents and clocksource. + */ +static void __init atmel_st_timer_init(struct device_node *node) +{ + /* For device tree enabled device: initialize here */ + of_at91rm9200_st_init(); + + /* Disable all timer interrupts, and clear any pending ones */ + at91_st_write(AT91_ST_IDR, + AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS); + at91_st_read(AT91_ST_SR); + + /* Make IRQs happen for the system timer */ + setup_irq(at91rm9200_timer_irq.irq, &at91rm9200_timer_irq); + + /* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used + * directly for the clocksource and all clockevents, after adjusting + * its prescaler from the 1 Hz default. + */ + at91_st_write(AT91_ST_RTMR, 1); + + /* Setup timer clockevent, with minimum of two ticks (important!!) */ + clkevt.cpumask = cpumask_of(0); + clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK, + 2, AT91_ST_ALMV); + + /* register clocksource */ + clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); +} +CLOCKSOURCE_OF_DECLARE(atmel_st_timer, "atmel,at91rm9200-st", + atmel_st_timer_init); -- cgit v1.2.3 From 41141127a83d9e986a77a7cab7e27f5afee3bede Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Fri, 13 Mar 2015 22:57:18 +0100 Subject: ARM: at91: switch to multiplatform Switch AT91 to multiplatform as all SoCs are properly handled. Signed-off-by: Alexandre Belloni Signed-off-by: Nicolas Ferre --- arch/arm/Kconfig | 13 ----- arch/arm/mach-at91/Kconfig | 121 +++++++++++++++++++------------------------- arch/arm/mach-at91/Makefile | 2 + 3 files changed, 54 insertions(+), 82 deletions(-) (limited to 'arch/arm/mach-at91/Kconfig') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f6c5b05e8de8..a1d153098001 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -356,19 +356,6 @@ config ARCH_VERSATILE help This enables support for ARM Ltd Versatile board. -config ARCH_AT91 - bool "Atmel AT91" - select ARCH_REQUIRE_GPIOLIB - select CLKDEV_LOOKUP - select IRQ_DOMAIN - select PINCTRL - select PINCTRL_AT91 - select SOC_BUS - select USE_OF - help - This enables support for systems based on Atmel - AT91RM9200, AT91SAM9 and SAMA5 processors. - config ARCH_CLPS711X bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" select ARCH_REQUIRE_GPIOLIB diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 24b59c75f6af..9416613c8eca 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -1,55 +1,14 @@ -if ARCH_AT91 - -config HAVE_AT91_UTMI - bool - -config HAVE_AT91_USB_CLK - bool - -config COMMON_CLK_AT91 - bool - select COMMON_CLK - -config HAVE_AT91_SMD - bool - -config HAVE_AT91_H32MX - bool - -config SOC_SAMA5 - bool - select ATMEL_AIC5_IRQ +menuconfig ARCH_AT91 + bool "Atmel SoCs" + select ARCH_REQUIRE_GPIOLIB select COMMON_CLK_AT91 - select CPU_V7 - select GENERIC_CLOCKEVENTS - select MEMORY - select ATMEL_SDRAMC - select SRAM if PM - -menu "Atmel AT91 System-on-Chip" - -choice - - prompt "Core type" + select PINCTRL + select PINCTRL_AT91 + select SOC_BUS -config SOC_SAM_V4_V5 - bool "ARM9 AT91SAM9/AT91RM9200" - help - Select this if you are using one of Atmel's AT91SAM9 or - AT91RM9200 SoC. - -config SOC_SAM_V7 - bool "Cortex A5" - help - Select this if you are using one of Atmel's SAMA5D3 SoC. - -endchoice - -comment "Atmel AT91 Processor" - -if SOC_SAM_V7 +if ARCH_AT91 config SOC_SAMA5D3 - bool "SAMA5D3 family" + bool "SAMA5D3 family" if ARCH_MULTI_V7 select SOC_SAMA5 select HAVE_FB_ATMEL select HAVE_AT91_UTMI @@ -60,9 +19,8 @@ config SOC_SAMA5D3 This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36. config SOC_SAMA5D4 - bool "SAMA5D4 family" + bool "SAMA5D4 family" if ARCH_MULTI_V7 select SOC_SAMA5 - select CLKSRC_MMIO select CACHE_L2X0 select HAVE_FB_ATMEL select HAVE_AT91_UTMI @@ -71,32 +29,30 @@ config SOC_SAMA5D4 select HAVE_AT91_H32MX help Select this if you are using one of Atmel's SAMA5D4 family SoC. -endif -if SOC_SAM_V4_V5 config SOC_AT91RM9200 - bool "AT91RM9200" + bool "AT91RM9200" if ARCH_MULTI_V4T select ATMEL_AIC_IRQ select ATMEL_ST - select COMMON_CLK_AT91 select CPU_ARM920T - select GENERIC_CLOCKEVENTS select HAVE_AT91_USB_CLK select MIGHT_HAVE_PCI + select SOC_SAM_V4_V5 select SRAM if PM + help + Select this if you are using Atmel's AT91RM9200 SoC. config SOC_AT91SAM9 - bool "AT91SAM9" + bool "AT91SAM9" if ARCH_MULTI_V5 select ATMEL_AIC_IRQ select ATMEL_SDRAMC - select COMMON_CLK_AT91 select CPU_ARM926T - select GENERIC_CLOCKEVENTS select HAVE_AT91_SMD select HAVE_AT91_USB_CLK select HAVE_AT91_UTMI select HAVE_FB_ATMEL select MEMORY + select SOC_SAM_V4_V5 select SRAM if PM help Select this if you are using one of those Atmel SoC: @@ -116,17 +72,46 @@ config SOC_AT91SAM9 AT91SAM9X25 AT91SAM9X35 AT91SAM9XE -endif # SOC_SAM_V4_V5 -comment "AT91 Feature Selections" +config HAVE_AT91_UTMI + bool + +config HAVE_AT91_USB_CLK + bool + +config COMMON_CLK_AT91 + bool + select COMMON_CLK + +config HAVE_AT91_SMD + bool + +config HAVE_AT91_H32MX + bool + +config SOC_SAM_V4_V5 + bool + +config SOC_SAM_V7 + bool + +config SOC_SAMA5 + bool + select ATMEL_AIC5_IRQ + select ATMEL_SDRAMC + select MEMORY + select SOC_SAM_V7 + select SRAM if PM + +comment "Atmel SoCs Feature Selections" config AT91_TIMER_HZ - int "Kernel HZ (jiffies per second)" - range 32 1024 - depends on ARCH_AT91 - default "128" if SOC_AT91RM9200 - default "100" - help + int "Kernel HZ (jiffies per second)" + range 32 1024 + depends on ARCH_AT91 + default "128" if SOC_AT91RM9200 + default "100" + help On AT91rm9200 chips where you're using a system clock derived from the 32768 Hz hardware clock, this tick rate should divide it exactly: use a power-of-two value, such as 128 or 256, to @@ -136,6 +121,4 @@ config AT91_TIMER_HZ system clock (of at least several MHz), rounding is less of a problem so it can be safer to use a decimal values like 100. -endmenu - endif diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 38aaef7b994e..06a4cefd33a0 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -1,6 +1,8 @@ # # Makefile for the linux kernel. # +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include +asflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include obj-y := soc.o -- cgit v1.2.3 From 1164f672d71ac103d85207b0453f3127c0efefb3 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Fri, 13 Mar 2015 22:57:24 +0100 Subject: ARM: at91: drop AT91_TIMER_HZ Drop AT91_TIMER_HZ as this can be handled using HZ_FIXED. Initial help message was: On AT91rm9200 chips where you're using a system clock derived from the 32768 Hz hardware clock, this tick rate should divide it exactly: use a power-of-two value, such as 128 or 256, to reduce timing errors caused by rounding. Signed-off-by: Alexandre Belloni Signed-off-by: Nicolas Ferre --- arch/arm/Kconfig | 2 +- arch/arm/mach-at91/Kconfig | 18 ------------------ 2 files changed, 1 insertion(+), 19 deletions(-) (limited to 'arch/arm/mach-at91/Kconfig') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a1d153098001..8d5c4f9c15f9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1502,7 +1502,7 @@ config HZ_FIXED int default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \ ARCH_S5PV210 || ARCH_EXYNOS4 - default AT91_TIMER_HZ if ARCH_AT91 + default 128 if SOC_AT91RM9200 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY default 0 diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 9416613c8eca..e2cd30f6c23d 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -103,22 +103,4 @@ config SOC_SAMA5 select SOC_SAM_V7 select SRAM if PM -comment "Atmel SoCs Feature Selections" - -config AT91_TIMER_HZ - int "Kernel HZ (jiffies per second)" - range 32 1024 - depends on ARCH_AT91 - default "128" if SOC_AT91RM9200 - default "100" - help - On AT91rm9200 chips where you're using a system clock derived - from the 32768 Hz hardware clock, this tick rate should divide - it exactly: use a power-of-two value, such as 128 or 256, to - reduce timing errors caused by rounding. - - On AT91sam926x chips, or otherwise when using a higher precision - system clock (of at least several MHz), rounding is less of a - problem so it can be safer to use a decimal values like 100. - endif -- cgit v1.2.3 From e8621d83c10ee95798bdb5e04f54439a7c1c9a2b Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Thu, 2 Apr 2015 17:07:57 +0200 Subject: ARM: at91: add a Kconfig dependency on multi-platform When building a legacy (non-multi) platforms and if the ARCH_AT91 config option is enabled there is a build error. We need AT91 to depend on multi-platform core type options. Reported-by: Arnd Bergmann Signed-off-by: Nicolas Ferre Signed-off-by: Olof Johansson --- arch/arm/mach-at91/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-at91/Kconfig') diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index e2cd30f6c23d..fd95f34945f4 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -1,5 +1,6 @@ menuconfig ARCH_AT91 bool "Atmel SoCs" + depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V7 select ARCH_REQUIRE_GPIOLIB select COMMON_CLK_AT91 select PINCTRL -- cgit v1.2.3