From df8f4d2f3ef9ca2154f7bd531492a83c4ab4558a Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Fri, 26 Nov 2010 20:48:35 +0300 Subject: ARM: cns3xxx: Make cns3xxx_pwr_soft_rst_force() to actually reset blocks commit 6eb5d146d4535 ("ARM: cns3xxx: Use IO memory accessors everywhere") breaks cns3xxx_pwr_soft_rst_force() function, so that it doesn't write cleared bit into the register. This patch fixes the issue by adding the necessary __raw_writel(). Signed-off-by: Anton Vorontsov --- arch/arm/mach-cns3xxx/pm.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-cns3xxx/pm.c') diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c index 38e44706feab..dfccabbd9599 100644 --- a/arch/arm/mach-cns3xxx/pm.c +++ b/arch/arm/mach-cns3xxx/pm.c @@ -51,6 +51,7 @@ static void cns3xxx_pwr_soft_rst_force(unsigned int block) reg &= ~(block & PM_SOFT_RST_REG_MASK); } else { reg &= ~(block & PM_SOFT_RST_REG_MASK); + __raw_writel(reg, PM_SOFT_RST_REG); reg |= (block & PM_SOFT_RST_REG_MASK); } -- cgit v1.2.3 From 38e64ba0f13918d11e50bbd5bb775781ccd6439d Mon Sep 17 00:00:00 2001 From: Mac Lin Date: Tue, 23 Nov 2010 00:32:43 +0800 Subject: ARM: cns3xxx: Add new and export the old power management functions This patch adds cns3xxx_pwr_clk_dis, and exports these power management functions that may be used by many other device drivers on CNS3XXX. Signed-off-by: Mac Lin Signed-off-by: Anton Vorontsov --- arch/arm/mach-cns3xxx/core.h | 2 -- arch/arm/mach-cns3xxx/devices.c | 1 + arch/arm/mach-cns3xxx/include/mach/pm.h | 19 +++++++++++++++++++ arch/arm/mach-cns3xxx/pm.c | 18 ++++++++++++++++++ 4 files changed, 38 insertions(+), 2 deletions(-) create mode 100644 arch/arm/mach-cns3xxx/include/mach/pm.h (limited to 'arch/arm/mach-cns3xxx/pm.c') diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h index 6b33ec11346e..73898a7835d3 100644 --- a/arch/arm/mach-cns3xxx/core.h +++ b/arch/arm/mach-cns3xxx/core.h @@ -17,7 +17,5 @@ extern struct sys_timer cns3xxx_timer; void __init cns3xxx_map_io(void); void __init cns3xxx_init_irq(void); void cns3xxx_power_off(void); -void cns3xxx_pwr_power_up(unsigned int block); -void cns3xxx_pwr_power_down(unsigned int block); #endif /* __CNS3XXX_CORE_H */ diff --git a/arch/arm/mach-cns3xxx/devices.c b/arch/arm/mach-cns3xxx/devices.c index 50b4d31c27c0..79d1fb02c23f 100644 --- a/arch/arm/mach-cns3xxx/devices.c +++ b/arch/arm/mach-cns3xxx/devices.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "core.h" #include "devices.h" diff --git a/arch/arm/mach-cns3xxx/include/mach/pm.h b/arch/arm/mach-cns3xxx/include/mach/pm.h new file mode 100644 index 000000000000..102617bdb45b --- /dev/null +++ b/arch/arm/mach-cns3xxx/include/mach/pm.h @@ -0,0 +1,19 @@ +/* + * Copyright 2000 Deep Blue Solutions Ltd + * Copyright 2004 ARM Limited + * Copyright 2008 Cavium Networks + * + * This file is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, Version 2, as + * published by the Free Software Foundation. + */ + +#ifndef __CNS3XXX_PM_H +#define __CNS3XXX_PM_H + +void cns3xxx_pwr_clk_en(unsigned int block); +void cns3xxx_pwr_clk_dis(unsigned int block); +void cns3xxx_pwr_power_up(unsigned int block); +void cns3xxx_pwr_power_down(unsigned int block); + +#endif /* __CNS3XXX_PM_H */ diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c index dfccabbd9599..c047c1a2bc2a 100644 --- a/arch/arm/mach-cns3xxx/pm.c +++ b/arch/arm/mach-cns3xxx/pm.c @@ -6,10 +6,13 @@ * published by the Free Software Foundation. */ +#include +#include #include #include #include #include +#include void cns3xxx_pwr_clk_en(unsigned int block) { @@ -18,6 +21,16 @@ void cns3xxx_pwr_clk_en(unsigned int block) reg |= (block & PM_CLK_GATE_REG_MASK); __raw_writel(reg, PM_CLK_GATE_REG); } +EXPORT_SYMBOL(cns3xxx_pwr_clk_en); + +void cns3xxx_pwr_clk_dis(unsigned int block) +{ + u32 reg = __raw_readl(PM_CLK_GATE_REG); + + reg &= ~(block & PM_CLK_GATE_REG_MASK); + __raw_writel(reg, PM_CLK_GATE_REG); +} +EXPORT_SYMBOL(cns3xxx_pwr_clk_dis); void cns3xxx_pwr_power_up(unsigned int block) { @@ -29,6 +42,7 @@ void cns3xxx_pwr_power_up(unsigned int block) /* Wait for 300us for the PLL output clock locked. */ udelay(300); }; +EXPORT_SYMBOL(cns3xxx_pwr_power_up); void cns3xxx_pwr_power_down(unsigned int block) { @@ -38,6 +52,7 @@ void cns3xxx_pwr_power_down(unsigned int block) reg |= (block & CNS3XXX_PWR_PLL_ALL); __raw_writel(reg, PM_PLL_HM_PD_CTRL_REG); }; +EXPORT_SYMBOL(cns3xxx_pwr_power_down); static void cns3xxx_pwr_soft_rst_force(unsigned int block) { @@ -57,6 +72,7 @@ static void cns3xxx_pwr_soft_rst_force(unsigned int block) __raw_writel(reg, PM_SOFT_RST_REG); } +EXPORT_SYMBOL(cns3xxx_pwr_soft_rst_force); void cns3xxx_pwr_soft_rst(unsigned int block) { @@ -70,6 +86,7 @@ void cns3xxx_pwr_soft_rst(unsigned int block) } cns3xxx_pwr_soft_rst_force(block); } +EXPORT_SYMBOL(cns3xxx_pwr_soft_rst); void arch_reset(char mode, const char *cmd) { @@ -100,3 +117,4 @@ int cns3xxx_cpu_clock(void) return cpu; } +EXPORT_SYMBOL(cns3xxx_cpu_clock); -- cgit v1.2.3 From cf36797f35676dafae9d44484391ac7f56b2485a Mon Sep 17 00:00:00 2001 From: Mac Lin Date: Tue, 23 Nov 2010 00:32:44 +0800 Subject: ARM: cns3xxx: Add architecture definition for EHCI/OHCI controller This patch add plateform_device for EHCI and OHCI controller on CNS3XXX. Power reference count (usb_pwr_ref) is used to control enabling and disabling the single clock control for both EHCI and OHCI controller. It also removes EHCI/OHCI unused virtual address definitions. Signed-off-by: Mac Lin Signed-off-by: Anton Vorontsov --- arch/arm/mach-cns3xxx/cns3420vb.c | 54 ++++++++++++++++++++++++++++ arch/arm/mach-cns3xxx/include/mach/cns3xxx.h | 2 -- arch/arm/mach-cns3xxx/include/mach/pm.h | 4 +++ arch/arm/mach-cns3xxx/pm.c | 4 +++ 4 files changed, 62 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-cns3xxx/pm.c') diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c index 90fe9ab8591d..08e5c8759502 100644 --- a/arch/arm/mach-cns3xxx/cns3420vb.c +++ b/arch/arm/mach-cns3xxx/cns3420vb.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -107,11 +108,64 @@ static void __init cns3420_early_serial_setup(void) #endif } +/* + * USB + */ +static struct resource cns3xxx_usb_ehci_resources[] = { + [0] = { + .start = CNS3XXX_USB_BASE, + .end = CNS3XXX_USB_BASE + SZ_16M - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_CNS3XXX_USB_EHCI, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 cns3xxx_usb_ehci_dma_mask = DMA_BIT_MASK(32); + +static struct platform_device cns3xxx_usb_ehci_device = { + .name = "cns3xxx-ehci", + .num_resources = ARRAY_SIZE(cns3xxx_usb_ehci_resources), + .resource = cns3xxx_usb_ehci_resources, + .dev = { + .dma_mask = &cns3xxx_usb_ehci_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; + +static struct resource cns3xxx_usb_ohci_resources[] = { + [0] = { + .start = CNS3XXX_USB_OHCI_BASE, + .end = CNS3XXX_USB_OHCI_BASE + SZ_16M - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_CNS3XXX_USB_OHCI, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 cns3xxx_usb_ohci_dma_mask = DMA_BIT_MASK(32); + +static struct platform_device cns3xxx_usb_ohci_device = { + .name = "cns3xxx-ohci", + .num_resources = ARRAY_SIZE(cns3xxx_usb_ohci_resources), + .resource = cns3xxx_usb_ohci_resources, + .dev = { + .dma_mask = &cns3xxx_usb_ohci_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; + /* * Initialization */ static struct platform_device *cns3420_pdevs[] __initdata = { &cns3420_nor_pdev, + &cns3xxx_usb_ehci_device, + &cns3xxx_usb_ohci_device, }; static void __init cns3420_init(void) diff --git a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h index 6dbce13771ca..191c8e57f289 100644 --- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h +++ b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h @@ -165,7 +165,6 @@ #define CNS3XXX_USBOTG_BASE_VIRT 0xFFF15000 #define CNS3XXX_USB_BASE 0x82000000 /* USB Host Control */ -#define CNS3XXX_USB_BASE_VIRT 0xFFF16000 #define CNS3XXX_SATA2_BASE 0x83000000 /* SATA */ #define CNS3XXX_SATA2_SIZE SZ_16M @@ -184,7 +183,6 @@ #define CNS3XXX_2DG_BASE_VIRT 0xFFF1B000 #define CNS3XXX_USB_OHCI_BASE 0x88000000 /* USB OHCI */ -#define CNS3XXX_USB_OHCI_BASE_VIRT 0xFFF1C000 #define CNS3XXX_L2C_BASE 0x92000000 /* L2 Cache Control */ #define CNS3XXX_L2C_BASE_VIRT 0xFFF27000 diff --git a/arch/arm/mach-cns3xxx/include/mach/pm.h b/arch/arm/mach-cns3xxx/include/mach/pm.h index 102617bdb45b..6eae7f764d1d 100644 --- a/arch/arm/mach-cns3xxx/include/mach/pm.h +++ b/arch/arm/mach-cns3xxx/include/mach/pm.h @@ -11,9 +11,13 @@ #ifndef __CNS3XXX_PM_H #define __CNS3XXX_PM_H +#include + void cns3xxx_pwr_clk_en(unsigned int block); void cns3xxx_pwr_clk_dis(unsigned int block); void cns3xxx_pwr_power_up(unsigned int block); void cns3xxx_pwr_power_down(unsigned int block); +extern atomic_t usb_pwr_ref; + #endif /* __CNS3XXX_PM_H */ diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c index c047c1a2bc2a..5e579552aa54 100644 --- a/arch/arm/mach-cns3xxx/pm.c +++ b/arch/arm/mach-cns3xxx/pm.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -118,3 +119,6 @@ int cns3xxx_cpu_clock(void) return cpu; } EXPORT_SYMBOL(cns3xxx_cpu_clock); + +atomic_t usb_pwr_ref = ATOMIC_INIT(0); +EXPORT_SYMBOL(usb_pwr_ref); -- cgit v1.2.3