From 68a433f18c0574b50c5952978ca95b0db7347174 Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Sat, 25 May 2013 06:27:29 +0900 Subject: ARM: EXYNOS: Fix support of Exynos4210 rev0 SoC This patch extends exynos_init_time() function to handle Exynos4210 rev0 SoC, which differs in availability of system timers and needs different clocksource initialization. This makes it possible to use exynos_init_time() function as init_time callback for all Exynos-based boards, including Universal_C210, which originally had to use samsung_timer_init(). Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/common.c | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-exynos/common.c') diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 745e304ad0de..a2d20120e9fc 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -10,12 +10,14 @@ */ #include +#include #include #include #include #include #include #include +#include #include #include #include @@ -302,6 +304,13 @@ static struct map_desc exynos5440_iodesc0[] __initdata = { }, }; +static struct samsung_pwm_variant exynos4_pwm_variant = { + .bits = 32, + .div_base = 0, + .has_tint_cstat = true, + .tclk_mask = 0, +}; + void exynos4_restart(char mode, const char *cmd) { __raw_writel(0x1, S5P_SWRESET); @@ -442,8 +451,20 @@ static void __init exynos5440_map_io(void) iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0)); } +void __init exynos_set_timer_source(u8 channels) +{ + exynos4_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1; + exynos4_pwm_variant.output_mask &= ~channels; +} + void __init exynos_init_time(void) { + unsigned int timer_irqs[SAMSUNG_PWM_NUM] = { + EXYNOS4_IRQ_TIMER0_VIC, EXYNOS4_IRQ_TIMER1_VIC, + EXYNOS4_IRQ_TIMER2_VIC, EXYNOS4_IRQ_TIMER3_VIC, + EXYNOS4_IRQ_TIMER4_VIC, + }; + if (of_have_populated_dt()) { #ifdef CONFIG_OF of_clk_init(NULL); @@ -455,7 +476,14 @@ void __init exynos_init_time(void) exynos4_clk_init(NULL, !soc_is_exynos4210(), S5P_VA_CMU, readl(S5P_VA_CHIPID + 8) & 1); exynos4_clk_register_fixed_ext(xxti_f, xusbxti_f); #endif - mct_init(S5P_VA_SYSTIMER, EXYNOS4_IRQ_MCT_G0, EXYNOS4_IRQ_MCT_L0, EXYNOS4_IRQ_MCT_L1); +#ifdef CONFIG_CLKSRC_SAMSUNG_PWM + if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0) + samsung_pwm_clocksource_init(S3C_VA_TIMER, + timer_irqs, &exynos4_pwm_variant); + else +#endif + mct_init(S5P_VA_SYSTIMER, EXYNOS4_IRQ_MCT_G0, + EXYNOS4_IRQ_MCT_L0, EXYNOS4_IRQ_MCT_L1); } } -- cgit v1.2.3 From 1ba830c9997214a7fbe4d91cf238793764620e3b Mon Sep 17 00:00:00 2001 From: Jungseok Lee Date: Sat, 25 May 2013 06:33:03 +0900 Subject: ARM: EXYNOS: fix software reset logic for EXYNOS5440 SOC This patch fixes software reset logic. Software reset applies only to powered-on domains in SOC because software reset to all domains causes reboot failure. Signed-off-by: Jungseok Lee Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/common.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-exynos/common.c') diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index a2d20120e9fc..027c9e7f0d13 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -326,9 +326,16 @@ void exynos5_restart(char mode, const char *cmd) val = 0x1; addr = EXYNOS_SWRESET; } else if (of_machine_is_compatible("samsung,exynos5440")) { + u32 status; np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock"); + + addr = of_iomap(np, 0) + 0xbc; + status = __raw_readl(addr); + addr = of_iomap(np, 0) + 0xcc; - val = (0xfff << 20) | (0x1 << 16); + val = __raw_readl(addr); + + val = (val & 0xffff0000) | (status & 0xffff); } else { pr_err("%s: cannot support non-DT\n", __func__); return; -- cgit v1.2.3