From a09e64fbc0094e3073dbb09c3b4bfe4ab669244b Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 5 Aug 2008 16:14:15 +0100 Subject: [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King --- arch/arm/mach-mv78xx0/common.c | 2 +- arch/arm/mach-mv78xx0/db78x00-bp-setup.c | 2 +- arch/arm/mach-mv78xx0/include/mach/debug-macro.S | 20 ++++ arch/arm/mach-mv78xx0/include/mach/dma.h | 1 + arch/arm/mach-mv78xx0/include/mach/entry-macro.S | 39 +++++++ arch/arm/mach-mv78xx0/include/mach/hardware.h | 21 ++++ arch/arm/mach-mv78xx0/include/mach/io.h | 26 +++++ arch/arm/mach-mv78xx0/include/mach/irqs.h | 91 ++++++++++++++++ arch/arm/mach-mv78xx0/include/mach/memory.h | 14 +++ arch/arm/mach-mv78xx0/include/mach/mv78xx0.h | 126 +++++++++++++++++++++++ arch/arm/mach-mv78xx0/include/mach/system.h | 37 +++++++ arch/arm/mach-mv78xx0/include/mach/timex.h | 9 ++ arch/arm/mach-mv78xx0/include/mach/uncompress.h | 47 +++++++++ arch/arm/mach-mv78xx0/include/mach/vmalloc.h | 5 + arch/arm/mach-mv78xx0/irq.c | 2 +- 15 files changed, 439 insertions(+), 3 deletions(-) create mode 100644 arch/arm/mach-mv78xx0/include/mach/debug-macro.S create mode 100644 arch/arm/mach-mv78xx0/include/mach/dma.h create mode 100644 arch/arm/mach-mv78xx0/include/mach/entry-macro.S create mode 100644 arch/arm/mach-mv78xx0/include/mach/hardware.h create mode 100644 arch/arm/mach-mv78xx0/include/mach/io.h create mode 100644 arch/arm/mach-mv78xx0/include/mach/irqs.h create mode 100644 arch/arm/mach-mv78xx0/include/mach/memory.h create mode 100644 arch/arm/mach-mv78xx0/include/mach/mv78xx0.h create mode 100644 arch/arm/mach-mv78xx0/include/mach/system.h create mode 100644 arch/arm/mach-mv78xx0/include/mach/timex.h create mode 100644 arch/arm/mach-mv78xx0/include/mach/uncompress.h create mode 100644 arch/arm/mach-mv78xx0/include/mach/vmalloc.h (limited to 'arch/arm/mach-mv78xx0') diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c index d27b83b7bf62..e633f9cb239f 100644 --- a/arch/arm/mach-mv78xx0/common.c +++ b/arch/arm/mach-mv78xx0/common.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c index 0c93d19193df..a2d0c9783604 100644 --- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c +++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #include #include "common.h" diff --git a/arch/arm/mach-mv78xx0/include/mach/debug-macro.S b/arch/arm/mach-mv78xx0/include/mach/debug-macro.S new file mode 100644 index 000000000000..a06442fbd341 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/debug-macro.S @@ -0,0 +1,20 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/debug-macro.S + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + ldreq \rx, =MV78XX0_REGS_PHYS_BASE + ldrne \rx, =MV78XX0_REGS_VIRT_BASE + orr \rx, \rx, #0x00012000 + .endm + +#define UART_SHIFT 2 +#include diff --git a/arch/arm/mach-mv78xx0/include/mach/dma.h b/arch/arm/mach-mv78xx0/include/mach/dma.h new file mode 100644 index 000000000000..40a8c178f10d --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/dma.h @@ -0,0 +1 @@ +/* empty */ diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S new file mode 100644 index 000000000000..ed4a46bcd3b0 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S @@ -0,0 +1,39 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for Marvell MV78xx0 platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + + .macro get_irqnr_preamble, base, tmp + ldr \base, =IRQ_VIRT_BASE + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + @ check low interrupts + ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] + ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] + mov \irqnr, #31 + ands \irqstat, \irqstat, \tmp + + @ if no low interrupts set, check high interrupts + ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] + ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF] + moveq \irqnr, #63 + andeqs \irqstat, \irqstat, \tmp + + @ find first active interrupt source + clzne \irqstat, \irqstat + subne \irqnr, \irqnr, \irqstat + .endm diff --git a/arch/arm/mach-mv78xx0/include/mach/hardware.h b/arch/arm/mach-mv78xx0/include/mach/hardware.h new file mode 100644 index 000000000000..5d887557e123 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/hardware.h @@ -0,0 +1,21 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/hardware.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include "mv78xx0.h" + +#define pcibios_assign_all_busses() 1 + +#define PCIBIOS_MIN_IO 0x00001000 +#define PCIBIOS_MIN_MEM 0x01000000 +#define PCIMEM_BASE MV78XX0_PCIE_MEM_PHYS_BASE /* mem base for VGA */ + + +#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/io.h b/arch/arm/mach-mv78xx0/include/mach/io.h new file mode 100644 index 000000000000..450e0e1ad092 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/io.h @@ -0,0 +1,26 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/io.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_IO_H +#define __ASM_ARCH_IO_H + +#include "mv78xx0.h" + +#define IO_SPACE_LIMIT 0xffffffff + +static inline void __iomem *__io(unsigned long addr) +{ + return (void __iomem *)((addr - MV78XX0_PCIE_IO_PHYS_BASE(0)) + + MV78XX0_PCIE_IO_VIRT_BASE(0)); +} + +#define __io(a) __io(a) +#define __mem_pci(a) (a) + + +#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/irqs.h b/arch/arm/mach-mv78xx0/include/mach/irqs.h new file mode 100644 index 000000000000..995d7fb8d06f --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/irqs.h @@ -0,0 +1,91 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/irqs.h + * + * IRQ definitions for Marvell MV78xx0 SoCs + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_IRQS_H +#define __ASM_ARCH_IRQS_H + +#include "mv78xx0.h" /* need GPIO_MAX */ + +/* + * MV78xx0 Low Interrupt Controller + */ +#define IRQ_MV78XX0_ERR 0 +#define IRQ_MV78XX0_SPI 1 +#define IRQ_MV78XX0_I2C_0 2 +#define IRQ_MV78XX0_I2C_1 3 +#define IRQ_MV78XX0_IDMA_0 4 +#define IRQ_MV78XX0_IDMA_1 5 +#define IRQ_MV78XX0_IDMA_2 6 +#define IRQ_MV78XX0_IDMA_3 7 +#define IRQ_MV78XX0_TIMER_0 8 +#define IRQ_MV78XX0_TIMER_1 9 +#define IRQ_MV78XX0_TIMER_2 10 +#define IRQ_MV78XX0_TIMER_3 11 +#define IRQ_MV78XX0_UART_0 12 +#define IRQ_MV78XX0_UART_1 13 +#define IRQ_MV78XX0_UART_2 14 +#define IRQ_MV78XX0_UART_3 15 +#define IRQ_MV78XX0_USB_0 16 +#define IRQ_MV78XX0_USB_1 17 +#define IRQ_MV78XX0_USB_2 18 +#define IRQ_MV78XX0_CRYPTO 19 +#define IRQ_MV78XX0_SDIO_0 20 +#define IRQ_MV78XX0_SDIO_1 21 +#define IRQ_MV78XX0_XOR_0 22 +#define IRQ_MV78XX0_XOR_1 23 +#define IRQ_MV78XX0_I2S_0 24 +#define IRQ_MV78XX0_I2S_1 25 +#define IRQ_MV78XX0_SATA 26 +#define IRQ_MV78XX0_TDMI 27 + +/* + * MV78xx0 High Interrupt Controller + */ +#define IRQ_MV78XX0_PCIE_00 32 +#define IRQ_MV78XX0_PCIE_01 33 +#define IRQ_MV78XX0_PCIE_02 34 +#define IRQ_MV78XX0_PCIE_03 35 +#define IRQ_MV78XX0_PCIE_10 36 +#define IRQ_MV78XX0_PCIE_11 37 +#define IRQ_MV78XX0_PCIE_12 38 +#define IRQ_MV78XX0_PCIE_13 39 +#define IRQ_MV78XX0_GE00_SUM 40 +#define IRQ_MV78XX0_GE00_RX 41 +#define IRQ_MV78XX0_GE00_TX 42 +#define IRQ_MV78XX0_GE00_MISC 43 +#define IRQ_MV78XX0_GE01_SUM 44 +#define IRQ_MV78XX0_GE01_RX 45 +#define IRQ_MV78XX0_GE01_TX 46 +#define IRQ_MV78XX0_GE01_MISC 47 +#define IRQ_MV78XX0_GE10_SUM 48 +#define IRQ_MV78XX0_GE10_RX 49 +#define IRQ_MV78XX0_GE10_TX 50 +#define IRQ_MV78XX0_GE10_MISC 51 +#define IRQ_MV78XX0_GE11_SUM 52 +#define IRQ_MV78XX0_GE11_RX 53 +#define IRQ_MV78XX0_GE11_TX 54 +#define IRQ_MV78XX0_GE11_MISC 55 +#define IRQ_MV78XX0_GPIO_0_7 56 +#define IRQ_MV78XX0_GPIO_8_15 57 +#define IRQ_MV78XX0_GPIO_16_23 58 +#define IRQ_MV78XX0_GPIO_24_31 59 +#define IRQ_MV78XX0_DB_IN 60 +#define IRQ_MV78XX0_DB_OUT 61 + +/* + * MV78XX0 General Purpose Pins + */ +#define IRQ_MV78XX0_GPIO_START 64 +#define NR_GPIO_IRQS GPIO_MAX + +#define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS) + + +#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/memory.h b/arch/arm/mach-mv78xx0/include/mach/memory.h new file mode 100644 index 000000000000..9e47a140ff7a --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/memory.h @@ -0,0 +1,14 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/memory.h + */ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#define PHYS_OFFSET UL(0x00000000) + +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + + +#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h new file mode 100644 index 000000000000..ad664178d6e1 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h @@ -0,0 +1,126 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/mv78xx0.h + * + * Generic definitions for Marvell MV78xx0 SoC flavors: + * MV781x0 and MV782x0. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_MV78XX0_H +#define __ASM_ARCH_MV78XX0_H + +/* + * Marvell MV78xx0 address maps. + * + * phys + * c0000000 PCIe Memory space + * f0800000 PCIe #0 I/O space + * f0900000 PCIe #1 I/O space + * f0a00000 PCIe #2 I/O space + * f0b00000 PCIe #3 I/O space + * f0c00000 PCIe #4 I/O space + * f0d00000 PCIe #5 I/O space + * f0e00000 PCIe #6 I/O space + * f0f00000 PCIe #7 I/O space + * f1000000 on-chip peripheral registers + * + * virt phys size + * fe400000 f102x000 16K core-specific peripheral registers + * fe700000 f0800000 1M PCIe #0 I/O space + * fe800000 f0900000 1M PCIe #1 I/O space + * fe900000 f0a00000 1M PCIe #2 I/O space + * fea00000 f0b00000 1M PCIe #3 I/O space + * feb00000 f0c00000 1M PCIe #4 I/O space + * fec00000 f0d00000 1M PCIe #5 I/O space + * fed00000 f0e00000 1M PCIe #6 I/O space + * fee00000 f0f00000 1M PCIe #7 I/O space + * fef00000 f1000000 1M on-chip peripheral registers + */ +#define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000 +#define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000 +#define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000 +#define MV78XX0_CORE_REGS_SIZE SZ_16K + +#define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20)) +#define MV78XX0_PCIE_IO_VIRT_BASE(i) (0xfe700000 + ((i) << 20)) +#define MV78XX0_PCIE_IO_SIZE SZ_1M + +#define MV78XX0_REGS_PHYS_BASE 0xf1000000 +#define MV78XX0_REGS_VIRT_BASE 0xfef00000 +#define MV78XX0_REGS_SIZE SZ_1M + +#define MV78XX0_PCIE_MEM_PHYS_BASE 0xc0000000 +#define MV78XX0_PCIE_MEM_SIZE 0x30000000 + +/* + * Core-specific peripheral registers. + */ +#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) +#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) +#define L2_WRITETHROUGH 0x00020000 +#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) +#define SOFT_RESET_OUT_EN 0x00000004 +#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) +#define SOFT_RESET 0x00000001 +#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) +#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) +#define BRIDGE_INT_TIMER0 0x0002 +#define BRIDGE_INT_TIMER1 0x0004 +#define BRIDGE_INT_TIMER1_CLR (~0x0004) +#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) +#define IRQ_CAUSE_LOW_OFF 0x0004 +#define IRQ_CAUSE_HIGH_OFF 0x0008 +#define IRQ_MASK_LOW_OFF 0x0010 +#define IRQ_MASK_HIGH_OFF 0x0014 +#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) + +/* + * Register Map + */ +#define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x00000) +#define DDR_WINDOW_CPU0_BASE (DDR_VIRT_BASE | 0x1500) +#define DDR_WINDOW_CPU1_BASE (DDR_VIRT_BASE | 0x1700) + +#define DEV_BUS_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x10000) +#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x10000) +#define SAMPLE_AT_RESET_LOW (DEV_BUS_VIRT_BASE | 0x0030) +#define SAMPLE_AT_RESET_HIGH (DEV_BUS_VIRT_BASE | 0x0034) +#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000) +#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2000) +#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100) +#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) +#define UART2_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2200) +#define UART2_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2200) +#define UART3_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2300) +#define UART3_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2300) + +#define GE10_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x30000) +#define GE11_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x34000) + +#define PCIE00_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x40000) +#define PCIE01_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x44000) +#define PCIE02_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x48000) +#define PCIE03_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x4c000) + +#define USB0_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x50000) +#define USB1_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x51000) +#define USB2_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x52000) + +#define GE00_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x70000) +#define GE01_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x74000) + +#define PCIE10_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x80000) +#define PCIE11_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x84000) +#define PCIE12_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x88000) +#define PCIE13_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x8c000) + +#define SATA_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0xa0000) + + +#define GPIO_MAX 32 + + +#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h new file mode 100644 index 000000000000..7d5179408832 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/system.h @@ -0,0 +1,37 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/system.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include +#include + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +static inline void arch_reset(char mode) +{ + /* + * Enable soft reset to assert RSTOUTn. + */ + writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); + + /* + * Assert soft reset. + */ + writel(SOFT_RESET, SYSTEM_SOFT_RESET); + + while (1) + ; +} + + +#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/timex.h b/arch/arm/mach-mv78xx0/include/mach/timex.h new file mode 100644 index 000000000000..0e8c443c723a --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/timex.h @@ -0,0 +1,9 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/timex.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#define CLOCK_TICK_RATE (100 * HZ) diff --git a/arch/arm/mach-mv78xx0/include/mach/uncompress.h b/arch/arm/mach-mv78xx0/include/mach/uncompress.h new file mode 100644 index 000000000000..365264298e79 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/uncompress.h @@ -0,0 +1,47 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/uncompress.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include + +#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE) + +static void putc(const char c) +{ + unsigned char *base = SERIAL_BASE; + int i; + + for (i = 0; i < 0x1000; i++) { + if (base[UART_LSR << 2] & UART_LSR_THRE) + break; + barrier(); + } + + base[UART_TX << 2] = c; +} + +static void flush(void) +{ + unsigned char *base = SERIAL_BASE; + unsigned char mask; + int i; + + mask = UART_LSR_TEMT | UART_LSR_THRE; + + for (i = 0; i < 0x1000; i++) { + if ((base[UART_LSR << 2] & mask) == mask) + break; + barrier(); + } +} + +/* + * nothing to do + */ +#define arch_decomp_setup() +#define arch_decomp_wdog() diff --git a/arch/arm/mach-mv78xx0/include/mach/vmalloc.h b/arch/arm/mach-mv78xx0/include/mach/vmalloc.h new file mode 100644 index 000000000000..1c4954386a84 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/vmalloc.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/vmalloc.h + */ + +#define VMALLOC_END 0xfe000000 diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c index 60f4ee4d4532..3198abf54c90 100644 --- a/arch/arm/mach-mv78xx0/irq.c +++ b/arch/arm/mach-mv78xx0/irq.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include "common.h" -- cgit v1.2.3 From 6f088f1d215be5250582b974f83f0e3aa6ad3a28 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Sat, 9 Aug 2008 13:44:58 +0200 Subject: [ARM] Move include/asm-arm/plat-orion to arch/arm/plat-orion/include/plat This patch performs the equivalent include directory shuffle for plat-orion, and fixes up all users. Signed-off-by: Lennert Buytenhek --- arch/arm/mach-kirkwood/common.c | 8 +++--- arch/arm/mach-kirkwood/irq.c | 2 +- arch/arm/mach-kirkwood/pcie.c | 2 +- arch/arm/mach-kirkwood/rd88f6281-setup.c | 2 +- arch/arm/mach-loki/common.c | 4 +-- arch/arm/mach-loki/irq.c | 2 +- arch/arm/mach-mv78xx0/common.c | 8 +++--- arch/arm/mach-mv78xx0/irq.c | 2 +- arch/arm/mach-mv78xx0/pcie.c | 2 +- arch/arm/mach-orion5x/common.c | 6 ++-- arch/arm/mach-orion5x/db88f5281-setup.c | 2 +- arch/arm/mach-orion5x/irq.c | 2 +- arch/arm/mach-orion5x/kurobox_pro-setup.c | 2 +- arch/arm/mach-orion5x/pci.c | 2 +- arch/arm/mm/cache-feroceon-l2.c | 2 +- .../plat-orion/include/plat/cache-feroceon-l2.h | 11 ++++++++ arch/arm/plat-orion/include/plat/ehci-orion.h | 19 +++++++++++++ arch/arm/plat-orion/include/plat/irq.h | 17 ++++++++++++ arch/arm/plat-orion/include/plat/mv_xor.h | 30 ++++++++++++++++++++ arch/arm/plat-orion/include/plat/orion_nand.h | 25 +++++++++++++++++ arch/arm/plat-orion/include/plat/pcie.h | 32 ++++++++++++++++++++++ arch/arm/plat-orion/include/plat/time.h | 17 ++++++++++++ arch/arm/plat-orion/irq.c | 2 +- arch/arm/plat-orion/pcie.c | 2 +- drivers/dma/mv_xor.c | 2 +- drivers/mtd/nand/orion_nand.c | 2 +- drivers/usb/host/ehci-orion.c | 2 +- include/asm-arm/plat-orion/cache-feroceon-l2.h | 11 -------- include/asm-arm/plat-orion/ehci-orion.h | 19 ------------- include/asm-arm/plat-orion/irq.h | 17 ------------ include/asm-arm/plat-orion/mv_xor.h | 28 ------------------- include/asm-arm/plat-orion/orion_nand.h | 25 ----------------- include/asm-arm/plat-orion/pcie.h | 32 ---------------------- include/asm-arm/plat-orion/time.h | 17 ------------ 34 files changed, 180 insertions(+), 178 deletions(-) create mode 100644 arch/arm/plat-orion/include/plat/cache-feroceon-l2.h create mode 100644 arch/arm/plat-orion/include/plat/ehci-orion.h create mode 100644 arch/arm/plat-orion/include/plat/irq.h create mode 100644 arch/arm/plat-orion/include/plat/mv_xor.h create mode 100644 arch/arm/plat-orion/include/plat/orion_nand.h create mode 100644 arch/arm/plat-orion/include/plat/pcie.h create mode 100644 arch/arm/plat-orion/include/plat/time.h delete mode 100644 include/asm-arm/plat-orion/cache-feroceon-l2.h delete mode 100644 include/asm-arm/plat-orion/ehci-orion.h delete mode 100644 include/asm-arm/plat-orion/irq.h delete mode 100644 include/asm-arm/plat-orion/mv_xor.h delete mode 100644 include/asm-arm/plat-orion/orion_nand.h delete mode 100644 include/asm-arm/plat-orion/pcie.h delete mode 100644 include/asm-arm/plat-orion/time.h (limited to 'arch/arm/mach-mv78xx0') diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index 0e509b8ad56e..02edd0dccc4d 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c @@ -20,10 +20,10 @@ #include #include #include -#include -#include -#include -#include +#include +#include +#include +#include #include "common.h" /***************************************************************************** diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c index 302bb2cf6669..5790643ffe07 100644 --- a/arch/arm/mach-kirkwood/irq.c +++ b/arch/arm/mach-kirkwood/irq.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include "common.h" void __init kirkwood_init_irq(void) diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c index 8282d0ff84bf..2195fa31f6b7 100644 --- a/arch/arm/mach-kirkwood/pcie.c +++ b/arch/arm/mach-kirkwood/pcie.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include "common.h" diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c index d8a43018c7d3..d96487a0f18b 100644 --- a/arch/arm/mach-kirkwood/rd88f6281-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c @@ -23,7 +23,7 @@ #include #include #include -#include +#include #include "common.h" static struct mtd_partition rd88f6281_nand_parts[] = { diff --git a/arch/arm/mach-loki/common.c b/arch/arm/mach-loki/common.c index e20cdbca1ebe..c0d2d9d12e74 100644 --- a/arch/arm/mach-loki/common.c +++ b/arch/arm/mach-loki/common.c @@ -19,8 +19,8 @@ #include #include #include -#include -#include +#include +#include #include "common.h" /***************************************************************************** diff --git a/arch/arm/mach-loki/irq.c b/arch/arm/mach-loki/irq.c index d839af91fe03..5a487930cb2f 100644 --- a/arch/arm/mach-loki/irq.c +++ b/arch/arm/mach-loki/irq.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include "common.h" void __init loki_init_irq(void) diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c index e633f9cb239f..953a26c469cb 100644 --- a/arch/arm/mach-mv78xx0/common.c +++ b/arch/arm/mach-mv78xx0/common.c @@ -18,10 +18,10 @@ #include #include #include -#include -#include -#include -#include +#include +#include +#include +#include #include "common.h" diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c index 3198abf54c90..28248d37b999 100644 --- a/arch/arm/mach-mv78xx0/irq.c +++ b/arch/arm/mach-mv78xx0/irq.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include "common.h" void __init mv78xx0_init_irq(void) diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c index b78e1443159f..430ea84d587d 100644 --- a/arch/arm/mach-mv78xx0/pcie.c +++ b/arch/arm/mach-mv78xx0/pcie.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include "common.h" struct pcie_port { diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 168eeacaa4c0..b44f26d7613b 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -26,9 +26,9 @@ #include #include #include -#include -#include -#include +#include +#include +#include #include "common.h" /***************************************************************************** diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c index 48ce6d0e0020..ff13e9060b18 100644 --- a/arch/arm/mach-orion5x/db88f5281-setup.c +++ b/arch/arm/mach-orion5x/db88f5281-setup.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include "common.h" #include "mpp.h" diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c index cc2a017fd2a9..2545ff9e5830 100644 --- a/arch/arm/mach-orion5x/irq.c +++ b/arch/arm/mach-orion5x/irq.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include "common.h" /***************************************************************************** diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c index 0caaaac74bc1..45dfc9f99d8d 100644 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include "common.h" #include "mpp.h" diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index 256a4f680935..fbceecc4b7ec 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include "common.h" /***************************************************************************** diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c index 20eec4ba173f..7b5a25d81576 100644 --- a/arch/arm/mm/cache-feroceon-l2.c +++ b/arch/arm/mm/cache-feroceon-l2.c @@ -14,7 +14,7 @@ #include #include -#include +#include /* diff --git a/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h b/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h new file mode 100644 index 000000000000..06f982d55697 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h @@ -0,0 +1,11 @@ +/* + * arch/arm/plat-orion/include/plat/cache-feroceon-l2.h + * + * Copyright (C) 2008 Marvell Semiconductor + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +extern void __init feroceon_l2_init(int l2_wt_override); diff --git a/arch/arm/plat-orion/include/plat/ehci-orion.h b/arch/arm/plat-orion/include/plat/ehci-orion.h new file mode 100644 index 000000000000..64343051095a --- /dev/null +++ b/arch/arm/plat-orion/include/plat/ehci-orion.h @@ -0,0 +1,19 @@ +/* + * arch/arm/plat-orion/include/plat/ehci-orion.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_EHCI_ORION_H +#define __PLAT_EHCI_ORION_H + +#include + +struct orion_ehci_data { + struct mbus_dram_target_info *dram; +}; + + +#endif diff --git a/arch/arm/plat-orion/include/plat/irq.h b/arch/arm/plat-orion/include/plat/irq.h new file mode 100644 index 000000000000..f05eeab94968 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/irq.h @@ -0,0 +1,17 @@ +/* + * arch/arm/plat-orion/include/plat/irq.h + * + * Marvell Orion SoC IRQ handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_IRQ_H +#define __PLAT_IRQ_H + +void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr); + + +#endif diff --git a/arch/arm/plat-orion/include/plat/mv_xor.h b/arch/arm/plat-orion/include/plat/mv_xor.h new file mode 100644 index 000000000000..bd5f3bdb4ae3 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/mv_xor.h @@ -0,0 +1,30 @@ +/* + * arch/arm/plat-orion/include/plat/mv_xor.h + * + * Marvell XOR platform device data definition file. + */ + +#ifndef __PLAT_MV_XOR_H +#define __PLAT_MV_XOR_H + +#include +#include + +#define MV_XOR_SHARED_NAME "mv_xor_shared" +#define MV_XOR_NAME "mv_xor" + +struct mbus_dram_target_info; + +struct mv_xor_platform_shared_data { + struct mbus_dram_target_info *dram; +}; + +struct mv_xor_platform_data { + struct platform_device *shared; + int hw_id; + dma_cap_mask_t cap_mask; + size_t pool_size; +}; + + +#endif diff --git a/arch/arm/plat-orion/include/plat/orion_nand.h b/arch/arm/plat-orion/include/plat/orion_nand.h new file mode 100644 index 000000000000..d6a4cfa37785 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/orion_nand.h @@ -0,0 +1,25 @@ +/* + * arch/arm/plat-orion/include/plat/orion_nand.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_ORION_NAND_H +#define __PLAT_ORION_NAND_H + +/* + * Device bus NAND private data + */ +struct orion_nand_data { + struct mtd_partition *parts; + u32 nr_parts; + u8 ale; /* address line number connected to ALE */ + u8 cle; /* address line number connected to CLE */ + u8 width; /* buswidth */ + u8 chip_delay; +}; + + +#endif diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h new file mode 100644 index 000000000000..3ebfef72b4e7 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/pcie.h @@ -0,0 +1,32 @@ +/* + * arch/arm/plat-orion/include/plat/pcie.h + * + * Marvell Orion SoC PCIe handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_PCIE_H +#define __PLAT_PCIE_H + +u32 orion_pcie_dev_id(void __iomem *base); +u32 orion_pcie_rev(void __iomem *base); +int orion_pcie_link_up(void __iomem *base); +int orion_pcie_x4_mode(void __iomem *base); +int orion_pcie_get_local_bus_nr(void __iomem *base); +void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); +void orion_pcie_setup(void __iomem *base, + struct mbus_dram_target_info *dram); +int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_wr_conf(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 val); + + +#endif diff --git a/arch/arm/plat-orion/include/plat/time.h b/arch/arm/plat-orion/include/plat/time.h new file mode 100644 index 000000000000..c06ca35f3613 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/time.h @@ -0,0 +1,17 @@ +/* + * arch/arm/plat-orion/include/plat/time.h + * + * Marvell Orion SoC time handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_TIME_H +#define __PLAT_TIME_H + +void orion_time_init(unsigned int irq, unsigned int tclk); + + +#endif diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c index fe66a1835169..3f9d34fc738c 100644 --- a/arch/arm/plat-orion/irq.c +++ b/arch/arm/plat-orion/irq.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include static void orion_irq_mask(u32 irq) { diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c index ca32c60e14d7..883902fead89 100644 --- a/arch/arm/plat-orion/pcie.c +++ b/arch/arm/plat-orion/pcie.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include /* * PCIe unit register offsets. diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c index a4e4494663bf..0328da020a10 100644 --- a/drivers/dma/mv_xor.c +++ b/drivers/dma/mv_xor.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include "mv_xor.h" static void mv_xor_issue_pending(struct dma_chan *chan); diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c index 64002488c6ee..917cf8d3ae95 100644 --- a/drivers/mtd/nand/orion_nand.c +++ b/drivers/mtd/nand/orion_nand.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #ifdef CONFIG_MTD_CMDLINE_PARTS static const char *part_probes[] = { "cmdlinepart", NULL }; diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c index 5fbdc14e63b3..5416cf969005 100644 --- a/drivers/usb/host/ehci-orion.c +++ b/drivers/usb/host/ehci-orion.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #define rdl(off) __raw_readl(hcd->regs + (off)) #define wrl(off, val) __raw_writel((val), hcd->regs + (off)) diff --git a/include/asm-arm/plat-orion/cache-feroceon-l2.h b/include/asm-arm/plat-orion/cache-feroceon-l2.h deleted file mode 100644 index ba4e016d3ec0..000000000000 --- a/include/asm-arm/plat-orion/cache-feroceon-l2.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * include/asm-arm/plat-orion/cache-feroceon-l2.h - * - * Copyright (C) 2008 Marvell Semiconductor - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -extern void __init feroceon_l2_init(int l2_wt_override); diff --git a/include/asm-arm/plat-orion/ehci-orion.h b/include/asm-arm/plat-orion/ehci-orion.h deleted file mode 100644 index 785705651e24..000000000000 --- a/include/asm-arm/plat-orion/ehci-orion.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-arm/plat-orion/ehci-orion.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_PLAT_ORION_EHCI_ORION_H -#define __ASM_PLAT_ORION_EHCI_ORION_H - -#include - -struct orion_ehci_data { - struct mbus_dram_target_info *dram; -}; - - -#endif diff --git a/include/asm-arm/plat-orion/irq.h b/include/asm-arm/plat-orion/irq.h deleted file mode 100644 index 94aeed919d5b..000000000000 --- a/include/asm-arm/plat-orion/irq.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * include/asm-arm/plat-orion/irq.h - * - * Marvell Orion SoC IRQ handling. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_PLAT_ORION_IRQ_H -#define __ASM_PLAT_ORION_IRQ_H - -void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr); - - -#endif diff --git a/include/asm-arm/plat-orion/mv_xor.h b/include/asm-arm/plat-orion/mv_xor.h deleted file mode 100644 index c349e8ff5cc0..000000000000 --- a/include/asm-arm/plat-orion/mv_xor.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Marvell XOR platform device data definition file. - */ - -#ifndef __ASM_PLAT_ORION_MV_XOR_H -#define __ASM_PLAT_ORION_MV_XOR_H - -#include -#include - -#define MV_XOR_SHARED_NAME "mv_xor_shared" -#define MV_XOR_NAME "mv_xor" - -struct mbus_dram_target_info; - -struct mv_xor_platform_shared_data { - struct mbus_dram_target_info *dram; -}; - -struct mv_xor_platform_data { - struct platform_device *shared; - int hw_id; - dma_cap_mask_t cap_mask; - size_t pool_size; -}; - - -#endif diff --git a/include/asm-arm/plat-orion/orion_nand.h b/include/asm-arm/plat-orion/orion_nand.h deleted file mode 100644 index ad4ce94c1998..000000000000 --- a/include/asm-arm/plat-orion/orion_nand.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * include/asm-arm/plat-orion/orion_nand.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_PLAT_ORION_ORION_NAND_H -#define __ASM_PLAT_ORION_ORION_NAND_H - -/* - * Device bus NAND private data - */ -struct orion_nand_data { - struct mtd_partition *parts; - u32 nr_parts; - u8 ale; /* address line number connected to ALE */ - u8 cle; /* address line number connected to CLE */ - u8 width; /* buswidth */ - u8 chip_delay; -}; - - -#endif diff --git a/include/asm-arm/plat-orion/pcie.h b/include/asm-arm/plat-orion/pcie.h deleted file mode 100644 index e61b7bd97af5..000000000000 --- a/include/asm-arm/plat-orion/pcie.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * include/asm-arm/plat-orion/pcie.h - * - * Marvell Orion SoC PCIe handling. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_PLAT_ORION_PCIE_H -#define __ASM_PLAT_ORION_PCIE_H - -u32 orion_pcie_dev_id(void __iomem *base); -u32 orion_pcie_rev(void __iomem *base); -int orion_pcie_link_up(void __iomem *base); -int orion_pcie_x4_mode(void __iomem *base); -int orion_pcie_get_local_bus_nr(void __iomem *base); -void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); -void orion_pcie_setup(void __iomem *base, - struct mbus_dram_target_info *dram); -int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, - u32 devfn, int where, int size, u32 *val); -int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus, - u32 devfn, int where, int size, u32 *val); -int orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus, - u32 devfn, int where, int size, u32 *val); -int orion_pcie_wr_conf(void __iomem *base, struct pci_bus *bus, - u32 devfn, int where, int size, u32 val); - - -#endif diff --git a/include/asm-arm/plat-orion/time.h b/include/asm-arm/plat-orion/time.h deleted file mode 100644 index 0e85cc8f44d9..000000000000 --- a/include/asm-arm/plat-orion/time.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * include/asm-arm/plat-orion/time.h - * - * Marvell Orion SoC time handling. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_PLAT_ORION_TIME_H -#define __ASM_PLAT_ORION_TIME_H - -void orion_time_init(unsigned int irq, unsigned int tclk); - - -#endif -- cgit v1.2.3