From 59b479e0985f0b795d68331d6443a7f89c47768d Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 27 Jan 2011 16:39:40 -0800 Subject: omap: Start using CONFIG_SOC_OMAP We want to have just CONFIG_ARCH_OMAP2, 3 and 4. The rest are nowadays just subcategories of these. Search and replace the following: ARCH_OMAP2420 SOC_OMAP2420 ARCH_OMAP2430 SOC_OMAP2430 ARCH_OMAP3430 SOC_OMAP3430 No functional changes. Signed-off-by: Tony Lindgren Signed-off-by: Thomas Weber Acked-by: Sourav Poddar --- arch/arm/mach-omap2/io.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-omap2/io.c') diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index c2032041d26f..11decd85f18b 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -66,7 +66,7 @@ static struct map_desc omap24xx_io_desc[] __initdata = { }, }; -#ifdef CONFIG_ARCH_OMAP2420 +#ifdef CONFIG_SOC_OMAP2420 static struct map_desc omap242x_io_desc[] __initdata = { { .virtual = DSP_MEM_2420_VIRT, @@ -90,7 +90,7 @@ static struct map_desc omap242x_io_desc[] __initdata = { #endif -#ifdef CONFIG_ARCH_OMAP2430 +#ifdef CONFIG_SOC_OMAP2430 static struct map_desc omap243x_io_desc[] __initdata = { { .virtual = L4_WK_243X_VIRT, @@ -241,7 +241,7 @@ static void __init _omap2_map_common_io(void) omap_sram_init(); } -#ifdef CONFIG_ARCH_OMAP2420 +#ifdef CONFIG_SOC_OMAP2420 void __init omap242x_map_common_io(void) { iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); @@ -250,7 +250,7 @@ void __init omap242x_map_common_io(void) } #endif -#ifdef CONFIG_ARCH_OMAP2430 +#ifdef CONFIG_SOC_OMAP2430 void __init omap243x_map_common_io(void) { iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); -- cgit v1.2.3 From 44dc046e93eb98d41048954f700b1927f7e288ed Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 14 Feb 2011 15:40:20 -0800 Subject: omap2+: Make omap_hwmod_late_init into core_initcall Otherwise things will fail with early_init changes. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/io.c | 2 -- arch/arm/mach-omap2/omap_hwmod.c | 3 ++- arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 - 3 files changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-omap2/io.c') diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index c2032041d26f..f89173ab4abe 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -400,8 +400,6 @@ void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0, { omap_serial_early_init(); - omap_hwmod_late_init(); - if (cpu_is_omap24xx() || cpu_is_omap34xx()) { omap2_sdrc_init(sdrc_cs0, sdrc_cs1); _omap2_init_reprogram_sdrc(); diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index e282e35769fd..eacdfd3a14d6 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1628,7 +1628,7 @@ int __init omap_hwmod_init(struct omap_hwmod **ohs) * to struct clk pointers for each registered omap_hwmod. Also calls * _setup() on each hwmod. Returns 0. */ -int omap_hwmod_late_init(void) +static int __init omap_hwmod_late_init(void) { int r; @@ -1644,6 +1644,7 @@ int omap_hwmod_late_init(void) return 0; } +core_initcall(omap_hwmod_late_init); /** * omap_hwmod_enable - enable an omap_hwmod diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 1eee85a8abb3..fedd82971c9e 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -539,7 +539,6 @@ int omap_hwmod_init(struct omap_hwmod **ohs); struct omap_hwmod *omap_hwmod_lookup(const char *name); int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), void *data); -int omap_hwmod_late_init(void); int omap_hwmod_enable(struct omap_hwmod *oh); int _omap_hwmod_enable(struct omap_hwmod *oh); -- cgit v1.2.3 From 3e16f92536334ccb464ed88cf4d8cc0dd43da106 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 14 Feb 2011 15:40:20 -0800 Subject: omap2+: Fix omap_serial_early_init to work with init_early hook The new init_early hook happens at the end of setup_arch, which is too early for kzalloc. However, there's no need to call omap_serial_early_init that early, so fix this by setting it up as a core_initcall. Signed-off-by: Tony Lindgren Tested-by: Kevin Hilman --- arch/arm/mach-omap2/io.c | 2 -- arch/arm/mach-omap2/serial.c | 7 +++++-- arch/arm/plat-omap/include/plat/serial.h | 1 - 3 files changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/arm/mach-omap2/io.c') diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index f89173ab4abe..26a61cf27291 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -398,8 +398,6 @@ void __init omap2_init_common_infrastructure(void) void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1) { - omap_serial_early_init(); - if (cpu_is_omap24xx() || cpu_is_omap34xx()) { omap2_sdrc_init(sdrc_cs0, sdrc_cs1); _omap2_init_reprogram_sdrc(); diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 32e91a9c8b6b..74e25cd4bd3a 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -655,7 +655,7 @@ static void serial_out_override(struct uart_port *up, int offset, int value) } #endif -void __init omap_serial_early_init(void) +static int __init omap_serial_early_init(void) { int i = 0; @@ -672,7 +672,7 @@ void __init omap_serial_early_init(void) uart = kzalloc(sizeof(struct omap_uart_state), GFP_KERNEL); if (WARN_ON(!uart)) - return; + return -ENODEV; uart->oh = oh; uart->num = i++; @@ -691,7 +691,10 @@ void __init omap_serial_early_init(void) */ uart->oh->flags |= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET; } while (1); + + return 0; } +core_initcall(omap_serial_early_init); /** * omap_serial_init_port() - initialize single serial port diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h index cec5d56db2eb..a1a118d052ef 100644 --- a/arch/arm/plat-omap/include/plat/serial.h +++ b/arch/arm/plat-omap/include/plat/serial.h @@ -96,7 +96,6 @@ struct omap_board_data; -extern void __init omap_serial_early_init(void); extern void omap_serial_init(void); extern void omap_serial_init_port(struct omap_board_data *bdata); extern int omap_uart_can_sleep(void); -- cgit v1.2.3 From 01001712c96f82e6317b1e09729d8fc4bcc66957 Mon Sep 17 00:00:00 2001 From: Hemant Pedanekar Date: Wed, 16 Feb 2011 08:31:39 -0800 Subject: TI816X: Update common OMAP machine specific sources This patch updates the common machine specific source files with support for TI816X. Signed-off-by: Hemant Pedanekar Reviewed-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock3xxx_data.c | 5 +++- arch/arm/mach-omap2/common.c | 21 ++++++++++++++++ arch/arm/mach-omap2/control.h | 6 +++++ arch/arm/mach-omap2/id.c | 33 ++++++++++++++++++++++++-- arch/arm/mach-omap2/include/mach/entry-macro.S | 13 ++++++++++ arch/arm/mach-omap2/io.c | 22 ++++++++++++++++- arch/arm/mach-omap2/irq.c | 5 +++- arch/arm/mach-omap2/serial.c | 8 +++---- arch/arm/plat-omap/include/plat/hardware.h | 1 + arch/arm/plat-omap/include/plat/io.h | 8 +++++++ arch/arm/plat-omap/include/plat/ti816x.h | 27 +++++++++++++++++++++ arch/arm/plat-omap/io.c | 5 +++- 12 files changed, 144 insertions(+), 10 deletions(-) create mode 100644 arch/arm/plat-omap/include/plat/ti816x.h (limited to 'arch/arm/mach-omap2/io.c') diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 403a4a1d3f9c..f14d986f0b5d 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -3471,6 +3471,9 @@ int __init omap3xxx_clk_init(void) } else if (cpu_is_omap3630()) { cpu_mask = (RATE_IN_34XX | RATE_IN_36XX); cpu_clkflg = CK_36XX; + } else if (cpu_is_ti816x()) { + cpu_mask = RATE_IN_TI816X; + cpu_clkflg = CK_TI816X; } else if (cpu_is_omap34xx()) { if (omap_rev() == OMAP3430_REV_ES1_0) { cpu_mask = RATE_IN_3430ES1; @@ -3550,7 +3553,7 @@ int __init omap3xxx_clk_init(void) /* * Lock DPLL5 and put it in autoidle. */ - if (omap_rev() >= OMAP3430_REV_ES2_0) + if (!cpu_is_ti816x() && (omap_rev() >= OMAP3430_REV_ES2_0)) omap3_clk_lock_dpll5(); /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */ diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index 778929f7e92d..79fb948f8144 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c @@ -108,6 +108,27 @@ void __init omap3_map_io(void) omap2_set_globals_3xxx(); omap34xx_map_common_io(); } + +/* + * Adjust TAP register base such that omap3_check_revision accesses the correct + * TI816X register for checking device ID (it adds 0x204 to tap base while + * TI816X DEVICE ID register is at offset 0x600 from control base). + */ +#define TI816X_TAP_BASE (TI816X_CTRL_BASE + \ + TI816X_CONTROL_DEVICE_ID - 0x204) + +static struct omap_globals ti816x_globals = { + .class = OMAP343X_CLASS, + .tap = OMAP2_L4_IO_ADDRESS(TI816X_TAP_BASE), + .ctrl = TI816X_CTRL_BASE, + .prm = TI816X_PRCM_BASE, + .cm = TI816X_PRCM_BASE, +}; + +void __init omap2_set_globals_ti816x(void) +{ + __omap2_set_globals(&ti816x_globals); +} #endif #if defined(CONFIG_ARCH_OMAP4) diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index f0629ae04102..c2804c1c4efd 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -52,6 +52,9 @@ #define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00 #define OMAP343X_CONTROL_GENERAL_WKUP 0xa60 +/* TI816X spefic control submodules */ +#define TI816X_CONTROL_DEVCONF 0x600 + /* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */ #define OMAP2_CONTROL_SYSCONFIG (OMAP2_CONTROL_INTERFACE + 0x10) @@ -241,6 +244,9 @@ #define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 #define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 +/* TI816X CONTROL_DEVCONF register offsets */ +#define TI816X_CONTROL_DEVICE_ID (TI816X_CONTROL_DEVCONF + 0x000) + /* * REVISIT: This list of registers is not comprehensive - there are more * that should be added. diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 5f9086c65e48..5c25f1b55235 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -191,12 +191,19 @@ static void __init omap3_check_features(void) if (!cpu_is_omap3505() && !cpu_is_omap3517()) omap3_features |= OMAP3_HAS_IO_WAKEUP; + omap3_features |= OMAP3_HAS_SDRC; + /* * TODO: Get additional info (where applicable) * e.g. Size of L2 cache. */ } +static void __init ti816x_check_features(void) +{ + omap3_features = OMAP3_HAS_NEON; +} + static void __init omap3_check_revision(void) { u32 cpuid, idcode; @@ -287,6 +294,20 @@ static void __init omap3_check_revision(void) omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; } break; + case 0xb81e: + omap_chip.oc = CHIP_IS_TI816X; + + switch (rev) { + case 0: + omap_revision = TI8168_REV_ES1_0; + break; + case 1: + omap_revision = TI8168_REV_ES1_1; + break; + default: + omap_revision = TI8168_REV_ES1_1; + } + break; default: /* Unknown default to latest silicon rev as default*/ omap_revision = OMAP3630_REV_ES1_2; @@ -372,6 +393,8 @@ static void __init omap3_cpuinfo(void) /* Already set in omap3_check_revision() */ strcpy(cpu_name, "AM3505"); } + } else if (cpu_is_ti816x()) { + strcpy(cpu_name, "TI816X"); } else if (omap3_has_iva() && omap3_has_sgx()) { /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ strcpy(cpu_name, "OMAP3430/3530"); @@ -386,7 +409,7 @@ static void __init omap3_cpuinfo(void) strcpy(cpu_name, "OMAP3503"); } - if (cpu_is_omap3630()) { + if (cpu_is_omap3630() || cpu_is_ti816x()) { switch (rev) { case OMAP_REVBITS_00: strcpy(cpu_rev, "1.0"); @@ -462,7 +485,13 @@ void __init omap2_check_revision(void) omap24xx_check_revision(); } else if (cpu_is_omap34xx()) { omap3_check_revision(); - omap3_check_features(); + + /* TI816X doesn't have feature register */ + if (!cpu_is_ti816x()) + omap3_check_features(); + else + ti816x_check_features(); + omap3_cpuinfo(); return; } else if (cpu_is_omap44xx()) { diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index 81985a665cb3..a48690b90990 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S @@ -61,6 +61,14 @@ bne 9998f ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ cmp \irqnr, #0x0 + bne 9998f + + /* + * ti816x has additional IRQ pending register. Checking this + * register on omap2 & omap3 has no effect (read as 0). + */ + ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */ + cmp \irqnr, #0x0 9998: ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ @@ -133,6 +141,11 @@ bne 9999f ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ cmp \irqnr, #0x0 +#ifdef CONFIG_SOC_OMAPTI816X + bne 9999f + ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */ + cmp \irqnr, #0x0 +#endif 9999: ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 26a61cf27291..f992a81c3939 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -175,6 +175,18 @@ static struct map_desc omap34xx_io_desc[] __initdata = { #endif }; #endif + +#ifdef CONFIG_SOC_OMAPTI816X +static struct map_desc omapti816x_io_desc[] __initdata = { + { + .virtual = L4_34XX_VIRT, + .pfn = __phys_to_pfn(L4_34XX_PHYS), + .length = L4_34XX_SIZE, + .type = MT_DEVICE + }, +}; +#endif + #ifdef CONFIG_ARCH_OMAP4 static struct map_desc omap44xx_io_desc[] __initdata = { { @@ -267,6 +279,14 @@ void __init omap34xx_map_common_io(void) } #endif +#ifdef CONFIG_SOC_OMAPTI816X +void __init omapti816x_map_common_io(void) +{ + iotable_init(omapti816x_io_desc, ARRAY_SIZE(omapti816x_io_desc)); + _omap2_map_common_io(); +} +#endif + #ifdef CONFIG_ARCH_OMAP4 void __init omap44xx_map_common_io(void) { @@ -398,7 +418,7 @@ void __init omap2_init_common_infrastructure(void) void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1) { - if (cpu_is_omap24xx() || cpu_is_omap34xx()) { + if (cpu_is_omap24xx() || omap3_has_sdrc()) { omap2_sdrc_init(sdrc_cs0, sdrc_cs1); _omap2_init_reprogram_sdrc(); } diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 23049c487c47..0b9a23d721f4 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -110,7 +110,7 @@ static void omap_mask_irq(struct irq_data *d) unsigned int irq = d->irq; int offset = irq & (~(IRQ_BITS_PER_REG - 1)); - if (cpu_is_omap34xx()) { + if (cpu_is_omap34xx() && !cpu_is_ti816x()) { int spurious = 0; /* @@ -205,6 +205,9 @@ void __init omap_init_irq(void) BUG_ON(!base); + if (cpu_is_ti816x()) + bank->nr_irqs = 128; + /* Static mapping, never released */ bank->base_reg = ioremap(base, SZ_4K); if (!bank->base_reg) { diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 74e25cd4bd3a..47eef48b8830 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -486,7 +486,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart) mod_timer(&uart->timer, jiffies + uart->timeout); omap_uart_smart_idle_enable(uart, 0); - if (cpu_is_omap34xx()) { + if (cpu_is_omap34xx() && !cpu_is_ti816x()) { u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD; u32 wk_mask = 0; u32 padconf = 0; @@ -762,13 +762,13 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) p->private_data = uart; /* - * omap44xx: Never read empty UART fifo + * omap44xx, ti816x: Never read empty UART fifo * omap3xxx: Never read empty UART fifo on UARTs * with IP rev >=0x52 */ uart->regshift = p->regshift; uart->membase = p->membase; - if (cpu_is_omap44xx()) + if (cpu_is_omap44xx() || cpu_is_ti816x()) uart->errata |= UART_ERRATA_FIFO_FULL_ABORT; else if ((serial_read_reg(uart, UART_OMAP_MVER) & 0xFF) >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV) @@ -850,7 +850,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) } /* Enable the MDR1 errata for OMAP3 */ - if (cpu_is_omap34xx()) + if (cpu_is_omap34xx() && !cpu_is_ti816x()) uart->errata |= UART_ERRATA_i202_MDR1_ACCESS; } diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h index d5b26adfb890..e87efe1499b8 100644 --- a/arch/arm/plat-omap/include/plat/hardware.h +++ b/arch/arm/plat-omap/include/plat/hardware.h @@ -286,5 +286,6 @@ #include #include #include +#include #endif /* __ASM_ARCH_OMAP_HARDWARE_H */ diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h index ef4106c13183..427fc8a7c073 100644 --- a/arch/arm/plat-omap/include/plat/io.h +++ b/arch/arm/plat-omap/include/plat/io.h @@ -283,6 +283,14 @@ static inline void omap34xx_map_common_io(void) } #endif +#ifdef CONFIG_SOC_OMAPTI816X +extern void omapti816x_map_common_io(void); +#else +static inline void omapti816x_map_common_io(void) +{ +} +#endif + #ifdef CONFIG_ARCH_OMAP4 extern void omap44xx_map_common_io(void); #else diff --git a/arch/arm/plat-omap/include/plat/ti816x.h b/arch/arm/plat-omap/include/plat/ti816x.h new file mode 100644 index 000000000000..50510f5dda1e --- /dev/null +++ b/arch/arm/plat-omap/include/plat/ti816x.h @@ -0,0 +1,27 @@ +/* + * This file contains the address data for various TI816X modules. + * + * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ASM_ARCH_TI816X_H +#define __ASM_ARCH_TI816X_H + +#define L4_SLOW_TI816X_BASE 0x48000000 + +#define TI816X_SCM_BASE 0x48140000 +#define TI816X_CTRL_BASE TI816X_SCM_BASE +#define TI816X_PRCM_BASE 0x48180000 + +#define TI816X_ARM_INTC_BASE 0x48200000 + +#endif /* __ASM_ARCH_TI816X_H */ diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c index f1295fafcd31..f1ecfa9fc61d 100644 --- a/arch/arm/plat-omap/io.c +++ b/arch/arm/plat-omap/io.c @@ -85,7 +85,10 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) } #endif #ifdef CONFIG_ARCH_OMAP3 - if (cpu_is_omap34xx()) { + if (cpu_is_ti816x()) { + if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE)) + return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT); + } else if (cpu_is_omap34xx()) { if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE)) return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT); if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE)) -- cgit v1.2.3 From db97eb7dfe13f6c04f0a0e77c32e2691f563ab8b Mon Sep 17 00:00:00 2001 From: Sukumar Ghorai Date: Fri, 28 Jan 2011 15:42:05 +0530 Subject: omap: gpmc: enable irq mode in gpmc add support the irq mode in GPMC. gpmc_init() function move after omap_init_irq() as it has dependecy on irq. Signed-off-by: Sukumar Ghorai Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/gpmc.c | 45 +++++++++++++++++++++++++++++++--- arch/arm/mach-omap2/io.c | 2 -- arch/arm/plat-omap/include/plat/gpmc.h | 5 +++- arch/arm/plat-omap/include/plat/irqs.h | 9 ++++++- 4 files changed, 54 insertions(+), 7 deletions(-) (limited to 'arch/arm/mach-omap2/io.c') diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 1b7b3e7d02f7..382dea83e4f0 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -14,6 +14,7 @@ */ #undef DEBUG +#include #include #include #include @@ -22,6 +23,7 @@ #include #include #include +#include #include #include @@ -100,6 +102,8 @@ static void __iomem *gpmc_base; static struct clk *gpmc_l3_clk; +static irqreturn_t gpmc_handle_irq(int irq, void *dev); + static void gpmc_write_reg(int idx, u32 val) { __raw_writel(val, gpmc_base + idx); @@ -497,6 +501,10 @@ int gpmc_cs_configure(int cs, int cmd, int wval) u32 regval = 0; switch (cmd) { + case GPMC_ENABLE_IRQ: + gpmc_write_reg(GPMC_IRQENABLE, wval); + break; + case GPMC_SET_IRQ_STATUS: gpmc_write_reg(GPMC_IRQSTATUS, wval); break; @@ -678,9 +686,10 @@ static void __init gpmc_mem_init(void) } } -void __init gpmc_init(void) +static int __init gpmc_init(void) { - u32 l; + u32 l, irq; + int cs, ret = -EINVAL; char *ck = NULL; if (cpu_is_omap24xx()) { @@ -698,7 +707,7 @@ void __init gpmc_init(void) } if (WARN_ON(!ck)) - return; + return ret; gpmc_l3_clk = clk_get(NULL, ck); if (IS_ERR(gpmc_l3_clk)) { @@ -723,6 +732,36 @@ void __init gpmc_init(void) l |= (0x02 << 3) | (1 << 0); gpmc_write_reg(GPMC_SYSCONFIG, l); gpmc_mem_init(); + + /* initalize the irq_chained */ + irq = OMAP_GPMC_IRQ_BASE; + for (cs = 0; cs < GPMC_CS_NUM; cs++) { + set_irq_handler(irq, handle_simple_irq); + set_irq_flags(irq, IRQF_VALID); + irq++; + } + + ret = request_irq(INT_34XX_GPMC_IRQ, + gpmc_handle_irq, IRQF_SHARED, "gpmc", gpmc_base); + if (ret) + pr_err("gpmc: irq-%d could not claim: err %d\n", + INT_34XX_GPMC_IRQ, ret); + return ret; +} +postcore_initcall(gpmc_init); + +static irqreturn_t gpmc_handle_irq(int irq, void *dev) +{ + u8 cs; + + if (irq != INT_34XX_GPMC_IRQ) + return IRQ_HANDLED; + /* check cs to invoke the irq */ + cs = ((gpmc_read_reg(GPMC_PREFETCH_CONFIG1)) >> CS_NUM_SHIFT) & 0x7; + if (OMAP_GPMC_IRQ_BASE+cs <= OMAP_GPMC_IRQ_END) + generic_handle_irq(OMAP_GPMC_IRQ_BASE+cs); + + return IRQ_HANDLED; } #ifdef CONFIG_ARCH_OMAP3 diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index b8b49e4ae928..657f3c84687c 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -30,7 +30,6 @@ #include #include -#include #include #include "clock2xxx.h" @@ -422,7 +421,6 @@ void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0, omap2_sdrc_init(sdrc_cs0, sdrc_cs1); _omap2_init_reprogram_sdrc(); } - gpmc_init(); omap_irq_base_init(); } diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h index 85ded598853e..9c060da0a873 100644 --- a/arch/arm/plat-omap/include/plat/gpmc.h +++ b/arch/arm/plat-omap/include/plat/gpmc.h @@ -41,6 +41,8 @@ #define GPMC_NAND_ADDRESS 0x0000000b #define GPMC_NAND_DATA 0x0000000c +#define GPMC_ENABLE_IRQ 0x0000000d + /* ECC commands */ #define GPMC_ECC_READ 0 /* Reset Hardware ECC for read */ #define GPMC_ECC_WRITE 1 /* Reset Hardware ECC for write */ @@ -78,6 +80,8 @@ #define WR_RD_PIN_MONITORING 0x00600000 #define GPMC_PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F) #define GPMC_PREFETCH_STATUS_COUNT(val) (val & 0x00003fff) +#define GPMC_IRQ_FIFOEVENTENABLE 0x01 +#define GPMC_IRQ_COUNT_EVENT 0x02 /* * Note that all values in this struct are in nanoseconds except sync_clk @@ -135,7 +139,6 @@ extern int gpmc_prefetch_enable(int cs, int dma_mode, extern int gpmc_prefetch_reset(int cs); extern void omap3_gpmc_save_context(void); extern void omap3_gpmc_restore_context(void); -extern void gpmc_init(void); extern int gpmc_read_status(int cmd); extern int gpmc_cs_configure(int cs, int cmd, int wval); extern int gpmc_nand_read(int cs, int cmd); diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h index 2910de921c52..1b911681e911 100644 --- a/arch/arm/plat-omap/include/plat/irqs.h +++ b/arch/arm/plat-omap/include/plat/irqs.h @@ -318,6 +318,7 @@ #define INT_34XX_PRCM_MPU_IRQ 11 #define INT_34XX_MCBSP1_IRQ 16 #define INT_34XX_MCBSP2_IRQ 17 +#define INT_34XX_GPMC_IRQ 20 #define INT_34XX_MCBSP3_IRQ 22 #define INT_34XX_MCBSP4_IRQ 23 #define INT_34XX_CAM_IRQ 24 @@ -411,7 +412,13 @@ #define TWL_IRQ_END TWL6030_IRQ_END #endif -#define NR_IRQS TWL_IRQ_END +/* GPMC related */ +#define OMAP_GPMC_IRQ_BASE (TWL_IRQ_END) +#define OMAP_GPMC_NR_IRQS 7 +#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS) + + +#define NR_IRQS OMAP_GPMC_IRQ_END #define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) -- cgit v1.2.3 From 4aef7a2a5aad52b60ac1a2f3cee055b8271b70d5 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Fri, 25 Feb 2011 16:06:47 -0700 Subject: OMAP: clockdomain: Arch specific funcs to handle deps Define the following architecture specific funtions for omap2/3 .clkdm_add_wkdep .clkdm_del_wkdep .clkdm_read_wkdep .clkdm_clear_all_wkdeps .clkdm_add_sleepdep .clkdm_del_sleepdep .clkdm_read_sleepdep .clkdm_clear_all_sleepdeps Convert the platform-independent framework to call these functions. With this also move the clkdm lookups for all wkdep_srcs and sleepdep_srcs at clkdm_init. Signed-off-by: Rajendra Nayak [paul@pwsan.com: fixed loop termination conditions in omap*_clkdm_clear_all_*(); thanks to Kevin Hilman for finding and helping fix those bugs; also avoid re-resolving clockdomains during init; abstracted out clkdm_dep walk] Cc: Kevin Hilman Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/Makefile | 2 + arch/arm/mach-omap2/clockdomain.c | 177 +++++++++++++---------- arch/arm/mach-omap2/clockdomain.h | 6 +- arch/arm/mach-omap2/clockdomain2xxx_3xxx.c | 130 +++++++++++++++++ arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c | 9 +- arch/arm/mach-omap2/io.c | 6 +- 6 files changed, 246 insertions(+), 84 deletions(-) create mode 100644 arch/arm/mach-omap2/clockdomain2xxx_3xxx.c (limited to 'arch/arm/mach-omap2/io.c') diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index ee72a9787bf1..759d9ebd79c6 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -102,8 +102,10 @@ obj-$(CONFIG_ARCH_OMAP4) += $(powerdomain-common) \ # PRCM clockdomain control obj-$(CONFIG_ARCH_OMAP2) += clockdomain.o \ + clockdomain2xxx_3xxx.o \ clockdomains2xxx_3xxx_data.o obj-$(CONFIG_ARCH_OMAP3) += clockdomain.o \ + clockdomain2xxx_3xxx.o \ clockdomains2xxx_3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += clockdomain.o \ clockdomains44xx_data.o diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index f70b06ae8664..895c153c18e0 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -287,6 +287,32 @@ static void _disable_hwsup(struct clockdomain *clkdm) BUG(); } +/** + * _resolve_clkdm_deps() - resolve clkdm_names in @clkdm_deps to clkdms + * @clkdm: clockdomain that we are resolving dependencies for + * @clkdm_deps: ptr to array of struct clkdm_deps to resolve + * + * Iterates through @clkdm_deps, looking up the struct clockdomain named by + * clkdm_name and storing the clockdomain pointer in the struct clkdm_dep. + * No return value. + */ +static void _resolve_clkdm_deps(struct clockdomain *clkdm, + struct clkdm_dep *clkdm_deps) +{ + struct clkdm_dep *cd; + + for (cd = clkdm_deps; cd && cd->clkdm_name; cd++) { + if (!omap_chip_is(cd->omap_chip)) + continue; + if (cd->clkdm) + continue; + cd->clkdm = _clkdm_lookup(cd->clkdm_name); + + WARN(!cd->clkdm, "clockdomain: %s: could not find clkdm %s while resolving dependencies - should never happen", + clkdm->name, cd->clkdm_name); + } +} + /* Public functions */ /** @@ -333,7 +359,10 @@ void clkdm_init(struct clockdomain **clkdms, else if (clkdm->flags & CLKDM_CAN_DISABLE_AUTO) omap2_clkdm_deny_idle(clkdm); + _resolve_clkdm_deps(clkdm, clkdm->wkdep_srcs); clkdm_clear_all_wkdeps(clkdm); + + _resolve_clkdm_deps(clkdm, clkdm->sleepdep_srcs); clkdm_clear_all_sleepdeps(clkdm); } } @@ -430,6 +459,7 @@ struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm) int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) { struct clkdm_dep *cd; + int ret = 0; if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) { pr_err("clockdomain: %s/%s: %s: not yet implemented\n", @@ -441,21 +471,26 @@ int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) return -EINVAL; cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs); - if (IS_ERR(cd)) { + if (IS_ERR(cd)) + ret = PTR_ERR(cd); + + if (!arch_clkdm || !arch_clkdm->clkdm_add_wkdep) + ret = -EINVAL; + + if (ret) { pr_debug("clockdomain: hardware cannot set/clear wake up of " "%s when %s wakes up\n", clkdm1->name, clkdm2->name); - return PTR_ERR(cd); + return ret; } if (atomic_inc_return(&cd->wkdep_usecount) == 1) { pr_debug("clockdomain: hardware will wake up %s when %s wakes " "up\n", clkdm1->name, clkdm2->name); - omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); + ret = arch_clkdm->clkdm_add_wkdep(clkdm1, clkdm2); } - return 0; + return ret; } /** @@ -471,6 +506,7 @@ int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) { struct clkdm_dep *cd; + int ret = 0; if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) { pr_err("clockdomain: %s/%s: %s: not yet implemented\n", @@ -482,21 +518,26 @@ int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) return -EINVAL; cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs); - if (IS_ERR(cd)) { + if (IS_ERR(cd)) + ret = PTR_ERR(cd); + + if (!arch_clkdm || !arch_clkdm->clkdm_del_wkdep) + ret = -EINVAL; + + if (ret) { pr_debug("clockdomain: hardware cannot set/clear wake up of " "%s when %s wakes up\n", clkdm1->name, clkdm2->name); - return PTR_ERR(cd); + return ret; } if (atomic_dec_return(&cd->wkdep_usecount) == 0) { pr_debug("clockdomain: hardware will no longer wake up %s " "after %s wakes up\n", clkdm1->name, clkdm2->name); - omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); + ret = arch_clkdm->clkdm_del_wkdep(clkdm1, clkdm2); } - return 0; + return ret; } /** @@ -516,6 +557,7 @@ int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) { struct clkdm_dep *cd; + int ret = 0; if (!clkdm1 || !clkdm2) return -EINVAL; @@ -527,15 +569,20 @@ int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) } cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs); - if (IS_ERR(cd)) { + if (IS_ERR(cd)) + ret = PTR_ERR(cd); + + if (!arch_clkdm || !arch_clkdm->clkdm_read_wkdep) + ret = -EINVAL; + + if (ret) { pr_debug("clockdomain: hardware cannot set/clear wake up of " "%s when %s wakes up\n", clkdm1->name, clkdm2->name); - return PTR_ERR(cd); + return ret; } /* XXX It's faster to return the atomic wkdep_usecount */ - return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP, - (1 << clkdm2->dep_bit)); + return arch_clkdm->clkdm_read_wkdep(clkdm1, clkdm2); } /** @@ -550,9 +597,6 @@ int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) */ int clkdm_clear_all_wkdeps(struct clockdomain *clkdm) { - struct clkdm_dep *cd; - u32 mask = 0; - if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) { pr_err("clockdomain: %s: %s: not yet implemented\n", clkdm->name, __func__); @@ -562,21 +606,10 @@ int clkdm_clear_all_wkdeps(struct clockdomain *clkdm) if (!clkdm) return -EINVAL; - for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { - if (!omap_chip_is(cd->omap_chip)) - continue; - - if (!cd->clkdm && cd->clkdm_name) - cd->clkdm = _clkdm_lookup(cd->clkdm_name); - - /* PRM accesses are slow, so minimize them */ - mask |= 1 << cd->clkdm->dep_bit; - atomic_set(&cd->wkdep_usecount, 0); - } - - omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, PM_WKDEP); + if (!arch_clkdm || !arch_clkdm->clkdm_clear_all_wkdeps) + return -EINVAL; - return 0; + return arch_clkdm->clkdm_clear_all_wkdeps(clkdm); } /** @@ -594,31 +627,33 @@ int clkdm_clear_all_wkdeps(struct clockdomain *clkdm) int clkdm_add_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) { struct clkdm_dep *cd; - - if (!cpu_is_omap34xx()) - return -EINVAL; + int ret = 0; if (!clkdm1 || !clkdm2) return -EINVAL; cd = _clkdm_deps_lookup(clkdm2, clkdm1->sleepdep_srcs); - if (IS_ERR(cd)) { + if (IS_ERR(cd)) + ret = PTR_ERR(cd); + + if (!arch_clkdm || !arch_clkdm->clkdm_add_sleepdep) + ret = -EINVAL; + + if (ret) { pr_debug("clockdomain: hardware cannot set/clear sleep " "dependency affecting %s from %s\n", clkdm1->name, clkdm2->name); - return PTR_ERR(cd); + return ret; } if (atomic_inc_return(&cd->sleepdep_usecount) == 1) { pr_debug("clockdomain: will prevent %s from sleeping if %s " "is active\n", clkdm1->name, clkdm2->name); - omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP); + ret = arch_clkdm->clkdm_add_sleepdep(clkdm1, clkdm2); } - return 0; + return ret; } /** @@ -636,19 +671,23 @@ int clkdm_add_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) int clkdm_del_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) { struct clkdm_dep *cd; - - if (!cpu_is_omap34xx()) - return -EINVAL; + int ret = 0; if (!clkdm1 || !clkdm2) return -EINVAL; cd = _clkdm_deps_lookup(clkdm2, clkdm1->sleepdep_srcs); - if (IS_ERR(cd)) { + if (IS_ERR(cd)) + ret = PTR_ERR(cd); + + if (!arch_clkdm || !arch_clkdm->clkdm_del_sleepdep) + ret = -EINVAL; + + if (ret) { pr_debug("clockdomain: hardware cannot set/clear sleep " "dependency affecting %s from %s\n", clkdm1->name, clkdm2->name); - return PTR_ERR(cd); + return ret; } if (atomic_dec_return(&cd->sleepdep_usecount) == 0) { @@ -656,12 +695,10 @@ int clkdm_del_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) "sleeping if %s is active\n", clkdm1->name, clkdm2->name); - omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP); + ret = arch_clkdm->clkdm_del_sleepdep(clkdm1, clkdm2); } - return 0; + return ret; } /** @@ -683,25 +720,27 @@ int clkdm_del_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) int clkdm_read_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) { struct clkdm_dep *cd; - - if (!cpu_is_omap34xx()) - return -EINVAL; + int ret = 0; if (!clkdm1 || !clkdm2) return -EINVAL; cd = _clkdm_deps_lookup(clkdm2, clkdm1->sleepdep_srcs); - if (IS_ERR(cd)) { + if (IS_ERR(cd)) + ret = PTR_ERR(cd); + + if (!arch_clkdm || !arch_clkdm->clkdm_read_sleepdep) + ret = -EINVAL; + + if (ret) { pr_debug("clockdomain: hardware cannot set/clear sleep " "dependency affecting %s from %s\n", clkdm1->name, clkdm2->name); - return PTR_ERR(cd); + return ret; } /* XXX It's faster to return the atomic sleepdep_usecount */ - return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP, - (1 << clkdm2->dep_bit)); + return arch_clkdm->clkdm_read_sleepdep(clkdm1, clkdm2); } /** @@ -716,31 +755,13 @@ int clkdm_read_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) */ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) { - struct clkdm_dep *cd; - u32 mask = 0; - - if (!cpu_is_omap34xx()) - return -EINVAL; - if (!clkdm) return -EINVAL; - for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) { - if (!omap_chip_is(cd->omap_chip)) - continue; - - if (!cd->clkdm && cd->clkdm_name) - cd->clkdm = _clkdm_lookup(cd->clkdm_name); - - /* PRM accesses are slow, so minimize them */ - mask |= 1 << cd->clkdm->dep_bit; - atomic_set(&cd->sleepdep_usecount, 0); - } - - omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP); + if (!arch_clkdm || !arch_clkdm->clkdm_clear_all_sleepdeps) + return -EINVAL; - return 0; + return arch_clkdm->clkdm_clear_all_sleepdeps(clkdm); } /** diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 71ad265cf133..90b6d6a50862 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -176,7 +176,11 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm); int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk); int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk); -extern void __init omap2_clockdomains_init(void); +extern void __init omap2xxx_clockdomains_init(void); +extern void __init omap3xxx_clockdomains_init(void); extern void __init omap44xx_clockdomains_init(void); +extern struct clkdm_ops omap2_clkdm_operations; +extern struct clkdm_ops omap3_clkdm_operations; + #endif diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c new file mode 100644 index 000000000000..a1fd6fd5a466 --- /dev/null +++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c @@ -0,0 +1,130 @@ +/* + * OMAP2 and OMAP3 clockdomain control + * + * Copyright (C) 2008-2010 Texas Instruments, Inc. + * Copyright (C) 2008-2010 Nokia Corporation + * + * Derived from mach-omap2/clockdomain.c written by Paul Walmsley + * Rajendra Nayak + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include "prm.h" +#include "prm2xxx_3xxx.h" +#include "cm.h" +#include "cm2xxx_3xxx.h" +#include "cm-regbits-24xx.h" +#include "cm-regbits-34xx.h" +#include "clockdomain.h" + +static int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); + return 0; +} + +static int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); + return 0; +} + +static int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, + PM_WKDEP, (1 << clkdm2->dep_bit)); +} + +static int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm) +{ + struct clkdm_dep *cd; + u32 mask = 0; + + for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { + if (!omap_chip_is(cd->omap_chip)) + continue; + if (!cd->clkdm) + continue; /* only happens if data is erroneous */ + + /* PRM accesses are slow, so minimize them */ + mask |= 1 << cd->clkdm->dep_bit; + atomic_set(&cd->wkdep_usecount, 0); + } + + omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, + PM_WKDEP); + return 0; +} + +static int omap3_clkdm_add_sleepdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP); + return 0; +} + +static int omap3_clkdm_del_sleepdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP); + return 0; +} + +static int omap3_clkdm_read_sleepdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP, (1 << clkdm2->dep_bit)); +} + +static int omap3_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) +{ + struct clkdm_dep *cd; + u32 mask = 0; + + for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) { + if (!omap_chip_is(cd->omap_chip)) + continue; + if (!cd->clkdm) + continue; /* only happens if data is erroneous */ + + /* PRM accesses are slow, so minimize them */ + mask |= 1 << cd->clkdm->dep_bit; + atomic_set(&cd->sleepdep_usecount, 0); + } + omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP); + return 0; +} + +struct clkdm_ops omap2_clkdm_operations = { + .clkdm_add_wkdep = omap2_clkdm_add_wkdep, + .clkdm_del_wkdep = omap2_clkdm_del_wkdep, + .clkdm_read_wkdep = omap2_clkdm_read_wkdep, + .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, +}; + +struct clkdm_ops omap3_clkdm_operations = { + .clkdm_add_wkdep = omap2_clkdm_add_wkdep, + .clkdm_del_wkdep = omap2_clkdm_del_wkdep, + .clkdm_read_wkdep = omap2_clkdm_read_wkdep, + .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, + .clkdm_add_sleepdep = omap3_clkdm_add_sleepdep, + .clkdm_del_sleepdep = omap3_clkdm_del_sleepdep, + .clkdm_read_sleepdep = omap3_clkdm_read_sleepdep, + .clkdm_clear_all_sleepdeps = omap3_clkdm_clear_all_sleepdeps, +}; diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c index e2a959eab312..ffdfe54f3264 100644 --- a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c +++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c @@ -854,7 +854,12 @@ static struct clockdomain *clockdomains_omap2[] __initdata = { NULL, }; -void __init omap2_clockdomains_init(void) +void __init omap2xxx_clockdomains_init(void) { - clkdm_init(clockdomains_omap2, clkdm_autodeps, NULL); + clkdm_init(clockdomains_omap2, clkdm_autodeps, &omap2_clkdm_operations); +} + +void __init omap3xxx_clockdomains_init(void) +{ + clkdm_init(clockdomains_omap2, clkdm_autodeps, &omap3_clkdm_operations); } diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index b8b49e4ae928..03f71ec3cd82 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -357,15 +357,15 @@ void __init omap2_init_common_infrastructure(void) if (cpu_is_omap242x()) { omap2xxx_powerdomains_init(); - omap2_clockdomains_init(); + omap2xxx_clockdomains_init(); omap2420_hwmod_init(); } else if (cpu_is_omap243x()) { omap2xxx_powerdomains_init(); - omap2_clockdomains_init(); + omap2xxx_clockdomains_init(); omap2430_hwmod_init(); } else if (cpu_is_omap34xx()) { omap3xxx_powerdomains_init(); - omap2_clockdomains_init(); + omap3xxx_clockdomains_init(); omap3xxx_hwmod_init(); } else if (cpu_is_omap44xx()) { omap44xx_powerdomains_init(); -- cgit v1.2.3