From ff4d3e186b7b92c74a4f64360f723c603193f344 Mon Sep 17 00:00:00 2001 From: Rajeev Kulkarni Date: Tue, 21 Sep 2010 10:34:09 -0600 Subject: OMAP4: prcm: Fix global warm reset bit position OMAP4 platform has different register bits for Warm and Cold Resets. Write one into appropriate bits. Signed-off-by: Rajeev Kulkarni Cc: Leed Aguilar [b-cousson@ti.com: Change the define with the proper one from omap4 headers] Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley Tested-by: Kevin Hilman --- arch/arm/mach-omap2/prcm.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2/prcm.c') diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index c20137497c92..96f461682c91 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -33,6 +33,7 @@ #include "cm.h" #include "prm.h" #include "prm-regbits-24xx.h" +#include "prm-regbits-44xx.h" static void __iomem *prm_base; static void __iomem *cm_base; @@ -161,8 +162,8 @@ void omap_prcm_arch_reset(char mode, const char *cmd) prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs, OMAP2_RM_RSTCTRL); if (cpu_is_omap44xx()) - prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs, - OMAP4_RM_RSTCTRL); + prm_set_mod_reg_bits(OMAP4430_RST_GLOBAL_WARM_SW_MASK, + prcm_offs, OMAP4_RM_RSTCTRL); } static inline u32 __omap_prcm_read(void __iomem *base, s16 module, u16 reg) -- cgit v1.2.3 From 16b040129e324598d13ff2e2b3469dc2e909ce12 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 21 Sep 2010 10:34:10 -0600 Subject: OMAP4: prcm: Add temporarily helper functions for rmw and read inside the PRM Since OMAP4 is using an absolute address, the current PRM accessors are not useable. OMAP4 adaptation for these API are currently ongoing, so define temp version until the proper ones are defined. Signed-off-by: Benoit Cousson Signed-off-by: Paul Walmsley Tested-by: Kevin Hilman --- arch/arm/mach-omap2/prcm.c | 24 ++++++++++++++++++++++++ arch/arm/plat-omap/include/plat/prcm.h | 2 ++ 2 files changed, 26 insertions(+) (limited to 'arch/arm/mach-omap2/prcm.c') diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 96f461682c91..d4388d34c26a 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -216,6 +216,30 @@ u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) return v; } +/* Read a PRM register, AND it, and shift the result down to bit 0 */ +u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask) +{ + u32 v; + + v = __raw_readl(reg); + v &= mask; + v >>= __ffs(mask); + + return v; +} + +/* Read-modify-write a register in a PRM module. Caller must lock */ +u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg) +{ + u32 v; + + v = __raw_readl(reg); + v &= ~mask; + v |= bits; + __raw_writel(v, reg); + + return v; +} /* Read a register in a CM module */ u32 cm_read_mod_reg(s16 module, u16 idx) { diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h index 9fbd91419cd1..ab77442e42ab 100644 --- a/arch/arm/plat-omap/include/plat/prcm.h +++ b/arch/arm/plat-omap/include/plat/prcm.h @@ -38,6 +38,8 @@ u32 prm_read_mod_reg(s16 module, u16 idx); void prm_write_mod_reg(u32 val, s16 module, u16 idx); u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask); +u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); +u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg); u32 cm_read_mod_reg(s16 module, u16 idx); void cm_write_mod_reg(u32 val, s16 module, u16 idx); u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); -- cgit v1.2.3 From 38815733972655ee3cbfc34e254c403c332693c3 Mon Sep 17 00:00:00 2001 From: Manjunath Kondaiah G Date: Fri, 8 Oct 2010 09:56:37 -0700 Subject: OMAP: mach-omap2: Fix static declaration warnings This patch fixes sparse warnings due to non declaration of static structures and variables. Sparse warning logs fixed: arch/arm/mach-omap2/control.c:88:6: warning: symbol 'omap3_secure_ram_storage' was not declared. Should it be static? n arch/arm/mach-omap2/timer-gp.c:50:22: warning: symbol 'gptimer_wakeup' was not declared. Should it be static? arch/arm/mach-omap2/timer-gp.c:240:18: warning: symbol 'omap_timer' was not declared. Should it be static? arch/arm/mach-omap2/prcm.c:121:24: warning: symbol 'prcm_context' was not declared. Should it be static? arch/arm/mach-omap2/mux2420.c:510:29: warning: symbol 'omap2420_pop_ball' was not declared. Should it be static? arch/arm/mach-omap2/mux2430.c:589:29: warning: symbol 'omap2430_pop_ball' was not declared. Should it be static? arch/arm/mach-omap2/mux34xx.c:934:28: warning: symbol 'omap3_cus_subset' was not declared. Should it be static? arch/arm/mach-omap2/mux34xx.c:1080:29: warning: symbol 'omap3_cus_ball' was not declared. Should it be static? arch/arm/mach-omap2/mux34xx.c:1272:28: warning: symbol 'omap3_cbb_subset' was not declared. Should it be static? arch/arm/mach-omap2/mux34xx.c:1393:29: warning: symbol 'omap3_cbb_ball' was not declared. Should it be static? arch/arm/mach-omap2/mux34xx.c:1603:28: warning: symbol 'omap36xx_cbp_subset' was not declared. Should it be static? arch/arm/mach-omap2/mux34xx.c:1821:29: warning: symbol 'omap36xx_cbp_ball' was not declared. Should it be static? arch/arm/mach-omap2/pm-debug.c:165:15: warning: symbol 'pm_dbg_dir' was not declared. Should it be static? arch/arm/mach-omap2/board-omap3evm.c:587:30: warning: symbol 'ads7846_config' was not declared. Should it be static? arch/arm/mach-omap2/board-omap3evm.c:606:23: warning: symbol 'omap3evm_spi_board_info' was not declared. Should it be static? arch/arm/mach-omap2/board-rx51-sdram.c:46:25: warning: symbol 'rx51_sdrc_params' was not declared. Should it be static? arch/arm/mach-omap2/board-rx51-sdram.c:211:25: warning: symbol 'rx51_get_sdram_timings' was not declared. Should it be static? arch/arm/mach-omap2/board-omap3touchbook.c:64:15: warning: symbol 'touchbook_revision' was not declared. Should it be static? arch/arm/mach-omap2/board-am3517evm.c:350:24: warning: symbol 'am3517_evm_dss_device' was not declared. Should it be static? arch/arm/mach-omap2/board-omap3stalker.c:567:23: warning: symbol 'omap3stalker_spi_board_info' was not declared. Should it be static? Signed-off-by: Manjunath Kondaiah G Cc: linux-arm-kernel@lists.infradead.org Cc: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-am3517evm.c | 2 +- arch/arm/mach-omap2/board-omap3evm.c | 4 ++-- arch/arm/mach-omap2/board-omap3stalker.c | 2 +- arch/arm/mach-omap2/board-omap3touchbook.c | 2 +- arch/arm/mach-omap2/board-rx51-sdram.c | 2 +- arch/arm/mach-omap2/control.c | 1 + arch/arm/mach-omap2/mux2420.c | 2 +- arch/arm/mach-omap2/mux2430.c | 2 +- arch/arm/mach-omap2/mux34xx.c | 12 ++++++------ arch/arm/mach-omap2/pm-debug.c | 2 +- arch/arm/mach-omap2/prcm.c | 2 +- arch/arm/plat-omap/include/plat/dmtimer.h | 2 ++ arch/arm/plat-omap/include/plat/sdrc.h | 1 + 13 files changed, 20 insertions(+), 16 deletions(-) (limited to 'arch/arm/mach-omap2/prcm.c') diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index 4d0f58592864..197289b474e4 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -347,7 +347,7 @@ static struct omap_dss_board_info am3517_evm_dss_data = { .default_device = &am3517_evm_lcd_device, }; -struct platform_device am3517_evm_dss_device = { +static struct platform_device am3517_evm_dss_device = { .name = "omapdss", .id = -1, .dev = { diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 523ba551ee7b..c8267d22569a 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -585,7 +585,7 @@ static int ads7846_get_pendown_state(void) return !gpio_get_value(OMAP3_EVM_TS_GPIO); } -struct ads7846_platform_data ads7846_config = { +static struct ads7846_platform_data ads7846_config = { .x_max = 0x0fff, .y_max = 0x0fff, .x_plate_ohms = 180, @@ -604,7 +604,7 @@ static struct omap2_mcspi_device_config ads7846_mcspi_config = { .single_channel = 1, /* 0: slave, 1: master */ }; -struct spi_board_info omap3evm_spi_board_info[] = { +static struct spi_board_info omap3evm_spi_board_info[] = { [0] = { .modalias = "ads7846", .bus_num = 1, diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index c1b881d3d8ae..55d24b6cd6e8 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -565,7 +565,7 @@ static struct omap2_mcspi_device_config ads7846_mcspi_config = { .single_channel = 1, /* 0: slave, 1: master */ }; -struct spi_board_info omap3stalker_spi_board_info[] = { +static struct spi_board_info omap3stalker_spi_board_info[] = { [0] = { .modalias = "ads7846", .bus_num = 1, diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index 9ab18fdd974c..09197a599f74 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -62,7 +62,7 @@ #define TB_BL_PWM_TIMER 9 #define TB_KILL_POWER_GPIO 168 -unsigned long touchbook_revision; +static unsigned long touchbook_revision; static struct mtd_partition omap3touchbook_nand_partitions[] = { /* All the partition sizes are listed in terms of NAND block size */ diff --git a/arch/arm/mach-omap2/board-rx51-sdram.c b/arch/arm/mach-omap2/board-rx51-sdram.c index f392844195d2..a43b2c5c838b 100644 --- a/arch/arm/mach-omap2/board-rx51-sdram.c +++ b/arch/arm/mach-omap2/board-rx51-sdram.c @@ -43,7 +43,7 @@ struct sdram_timings { u32 tWTR; }; -struct omap_sdrc_params rx51_sdrc_params[4]; +static struct omap_sdrc_params rx51_sdrc_params[4]; static const struct sdram_timings rx51_timings[] = { { diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index d21faba3866b..5d9b30dd6e56 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -23,6 +23,7 @@ #include "cm.h" #include "prm.h" #include "sdrc.h" +#include "pm.h" static void __iomem *omap2_ctrl_base; static void __iomem *omap4_ctrl_pad_base; diff --git a/arch/arm/mach-omap2/mux2420.c b/arch/arm/mach-omap2/mux2420.c index fdb04a7eb8aa..414af5434456 100644 --- a/arch/arm/mach-omap2/mux2420.c +++ b/arch/arm/mach-omap2/mux2420.c @@ -507,7 +507,7 @@ static struct omap_mux __initdata omap2420_muxmodes[] = { * Balls for 447-pin POP package */ #ifdef CONFIG_DEBUG_FS -struct omap_ball __initdata omap2420_pop_ball[] = { +static struct omap_ball __initdata omap2420_pop_ball[] = { _OMAP2420_BALLENTRY(CAM_D0, "y4", NULL), _OMAP2420_BALLENTRY(CAM_D1, "y3", NULL), _OMAP2420_BALLENTRY(CAM_D2, "u7", NULL), diff --git a/arch/arm/mach-omap2/mux2430.c b/arch/arm/mach-omap2/mux2430.c index 7dcaaa8af32a..84d2c5a7ecd7 100644 --- a/arch/arm/mach-omap2/mux2430.c +++ b/arch/arm/mach-omap2/mux2430.c @@ -586,7 +586,7 @@ static struct omap_mux __initdata omap2430_muxmodes[] = { * 447-pin s-PBGA Package, 0.00mm Ball Pitch (Bottom) */ #ifdef CONFIG_DEBUG_FS -struct omap_ball __initdata omap2430_pop_ball[] = { +static struct omap_ball __initdata omap2430_pop_ball[] = { _OMAP2430_BALLENTRY(CAM_D0, "t8", NULL), _OMAP2430_BALLENTRY(CAM_D1, "t4", NULL), _OMAP2430_BALLENTRY(CAM_D10, "r4", NULL), diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c index f64d7eea3451..574e54ea3ab7 100644 --- a/arch/arm/mach-omap2/mux34xx.c +++ b/arch/arm/mach-omap2/mux34xx.c @@ -931,7 +931,7 @@ struct omap_ball __initdata omap3_cbc_ball[] = { * Signals different on CUS package compared to superset */ #if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CUS) -struct omap_mux __initdata omap3_cus_subset[] = { +static struct omap_mux __initdata omap3_cus_subset[] = { _OMAP3_MUXENTRY(CAM_D10, 109, "cam_d10", NULL, NULL, NULL, "gpio_109", NULL, NULL, "safe_mode"), @@ -1077,7 +1077,7 @@ struct omap_mux __initdata omap3_cus_subset[] = { */ #if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \ && defined(CONFIG_OMAP_PACKAGE_CUS) -struct omap_ball __initdata omap3_cus_ball[] = { +static struct omap_ball __initdata omap3_cus_ball[] = { _OMAP3_BALLENTRY(CAM_D0, "ab18", NULL), _OMAP3_BALLENTRY(CAM_D1, "ac18", NULL), _OMAP3_BALLENTRY(CAM_D10, "f21", NULL), @@ -1269,7 +1269,7 @@ struct omap_ball __initdata omap3_cus_ball[] = { * Signals different on CBB package comapared to superset */ #if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CBB) -struct omap_mux __initdata omap3_cbb_subset[] = { +static struct omap_mux __initdata omap3_cbb_subset[] = { _OMAP3_MUXENTRY(CAM_D10, 109, "cam_d10", NULL, NULL, NULL, "gpio_109", NULL, NULL, "safe_mode"), @@ -1390,7 +1390,7 @@ struct omap_mux __initdata omap3_cbb_subset[] = { */ #if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \ && defined(CONFIG_OMAP_PACKAGE_CBB) -struct omap_ball __initdata omap3_cbb_ball[] = { +static struct omap_ball __initdata omap3_cbb_ball[] = { _OMAP3_BALLENTRY(CAM_D0, "ag17", NULL), _OMAP3_BALLENTRY(CAM_D1, "ah17", NULL), _OMAP3_BALLENTRY(CAM_D10, "b25", NULL), @@ -1600,7 +1600,7 @@ struct omap_ball __initdata omap3_cbb_ball[] = { * Signals different on 36XX CBP package comapared to 34XX CBC package */ #if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CBP) -struct omap_mux __initdata omap36xx_cbp_subset[] = { +static struct omap_mux __initdata omap36xx_cbp_subset[] = { _OMAP3_MUXENTRY(CAM_D0, 99, "cam_d0", NULL, "csi2_dx2", NULL, "gpio_99", NULL, NULL, "safe_mode"), @@ -1818,7 +1818,7 @@ struct omap_mux __initdata omap36xx_cbp_subset[] = { */ #if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \ && defined (CONFIG_OMAP_PACKAGE_CBP) -struct omap_ball __initdata omap36xx_cbp_ball[] = { +static struct omap_ball __initdata omap36xx_cbp_ball[] = { _OMAP3_BALLENTRY(CAM_D0, "ag17", NULL), _OMAP3_BALLENTRY(CAM_D1, "ah17", NULL), _OMAP3_BALLENTRY(CAM_D10, "b25", NULL), diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index af00c174d7a9..5e81517a7af2 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -167,7 +167,7 @@ void omap2_pm_dump(int mode, int resume, unsigned int us) static void pm_dbg_regset_store(u32 *ptr); -struct dentry *pm_dbg_dir; +static struct dentry *pm_dbg_dir; static int pm_dbg_init_done; diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index d4388d34c26a..a48a1e24f42b 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -119,7 +119,7 @@ struct omap3_prcm_regs { u32 wkup_pm_wken; }; -struct omap3_prcm_regs prcm_context; +static struct omap3_prcm_regs prcm_context; u32 omap_prcm_get_reset_sources(void) { diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 20f1054c0a80..dfa3aff9761b 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -45,6 +45,8 @@ #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02 struct omap_dm_timer; +extern struct omap_dm_timer *gptimer_wakeup; +extern struct sys_timer omap_timer; struct clk; int omap_dm_timer_init(void); diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h index 7b76f50564ba..efd87c8dda69 100644 --- a/arch/arm/plat-omap/include/plat/sdrc.h +++ b/arch/arm/plat-omap/include/plat/sdrc.h @@ -147,6 +147,7 @@ struct memory_timings { }; extern void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode); +struct omap_sdrc_params *rx51_get_sdram_timings(void); u32 omap2xxx_sdrc_dll_is_unlocked(void); u32 omap2xxx_sdrc_reprogram(u32 level, u32 force); -- cgit v1.2.3 From 4814ced5116e3b73dc4f63eec84999739fc8ed11 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 8 Oct 2010 11:40:20 -0600 Subject: OMAP: control: move plat-omap/control.h to mach-omap2/control.h Only OMAP2+ platforms have the System Control Module (SCM) IP block. In the past, we've kept the SCM header file in plat-omap. This has led to abuse - device drivers including it; includes being added that create implicit dependencies on OMAP2+ builds; etc. In response, move the SCM headers into mach-omap2/. As part of this, remove the direct SCM access from the OMAP UDC driver. It was clearly broken. The UDC code needs an indepth review for use on OMAP2+ chips. Signed-off-by: Paul Walmsley Cc: Cory Maccarrone Cc: Kyungmin Park --- arch/arm/mach-omap2/board-3430sdp.c | 2 +- arch/arm/mach-omap2/board-4430sdp.c | 2 +- arch/arm/mach-omap2/board-am3517evm.c | 2 +- arch/arm/mach-omap2/board-apollon.c | 2 +- arch/arm/mach-omap2/board-cm-t3517.c | 2 +- arch/arm/mach-omap2/board-h4.c | 2 +- arch/arm/mach-omap2/board-ldp.c | 2 +- arch/arm/mach-omap2/board-omap3logic.c | 2 +- arch/arm/mach-omap2/board-omap4panda.c | 4 +- arch/arm/mach-omap2/clock2420_data.c | 2 +- arch/arm/mach-omap2/clock2430_data.c | 2 +- arch/arm/mach-omap2/clock3xxx_data.c | 2 +- arch/arm/mach-omap2/clock44xx_data.c | 2 +- arch/arm/mach-omap2/common.c | 2 +- arch/arm/mach-omap2/control.c | 3 +- arch/arm/mach-omap2/control.h | 368 ++++++++++++++++++++++++++ arch/arm/mach-omap2/cpuidle34xx.c | 2 +- arch/arm/mach-omap2/devices.c | 3 +- arch/arm/mach-omap2/hsmmc.c | 2 +- arch/arm/mach-omap2/id.c | 3 +- arch/arm/mach-omap2/mcbsp.c | 4 +- arch/arm/mach-omap2/mux.c | 8 +- arch/arm/mach-omap2/pm24xx.c | 2 +- arch/arm/mach-omap2/pm34xx.c | 2 +- arch/arm/mach-omap2/prcm.c | 2 +- arch/arm/mach-omap2/serial.c | 2 +- arch/arm/mach-omap2/sleep34xx.S | 2 +- arch/arm/mach-omap2/usb-fs.c | 6 +- arch/arm/plat-omap/include/plat/control.h | 368 -------------------------- arch/arm/plat-omap/include/plat/omap-serial.h | 1 - arch/arm/plat-omap/mcbsp.c | 1 - drivers/usb/gadget/omap_udc.c | 18 +- 32 files changed, 408 insertions(+), 419 deletions(-) create mode 100644 arch/arm/mach-omap2/control.h delete mode 100644 arch/arm/plat-omap/include/plat/control.h (limited to 'arch/arm/mach-omap2/prcm.c') diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 9ba2ee246a75..88b5734d0bb2 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -39,7 +39,6 @@ #include #include -#include #include #include "board-flash.h" @@ -47,6 +46,7 @@ #include "sdram-qimonda-hyb18m512160af-6.h" #include "hsmmc.h" #include "pm.h" +#include "control.h" #define CONFIG_DISABLE_HFCLK 1 diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 1d7d70ae7cb8..aafd30680fc8 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -32,12 +32,12 @@ #include #include -#include #include #include #include "hsmmc.h" #include "timer-gp.h" +#include "control.h" #define ETH_KS8851_IRQ 34 #define ETH_KS8851_POWER_ON 48 diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index b091741500de..fada04ea1d5c 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -32,11 +32,11 @@ #include #include -#include #include #include #include "mux.h" +#include "control.h" #define AM35XX_EVM_PHY_MASK (0xF) #define AM35XX_EVM_MDIO_FREQUENCY (1000000) diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index c6421a72514a..102719cb052b 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -39,9 +39,9 @@ #include #include #include -#include #include "mux.h" +#include "control.h" /* LED & Switch macros */ #define LED0_GPIO13 13 diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c index 1115b8ab5e1d..c49319ff5c36 100644 --- a/arch/arm/mach-omap2/board-cm-t3517.c +++ b/arch/arm/mach-omap2/board-cm-t3517.c @@ -40,7 +40,6 @@ #include #include -#include #include #include #include @@ -48,6 +47,7 @@ #include #include "mux.h" +#include "control.h" #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) static struct gpio_led cm_t3517_leds[] = { diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index e09bd686389f..08492a34d310 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -31,7 +31,6 @@ #include #include -#include #include #include #include @@ -42,6 +41,7 @@ #include #include "mux.h" +#include "control.h" #define H4_FLASH_CS 0 #define H4_SMC91X_CS 1 diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 7c1e6ad3972e..8495f37d2756 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -42,12 +42,12 @@ #include #include -#include #include #include "board-flash.h" #include "mux.h" #include "hsmmc.h" +#include "control.h" #define LDP_SMSC911X_CS 1 #define LDP_SMSC911X_GPIO 152 diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index 3151cf269a59..44ff6744ef59 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c @@ -36,6 +36,7 @@ #include "mux.h" #include "hsmmc.h" #include "timer-gp.h" +#include "control.h" #include #include @@ -43,7 +44,6 @@ #include #include #include -#include #define OMAP3LOGIC_SMSC911X_CS 1 diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index 83bd1fe5e323..992a03e248c5 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -34,12 +34,12 @@ #include #include -#include #include #include -#include "hsmmc.h" #include "timer-gp.h" +#include "hsmmc.h" +#include "control.h" static struct gpio_led gpio_leds[] = { { diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index 7086fe4fb7af..21f856252ad8 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c @@ -18,7 +18,6 @@ #include #include -#include #include "clock.h" #include "clock2xxx.h" @@ -28,6 +27,7 @@ #include "prm-regbits-24xx.h" #include "cm-regbits-24xx.h" #include "sdrc.h" +#include "control.h" #define OMAP_CM_REGADDR OMAP2420_CM_REGADDR diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index 454831966d33..e32afcbdfb88 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c @@ -18,7 +18,6 @@ #include #include -#include #include "clock.h" #include "clock2xxx.h" @@ -28,6 +27,7 @@ #include "prm-regbits-24xx.h" #include "cm-regbits-24xx.h" #include "sdrc.h" +#include "control.h" #define OMAP_CM_REGADDR OMAP2430_CM_REGADDR diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 4ac1fb8c0014..d85ecd5aebfd 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -20,7 +20,6 @@ #include #include -#include #include #include "clock.h" @@ -33,6 +32,7 @@ #include "cm-regbits-34xx.h" #include "prm.h" #include "prm-regbits-34xx.h" +#include "control.h" /* * clocks diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 67fac44cb6e6..1599836ba3d9 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -26,7 +26,6 @@ #include #include #include -#include #include #include "clock.h" @@ -35,6 +34,7 @@ #include "cm-regbits-44xx.h" #include "prm.h" #include "prm-regbits-44xx.h" +#include "control.h" /* Root clocks */ diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index cddc89ab7479..778929f7e92d 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c @@ -19,12 +19,12 @@ #include #include -#include #include #include #include "sdrc.h" +#include "control.h" /* Global address base setup code */ diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 5d9b30dd6e56..1fa3294b6048 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -16,14 +16,15 @@ #include #include -#include #include + #include "cm-regbits-34xx.h" #include "prm-regbits-34xx.h" #include "cm.h" #include "prm.h" #include "sdrc.h" #include "pm.h" +#include "control.h" static void __iomem *omap2_ctrl_base; static void __iomem *omap4_ctrl_pad_base; diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h new file mode 100644 index 000000000000..b6c6b7c450b3 --- /dev/null +++ b/arch/arm/mach-omap2/control.h @@ -0,0 +1,368 @@ +/* + * arch/arm/mach-omap2/control.h + * + * OMAP2/3/4 System Control Module definitions + * + * Copyright (C) 2007-2010 Texas Instruments, Inc. + * Copyright (C) 2007-2008, 2010 Nokia Corporation + * + * Written by Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H +#define __ARCH_ARM_MACH_OMAP2_CONTROL_H + +#include +#include +#include +#include +#include + +#ifndef __ASSEMBLY__ +#define OMAP242X_CTRL_REGADDR(reg) \ + OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) +#define OMAP243X_CTRL_REGADDR(reg) \ + OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) +#define OMAP343X_CTRL_REGADDR(reg) \ + OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) +#else +#define OMAP242X_CTRL_REGADDR(reg) \ + OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) +#define OMAP243X_CTRL_REGADDR(reg) \ + OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) +#define OMAP343X_CTRL_REGADDR(reg) \ + OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) +#endif /* __ASSEMBLY__ */ + +/* + * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for + * OMAP24XX and OMAP34XX. + */ + +/* Control submodule offsets */ + +#define OMAP2_CONTROL_INTERFACE 0x000 +#define OMAP2_CONTROL_PADCONFS 0x030 +#define OMAP2_CONTROL_GENERAL 0x270 +#define OMAP343X_CONTROL_MEM_WKUP 0x600 +#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00 +#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60 + +/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */ + +#define OMAP2_CONTROL_SYSCONFIG (OMAP2_CONTROL_INTERFACE + 0x10) + +/* CONTROL_GENERAL register offsets common to OMAP2 & 3 */ +#define OMAP2_CONTROL_DEVCONF0 (OMAP2_CONTROL_GENERAL + 0x0004) +#define OMAP2_CONTROL_MSUSPENDMUX_0 (OMAP2_CONTROL_GENERAL + 0x0020) +#define OMAP2_CONTROL_MSUSPENDMUX_1 (OMAP2_CONTROL_GENERAL + 0x0024) +#define OMAP2_CONTROL_MSUSPENDMUX_2 (OMAP2_CONTROL_GENERAL + 0x0028) +#define OMAP2_CONTROL_MSUSPENDMUX_3 (OMAP2_CONTROL_GENERAL + 0x002c) +#define OMAP2_CONTROL_MSUSPENDMUX_4 (OMAP2_CONTROL_GENERAL + 0x0030) +#define OMAP2_CONTROL_MSUSPENDMUX_5 (OMAP2_CONTROL_GENERAL + 0x0034) +#define OMAP2_CONTROL_SEC_CTRL (OMAP2_CONTROL_GENERAL + 0x0040) +#define OMAP2_CONTROL_RPUB_KEY_H_0 (OMAP2_CONTROL_GENERAL + 0x0090) +#define OMAP2_CONTROL_RPUB_KEY_H_1 (OMAP2_CONTROL_GENERAL + 0x0094) +#define OMAP2_CONTROL_RPUB_KEY_H_2 (OMAP2_CONTROL_GENERAL + 0x0098) +#define OMAP2_CONTROL_RPUB_KEY_H_3 (OMAP2_CONTROL_GENERAL + 0x009c) + +/* 242x-only CONTROL_GENERAL register offsets */ +#define OMAP242X_CONTROL_DEVCONF OMAP2_CONTROL_DEVCONF0 /* match TRM */ +#define OMAP242X_CONTROL_OCM_RAM_PERM (OMAP2_CONTROL_GENERAL + 0x0068) + +/* 243x-only CONTROL_GENERAL register offsets */ +/* CONTROL_IVA2_BOOT{ADDR,MOD} are at the same place on 343x - noted below */ +#define OMAP243X_CONTROL_DEVCONF1 (OMAP2_CONTROL_GENERAL + 0x0078) +#define OMAP243X_CONTROL_CSIRXFE (OMAP2_CONTROL_GENERAL + 0x007c) +#define OMAP243X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) +#define OMAP243X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) +#define OMAP243X_CONTROL_IVA2_GEMCFG (OMAP2_CONTROL_GENERAL + 0x0198) +#define OMAP243X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x0230) + +/* 24xx-only CONTROL_GENERAL register offsets */ +#define OMAP24XX_CONTROL_DEBOBS (OMAP2_CONTROL_GENERAL + 0x0000) +#define OMAP24XX_CONTROL_EMU_SUPPORT (OMAP2_CONTROL_GENERAL + 0x0008) +#define OMAP24XX_CONTROL_SEC_TEST (OMAP2_CONTROL_GENERAL + 0x0044) +#define OMAP24XX_CONTROL_PSA_CTRL (OMAP2_CONTROL_GENERAL + 0x0048) +#define OMAP24XX_CONTROL_PSA_CMD (OMAP2_CONTROL_GENERAL + 0x004c) +#define OMAP24XX_CONTROL_PSA_VALUE (OMAP2_CONTROL_GENERAL + 0x0050) +#define OMAP24XX_CONTROL_SEC_EMU (OMAP2_CONTROL_GENERAL + 0x0060) +#define OMAP24XX_CONTROL_SEC_TAP (OMAP2_CONTROL_GENERAL + 0x0064) +#define OMAP24XX_CONTROL_OCM_PUB_RAM_ADD (OMAP2_CONTROL_GENERAL + 0x006c) +#define OMAP24XX_CONTROL_EXT_SEC_RAM_START_ADD (OMAP2_CONTROL_GENERAL + 0x0070) +#define OMAP24XX_CONTROL_EXT_SEC_RAM_STOP_ADD (OMAP2_CONTROL_GENERAL + 0x0074) +#define OMAP24XX_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0080) +#define OMAP24XX_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0084) +#define OMAP24XX_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0088) +#define OMAP24XX_CONTROL_GENERAL_PURPOSE_STATUS (OMAP2_CONTROL_GENERAL + 0x008c) +#define OMAP24XX_CONTROL_RAND_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00a0) +#define OMAP24XX_CONTROL_RAND_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00a4) +#define OMAP24XX_CONTROL_RAND_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00a8) +#define OMAP24XX_CONTROL_RAND_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00ac) +#define OMAP24XX_CONTROL_CUST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00b0) +#define OMAP24XX_CONTROL_CUST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00b4) +#define OMAP24XX_CONTROL_TEST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00c0) +#define OMAP24XX_CONTROL_TEST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00c4) +#define OMAP24XX_CONTROL_TEST_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00c8) +#define OMAP24XX_CONTROL_TEST_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00cc) +#define OMAP24XX_CONTROL_TEST_KEY_4 (OMAP2_CONTROL_GENERAL + 0x00d0) +#define OMAP24XX_CONTROL_TEST_KEY_5 (OMAP2_CONTROL_GENERAL + 0x00d4) +#define OMAP24XX_CONTROL_TEST_KEY_6 (OMAP2_CONTROL_GENERAL + 0x00d8) +#define OMAP24XX_CONTROL_TEST_KEY_7 (OMAP2_CONTROL_GENERAL + 0x00dc) +#define OMAP24XX_CONTROL_TEST_KEY_8 (OMAP2_CONTROL_GENERAL + 0x00e0) +#define OMAP24XX_CONTROL_TEST_KEY_9 (OMAP2_CONTROL_GENERAL + 0x00e4) + +#define OMAP343X_CONTROL_PADCONF_SYSNIRQ (OMAP2_CONTROL_INTERFACE + 0x01b0) + +/* 34xx-only CONTROL_GENERAL register offsets */ +#define OMAP343X_CONTROL_PADCONF_OFF (OMAP2_CONTROL_GENERAL + 0x0000) +#define OMAP343X_CONTROL_MEM_DFTRW0 (OMAP2_CONTROL_GENERAL + 0x0008) +#define OMAP343X_CONTROL_MEM_DFTRW1 (OMAP2_CONTROL_GENERAL + 0x000c) +#define OMAP343X_CONTROL_DEVCONF1 (OMAP2_CONTROL_GENERAL + 0x0068) +#define OMAP343X_CONTROL_CSIRXFE (OMAP2_CONTROL_GENERAL + 0x006c) +#define OMAP343X_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0070) +#define OMAP343X_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0074) +#define OMAP343X_CONTROL_SEC_ERR_STATUS_DEBUG (OMAP2_CONTROL_GENERAL + 0x0078) +#define OMAP343X_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0080) +#define OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS (OMAP2_CONTROL_GENERAL + 0x0084) +#define OMAP343X_CONTROL_RPUB_KEY_H_4 (OMAP2_CONTROL_GENERAL + 0x00a0) +#define OMAP343X_CONTROL_RAND_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00a8) +#define OMAP343X_CONTROL_RAND_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00ac) +#define OMAP343X_CONTROL_RAND_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00b0) +#define OMAP343X_CONTROL_RAND_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00b4) +#define OMAP343X_CONTROL_TEST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00c8) +#define OMAP343X_CONTROL_TEST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00cc) +#define OMAP343X_CONTROL_TEST_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00d0) +#define OMAP343X_CONTROL_TEST_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00d4) +#define OMAP343X_CONTROL_TEST_KEY_4 (OMAP2_CONTROL_GENERAL + 0x00d8) +#define OMAP343X_CONTROL_TEST_KEY_5 (OMAP2_CONTROL_GENERAL + 0x00dc) +#define OMAP343X_CONTROL_TEST_KEY_6 (OMAP2_CONTROL_GENERAL + 0x00e0) +#define OMAP343X_CONTROL_TEST_KEY_7 (OMAP2_CONTROL_GENERAL + 0x00e4) +#define OMAP343X_CONTROL_TEST_KEY_8 (OMAP2_CONTROL_GENERAL + 0x00e8) +#define OMAP343X_CONTROL_TEST_KEY_9 (OMAP2_CONTROL_GENERAL + 0x00ec) +#define OMAP343X_CONTROL_TEST_KEY_10 (OMAP2_CONTROL_GENERAL + 0x00f0) +#define OMAP343X_CONTROL_TEST_KEY_11 (OMAP2_CONTROL_GENERAL + 0x00f4) +#define OMAP343X_CONTROL_TEST_KEY_12 (OMAP2_CONTROL_GENERAL + 0x00f8) +#define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) +#define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) +#define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) +#define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \ + + ((i) >> 1) * 4 + (!((i) & 1)) * 2) +#define OMAP343X_CONTROL_PROG_IO0 (OMAP2_CONTROL_GENERAL + 0x01D4) +#define OMAP343X_CONTROL_PROG_IO1 (OMAP2_CONTROL_GENERAL + 0x01D8) +#define OMAP343X_CONTROL_DSS_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E0) +#define OMAP343X_CONTROL_CORE_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E4) +#define OMAP343X_CONTROL_PER_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E8) +#define OMAP343X_CONTROL_USBHOST_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01EC) +#define OMAP343X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x02B0) +#define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02B4) +#define OMAP343X_CONTROL_SRAMLDO4 (OMAP2_CONTROL_GENERAL + 0x02B8) +#define OMAP343X_CONTROL_SRAMLDO5 (OMAP2_CONTROL_GENERAL + 0x02C0) +#define OMAP343X_CONTROL_CSI (OMAP2_CONTROL_GENERAL + 0x02C4) + +/* AM35XX only CONTROL_GENERAL register offsets */ +#define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038) +#define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310) +#define AM35XX_CONTROL_DEVCONF3 (OMAP2_CONTROL_GENERAL + 0x0314) +#define AM35XX_CONTROL_CBA_PRIORITY (OMAP2_CONTROL_GENERAL + 0x0320) +#define AM35XX_CONTROL_LVL_INTR_CLEAR (OMAP2_CONTROL_GENERAL + 0x0324) +#define AM35XX_CONTROL_IP_SW_RESET (OMAP2_CONTROL_GENERAL + 0x0328) +#define AM35XX_CONTROL_IPSS_CLK_CTRL (OMAP2_CONTROL_GENERAL + 0x032C) + +/* 34xx PADCONF register offsets */ +#define OMAP343X_PADCONF_ETK(i) (OMAP2_CONTROL_PADCONFS + 0x5a8 + \ + (i)*2) +#define OMAP343X_PADCONF_ETK_CLK OMAP343X_PADCONF_ETK(0) +#define OMAP343X_PADCONF_ETK_CTL OMAP343X_PADCONF_ETK(1) +#define OMAP343X_PADCONF_ETK_D0 OMAP343X_PADCONF_ETK(2) +#define OMAP343X_PADCONF_ETK_D1 OMAP343X_PADCONF_ETK(3) +#define OMAP343X_PADCONF_ETK_D2 OMAP343X_PADCONF_ETK(4) +#define OMAP343X_PADCONF_ETK_D3 OMAP343X_PADCONF_ETK(5) +#define OMAP343X_PADCONF_ETK_D4 OMAP343X_PADCONF_ETK(6) +#define OMAP343X_PADCONF_ETK_D5 OMAP343X_PADCONF_ETK(7) +#define OMAP343X_PADCONF_ETK_D6 OMAP343X_PADCONF_ETK(8) +#define OMAP343X_PADCONF_ETK_D7 OMAP343X_PADCONF_ETK(9) +#define OMAP343X_PADCONF_ETK_D8 OMAP343X_PADCONF_ETK(10) +#define OMAP343X_PADCONF_ETK_D9 OMAP343X_PADCONF_ETK(11) +#define OMAP343X_PADCONF_ETK_D10 OMAP343X_PADCONF_ETK(12) +#define OMAP343X_PADCONF_ETK_D11 OMAP343X_PADCONF_ETK(13) +#define OMAP343X_PADCONF_ETK_D12 OMAP343X_PADCONF_ETK(14) +#define OMAP343X_PADCONF_ETK_D13 OMAP343X_PADCONF_ETK(15) +#define OMAP343X_PADCONF_ETK_D14 OMAP343X_PADCONF_ETK(16) +#define OMAP343X_PADCONF_ETK_D15 OMAP343X_PADCONF_ETK(17) + +/* 34xx GENERAL_WKUP regist offsets */ +#define OMAP343X_CONTROL_WKUP_DEBOBSMUX(i) (OMAP343X_CONTROL_GENERAL_WKUP + \ + 0x008 + (i)) +#define OMAP343X_CONTROL_WKUP_DEBOBS0 (OMAP343X_CONTROL_GENERAL_WKUP + 0x008) +#define OMAP343X_CONTROL_WKUP_DEBOBS1 (OMAP343X_CONTROL_GENERAL_WKUP + 0x00C) +#define OMAP343X_CONTROL_WKUP_DEBOBS2 (OMAP343X_CONTROL_GENERAL_WKUP + 0x010) +#define OMAP343X_CONTROL_WKUP_DEBOBS3 (OMAP343X_CONTROL_GENERAL_WKUP + 0x014) +#define OMAP343X_CONTROL_WKUP_DEBOBS4 (OMAP343X_CONTROL_GENERAL_WKUP + 0x018) + +/* 34xx D2D idle-related pins, handled by PM core */ +#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 +#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 + +/* + * REVISIT: This list of registers is not comprehensive - there are more + * that should be added. + */ + +/* + * Control module register bit defines - these should eventually go into + * their own regbits file. Some of these will be complicated, depending + * on the device type (general-purpose, emulator, test, secure, bad, other) + * and the security mode (secure, non-secure, don't care) + */ +/* CONTROL_DEVCONF0 bits */ +#define OMAP2_MMCSDIO1ADPCLKISEL (1 << 24) /* MMC1 loop back clock */ +#define OMAP24XX_USBSTANDBYCTRL (1 << 15) +#define OMAP2_MCBSP2_CLKS_MASK (1 << 6) +#define OMAP2_MCBSP1_FSR_MASK (1 << 4) +#define OMAP2_MCBSP1_CLKR_MASK (1 << 3) +#define OMAP2_MCBSP1_CLKS_MASK (1 << 2) + +/* CONTROL_DEVCONF1 bits */ +#define OMAP243X_MMC1_ACTIVE_OVERWRITE (1 << 31) +#define OMAP2_MMCSDIO2ADPCLKISEL (1 << 6) /* MMC2 loop back clock */ +#define OMAP2_MCBSP5_CLKS_MASK (1 << 4) /* > 242x */ +#define OMAP2_MCBSP4_CLKS_MASK (1 << 2) /* > 242x */ +#define OMAP2_MCBSP3_CLKS_MASK (1 << 0) /* > 242x */ + +/* CONTROL_STATUS bits */ +#define OMAP2_DEVICETYPE_MASK (0x7 << 8) +#define OMAP2_SYSBOOT_5_MASK (1 << 5) +#define OMAP2_SYSBOOT_4_MASK (1 << 4) +#define OMAP2_SYSBOOT_3_MASK (1 << 3) +#define OMAP2_SYSBOOT_2_MASK (1 << 2) +#define OMAP2_SYSBOOT_1_MASK (1 << 1) +#define OMAP2_SYSBOOT_0_MASK (1 << 0) + +/* CONTROL_PBIAS_LITE bits */ +#define OMAP343X_PBIASLITESUPPLY_HIGH1 (1 << 15) +#define OMAP343X_PBIASLITEVMODEERROR1 (1 << 11) +#define OMAP343X_PBIASSPEEDCTRL1 (1 << 10) +#define OMAP343X_PBIASLITEPWRDNZ1 (1 << 9) +#define OMAP343X_PBIASLITEVMODE1 (1 << 8) +#define OMAP343X_PBIASLITESUPPLY_HIGH0 (1 << 7) +#define OMAP343X_PBIASLITEVMODEERROR0 (1 << 3) +#define OMAP2_PBIASSPEEDCTRL0 (1 << 2) +#define OMAP2_PBIASLITEPWRDNZ0 (1 << 1) +#define OMAP2_PBIASLITEVMODE0 (1 << 0) + +/* CONTROL_PROG_IO1 bits */ +#define OMAP3630_PRG_SDMMC1_SPEEDCTRL (1 << 20) + +/* CONTROL_IVA2_BOOTMOD bits */ +#define OMAP3_IVA2_BOOTMOD_SHIFT 0 +#define OMAP3_IVA2_BOOTMOD_MASK (0xf << 0) +#define OMAP3_IVA2_BOOTMOD_IDLE (0x1 << 0) + +/* CONTROL_PADCONF_X bits */ +#define OMAP3_PADCONF_WAKEUPEVENT0 (1 << 15) +#define OMAP3_PADCONF_WAKEUPENABLE0 (1 << 14) + +#define OMAP343X_SCRATCHPAD_ROM (OMAP343X_CTRL_BASE + 0x860) +#define OMAP343X_SCRATCHPAD (OMAP343X_CTRL_BASE + 0x910) +#define OMAP343X_SCRATCHPAD_ROM_OFFSET 0x19C + +/* AM35XX_CONTROL_IPSS_CLK_CTRL bits */ +#define AM35XX_USBOTG_VBUSP_CLK_SHIFT 0 +#define AM35XX_CPGMAC_VBUSP_CLK_SHIFT 1 +#define AM35XX_VPFE_VBUSP_CLK_SHIFT 2 +#define AM35XX_HECC_VBUSP_CLK_SHIFT 3 +#define AM35XX_USBOTG_FCLK_SHIFT 8 +#define AM35XX_CPGMAC_FCLK_SHIFT 9 +#define AM35XX_VPFE_FCLK_SHIFT 10 + +/*AM35XX CONTROL_LVL_INTR_CLEAR bits*/ +#define AM35XX_CPGMAC_C0_MISC_PULSE_CLR BIT(0) +#define AM35XX_CPGMAC_C0_RX_PULSE_CLR BIT(1) +#define AM35XX_CPGMAC_C0_RX_THRESH_CLR BIT(2) +#define AM35XX_CPGMAC_C0_TX_PULSE_CLR BIT(3) +#define AM35XX_USBOTGSS_INT_CLR BIT(4) +#define AM35XX_VPFE_CCDC_VD0_INT_CLR BIT(5) +#define AM35XX_VPFE_CCDC_VD1_INT_CLR BIT(6) +#define AM35XX_VPFE_CCDC_VD2_INT_CLR BIT(7) + +/*AM35XX CONTROL_IP_SW_RESET bits*/ +#define AM35XX_USBOTGSS_SW_RST BIT(0) +#define AM35XX_CPGMACSS_SW_RST BIT(1) +#define AM35XX_VPFE_VBUSP_SW_RST BIT(2) +#define AM35XX_HECC_SW_RST BIT(3) +#define AM35XX_VPFE_PCLK_SW_RST BIT(4) + +/* + * CONTROL OMAP STATUS register to identify OMAP3 features + */ +#define OMAP3_CONTROL_OMAP_STATUS 0x044c + +#define OMAP3_SGX_SHIFT 13 +#define OMAP3_SGX_MASK (3 << OMAP3_SGX_SHIFT) +#define FEAT_SGX_FULL 0 +#define FEAT_SGX_HALF 1 +#define FEAT_SGX_NONE 2 + +#define OMAP3_IVA_SHIFT 12 +#define OMAP3_IVA_MASK (1 << OMAP3_SGX_SHIFT) +#define FEAT_IVA 0 +#define FEAT_IVA_NONE 1 + +#define OMAP3_L2CACHE_SHIFT 10 +#define OMAP3_L2CACHE_MASK (3 << OMAP3_L2CACHE_SHIFT) +#define FEAT_L2CACHE_NONE 0 +#define FEAT_L2CACHE_64KB 1 +#define FEAT_L2CACHE_128KB 2 +#define FEAT_L2CACHE_256KB 3 + +#define OMAP3_ISP_SHIFT 5 +#define OMAP3_ISP_MASK (1 << OMAP3_ISP_SHIFT) +#define FEAT_ISP 0 +#define FEAT_ISP_NONE 1 + +#define OMAP3_NEON_SHIFT 4 +#define OMAP3_NEON_MASK (1 << OMAP3_NEON_SHIFT) +#define FEAT_NEON 0 +#define FEAT_NEON_NONE 1 + + +#ifndef __ASSEMBLY__ +#ifdef CONFIG_ARCH_OMAP2PLUS +extern void __iomem *omap_ctrl_base_get(void); +extern u8 omap_ctrl_readb(u16 offset); +extern u16 omap_ctrl_readw(u16 offset); +extern u32 omap_ctrl_readl(u16 offset); +extern u32 omap4_ctrl_pad_readl(u16 offset); +extern void omap_ctrl_writeb(u8 val, u16 offset); +extern void omap_ctrl_writew(u16 val, u16 offset); +extern void omap_ctrl_writel(u32 val, u16 offset); +extern void omap4_ctrl_pad_writel(u32 val, u16 offset); + +extern void omap3_save_scratchpad_contents(void); +extern void omap3_clear_scratchpad_contents(void); +extern u32 *get_restore_pointer(void); +extern u32 *get_es3_restore_pointer(void); +extern u32 omap3_arm_context[128]; +extern void omap3_control_save_context(void); +extern void omap3_control_restore_context(void); + +#else +#define omap_ctrl_base_get() 0 +#define omap_ctrl_readb(x) 0 +#define omap_ctrl_readw(x) 0 +#define omap_ctrl_readl(x) 0 +#define omap4_ctrl_pad_readl(x) 0 +#define omap_ctrl_writeb(x, y) WARN_ON(1) +#define omap_ctrl_writew(x, y) WARN_ON(1) +#define omap_ctrl_writel(x, y) WARN_ON(1) +#define omap4_ctrl_pad_writel(x, y) WARN_ON(1) +#endif +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_ARM_MACH_OMAP2_CONTROL_H */ + diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 703b5ec88e98..0d50b45d041c 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -29,10 +29,10 @@ #include #include #include -#include #include #include "pm.h" +#include "control.h" #ifdef CONFIG_CPU_IDLE diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 818452ac905d..eaf37994403b 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -9,7 +9,6 @@ * (at your option) any later version. */ -#include #include #include #include @@ -23,7 +22,6 @@ #include #include -#include #include #include #include @@ -33,6 +31,7 @@ #include #include "mux.h" +#include "control.h" #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index ab78a5a8d9b0..34272e4863fd 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -14,11 +14,11 @@ #include #include #include -#include #include #include #include "hsmmc.h" +#include "control.h" #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 04a2fa240bc3..5f9086c65e48 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -22,11 +22,12 @@ #include #include -#include #include #include +#include "control.h" + static struct omap_chip_id omap_chip; static unsigned int omap_revision; diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 51abcedfde83..eba9fa14a9de 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -22,7 +22,9 @@ #include #include #include -#include + +#include "control.h" + /* McBSP internal signal muxing functions */ diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index e33740c091be..074536ae401f 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -23,12 +23,11 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * */ -#include +#include #include #include -#include -#include #include +#include #include #include #include @@ -36,8 +35,7 @@ #include -#include - +#include "control.h" #include "mux.h" #define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */ diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index f5c7ef955942..a40457d81927 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -38,7 +38,6 @@ #include #include #include -#include #include #include @@ -48,6 +47,7 @@ #include "cm-regbits-24xx.h" #include "sdrc.h" #include "pm.h" +#include "control.h" #include #include diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index e57c9aeeefe0..8c8f1acd3526 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -32,7 +32,6 @@ #include #include #include -#include #include #include #include @@ -48,6 +47,7 @@ #include "prm.h" #include "pm.h" #include "sdrc.h" +#include "control.h" /* Scratchpad offsets */ #define OMAP343X_TABLE_ADDRESS_OFFSET 0x31 diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index a48a1e24f42b..a51846e3a6fa 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -26,7 +26,6 @@ #include #include #include -#include #include "clock.h" #include "clock2xxx.h" @@ -34,6 +33,7 @@ #include "prm.h" #include "prm-regbits-24xx.h" #include "prm-regbits-44xx.h" +#include "control.h" static void __iomem *prm_base; static void __iomem *cm_base; diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 0bcc9df0c034..338e46a844a4 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -35,7 +35,6 @@ #include #include #include -#include #include #include #include @@ -44,6 +43,7 @@ #include "pm.h" #include "cm.h" #include "prm-regbits-34xx.h" +#include "control.h" #define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52 #define UART_OMAP_WER 0x17 /* Wake-up enable register */ diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index ba53191ae4c5..2fb205a7f285 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -27,11 +27,11 @@ #include #include #include -#include #include "cm.h" #include "prm.h" #include "sdrc.h" +#include "control.h" #define SDRC_SCRATCHPAD_SEM_V 0xfa00291c diff --git a/arch/arm/mach-omap2/usb-fs.c b/arch/arm/mach-omap2/usb-fs.c index a216d88b04b5..1481078763b8 100644 --- a/arch/arm/mach-omap2/usb-fs.c +++ b/arch/arm/mach-omap2/usb-fs.c @@ -29,18 +29,18 @@ #include -#include #include #include +#include "control.h" +#include "mux.h" + #define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN #define INT_USB_IRQ_NISO INT_24XX_USB_IRQ_NISO #define INT_USB_IRQ_ISO INT_24XX_USB_IRQ_ISO #define INT_USB_IRQ_HGEN INT_24XX_USB_IRQ_HGEN #define INT_USB_IRQ_OTG INT_24XX_USB_IRQ_OTG -#include "mux.h" - #if defined(CONFIG_ARCH_OMAP2) #ifdef CONFIG_USB_GADGET_OMAP diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h deleted file mode 100644 index 54b0c3529c83..000000000000 --- a/arch/arm/plat-omap/include/plat/control.h +++ /dev/null @@ -1,368 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/control.h - * - * OMAP2/3/4 System Control Module definitions - * - * Copyright (C) 2007-2009 Texas Instruments, Inc. - * Copyright (C) 2007-2008 Nokia Corporation - * - * Written by Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_CONTROL_H -#define __ASM_ARCH_CONTROL_H - -#include -#include -#include -#include -#include - -#ifndef __ASSEMBLY__ -#define OMAP242X_CTRL_REGADDR(reg) \ - OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) -#define OMAP243X_CTRL_REGADDR(reg) \ - OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) -#define OMAP343X_CTRL_REGADDR(reg) \ - OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) -#else -#define OMAP242X_CTRL_REGADDR(reg) \ - OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) -#define OMAP243X_CTRL_REGADDR(reg) \ - OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) -#define OMAP343X_CTRL_REGADDR(reg) \ - OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) -#endif /* __ASSEMBLY__ */ - -/* - * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for - * OMAP24XX and OMAP34XX. - */ - -/* Control submodule offsets */ - -#define OMAP2_CONTROL_INTERFACE 0x000 -#define OMAP2_CONTROL_PADCONFS 0x030 -#define OMAP2_CONTROL_GENERAL 0x270 -#define OMAP343X_CONTROL_MEM_WKUP 0x600 -#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00 -#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60 - -/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */ - -#define OMAP2_CONTROL_SYSCONFIG (OMAP2_CONTROL_INTERFACE + 0x10) - -/* CONTROL_GENERAL register offsets common to OMAP2 & 3 */ -#define OMAP2_CONTROL_DEVCONF0 (OMAP2_CONTROL_GENERAL + 0x0004) -#define OMAP2_CONTROL_MSUSPENDMUX_0 (OMAP2_CONTROL_GENERAL + 0x0020) -#define OMAP2_CONTROL_MSUSPENDMUX_1 (OMAP2_CONTROL_GENERAL + 0x0024) -#define OMAP2_CONTROL_MSUSPENDMUX_2 (OMAP2_CONTROL_GENERAL + 0x0028) -#define OMAP2_CONTROL_MSUSPENDMUX_3 (OMAP2_CONTROL_GENERAL + 0x002c) -#define OMAP2_CONTROL_MSUSPENDMUX_4 (OMAP2_CONTROL_GENERAL + 0x0030) -#define OMAP2_CONTROL_MSUSPENDMUX_5 (OMAP2_CONTROL_GENERAL + 0x0034) -#define OMAP2_CONTROL_SEC_CTRL (OMAP2_CONTROL_GENERAL + 0x0040) -#define OMAP2_CONTROL_RPUB_KEY_H_0 (OMAP2_CONTROL_GENERAL + 0x0090) -#define OMAP2_CONTROL_RPUB_KEY_H_1 (OMAP2_CONTROL_GENERAL + 0x0094) -#define OMAP2_CONTROL_RPUB_KEY_H_2 (OMAP2_CONTROL_GENERAL + 0x0098) -#define OMAP2_CONTROL_RPUB_KEY_H_3 (OMAP2_CONTROL_GENERAL + 0x009c) - -/* 242x-only CONTROL_GENERAL register offsets */ -#define OMAP242X_CONTROL_DEVCONF OMAP2_CONTROL_DEVCONF0 /* match TRM */ -#define OMAP242X_CONTROL_OCM_RAM_PERM (OMAP2_CONTROL_GENERAL + 0x0068) - -/* 243x-only CONTROL_GENERAL register offsets */ -/* CONTROL_IVA2_BOOT{ADDR,MOD} are at the same place on 343x - noted below */ -#define OMAP243X_CONTROL_DEVCONF1 (OMAP2_CONTROL_GENERAL + 0x0078) -#define OMAP243X_CONTROL_CSIRXFE (OMAP2_CONTROL_GENERAL + 0x007c) -#define OMAP243X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) -#define OMAP243X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) -#define OMAP243X_CONTROL_IVA2_GEMCFG (OMAP2_CONTROL_GENERAL + 0x0198) -#define OMAP243X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x0230) - -/* 24xx-only CONTROL_GENERAL register offsets */ -#define OMAP24XX_CONTROL_DEBOBS (OMAP2_CONTROL_GENERAL + 0x0000) -#define OMAP24XX_CONTROL_EMU_SUPPORT (OMAP2_CONTROL_GENERAL + 0x0008) -#define OMAP24XX_CONTROL_SEC_TEST (OMAP2_CONTROL_GENERAL + 0x0044) -#define OMAP24XX_CONTROL_PSA_CTRL (OMAP2_CONTROL_GENERAL + 0x0048) -#define OMAP24XX_CONTROL_PSA_CMD (OMAP2_CONTROL_GENERAL + 0x004c) -#define OMAP24XX_CONTROL_PSA_VALUE (OMAP2_CONTROL_GENERAL + 0x0050) -#define OMAP24XX_CONTROL_SEC_EMU (OMAP2_CONTROL_GENERAL + 0x0060) -#define OMAP24XX_CONTROL_SEC_TAP (OMAP2_CONTROL_GENERAL + 0x0064) -#define OMAP24XX_CONTROL_OCM_PUB_RAM_ADD (OMAP2_CONTROL_GENERAL + 0x006c) -#define OMAP24XX_CONTROL_EXT_SEC_RAM_START_ADD (OMAP2_CONTROL_GENERAL + 0x0070) -#define OMAP24XX_CONTROL_EXT_SEC_RAM_STOP_ADD (OMAP2_CONTROL_GENERAL + 0x0074) -#define OMAP24XX_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0080) -#define OMAP24XX_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0084) -#define OMAP24XX_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0088) -#define OMAP24XX_CONTROL_GENERAL_PURPOSE_STATUS (OMAP2_CONTROL_GENERAL + 0x008c) -#define OMAP24XX_CONTROL_RAND_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00a0) -#define OMAP24XX_CONTROL_RAND_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00a4) -#define OMAP24XX_CONTROL_RAND_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00a8) -#define OMAP24XX_CONTROL_RAND_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00ac) -#define OMAP24XX_CONTROL_CUST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00b0) -#define OMAP24XX_CONTROL_CUST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00b4) -#define OMAP24XX_CONTROL_TEST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00c0) -#define OMAP24XX_CONTROL_TEST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00c4) -#define OMAP24XX_CONTROL_TEST_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00c8) -#define OMAP24XX_CONTROL_TEST_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00cc) -#define OMAP24XX_CONTROL_TEST_KEY_4 (OMAP2_CONTROL_GENERAL + 0x00d0) -#define OMAP24XX_CONTROL_TEST_KEY_5 (OMAP2_CONTROL_GENERAL + 0x00d4) -#define OMAP24XX_CONTROL_TEST_KEY_6 (OMAP2_CONTROL_GENERAL + 0x00d8) -#define OMAP24XX_CONTROL_TEST_KEY_7 (OMAP2_CONTROL_GENERAL + 0x00dc) -#define OMAP24XX_CONTROL_TEST_KEY_8 (OMAP2_CONTROL_GENERAL + 0x00e0) -#define OMAP24XX_CONTROL_TEST_KEY_9 (OMAP2_CONTROL_GENERAL + 0x00e4) - -#define OMAP343X_CONTROL_PADCONF_SYSNIRQ (OMAP2_CONTROL_INTERFACE + 0x01b0) - -/* 34xx-only CONTROL_GENERAL register offsets */ -#define OMAP343X_CONTROL_PADCONF_OFF (OMAP2_CONTROL_GENERAL + 0x0000) -#define OMAP343X_CONTROL_MEM_DFTRW0 (OMAP2_CONTROL_GENERAL + 0x0008) -#define OMAP343X_CONTROL_MEM_DFTRW1 (OMAP2_CONTROL_GENERAL + 0x000c) -#define OMAP343X_CONTROL_DEVCONF1 (OMAP2_CONTROL_GENERAL + 0x0068) -#define OMAP343X_CONTROL_CSIRXFE (OMAP2_CONTROL_GENERAL + 0x006c) -#define OMAP343X_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0070) -#define OMAP343X_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0074) -#define OMAP343X_CONTROL_SEC_ERR_STATUS_DEBUG (OMAP2_CONTROL_GENERAL + 0x0078) -#define OMAP343X_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0080) -#define OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS (OMAP2_CONTROL_GENERAL + 0x0084) -#define OMAP343X_CONTROL_RPUB_KEY_H_4 (OMAP2_CONTROL_GENERAL + 0x00a0) -#define OMAP343X_CONTROL_RAND_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00a8) -#define OMAP343X_CONTROL_RAND_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00ac) -#define OMAP343X_CONTROL_RAND_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00b0) -#define OMAP343X_CONTROL_RAND_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00b4) -#define OMAP343X_CONTROL_TEST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00c8) -#define OMAP343X_CONTROL_TEST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00cc) -#define OMAP343X_CONTROL_TEST_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00d0) -#define OMAP343X_CONTROL_TEST_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00d4) -#define OMAP343X_CONTROL_TEST_KEY_4 (OMAP2_CONTROL_GENERAL + 0x00d8) -#define OMAP343X_CONTROL_TEST_KEY_5 (OMAP2_CONTROL_GENERAL + 0x00dc) -#define OMAP343X_CONTROL_TEST_KEY_6 (OMAP2_CONTROL_GENERAL + 0x00e0) -#define OMAP343X_CONTROL_TEST_KEY_7 (OMAP2_CONTROL_GENERAL + 0x00e4) -#define OMAP343X_CONTROL_TEST_KEY_8 (OMAP2_CONTROL_GENERAL + 0x00e8) -#define OMAP343X_CONTROL_TEST_KEY_9 (OMAP2_CONTROL_GENERAL + 0x00ec) -#define OMAP343X_CONTROL_TEST_KEY_10 (OMAP2_CONTROL_GENERAL + 0x00f0) -#define OMAP343X_CONTROL_TEST_KEY_11 (OMAP2_CONTROL_GENERAL + 0x00f4) -#define OMAP343X_CONTROL_TEST_KEY_12 (OMAP2_CONTROL_GENERAL + 0x00f8) -#define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) -#define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) -#define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) -#define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \ - + ((i) >> 1) * 4 + (!((i) & 1)) * 2) -#define OMAP343X_CONTROL_PROG_IO0 (OMAP2_CONTROL_GENERAL + 0x01D4) -#define OMAP343X_CONTROL_PROG_IO1 (OMAP2_CONTROL_GENERAL + 0x01D8) -#define OMAP343X_CONTROL_DSS_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E0) -#define OMAP343X_CONTROL_CORE_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E4) -#define OMAP343X_CONTROL_PER_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E8) -#define OMAP343X_CONTROL_USBHOST_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01EC) -#define OMAP343X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x02B0) -#define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02B4) -#define OMAP343X_CONTROL_SRAMLDO4 (OMAP2_CONTROL_GENERAL + 0x02B8) -#define OMAP343X_CONTROL_SRAMLDO5 (OMAP2_CONTROL_GENERAL + 0x02C0) -#define OMAP343X_CONTROL_CSI (OMAP2_CONTROL_GENERAL + 0x02C4) - -/* AM35XX only CONTROL_GENERAL register offsets */ -#define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038) -#define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310) -#define AM35XX_CONTROL_DEVCONF3 (OMAP2_CONTROL_GENERAL + 0x0314) -#define AM35XX_CONTROL_CBA_PRIORITY (OMAP2_CONTROL_GENERAL + 0x0320) -#define AM35XX_CONTROL_LVL_INTR_CLEAR (OMAP2_CONTROL_GENERAL + 0x0324) -#define AM35XX_CONTROL_IP_SW_RESET (OMAP2_CONTROL_GENERAL + 0x0328) -#define AM35XX_CONTROL_IPSS_CLK_CTRL (OMAP2_CONTROL_GENERAL + 0x032C) - -/* 34xx PADCONF register offsets */ -#define OMAP343X_PADCONF_ETK(i) (OMAP2_CONTROL_PADCONFS + 0x5a8 + \ - (i)*2) -#define OMAP343X_PADCONF_ETK_CLK OMAP343X_PADCONF_ETK(0) -#define OMAP343X_PADCONF_ETK_CTL OMAP343X_PADCONF_ETK(1) -#define OMAP343X_PADCONF_ETK_D0 OMAP343X_PADCONF_ETK(2) -#define OMAP343X_PADCONF_ETK_D1 OMAP343X_PADCONF_ETK(3) -#define OMAP343X_PADCONF_ETK_D2 OMAP343X_PADCONF_ETK(4) -#define OMAP343X_PADCONF_ETK_D3 OMAP343X_PADCONF_ETK(5) -#define OMAP343X_PADCONF_ETK_D4 OMAP343X_PADCONF_ETK(6) -#define OMAP343X_PADCONF_ETK_D5 OMAP343X_PADCONF_ETK(7) -#define OMAP343X_PADCONF_ETK_D6 OMAP343X_PADCONF_ETK(8) -#define OMAP343X_PADCONF_ETK_D7 OMAP343X_PADCONF_ETK(9) -#define OMAP343X_PADCONF_ETK_D8 OMAP343X_PADCONF_ETK(10) -#define OMAP343X_PADCONF_ETK_D9 OMAP343X_PADCONF_ETK(11) -#define OMAP343X_PADCONF_ETK_D10 OMAP343X_PADCONF_ETK(12) -#define OMAP343X_PADCONF_ETK_D11 OMAP343X_PADCONF_ETK(13) -#define OMAP343X_PADCONF_ETK_D12 OMAP343X_PADCONF_ETK(14) -#define OMAP343X_PADCONF_ETK_D13 OMAP343X_PADCONF_ETK(15) -#define OMAP343X_PADCONF_ETK_D14 OMAP343X_PADCONF_ETK(16) -#define OMAP343X_PADCONF_ETK_D15 OMAP343X_PADCONF_ETK(17) - -/* 34xx GENERAL_WKUP regist offsets */ -#define OMAP343X_CONTROL_WKUP_DEBOBSMUX(i) (OMAP343X_CONTROL_GENERAL_WKUP + \ - 0x008 + (i)) -#define OMAP343X_CONTROL_WKUP_DEBOBS0 (OMAP343X_CONTROL_GENERAL_WKUP + 0x008) -#define OMAP343X_CONTROL_WKUP_DEBOBS1 (OMAP343X_CONTROL_GENERAL_WKUP + 0x00C) -#define OMAP343X_CONTROL_WKUP_DEBOBS2 (OMAP343X_CONTROL_GENERAL_WKUP + 0x010) -#define OMAP343X_CONTROL_WKUP_DEBOBS3 (OMAP343X_CONTROL_GENERAL_WKUP + 0x014) -#define OMAP343X_CONTROL_WKUP_DEBOBS4 (OMAP343X_CONTROL_GENERAL_WKUP + 0x018) - -/* 34xx D2D idle-related pins, handled by PM core */ -#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 -#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 - -/* - * REVISIT: This list of registers is not comprehensive - there are more - * that should be added. - */ - -/* - * Control module register bit defines - these should eventually go into - * their own regbits file. Some of these will be complicated, depending - * on the device type (general-purpose, emulator, test, secure, bad, other) - * and the security mode (secure, non-secure, don't care) - */ -/* CONTROL_DEVCONF0 bits */ -#define OMAP2_MMCSDIO1ADPCLKISEL (1 << 24) /* MMC1 loop back clock */ -#define OMAP24XX_USBSTANDBYCTRL (1 << 15) -#define OMAP2_MCBSP2_CLKS_MASK (1 << 6) -#define OMAP2_MCBSP1_FSR_MASK (1 << 4) -#define OMAP2_MCBSP1_CLKR_MASK (1 << 3) -#define OMAP2_MCBSP1_CLKS_MASK (1 << 2) - -/* CONTROL_DEVCONF1 bits */ -#define OMAP243X_MMC1_ACTIVE_OVERWRITE (1 << 31) -#define OMAP2_MMCSDIO2ADPCLKISEL (1 << 6) /* MMC2 loop back clock */ -#define OMAP2_MCBSP5_CLKS_MASK (1 << 4) /* > 242x */ -#define OMAP2_MCBSP4_CLKS_MASK (1 << 2) /* > 242x */ -#define OMAP2_MCBSP3_CLKS_MASK (1 << 0) /* > 242x */ - -/* CONTROL_STATUS bits */ -#define OMAP2_DEVICETYPE_MASK (0x7 << 8) -#define OMAP2_SYSBOOT_5_MASK (1 << 5) -#define OMAP2_SYSBOOT_4_MASK (1 << 4) -#define OMAP2_SYSBOOT_3_MASK (1 << 3) -#define OMAP2_SYSBOOT_2_MASK (1 << 2) -#define OMAP2_SYSBOOT_1_MASK (1 << 1) -#define OMAP2_SYSBOOT_0_MASK (1 << 0) - -/* CONTROL_PBIAS_LITE bits */ -#define OMAP343X_PBIASLITESUPPLY_HIGH1 (1 << 15) -#define OMAP343X_PBIASLITEVMODEERROR1 (1 << 11) -#define OMAP343X_PBIASSPEEDCTRL1 (1 << 10) -#define OMAP343X_PBIASLITEPWRDNZ1 (1 << 9) -#define OMAP343X_PBIASLITEVMODE1 (1 << 8) -#define OMAP343X_PBIASLITESUPPLY_HIGH0 (1 << 7) -#define OMAP343X_PBIASLITEVMODEERROR0 (1 << 3) -#define OMAP2_PBIASSPEEDCTRL0 (1 << 2) -#define OMAP2_PBIASLITEPWRDNZ0 (1 << 1) -#define OMAP2_PBIASLITEVMODE0 (1 << 0) - -/* CONTROL_PROG_IO1 bits */ -#define OMAP3630_PRG_SDMMC1_SPEEDCTRL (1 << 20) - -/* CONTROL_IVA2_BOOTMOD bits */ -#define OMAP3_IVA2_BOOTMOD_SHIFT 0 -#define OMAP3_IVA2_BOOTMOD_MASK (0xf << 0) -#define OMAP3_IVA2_BOOTMOD_IDLE (0x1 << 0) - -/* CONTROL_PADCONF_X bits */ -#define OMAP3_PADCONF_WAKEUPEVENT0 (1 << 15) -#define OMAP3_PADCONF_WAKEUPENABLE0 (1 << 14) - -#define OMAP343X_SCRATCHPAD_ROM (OMAP343X_CTRL_BASE + 0x860) -#define OMAP343X_SCRATCHPAD (OMAP343X_CTRL_BASE + 0x910) -#define OMAP343X_SCRATCHPAD_ROM_OFFSET 0x19C - -/* AM35XX_CONTROL_IPSS_CLK_CTRL bits */ -#define AM35XX_USBOTG_VBUSP_CLK_SHIFT 0 -#define AM35XX_CPGMAC_VBUSP_CLK_SHIFT 1 -#define AM35XX_VPFE_VBUSP_CLK_SHIFT 2 -#define AM35XX_HECC_VBUSP_CLK_SHIFT 3 -#define AM35XX_USBOTG_FCLK_SHIFT 8 -#define AM35XX_CPGMAC_FCLK_SHIFT 9 -#define AM35XX_VPFE_FCLK_SHIFT 10 - -/*AM35XX CONTROL_LVL_INTR_CLEAR bits*/ -#define AM35XX_CPGMAC_C0_MISC_PULSE_CLR BIT(0) -#define AM35XX_CPGMAC_C0_RX_PULSE_CLR BIT(1) -#define AM35XX_CPGMAC_C0_RX_THRESH_CLR BIT(2) -#define AM35XX_CPGMAC_C0_TX_PULSE_CLR BIT(3) -#define AM35XX_USBOTGSS_INT_CLR BIT(4) -#define AM35XX_VPFE_CCDC_VD0_INT_CLR BIT(5) -#define AM35XX_VPFE_CCDC_VD1_INT_CLR BIT(6) -#define AM35XX_VPFE_CCDC_VD2_INT_CLR BIT(7) - -/*AM35XX CONTROL_IP_SW_RESET bits*/ -#define AM35XX_USBOTGSS_SW_RST BIT(0) -#define AM35XX_CPGMACSS_SW_RST BIT(1) -#define AM35XX_VPFE_VBUSP_SW_RST BIT(2) -#define AM35XX_HECC_SW_RST BIT(3) -#define AM35XX_VPFE_PCLK_SW_RST BIT(4) - -/* - * CONTROL OMAP STATUS register to identify OMAP3 features - */ -#define OMAP3_CONTROL_OMAP_STATUS 0x044c - -#define OMAP3_SGX_SHIFT 13 -#define OMAP3_SGX_MASK (3 << OMAP3_SGX_SHIFT) -#define FEAT_SGX_FULL 0 -#define FEAT_SGX_HALF 1 -#define FEAT_SGX_NONE 2 - -#define OMAP3_IVA_SHIFT 12 -#define OMAP3_IVA_MASK (1 << OMAP3_SGX_SHIFT) -#define FEAT_IVA 0 -#define FEAT_IVA_NONE 1 - -#define OMAP3_L2CACHE_SHIFT 10 -#define OMAP3_L2CACHE_MASK (3 << OMAP3_L2CACHE_SHIFT) -#define FEAT_L2CACHE_NONE 0 -#define FEAT_L2CACHE_64KB 1 -#define FEAT_L2CACHE_128KB 2 -#define FEAT_L2CACHE_256KB 3 - -#define OMAP3_ISP_SHIFT 5 -#define OMAP3_ISP_MASK (1<< OMAP3_ISP_SHIFT) -#define FEAT_ISP 0 -#define FEAT_ISP_NONE 1 - -#define OMAP3_NEON_SHIFT 4 -#define OMAP3_NEON_MASK (1<< OMAP3_NEON_SHIFT) -#define FEAT_NEON 0 -#define FEAT_NEON_NONE 1 - - -#ifndef __ASSEMBLY__ -#ifdef CONFIG_ARCH_OMAP2PLUS -extern void __iomem *omap_ctrl_base_get(void); -extern u8 omap_ctrl_readb(u16 offset); -extern u16 omap_ctrl_readw(u16 offset); -extern u32 omap_ctrl_readl(u16 offset); -extern u32 omap4_ctrl_pad_readl(u16 offset); -extern void omap_ctrl_writeb(u8 val, u16 offset); -extern void omap_ctrl_writew(u16 val, u16 offset); -extern void omap_ctrl_writel(u32 val, u16 offset); -extern void omap4_ctrl_pad_writel(u32 val, u16 offset); - -extern void omap3_save_scratchpad_contents(void); -extern void omap3_clear_scratchpad_contents(void); -extern u32 *get_restore_pointer(void); -extern u32 *get_es3_restore_pointer(void); -extern u32 omap3_arm_context[128]; -extern void omap3_control_save_context(void); -extern void omap3_control_restore_context(void); - -#else -#define omap_ctrl_base_get() 0 -#define omap_ctrl_readb(x) 0 -#define omap_ctrl_readw(x) 0 -#define omap_ctrl_readl(x) 0 -#define omap4_ctrl_pad_readl(x) 0 -#define omap_ctrl_writeb(x, y) WARN_ON(1) -#define omap_ctrl_writew(x, y) WARN_ON(1) -#define omap_ctrl_writel(x, y) WARN_ON(1) -#define omap4_ctrl_pad_writel(x, y) WARN_ON(1) -#endif -#endif /* __ASSEMBLY__ */ - -#endif /* __ASM_ARCH_CONTROL_H */ - diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h index 0d6f076cf748..c8dae02f0704 100644 --- a/arch/arm/plat-omap/include/plat/omap-serial.h +++ b/arch/arm/plat-omap/include/plat/omap-serial.h @@ -20,7 +20,6 @@ #include #include -#include #include #define DRIVER_NAME "omap-hsuart" diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 09f8c2871334..45d99e955f7f 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -27,7 +27,6 @@ #include #include -#include #include "../mach-omap2/cm-regbits-34xx.h" diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c index f81e4f025f23..7f472a57490e 100644 --- a/drivers/usb/gadget/omap_udc.c +++ b/drivers/usb/gadget/omap_udc.c @@ -54,7 +54,6 @@ #include #include -#include #include "omap_udc.h" @@ -2309,21 +2308,12 @@ static char *trx_mode(unsigned m, int enabled) static int proc_otg_show(struct seq_file *s) { u32 tmp; - u32 trans; - char *ctrl_name; + u32 trans = 0; + char *ctrl_name = "(UNKNOWN)"; + /* XXX This needs major revision for OMAP2+ */ tmp = omap_readl(OTG_REV); - if (cpu_is_omap24xx()) { - /* - * REVISIT: Not clear how this works on OMAP2. trans - * is ANDed to produce bits 7 and 8, which might make - * sense for USB_TRANSCEIVER_CTRL on OMAP1, - * but with CONTROL_DEVCONF, these bits have something to - * do with the frame adjustment counter and McBSP2. - */ - ctrl_name = "control_devconf"; - trans = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); - } else { + if (cpu_class_is_omap1()) { ctrl_name = "tranceiver_ctrl"; trans = omap_readw(USB_TRANSCEIVER_CTRL); } -- cgit v1.2.3