From 9230372aeecc0a634f708e9eb8668769daa1ed5a Mon Sep 17 00:00:00 2001 From: Alexander Shishkin Date: Fri, 8 Jan 2010 10:29:06 -0800 Subject: omap2/3: make serial_in_override() address the right uart port Commit f62349ee9788b1d94c55eb6c291d74a1f69bdd9e makes it possible to have some other than first uart port as ttyS0, which breaks the workaround serial_in_override() function which will try to address the first uart port (for ttyS0) and not the one that was initialized. Signed-off-by: Alexander Shishkin CC: Mika Westerberg Acked-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/serial.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 19805a7de06c..8c964bec8159 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -125,6 +125,13 @@ static struct plat_serial8250_port serial_platform_data3[] = { } }; #endif +static inline unsigned int __serial_read_reg(struct uart_port *up, + int offset) +{ + offset <<= up->regshift; + return (unsigned int)__raw_readb(up->membase + offset); +} + static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, int offset) { @@ -583,11 +590,12 @@ static unsigned int serial_in_override(struct uart_port *up, int offset) { if (UART_RX == offset) { unsigned int lsr; - lsr = serial_read_reg(omap_uart[up->line].p, UART_LSR); + lsr = __serial_read_reg(up, UART_LSR); if (!(lsr & UART_LSR_DR)) return -EPERM; } - return serial_read_reg(omap_uart[up->line].p, offset); + + return __serial_read_reg(up, offset); } void __init omap_serial_early_init(void) -- cgit v1.2.3 From 6b06ebdfbd3100ffa789d3893bc7c08b1f91ea30 Mon Sep 17 00:00:00 2001 From: Vimal Singh Date: Fri, 8 Jan 2010 10:29:07 -0800 Subject: omap2/3: ZOOM: Correcting key mapping for few keys Keys: 'right arrow', 'up arrow' and 'select' were mapped wrongly. This patch corrects them. This patch also adds one missing key present in the board, currently I added it as 'unknown' key, as I am not able to find proper description for this key. One key entry (r: 7, c: 5) is present in the keymap, which is really not present in the board, removing it. Signed-off-by: Vimal Singh Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-zoom-peripherals.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index 8dd277c36661..1e3dfb652acc 100755 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c @@ -63,21 +63,21 @@ static int board_keymap[] = { KEY(5, 1, KEY_H), KEY(5, 2, KEY_J), KEY(5, 3, KEY_F3), + KEY(5, 4, KEY_UNKNOWN), KEY(5, 5, KEY_VOLUMEDOWN), KEY(5, 6, KEY_M), - KEY(5, 7, KEY_ENTER), + KEY(5, 7, KEY_RIGHT), KEY(6, 0, KEY_Q), KEY(6, 1, KEY_A), KEY(6, 2, KEY_N), KEY(6, 3, KEY_BACKSPACE), KEY(6, 6, KEY_P), - KEY(6, 7, KEY_SELECT), + KEY(6, 7, KEY_UP), KEY(7, 0, KEY_PROG1), /*MACRO 1 */ KEY(7, 1, KEY_PROG2), /*MACRO 2 */ KEY(7, 2, KEY_PROG3), /*MACRO 3 */ KEY(7, 3, KEY_PROG4), /*MACRO 4 */ - KEY(7, 5, KEY_RIGHT), - KEY(7, 6, KEY_UP), + KEY(7, 6, KEY_SELECT), KEY(7, 7, KEY_DOWN) }; -- cgit v1.2.3 From 1b6e821f234f9e22ad1ef4919e140625af251935 Mon Sep 17 00:00:00 2001 From: Roel Kluin Date: Fri, 8 Jan 2010 10:29:07 -0800 Subject: omap3: add missing parentheses `!' has a higher precedence than `&' so parentheses are required. Signed-off-by: Roel Kluin Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pm34xx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 81ed252a0f8a..c6cc809afb79 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -124,8 +124,8 @@ static void omap3_core_save_context(void) control_padconf_off |= START_PADCONF_SAVE; omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF); /* wait for the save to complete */ - while (!omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS) - & PADCONF_SAVE_DONE) + while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS) + & PADCONF_SAVE_DONE)) ; /* Save the Interrupt controller context */ omap_intc_save_context(); -- cgit v1.2.3 From d04eb60066ed532d2e5da9f39cc0c79883d8a33c Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 8 Jan 2010 10:29:08 -0800 Subject: omap3: Fix booting if package is uninitialized Otherwise bringing up new boards can be harder: Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = c0004000 [00000000] *pgd=00000000 Internal error: Oops: 5 [#1] last sysfs file: Modules linked in: CPU: 0 Not tainted (2.6.33-rc2-00015-g0bc9c93-dirty #37) PC is at omap_mux_init+0xa4/0x3d8 LR is at omap_mux_init+0x3c/0x3d8 ... Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/mux.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index e071b3fd1878..459ef23ab8a8 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -994,8 +994,10 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size, } #ifdef CONFIG_OMAP_MUX - omap_mux_package_fixup(package_subset, superset); - omap_mux_package_init_balls(package_balls, superset); + if (package_subset) + omap_mux_package_fixup(package_subset, superset); + if (package_balls) + omap_mux_package_init_balls(package_balls, superset); omap_mux_set_cmdline_signals(); omap_mux_set_board_signals(board_mux); #endif -- cgit v1.2.3 From 342aa2c1721e2714f43d957c3dd0bdaaa688c207 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Fri, 8 Jan 2010 10:29:08 -0800 Subject: omap3: EVM: Choose OMAP_PACKAGE_CBB Without this the kernel doesn't boot, it craches in omap_mux_package_fixup(), since the package_subset becomes NULL. Signed-off-by: Vaibhav Hiremath Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 10eafa70a909..606bf04f51b6 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -80,6 +80,7 @@ config MACH_OVERO config MACH_OMAP3EVM bool "OMAP 3530 EVM board" depends on ARCH_OMAP3 && ARCH_OMAP34XX + select OMAP_PACKAGE_CBB config MACH_OMAP3517EVM bool "OMAP3517/ AM3517 EVM board" -- cgit v1.2.3 From 48bca0e9c7f428dc75ea2a9c37601e6cb47dae6f Mon Sep 17 00:00:00 2001 From: Huang Weiyi Date: Fri, 8 Jan 2010 15:23:03 -0700 Subject: OMAP2: remove duplicated #include Remove duplicated #include('s) in arch/arm/mach-omap2/clock34xx.c arch/arm/mach-omap2/io.c Signed-off-by: Huang Weiyi Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock34xx.c | 1 - arch/arm/mach-omap2/io.c | 1 - 2 files changed, 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index ded32364f32b..d4217b93e10b 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -34,7 +34,6 @@ #include #include -#include #include "clock.h" #include "clock34xx.h" #include "sdrc.h" diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index a8749e8017b9..ac9ea6007f27 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -33,7 +33,6 @@ #include #include #include -#include #include #include "clock.h" -- cgit v1.2.3 From 98bb155130aca96f26b12b50a38db806a0021e59 Mon Sep 17 00:00:00 2001 From: Abhijit Pagare Date: Fri, 8 Jan 2010 15:23:04 -0700 Subject: ARM: OMAP3: PM: Fix the Invalid CM_CLKSTCTRL reg access. In OMAP2/3 some of the clock-domains which did not have control facility were being falsely written to and read using the CM_CLKSTCTRL register though it did not exist for them. One check is added to remove this flaw. Signed-off-by: Abhijit Pagare Signed-off-by: Paul Walmsley Cc: Benoit Cousson Cc: Rajendra Nayak --- arch/arm/mach-omap2/clockdomain.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 1a45ed1e8ba1..dd285f001467 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -559,7 +559,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) * downstream clocks for debugging purposes? */ - if (!clkdm || !clk) + if (!clkdm || !clk || !clkdm->clktrctrl_mask) return -EINVAL; if (atomic_inc_return(&clkdm->usecount) > 1) @@ -610,7 +610,7 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) * downstream clocks for debugging purposes? */ - if (!clkdm || !clk) + if (!clkdm || !clk || !clkdm->clktrctrl_mask) return -EINVAL; #ifdef DEBUG -- cgit v1.2.3 From 7adb9987177f7aa269505ef65f4b4ed84bbc17b5 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 8 Jan 2010 15:23:05 -0700 Subject: OMAP2xxx IO mapping: mark DSP mappings as being 2420-only Out of the three major OMAP2 chip types, OMAP2420, OMAP2430, and OMAP3430, we only map the IVA on OMAP2420. The memory mapping is not shared between OMAP2420 and OMAP2430, so it is inappropriate to label those macros as '24XX'; this patch changes them to '2420'. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/io.c | 18 +++++++++--------- arch/arm/plat-omap/include/plat/io.h | 33 +++++++++++++-------------------- arch/arm/plat-omap/io.c | 12 ++++++------ 3 files changed, 28 insertions(+), 35 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index ac9ea6007f27..5a7996402c53 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -72,21 +72,21 @@ static struct map_desc omap24xx_io_desc[] __initdata = { #ifdef CONFIG_ARCH_OMAP2420 static struct map_desc omap242x_io_desc[] __initdata = { { - .virtual = DSP_MEM_24XX_VIRT, - .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), - .length = DSP_MEM_24XX_SIZE, + .virtual = DSP_MEM_2420_VIRT, + .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS), + .length = DSP_MEM_2420_SIZE, .type = MT_DEVICE }, { - .virtual = DSP_IPI_24XX_VIRT, - .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS), - .length = DSP_IPI_24XX_SIZE, + .virtual = DSP_IPI_2420_VIRT, + .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS), + .length = DSP_IPI_2420_SIZE, .type = MT_DEVICE }, { - .virtual = DSP_MMU_24XX_VIRT, - .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS), - .length = DSP_MMU_24XX_SIZE, + .virtual = DSP_MMU_2420_VIRT, + .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS), + .length = DSP_MMU_2420_SIZE, .type = MT_DEVICE }, }; diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h index 7e5319f907d1..7d6f45f3e9a3 100644 --- a/arch/arm/plat-omap/include/plat/io.h +++ b/arch/arm/plat-omap/include/plat/io.h @@ -122,16 +122,18 @@ #define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET) #define OMAP243X_SMS_SIZE SZ_1M -/* DSP */ -#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ -#define DSP_MEM_24XX_VIRT 0xe0000000 -#define DSP_MEM_24XX_SIZE 0x28000 -#define DSP_IPI_24XX_PHYS OMAP2420_DSP_IPI_BASE /* 0x59000000 */ -#define DSP_IPI_24XX_VIRT 0xe1000000 -#define DSP_IPI_24XX_SIZE SZ_4K -#define DSP_MMU_24XX_PHYS OMAP2420_DSP_MMU_BASE /* 0x5a000000 */ -#define DSP_MMU_24XX_VIRT 0xe2000000 -#define DSP_MMU_24XX_SIZE SZ_4K +/* 2420 IVA */ +#define DSP_MEM_2420_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ +#define DSP_MEM_2420_VIRT 0xe0000000 +#define DSP_MEM_2420_SIZE 0x28000 +#define DSP_IPI_2420_PHYS OMAP2420_DSP_IPI_BASE /* 0x59000000 */ +#define DSP_IPI_2420_VIRT 0xe1000000 +#define DSP_IPI_2420_SIZE SZ_4K +#define DSP_MMU_2420_PHYS OMAP2420_DSP_MMU_BASE /* 0x5a000000 */ +#define DSP_MMU_2420_VIRT 0xe2000000 +#define DSP_MMU_2420_SIZE SZ_4K + +/* 2430 IVA2.1 - currently unmapped */ /* * ---------------------------------------------------------------------------- @@ -182,16 +184,7 @@ #define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET) #define OMAP343X_SDRC_SIZE SZ_1M -/* DSP */ -#define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */ -#define DSP_MEM_34XX_VIRT 0xe0000000 -#define DSP_MEM_34XX_SIZE 0x28000 -#define DSP_IPI_34XX_PHYS OMAP34XX_DSP_IPI_BASE /* 0x59000000 */ -#define DSP_IPI_34XX_VIRT 0xe1000000 -#define DSP_IPI_34XX_SIZE SZ_4K -#define DSP_MMU_34XX_PHYS OMAP34XX_DSP_MMU_BASE /* 0x5a000000 */ -#define DSP_MMU_34XX_VIRT 0xe2000000 -#define DSP_MMU_34XX_SIZE SZ_4K +/* 3430 IVA - currently unmapped */ /* * ---------------------------------------------------------------------------- diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c index 11f5d7961c73..0cfd54f519c4 100644 --- a/arch/arm/plat-omap/io.c +++ b/arch/arm/plat-omap/io.c @@ -66,12 +66,12 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT); } if (cpu_is_omap2420()) { - if (BETWEEN(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_SIZE)) - return XLATE(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_VIRT); - if (BETWEEN(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE)) - return XLATE(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE); - if (BETWEEN(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_SIZE)) - return XLATE(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_VIRT); + if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE)) + return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT); + if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE)) + return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE); + if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE)) + return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT); } if (cpu_is_omap2430()) { if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE)) -- cgit v1.2.3 From 9b5bc5fa4b68fe2f51a5197786a8b5df82d1b8bf Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Fri, 8 Jan 2010 15:23:06 -0700 Subject: OMAP3: clock: add clockdomains for UART1 & 2 UART1 & 2 were missing clockdomains resulting in broken omap_hwmod init for these devices. Signed-off-by: Kevin Hilman Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock34xx_data.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c index 8bdcc9cc7f9a..c60b19a27232 100644 --- a/arch/arm/mach-omap2/clock34xx_data.c +++ b/arch/arm/mach-omap2/clock34xx_data.c @@ -1500,6 +1500,7 @@ static struct clk uart2_fck = { .parent = &core_48m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_UART2_SHIFT, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1509,6 +1510,7 @@ static struct clk uart1_fck = { .parent = &core_48m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_UART1_SHIFT, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; -- cgit v1.2.3 From 073463ca4011d4f6f8e2334273f3b062b2b19b85 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 8 Jan 2010 15:23:07 -0700 Subject: OMAP3 clock: McBSP 2, 3, 4 functional clock parent is PER_96M_FCLK, not CORE_96M_FCLK The correct parent of the McBSP 2, 3, and 4 functional clocks is PER_96M_FCLK, not CORE_96M_FCLK. Fix this in the OMAP clock tree. Reported by Nicole Chalhoub . Signed-off-by: Paul Walmsley Cc: Nicole Chalhoub --- arch/arm/mach-omap2/clock34xx_data.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c index c60b19a27232..7eea9fb09e74 100644 --- a/arch/arm/mach-omap2/clock34xx_data.c +++ b/arch/arm/mach-omap2/clock34xx_data.c @@ -2747,7 +2747,7 @@ static struct clk mcbsp4_ick = { }; static const struct clksel mcbsp_234_clksel[] = { - { .parent = &core_96m_fck, .rates = common_mcbsp_96m_rates }, + { .parent = &per_96m_fck, .rates = common_mcbsp_96m_rates }, { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates }, { .parent = NULL } }; -- cgit v1.2.3 From 3e3ee1560daaf09bb5dbe3afd35ca2f75e2e116a Mon Sep 17 00:00:00 2001 From: Tuukka Toivonen Date: Fri, 8 Jan 2010 15:23:08 -0700 Subject: OMAP3 clock: Add capability to change rate of dpll4_m5_ck MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add necessary definitions to clock framework to allow changing dpll4_m5_ck rate. This is used by the camera code. Signed-off-by: Jouni Högander Signed-off-by: Tuukka Toivonen Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock34xx_data.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c index 7eea9fb09e74..c6031d74d6f6 100644 --- a/arch/arm/mach-omap2/clock34xx_data.c +++ b/arch/arm/mach-omap2/clock34xx_data.c @@ -776,6 +776,8 @@ static struct clk dpll4_m5_ck = { .clksel_mask = OMAP3430_CLKSEL_CAM_MASK, .clksel = div16_dpll4_clksel, .clkdm_name = "dpll4_clkdm", + .set_rate = &omap2_clksel_set_rate, + .round_rate = &omap2_clksel_round_rate, .recalc = &omap2_clksel_recalc, }; -- cgit v1.2.3 From 19fe458310915a216bbba32a210b6f29ac7c929f Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Fri, 8 Jan 2010 15:23:15 -0700 Subject: OMAP2xxx clock: clk2xxx.c doesn't compile if CPUFREQ is enabled if we enable CPUFREQ we can't build omap2 for two reasons, one of them is fixed by the patch below. It's failing because the __must_be_array() check in ARRAY_SIZE() is failing and printing the following message: arch/arm/mach-omap2/clock2xxx.c:453: error: negative width in bit-field '' Signed-off-by: Felipe Balbi [paul@pwsan.com: commit message updated; changed rate variable name] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock2xxx.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c index d0e3fb7f9298..ce6742f7894a 100644 --- a/arch/arm/mach-omap2/clock2xxx.c +++ b/arch/arm/mach-omap2/clock2xxx.c @@ -455,12 +455,15 @@ static struct cpufreq_frequency_table freq_table[ARRAY_SIZE(rate_table)]; void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table) { struct prcm_config *prcm; + long sys_ck_rate; int i = 0; + sys_ck_rate = clk_get_rate(sclk); + for (prcm = rate_table; prcm->mpu_speed; prcm++) { if (!(prcm->flags & cpu_mask)) continue; - if (prcm->xtal_speed != sys_ck.rate) + if (prcm->xtal_speed != sys_ck_rate) continue; /* don't put bypass rates in table */ -- cgit v1.2.3 From ca6eccb31ef63722b35ea695f75089adeec319d7 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 8 Jan 2010 15:23:15 -0700 Subject: OMAP2xxx OPP: clean up comments in OPP data Revise some of the comments in the OMAP2xxx OPP data for clarity. Signed-off-by: Paul Walmsley Cc: Richard Woodruff --- arch/arm/mach-omap2/opp2420_data.c | 38 ++++++++++++++++++++------------------ arch/arm/mach-omap2/opp2430_data.c | 30 +++++++++++++++--------------- 2 files changed, 35 insertions(+), 33 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/opp2420_data.c b/arch/arm/mach-omap2/opp2420_data.c index 126a9396b3a8..e6dda694fd5c 100644 --- a/arch/arm/mach-omap2/opp2420_data.c +++ b/arch/arm/mach-omap2/opp2420_data.c @@ -9,45 +9,47 @@ * The OMAP2 processor can be run at several discrete 'PRCM configurations'. * These configurations are characterized by voltage and speed for clocks. * The device is only validated for certain combinations. One way to express - * these combinations is via the 'ratio's' which the clocks operate with + * these combinations is via the 'ratios' which the clocks operate with * respect to each other. These ratio sets are for a given voltage/DPLL - * setting. All configurations can be described by a DPLL setting and a ratio - * There are 3 ratio sets for the 2430 and X ratio sets for 2420. - * - * 2430 differs from 2420 in that there are no more phase synchronizers used. - * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs - * 2430 (iva2.1, NOdsp, mdm) + * setting. All configurations can be described by a DPLL setting and a ratio. * * XXX Missing voltage data. + * XXX Missing 19.2MHz sys_clk rate sets (needed for N800/N810) * * THe format described in this file is deprecated. Once a reasonable * OPP API exists, the data in this file should be converted to use it. * * This is technically part of the OMAP2xxx clock code. + * + * Considerable work is still needed to fully support dynamic frequency + * changes on OMAP2xxx-series chips. Readers interested in such a + * project are encouraged to review the Maemo Diablo RX-34 and RX-44 + * kernel source at: + * http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/ */ #include "opp2xxx.h" #include "sdrc.h" #include "clock.h" -/*------------------------------------------------------------------------- - * Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated. +/* + * Key dividers which make up a PRCM set. Ratios for a PRCM are mandated. * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU, * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL, * CM_CLKSEL2_PLL, CM_CLKSEL_MDM * - * Filling in table based on H4 boards and 2430-SDPs variants available. - * There are quite a few more rates combinations which could be defined. + * Filling in table based on H4 boards available. There are quite a + * few more rate combinations which could be defined. * - * When multiple values are defined the start up will try and choose the - * fastest one. If a 'fast' value is defined, then automatically, the /2 - * one should be included as it can be used. Generally having more that - * one fast set does not make sense, as static timings need to be changed - * to change the set. The exception is the bypass setting which is - * availble for low power bypass. + * When multiple values are defined the start up will try and choose + * the fastest one. If a 'fast' value is defined, then automatically, + * the /2 one should be included as it can be used. Generally having + * more than one fast set does not make sense, as static timings need + * to be changed to change the set. The exception is the bypass + * setting which is available for low power bypass. * * Note: This table needs to be sorted, fastest to slowest. - *-------------------------------------------------------------------------*/ + **/ const struct prcm_config omap2420_rate_table[] = { /* PRCM I - FAST */ {S12M, S660M, S330M, RI_CM_CLKSEL_MPU_VAL, /* 330MHz ARM */ diff --git a/arch/arm/mach-omap2/opp2430_data.c b/arch/arm/mach-omap2/opp2430_data.c index edb81672c844..1b9596ae201e 100644 --- a/arch/arm/mach-omap2/opp2430_data.c +++ b/arch/arm/mach-omap2/opp2430_data.c @@ -1,5 +1,5 @@ /* - * opp2420_data.c - old-style "OPP" table for OMAP2420 + * opp2430_data.c - old-style "OPP" table for OMAP2430 * * Copyright (C) 2005-2009 Texas Instruments, Inc. * Copyright (C) 2004-2009 Nokia Corporation @@ -9,16 +9,16 @@ * The OMAP2 processor can be run at several discrete 'PRCM configurations'. * These configurations are characterized by voltage and speed for clocks. * The device is only validated for certain combinations. One way to express - * these combinations is via the 'ratio's' which the clocks operate with + * these combinations is via the 'ratios' which the clocks operate with * respect to each other. These ratio sets are for a given voltage/DPLL - * setting. All configurations can be described by a DPLL setting and a ratio - * There are 3 ratio sets for the 2430 and X ratio sets for 2420. + * setting. All configurations can be described by a DPLL setting and a ratio. * * 2430 differs from 2420 in that there are no more phase synchronizers used. * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs * 2430 (iva2.1, NOdsp, mdm) * * XXX Missing voltage data. + * XXX Missing 19.2MHz sys_clk rate sets. * * THe format described in this file is deprecated. Once a reasonable * OPP API exists, the data in this file should be converted to use it. @@ -30,24 +30,24 @@ #include "sdrc.h" #include "clock.h" -/*------------------------------------------------------------------------- - * Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated. +/* + * Key dividers which make up a PRCM set. Ratios for a PRCM are mandated. * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU, * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL, * CM_CLKSEL2_PLL, CM_CLKSEL_MDM * - * Filling in table based on H4 boards and 2430-SDPs variants available. - * There are quite a few more rates combinations which could be defined. + * Filling in table based on 2430-SDPs variants available. There are + * quite a few more rate combinations which could be defined. * - * When multiple values are defined the start up will try and choose the - * fastest one. If a 'fast' value is defined, then automatically, the /2 - * one should be included as it can be used. Generally having more that - * one fast set does not make sense, as static timings need to be changed - * to change the set. The exception is the bypass setting which is - * availble for low power bypass. + * When multiple values are defined the start up will try and choose + * the fastest one. If a 'fast' value is defined, then automatically, + * the /2 one should be included as it can be used. Generally having + * more than one fast set does not make sense, as static timings need + * to be changed to change the set. The exception is the bypass + * setting which is available for low power bypass. * * Note: This table needs to be sorted, fastest to slowest. - *-------------------------------------------------------------------------*/ + */ const struct prcm_config omap2430_rate_table[] = { /* PRCM #4 - ratio2 (ES2.1) - FAST */ {S13M, S798M, S399M, R2_CM_CLKSEL_MPU_VAL, /* 399MHz ARM */ -- cgit v1.2.3 From cdf1a915569ea9c3f6b9b4ef48a189d531d3954c Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 8 Jan 2010 15:23:17 -0700 Subject: OMAP2 clock: dynamically allocate CPUFreq frequency table Dynamically allocate the CPUFreq frequency table on OMAP2xxx chips. This fixes some compilation problems, since the kernel may not know what chip it is running on until boot-time. This also reduces the size of the CPUFreq frequency table. Problem originally reported by Felipe Balbi . Thanks also for comments on the patch from Felipe and Kevin. Signed-off-by: Paul Walmsley Cc: Felipe Balbi Cc: Kevin Hilman --- arch/arm/mach-omap2/clock2xxx.c | 52 ++++++++++++++++++++++++++++++++++------- 1 file changed, 44 insertions(+), 8 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c index ce6742f7894a..5420356eb407 100644 --- a/arch/arm/mach-omap2/clock2xxx.c +++ b/arch/arm/mach-omap2/clock2xxx.c @@ -449,14 +449,16 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate) #ifdef CONFIG_CPU_FREQ /* * Walk PRCM rate table and fillout cpufreq freq_table + * XXX This should be replaced by an OPP layer in the near future */ -static struct cpufreq_frequency_table freq_table[ARRAY_SIZE(rate_table)]; +static struct cpufreq_frequency_table *freq_table; void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table) { - struct prcm_config *prcm; + const struct prcm_config *prcm; long sys_ck_rate; int i = 0; + int tbl_sz = 0; sys_ck_rate = clk_get_rate(sclk); @@ -470,22 +472,55 @@ void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table) if (prcm->dpll_speed == prcm->xtal_speed) continue; - freq_table[i].index = i; - freq_table[i].frequency = prcm->mpu_speed / 1000; - i++; + tbl_sz++; } - if (i == 0) { - printk(KERN_WARNING "%s: failed to initialize frequency " - "table\n", __func__); + /* + * XXX Ensure that we're doing what CPUFreq expects for this error + * case and the following one + */ + if (tbl_sz == 0) { + pr_warning("%s: no matching entries in rate_table\n", + __func__); return; } + /* Include the CPUFREQ_TABLE_END terminator entry */ + tbl_sz++; + + freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz, + GFP_ATOMIC); + if (!freq_table) { + pr_err("%s: could not kzalloc frequency table\n", __func__); + return; + } + + for (prcm = rate_table; prcm->mpu_speed; prcm++) { + if (!(prcm->flags & cpu_mask)) + continue; + if (prcm->xtal_speed != sys_ck_rate) + continue; + + /* don't put bypass rates in table */ + if (prcm->dpll_speed == prcm->xtal_speed) + continue; + + freq_table[i].index = i; + freq_table[i].frequency = prcm->mpu_speed / 1000; + i++; + } + freq_table[i].index = i; freq_table[i].frequency = CPUFREQ_TABLE_END; *table = &freq_table[0]; } + +void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table) +{ + kfree(freq_table); +} + #endif struct clk_functions omap2_clk_functions = { @@ -497,6 +532,7 @@ struct clk_functions omap2_clk_functions = { .clk_disable_unused = omap2_clk_disable_unused, #ifdef CONFIG_CPU_FREQ .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table, + .clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table, #endif }; -- cgit v1.2.3 From 883edfdd58419b0cc298db14ba25c26d55c6d1af Mon Sep 17 00:00:00 2001 From: Thara Gopinath Date: Tue, 19 Jan 2010 17:30:51 -0700 Subject: OMAP3: hwmod: Adding flag to prevent caching of sysconfig register. In the current implementation the sysconfig value is read into _sysc_cache once and an actual update to the sysconfig register happens only if the new value paased is differnt from the one in _sysc_cache. _sysc_cache is updated only if _HWMOD_SYSCONFIG_LOADED is not set. This can lead to the follwing issue if off mode is enabled in modules which employs "always-retore" mechanism of context save and restore. a. The module sets the sysconfig register through omap_device_enable. Here _sysc_cache is updated with the value written to the sysconfig register and left. b. The power domain containig the module enters off mode and the module context is lost. c. The module in use becomes active and calls omap_device_enable to enable itself. Here a read of sysconfig register does not happen as _HWMOD_SYSCONFIG_LOADED flag is set. The value to be written to the sysconfig register will be same as the one written in step a. Since _sysc_cache reflects the previous written value an update of the sysconfig register does not happen. This means in modules which employs "always-restore" mechanism after off , the sysconfig regsiters will never get updated. This patch introduces a flag SYSC_NO_CACHE which if set ensures that the sysconfig register is always read into _sysc_cache before an update is attempted. This flags need to be set only by modules which does not do a context save but re-initializes the registers every time the module is accessed. This includes modules like i2c, smartreflex etc. Signed-off-by: Thara Gopinath [paul@pwsan.com: tweaked to apply on a different head, added flag comment] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod.c | 3 ++- arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index d8c8545875b1..478ae585ca39 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -94,7 +94,8 @@ static int _update_sysc_cache(struct omap_hwmod *oh) oh->_sysc_cache = omap_hwmod_readl(oh, oh->sysconfig->sysc_offs); - oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; + if (!(oh->sysconfig->sysc_flags & SYSC_NO_CACHE)) + oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; return 0; } diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 007935a921ea..33933256a226 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -227,6 +227,7 @@ struct omap_hwmod_ocp_if { #define SYSC_HAS_SIDLEMODE (1 << 5) #define SYSC_HAS_MIDLEMODE (1 << 6) #define SYSS_MISSING (1 << 7) +#define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */ /* omap_hwmod_sysconfig.clockact flags */ #define CLOCKACT_TEST_BOTH 0x0 -- cgit v1.2.3 From 6468e3b18777ecfffa6738e365896be9f17403f2 Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 19 Jan 2010 17:30:52 -0700 Subject: OMAP3: clock: Remove unnecessarily .init initializers from OMAP3 clocks The first thing that omap2_init_clksel_parent() does is check for a non-zero .clksel field in the struct clk. Therefore, it is pointless calling this function on clocks where the clksel field is unset. Remove init calls to omap2_init_clksel_parent() on clocks without a clksel field. Signed-off-by: Russell King Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock34xx_data.c | 4 ---- 1 file changed, 4 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c index c6031d74d6f6..74930e3158e3 100644 --- a/arch/arm/mach-omap2/clock34xx_data.c +++ b/arch/arm/mach-omap2/clock34xx_data.c @@ -671,7 +671,6 @@ static struct clk dpll4_m3x2_ck = { .name = "dpll4_m3x2_ck", .ops = &clkops_omap2_dflt_wait, .parent = &dpll4_m3_ck, - .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP3430_PWRDN_TV_SHIFT, .flags = INVERT_ENABLE, @@ -811,7 +810,6 @@ static struct clk dpll4_m6x2_ck = { .name = "dpll4_m6x2_ck", .ops = &clkops_omap2_dflt_wait, .parent = &dpll4_m6_ck, - .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP3430_PWRDN_EMU_PERIPH_SHIFT, .flags = INVERT_ENABLE, @@ -1047,7 +1045,6 @@ static struct clk iva2_ck = { .name = "iva2_ck", .ops = &clkops_omap2_dflt_wait, .parent = &dpll2_m2_ck, - .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN), .enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT, .clkdm_name = "iva2_clkdm", @@ -1121,7 +1118,6 @@ static struct clk gfx_l3_ck = { .name = "gfx_l3_ck", .ops = &clkops_omap2_dflt_wait, .parent = &l3_ick, - .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), .enable_bit = OMAP_EN_GFX_SHIFT, .recalc = &followparent_recalc, -- cgit v1.2.3 From 2cb0c54f3a696351b81e6670f8419120c94b5e0b Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 19 Jan 2010 18:17:07 -0800 Subject: omap: Fix cmdline muxing Looks like cmdline muxing got broken at some point when we decided to limit muxing to __init code. Currently omap_mux_entry list is not yet initialized when we try to initialize cmdline muxing. Fix this by calling omap_mux_init_list() before calling omap_mux_set_cmdline_signals(). Reported-by: Philip Balister Tested-by: Philip Balister Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/mux.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 459ef23ab8a8..40ea9fd4211d 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -998,12 +998,15 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size, omap_mux_package_fixup(package_subset, superset); if (package_balls) omap_mux_package_init_balls(package_balls, superset); - omap_mux_set_cmdline_signals(); - omap_mux_set_board_signals(board_mux); #endif omap_mux_init_list(superset); +#ifdef CONFIG_OMAP_MUX + omap_mux_set_cmdline_signals(); + omap_mux_set_board_signals(board_mux); +#endif + return 0; } -- cgit v1.2.3 From d4bb72e50a0c4b6790dec127a38fd06d06e561cc Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 19 Jan 2010 15:15:24 -0800 Subject: omap: Fix functions for dynamic remuxing of pins Make the omap_mux_read and write available for board code, and rename omap_mux_set_board_signals into omap_mux_write_array. Also add the related prototypes and comments into mux.h. In some cases we want to change the signals dynamically, mostly for power management. Note that we cannot use the signal names as they are set __init to save memory. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/mux.c | 22 +++++++++++----------- arch/arm/mach-omap2/mux.h | 24 ++++++++++++++++++++++++ 2 files changed, 35 insertions(+), 11 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 40ea9fd4211d..3f59bd12cbbf 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -51,7 +51,7 @@ struct omap_mux_entry { static unsigned long mux_phys; static void __iomem *mux_base; -static inline u16 omap_mux_read(u16 reg) +u16 omap_mux_read(u16 reg) { if (cpu_is_omap24xx()) return __raw_readb(mux_base + reg); @@ -59,7 +59,7 @@ static inline u16 omap_mux_read(u16 reg) return __raw_readw(mux_base + reg); } -static inline void omap_mux_write(u16 val, u16 reg) +void omap_mux_write(u16 val, u16 reg) { if (cpu_is_omap24xx()) __raw_writeb(val, mux_base + reg); @@ -67,6 +67,14 @@ static inline void omap_mux_write(u16 val, u16 reg) __raw_writew(val, mux_base + reg); } +void omap_mux_write_array(struct omap_board_mux *board_mux) +{ + while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) { + omap_mux_write(board_mux->value, board_mux->reg_offset); + board_mux++; + } +} + #if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_OMAP_MUX) static struct omap_mux_cfg arch_mux_cfg; @@ -833,14 +841,6 @@ static void __init omap_mux_set_cmdline_signals(void) kfree(options); } -static void __init omap_mux_set_board_signals(struct omap_board_mux *board_mux) -{ - while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) { - omap_mux_write(board_mux->value, board_mux->reg_offset); - board_mux++; - } -} - static int __init omap_mux_copy_names(struct omap_mux *src, struct omap_mux *dst) { @@ -1004,7 +1004,7 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size, #ifdef CONFIG_OMAP_MUX omap_mux_set_cmdline_signals(); - omap_mux_set_board_signals(board_mux); + omap_mux_write_array(board_mux); #endif return 0; diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h index d8b4d5ad2278..f8c2e7a8f063 100644 --- a/arch/arm/mach-omap2/mux.h +++ b/arch/arm/mach-omap2/mux.h @@ -146,6 +146,30 @@ u16 omap_mux_get_gpio(int gpio); */ void omap_mux_set_gpio(u16 val, int gpio); +/** + * omap_mux_read() - read mux register + * @mux_offset: Offset of the mux register + * + */ +u16 omap_mux_read(u16 mux_offset); + +/** + * omap_mux_write() - write mux register + * @val: New mux register value + * @mux_offset: Offset of the mux register + * + * This should be only needed for dynamic remuxing of non-gpio signals. + */ +void omap_mux_write(u16 val, u16 mux_offset); + +/** + * omap_mux_write_array() - write an array of mux registers + * @board_mux: Array of mux registers terminated by MAP_MUX_TERMINATOR + * + * This should be only needed for dynamic remuxing of non-gpio signals. + */ +void omap_mux_write_array(struct omap_board_mux *board_mux); + /** * omap3_mux_init() - initialize mux system with board specific set * @board_mux: Board specific mux table -- cgit v1.2.3 From e9acb9b64d7fb16c7f69efa85c5707cffd0c7275 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 19 Jan 2010 15:40:26 -0800 Subject: omap3: Fix cpu detection We need to set the omap_chip.oc carefully for the clocks to work. To fix this, set the omap_chip.oc in omap3_check_features() based on the CONTROL_IDCODE and silicon revision registers. Also add handling for 34xx es3.1.2 as es3.1 for now. Fixes booting on at least overo board. Based on an earlier patch by Paul Walmsley . Signed-off-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/id.c | 41 ++++++++++++++++++++--------------- arch/arm/plat-omap/include/plat/cpu.h | 1 + 2 files changed, 24 insertions(+), 18 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index a091b53657b9..3d65c50bd017 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -188,6 +188,8 @@ void __init omap3_check_revision(void) u16 hawkeye; u8 rev; + omap_chip.oc = CHIP_IS_OMAP3430; + /* * We cannot access revision registers on ES1.0. * If the processor type is Cortex-A8 and the revision is 0x0 @@ -196,6 +198,7 @@ void __init omap3_check_revision(void) cpuid = read_cpuid(CPUID_ID); if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { omap_revision = OMAP3430_REV_ES1_0; + omap_chip.oc |= CHIP_IS_OMAP3430ES1; return; } @@ -216,18 +219,28 @@ void __init omap3_check_revision(void) case 0: /* Take care of early samples */ case 1: omap_revision = OMAP3430_REV_ES2_0; + omap_chip.oc |= CHIP_IS_OMAP3430ES2; break; case 2: omap_revision = OMAP3430_REV_ES2_1; + omap_chip.oc |= CHIP_IS_OMAP3430ES2; break; case 3: omap_revision = OMAP3430_REV_ES3_0; + omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; break; case 4: + omap_revision = OMAP3430_REV_ES3_1; + omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; + break; + case 7: /* FALLTHROUGH */ default: /* Use the latest known revision as default */ - omap_revision = OMAP3430_REV_ES3_1; + omap_revision = OMAP3430_REV_ES3_1_2; + + /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */ + omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; } break; case 0xb868: @@ -235,14 +248,18 @@ void __init omap3_check_revision(void) * * Set the device to be OMAP3505 here. Actual device * is identified later based on the features. + * + * REVISIT: AM3505/AM3517 should have their own CHIP_IS */ omap_revision = OMAP3505_REV(rev); + omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; break; case 0xb891: /* FALLTHROUGH */ default: /* Unknown default to latest silicon rev as default*/ omap_revision = OMAP3630_REV_ES1_0; + omap_chip.oc |= CHIP_IS_OMAP3630ES1; } } @@ -360,6 +377,7 @@ void __init omap2_check_revision(void) omap3_check_revision(); omap3_check_features(); omap3_cpuinfo(); + return; } else if (cpu_is_omap44xx()) { omap4_check_revision(); return; @@ -374,27 +392,14 @@ void __init omap2_check_revision(void) if (cpu_is_omap243x()) { /* Currently only supports 2430ES2.1 and 2430-all */ omap_chip.oc |= CHIP_IS_OMAP2430; + return; } else if (cpu_is_omap242x()) { /* Currently only supports 2420ES2.1.1 and 2420-all */ omap_chip.oc |= CHIP_IS_OMAP2420; - } else if (cpu_is_omap3505() || cpu_is_omap3517()) { - omap_chip.oc = CHIP_IS_OMAP3430 | CHIP_IS_OMAP3430ES3_1; - } else if (cpu_is_omap343x()) { - omap_chip.oc = CHIP_IS_OMAP3430; - if (omap_rev() == OMAP3430_REV_ES1_0) - omap_chip.oc |= CHIP_IS_OMAP3430ES1; - else if (omap_rev() >= OMAP3430_REV_ES2_0 && - omap_rev() <= OMAP3430_REV_ES2_1) - omap_chip.oc |= CHIP_IS_OMAP3430ES2; - else if (omap_rev() == OMAP3430_REV_ES3_0) - omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; - else if (omap_rev() == OMAP3430_REV_ES3_1) - omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; - else if (omap_rev() == OMAP3630_REV_ES1_0) - omap_chip.oc |= CHIP_IS_OMAP3630ES1; - } else { - pr_err("Uninitialized omap_chip, please fix!\n"); + return; } + + pr_err("Uninitialized omap_chip, please fix!\n"); } /* diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 9a028bdebb06..a162f585b1e3 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -434,6 +434,7 @@ IS_OMAP_TYPE(3517, 0x3517) #define OMAP3430_REV_ES2_1 0x34302034 #define OMAP3430_REV_ES3_0 0x34303034 #define OMAP3430_REV_ES3_1 0x34304034 +#define OMAP3430_REV_ES3_1_2 0x34305034 #define OMAP3630_REV_ES1_0 0x36300034 -- cgit v1.2.3 From 0324f59fc945b76337dbc18f4ad4b4383f683ae5 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Tue, 19 Jan 2010 17:30:54 -0700 Subject: OMAP4: PRCM: Fix the base address for CHIRONSS reg defines The CHIRONSS has its own local PRCM module and the register defines need to use the CHIRONSS base and not the PRM base. The changes are generated by updating the script which autogenerates the file modifed in the patch. Signed-off-by: Rajendra Nayak Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/prm.h | 2 ++ arch/arm/mach-omap2/prm44xx.h | 32 ++++++++++++++++---------------- 2 files changed, 18 insertions(+), 16 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index ea050ce188a7..40f006285163 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -24,6 +24,8 @@ OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) #define OMAP44XX_PRM_REGADDR(module, reg) \ OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (module) + (reg)) +#define OMAP44XX_CHIRONSS_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP4430_CHIRONSS_BASE + (module) + (reg)) #include "prm44xx.h" diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 89be97f0589d..adb2558bb121 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -386,26 +386,26 @@ /* CHIRON_PRCM.CHIRONSS_OCP_SOCKET_PRCM register offsets */ -#define OMAP4430_REVISION_PRCM OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_OCP_SOCKET_PRCM_MOD, 0x0000) +#define OMAP4430_REVISION_PRCM OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_OCP_SOCKET_PRCM_MOD, 0x0000) /* CHIRON_PRCM.CHIRONSS_DEVICE_PRM register offsets */ -#define OMAP4430_CHIRON_PRCM_PRM_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_DEVICE_PRM_MOD, 0x0000) +#define OMAP4430_CHIRON_PRCM_PRM_RSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_DEVICE_PRM_MOD, 0x0000) /* CHIRON_PRCM.CHIRONSS_CPU0 register offsets */ -#define OMAP4430_PM_PDA_CPU0_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0000) -#define OMAP4430_PM_PDA_CPU0_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0004) -#define OMAP4430_RM_PDA_CPU0_CPU0_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0008) -#define OMAP4430_RM_PDA_CPU0_CPU0_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x000c) -#define OMAP4430_RM_PDA_CPU0_CPU0_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0010) -#define OMAP4430_CM_PDA_CPU0_CPU0_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0014) -#define OMAP4430_CM_PDA_CPU0_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0018) +#define OMAP4430_PM_PDA_CPU0_PWRSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0000) +#define OMAP4430_PM_PDA_CPU0_PWRSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0004) +#define OMAP4430_RM_PDA_CPU0_CPU0_CONTEXT OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0008) +#define OMAP4430_RM_PDA_CPU0_CPU0_RSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x000c) +#define OMAP4430_RM_PDA_CPU0_CPU0_RSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0010) +#define OMAP4430_CM_PDA_CPU0_CPU0_CLKCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0014) +#define OMAP4430_CM_PDA_CPU0_CLKSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0018) /* CHIRON_PRCM.CHIRONSS_CPU1 register offsets */ -#define OMAP4430_PM_PDA_CPU1_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0000) -#define OMAP4430_PM_PDA_CPU1_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0004) -#define OMAP4430_RM_PDA_CPU1_CPU1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0008) -#define OMAP4430_RM_PDA_CPU1_CPU1_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x000c) -#define OMAP4430_RM_PDA_CPU1_CPU1_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0010) -#define OMAP4430_CM_PDA_CPU1_CPU1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0014) -#define OMAP4430_CM_PDA_CPU1_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0018) +#define OMAP4430_PM_PDA_CPU1_PWRSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0000) +#define OMAP4430_PM_PDA_CPU1_PWRSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0004) +#define OMAP4430_RM_PDA_CPU1_CPU1_CONTEXT OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0008) +#define OMAP4430_RM_PDA_CPU1_CPU1_RSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x000c) +#define OMAP4430_RM_PDA_CPU1_CPU1_RSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0010) +#define OMAP4430_CM_PDA_CPU1_CPU1_CLKCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0014) +#define OMAP4430_CM_PDA_CPU1_CLKSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0018) #endif -- cgit v1.2.3 From ecbb06594744b72c362cb2252cb5f6de7cf1b394 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Tue, 19 Jan 2010 17:30:55 -0700 Subject: OMAP4: clocks: Fix the clksel_rate struct DPLL divs For all DPLL's the valid dividers are same as the values to be programmed in the register. 0 is an invalid value. The changes are generated by updating the script which autogenerates the file modifed in the patch. Signed-off-by: Rajendra Nayak Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clock44xx_data.c | 62 ++++++++++++++++++------------------ 1 file changed, 31 insertions(+), 31 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 2210e227d78a..9d882bcb56e3 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -346,37 +346,37 @@ static struct clk aess_fclk = { }; static const struct clksel_rate div31_1to31_rates[] = { - { .div = 1, .val = 0, .flags = RATE_IN_4430 }, - { .div = 2, .val = 1, .flags = RATE_IN_4430 }, - { .div = 3, .val = 2, .flags = RATE_IN_4430 }, - { .div = 4, .val = 3, .flags = RATE_IN_4430 }, - { .div = 5, .val = 4, .flags = RATE_IN_4430 }, - { .div = 6, .val = 5, .flags = RATE_IN_4430 }, - { .div = 7, .val = 6, .flags = RATE_IN_4430 }, - { .div = 8, .val = 7, .flags = RATE_IN_4430 }, - { .div = 9, .val = 8, .flags = RATE_IN_4430 }, - { .div = 10, .val = 9, .flags = RATE_IN_4430 }, - { .div = 11, .val = 10, .flags = RATE_IN_4430 }, - { .div = 12, .val = 11, .flags = RATE_IN_4430 }, - { .div = 13, .val = 12, .flags = RATE_IN_4430 }, - { .div = 14, .val = 13, .flags = RATE_IN_4430 }, - { .div = 15, .val = 14, .flags = RATE_IN_4430 }, - { .div = 16, .val = 15, .flags = RATE_IN_4430 }, - { .div = 17, .val = 16, .flags = RATE_IN_4430 }, - { .div = 18, .val = 17, .flags = RATE_IN_4430 }, - { .div = 19, .val = 18, .flags = RATE_IN_4430 }, - { .div = 20, .val = 19, .flags = RATE_IN_4430 }, - { .div = 21, .val = 20, .flags = RATE_IN_4430 }, - { .div = 22, .val = 21, .flags = RATE_IN_4430 }, - { .div = 23, .val = 22, .flags = RATE_IN_4430 }, - { .div = 24, .val = 23, .flags = RATE_IN_4430 }, - { .div = 25, .val = 24, .flags = RATE_IN_4430 }, - { .div = 26, .val = 25, .flags = RATE_IN_4430 }, - { .div = 27, .val = 26, .flags = RATE_IN_4430 }, - { .div = 28, .val = 27, .flags = RATE_IN_4430 }, - { .div = 29, .val = 28, .flags = RATE_IN_4430 }, - { .div = 30, .val = 29, .flags = RATE_IN_4430 }, - { .div = 31, .val = 30, .flags = RATE_IN_4430 }, + { .div = 1, .val = 1, .flags = RATE_IN_4430 }, + { .div = 2, .val = 2, .flags = RATE_IN_4430 }, + { .div = 3, .val = 3, .flags = RATE_IN_4430 }, + { .div = 4, .val = 4, .flags = RATE_IN_4430 }, + { .div = 5, .val = 5, .flags = RATE_IN_4430 }, + { .div = 6, .val = 6, .flags = RATE_IN_4430 }, + { .div = 7, .val = 7, .flags = RATE_IN_4430 }, + { .div = 8, .val = 8, .flags = RATE_IN_4430 }, + { .div = 9, .val = 9, .flags = RATE_IN_4430 }, + { .div = 10, .val = 10, .flags = RATE_IN_4430 }, + { .div = 11, .val = 11, .flags = RATE_IN_4430 }, + { .div = 12, .val = 12, .flags = RATE_IN_4430 }, + { .div = 13, .val = 13, .flags = RATE_IN_4430 }, + { .div = 14, .val = 14, .flags = RATE_IN_4430 }, + { .div = 15, .val = 15, .flags = RATE_IN_4430 }, + { .div = 16, .val = 16, .flags = RATE_IN_4430 }, + { .div = 17, .val = 17, .flags = RATE_IN_4430 }, + { .div = 18, .val = 18, .flags = RATE_IN_4430 }, + { .div = 19, .val = 19, .flags = RATE_IN_4430 }, + { .div = 20, .val = 20, .flags = RATE_IN_4430 }, + { .div = 21, .val = 21, .flags = RATE_IN_4430 }, + { .div = 22, .val = 22, .flags = RATE_IN_4430 }, + { .div = 23, .val = 23, .flags = RATE_IN_4430 }, + { .div = 24, .val = 24, .flags = RATE_IN_4430 }, + { .div = 25, .val = 25, .flags = RATE_IN_4430 }, + { .div = 26, .val = 26, .flags = RATE_IN_4430 }, + { .div = 27, .val = 27, .flags = RATE_IN_4430 }, + { .div = 28, .val = 28, .flags = RATE_IN_4430 }, + { .div = 29, .val = 29, .flags = RATE_IN_4430 }, + { .div = 30, .val = 30, .flags = RATE_IN_4430 }, + { .div = 31, .val = 31, .flags = RATE_IN_4430 }, { .div = 0 }, }; -- cgit v1.2.3 From 1daa8c1d75876f690ed8d3f13c806034af5984eb Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Wed, 20 Jan 2010 22:39:29 +0000 Subject: omap: Enable GPMC clock in gpmc_init Don't assume that gpmc_l3_clk is on, enable it before touching configuration registers. Note that the current code assumes that this clock is always enabled. We are already setting smart idle and L3 autogating for GPMC clock in gpmc_init. Signed-off-by: Olof Johansson Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/gpmc.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index bd8cb5974726..3f1334f62e7a 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -534,6 +534,8 @@ void __init gpmc_init(void) BUG(); } + clk_enable(gpmc_l3_clk); + l = gpmc_read_reg(GPMC_REVISION); printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); /* Set smart idle mode and automatic L3 clock gating */ -- cgit v1.2.3 From 2bbe3af3f1e1c1d0992c984e05d061ef5469edb4 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Fri, 23 Oct 2009 19:03:48 +0300 Subject: OMAP3: PM: Ack pending interrupts before entering suspend Suspending drivers may still generate interrupts just before their suspend is completed. Any pending interrupts here will prevent sleep. Signed-off-by: Tero Kristo Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/irq.c | 6 ++++++ arch/arm/mach-omap2/pm34xx.c | 2 ++ arch/arm/plat-omap/include/plat/irqs.h | 1 + 3 files changed, 9 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index e9bc782fa414..54c5f0dcd663 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -274,4 +274,10 @@ void omap_intc_restore_context(void) } /* MIRs are saved and restore with other PRCM registers */ } + +void omap3_intc_suspend(void) +{ + /* A pending interrupt would prevent OMAP from entering suspend */ + omap_ack_irq(0); +} #endif /* CONFIG_ARCH_OMAP3 */ diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index c6cc809afb79..b26418d55076 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -578,6 +578,8 @@ static int omap3_pm_suspend(void) } omap_uart_prepare_suspend(); + omap3_intc_suspend(); + omap_sram_idle(); restore: diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h index 97d6c50c3dcb..0082036f6a48 100644 --- a/arch/arm/plat-omap/include/plat/irqs.h +++ b/arch/arm/plat-omap/include/plat/irqs.h @@ -499,6 +499,7 @@ extern void omap_init_irq(void); extern int omap_irq_pending(void); void omap_intc_save_context(void); void omap_intc_restore_context(void); +void omap3_intc_suspend(void); #endif #include -- cgit v1.2.3 From b296c8118b26a359b027b8c9bb9f5f41dc7693fa Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Fri, 23 Oct 2009 19:03:49 +0300 Subject: OMAP3: PM: Enable system control module autoidle Enable the auto-idle feature of the SCM block to save some additional power. Signed-off-by: Mika Westerberg Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm34xx.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index b26418d55076..8a148fbbab43 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -837,6 +837,8 @@ static void __init prcm_setup_regs(void) CM_AUTOIDLE); } + omap_ctrl_writel(OMAP3430_AUTOIDLE, OMAP2_CONTROL_SYSCONFIG); + /* * Set all plls to autoidle. This is needed until autoidle is * enabled by clockfw -- cgit v1.2.3 From f18cc2ff5e18e8eb6df5284866331ef4a2db58d6 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Fri, 23 Oct 2009 19:03:50 +0300 Subject: OMAP3: PM: Disable interrupt controller AUTOIDLE before WFI OMAP interrupt controller goes to unknown state when there is right combination of l3,l4 sleep/wake-up transitions, l4 autoidle in interrupt controller and some interrupt. When this happens, interrupts are not delivered to ARM anymore and ARM will remain in WFI (wait for interrupt) until interrupt controller is forced to wake-up (i.e. lauterbach). Signed-off-by: Tero Kristo Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/irq.c | 12 ++++++++++++ arch/arm/mach-omap2/pm34xx.c | 2 ++ arch/arm/plat-omap/include/plat/irqs.h | 2 ++ 3 files changed, 16 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 54c5f0dcd663..27054025da2b 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -280,4 +280,16 @@ void omap3_intc_suspend(void) /* A pending interrupt would prevent OMAP from entering suspend */ omap_ack_irq(0); } + +void omap3_intc_prepare_idle(void) +{ + /* Disable autoidle as it can stall interrupt controller */ + intc_bank_write_reg(0, &irq_banks[0], INTC_SYSCONFIG); +} + +void omap3_intc_resume_idle(void) +{ + /* Re-enable autoidle */ + intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG); +} #endif /* CONFIG_ARCH_OMAP3 */ diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 8a148fbbab43..af83555795ff 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -392,6 +392,7 @@ void omap_sram_idle(void) prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN); omap3_enable_io_chain(); } + omap3_intc_prepare_idle(); /* * On EMU/HS devices ROM code restores a SRDC value @@ -438,6 +439,7 @@ void omap_sram_idle(void) OMAP3430_GR_MOD, OMAP3_PRM_VOLTCTRL_OFFSET); } + omap3_intc_resume_idle(); /* PER */ if (per_next_state < PWRDM_POWER_ON) { diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h index 0082036f6a48..c0ab7c80f72e 100644 --- a/arch/arm/plat-omap/include/plat/irqs.h +++ b/arch/arm/plat-omap/include/plat/irqs.h @@ -500,6 +500,8 @@ extern int omap_irq_pending(void); void omap_intc_save_context(void); void omap_intc_restore_context(void); void omap3_intc_suspend(void); +void omap3_intc_prepare_idle(void); +void omap3_intc_resume_idle(void); #endif #include -- cgit v1.2.3 From a174e609b5b9b3bc1c5859402be8d8d88f6e098c Mon Sep 17 00:00:00 2001 From: Sanjeev Premi Date: Mon, 2 Nov 2009 20:23:38 +0530 Subject: OMAP3: PM: Remove duplicate code blocks This patch removes code blocks that are repeated in function prcm_setup_regs(). Signed-off-by: Sanjeev Premi Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm34xx.c | 18 ------------------ 1 file changed, 18 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index af83555795ff..d6cab338cad1 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -910,24 +910,6 @@ static void __init prcm_setup_regs(void) /* Clear any pending PRCM interrupts */ prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); - /* Don't attach IVA interrupts */ - prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL); - prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1); - prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3); - prm_write_mod_reg(0, OMAP3430_PER_MOD, OMAP3430_PM_IVAGRPSEL); - - /* Clear any pending 'reset' flags */ - prm_write_mod_reg(0xffffffff, MPU_MOD, RM_RSTST); - prm_write_mod_reg(0xffffffff, CORE_MOD, RM_RSTST); - prm_write_mod_reg(0xffffffff, OMAP3430_PER_MOD, RM_RSTST); - prm_write_mod_reg(0xffffffff, OMAP3430_EMU_MOD, RM_RSTST); - prm_write_mod_reg(0xffffffff, OMAP3430_NEON_MOD, RM_RSTST); - prm_write_mod_reg(0xffffffff, OMAP3430_DSS_MOD, RM_RSTST); - prm_write_mod_reg(0xffffffff, OMAP3430ES2_USBHOST_MOD, RM_RSTST); - - /* Clear any pending PRCM interrupts */ - prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); - omap3_iva_idle(); omap3_d2d_idle(); } -- cgit v1.2.3 From afbcf6197d78aed814e90bad6099ecfbeb756ec1 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Mon, 26 Oct 2009 15:10:40 +0200 Subject: OMAP3: CPUidle: Fixed timer resolution Previously used u32 as temporary data storage that wraps around at 4.294s. Signed-off-by: Tero Kristo Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/cpuidle34xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index a26d6a08ae3f..12f0cbfc2894 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -137,7 +137,7 @@ return_sleep_time: local_irq_enable(); local_fiq_enable(); - return (u32)timespec_to_ns(&ts_idle)/1000; + return ts_idle.tv_nsec / NSEC_PER_USEC + ts_idle.tv_sec * USEC_PER_SEC; } /** -- cgit v1.2.3 From a087cad92c0d83f096024d6ec8c8a8f6b6286811 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Thu, 12 Nov 2009 12:07:20 +0200 Subject: OMAP3: Fixed ARM aux ctrl register save/restore Current value is stored on SDRAM and it is written back during wakeup. Previously a static value of 0x72 was written there. Signed-off-by: Tero Kristo Acked-by: Thara Gopinath Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/sleep34xx.S | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index 15268f8b61de..c3626ea48143 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -245,7 +245,8 @@ restore: mov r1, #0 @ set task id for ROM code in r1 mov r2, #4 @ set some flags in r2, r6 mov r6, #0xff - adr r3, write_aux_control_params @ r3 points to parameters + ldr r4, scratchpad_base + ldr r3, [r4, #0xBC] @ r3 points to parameters mcr p15, 0, r0, c7, c10, 4 @ data write barrier mcr p15, 0, r0, c7, c10, 5 @ data memory barrier .word 0xE1600071 @ call SMI monitor (smi #1) @@ -253,14 +254,14 @@ restore: b logic_l1_restore l2_inv_api_params: .word 0x1, 0x00 -write_aux_control_params: - .word 0x1, 0x72 l2_inv_gp: /* Execute smi to invalidate L2 cache */ mov r12, #0x1 @ set up to invalide L2 smi: .word 0xE1600070 @ Call SMI monitor (smieq) /* Write to Aux control register to set some bits */ - mov r0, #0x72 + ldr r4, scratchpad_base + ldr r3, [r4,#0xBC] + ldr r0, [r3,#4] mov r12, #0x3 .word 0xE1600070 @ Call SMI monitor (smieq) logic_l1_restore: @@ -271,6 +272,7 @@ logic_l1_restore: ldr r4, scratchpad_base ldr r3, [r4,#0xBC] + adds r3, r3, #8 ldmia r3!, {r4-r6} mov sp, r4 msr spsr_cxsf, r5 @@ -387,6 +389,9 @@ usettbr0: save_context_wfi: /*b save_context_wfi*/ @ enable to debug save code mov r8, r0 /* Store SDRAM address in r8 */ + mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register + mov r4, #0x1 @ Number of parameters for restore call + stmia r8!, {r4-r5} /* Check what that target sleep state is:stored in r1*/ /* 1 - Only L1 and logic lost */ /* 2 - Only L2 lost */ -- cgit v1.2.3 From 8640425b265752a1b7bae041815872cda5b72a2f Mon Sep 17 00:00:00 2001 From: "Sripathy, Vishwanath" Date: Mon, 16 Nov 2009 16:41:40 +0530 Subject: OMAP3: PM: Removing redundant and potentially dangerous PRCM configration As part of Core domain context restoration while coming out of off mode there are some registers being restored which are not required to be restored. ROM code will have restored them already. Overwriting some of them can have potential side effect. Eg: CM_CLKEN_PLL register should not be written while dpll is locked. Tested on OMAP 3430 SDP for suspend/resume and off mode with sleep_while_idle enabled. Signed-off-by: Vishwanath BS Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/prcm.c | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 3ea8177ffb25..cf466ea1dffc 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -44,7 +44,6 @@ struct omap3_prcm_regs { u32 iva2_cm_clksel2; u32 cm_sysconfig; u32 sgx_cm_clksel; - u32 wkup_cm_clksel; u32 dss_cm_clksel; u32 cam_cm_clksel; u32 per_cm_clksel; @@ -53,7 +52,6 @@ struct omap3_prcm_regs { u32 pll_cm_autoidle2; u32 pll_cm_clksel4; u32 pll_cm_clksel5; - u32 pll_cm_clken; u32 pll_cm_clken2; u32 cm_polctrl; u32 iva2_cm_fclken; @@ -77,7 +75,6 @@ struct omap3_prcm_regs { u32 usbhost_cm_iclken; u32 iva2_cm_autiidle2; u32 mpu_cm_autoidle2; - u32 pll_cm_autoidle; u32 iva2_cm_clkstctrl; u32 mpu_cm_clkstctrl; u32 core_cm_clkstctrl; @@ -274,7 +271,6 @@ void omap3_prcm_save_context(void) prcm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG); prcm_context.sgx_cm_clksel = cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL); - prcm_context.wkup_cm_clksel = cm_read_mod_reg(WKUP_MOD, CM_CLKSEL); prcm_context.dss_cm_clksel = cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL); prcm_context.cam_cm_clksel = @@ -291,8 +287,6 @@ void omap3_prcm_save_context(void) cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4); prcm_context.pll_cm_clksel5 = cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5); - prcm_context.pll_cm_clken = - cm_read_mod_reg(PLL_MOD, CM_CLKEN); prcm_context.pll_cm_clken2 = cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2); prcm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL); @@ -338,8 +332,6 @@ void omap3_prcm_save_context(void) cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2); prcm_context.mpu_cm_autoidle2 = cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2); - prcm_context.pll_cm_autoidle = - cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); prcm_context.iva2_cm_clkstctrl = cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSTCTRL); prcm_context.mpu_cm_clkstctrl = @@ -431,7 +423,6 @@ void omap3_prcm_restore_context(void) __raw_writel(prcm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG); cm_write_mod_reg(prcm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD, CM_CLKSEL); - cm_write_mod_reg(prcm_context.wkup_cm_clksel, WKUP_MOD, CM_CLKSEL); cm_write_mod_reg(prcm_context.dss_cm_clksel, OMAP3430_DSS_MOD, CM_CLKSEL); cm_write_mod_reg(prcm_context.cam_cm_clksel, OMAP3430_CAM_MOD, @@ -448,7 +439,6 @@ void omap3_prcm_restore_context(void) OMAP3430ES2_CM_CLKSEL4); cm_write_mod_reg(prcm_context.pll_cm_clksel5, PLL_MOD, OMAP3430ES2_CM_CLKSEL5); - cm_write_mod_reg(prcm_context.pll_cm_clken, PLL_MOD, CM_CLKEN); cm_write_mod_reg(prcm_context.pll_cm_clken2, PLL_MOD, OMAP3430ES2_CM_CLKEN2); __raw_writel(prcm_context.cm_polctrl, OMAP3430_CM_POLCTRL); @@ -487,7 +477,6 @@ void omap3_prcm_restore_context(void) cm_write_mod_reg(prcm_context.iva2_cm_autiidle2, OMAP3430_IVA2_MOD, CM_AUTOIDLE2); cm_write_mod_reg(prcm_context.mpu_cm_autoidle2, MPU_MOD, CM_AUTOIDLE2); - cm_write_mod_reg(prcm_context.pll_cm_autoidle, PLL_MOD, CM_AUTOIDLE); cm_write_mod_reg(prcm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD, CM_CLKSTCTRL); cm_write_mod_reg(prcm_context.mpu_cm_clkstctrl, MPU_MOD, CM_CLKSTCTRL); -- cgit v1.2.3 From ae559d8769531ab8895d241107a10fbe320b3b7f Mon Sep 17 00:00:00 2001 From: Manjunatha GK Date: Mon, 16 Nov 2009 20:16:52 +0530 Subject: OMAP3: PM debug: fix build error when !CONFIG_DEBUG_FS The PM debug code fails to build on when CONFIG_DEBUG_FS is not enabled. Build error log: arch/arm/mach-omap2/built-in.o: In function `omap_sram_idle': arch/arm/mach-omap2/pm34xx.c:449: undefined reference to `pm_dbg_regset_save' arch/arm/mach-omap2/pm34xx.c:460: undefined reference to `pm_dbg_regset_save' arch/arm/mach-omap2/built-in.o: In function `configure_vc': arch/arm/mach-omap2/pm34xx.c:1237: undefined reference to `pm_dbg_regset_init' arch/arm/mach-omap2/pm34xx.c:1238: undefined reference to `pm_dbg_regset_init' make: *** [.tmp_vmlinux1] Error 1 This patch fixes the above errors. Kernel booting is tested on omap zoom2 and zoom3 boards. Signed-off-by: Manjunatha GK Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm-debug.c | 2 -- arch/arm/mach-omap2/pm.h | 8 ++++++-- 2 files changed, 6 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 860b755d2220..e9d3993d1f96 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -604,6 +604,4 @@ static int __init pm_dbg_init(void) } arch_initcall(pm_dbg_init); -#else -void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) {} #endif diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 0bf345db7147..7a9c2d004511 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -32,12 +32,16 @@ extern struct omap_dm_timer *gptimer_wakeup; #ifdef CONFIG_PM_DEBUG extern void omap2_pm_dump(int mode, int resume, unsigned int us); extern int omap2_pm_debug; +#else +#define omap2_pm_dump(mode, resume, us) do {} while (0); +#define omap2_pm_debug 0 +#endif + +#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); extern int pm_dbg_regset_save(int reg_set); extern int pm_dbg_regset_init(int reg_set); #else -#define omap2_pm_dump(mode, resume, us) do {} while (0); -#define omap2_pm_debug 0 #define pm_dbg_update_time(pwrdm, prev) do {} while (0); #define pm_dbg_regset_save(reg_set) do {} while (0); #define pm_dbg_regset_init(reg_set) do {} while (0); -- cgit v1.2.3 From e3d9329640e4b291cdd2c6d178774c28bba47d59 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Thu, 26 Nov 2009 15:18:50 +0200 Subject: OMAP3: PM: Enable wake-up from McBSP2, 3 and 4 modules Wake-up from McBSP ports are needed, especially when the THRESHOLD dma mode is in use for audio playback. Signed-off-by: Peter Ujfalusi Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm34xx.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index d6cab338cad1..96075bf5e086 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -884,12 +884,16 @@ static void __init prcm_setup_regs(void) /* Enable wakeups in PER */ prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 | OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 | - OMAP3430_EN_GPIO6 | OMAP3430_EN_UART3, + OMAP3430_EN_GPIO6 | OMAP3430_EN_UART3 | + OMAP3430_EN_MCBSP2 | OMAP3430_EN_MCBSP3 | + OMAP3430_EN_MCBSP4, OMAP3430_PER_MOD, PM_WKEN); /* and allow them to wake up MPU */ prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2 | OMAP3430_EN_GPIO3 | OMAP3430_GRPSEL_GPIO4 | OMAP3430_EN_GPIO5 | - OMAP3430_GRPSEL_GPIO6 | OMAP3430_EN_UART3, + OMAP3430_GRPSEL_GPIO6 | OMAP3430_EN_UART3 | + OMAP3430_EN_MCBSP2 | OMAP3430_EN_MCBSP3 | + OMAP3430_EN_MCBSP4, OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL); /* Don't attach IVA interrupts */ -- cgit v1.2.3 From 61b17d972f60fb8097592cadee2a2dd594285ff6 Mon Sep 17 00:00:00 2001 From: Roel Kluin Date: Wed, 16 Dec 2009 17:22:04 +0100 Subject: OMAP: omap3_pm_get_suspend_state() error ignored in pwrdm_suspend_get() val is an u64 pointer, we need an int to check the error. Signed-off-by: Roel Kluin Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm-debug.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index e9d3993d1f96..562d190cd66c 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -488,9 +488,11 @@ int pm_dbg_regset_init(int reg_set) static int pwrdm_suspend_get(void *data, u64 *val) { - *val = omap3_pm_get_suspend_state((struct powerdomain *)data); + int ret; + ret = omap3_pm_get_suspend_state((struct powerdomain *)data); + *val = ret; - if (*val >= 0) + if (ret >= 0) return 0; return *val; } -- cgit v1.2.3 From dccaad895094a699c37c065bff3fa9bb997daeb9 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Tue, 17 Nov 2009 18:34:53 +0200 Subject: OMAP3: PM: Force write last pad config register into save area Due to OMAP3 erratas 1.157, 1.185 the save of the last pad register (ETK_D14 and ETK_D15) can fail sometimes when there is simultaneous OCP access to the SCM register area. Fixed by writing the last register to the save area. Also, optimized the delay loop for the HW save to include an udelay(1), which limits the number of unnecessary HW accesses to SCM register area during the save. Signed-off-by: Tero Kristo Acked-by: Nishanth Menon Reviewed-by: Anand Gadiyar Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm34xx.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 96075bf5e086..31762ca9f117 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -126,7 +127,15 @@ static void omap3_core_save_context(void) /* wait for the save to complete */ while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS) & PADCONF_SAVE_DONE)) - ; + udelay(1); + + /* + * Force write last pad into memory, as this can fail in some + * cases according to erratas 1.157, 1.185 + */ + omap_ctrl_writel(omap_ctrl_readl(OMAP343X_PADCONF_ETK_D14), + OMAP343X_CONTROL_MEM_WKUP + 0x2a0); + /* Save the Interrupt controller context */ omap_intc_save_context(); /* Save the GPMC context */ -- cgit v1.2.3 From b92c5721d28507738d294e9a582eb6232ec6abad Mon Sep 17 00:00:00 2001 From: Subramani Venkatesh Date: Tue, 22 Dec 2009 15:07:50 +0530 Subject: OMAP3: PM: DSS PM_WKEN to refill DMA Currently, DSS does not wakeup when there is a DMA request. DSS wake up event must be enabled so that the DMA request to refill the FIFO will wake up the CORE domain. Signed-off-by: Subramani Venkatesh Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm34xx.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 31762ca9f117..910a7acf542d 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -890,6 +890,10 @@ static void __init prcm_setup_regs(void) prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN, OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); + /* Enable PM_WKEN to support DSS LPR */ + prm_write_mod_reg(OMAP3430_PM_WKEN_DSS_EN_DSS, + OMAP3430_DSS_MOD, PM_WKEN); + /* Enable wakeups in PER */ prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 | OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 | -- cgit v1.2.3 From 6b34f9d4e60a4fb9f847533a207e31316603e840 Mon Sep 17 00:00:00 2001 From: Sergio Aguirre Date: Thu, 14 Jan 2010 11:01:15 -0600 Subject: PM debug: Fix warning when no CONFIG_DEBUG_FS Fix following warning when CONFIG_DEBUG_FS wasn't selected: arch/arm/mach-omap2/pm-debug.c:57: warning: 'pm_dbg_init' declared 'static' but never defined Signed-off-by: Sergio Aguirre Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm-debug.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 562d190cd66c..a0866268aa41 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -54,8 +54,6 @@ int omap2_pm_debug; regs[reg_count++].val = \ __raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off))) -static int __init pm_dbg_init(void); - void omap2_pm_dump(int mode, int resume, unsigned int us) { struct reg { @@ -167,6 +165,8 @@ struct dentry *pm_dbg_dir; static int pm_dbg_init_done; +static int __init pm_dbg_init(void); + enum { DEBUG_FILE_COUNTERS = 0, DEBUG_FILE_TIMERS, -- cgit v1.2.3 From 74005a2b116203f618fe784d88ad7e6071bb1554 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Fri, 29 Jan 2010 14:20:06 -0800 Subject: OMAP2/3: IRQ: ensure valid base address Ensure valid base address during IRQ init. Fixes compiler warning about potential use of uninitialized variable. Signed-off-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 27054025da2b..26aeef560aa3 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -194,7 +194,7 @@ void __init omap_init_irq(void) int i; for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { - unsigned long base; + unsigned long base = 0; struct omap_irq_bank *bank = irq_banks + i; if (cpu_is_omap24xx()) @@ -202,6 +202,8 @@ void __init omap_init_irq(void) else if (cpu_is_omap34xx()) base = OMAP34XX_IC_BASE; + BUG_ON(!base); + /* Static mapping, never released */ bank->base_reg = ioremap(base, SZ_4K); if (!bank->base_reg) { -- cgit v1.2.3 From 8d08436d782d177747a0fac1e1455a44b932b7c6 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Fri, 29 Jan 2010 14:20:06 -0800 Subject: OMAP2/3: GPMC: ensure valid clock pointer Ensure valid clock pointer during GPMC init. Fixes compiler warning about potential use of uninitialized variable. Signed-off-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/gpmc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 3f1334f62e7a..7027cdc1ba49 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -505,7 +505,7 @@ static void __init gpmc_mem_init(void) void __init gpmc_init(void) { u32 l; - char *ck; + char *ck = NULL; if (cpu_is_omap24xx()) { ck = "core_l3_ck"; @@ -521,6 +521,9 @@ void __init gpmc_init(void) l = OMAP44XX_GPMC_BASE; } + if (WARN_ON(!ck)) + return; + gpmc_l3_clk = clk_get(NULL, ck); if (IS_ERR(gpmc_l3_clk)) { printk(KERN_ERR "Could not get GPMC clock %s\n", ck); -- cgit v1.2.3 From 9ecef433204f9b06550dd45cf84f14706f8fe4f0 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 1 Feb 2010 11:22:54 -0800 Subject: omap: Fix 3630 mux errors 3630 has more mux signals than 34xx. The additional pins exist in omap36xx_cbp_subset, but are not initialized as the superset is missing these offsets. This causes the following errors during the boot: mux: Unknown entry offset 0x236 mux: Unknown entry offset 0x22e mux: Unknown entry offset 0x1ec mux: Unknown entry offset 0x1ee mux: Unknown entry offset 0x1f4 mux: Unknown entry offset 0x1f6 mux: Unknown entry offset 0x1f8 mux: Unknown entry offset 0x1fa mux: Unknown entry offset 0x1fc mux: Unknown entry offset 0x22a mux: Unknown entry offset 0x226 mux: Unknown entry offset 0x230 mux: Unknown entry offset 0x22c mux: Unknown entry offset 0x228 Fix this by adding the missing offsets to omap3 superset. Note that additionally the uninitialized pins need to be skipped on 34xx. Based on an earlier patch by Allen Pais . Reported-by: Allen Pais Signed-off-by: Allen Pais Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/mux.c | 7 +++++++ arch/arm/mach-omap2/mux34xx.c | 47 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 54 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 3f59bd12cbbf..19001dd8dd7e 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -968,6 +968,13 @@ static void __init omap_mux_init_list(struct omap_mux *superset) } #endif +#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) + if (!superset->muxnames || !superset->muxnames[0]) { + superset++; + continue; + } +#endif + entry = omap_mux_list_add(superset); if (!entry) { printk(KERN_ERR "mux: Could not add entry\n"); diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c index 68e0a595f9a1..07aa7b3c95f7 100644 --- a/arch/arm/mach-omap2/mux34xx.c +++ b/arch/arm/mach-omap2/mux34xx.c @@ -649,6 +649,53 @@ static struct omap_mux __initdata omap3_muxmodes[] = { _OMAP3_MUXENTRY(UART3_TX_IRTX, 166, "uart3_tx_irtx", NULL, NULL, NULL, "gpio_166", NULL, NULL, "safe_mode"), + + /* Only on 3630, see omap36xx_cbp_subset for the signals */ + _OMAP3_MUXENTRY(GPMC_A11, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP3_MUXENTRY(SAD2D_MBUSFLAG, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP3_MUXENTRY(SAD2D_MREAD, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP3_MUXENTRY(SAD2D_MWRITE, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP3_MUXENTRY(SAD2D_SBUSFLAG, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP3_MUXENTRY(SAD2D_SREAD, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP3_MUXENTRY(SAD2D_SWRITE, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP3_MUXENTRY(GPMC_A11, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP3_MUXENTRY(SAD2D_MCAD28, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP3_MUXENTRY(SAD2D_MCAD29, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP3_MUXENTRY(SAD2D_MCAD32, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP3_MUXENTRY(SAD2D_MCAD33, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP3_MUXENTRY(SAD2D_MCAD34, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP3_MUXENTRY(SAD2D_MCAD35, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), + _OMAP3_MUXENTRY(SAD2D_MCAD36, 0, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL), { .reg_offset = OMAP_MUX_TERMINATOR }, }; -- cgit v1.2.3 From 78737ae1b0f0b425e8eb72a9c84125fa8cac8e8e Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 1 Feb 2010 13:03:42 -0800 Subject: omap: Fix arch/arm/mach-omap2/mux.c: Off by one error David Binderman ran the sourceforge tool cppcheck over the source code of the new Linux kernel 2.6.33-rc6: [./arm/mach-omap2/mux.c:492]: (error) Buffer access out-of-bounds 13 characters + 1 digit + 1 zero byte is more than 14 characters. Also add a comment on mode0 name length in case new omaps start using longer names. Reported-by: David Binderman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/mux.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 19001dd8dd7e..5fedc50c58e4 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -486,7 +486,7 @@ int __init omap_mux_init_signal(char *muxname, int val) static inline void omap_mux_decode(struct seq_file *s, u16 val) { char *flags[OMAP_MUX_MAX_NR_FLAGS]; - char mode[14]; + char mode[sizeof("OMAP_MUX_MODE") + 1]; int i = -1; sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7); @@ -553,6 +553,7 @@ static int omap_mux_dbg_board_show(struct seq_file *s, void *unused) if (!m0_name) continue; + /* REVISIT: Needs to be updated if mode0 names get longer */ for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) { if (m0_name[i] == '\0') { m0_def[i] = m0_name[i]; -- cgit v1.2.3 From 301fe8eeee02c570c5bd30537aff9456f7f7955c Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 1 Feb 2010 12:34:31 -0800 Subject: omap: Disable serial port autoidle by default Currently the omap serial clocks are autoidled after 5 seconds. However, this causes lost characters on the serial ports. As this is considered non-standard behaviour for Linux, disable the timeout. Note that this will also cause blocking of any deeper omap sleep states. To enable the autoidling of the serial ports, do something like this for each serial port: # echo 5 > /sys/devices/platform/serial8250.0/sleep_timeout # echo 5 > /sys/devices/platform/serial8250.1/sleep_timeout ... Signed-off-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/serial.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 8c964bec8159..e10a02df6e1d 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -36,7 +36,13 @@ #define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52 #define UART_OMAP_WER 0x17 /* Wake-up enable register */ -#define DEFAULT_TIMEOUT (5 * HZ) +/* + * NOTE: By default the serial timeout is disabled as it causes lost characters + * over the serial ports. This means that the UART clocks will stay on until + * disabled via sysfs. This also causes that any deeper omap sleep states are + * blocked. + */ +#define DEFAULT_TIMEOUT 0 struct omap_uart_state { int num; @@ -422,7 +428,8 @@ static void omap_uart_idle_init(struct omap_uart_state *uart) uart->timeout = DEFAULT_TIMEOUT; setup_timer(&uart->timer, omap_uart_idle_timer, (unsigned long) uart); - mod_timer(&uart->timer, jiffies + uart->timeout); + if (uart->timeout) + mod_timer(&uart->timer, jiffies + uart->timeout); omap_uart_smart_idle_enable(uart, 0); if (cpu_is_omap34xx()) { -- cgit v1.2.3