From 176da6c766ce3d5d8c88a7afdaefcc5fd6d8afac Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:31 -0700 Subject: arm: omap: irq: make omap_irq_base global This is in preparation for removing the pointless irq_banks array. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 604a976abf14..ae082c603445 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -68,6 +68,7 @@ static struct omap_irq_bank { }; static struct irq_domain *domain; +static void __iomem *omap_irq_base; /* Structure to save interrupt controller context */ struct omap3_intc_regs { @@ -161,7 +162,6 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) static void __init omap_init_irq(u32 base, int nr_irqs, struct device_node *node) { - void __iomem *omap_irq_base; unsigned long nr_of_irqs = 0; unsigned int nr_banks = 0; int i, j, irq_base; -- cgit v1.2.3 From 33c7c7b7f2eb76520cd8ddcb7fe458383783e0f8 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:32 -0700 Subject: arm: omap: irq: define INTC_ILR0 register this is currently used as a hardcoded 0x100 offset. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index ae082c603445..bae03290cad4 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -41,6 +41,7 @@ #define INTC_MIR_CLEAR0 0x0088 #define INTC_MIR_SET0 0x008c #define INTC_PENDING_IRQ0 0x0098 +#define INTC_ILR0 0x0100 /* Number of IRQ state bits in each MIR register */ #define IRQ_BITS_PER_REG 32 -- cgit v1.2.3 From 71be00c90aba446779ea35a9740973a9be594257 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:32 -0700 Subject: arm: omap: irq: start to remove irq_banks array We have a single bank in that array, this patch is in preparation to remove that array. It just shifts everything to a new set of functions for register IO while also removing old ones. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 64 ++++++++++++++++++++--------------------------- 1 file changed, 27 insertions(+), 37 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index bae03290cad4..652c15bff176 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -82,21 +82,20 @@ struct omap3_intc_regs { }; /* INTC bank register get/set */ - -static void intc_bank_write_reg(u32 val, struct omap_irq_bank *bank, u16 reg) +static void intc_writel(u32 reg, u32 val) { - writel_relaxed(val, bank->base_reg + reg); + writel_relaxed(val, omap_irq_base + reg); } -static u32 intc_bank_read_reg(struct omap_irq_bank *bank, u16 reg) +static u32 intc_readl(u32 reg) { - return readl_relaxed(bank->base_reg + reg); + return readl_relaxed(omap_irq_base + reg); } /* XXX: FIQ and additional INTC support (only MPU at the moment) */ static void omap_ack_irq(struct irq_data *d) { - intc_bank_write_reg(0x1, &irq_banks[0], INTC_CONTROL); + intc_writel(INTC_CONTROL, 0x1); } static void omap_mask_ack_irq(struct irq_data *d) @@ -109,19 +108,19 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) { unsigned long tmp; - tmp = intc_bank_read_reg(bank, INTC_REVISION) & 0xff; + tmp = intc_readl(INTC_REVISION) & 0xff; pr_info("IRQ: Found an INTC at 0x%p (revision %ld.%ld) with %d interrupts\n", bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); - tmp = intc_bank_read_reg(bank, INTC_SYSCONFIG); + tmp = intc_readl(INTC_SYSCONFIG); tmp |= 1 << 1; /* soft reset */ - intc_bank_write_reg(tmp, bank, INTC_SYSCONFIG); + intc_writel(INTC_SYSCONFIG, tmp); - while (!(intc_bank_read_reg(bank, INTC_SYSSTATUS) & 0x1)) + while (!(intc_readl(INTC_SYSSTATUS) & 0x1)) /* Wait for reset to complete */; /* Enable autoidle */ - intc_bank_write_reg(1 << 0, bank, INTC_SYSCONFIG); + intc_writel(INTC_SYSCONFIG, 1 << 0); } int omap_irq_pending(void) @@ -133,7 +132,7 @@ int omap_irq_pending(void) int irq; for (irq = 0; irq < bank->nr_irqs; irq += 32) - if (intc_bank_read_reg(bank, INTC_PENDING_IRQ0 + + if (intc_readl(INTC_PENDING_IRQ0 + ((irq >> 5) << 5))) return 1; } @@ -307,22 +306,20 @@ void omap_intc_save_context(void) { int ind = 0, i = 0; for (ind = 0; ind < ARRAY_SIZE(irq_banks); ind++) { - struct omap_irq_bank *bank = irq_banks + ind; intc_context[ind].sysconfig = - intc_bank_read_reg(bank, INTC_SYSCONFIG); + intc_readl(INTC_SYSCONFIG); intc_context[ind].protection = - intc_bank_read_reg(bank, INTC_PROTECTION); + intc_readl(INTC_PROTECTION); intc_context[ind].idle = - intc_bank_read_reg(bank, INTC_IDLE); + intc_readl(INTC_IDLE); intc_context[ind].threshold = - intc_bank_read_reg(bank, INTC_THRESHOLD); + intc_readl(INTC_THRESHOLD); for (i = 0; i < INTCPS_NR_IRQS; i++) intc_context[ind].ilr[i] = - intc_bank_read_reg(bank, (0x100 + 0x4*i)); + intc_readl((INTC_ILR0 + 0x4 * i)); for (i = 0; i < INTCPS_NR_MIR_REGS; i++) intc_context[ind].mir[i] = - intc_bank_read_reg(&irq_banks[0], INTC_MIR0 + - (0x20 * i)); + intc_readl(INTC_MIR0 + (0x20 * i)); } } @@ -331,23 +328,16 @@ void omap_intc_restore_context(void) int ind = 0, i = 0; for (ind = 0; ind < ARRAY_SIZE(irq_banks); ind++) { - struct omap_irq_bank *bank = irq_banks + ind; - intc_bank_write_reg(intc_context[ind].sysconfig, - bank, INTC_SYSCONFIG); - intc_bank_write_reg(intc_context[ind].sysconfig, - bank, INTC_SYSCONFIG); - intc_bank_write_reg(intc_context[ind].protection, - bank, INTC_PROTECTION); - intc_bank_write_reg(intc_context[ind].idle, - bank, INTC_IDLE); - intc_bank_write_reg(intc_context[ind].threshold, - bank, INTC_THRESHOLD); + intc_writel(INTC_SYSCONFIG, intc_context[ind].sysconfig); + intc_writel(INTC_PROTECTION, intc_context[ind].protection); + intc_writel(INTC_IDLE, intc_context[ind].idle); + intc_writel(INTC_THRESHOLD, intc_context[ind].threshold); for (i = 0; i < INTCPS_NR_IRQS; i++) - intc_bank_write_reg(intc_context[ind].ilr[i], - bank, (0x100 + 0x4*i)); + intc_writel(INTC_ILR0 + 0x4 * i, + intc_context[ind].ilr[i]); for (i = 0; i < INTCPS_NR_MIR_REGS; i++) - intc_bank_write_reg(intc_context[ind].mir[i], - &irq_banks[0], INTC_MIR0 + (0x20 * i)); + intc_writel(INTC_MIR0 + 0x20 * i, + intc_context[ind].mir[i]); } /* MIRs are saved and restore with other PRCM registers */ } @@ -364,13 +354,13 @@ void omap3_intc_prepare_idle(void) * Disable autoidle as it can stall interrupt controller, * cf. errata ID i540 for 3430 (all revisions up to 3.1.x) */ - intc_bank_write_reg(0, &irq_banks[0], INTC_SYSCONFIG); + intc_writel(INTC_SYSCONFIG, 0); } void omap3_intc_resume_idle(void) { /* Re-enable autoidle */ - intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG); + intc_writel(INTC_SYSCONFIG, 1); } asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs) -- cgit v1.2.3 From 421b090c83280f9f47d7c2532a6a0ba35446d6b1 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:34 -0700 Subject: arm: omap: irq: add a global omap_nr_irqs variable this will cache number of irqs. Also in preparation for removal of irq_banks array. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 652c15bff176..82b8d383ab9c 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -70,6 +70,7 @@ static struct omap_irq_bank { static struct irq_domain *domain; static void __iomem *omap_irq_base; +static int omap_nr_irqs = 96; /* Structure to save interrupt controller context */ struct omap3_intc_regs { @@ -170,6 +171,8 @@ static void __init omap_init_irq(u32 base, int nr_irqs, if (WARN_ON(!omap_irq_base)) return; + omap_nr_irqs = nr_irqs; + irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0); if (irq_base < 0) { pr_warn("Couldn't allocate IRQ numbers\n"); -- cgit v1.2.3 From a88ab43083c6f3cb518f63cc5f53d8304092efc0 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:35 -0700 Subject: arm: omap: irq: remove rest of irq_banks usage now we can finally remove the pointless irq_banks array. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 128 +++++++++++++++++----------------------------- 1 file changed, 47 insertions(+), 81 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 82b8d383ab9c..5ea7def91ab0 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -49,8 +49,8 @@ #define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) #define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */ #define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */ +#define INTCPS_NR_ILR_REGS 128 #define INTCPS_NR_MIR_REGS 3 -#define INTCPS_NR_IRQS 96 /* * OMAP2 has a number of different interrupt controllers, each interrupt @@ -58,15 +58,6 @@ * fairly consistent for each bank, but not all registers are implemented * for each bank.. when in doubt, consult the TRM. */ -static struct omap_irq_bank { - void __iomem *base_reg; - unsigned int nr_irqs; -} __attribute__ ((aligned(4))) irq_banks[] = { - { - /* MPU INTC */ - .nr_irqs = 96, - }, -}; static struct irq_domain *domain; static void __iomem *omap_irq_base; @@ -78,7 +69,7 @@ struct omap3_intc_regs { u32 protection; u32 idle; u32 threshold; - u32 ilr[INTCPS_NR_IRQS]; + u32 ilr[INTCPS_NR_ILR_REGS]; u32 mir[INTCPS_NR_MIR_REGS]; }; @@ -105,13 +96,14 @@ static void omap_mask_ack_irq(struct irq_data *d) omap_ack_irq(d); } -static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) +static void __init omap_irq_soft_reset(void) { unsigned long tmp; tmp = intc_readl(INTC_REVISION) & 0xff; + pr_info("IRQ: Found an INTC at 0x%p (revision %ld.%ld) with %d interrupts\n", - bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); + omap_irq_base, tmp >> 4, tmp & 0xf, omap_nr_irqs); tmp = intc_readl(INTC_SYSCONFIG); tmp |= 1 << 1; /* soft reset */ @@ -126,17 +118,12 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) int omap_irq_pending(void) { - int i; + int irq; - for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { - struct omap_irq_bank *bank = irq_banks + i; - int irq; - - for (irq = 0; irq < bank->nr_irqs; irq += 32) - if (intc_readl(INTC_PENDING_IRQ0 + - ((irq >> 5) << 5))) - return 1; - } + for (irq = 0; irq < omap_nr_irqs; irq += 32) + if (intc_readl(INTC_PENDING_IRQ0 + + ((irq >> 5) << 5))) + return 1; return 0; } @@ -163,9 +150,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) static void __init omap_init_irq(u32 base, int nr_irqs, struct device_node *node) { - unsigned long nr_of_irqs = 0; - unsigned int nr_banks = 0; - int i, j, irq_base; + int j, irq_base; omap_irq_base = ioremap(base, SZ_4K); if (WARN_ON(!omap_irq_base)) @@ -180,31 +165,12 @@ static void __init omap_init_irq(u32 base, int nr_irqs, } domain = irq_domain_add_legacy(node, nr_irqs, irq_base, 0, - &irq_domain_simple_ops, NULL); - - for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { - struct omap_irq_bank *bank = irq_banks + i; - - bank->nr_irqs = nr_irqs; - - /* Static mapping, never released */ - bank->base_reg = ioremap(base, SZ_4K); - if (!bank->base_reg) { - pr_err("Could not ioremap irq bank%i\n", i); - continue; - } - - omap_irq_bank_init_one(bank); + &irq_domain_simple_ops, NULL); - for (j = 0; j < bank->nr_irqs; j += 32) - omap_alloc_gc(bank->base_reg + j, j + irq_base, 32); + omap_irq_soft_reset(); - nr_of_irqs += bank->nr_irqs; - nr_banks++; - } - - pr_info("Total of %ld interrupts on %d active controller%s\n", - nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); + for (j = 0; j < omap_nr_irqs; j += 32) + omap_alloc_gc(omap_irq_base + j, j + irq_base, 32); } void __init omap2_init_irq(void) @@ -303,45 +269,45 @@ void __init omap_intc_of_init(void) } #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) -static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; +static struct omap3_intc_regs intc_context; void omap_intc_save_context(void) { - int ind = 0, i = 0; - for (ind = 0; ind < ARRAY_SIZE(irq_banks); ind++) { - intc_context[ind].sysconfig = - intc_readl(INTC_SYSCONFIG); - intc_context[ind].protection = - intc_readl(INTC_PROTECTION); - intc_context[ind].idle = - intc_readl(INTC_IDLE); - intc_context[ind].threshold = - intc_readl(INTC_THRESHOLD); - for (i = 0; i < INTCPS_NR_IRQS; i++) - intc_context[ind].ilr[i] = - intc_readl((INTC_ILR0 + 0x4 * i)); - for (i = 0; i < INTCPS_NR_MIR_REGS; i++) - intc_context[ind].mir[i] = - intc_readl(INTC_MIR0 + (0x20 * i)); - } + int i; + + intc_context.sysconfig = + intc_readl(INTC_SYSCONFIG); + intc_context.protection = + intc_readl(INTC_PROTECTION); + intc_context.idle = + intc_readl(INTC_IDLE); + intc_context.threshold = + intc_readl(INTC_THRESHOLD); + + for (i = 0; i < omap_nr_irqs; i++) + intc_context.ilr[i] = + intc_readl((INTC_ILR0 + 0x4 * i)); + for (i = 0; i < INTCPS_NR_MIR_REGS; i++) + intc_context.mir[i] = + intc_readl(INTC_MIR0 + (0x20 * i)); } void omap_intc_restore_context(void) { - int ind = 0, i = 0; - - for (ind = 0; ind < ARRAY_SIZE(irq_banks); ind++) { - intc_writel(INTC_SYSCONFIG, intc_context[ind].sysconfig); - intc_writel(INTC_PROTECTION, intc_context[ind].protection); - intc_writel(INTC_IDLE, intc_context[ind].idle); - intc_writel(INTC_THRESHOLD, intc_context[ind].threshold); - for (i = 0; i < INTCPS_NR_IRQS; i++) - intc_writel(INTC_ILR0 + 0x4 * i, - intc_context[ind].ilr[i]); - for (i = 0; i < INTCPS_NR_MIR_REGS; i++) - intc_writel(INTC_MIR0 + 0x20 * i, - intc_context[ind].mir[i]); - } + int i; + + intc_writel(INTC_SYSCONFIG, intc_context.sysconfig); + intc_writel(INTC_PROTECTION, intc_context.protection); + intc_writel(INTC_IDLE, intc_context.idle); + intc_writel(INTC_THRESHOLD, intc_context.threshold); + + for (i = 0; i < omap_nr_irqs; i++) + intc_writel(INTC_ILR0 + 0x4 * i, + intc_context.ilr[i]); + + for (i = 0; i < INTCPS_NR_MIR_REGS; i++) + intc_writel(INTC_MIR0 + 0x20 * i, + intc_context.mir[i]); /* MIRs are saved and restore with other PRCM registers */ } -- cgit v1.2.3 From 33ca0be0836c834ceba12761b506ff73cf46a376 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:37 -0700 Subject: arm: omap: irq: remove unused macro no functional changes. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 5ea7def91ab0..39afbd5c1cfe 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -42,8 +42,6 @@ #define INTC_MIR_SET0 0x008c #define INTC_PENDING_IRQ0 0x0098 #define INTC_ILR0 0x0100 -/* Number of IRQ state bits in each MIR register */ -#define IRQ_BITS_PER_REG 32 #define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) #define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) -- cgit v1.2.3 From 1198365625bf22294263267df3360cb2a4c76f2d Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:37 -0700 Subject: arm: omap: irq: switch over to intc_readl on omap_intc_handle_irq an almost blind conversion from readl_relaxed to our newly introduced intc_readl(). While at that, also remove some hardcoded register addresses. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 39afbd5c1cfe..e1fc4f7c3eb5 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -41,11 +41,13 @@ #define INTC_MIR_CLEAR0 0x0088 #define INTC_MIR_SET0 0x008c #define INTC_PENDING_IRQ0 0x0098 +#define INTC_PENDING_IRQ1 0x00b8 +#define INTC_PENDING_IRQ2 0x00d8 +#define INTC_PENDING_IRQ3 0x00f8 #define INTC_ILR0 0x0100 #define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) #define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) -#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */ #define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */ #define INTCPS_NR_ILR_REGS 128 #define INTCPS_NR_MIR_REGS 3 @@ -192,26 +194,26 @@ static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs int handled_irq = 0; do { - irqnr = readl_relaxed(base_addr + 0x98); + irqnr = intc_readl(INTC_PENDING_IRQ0); if (irqnr) goto out; - irqnr = readl_relaxed(base_addr + 0xb8); + irqnr = intc_readl(INTC_PENDING_IRQ1); if (irqnr) goto out; - irqnr = readl_relaxed(base_addr + 0xd8); + irqnr = intc_readl(INTC_PENDING_IRQ2); #if IS_ENABLED(CONFIG_SOC_TI81XX) || IS_ENABLED(CONFIG_SOC_AM33XX) if (irqnr) goto out; - irqnr = readl_relaxed(base_addr + 0xf8); + irqnr = intc_readl(INTC_PENDING_IRQ3); #endif out: if (!irqnr) break; - irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET); + irqnr = intc_readl(INTC_SIR); irqnr &= ACTIVEIRQ_MASK; if (irqnr) { -- cgit v1.2.3 From d1e66d69616db9325f397e004c54042622d48e83 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:37 -0700 Subject: arm: omap: irq: remove unnecessary base_addr argument omap_intc_handle_irq now had an unnecessary base_addr argument. Let's remove it and fix all callers. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index e1fc4f7c3eb5..718b776db61e 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -46,8 +46,6 @@ #define INTC_PENDING_IRQ3 0x00f8 #define INTC_ILR0 0x0100 -#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) -#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) #define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */ #define INTCPS_NR_ILR_REGS 128 #define INTCPS_NR_MIR_REGS 3 @@ -188,7 +186,7 @@ void __init ti81xx_init_irq(void) omap_init_irq(OMAP34XX_IC_BASE, 128, NULL); } -static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs) +static inline void omap_intc_handle_irq(struct pt_regs *regs) { u32 irqnr; int handled_irq = 0; @@ -232,8 +230,7 @@ out: asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs) { - void __iomem *base_addr = OMAP2_IRQ_BASE; - omap_intc_handle_irq(base_addr, regs); + omap_intc_handle_irq(regs); } int __init intc_of_init(struct device_node *node, @@ -334,7 +331,6 @@ void omap3_intc_resume_idle(void) asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs) { - void __iomem *base_addr = OMAP3_IRQ_BASE; - omap_intc_handle_irq(base_addr, regs); + omap_intc_handle_irq(regs); } #endif /* CONFIG_ARCH_OMAP3 */ -- cgit v1.2.3 From 272a8b04aba793347476ed768c5a2fe4fce046f9 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:38 -0700 Subject: arm: omap: irq: rename omap3_intc_regs just to make it clearer that it can be used on all omaps. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 718b776db61e..1b3000618e64 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -62,7 +62,7 @@ static void __iomem *omap_irq_base; static int omap_nr_irqs = 96; /* Structure to save interrupt controller context */ -struct omap3_intc_regs { +struct omap_intc_regs { u32 sysconfig; u32 protection; u32 idle; @@ -266,7 +266,7 @@ void __init omap_intc_of_init(void) } #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) -static struct omap3_intc_regs intc_context; +static struct omap_intc_regs intc_context; void omap_intc_save_context(void) { -- cgit v1.2.3 From f8cc9eaf26dc026f134996a0cc6e1d1ce157ce9c Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:40 -0700 Subject: arm: omap: irq: always define omap3 support remove ifdef around omap3 INTC support. This will make it easier to reuse code for PM. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 1b3000618e64..4e8705d3d8d8 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -265,7 +265,6 @@ void __init omap_intc_of_init(void) of_irq_init(irq_match); } -#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) static struct omap_intc_regs intc_context; void omap_intc_save_context(void) @@ -333,4 +332,3 @@ asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs { omap_intc_handle_irq(regs); } -#endif /* CONFIG_ARCH_OMAP3 */ -- cgit v1.2.3 From 131b48c061726d4ac98f70a2beae35280a8de5cf Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:42 -0700 Subject: arm: omap: irq: reorganize code a little bit no functional changes, just moving code around. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 133 +++++++++++++++++++++++----------------------- 1 file changed, 66 insertions(+), 67 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 4e8705d3d8d8..480a9a7c8445 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -57,10 +57,6 @@ * for each bank.. when in doubt, consult the TRM. */ -static struct irq_domain *domain; -static void __iomem *omap_irq_base; -static int omap_nr_irqs = 96; - /* Structure to save interrupt controller context */ struct omap_intc_regs { u32 sysconfig; @@ -70,6 +66,11 @@ struct omap_intc_regs { u32 ilr[INTCPS_NR_ILR_REGS]; u32 mir[INTCPS_NR_MIR_REGS]; }; +static struct omap_intc_regs intc_context; + +static struct irq_domain *domain; +static void __iomem *omap_irq_base; +static int omap_nr_irqs = 96; /* INTC bank register get/set */ static void intc_writel(u32 reg, u32 val) @@ -82,6 +83,61 @@ static u32 intc_readl(u32 reg) return readl_relaxed(omap_irq_base + reg); } +void omap_intc_save_context(void) +{ + int i; + + intc_context.sysconfig = + intc_readl(INTC_SYSCONFIG); + intc_context.protection = + intc_readl(INTC_PROTECTION); + intc_context.idle = + intc_readl(INTC_IDLE); + intc_context.threshold = + intc_readl(INTC_THRESHOLD); + + for (i = 0; i < omap_nr_irqs; i++) + intc_context.ilr[i] = + intc_readl((INTC_ILR0 + 0x4 * i)); + for (i = 0; i < INTCPS_NR_MIR_REGS; i++) + intc_context.mir[i] = + intc_readl(INTC_MIR0 + (0x20 * i)); +} + +void omap_intc_restore_context(void) +{ + int i; + + intc_writel(INTC_SYSCONFIG, intc_context.sysconfig); + intc_writel(INTC_PROTECTION, intc_context.protection); + intc_writel(INTC_IDLE, intc_context.idle); + intc_writel(INTC_THRESHOLD, intc_context.threshold); + + for (i = 0; i < omap_nr_irqs; i++) + intc_writel(INTC_ILR0 + 0x4 * i, + intc_context.ilr[i]); + + for (i = 0; i < INTCPS_NR_MIR_REGS; i++) + intc_writel(INTC_MIR0 + 0x20 * i, + intc_context.mir[i]); + /* MIRs are saved and restore with other PRCM registers */ +} + +void omap3_intc_prepare_idle(void) +{ + /* + * Disable autoidle as it can stall interrupt controller, + * cf. errata ID i540 for 3430 (all revisions up to 3.1.x) + */ + intc_writel(INTC_SYSCONFIG, 0); +} + +void omap3_intc_resume_idle(void) +{ + /* Re-enable autoidle */ + intc_writel(INTC_SYSCONFIG, 1); +} + /* XXX: FIQ and additional INTC support (only MPU at the moment) */ static void omap_ack_irq(struct irq_data *d) { @@ -125,6 +181,12 @@ int omap_irq_pending(void) return 0; } +void omap3_intc_suspend(void) +{ + /* A pending interrupt would prevent OMAP from entering suspend */ + omap_ack_irq(NULL); +} + static __init void omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) { @@ -265,69 +327,6 @@ void __init omap_intc_of_init(void) of_irq_init(irq_match); } -static struct omap_intc_regs intc_context; - -void omap_intc_save_context(void) -{ - int i; - - intc_context.sysconfig = - intc_readl(INTC_SYSCONFIG); - intc_context.protection = - intc_readl(INTC_PROTECTION); - intc_context.idle = - intc_readl(INTC_IDLE); - intc_context.threshold = - intc_readl(INTC_THRESHOLD); - - for (i = 0; i < omap_nr_irqs; i++) - intc_context.ilr[i] = - intc_readl((INTC_ILR0 + 0x4 * i)); - for (i = 0; i < INTCPS_NR_MIR_REGS; i++) - intc_context.mir[i] = - intc_readl(INTC_MIR0 + (0x20 * i)); -} - -void omap_intc_restore_context(void) -{ - int i; - - intc_writel(INTC_SYSCONFIG, intc_context.sysconfig); - intc_writel(INTC_PROTECTION, intc_context.protection); - intc_writel(INTC_IDLE, intc_context.idle); - intc_writel(INTC_THRESHOLD, intc_context.threshold); - - for (i = 0; i < omap_nr_irqs; i++) - intc_writel(INTC_ILR0 + 0x4 * i, - intc_context.ilr[i]); - - for (i = 0; i < INTCPS_NR_MIR_REGS; i++) - intc_writel(INTC_MIR0 + 0x20 * i, - intc_context.mir[i]); - /* MIRs are saved and restore with other PRCM registers */ -} - -void omap3_intc_suspend(void) -{ - /* A pending interrupt would prevent OMAP from entering suspend */ - omap_ack_irq(NULL); -} - -void omap3_intc_prepare_idle(void) -{ - /* - * Disable autoidle as it can stall interrupt controller, - * cf. errata ID i540 for 3430 (all revisions up to 3.1.x) - */ - intc_writel(INTC_SYSCONFIG, 0); -} - -void omap3_intc_resume_idle(void) -{ - /* Re-enable autoidle */ - intc_writel(INTC_SYSCONFIG, 1); -} - asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs) { omap_intc_handle_irq(regs); -- cgit v1.2.3 From 00b6b031ab527afa2981bdffea7752279a290c26 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:43 -0700 Subject: arm: omap: irq: make intc_of_init static nobody uses that function outside of this file, so we don't need to expose it. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/common.h | 10 ---------- arch/arm/mach-omap2/irq.c | 2 +- 2 files changed, 1 insertion(+), 11 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 98fe235f6670..34ab9ee9ee43 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -229,16 +229,6 @@ extern void __iomem *omap4_get_l2cache_base(void); #endif struct device_node; -#ifdef CONFIG_OF -int __init intc_of_init(struct device_node *node, - struct device_node *parent); -#else -int __init intc_of_init(struct device_node *node, - struct device_node *parent) -{ - return 0; -} -#endif #ifdef CONFIG_SMP extern void __iomem *omap4_get_scu_base(void); diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 480a9a7c8445..fc886e2e0283 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -295,7 +295,7 @@ asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs omap_intc_handle_irq(regs); } -int __init intc_of_init(struct device_node *node, +static int __init intc_of_init(struct device_node *node, struct device_node *parent) { struct resource res; -- cgit v1.2.3 From b15c76b74896f1a2c60fff13fdf20d07468de323 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:43 -0700 Subject: arm: omap: irq: call set_handle_irq() from intc_of_init this will let us drop .handle_irq and .init_irq fields from our generic machine_descs. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index fc886e2e0283..ee9f1e810700 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -314,6 +314,8 @@ static int __init intc_of_init(struct device_node *node, omap_init_irq(res.start, nr_irq, of_node_get(node)); + set_handle_irq(omap2_intc_handle_irq); + return 0; } -- cgit v1.2.3 From b65ecd46125929941076e7af77b5e685a332c33c Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:43 -0700 Subject: arm: omap: irq: use IRQCHIP_DECLARE macro IRQCHIP_DECLARE macro is used to declare the same of_device_id structure for irqchips, it's just a helper. No functional changes. Note that we're temporarily including irqchip.h with its full path, until we move this driver to drivers/irqchip/. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index ee9f1e810700..280124371c07 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -26,6 +26,7 @@ #include "soc.h" #include "iomap.h" #include "common.h" +#include "../../drivers/irqchip/irqchip.h" /* selected INTC register offsets */ @@ -319,14 +320,11 @@ static int __init intc_of_init(struct device_node *node, return 0; } -static const struct of_device_id irq_match[] __initconst = { - { .compatible = "ti,omap2-intc", .data = intc_of_init, }, - { } -}; +IRQCHIP_DECLARE(omap_intc, "ti,omap2-intc", intc_of_init); void __init omap_intc_of_init(void) { - of_irq_init(irq_match); + of_irq_init(&irqchip_of_match_omap_intc); } asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs) -- cgit v1.2.3 From e66c49b515aa4cbd621a4844f980ff487327aa7d Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:45 -0700 Subject: arm: omap: irq: drop .handle_irq and .init_irq fields now we can safely drop those fields from our machine_desc. While at that, also drop the now unused omap_intc_of_init() definition. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-generic.c | 14 -------------- arch/arm/mach-omap2/common.h | 1 - arch/arm/mach-omap2/irq.c | 5 ----- 3 files changed, 20 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 0b311d51425f..495305903401 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -52,8 +52,6 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap242x_map_io, .init_early = omap2420_init_early, - .init_irq = omap_intc_of_init, - .handle_irq = omap2_intc_handle_irq, .init_machine = omap_generic_init, .init_time = omap2_sync32k_timer_init, .dt_compat = omap242x_boards_compat, @@ -71,8 +69,6 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap243x_map_io, .init_early = omap2430_init_early, - .init_irq = omap_intc_of_init, - .handle_irq = omap2_intc_handle_irq, .init_machine = omap_generic_init, .init_time = omap2_sync32k_timer_init, .dt_compat = omap243x_boards_compat, @@ -91,8 +87,6 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap3430_init_early, - .init_irq = omap_intc_of_init, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap_generic_init, .init_late = omap3_init_late, .init_time = omap3_sync32k_timer_init, @@ -109,8 +103,6 @@ DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap3630_init_early, - .init_irq = omap_intc_of_init, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap_generic_init, .init_late = omap3_init_late, .init_time = omap3_sync32k_timer_init, @@ -128,8 +120,6 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap3430_init_early, - .init_irq = omap_intc_of_init, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap_generic_init, .init_late = omap3_init_late, .init_time = omap3_secure_sync32k_timer_init, @@ -146,8 +136,6 @@ DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = am35xx_init_early, - .init_irq = omap_intc_of_init, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap_generic_init, .init_late = omap3_init_late, .init_time = omap3_gptimer_timer_init, @@ -166,8 +154,6 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") .reserve = omap_reserve, .map_io = am33xx_map_io, .init_early = am33xx_init_early, - .init_irq = omap_intc_of_init, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap_generic_init, .init_late = am33xx_init_late, .init_time = omap3_gptimer_timer_init, diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 34ab9ee9ee43..ed906bcca133 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -221,7 +221,6 @@ void omap3_intc_prepare_idle(void); void omap3_intc_resume_idle(void); void omap2_intc_handle_irq(struct pt_regs *regs); void omap3_intc_handle_irq(struct pt_regs *regs); -void omap_intc_of_init(void); void omap_gic_of_init(void); #ifdef CONFIG_CACHE_L2X0 diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 280124371c07..465d7257056a 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -322,11 +322,6 @@ static int __init intc_of_init(struct device_node *node, IRQCHIP_DECLARE(omap_intc, "ti,omap2-intc", intc_of_init); -void __init omap_intc_of_init(void) -{ - of_irq_init(&irqchip_of_match_omap_intc); -} - asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs) { omap_intc_handle_irq(regs); -- cgit v1.2.3 From a35db9a4cb800f343cd4bbfeeb6568807a16aad8 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:46 -0700 Subject: arm: omap: irq: add specific compatibles for omap3 and am33xx devices with this, we can use a compatible flag to figure out how many irq lines are wired up, no need for our TI-specific ti,intc-size binding. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 465d7257056a..97845df61030 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -320,7 +320,9 @@ static int __init intc_of_init(struct device_node *node, return 0; } -IRQCHIP_DECLARE(omap_intc, "ti,omap2-intc", intc_of_init); +IRQCHIP_DECLARE(omap2_intc, "ti,omap2-intc", intc_of_init); +IRQCHIP_DECLARE(omap3_intc, "ti,omap3-intc", intc_of_init); +IRQCHIP_DECLARE(am33xx_intc, "ti,am33xx-intc", intc_of_init); asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs) { -- cgit v1.2.3 From 470f30deaeb870dcc65d2357fbb675deb3e779de Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:47 -0700 Subject: arm: omap: irq: use compatible flag to figure out number of IRQ lines so far, only am33xx has 128 lines, all other devices have only 96. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 97845df61030..7a4ead3684d9 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -310,6 +310,9 @@ static int __init intc_of_init(struct device_node *node, return -EINVAL; } + if (of_device_is_compatible(node, "ti,am33xx-intc")) + nr_irq = 128; + if (of_property_read_u32(node, "ti,intc-size", &nr_irq)) pr_warn("unable to get intc-size, default to %d\n", nr_irq); -- cgit v1.2.3 From a05d92b0940d4b96c44ed42402acc242c16fa9b5 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:48 -0700 Subject: arm: omap: irq: drop ti,intc-size support we don't need that anymore since specific devices are passing correct compatible flags. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 7a4ead3684d9..e70c26edc7fb 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -313,9 +313,6 @@ static int __init intc_of_init(struct device_node *node, if (of_device_is_compatible(node, "ti,am33xx-intc")) nr_irq = 128; - if (of_property_read_u32(node, "ti,intc-size", &nr_irq)) - pr_warn("unable to get intc-size, default to %d\n", nr_irq); - omap_init_irq(res.start, nr_irq, of_node_get(node)); set_handle_irq(omap2_intc_handle_irq); -- cgit v1.2.3 From a4d3c5d91fd109dd852351193781352f0512d0c3 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:51 -0700 Subject: arm: omap: irq: move some more code around We want .init_irq to call set_irq_handle() for legacy platforms. Note that this code will also be dropped once omap2/3 devices are completely moved to DT. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index e70c26edc7fb..587def4ef0d7 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -234,21 +234,6 @@ static void __init omap_init_irq(u32 base, int nr_irqs, omap_alloc_gc(omap_irq_base + j, j + irq_base, 32); } -void __init omap2_init_irq(void) -{ - omap_init_irq(OMAP24XX_IC_BASE, 96, NULL); -} - -void __init omap3_init_irq(void) -{ - omap_init_irq(OMAP34XX_IC_BASE, 96, NULL); -} - -void __init ti81xx_init_irq(void) -{ - omap_init_irq(OMAP34XX_IC_BASE, 128, NULL); -} - static inline void omap_intc_handle_irq(struct pt_regs *regs) { u32 irqnr; @@ -296,6 +281,21 @@ asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs omap_intc_handle_irq(regs); } +void __init omap2_init_irq(void) +{ + omap_init_irq(OMAP24XX_IC_BASE, 96, NULL); +} + +void __init omap3_init_irq(void) +{ + omap_init_irq(OMAP34XX_IC_BASE, 96, NULL); +} + +void __init ti81xx_init_irq(void) +{ + omap_init_irq(OMAP34XX_IC_BASE, 128, NULL); +} + static int __init intc_of_init(struct device_node *node, struct device_node *parent) { -- cgit v1.2.3 From be0a768596a204af6f124bffc2588457c18375fd Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:52 -0700 Subject: arm: omap: irq: call set_handle_irq() from .init_irq the idea is that board-files won't need to set .handle_irq on their machine_descs, which lets us drop a little more pointless code. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 587def4ef0d7..994009ce6001 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -284,16 +284,19 @@ asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs void __init omap2_init_irq(void) { omap_init_irq(OMAP24XX_IC_BASE, 96, NULL); + set_handle_irq(omap2_intc_handle_irq); } void __init omap3_init_irq(void) { omap_init_irq(OMAP34XX_IC_BASE, 96, NULL); + set_handle_irq(omap2_intc_handle_irq); } void __init ti81xx_init_irq(void) { omap_init_irq(OMAP34XX_IC_BASE, 128, NULL); + set_handle_irq(omap2_intc_handle_irq); } static int __init intc_of_init(struct device_node *node, -- cgit v1.2.3 From 05f1e7387c21b7075bed6ae7e7412435a7002fe4 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:52 -0700 Subject: arm: omap: irq: drop omap3_intc_handle_irq() now that we're calling set_handle_irq() from init_irq(), we can safely drop all callers to omap3_intc_handle_irq() and its definition. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-3430sdp.c | 1 - arch/arm/mach-omap2/board-am3517crane.c | 1 - arch/arm/mach-omap2/board-am3517evm.c | 1 - arch/arm/mach-omap2/board-cm-t35.c | 2 -- arch/arm/mach-omap2/board-cm-t3517.c | 1 - arch/arm/mach-omap2/board-devkit8000.c | 1 - arch/arm/mach-omap2/board-ldp.c | 1 - arch/arm/mach-omap2/board-omap3beagle.c | 1 - arch/arm/mach-omap2/board-omap3logic.c | 2 -- arch/arm/mach-omap2/board-omap3pandora.c | 1 - arch/arm/mach-omap2/board-omap3stalker.c | 1 - arch/arm/mach-omap2/board-omap3touchbook.c | 1 - arch/arm/mach-omap2/board-overo.c | 1 - arch/arm/mach-omap2/board-rx51.c | 1 - arch/arm/mach-omap2/common.h | 1 - arch/arm/mach-omap2/irq.c | 5 ----- 16 files changed, 22 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index d95d0ef1354a..d21a3048d06b 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -625,7 +625,6 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap_3430sdp_init, .init_late = omap3430_init_late, .init_time = omap3_sync32k_timer_init, diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c index 0d499a1878f6..212c3160de18 100644 --- a/arch/arm/mach-omap2/board-am3517crane.c +++ b/arch/arm/mach-omap2/board-am3517crane.c @@ -142,7 +142,6 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") .map_io = omap3_map_io, .init_early = am35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = am3517_crane_init, .init_late = am35xx_init_late, .init_time = omap3_sync32k_timer_init, diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index 4f9383cecf76..1c091b3fa312 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -366,7 +366,6 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") .map_io = omap3_map_io, .init_early = am35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = am3517_evm_init, .init_late = am35xx_init_late, .init_time = omap3_sync32k_timer_init, diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index 018353d88b96..c6df8eec4553 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -766,7 +766,6 @@ MACHINE_START(CM_T35, "Compulab CM-T35") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = cm_t35_init, .init_late = omap35xx_init_late, .init_time = omap3_sync32k_timer_init, @@ -779,7 +778,6 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730") .map_io = omap3_map_io, .init_early = omap3630_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = cm_t3730_init, .init_late = omap3630_init_late, .init_time = omap3_sync32k_timer_init, diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c index 4eb5e6f2f7f5..8a2c1677964c 100644 --- a/arch/arm/mach-omap2/board-cm-t3517.c +++ b/arch/arm/mach-omap2/board-cm-t3517.c @@ -329,7 +329,6 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") .map_io = omap3_map_io, .init_early = am35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = cm_t3517_init, .init_late = am35xx_init_late, .init_time = omap3_gptimer_timer_init, diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index cdc4fb9960a9..d8e4f346936a 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -647,7 +647,6 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = devkit8000_init, .init_late = omap35xx_init_late, .init_time = omap3_secure_sync32k_timer_init, diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 44a59c3abfb0..c2975af4cd5d 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -422,7 +422,6 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap_ldp_init, .init_late = omap3430_init_late, .init_time = omap3_sync32k_timer_init, diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index e2e52031f056..81de1c68b360 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -588,7 +588,6 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") .map_io = omap3_map_io, .init_early = omap3_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap3_beagle_init, .init_late = omap3_init_late, .init_time = omap3_secure_sync32k_timer_init, diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index bab51e64c4b5..6049f60a8813 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c @@ -230,7 +230,6 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap3logic_init, .init_late = omap35xx_init_late, .init_time = omap3_sync32k_timer_init, @@ -243,7 +242,6 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap3logic_init, .init_late = omap35xx_init_late, .init_time = omap3_sync32k_timer_init, diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index cf18340eb3bb..f32201656cf3 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -624,7 +624,6 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap3pandora_init, .init_late = omap35xx_init_late, .init_time = omap3_sync32k_timer_init, diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index a2e035e0792a..6311f4b1ee44 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -426,7 +426,6 @@ MACHINE_START(SBC3530, "OMAP3 STALKER") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap3_stalker_init, .init_late = omap35xx_init_late, .init_time = omap3_secure_sync32k_timer_init, diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index 70b904c010c6..a01993e5500f 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -388,7 +388,6 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap3_touchbook_init, .init_late = omap3430_init_late, .init_time = omap3_secure_sync32k_timer_init, diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index f6d384111911..2dae6ccd39bb 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -564,7 +564,6 @@ MACHINE_START(OVERO, "Gumstix Overo") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = overo_init, .init_late = omap35xx_init_late, .init_time = omap3_sync32k_timer_init, diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index db168c9627a1..2d1e5a6beb85 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -134,7 +134,6 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = rx51_init, .init_late = omap3430_init_late, .init_time = omap3_sync32k_timer_init, diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index ed906bcca133..7d689d230e8c 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -220,7 +220,6 @@ void omap3_intc_suspend(void); void omap3_intc_prepare_idle(void); void omap3_intc_resume_idle(void); void omap2_intc_handle_irq(struct pt_regs *regs); -void omap3_intc_handle_irq(struct pt_regs *regs); void omap_gic_of_init(void); #ifdef CONFIG_CACHE_L2X0 diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 994009ce6001..4dfeac6f2f65 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -326,8 +326,3 @@ static int __init intc_of_init(struct device_node *node, IRQCHIP_DECLARE(omap2_intc, "ti,omap2-intc", intc_of_init); IRQCHIP_DECLARE(omap3_intc, "ti,omap3-intc", intc_of_init); IRQCHIP_DECLARE(am33xx_intc, "ti,am33xx-intc", intc_of_init); - -asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs) -{ - omap_intc_handle_irq(regs); -} -- cgit v1.2.3 From 2aced8924638104d1e09ebb86f87f6ca265d325b Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:52 -0700 Subject: arm: omap: irq: drop omap2_intc_handle_irq() that was just a no-op wrapper around omap_intc_handle_irq anyway. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/common.h | 1 - arch/arm/mach-omap2/irq.c | 16 ++++++---------- 2 files changed, 6 insertions(+), 11 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 7d689d230e8c..180009343adb 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -219,7 +219,6 @@ void omap_intc_restore_context(void); void omap3_intc_suspend(void); void omap3_intc_prepare_idle(void); void omap3_intc_resume_idle(void); -void omap2_intc_handle_irq(struct pt_regs *regs); void omap_gic_of_init(void); #ifdef CONFIG_CACHE_L2X0 diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 4dfeac6f2f65..14716a88d22d 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -234,7 +234,8 @@ static void __init omap_init_irq(u32 base, int nr_irqs, omap_alloc_gc(omap_irq_base + j, j + irq_base, 32); } -static inline void omap_intc_handle_irq(struct pt_regs *regs) +static asmlinkage void __exception_irq_entry +omap_intc_handle_irq(struct pt_regs *regs) { u32 irqnr; int handled_irq = 0; @@ -276,27 +277,22 @@ out: omap_ack_irq(NULL); } -asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs) -{ - omap_intc_handle_irq(regs); -} - void __init omap2_init_irq(void) { omap_init_irq(OMAP24XX_IC_BASE, 96, NULL); - set_handle_irq(omap2_intc_handle_irq); + set_handle_irq(omap_intc_handle_irq); } void __init omap3_init_irq(void) { omap_init_irq(OMAP34XX_IC_BASE, 96, NULL); - set_handle_irq(omap2_intc_handle_irq); + set_handle_irq(omap_intc_handle_irq); } void __init ti81xx_init_irq(void) { omap_init_irq(OMAP34XX_IC_BASE, 128, NULL); - set_handle_irq(omap2_intc_handle_irq); + set_handle_irq(omap_intc_handle_irq); } static int __init intc_of_init(struct device_node *node, @@ -318,7 +314,7 @@ static int __init intc_of_init(struct device_node *node, omap_init_irq(res.start, nr_irq, of_node_get(node)); - set_handle_irq(omap2_intc_handle_irq); + set_handle_irq(omap_intc_handle_irq); return 0; } -- cgit v1.2.3 From 3384f86fe5c1074fddabeeeed72e413eb28f0fcf Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:54 -0700 Subject: arm: omap: irq: remove unnecessary header There's no need for that header to be included. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 14716a88d22d..a405b963c779 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -24,7 +24,6 @@ #include #include "soc.h" -#include "iomap.h" #include "common.h" #include "../../drivers/irqchip/irqchip.h" -- cgit v1.2.3 From a74f0a176e3e048df78816ec383b219f8ac6867e Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:55 -0700 Subject: arm: omap: irq: remove nr_irqs argument we can set our global omap_nr_irqs early on and drop the extra argument to omap_init_irq(). Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index a405b963c779..44d9cf4e74de 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -207,8 +207,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) IRQ_NOREQUEST | IRQ_NOPROBE, 0); } -static void __init omap_init_irq(u32 base, int nr_irqs, - struct device_node *node) +static void __init omap_init_irq(u32 base, struct device_node *node) { int j, irq_base; @@ -216,15 +215,13 @@ static void __init omap_init_irq(u32 base, int nr_irqs, if (WARN_ON(!omap_irq_base)) return; - omap_nr_irqs = nr_irqs; - - irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0); + irq_base = irq_alloc_descs(-1, 0, omap_nr_irqs, 0); if (irq_base < 0) { pr_warn("Couldn't allocate IRQ numbers\n"); irq_base = 0; } - domain = irq_domain_add_legacy(node, nr_irqs, irq_base, 0, + domain = irq_domain_add_legacy(node, omap_nr_irqs, irq_base, 0, &irq_domain_simple_ops, NULL); omap_irq_soft_reset(); @@ -278,19 +275,22 @@ out: void __init omap2_init_irq(void) { - omap_init_irq(OMAP24XX_IC_BASE, 96, NULL); + omap_nr_irqs = 96; + omap_init_irq(OMAP24XX_IC_BASE, NULL); set_handle_irq(omap_intc_handle_irq); } void __init omap3_init_irq(void) { - omap_init_irq(OMAP34XX_IC_BASE, 96, NULL); + omap_nr_irqs = 96; + omap_init_irq(OMAP34XX_IC_BASE, NULL); set_handle_irq(omap_intc_handle_irq); } void __init ti81xx_init_irq(void) { - omap_init_irq(OMAP34XX_IC_BASE, 128, NULL); + omap_nr_irqs = 96; + omap_init_irq(OMAP34XX_IC_BASE, NULL); set_handle_irq(omap_intc_handle_irq); } @@ -298,7 +298,8 @@ static int __init intc_of_init(struct device_node *node, struct device_node *parent) { struct resource res; - u32 nr_irq = 96; + + omap_nr_irqs = 96; if (WARN_ON(!node)) return -ENODEV; @@ -309,9 +310,9 @@ static int __init intc_of_init(struct device_node *node, } if (of_device_is_compatible(node, "ti,am33xx-intc")) - nr_irq = 128; + omap_nr_irqs = 128; - omap_init_irq(res.start, nr_irq, of_node_get(node)); + omap_init_irq(res.start, of_node_get(node)); set_handle_irq(omap_intc_handle_irq); -- cgit v1.2.3 From 52b1e1291334d79bb3d2fcaec15f7fc42eedbd83 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:57 -0700 Subject: arm: omap: irq: introduce omap_nr_pending that variable will tell us how many INTC_PENDING_IRQn registers we have. It'll be used on a following patch to cleanup omap_intc_handle_irq() a bit. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 44d9cf4e74de..583a1c7de855 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -70,6 +70,7 @@ static struct omap_intc_regs intc_context; static struct irq_domain *domain; static void __iomem *omap_irq_base; +static int omap_nr_pending = 3; static int omap_nr_irqs = 96; /* INTC bank register get/set */ @@ -276,6 +277,7 @@ out: void __init omap2_init_irq(void) { omap_nr_irqs = 96; + omap_nr_pending = 3; omap_init_irq(OMAP24XX_IC_BASE, NULL); set_handle_irq(omap_intc_handle_irq); } @@ -283,6 +285,7 @@ void __init omap2_init_irq(void) void __init omap3_init_irq(void) { omap_nr_irqs = 96; + omap_nr_pending = 3; omap_init_irq(OMAP34XX_IC_BASE, NULL); set_handle_irq(omap_intc_handle_irq); } @@ -290,6 +293,7 @@ void __init omap3_init_irq(void) void __init ti81xx_init_irq(void) { omap_nr_irqs = 96; + omap_nr_pending = 4; omap_init_irq(OMAP34XX_IC_BASE, NULL); set_handle_irq(omap_intc_handle_irq); } @@ -299,6 +303,7 @@ static int __init intc_of_init(struct device_node *node, { struct resource res; + omap_nr_pending = 3; omap_nr_irqs = 96; if (WARN_ON(!node)) @@ -309,8 +314,10 @@ static int __init intc_of_init(struct device_node *node, return -EINVAL; } - if (of_device_is_compatible(node, "ti,am33xx-intc")) + if (of_device_is_compatible(node, "ti,am33xx-intc")) { omap_nr_irqs = 128; + omap_nr_pending = 4; + } omap_init_irq(res.start, of_node_get(node)); -- cgit v1.2.3 From d6a7c5c84f5ddab54717914ad293ed9d99d644ff Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:57 -0700 Subject: arm: omap: irq: get rid of ifdef hack we don't need the ifdef if we have omap_nr_pending telling us how many pending registers we have on current platform. This solves a possible problem where we could try to handle bogus interrupts on OMAP2 and OMAP3 if using single zImage kernel, because we would end up reading the following pending FIQ register. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 22 +++++++--------------- 1 file changed, 7 insertions(+), 15 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 583a1c7de855..43785ee27840 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -234,24 +234,16 @@ static void __init omap_init_irq(u32 base, struct device_node *node) static asmlinkage void __exception_irq_entry omap_intc_handle_irq(struct pt_regs *regs) { - u32 irqnr; + u32 irqnr = 0; int handled_irq = 0; + int i; do { - irqnr = intc_readl(INTC_PENDING_IRQ0); - if (irqnr) - goto out; - - irqnr = intc_readl(INTC_PENDING_IRQ1); - if (irqnr) - goto out; - - irqnr = intc_readl(INTC_PENDING_IRQ2); -#if IS_ENABLED(CONFIG_SOC_TI81XX) || IS_ENABLED(CONFIG_SOC_AM33XX) - if (irqnr) - goto out; - irqnr = intc_readl(INTC_PENDING_IRQ3); -#endif + for (i = 0; i < omap_nr_pending; i++) { + irqnr = intc_readl(INTC_PENDING_IRQ0 + (0x20 * i)); + if (irqnr) + goto out; + } out: if (!irqnr) -- cgit v1.2.3 From 55601c9f24670ba926ebdd4d712ac3b177232330 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 8 Sep 2014 17:54:58 -0700 Subject: arm: omap: intc: switch over to linear irq domain now that we don't need to support legacy board-files, we can completely switch over to a linear irq domain and make use of irq_alloc_domain_generic_chips() to allocate all generic irq chips for us. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 88 ++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 79 insertions(+), 9 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 43785ee27840..b2993e45e84c 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -188,14 +188,51 @@ void omap3_intc_suspend(void) omap_ack_irq(NULL); } -static __init void -omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) +static int __init omap_alloc_gc_of(struct irq_domain *d, void __iomem *base) +{ + int ret; + int i; + + ret = irq_alloc_domain_generic_chips(d, 32, 1, "INTC", + handle_level_irq, IRQ_NOREQUEST | IRQ_NOPROBE, + IRQ_LEVEL, 0); + if (ret) { + pr_warn("Failed to allocate irq chips\n"); + return ret; + } + + for (i = 0; i < omap_nr_pending; i++) { + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + + gc = irq_get_domain_generic_chip(d, 32 * i); + gc->reg_base = base; + ct = gc->chip_types; + + ct->type = IRQ_TYPE_LEVEL_MASK; + ct->handler = handle_level_irq; + + ct->chip.irq_ack = omap_mask_ack_irq; + ct->chip.irq_mask = irq_gc_mask_disable_reg; + ct->chip.irq_unmask = irq_gc_unmask_enable_reg; + + ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE; + + ct->regs.enable = INTC_MIR_CLEAR0 + 32 * i; + ct->regs.disable = INTC_MIR_SET0 + 32 * i; + } + + return 0; +} + +static void __init omap_alloc_gc_legacy(void __iomem *base, + unsigned int irq_start, unsigned int num) { struct irq_chip_generic *gc; struct irq_chip_type *ct; gc = irq_alloc_generic_chip("INTC", 1, irq_start, base, - handle_level_irq); + handle_level_irq); ct = gc->chip_types; ct->chip.irq_ack = omap_mask_ack_irq; ct->chip.irq_mask = irq_gc_mask_disable_reg; @@ -205,16 +242,36 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) ct->regs.enable = INTC_MIR_CLEAR0; ct->regs.disable = INTC_MIR_SET0; irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, - IRQ_NOREQUEST | IRQ_NOPROBE, 0); + IRQ_NOREQUEST | IRQ_NOPROBE, 0); } -static void __init omap_init_irq(u32 base, struct device_node *node) +static int __init omap_init_irq_of(struct device_node *node) +{ + int ret; + + omap_irq_base = of_iomap(node, 0); + if (WARN_ON(!omap_irq_base)) + return -ENOMEM; + + domain = irq_domain_add_linear(node, omap_nr_irqs, + &irq_generic_chip_ops, NULL); + + omap_irq_soft_reset(); + + ret = omap_alloc_gc_of(domain, omap_irq_base); + if (ret < 0) + irq_domain_remove(domain); + + return ret; +} + +static int __init omap_init_irq_legacy(u32 base) { int j, irq_base; omap_irq_base = ioremap(base, SZ_4K); if (WARN_ON(!omap_irq_base)) - return; + return -ENOMEM; irq_base = irq_alloc_descs(-1, 0, omap_nr_irqs, 0); if (irq_base < 0) { @@ -222,13 +279,23 @@ static void __init omap_init_irq(u32 base, struct device_node *node) irq_base = 0; } - domain = irq_domain_add_legacy(node, omap_nr_irqs, irq_base, 0, + domain = irq_domain_add_legacy(NULL, omap_nr_irqs, irq_base, 0, &irq_domain_simple_ops, NULL); omap_irq_soft_reset(); for (j = 0; j < omap_nr_irqs; j += 32) - omap_alloc_gc(omap_irq_base + j, j + irq_base, 32); + omap_alloc_gc_legacy(omap_irq_base + j, j + irq_base, 32); + + return 0; +} + +static int __init omap_init_irq(u32 base, struct device_node *node) +{ + if (node) + return omap_init_irq_of(node); + else + return omap_init_irq_legacy(base); } static asmlinkage void __exception_irq_entry @@ -294,6 +361,7 @@ static int __init intc_of_init(struct device_node *node, struct device_node *parent) { struct resource res; + int ret; omap_nr_pending = 3; omap_nr_irqs = 96; @@ -311,7 +379,9 @@ static int __init intc_of_init(struct device_node *node, omap_nr_pending = 4; } - omap_init_irq(res.start, of_node_get(node)); + ret = omap_init_irq(-1, of_node_get(node)); + if (ret < 0) + return ret; set_handle_irq(omap_intc_handle_irq); -- cgit v1.2.3 From e92ce89c29fe104bc1246913f385093bbae7b564 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Tue, 16 Sep 2014 15:31:40 -0500 Subject: arm: omap2: n8x0: move i2c devices to DT By moving i2c devices to DT we can clean up i2c_board_info and fix a problem with moving INTC to irq domain where IRQs can be renumbered on each boot. Cc: Aaro Koskinen Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap2420-n810.dts | 7 +++++++ arch/arm/boot/dts/omap2420-n8x0-common.dtsi | 6 ++++++ arch/arm/mach-omap2/board-n8x0.c | 26 +++----------------------- arch/arm/mach-omap2/common-board-devices.h | 5 +++++ arch/arm/mach-omap2/pdata-quirks.c | 2 ++ 5 files changed, 23 insertions(+), 23 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/boot/dts/omap2420-n810.dts b/arch/arm/boot/dts/omap2420-n810.dts index 21baec154b78..b604d26bd48c 100644 --- a/arch/arm/boot/dts/omap2420-n810.dts +++ b/arch/arm/boot/dts/omap2420-n810.dts @@ -6,3 +6,10 @@ model = "Nokia N810"; compatible = "nokia,n810", "nokia,n8x0", "ti,omap2420", "ti,omap2"; }; + +&i2c2 { + aic3x@18 { + compatible = "tlv320aic3x"; + reg = <0x18>; + }; +}; diff --git a/arch/arm/boot/dts/omap2420-n8x0-common.dtsi b/arch/arm/boot/dts/omap2420-n8x0-common.dtsi index 89608b206519..24c50db2a478 100644 --- a/arch/arm/boot/dts/omap2420-n8x0-common.dtsi +++ b/arch/arm/boot/dts/omap2420-n8x0-common.dtsi @@ -27,6 +27,12 @@ &i2c1 { clock-frequency = <400000>; + + pmic@72 { + compatible = "menelaus"; + reg = <0x72>; + interrupts = <7 IRQ_TYPE_EDGE_RISING>; + }; }; &i2c2 { diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index aead77a4bc6d..97767a27ca9d 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -33,6 +33,7 @@ #include "mmc.h" #include "soc.h" #include "gpmc-onenand.h" +#include "common-board-devices.h" #define TUSB6010_ASYNC_CS 1 #define TUSB6010_SYNC_CS 4 @@ -568,29 +569,14 @@ static int n8x0_menelaus_late_init(struct device *dev) } #endif -static struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = { +struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = { .late_init = n8x0_menelaus_late_init, }; -static struct i2c_board_info __initdata n8x0_i2c_board_info_1[] __initdata = { - { - I2C_BOARD_INFO("menelaus", 0x72), - .irq = 7 + OMAP_INTC_START, - .platform_data = &n8x0_menelaus_platform_data, - }, -}; - -static struct aic3x_pdata n810_aic33_data __initdata = { +struct aic3x_pdata n810_aic33_data __initdata = { .gpio_reset = 118, }; -static struct i2c_board_info n810_i2c_board_info_2[] __initdata = { - { - I2C_BOARD_INFO("tlv320aic3x", 0x18), - .platform_data = &n810_aic33_data, - }, -}; - static int __init n8x0_late_initcall(void) { if (!board_caps) @@ -612,11 +598,5 @@ void * __init n8x0_legacy_init(void) board_check_revision(); spi_register_board_info(n800_spi_board_info, ARRAY_SIZE(n800_spi_board_info)); - i2c_register_board_info(0, n8x0_i2c_board_info_1, - ARRAY_SIZE(n8x0_i2c_board_info_1)); - if (board_is_n810()) - i2c_register_board_info(1, n810_i2c_board_info_2, - ARRAY_SIZE(n810_i2c_board_info_2)); - return &mmc1_data; } diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h index f338177e6900..07c88ae083fb 100644 --- a/arch/arm/mach-omap2/common-board-devices.h +++ b/arch/arm/mach-omap2/common-board-devices.h @@ -1,6 +1,8 @@ #ifndef __OMAP_COMMON_BOARD_DEVICES__ #define __OMAP_COMMON_BOARD_DEVICES__ +#include +#include #include "twl-common.h" #define NAND_BLOCK_SIZE SZ_128K @@ -12,4 +14,7 @@ void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, struct ads7846_platform_data *board_pdata); void *n8x0_legacy_init(void); +extern struct menelaus_platform_data n8x0_menelaus_platform_data; +extern struct aic3x_pdata n810_aic33_data; + #endif /* __OMAP_COMMON_BOARD_DEVICES__ */ diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 8695fd4ea476..06a0ccfa00a2 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -336,6 +336,8 @@ static struct pdata_init auxdata_quirks[] __initdata = { struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { #ifdef CONFIG_MACH_NOKIA_N8X0 OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL), + OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data), + OF_DEV_AUXDATA("tlv320aic3x", 0x18, "2-0018", &n810_aic33_data), #endif #ifdef CONFIG_ARCH_OMAP3 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata), -- cgit v1.2.3 From eaacabc0d9b637c82788c66955b4ba0efebd5500 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 15 Sep 2014 16:15:01 -0500 Subject: irqchip: add irq-omap-intc.h header OMAP INTC irqchip driver will be moved under drivers/irqchip/ soon but we still have a dependency with mach-omap2 when it comes to idle functions. In order to make it easy to share those function prototypes with OMAP PM code, we introduce this new header. To avoid modifying several board-files and some of the PM-related code, we just include the new header from common.h which was already included by all users of IRQ-related PM code. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/common.h | 10 +--------- include/linux/irqchip/irq-omap-intc.h | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+), 9 deletions(-) create mode 100644 include/linux/irqchip/irq-omap-intc.h (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 180009343adb..377eea849e7b 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -32,6 +32,7 @@ #include #include #include +#include #include @@ -210,15 +211,6 @@ extern struct device *omap2_get_iva_device(void); extern struct device *omap2_get_l3_device(void); extern struct device *omap4_get_dsp_device(void); -void omap2_init_irq(void); -void omap3_init_irq(void); -void ti81xx_init_irq(void); -extern int omap_irq_pending(void); -void omap_intc_save_context(void); -void omap_intc_restore_context(void); -void omap3_intc_suspend(void); -void omap3_intc_prepare_idle(void); -void omap3_intc_resume_idle(void); void omap_gic_of_init(void); #ifdef CONFIG_CACHE_L2X0 diff --git a/include/linux/irqchip/irq-omap-intc.h b/include/linux/irqchip/irq-omap-intc.h new file mode 100644 index 000000000000..e06b370cfc0d --- /dev/null +++ b/include/linux/irqchip/irq-omap-intc.h @@ -0,0 +1,32 @@ +/** + * irq-omap-intc.h - INTC Idle Functions + * + * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com + * + * Author: Felipe Balbi + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 of + * the License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_OMAP_INTC_H +#define __INCLUDE_LINUX_IRQCHIP_IRQ_OMAP_INTC_H + +void omap2_init_irq(void); +void omap3_init_irq(void); +void ti81xx_init_irq(void); + +int omap_irq_pending(void); +void omap_intc_save_context(void); +void omap_intc_restore_context(void); +void omap3_intc_suspend(void); +void omap3_intc_prepare_idle(void); +void omap3_intc_resume_idle(void); + +#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_OMAP_INTC_H */ -- cgit v1.2.3 From 8598066cddd186809c4edf5aae5f018c00079e8c Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 15 Sep 2014 16:15:02 -0500 Subject: arm: omap: irq: move irq.c to drivers/irqchip/ Just move the code over as it has no dependencies on arch/arm/ anymore. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Kconfig | 1 + arch/arm/mach-omap2/Makefile | 3 +- arch/arm/mach-omap2/irq.c | 393 --------------------------------------- drivers/irqchip/Kconfig | 5 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-omap-intc.c | 394 ++++++++++++++++++++++++++++++++++++++++ 6 files changed, 402 insertions(+), 395 deletions(-) delete mode 100644 arch/arm/mach-omap2/irq.c create mode 100644 drivers/irqchip/irq-omap-intc.c (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 11ccf0b4e5c2..691d62a8a74b 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -86,6 +86,7 @@ config ARCH_OMAP2PLUS select PINCTRL select SOC_BUS select TI_PRIV_EDMA + select OMAP_IRQCHIP help Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 69bbcba8842f..0b6095c78af1 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -10,7 +10,6 @@ obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o gpmc.o timer.o pm.o \ common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \ omap_device.o sram.o drm.o -omap-2-3-common = irq.o hwmod-common = omap_hwmod.o omap_hwmod_reset.o \ omap_hwmod_common_data.o clock-common = clock.o clock_common_data.o \ @@ -20,7 +19,7 @@ secure-common = omap-smc.o omap-secure.o obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common) -obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common) +obj-$(CONFIG_SOC_AM33XX) += $(hwmod-common) obj-$(CONFIG_SOC_OMAP5) += $(hwmod-common) $(secure-common) obj-$(CONFIG_SOC_AM43XX) += $(hwmod-common) $(secure-common) obj-$(CONFIG_SOC_DRA7XX) += $(hwmod-common) $(secure-common) diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c deleted file mode 100644 index b2993e45e84c..000000000000 --- a/arch/arm/mach-omap2/irq.c +++ /dev/null @@ -1,393 +0,0 @@ -/* - * linux/arch/arm/mach-omap2/irq.c - * - * Interrupt handler for OMAP2 boards. - * - * Copyright (C) 2005 Nokia Corporation - * Author: Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "soc.h" -#include "common.h" -#include "../../drivers/irqchip/irqchip.h" - -/* selected INTC register offsets */ - -#define INTC_REVISION 0x0000 -#define INTC_SYSCONFIG 0x0010 -#define INTC_SYSSTATUS 0x0014 -#define INTC_SIR 0x0040 -#define INTC_CONTROL 0x0048 -#define INTC_PROTECTION 0x004C -#define INTC_IDLE 0x0050 -#define INTC_THRESHOLD 0x0068 -#define INTC_MIR0 0x0084 -#define INTC_MIR_CLEAR0 0x0088 -#define INTC_MIR_SET0 0x008c -#define INTC_PENDING_IRQ0 0x0098 -#define INTC_PENDING_IRQ1 0x00b8 -#define INTC_PENDING_IRQ2 0x00d8 -#define INTC_PENDING_IRQ3 0x00f8 -#define INTC_ILR0 0x0100 - -#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */ -#define INTCPS_NR_ILR_REGS 128 -#define INTCPS_NR_MIR_REGS 3 - -/* - * OMAP2 has a number of different interrupt controllers, each interrupt - * controller is identified as its own "bank". Register definitions are - * fairly consistent for each bank, but not all registers are implemented - * for each bank.. when in doubt, consult the TRM. - */ - -/* Structure to save interrupt controller context */ -struct omap_intc_regs { - u32 sysconfig; - u32 protection; - u32 idle; - u32 threshold; - u32 ilr[INTCPS_NR_ILR_REGS]; - u32 mir[INTCPS_NR_MIR_REGS]; -}; -static struct omap_intc_regs intc_context; - -static struct irq_domain *domain; -static void __iomem *omap_irq_base; -static int omap_nr_pending = 3; -static int omap_nr_irqs = 96; - -/* INTC bank register get/set */ -static void intc_writel(u32 reg, u32 val) -{ - writel_relaxed(val, omap_irq_base + reg); -} - -static u32 intc_readl(u32 reg) -{ - return readl_relaxed(omap_irq_base + reg); -} - -void omap_intc_save_context(void) -{ - int i; - - intc_context.sysconfig = - intc_readl(INTC_SYSCONFIG); - intc_context.protection = - intc_readl(INTC_PROTECTION); - intc_context.idle = - intc_readl(INTC_IDLE); - intc_context.threshold = - intc_readl(INTC_THRESHOLD); - - for (i = 0; i < omap_nr_irqs; i++) - intc_context.ilr[i] = - intc_readl((INTC_ILR0 + 0x4 * i)); - for (i = 0; i < INTCPS_NR_MIR_REGS; i++) - intc_context.mir[i] = - intc_readl(INTC_MIR0 + (0x20 * i)); -} - -void omap_intc_restore_context(void) -{ - int i; - - intc_writel(INTC_SYSCONFIG, intc_context.sysconfig); - intc_writel(INTC_PROTECTION, intc_context.protection); - intc_writel(INTC_IDLE, intc_context.idle); - intc_writel(INTC_THRESHOLD, intc_context.threshold); - - for (i = 0; i < omap_nr_irqs; i++) - intc_writel(INTC_ILR0 + 0x4 * i, - intc_context.ilr[i]); - - for (i = 0; i < INTCPS_NR_MIR_REGS; i++) - intc_writel(INTC_MIR0 + 0x20 * i, - intc_context.mir[i]); - /* MIRs are saved and restore with other PRCM registers */ -} - -void omap3_intc_prepare_idle(void) -{ - /* - * Disable autoidle as it can stall interrupt controller, - * cf. errata ID i540 for 3430 (all revisions up to 3.1.x) - */ - intc_writel(INTC_SYSCONFIG, 0); -} - -void omap3_intc_resume_idle(void) -{ - /* Re-enable autoidle */ - intc_writel(INTC_SYSCONFIG, 1); -} - -/* XXX: FIQ and additional INTC support (only MPU at the moment) */ -static void omap_ack_irq(struct irq_data *d) -{ - intc_writel(INTC_CONTROL, 0x1); -} - -static void omap_mask_ack_irq(struct irq_data *d) -{ - irq_gc_mask_disable_reg(d); - omap_ack_irq(d); -} - -static void __init omap_irq_soft_reset(void) -{ - unsigned long tmp; - - tmp = intc_readl(INTC_REVISION) & 0xff; - - pr_info("IRQ: Found an INTC at 0x%p (revision %ld.%ld) with %d interrupts\n", - omap_irq_base, tmp >> 4, tmp & 0xf, omap_nr_irqs); - - tmp = intc_readl(INTC_SYSCONFIG); - tmp |= 1 << 1; /* soft reset */ - intc_writel(INTC_SYSCONFIG, tmp); - - while (!(intc_readl(INTC_SYSSTATUS) & 0x1)) - /* Wait for reset to complete */; - - /* Enable autoidle */ - intc_writel(INTC_SYSCONFIG, 1 << 0); -} - -int omap_irq_pending(void) -{ - int irq; - - for (irq = 0; irq < omap_nr_irqs; irq += 32) - if (intc_readl(INTC_PENDING_IRQ0 + - ((irq >> 5) << 5))) - return 1; - return 0; -} - -void omap3_intc_suspend(void) -{ - /* A pending interrupt would prevent OMAP from entering suspend */ - omap_ack_irq(NULL); -} - -static int __init omap_alloc_gc_of(struct irq_domain *d, void __iomem *base) -{ - int ret; - int i; - - ret = irq_alloc_domain_generic_chips(d, 32, 1, "INTC", - handle_level_irq, IRQ_NOREQUEST | IRQ_NOPROBE, - IRQ_LEVEL, 0); - if (ret) { - pr_warn("Failed to allocate irq chips\n"); - return ret; - } - - for (i = 0; i < omap_nr_pending; i++) { - struct irq_chip_generic *gc; - struct irq_chip_type *ct; - - gc = irq_get_domain_generic_chip(d, 32 * i); - gc->reg_base = base; - ct = gc->chip_types; - - ct->type = IRQ_TYPE_LEVEL_MASK; - ct->handler = handle_level_irq; - - ct->chip.irq_ack = omap_mask_ack_irq; - ct->chip.irq_mask = irq_gc_mask_disable_reg; - ct->chip.irq_unmask = irq_gc_unmask_enable_reg; - - ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE; - - ct->regs.enable = INTC_MIR_CLEAR0 + 32 * i; - ct->regs.disable = INTC_MIR_SET0 + 32 * i; - } - - return 0; -} - -static void __init omap_alloc_gc_legacy(void __iomem *base, - unsigned int irq_start, unsigned int num) -{ - struct irq_chip_generic *gc; - struct irq_chip_type *ct; - - gc = irq_alloc_generic_chip("INTC", 1, irq_start, base, - handle_level_irq); - ct = gc->chip_types; - ct->chip.irq_ack = omap_mask_ack_irq; - ct->chip.irq_mask = irq_gc_mask_disable_reg; - ct->chip.irq_unmask = irq_gc_unmask_enable_reg; - ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE; - - ct->regs.enable = INTC_MIR_CLEAR0; - ct->regs.disable = INTC_MIR_SET0; - irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, - IRQ_NOREQUEST | IRQ_NOPROBE, 0); -} - -static int __init omap_init_irq_of(struct device_node *node) -{ - int ret; - - omap_irq_base = of_iomap(node, 0); - if (WARN_ON(!omap_irq_base)) - return -ENOMEM; - - domain = irq_domain_add_linear(node, omap_nr_irqs, - &irq_generic_chip_ops, NULL); - - omap_irq_soft_reset(); - - ret = omap_alloc_gc_of(domain, omap_irq_base); - if (ret < 0) - irq_domain_remove(domain); - - return ret; -} - -static int __init omap_init_irq_legacy(u32 base) -{ - int j, irq_base; - - omap_irq_base = ioremap(base, SZ_4K); - if (WARN_ON(!omap_irq_base)) - return -ENOMEM; - - irq_base = irq_alloc_descs(-1, 0, omap_nr_irqs, 0); - if (irq_base < 0) { - pr_warn("Couldn't allocate IRQ numbers\n"); - irq_base = 0; - } - - domain = irq_domain_add_legacy(NULL, omap_nr_irqs, irq_base, 0, - &irq_domain_simple_ops, NULL); - - omap_irq_soft_reset(); - - for (j = 0; j < omap_nr_irqs; j += 32) - omap_alloc_gc_legacy(omap_irq_base + j, j + irq_base, 32); - - return 0; -} - -static int __init omap_init_irq(u32 base, struct device_node *node) -{ - if (node) - return omap_init_irq_of(node); - else - return omap_init_irq_legacy(base); -} - -static asmlinkage void __exception_irq_entry -omap_intc_handle_irq(struct pt_regs *regs) -{ - u32 irqnr = 0; - int handled_irq = 0; - int i; - - do { - for (i = 0; i < omap_nr_pending; i++) { - irqnr = intc_readl(INTC_PENDING_IRQ0 + (0x20 * i)); - if (irqnr) - goto out; - } - -out: - if (!irqnr) - break; - - irqnr = intc_readl(INTC_SIR); - irqnr &= ACTIVEIRQ_MASK; - - if (irqnr) { - irqnr = irq_find_mapping(domain, irqnr); - handle_IRQ(irqnr, regs); - handled_irq = 1; - } - } while (irqnr); - - /* If an irq is masked or deasserted while active, we will - * keep ending up here with no irq handled. So remove it from - * the INTC with an ack.*/ - if (!handled_irq) - omap_ack_irq(NULL); -} - -void __init omap2_init_irq(void) -{ - omap_nr_irqs = 96; - omap_nr_pending = 3; - omap_init_irq(OMAP24XX_IC_BASE, NULL); - set_handle_irq(omap_intc_handle_irq); -} - -void __init omap3_init_irq(void) -{ - omap_nr_irqs = 96; - omap_nr_pending = 3; - omap_init_irq(OMAP34XX_IC_BASE, NULL); - set_handle_irq(omap_intc_handle_irq); -} - -void __init ti81xx_init_irq(void) -{ - omap_nr_irqs = 96; - omap_nr_pending = 4; - omap_init_irq(OMAP34XX_IC_BASE, NULL); - set_handle_irq(omap_intc_handle_irq); -} - -static int __init intc_of_init(struct device_node *node, - struct device_node *parent) -{ - struct resource res; - int ret; - - omap_nr_pending = 3; - omap_nr_irqs = 96; - - if (WARN_ON(!node)) - return -ENODEV; - - if (of_address_to_resource(node, 0, &res)) { - WARN(1, "unable to get intc registers\n"); - return -EINVAL; - } - - if (of_device_is_compatible(node, "ti,am33xx-intc")) { - omap_nr_irqs = 128; - omap_nr_pending = 4; - } - - ret = omap_init_irq(-1, of_node_get(node)); - if (ret < 0) - return ret; - - set_handle_irq(omap_intc_handle_irq); - - return 0; -} - -IRQCHIP_DECLARE(omap2_intc, "ti,omap2-intc", intc_of_init); -IRQCHIP_DECLARE(omap3_intc, "ti,omap3-intc", intc_of_init); -IRQCHIP_DECLARE(am33xx_intc, "ti,am33xx-intc", intc_of_init); diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index b8632bf9a7f3..9d539decf864 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -75,6 +75,11 @@ config OR1K_PIC bool select IRQ_DOMAIN +config OMAP_IRQCHIP + bool + select GENERIC_IRQ_CHIP + select IRQ_DOMAIN + config ORION_IRQCHIP bool select IRQ_DOMAIN diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 73052ba9ca62..d0a2613c73bc 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_ARCH_MOXART) += irq-moxart.o obj-$(CONFIG_CLPS711X_IRQCHIP) += irq-clps711x.o obj-$(CONFIG_OR1K_PIC) += irq-or1k-pic.o obj-$(CONFIG_ORION_IRQCHIP) += irq-orion.o +obj-$(CONFIG_OMAP_IRQCHIP) += irq-omap-intc.o obj-$(CONFIG_ARCH_SUNXI) += irq-sun4i.o obj-$(CONFIG_ARCH_SUNXI) += irq-sunxi-nmi.o obj-$(CONFIG_ARCH_SPEAR3XX) += spear-shirq.o diff --git a/drivers/irqchip/irq-omap-intc.c b/drivers/irqchip/irq-omap-intc.c new file mode 100644 index 000000000000..1478f1a3c400 --- /dev/null +++ b/drivers/irqchip/irq-omap-intc.c @@ -0,0 +1,394 @@ +/* + * linux/arch/arm/mach-omap2/irq.c + * + * Interrupt handler for OMAP2 boards. + * + * Copyright (C) 2005 Nokia Corporation + * Author: Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "irqchip.h" + +/* Define these here for now until we drop all board-files */ +#define OMAP24XX_IC_BASE 0x480fe000 +#define OMAP34XX_IC_BASE 0x48200000 + +/* selected INTC register offsets */ + +#define INTC_REVISION 0x0000 +#define INTC_SYSCONFIG 0x0010 +#define INTC_SYSSTATUS 0x0014 +#define INTC_SIR 0x0040 +#define INTC_CONTROL 0x0048 +#define INTC_PROTECTION 0x004C +#define INTC_IDLE 0x0050 +#define INTC_THRESHOLD 0x0068 +#define INTC_MIR0 0x0084 +#define INTC_MIR_CLEAR0 0x0088 +#define INTC_MIR_SET0 0x008c +#define INTC_PENDING_IRQ0 0x0098 +#define INTC_PENDING_IRQ1 0x00b8 +#define INTC_PENDING_IRQ2 0x00d8 +#define INTC_PENDING_IRQ3 0x00f8 +#define INTC_ILR0 0x0100 + +#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */ +#define INTCPS_NR_ILR_REGS 128 +#define INTCPS_NR_MIR_REGS 3 + +/* + * OMAP2 has a number of different interrupt controllers, each interrupt + * controller is identified as its own "bank". Register definitions are + * fairly consistent for each bank, but not all registers are implemented + * for each bank.. when in doubt, consult the TRM. + */ + +/* Structure to save interrupt controller context */ +struct omap_intc_regs { + u32 sysconfig; + u32 protection; + u32 idle; + u32 threshold; + u32 ilr[INTCPS_NR_ILR_REGS]; + u32 mir[INTCPS_NR_MIR_REGS]; +}; +static struct omap_intc_regs intc_context; + +static struct irq_domain *domain; +static void __iomem *omap_irq_base; +static int omap_nr_pending = 3; +static int omap_nr_irqs = 96; + +/* INTC bank register get/set */ +static void intc_writel(u32 reg, u32 val) +{ + writel_relaxed(val, omap_irq_base + reg); +} + +static u32 intc_readl(u32 reg) +{ + return readl_relaxed(omap_irq_base + reg); +} + +void omap_intc_save_context(void) +{ + int i; + + intc_context.sysconfig = + intc_readl(INTC_SYSCONFIG); + intc_context.protection = + intc_readl(INTC_PROTECTION); + intc_context.idle = + intc_readl(INTC_IDLE); + intc_context.threshold = + intc_readl(INTC_THRESHOLD); + + for (i = 0; i < omap_nr_irqs; i++) + intc_context.ilr[i] = + intc_readl((INTC_ILR0 + 0x4 * i)); + for (i = 0; i < INTCPS_NR_MIR_REGS; i++) + intc_context.mir[i] = + intc_readl(INTC_MIR0 + (0x20 * i)); +} + +void omap_intc_restore_context(void) +{ + int i; + + intc_writel(INTC_SYSCONFIG, intc_context.sysconfig); + intc_writel(INTC_PROTECTION, intc_context.protection); + intc_writel(INTC_IDLE, intc_context.idle); + intc_writel(INTC_THRESHOLD, intc_context.threshold); + + for (i = 0; i < omap_nr_irqs; i++) + intc_writel(INTC_ILR0 + 0x4 * i, + intc_context.ilr[i]); + + for (i = 0; i < INTCPS_NR_MIR_REGS; i++) + intc_writel(INTC_MIR0 + 0x20 * i, + intc_context.mir[i]); + /* MIRs are saved and restore with other PRCM registers */ +} + +void omap3_intc_prepare_idle(void) +{ + /* + * Disable autoidle as it can stall interrupt controller, + * cf. errata ID i540 for 3430 (all revisions up to 3.1.x) + */ + intc_writel(INTC_SYSCONFIG, 0); +} + +void omap3_intc_resume_idle(void) +{ + /* Re-enable autoidle */ + intc_writel(INTC_SYSCONFIG, 1); +} + +/* XXX: FIQ and additional INTC support (only MPU at the moment) */ +static void omap_ack_irq(struct irq_data *d) +{ + intc_writel(INTC_CONTROL, 0x1); +} + +static void omap_mask_ack_irq(struct irq_data *d) +{ + irq_gc_mask_disable_reg(d); + omap_ack_irq(d); +} + +static void __init omap_irq_soft_reset(void) +{ + unsigned long tmp; + + tmp = intc_readl(INTC_REVISION) & 0xff; + + pr_info("IRQ: Found an INTC at 0x%p (revision %ld.%ld) with %d interrupts\n", + omap_irq_base, tmp >> 4, tmp & 0xf, omap_nr_irqs); + + tmp = intc_readl(INTC_SYSCONFIG); + tmp |= 1 << 1; /* soft reset */ + intc_writel(INTC_SYSCONFIG, tmp); + + while (!(intc_readl(INTC_SYSSTATUS) & 0x1)) + /* Wait for reset to complete */; + + /* Enable autoidle */ + intc_writel(INTC_SYSCONFIG, 1 << 0); +} + +int omap_irq_pending(void) +{ + int irq; + + for (irq = 0; irq < omap_nr_irqs; irq += 32) + if (intc_readl(INTC_PENDING_IRQ0 + + ((irq >> 5) << 5))) + return 1; + return 0; +} + +void omap3_intc_suspend(void) +{ + /* A pending interrupt would prevent OMAP from entering suspend */ + omap_ack_irq(NULL); +} + +static int __init omap_alloc_gc_of(struct irq_domain *d, void __iomem *base) +{ + int ret; + int i; + + ret = irq_alloc_domain_generic_chips(d, 32, 1, "INTC", + handle_level_irq, IRQ_NOREQUEST | IRQ_NOPROBE, + IRQ_LEVEL, 0); + if (ret) { + pr_warn("Failed to allocate irq chips\n"); + return ret; + } + + for (i = 0; i < omap_nr_pending; i++) { + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + + gc = irq_get_domain_generic_chip(d, 32 * i); + gc->reg_base = base; + ct = gc->chip_types; + + ct->type = IRQ_TYPE_LEVEL_MASK; + ct->handler = handle_level_irq; + + ct->chip.irq_ack = omap_mask_ack_irq; + ct->chip.irq_mask = irq_gc_mask_disable_reg; + ct->chip.irq_unmask = irq_gc_unmask_enable_reg; + + ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE; + + ct->regs.enable = INTC_MIR_CLEAR0 + 32 * i; + ct->regs.disable = INTC_MIR_SET0 + 32 * i; + } + + return 0; +} + +static void __init omap_alloc_gc_legacy(void __iomem *base, + unsigned int irq_start, unsigned int num) +{ + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + + gc = irq_alloc_generic_chip("INTC", 1, irq_start, base, + handle_level_irq); + ct = gc->chip_types; + ct->chip.irq_ack = omap_mask_ack_irq; + ct->chip.irq_mask = irq_gc_mask_disable_reg; + ct->chip.irq_unmask = irq_gc_unmask_enable_reg; + ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE; + + ct->regs.enable = INTC_MIR_CLEAR0; + ct->regs.disable = INTC_MIR_SET0; + irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, + IRQ_NOREQUEST | IRQ_NOPROBE, 0); +} + +static int __init omap_init_irq_of(struct device_node *node) +{ + int ret; + + omap_irq_base = of_iomap(node, 0); + if (WARN_ON(!omap_irq_base)) + return -ENOMEM; + + domain = irq_domain_add_linear(node, omap_nr_irqs, + &irq_generic_chip_ops, NULL); + + omap_irq_soft_reset(); + + ret = omap_alloc_gc_of(domain, omap_irq_base); + if (ret < 0) + irq_domain_remove(domain); + + return ret; +} + +static int __init omap_init_irq_legacy(u32 base) +{ + int j, irq_base; + + omap_irq_base = ioremap(base, SZ_4K); + if (WARN_ON(!omap_irq_base)) + return -ENOMEM; + + irq_base = irq_alloc_descs(-1, 0, omap_nr_irqs, 0); + if (irq_base < 0) { + pr_warn("Couldn't allocate IRQ numbers\n"); + irq_base = 0; + } + + domain = irq_domain_add_legacy(NULL, omap_nr_irqs, irq_base, 0, + &irq_domain_simple_ops, NULL); + + omap_irq_soft_reset(); + + for (j = 0; j < omap_nr_irqs; j += 32) + omap_alloc_gc_legacy(omap_irq_base + j, j + irq_base, 32); + + return 0; +} + +static int __init omap_init_irq(u32 base, struct device_node *node) +{ + if (node) + return omap_init_irq_of(node); + else + return omap_init_irq_legacy(base); +} + +static asmlinkage void __exception_irq_entry +omap_intc_handle_irq(struct pt_regs *regs) +{ + u32 irqnr = 0; + int handled_irq = 0; + int i; + + do { + for (i = 0; i < omap_nr_pending; i++) { + irqnr = intc_readl(INTC_PENDING_IRQ0 + (0x20 * i)); + if (irqnr) + goto out; + } + +out: + if (!irqnr) + break; + + irqnr = intc_readl(INTC_SIR); + irqnr &= ACTIVEIRQ_MASK; + + if (irqnr) { + irqnr = irq_find_mapping(domain, irqnr); + handle_IRQ(irqnr, regs); + handled_irq = 1; + } + } while (irqnr); + + /* If an irq is masked or deasserted while active, we will + * keep ending up here with no irq handled. So remove it from + * the INTC with an ack.*/ + if (!handled_irq) + omap_ack_irq(NULL); +} + +void __init omap2_init_irq(void) +{ + omap_nr_irqs = 96; + omap_nr_pending = 3; + omap_init_irq(OMAP24XX_IC_BASE, NULL); + set_handle_irq(omap_intc_handle_irq); +} + +void __init omap3_init_irq(void) +{ + omap_nr_irqs = 96; + omap_nr_pending = 3; + omap_init_irq(OMAP34XX_IC_BASE, NULL); + set_handle_irq(omap_intc_handle_irq); +} + +void __init ti81xx_init_irq(void) +{ + omap_nr_irqs = 96; + omap_nr_pending = 4; + omap_init_irq(OMAP34XX_IC_BASE, NULL); + set_handle_irq(omap_intc_handle_irq); +} + +static int __init intc_of_init(struct device_node *node, + struct device_node *parent) +{ + struct resource res; + int ret; + + omap_nr_pending = 3; + omap_nr_irqs = 96; + + if (WARN_ON(!node)) + return -ENODEV; + + if (of_address_to_resource(node, 0, &res)) { + WARN(1, "unable to get intc registers\n"); + return -EINVAL; + } + + if (of_device_is_compatible(node, "ti,am33xx-intc")) { + omap_nr_irqs = 128; + omap_nr_pending = 4; + } + + ret = omap_init_irq(-1, of_node_get(node)); + if (ret < 0) + return ret; + + set_handle_irq(omap_intc_handle_irq); + + return 0; +} + +IRQCHIP_DECLARE(omap2_intc, "ti,omap2-intc", intc_of_init); +IRQCHIP_DECLARE(omap3_intc, "ti,omap3-intc", intc_of_init); +IRQCHIP_DECLARE(am33xx_intc, "ti,am33xx-intc", intc_of_init); -- cgit v1.2.3