From 35cc3cea2c2adb825dbe987000165005d28acaec Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 12 Oct 2011 21:34:12 +0900 Subject: ARM: SAMSUNG: Add support s3c2416-adc for S3C2416/S3C2450 The ADC of the S3C2416/2450 SoC is 10 or 12 bit wide, has its source selection in the register base+0x18 and its width selection in bit 03 of the ADCCON register. Signed-off-by: Heiko Stuebner Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c2416/s3c2416.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-s3c2416') diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c index 3156b7a71371..081ef4cb8688 100644 --- a/arch/arm/mach-s3c2416/s3c2416.c +++ b/arch/arm/mach-s3c2416/s3c2416.c @@ -60,6 +60,7 @@ #include #include #include +#include static struct map_desc s3c2416_iodesc[] __initdata = { IODESC_ENT(WATCHDOG), @@ -97,6 +98,8 @@ int __init s3c2416_init(void) s3c_fb_setname("s3c2443-fb"); + s3c_adc_setname("s3c2416-adc"); + register_syscore_ops(&s3c2416_pm_syscore_ops); register_syscore_ops(&s3c24xx_irq_syscore_ops); -- cgit v1.2.3 From 0d23d059da0f7a2ce4744b2212d64a17057d8424 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 14 Oct 2011 15:08:56 +0900 Subject: ARM: S3C2416: Add armdiv_mask constant The S3C2416/2450 has only 3 bits for the armdiv setting instead of the 4 bits of the S3C2443. Signed-off-by: Heiko Stuebner Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h | 1 + arch/arm/mach-s3c2416/clock.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-s3c2416') diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h index df6434f326f0..c3feff3c0488 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h @@ -65,6 +65,7 @@ #define S3C2443_CLKDIV0_PREDIV_MASK (3<<4) #define S3C2443_CLKDIV0_PREDIV_SHIFT (4) +#define S3C2416_CLKDIV0_ARMDIV_MASK (7 << 9) #define S3C2443_CLKDIV0_ARMDIV_MASK (15<<9) #define S3C2443_CLKDIV0_ARMDIV_SHIFT (9) #define S3C2443_CLKDIV0_ARMDIV_1 (0<<9) diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c index 72b7c6274c79..5569def1a107 100644 --- a/arch/arm/mach-s3c2416/clock.c +++ b/arch/arm/mach-s3c2416/clock.c @@ -127,7 +127,7 @@ static struct clk hsmmc0_clk = { static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0) { - clkcon0 &= 7 << S3C2443_CLKDIV0_ARMDIV_SHIFT; + clkcon0 &= S3C2416_CLKDIV0_ARMDIV_MASK; return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]; } -- cgit v1.2.3 From d9a3bfbd7e80ecf24d2322659d5c0542f9d95e78 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 14 Oct 2011 15:08:56 +0900 Subject: ARM: S3C24XX: Add infrastructure to transmit armdiv to common code This is needed for making the armdiv clock common to S3C2443 and S3C2416/2450. Signed-off-by: Heiko Stuebner Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c2416/clock.c | 4 +++- arch/arm/mach-s3c2443/clock.c | 4 +++- arch/arm/plat-s3c24xx/s3c2443-clock.c | 12 +++++++++++- arch/arm/plat-samsung/include/plat/s3c2443.h | 4 +++- 4 files changed, 20 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-s3c2416') diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c index 5569def1a107..3060796b0e7d 100644 --- a/arch/arm/mach-s3c2416/clock.c +++ b/arch/arm/mach-s3c2416/clock.c @@ -158,7 +158,9 @@ void __init s3c2416_init_clocks(int xtal) clk_epll.parent = &clk_epllref.clk; - s3c2443_common_init_clocks(xtal, s3c2416_get_pll, s3c2416_fclk_div); + s3c2443_common_init_clocks(xtal, s3c2416_get_pll, s3c2416_fclk_div, + armdiv, ARRAY_SIZE(armdiv), + S3C2416_CLKDIV0_ARMDIV_MASK); for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) s3c_register_clksrc(clksrcs[ptr], 1); diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c index cd51d04e1de7..88edc55838a1 100644 --- a/arch/arm/mach-s3c2443/clock.c +++ b/arch/arm/mach-s3c2443/clock.c @@ -283,7 +283,9 @@ void __init s3c2443_init_clocks(int xtal) clk_epll.rate = s3c2443_get_epll(epllcon, xtal); clk_epll.parent = &clk_epllref.clk; - s3c2443_common_init_clocks(xtal, s3c2443_get_mpll, s3c2443_fclk_div); + s3c2443_common_init_clocks(xtal, s3c2443_get_mpll, s3c2443_fclk_div, + armdiv, ARRAY_SIZE(armdiv), + S3C2443_CLKDIV0_ARMDIV_MASK); s3c2443_setup_clocks(); diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c index 07a4c81587ac..3f2117b8c0d4 100644 --- a/arch/arm/plat-s3c24xx/s3c2443-clock.c +++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c @@ -160,6 +160,10 @@ static struct clk clk_prediv = { }, }; +static unsigned int *armdiv; +static int nr_armdiv; +static int armdivmask; + /* usbhost * * usb host bus-clock, usually 48MHz to provide USB bus clock timing @@ -470,10 +474,16 @@ static struct clksrc_clk *clksrcs[] __initdata = { }; void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, - fdiv_fn get_fdiv) + fdiv_fn get_fdiv, + unsigned int *divs, int nr_divs, + int divmask) { int ptr; + armdiv = divs; + nr_armdiv = nr_divs; + armdivmask = divmask; + /* s3c2443 parents h and p clocks from prediv */ clk_h.parent = &clk_prediv; clk_p.parent = &clk_prediv; diff --git a/arch/arm/plat-samsung/include/plat/s3c2443.h b/arch/arm/plat-samsung/include/plat/s3c2443.h index 4b2ac9a272b2..5fc4ad0fd756 100644 --- a/arch/arm/plat-samsung/include/plat/s3c2443.h +++ b/arch/arm/plat-samsung/include/plat/s3c2443.h @@ -40,7 +40,9 @@ typedef unsigned int (*pll_fn)(unsigned int reg, unsigned int base); typedef unsigned int (*fdiv_fn)(unsigned long clkcon0); extern void s3c2443_common_setup_clocks(pll_fn get_mpll, fdiv_fn fdiv); -extern void s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, fdiv_fn fdiv); +extern void s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, fdiv_fn fdiv, + unsigned int *divs, int nr_divs, + int divmask); extern int s3c2443_clkcon_enable_h(struct clk *clk, int enable); extern int s3c2443_clkcon_enable_p(struct clk *clk, int enable); -- cgit v1.2.3 From efb1fb486a8187f02ac4a0170ab45823ebbe58f2 Mon Sep 17 00:00:00 2001 From: Heiko St?bner Date: Fri, 14 Oct 2011 15:08:56 +0900 Subject: ARM: S3C2416: Add comment describing the armdiv/armclk Signed-off-by: Heiko Stuebner Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c2416/clock.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/mach-s3c2416') diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c index 3060796b0e7d..7aa0cfa2f9bd 100644 --- a/arch/arm/mach-s3c2416/clock.c +++ b/arch/arm/mach-s3c2416/clock.c @@ -28,6 +28,14 @@ #include #include +/* armdiv + * + * this clock is sourced from msysclk and can have a number of + * divider values applied to it to then be fed into armclk. + * The real clock definition is done in s3c2443-clock.c, + * only the armdiv divisor table must be defined here. +*/ + static unsigned int armdiv[8] = { [0] = 1, [1] = 2, -- cgit v1.2.3 From 33ccedfd1b79a7cf649b2991e95bae415c013240 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 14 Oct 2011 15:08:57 +0900 Subject: ARM: S3C24XX: use clk_get_rate to init fclk in common_setup_clocks Previously the fclk rate was calculated by dividing the pll through the divider value of the armdiv. With a real armdiv clk in place it's possible to simply read its value, which does essentially the same. This change makes the whole fdiv_fn function pointers supplied to s3c2443_common_init_clocks and s3c2443_common_setup_clocks obsolete, so remove it too. Signed-off-by: Heiko Stuebner Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c2416/clock.c | 11 ++--------- arch/arm/mach-s3c2443/clock.c | 11 ++--------- arch/arm/plat-s3c24xx/s3c2443-clock.c | 8 +++----- arch/arm/plat-samsung/include/plat/s3c2443.h | 5 ++--- 4 files changed, 9 insertions(+), 26 deletions(-) (limited to 'arch/arm/mach-s3c2416') diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c index 7aa0cfa2f9bd..afbbe8bc21d1 100644 --- a/arch/arm/mach-s3c2416/clock.c +++ b/arch/arm/mach-s3c2416/clock.c @@ -133,16 +133,9 @@ static struct clk hsmmc0_clk = { .ctrlbit = S3C2416_HCLKCON_HSMMC0, }; -static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0) -{ - clkcon0 &= S3C2416_CLKDIV0_ARMDIV_MASK; - - return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]; -} - void __init_or_cpufreq s3c2416_setup_clocks(void) { - s3c2443_common_setup_clocks(s3c2416_get_pll, s3c2416_fclk_div); + s3c2443_common_setup_clocks(s3c2416_get_pll); } @@ -166,7 +159,7 @@ void __init s3c2416_init_clocks(int xtal) clk_epll.parent = &clk_epllref.clk; - s3c2443_common_init_clocks(xtal, s3c2416_get_pll, s3c2416_fclk_div, + s3c2443_common_init_clocks(xtal, s3c2416_get_pll, armdiv, ARRAY_SIZE(armdiv), S3C2416_CLKDIV0_ARMDIV_MASK); diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c index 6fda4bf09cdd..b93cb96f57a5 100644 --- a/arch/arm/mach-s3c2443/clock.c +++ b/arch/arm/mach-s3c2443/clock.c @@ -76,13 +76,6 @@ static unsigned int armdiv[16] = { [S3C2443_CLKDIV0_ARMDIV_16 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 16, }; -static inline unsigned int s3c2443_fclk_div(unsigned long clkcon0) -{ - clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK; - - return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]; -} - /* hsspi * * high-speed spi clock, sourced from esysclk @@ -191,7 +184,7 @@ static struct clk *clks[] __initdata = { void __init_or_cpufreq s3c2443_setup_clocks(void) { - s3c2443_common_setup_clocks(s3c2443_get_mpll, s3c2443_fclk_div); + s3c2443_common_setup_clocks(s3c2443_get_mpll); } void __init s3c2443_init_clocks(int xtal) @@ -202,7 +195,7 @@ void __init s3c2443_init_clocks(int xtal) clk_epll.rate = s3c2443_get_epll(epllcon, xtal); clk_epll.parent = &clk_epllref.clk; - s3c2443_common_init_clocks(xtal, s3c2443_get_mpll, s3c2443_fclk_div, + s3c2443_common_init_clocks(xtal, s3c2443_get_mpll, armdiv, ARRAY_SIZE(armdiv), S3C2443_CLKDIV0_ARMDIV_MASK); diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c index 40a87206400f..d3ebbeedf6d9 100644 --- a/arch/arm/plat-s3c24xx/s3c2443-clock.c +++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c @@ -520,8 +520,7 @@ static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0) /* EPLLCON compatible enough to get on/off information */ -void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll, - fdiv_fn get_fdiv) +void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll) { unsigned long epllcon = __raw_readl(S3C2443_EPLLCON); unsigned long mpllcon = __raw_readl(S3C2443_MPLLCON); @@ -541,7 +540,7 @@ void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll, pll = get_mpll(mpllcon, xtal); clk_msysclk.clk.rate = pll; - fclk = pll / get_fdiv(clkdiv0); + fclk = clk_get_rate(&clk_armdiv); hclk = s3c2443_prediv_getrate(&clk_prediv); hclk /= s3c2443_get_hdiv(clkdiv0); pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1); @@ -590,7 +589,6 @@ static struct clksrc_clk *clksrcs[] __initdata = { }; void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, - fdiv_fn get_fdiv, unsigned int *divs, int nr_divs, int divmask) { @@ -620,5 +618,5 @@ void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - s3c2443_common_setup_clocks(get_mpll, get_fdiv); + s3c2443_common_setup_clocks(get_mpll); } diff --git a/arch/arm/plat-samsung/include/plat/s3c2443.h b/arch/arm/plat-samsung/include/plat/s3c2443.h index 5fc4ad0fd756..7fae1a050694 100644 --- a/arch/arm/plat-samsung/include/plat/s3c2443.h +++ b/arch/arm/plat-samsung/include/plat/s3c2443.h @@ -37,10 +37,9 @@ extern int s3c2443_baseclk_add(void); struct clk; /* some files don't need clk.h otherwise */ typedef unsigned int (*pll_fn)(unsigned int reg, unsigned int base); -typedef unsigned int (*fdiv_fn)(unsigned long clkcon0); -extern void s3c2443_common_setup_clocks(pll_fn get_mpll, fdiv_fn fdiv); -extern void s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, fdiv_fn fdiv, +extern void s3c2443_common_setup_clocks(pll_fn get_mpll); +extern void s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, unsigned int *divs, int nr_divs, int divmask); -- cgit v1.2.3