From aa71251c5b8c673361281fbfd8be5a9ee8b9f4cc Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Wed, 16 Jun 2010 07:12:51 +0200 Subject: ARM: mxc: remove paragraphs with old address of the FSF MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As the kernel contains a copy of the GPL anyhow just get rid of the address specification instead of fixing it. Signed-off-by: Uwe Kleine-König --- arch/arm/plat-mxc/ehci.c | 4 ---- 1 file changed, 4 deletions(-) (limited to 'arch/arm/plat-mxc/ehci.c') diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c index 2a8646173c2f..6cedd5d23939 100644 --- a/arch/arm/plat-mxc/ehci.c +++ b/arch/arm/plat-mxc/ehci.c @@ -11,10 +11,6 @@ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software Foundation, - * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include -- cgit v1.2.3 From 648beaf5bd7072031bddd84bf7bb482ec459a603 Mon Sep 17 00:00:00 2001 From: Eric Bénard Date: Tue, 8 Jun 2010 11:02:56 +0200 Subject: plat-mxc/ehci.c: add i.MX25 support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit i.MX25's OTG has the same USBCTRL registers than i.MX35 so reuse most of the i.MX35's defines. Signed-off-by: Eric Bénard Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/ehci.c | 46 +++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 45 insertions(+), 1 deletion(-) (limited to 'arch/arm/plat-mxc/ehci.c') diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c index 2a8646173c2f..618479258bb6 100644 --- a/arch/arm/plat-mxc/ehci.c +++ b/arch/arm/plat-mxc/ehci.c @@ -73,7 +73,51 @@ int mxc_initialize_usb_hw(int port, unsigned int flags) { unsigned int v; -#ifdef CONFIG_ARCH_MX3 +#if defined(CONFIG_ARCH_MX25) + if (cpu_is_mx25()) { + v = readl(MX25_IO_ADDRESS(MX25_OTG_BASE_ADDR + + USBCTRL_OTGBASE_OFFSET)); + + switch (port) { + case 0: /* OTG port */ + v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT); + v |= (flags & MXC_EHCI_INTERFACE_MASK) + << MX35_OTG_SIC_SHIFT; + if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) + v |= MX35_OTG_PM_BIT; + + break; + case 1: /* H1 port */ + v &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_TLL_BIT | + MX35_H1_USBTE_BIT | MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT); + v |= (flags & MXC_EHCI_INTERFACE_MASK) + << MX35_H1_SIC_SHIFT; + if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) + v |= MX35_H1_PM_BIT; + + if (!(flags & MXC_EHCI_TTL_ENABLED)) + v |= MX35_H1_TLL_BIT; + + if (flags & MXC_EHCI_INTERNAL_PHY) + v |= MX35_H1_USBTE_BIT; + + if (flags & MXC_EHCI_IPPUE_DOWN) + v |= MX35_H1_IPPUE_DOWN_BIT; + + if (flags & MXC_EHCI_IPPUE_UP) + v |= MX35_H1_IPPUE_UP_BIT; + + break; + default: + return -EINVAL; + } + + writel(v, MX25_IO_ADDRESS(MX25_OTG_BASE_ADDR + + USBCTRL_OTGBASE_OFFSET)); + return 0; + } +#endif /* CONFIG_ARCH_MX25 */ +#if defined(CONFIG_ARCH_MX3) if (cpu_is_mx31()) { v = readl(MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR + USBCTRL_OTGBASE_OFFSET)); -- cgit v1.2.3