From 7db6c82a37beabef7b76d232e3d20efacd74bd3a Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 31 Oct 2008 16:14:31 +0000 Subject: [ARM] S3C: Move common GPIO code from plat-s3c24xx Move the common parts of the GPIO code into plat-s3c for use with both the s3c24xx and s3c64xx systems. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/gpio.c | 128 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 128 insertions(+) create mode 100644 arch/arm/plat-s3c/gpio.c (limited to 'arch/arm/plat-s3c/gpio.c') diff --git a/arch/arm/plat-s3c/gpio.c b/arch/arm/plat-s3c/gpio.c new file mode 100644 index 000000000000..f035d4550c43 --- /dev/null +++ b/arch/arm/plat-s3c/gpio.c @@ -0,0 +1,128 @@ +/* linux/arch/arm/plat-s3c/gpio.c + * + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C series GPIO core + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include +#include + +#include + +/* Default routines for controlling GPIO, based on the original S3C24XX + * GPIO functions which deal with the case where each gpio bank of the + * chip is as following: + * + * base + 0x00: Control register, 2 bits per gpio + * gpio n: 2 bits starting at (2*n) + * 00 = input, 01 = output, others mean special-function + * base + 0x04: Data register, 1 bit per gpio + * bit n: data bit n +*/ + +static int s3c_gpiolib_input(struct gpio_chip *chip, unsigned offset) +{ + struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); + void __iomem *base = ourchip->base; + unsigned long flags; + unsigned long con; + + local_irq_save(flags); + + con = __raw_readl(base + 0x00); + con &= ~(3 << (offset * 2)); + + __raw_writel(con, base + 0x00); + + local_irq_restore(flags); + return 0; +} + +static int s3c_gpiolib_output(struct gpio_chip *chip, + unsigned offset, int value) +{ + struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); + void __iomem *base = ourchip->base; + unsigned long flags; + unsigned long dat; + unsigned long con; + + local_irq_save(flags); + + dat = __raw_readl(base + 0x04); + dat &= ~(1 << offset); + if (value) + dat |= 1 << offset; + __raw_writel(dat, base + 0x04); + + con = __raw_readl(base + 0x00); + con &= ~(3 << (offset * 2)); + con |= 1 << (offset * 2); + + __raw_writel(con, base + 0x00); + __raw_writel(dat, base + 0x04); + + local_irq_restore(flags); + return 0; +} + +static void s3c_gpiolib_set(struct gpio_chip *chip, + unsigned offset, int value) +{ + struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); + void __iomem *base = ourchip->base; + unsigned long flags; + unsigned long dat; + + local_irq_save(flags); + + dat = __raw_readl(base + 0x04); + dat &= ~(1 << offset); + if (value) + dat |= 1 << offset; + __raw_writel(dat, base + 0x04); + + local_irq_restore(flags); +} + +static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset) +{ + struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); + unsigned long val; + + val = __raw_readl(ourchip->base + 0x04); + val >>= offset; + val &= 1; + + return val; +} + +__init void s3c_gpiolib_add(struct s3c_gpio_chip *chip) +{ + struct gpio_chip *gc = &chip->chip; + + BUG_ON(!chip->base); + BUG_ON(!gc->label); + BUG_ON(!gc->ngpio); + + if (!gc->direction_input) + gc->direction_input = s3c_gpiolib_input; + if (!gc->direction_output) + gc->direction_output = s3c_gpiolib_output; + if (!gc->set) + gc->set = s3c_gpiolib_set; + if (!gc->get) + gc->get = s3c_gpiolib_get; + + /* gpiochip_add() prints own failure message on error. */ + gpiochip_add(gc); +} -- cgit v1.2.3 From 8a53bdb907cb924ed30f79bcfe7f4f15ff7de15e Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 31 Oct 2008 16:14:32 +0000 Subject: [ARM] S3C: Add GPIO chip tracking The gpiolib driver keeps its chip array to itself and having a separate array for s3c-only gpios stops any non-s3c gpio being used in one of the s3c specific configuration calls. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/Kconfig | 6 ++++++ arch/arm/plat-s3c/gpio.c | 21 ++++++++++++++++++++- arch/arm/plat-s3c/include/plat/gpio-core.h | 23 +++++++++++++++++++++++ arch/arm/plat-s3c64xx/Kconfig | 1 + 4 files changed, 50 insertions(+), 1 deletion(-) (limited to 'arch/arm/plat-s3c/gpio.c') diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig index d7767e0305d0..77fc38f51874 100644 --- a/arch/arm/plat-s3c/Kconfig +++ b/arch/arm/plat-s3c/Kconfig @@ -114,6 +114,12 @@ config S3C_GPIO_SPACE one bank to another to be caught, at the expense of using a little more memory. +config S3C_GPIO_TRACK + bool + help + Internal configuration option to enable the s3c specific gpio + chip tracking if the platform requires it. + # device definitions to compile in config S3C_DEV_HSMMC diff --git a/arch/arm/plat-s3c/gpio.c b/arch/arm/plat-s3c/gpio.c index f035d4550c43..d71dd6d9ce5c 100644 --- a/arch/arm/plat-s3c/gpio.c +++ b/arch/arm/plat-s3c/gpio.c @@ -18,6 +18,22 @@ #include +#ifdef CONFIG_S3C_GPIO_TRACK +struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END]; + +static __init void s3c_gpiolib_track(struct s3c_gpio_chip *chip) +{ + unsigned int gpn; + int i; + + gpn = chip->chip.base; + for (i = 0; i < chip->chip.ngpio; i++, gpn++) { + BUG_ON(gpn > ARRAY_SIZE(s3c_gpios)); + s3c_gpios[gpn] = chip; + } +} +#endif /* CONFIG_S3C_GPIO_TRACK */ + /* Default routines for controlling GPIO, based on the original S3C24XX * GPIO functions which deal with the case where each gpio bank of the * chip is as following: @@ -109,6 +125,7 @@ static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset) __init void s3c_gpiolib_add(struct s3c_gpio_chip *chip) { struct gpio_chip *gc = &chip->chip; + int ret; BUG_ON(!chip->base); BUG_ON(!gc->label); @@ -124,5 +141,7 @@ __init void s3c_gpiolib_add(struct s3c_gpio_chip *chip) gc->get = s3c_gpiolib_get; /* gpiochip_add() prints own failure message on error. */ - gpiochip_add(gc); + ret = gpiochip_add(gc); + if (ret >= 0) + s3c_gpiolib_track(chip); } diff --git a/arch/arm/plat-s3c/include/plat/gpio-core.h b/arch/arm/plat-s3c/include/plat/gpio-core.h index 3cb9105c4811..ad68b32a7f9d 100644 --- a/arch/arm/plat-s3c/include/plat/gpio-core.h +++ b/arch/arm/plat-s3c/include/plat/gpio-core.h @@ -47,3 +47,26 @@ static inline struct s3c_gpio_chip *to_s3c_gpio(struct gpio_chip *gpc) * other parts of the system. */ extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip); + + +/* CONFIG_S3C_GPIO_TRACK enables the tracking of the s3c specific gpios + * for use with the configuration calls, and other parts of the s3c gpiolib + * support code. + * + * Not all s3c support code will need this, as some configurations of cpu + * may only support one or two different configuration options and have an + * easy gpio to s3c_gpio_chip mapping function. If this is the case, then + * the machine support file should provide its own s3c_gpiolib_getchip() + * and any other necessary functions. + */ + +#ifdef CONFIG_S3C_GPIO_TRACK +extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END]; + +static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int chip) +{ + return s3c_gpios[chip]; +} +#else +static inline void s3c_gpiolib_track(struct s3c_gpio_chip *chip) { } +#endif diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig index bd832ba0cf77..3df2ec19d08a 100644 --- a/arch/arm/plat-s3c64xx/Kconfig +++ b/arch/arm/plat-s3c64xx/Kconfig @@ -14,6 +14,7 @@ config PLAT_S3C64XX default y select NO_IOPORT select ARCH_REQUIRE_GPIOLIB + select S3C_GPIO_TRACK help Base platform code for any Samsung S3C64XX device -- cgit v1.2.3