From bb19a7513dffc82f4b474ed90fc8ed691b54768b Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 25 Jan 2012 13:48:11 +0900 Subject: ARM: EXYNOS: add interrupt definitions for EXYNOS5250 This patch adds the interrupt definitions for EXYNOS5250 at file and it is needed for EXYNOS5250 SoC. As a note, for single zImage of EXYNOS4 and EXYNOS5, prefix of EXYNOS4_ and EXYNOS5_ has been added. Signed-off-by: Kukjin Kim --- arch/arm/plat-samsung/irq-vic-timer.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'arch/arm/plat-samsung/irq-vic-timer.c') diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c index 51583cd30164..f980cf3d2baa 100644 --- a/arch/arm/plat-samsung/irq-vic-timer.c +++ b/arch/arm/plat-samsung/irq-vic-timer.c @@ -19,6 +19,7 @@ #include #include +#include #include #include @@ -57,6 +58,21 @@ void __init s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq) struct irq_chip_type *ct; unsigned int i; +#ifdef CONFIG_ARCH_EXYNOS + if (soc_is_exynos5250()) { + pirq[0] = EXYNOS5_IRQ_TIMER0_VIC; + pirq[1] = EXYNOS5_IRQ_TIMER1_VIC; + pirq[2] = EXYNOS5_IRQ_TIMER2_VIC; + pirq[3] = EXYNOS5_IRQ_TIMER3_VIC; + pirq[4] = EXYNOS5_IRQ_TIMER4_VIC; + } else { + pirq[0] = EXYNOS4_IRQ_TIMER0_VIC; + pirq[1] = EXYNOS4_IRQ_TIMER1_VIC; + pirq[2] = EXYNOS4_IRQ_TIMER2_VIC; + pirq[3] = EXYNOS4_IRQ_TIMER3_VIC; + pirq[4] = EXYNOS4_IRQ_TIMER4_VIC; + } +#endif s3c_tgc = irq_alloc_generic_chip("s3c-timer", 1, timer_irq, S3C64XX_TINT_CSTAT, handle_level_irq); -- cgit v1.2.3