From 4642019dc4457486223e1fb75a6a4cba6e0e903a Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Thu, 11 Jun 2015 18:50:17 +0100 Subject: arm/arm64: KVM: vgic: Do not save GICH_HCR / ICH_HCR_EL2 The GIC Hypervisor Configuration Register is used to enable the delivery of virtual interupts to a guest, as well as to define in which conditions maintenance interrupts are delivered to the host. This register doesn't contain any information that we need to read back (the EOIcount is utterly useless for us). So let's save ourselves some cycles, and not save it before writing zero to it. Signed-off-by: Marc Zyngier --- arch/arm64/kvm/vgic-v3-switch.S | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm64/kvm/vgic-v3-switch.S') diff --git a/arch/arm64/kvm/vgic-v3-switch.S b/arch/arm64/kvm/vgic-v3-switch.S index 617a012a0107..3c20730ddff5 100644 --- a/arch/arm64/kvm/vgic-v3-switch.S +++ b/arch/arm64/kvm/vgic-v3-switch.S @@ -48,13 +48,11 @@ dsb st // Save all interesting registers - mrs_s x4, ICH_HCR_EL2 mrs_s x5, ICH_VMCR_EL2 mrs_s x6, ICH_MISR_EL2 mrs_s x7, ICH_EISR_EL2 mrs_s x8, ICH_ELSR_EL2 - str w4, [x3, #VGIC_V3_CPU_HCR] str w5, [x3, #VGIC_V3_CPU_VMCR] str w6, [x3, #VGIC_V3_CPU_MISR] str w7, [x3, #VGIC_V3_CPU_EISR] -- cgit v1.2.3