From c1becedc8871645278832fabdc6fe138082a495b Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 10 Aug 2011 10:23:45 +0100 Subject: ARM: enable ARM_PATCH_PHYS_VIRT by default Enable virtual to physical translation patching by default in all kernels. Hide the option behind EMBEDDED. This can still be turned off if people desire, and they know what they're doing, to shrink the size of the kernel to a minimum. Acked-by: Will Deacon Signed-off-by: Russell King --- arch/arm/Kconfig | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5ebc5d922ea1..8882a535cf44 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -195,7 +195,8 @@ config VECTORS_BASE The base address of exception vectors. config ARM_PATCH_PHYS_VIRT - bool "Patch physical to virtual translations at runtime" + bool "Patch physical to virtual translations at runtime" if EMBEDDED + default y depends on !XIP_KERNEL && MMU depends on !ARCH_REALVIEW || !SPARSEMEM help @@ -207,6 +208,10 @@ config ARM_PATCH_PHYS_VIRT of physical memory is at a 16MB boundary, or theoretically 64K for the MSM machine class. + Only disable this option if you know that you do not require + this feature (eg, building a kernel for a single machine) and + you need to shrink the kernel to the minimal size. + config ARM_PATCH_PHYS_VIRT_16BIT def_bool y depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM @@ -301,7 +306,6 @@ config ARCH_AT91 select ARCH_REQUIRE_GPIOLIB select HAVE_CLK select CLKDEV_LOOKUP - select ARM_PATCH_PHYS_VIRT if MMU help This enables support for systems based on the Atmel AT91RM9200, AT91SAM9 and AT91CAP9 processors. -- cgit v1.2.3 From 9e775ad19f52d70a53797b4d0eb740c52b0a9567 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Fri, 12 Aug 2011 00:14:28 +0100 Subject: ARM: 7012/1: Set proper TEXT_OFFSET for newer MSMs MSMs post 8x50 have 2Mb at the beginning of RAM reserved for shared memory. Since the kernel hasn't typically been told this RAM exists, PHYS_OFFSET has been set to 0xN0200000 and the memory atags passed to the kernel have matched. This doesn't play nicely with things such as AUTO_ZRELADDR, which doesn't work at all, and dynamic phys to virt, which requires an MSM specific workaround. Work around these issues by telling the kernel RAM starts at 0xN0000000 (it actually does) and fixup the atags from the bootloader (if necessary) to say the same. In addition, make sure to set TEXT_OFFSET at least 2Mb beyond the start of RAM so that the kernel doesn't end up being decompressed into shared memory. After doing this, AUTO_ZRELADDR should work on MSM with no problems and ARM_PATCH_PHYS_VIRT_16BIT should no longer be necessary. Signed-off-by: Stephen Boyd Acked-by: Nicolas Pitre Acked-by: David Brown Signed-off-by: Russell King --- arch/arm/Makefile | 3 +++ arch/arm/mach-msm/board-msm7x30.c | 22 ++++++++++++++++++++++ arch/arm/mach-msm/board-msm8960.c | 22 ++++++++++++++++++++++ arch/arm/mach-msm/board-msm8x60.c | 25 +++++++++++++++++++++++++ arch/arm/mach-msm/include/mach/memory.h | 6 +++--- 5 files changed, 75 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 70c424eaf7b0..5665c2a3b652 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -128,6 +128,9 @@ textofs-$(CONFIG_PM_H1940) := 0x00108000 ifeq ($(CONFIG_ARCH_SA1100),y) textofs-$(CONFIG_SA1111) := 0x00208000 endif +textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000 +textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000 +textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c index b7a84966b711..d1e4cc83b1e6 100644 --- a/arch/arm/mach-msm/board-msm7x30.c +++ b/arch/arm/mach-msm/board-msm7x30.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -42,6 +43,21 @@ extern struct sys_timer msm_timer; +static void __init msm7x30_fixup(struct machine_desc *desc, struct tag *tag, + char **cmdline, struct meminfo *mi) +{ + for (; tag->hdr.size; tag = tag_next(tag)) + if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) { + tag->u.mem.start = 0; + tag->u.mem.size += SZ_2M; + } +} + +static void __init msm7x30_reserve(void) +{ + memblock_remove(0x0, SZ_2M); +} + static int hsusb_phy_init_seq[] = { 0x30, 0x32, /* Enable and set Pre-Emphasis Depth to 20% */ 0x02, 0x36, /* Disable CDR Auto Reset feature */ @@ -107,6 +123,8 @@ static void __init msm7x30_map_io(void) MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF") .boot_params = PLAT_PHYS_OFFSET + 0x100, + .fixup = msm7x30_fixup, + .reserve = msm7x30_reserve, .map_io = msm7x30_map_io, .init_irq = msm7x30_init_irq, .init_machine = msm7x30_init, @@ -115,6 +133,8 @@ MACHINE_END MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA") .boot_params = PLAT_PHYS_OFFSET + 0x100, + .fixup = msm7x30_fixup, + .reserve = msm7x30_reserve, .map_io = msm7x30_map_io, .init_irq = msm7x30_init_irq, .init_machine = msm7x30_init, @@ -123,6 +143,8 @@ MACHINE_END MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID") .boot_params = PLAT_PHYS_OFFSET + 0x100, + .fixup = msm7x30_fixup, + .reserve = msm7x30_reserve, .map_io = msm7x30_map_io, .init_irq = msm7x30_init_irq, .init_machine = msm7x30_init, diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c index 35c7ceeb3f29..b04468e7d00e 100644 --- a/arch/arm/mach-msm/board-msm8960.c +++ b/arch/arm/mach-msm/board-msm8960.c @@ -20,16 +20,34 @@ #include #include #include +#include #include #include #include +#include #include #include #include "devices.h" +static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag, + char **cmdline, struct meminfo *mi) +{ + for (; tag->hdr.size; tag = tag_next(tag)) + if (tag->hdr.tag == ATAG_MEM && + tag->u.mem.start == 0x40200000) { + tag->u.mem.start = 0x40000000; + tag->u.mem.size += SZ_2M; + } +} + +static void __init msm8960_reserve(void) +{ + memblock_remove(0x40000000, SZ_2M); +} + static void __init msm8960_map_io(void) { msm_map_msm8960_io(); @@ -76,6 +94,8 @@ static void __init msm8960_rumi3_init(void) } MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR") + .fixup = msm8960_fixup, + .reserve = msm8960_reserve, .map_io = msm8960_map_io, .init_irq = msm8960_init_irq, .timer = &msm_timer, @@ -83,6 +103,8 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR") MACHINE_END MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3") + .fixup = msm8960_fixup, + .reserve = msm8960_reserve, .map_io = msm8960_map_io, .init_irq = msm8960_init_irq, .timer = &msm_timer, diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c index 1163b6fd05d2..9221f54778be 100644 --- a/arch/arm/mach-msm/board-msm8x60.c +++ b/arch/arm/mach-msm/board-msm8x60.c @@ -20,14 +20,31 @@ #include #include #include +#include #include #include #include +#include #include #include +static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag, + char **cmdline, struct meminfo *mi) +{ + for (; tag->hdr.size; tag = tag_next(tag)) + if (tag->hdr.tag == ATAG_MEM && + tag->u.mem.start == 0x40200000) { + tag->u.mem.start = 0x40000000; + tag->u.mem.size += SZ_2M; + } +} + +static void __init msm8x60_reserve(void) +{ + memblock_remove(0x40000000, SZ_2M); +} static void __init msm8x60_map_io(void) { @@ -65,6 +82,8 @@ static void __init msm8x60_init(void) } MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") + .fixup = msm8x60_fixup, + .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, .init_irq = msm8x60_init_irq, .init_machine = msm8x60_init, @@ -72,6 +91,8 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") MACHINE_END MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF") + .fixup = msm8x60_fixup, + .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, .init_irq = msm8x60_init_irq, .init_machine = msm8x60_init, @@ -79,6 +100,8 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF") MACHINE_END MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR") + .fixup = msm8x60_fixup, + .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, .init_irq = msm8x60_init_irq, .init_machine = msm8x60_init, @@ -86,6 +109,8 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR") MACHINE_END MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA") + .fixup = msm8x60_fixup, + .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, .init_irq = msm8x60_init_irq, .init_machine = msm8x60_init, diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h index f2f8d299ba95..58d5e7eec431 100644 --- a/arch/arm/mach-msm/include/mach/memory.h +++ b/arch/arm/mach-msm/include/mach/memory.h @@ -22,11 +22,11 @@ #elif defined(CONFIG_ARCH_QSD8X50) #define PLAT_PHYS_OFFSET UL(0x20000000) #elif defined(CONFIG_ARCH_MSM7X30) -#define PLAT_PHYS_OFFSET UL(0x00200000) +#define PLAT_PHYS_OFFSET UL(0x00000000) #elif defined(CONFIG_ARCH_MSM8X60) -#define PLAT_PHYS_OFFSET UL(0x40200000) +#define PLAT_PHYS_OFFSET UL(0x40000000) #elif defined(CONFIG_ARCH_MSM8960) -#define PLAT_PHYS_OFFSET UL(0x40200000) +#define PLAT_PHYS_OFFSET UL(0x40000000) #else #define PLAT_PHYS_OFFSET UL(0x10000000) #endif -- cgit v1.2.3 From daece59689e76ed55d8863cae04993679a8e844e Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Fri, 12 Aug 2011 00:14:29 +0100 Subject: ARM: 7013/1: P2V: Remove ARM_PATCH_PHYS_VIRT_16BIT This code can be removed now that MSM targets no longer need the 16-bit offsets for P2V. Signed-off-by: Nicolas Pitre Signed-off-by: Stephen Boyd Signed-off-by: Russell King --- arch/arm/Kconfig | 10 +------ arch/arm/include/asm/memory.h | 7 ----- arch/arm/include/asm/module.h | 4 --- arch/arm/kernel/head.S | 61 +++++++++---------------------------------- 4 files changed, 14 insertions(+), 68 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8882a535cf44..272eadc7a12c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -205,20 +205,12 @@ config ARM_PATCH_PHYS_VIRT kernel in system memory. This can only be used with non-XIP MMU kernels where the base - of physical memory is at a 16MB boundary, or theoretically 64K - for the MSM machine class. + of physical memory is at a 16MB boundary. Only disable this option if you know that you do not require this feature (eg, building a kernel for a single machine) and you need to shrink the kernel to the minimal size. -config ARM_PATCH_PHYS_VIRT_16BIT - def_bool y - depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM - help - This option extends the physical to virtual translation patching - to allow physical memory down to a theoretical minimum of 64K - boundaries. source "init/Kconfig" diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index b8de516e600e..441fc4fe8263 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h @@ -160,7 +160,6 @@ * so that all we need to do is modify the 8-bit constant field. */ #define __PV_BITS_31_24 0x81000000 -#define __PV_BITS_23_16 0x00810000 extern unsigned long __pv_phys_offset; #define PHYS_OFFSET __pv_phys_offset @@ -178,9 +177,6 @@ static inline unsigned long __virt_to_phys(unsigned long x) { unsigned long t; __pv_stub(x, t, "add", __PV_BITS_31_24); -#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT - __pv_stub(t, t, "add", __PV_BITS_23_16); -#endif return t; } @@ -188,9 +184,6 @@ static inline unsigned long __phys_to_virt(unsigned long x) { unsigned long t; __pv_stub(x, t, "sub", __PV_BITS_31_24); -#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT - __pv_stub(t, t, "sub", __PV_BITS_23_16); -#endif return t; } #else diff --git a/arch/arm/include/asm/module.h b/arch/arm/include/asm/module.h index 543b44916d2c..6c6809f982f1 100644 --- a/arch/arm/include/asm/module.h +++ b/arch/arm/include/asm/module.h @@ -31,11 +31,7 @@ struct mod_arch_specific { /* Add __virt_to_phys patching state as well */ #ifdef CONFIG_ARM_PATCH_PHYS_VIRT -#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT -#define MODULE_ARCH_VERMAGIC_P2V "p2v16 " -#else #define MODULE_ARCH_VERMAGIC_P2V "p2v8 " -#endif #else #define MODULE_ARCH_VERMAGIC_P2V "" #endif diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 742b6108a001..136abb610948 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -488,13 +488,8 @@ __fixup_pv_table: add r5, r5, r3 @ adjust table end address add r7, r7, r3 @ adjust __pv_phys_offset address str r8, [r7] @ save computed PHYS_OFFSET to __pv_phys_offset -#ifndef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT mov r6, r3, lsr #24 @ constant for add/sub instructions teq r3, r6, lsl #24 @ must be 16MiB aligned -#else - mov r6, r3, lsr #16 @ constant for add/sub instructions - teq r3, r6, lsl #16 @ must be 64kiB aligned -#endif THUMB( it ne @ cross section branch ) bne __error str r6, [r7, #4] @ save to __pv_offset @@ -510,20 +505,8 @@ ENDPROC(__fixup_pv_table) .text __fixup_a_pv_table: #ifdef CONFIG_THUMB2_KERNEL -#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT - lsls r0, r6, #24 - lsr r6, #8 - beq 1f - clz r7, r0 - lsr r0, #24 - lsl r0, r7 - bic r0, 0x0080 - lsrs r7, #1 - orrcs r0, #0x0080 - orr r0, r0, r7, lsl #12 -#endif -1: lsls r6, #24 - beq 4f + lsls r6, #24 + beq 2f clz r7, r6 lsr r6, #24 lsl r6, r7 @@ -532,43 +515,25 @@ __fixup_a_pv_table: orrcs r6, #0x0080 orr r6, r6, r7, lsl #12 orr r6, #0x4000 - b 4f -2: @ at this point the C flag is always clear - add r7, r3 -#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT - ldrh ip, [r7] - tst ip, 0x0400 @ the i bit tells us LS or MS byte - beq 3f - cmp r0, #0 @ set C flag, and ... - biceq ip, 0x0400 @ immediate zero value has a special encoding - streqh ip, [r7] @ that requires the i bit cleared -#endif -3: ldrh ip, [r7, #2] + b 2f +1: add r7, r3 + ldrh ip, [r7, #2] and ip, 0x8f00 - orrcc ip, r6 @ mask in offset bits 31-24 - orrcs ip, r0 @ mask in offset bits 23-16 + orr ip, r6 @ mask in offset bits 31-24 strh ip, [r7, #2] -4: cmp r4, r5 +2: cmp r4, r5 ldrcc r7, [r4], #4 @ use branch for delay slot - bcc 2b + bcc 1b bx lr #else -#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT - and r0, r6, #255 @ offset bits 23-16 - mov r6, r6, lsr #8 @ offset bits 31-24 -#else - mov r0, #0 @ just in case... -#endif - b 3f -2: ldr ip, [r7, r3] + b 2f +1: ldr ip, [r7, r3] bic ip, ip, #0x000000ff - tst ip, #0x400 @ rotate shift tells us LS or MS byte - orrne ip, ip, r6 @ mask in offset bits 31-24 - orreq ip, ip, r0 @ mask in offset bits 23-16 + orr ip, ip, r6 @ mask in offset bits 31-24 str ip, [r7, r3] -3: cmp r4, r5 +2: cmp r4, r5 ldrcc r7, [r4], #4 @ use branch for delay slot - bcc 2b + bcc 1b mov pc, lr #endif ENDPROC(__fixup_a_pv_table) -- cgit v1.2.3 From fb1dddd73dfd35d4f8669c4b849ce33483950237 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 6 Jul 2011 13:05:15 +0100 Subject: ARM: io: s3c2410: remove ioaddr() There is only one user of ioaddr() in the kernel, and that is the Acorn expansion card core code. S3C2410 does not use this code, and so the definition of ioaddr() is redundant. Signed-off-by: Russell King --- arch/arm/mach-s3c2410/include/mach/io.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-s3c2410/include/mach/io.h b/arch/arm/mach-s3c2410/include/mach/io.h index 9813dbf2ae4f..118749f37c4c 100644 --- a/arch/arm/mach-s3c2410/include/mach/io.h +++ b/arch/arm/mach-s3c2410/include/mach/io.h @@ -199,8 +199,6 @@ DECLARE_IO(int,l,"") #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) #define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) -/* the following macro is deprecated */ -#define ioaddr(port) __ioaddr((port)) #define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l) #define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l) -- cgit v1.2.3 From d0a84e72eb755f58ba350d9988bfbdffd6f5a22c Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 7 Jul 2011 11:31:36 +0100 Subject: ARM: io: RiscPC: define io addresses relative to IO_BASE Signed-off-by: Russell King --- arch/arm/mach-rpc/include/mach/hardware.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-rpc/include/mach/hardware.h b/arch/arm/mach-rpc/include/mach/hardware.h index dde6b3c0e299..822b810215d7 100644 --- a/arch/arm/mach-rpc/include/mach/hardware.h +++ b/arch/arm/mach-rpc/include/mach/hardware.h @@ -51,12 +51,12 @@ /* * IO Addresses */ -#define VIDC_BASE IOMEM(0xe0400000) -#define EXPMASK_BASE 0xe0360000 -#define IOMD_BASE IOMEM(0xe0200000) -#define IOC_BASE IOMEM(0xe0200000) -#define PCIO_BASE IOMEM(0xe0010000) -#define FLOPPYDMA_BASE IOMEM(0xe002a000) +#define VIDC_BASE (IO_BASE + 0x00400000) +#define EXPMASK_BASE (IO_BASE + 0x00360000) +#define IOMD_BASE (IO_BASE + 0x00200000) +#define IOC_BASE (IO_BASE + 0x00200000) +#define FLOPPYDMA_BASE (IO_BASE + 0x0002a000) +#define PCIO_BASE (IO_BASE + 0x00010000) #define vidc_writel(val) __raw_writel(val, VIDC_BASE) -- cgit v1.2.3 From 1ace756628443ac41e8b6b409277fc4ee847472e Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 7 Jul 2011 10:56:41 +0100 Subject: ARM: io: ecard: move ioaddr() inside __ecard_address Signed-off-by: Russell King --- arch/arm/include/asm/ecard.h | 1 - arch/arm/kernel/ecard.c | 11 ++++++----- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/ecard.h b/arch/arm/include/asm/ecard.h index 29f2610efc70..eaea14676d57 100644 --- a/arch/arm/include/asm/ecard.h +++ b/arch/arm/include/asm/ecard.h @@ -161,7 +161,6 @@ struct expansion_card { /* Private internal data */ const char *card_desc; /* Card description */ - CONST unsigned int podaddr; /* Base Linux address for card */ CONST loader_t loader; /* loader program */ u64 dma_mask; }; diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index d16500110ee9..920f1a371a22 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -678,13 +678,13 @@ static int __init ecard_probeirqhw(void) #define IO_EC_MEMC8_BASE 0 #endif -static unsigned int __ecard_address(ecard_t *ec, card_type_t type, card_speed_t speed) +static void __iomem *__ecard_address(ecard_t *ec, card_type_t type, card_speed_t speed) { unsigned long address = 0; int slot = ec->slot_no; if (ec->slot_no == 8) - return IO_EC_MEMC8_BASE; + return (void __iomem *)ioaddr(IO_EC_MEMC8_BASE); ectcr &= ~(1 << slot); @@ -719,7 +719,7 @@ static unsigned int __ecard_address(ecard_t *ec, card_type_t type, card_speed_t #ifdef IOMD_ECTCR iomd_writeb(ectcr, IOMD_ECTCR); #endif - return address; + return (void __iomem *)(address ? ioaddr(address) : NULL); } static int ecard_prints(struct seq_file *m, ecard_t *ec) @@ -990,6 +990,7 @@ ecard_probe(int slot, card_type_t type) ecard_t **ecp; ecard_t *ec; struct ex_ecid cid; + void __iomem *addr; int i, rc; ec = ecard_alloc_card(type, slot); @@ -999,7 +1000,7 @@ ecard_probe(int slot, card_type_t type) } rc = -ENODEV; - if ((ec->podaddr = __ecard_address(ec, type, ECARD_SYNC)) == 0) + if ((addr = __ecard_address(ec, type, ECARD_SYNC)) == NULL) goto nodev; cid.r_zero = 1; @@ -1019,7 +1020,7 @@ ecard_probe(int slot, card_type_t type) ec->cid.fiqmask = cid.r_fiqmask; ec->cid.fiqoff = ecard_gets24(cid.r_fiqoff); ec->fiqaddr = - ec->irqaddr = (void __iomem *)ioaddr(ec->podaddr); + ec->irqaddr = addr; if (ec->cid.is) { ec->irqmask = ec->cid.irqmask; -- cgit v1.2.3 From 06cf0b5468f204754f32e571f8415b20cedbe5f0 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 7 Jul 2011 11:07:36 +0100 Subject: ARM: io: ecard: remove ioaddr() from ecard.c Remove ioaddr() usage from ecard.c, updating (and renaming) the constants in RiscPC's hardware.h to contain the proper translation. As this gets rid of the last ioaddr() usage, kill that too. Signed-off-by: Russell King --- arch/arm/kernel/ecard.c | 29 +++++++++-------------------- arch/arm/mach-rpc/include/mach/hardware.h | 11 +++++------ arch/arm/mach-rpc/include/mach/io.h | 3 --- 3 files changed, 14 insertions(+), 29 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index 920f1a371a22..3e84f66de8f7 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -674,44 +674,37 @@ static int __init ecard_probeirqhw(void) #define ecard_probeirqhw() (0) #endif -#ifndef IO_EC_MEMC8_BASE -#define IO_EC_MEMC8_BASE 0 -#endif - static void __iomem *__ecard_address(ecard_t *ec, card_type_t type, card_speed_t speed) { - unsigned long address = 0; + void __iomem *address = NULL; int slot = ec->slot_no; if (ec->slot_no == 8) - return (void __iomem *)ioaddr(IO_EC_MEMC8_BASE); + return ECARD_MEMC8_BASE; ectcr &= ~(1 << slot); switch (type) { case ECARD_MEMC: if (slot < 4) - address = IO_EC_MEMC_BASE + (slot << 12); + address = ECARD_MEMC_BASE + (slot << 14); break; case ECARD_IOC: if (slot < 4) - address = IO_EC_IOC_BASE + (slot << 12); -#ifdef IO_EC_IOC4_BASE + address = ECARD_IOC_BASE + (slot << 14); else - address = IO_EC_IOC4_BASE + ((slot - 4) << 12); -#endif + address = ECARD_IOC4_BASE + ((slot - 4) << 14); if (address) - address += speed << 17; + address += speed << 19; break; -#ifdef IO_EC_EASI_BASE case ECARD_EASI: - address = IO_EC_EASI_BASE + (slot << 22); + address = ECARD_EASI_BASE + (slot << 24); if (speed == ECARD_FAST) ectcr |= 1 << slot; break; -#endif + default: break; } @@ -719,7 +712,7 @@ static void __iomem *__ecard_address(ecard_t *ec, card_type_t type, card_speed_t #ifdef IOMD_ECTCR iomd_writeb(ectcr, IOMD_ECTCR); #endif - return (void __iomem *)(address ? ioaddr(address) : NULL); + return address; } static int ecard_prints(struct seq_file *m, ecard_t *ec) @@ -1049,10 +1042,8 @@ ecard_probe(int slot, card_type_t type) set_irq_flags(ec->irq, IRQF_VALID); } -#ifdef IO_EC_MEMC8_BASE if (slot == 8) ec->irq = 11; -#endif #ifdef CONFIG_ARCH_RPC /* On RiscPC, only first two slots have DMA capability */ if (slot < 2) @@ -1098,9 +1089,7 @@ static int __init ecard_init(void) ecard_probe(slot, ECARD_IOC); } -#ifdef IO_EC_MEMC8_BASE ecard_probe(8, ECARD_IOC); -#endif irqhw = ecard_probeirqhw(); diff --git a/arch/arm/mach-rpc/include/mach/hardware.h b/arch/arm/mach-rpc/include/mach/hardware.h index 822b810215d7..41777660d9fe 100644 --- a/arch/arm/mach-rpc/include/mach/hardware.h +++ b/arch/arm/mach-rpc/include/mach/hardware.h @@ -51,21 +51,20 @@ /* * IO Addresses */ +#define ECARD_EASI_BASE (IO_BASE + 0x05000000) #define VIDC_BASE (IO_BASE + 0x00400000) #define EXPMASK_BASE (IO_BASE + 0x00360000) +#define ECARD_IOC4_BASE (IO_BASE + 0x00270000) +#define ECARD_IOC_BASE (IO_BASE + 0x00240000) #define IOMD_BASE (IO_BASE + 0x00200000) #define IOC_BASE (IO_BASE + 0x00200000) +#define ECARD_MEMC8_BASE (IO_BASE + 0x0002b000) #define FLOPPYDMA_BASE (IO_BASE + 0x0002a000) #define PCIO_BASE (IO_BASE + 0x00010000) +#define ECARD_MEMC_BASE (IO_BASE + 0x00000000) #define vidc_writel(val) __raw_writel(val, VIDC_BASE) -#define IO_EC_EASI_BASE 0x81400000 -#define IO_EC_IOC4_BASE 0x8009c000 -#define IO_EC_IOC_BASE 0x80090000 -#define IO_EC_MEMC8_BASE 0x8000ac00 -#define IO_EC_MEMC_BASE 0x80000000 - #define NETSLOT_BASE 0x0302b000 #define NETSLOT_SIZE 0x00001000 diff --git a/arch/arm/mach-rpc/include/mach/io.h b/arch/arm/mach-rpc/include/mach/io.h index 20da7f486e51..dd706ff25940 100644 --- a/arch/arm/mach-rpc/include/mach/io.h +++ b/arch/arm/mach-rpc/include/mach/io.h @@ -196,9 +196,6 @@ DECLARE_IO(int,l,"") #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) -/* the following macro is deprecated */ -#define ioaddr(port) ((unsigned long)__ioaddr((port))) - #define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l) #define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l) -- cgit v1.2.3 From 5e4cdb83edd69d24b744cd88a9537680e905a518 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 7 Jul 2011 11:40:52 +0100 Subject: ARM: io: RiscPC: make EASI_BASE a void iomem pointer Signed-off-by: Russell King --- arch/arm/kernel/ecard.c | 2 +- arch/arm/mach-rpc/include/mach/hardware.h | 4 ++-- arch/arm/mach-rpc/riscpc.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index 3e84f66de8f7..4dd0edab6a65 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -237,7 +237,7 @@ static void ecard_init_pgtables(struct mm_struct *mm) memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (IO_SIZE / PGDIR_SIZE)); - src_pgd = pgd_offset(mm, EASI_BASE); + src_pgd = pgd_offset(mm, (unsigned long)EASI_BASE); dst_pgd = pgd_offset(mm, EASI_START); memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE)); diff --git a/arch/arm/mach-rpc/include/mach/hardware.h b/arch/arm/mach-rpc/include/mach/hardware.h index 41777660d9fe..050d63c74cc1 100644 --- a/arch/arm/mach-rpc/include/mach/hardware.h +++ b/arch/arm/mach-rpc/include/mach/hardware.h @@ -36,7 +36,7 @@ #define EASI_SIZE 0x08000000 /* EASI I/O */ #define EASI_START 0x08000000 -#define EASI_BASE 0xe5000000 +#define EASI_BASE IOMEM(0xe5000000) #define IO_START 0x03000000 /* I/O */ #define IO_SIZE 0x01000000 @@ -51,7 +51,7 @@ /* * IO Addresses */ -#define ECARD_EASI_BASE (IO_BASE + 0x05000000) +#define ECARD_EASI_BASE (EASI_BASE) #define VIDC_BASE (IO_BASE + 0x00400000) #define EXPMASK_BASE (IO_BASE + 0x00360000) #define ECARD_IOC4_BASE (IO_BASE + 0x00270000) diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c index 580b3c73d2c7..1e0e60d04622 100644 --- a/arch/arm/mach-rpc/riscpc.c +++ b/arch/arm/mach-rpc/riscpc.c @@ -74,7 +74,7 @@ static struct map_desc rpc_io_desc[] __initdata = { .length = IO_SIZE , .type = MT_DEVICE }, { /* EASI space */ - .virtual = EASI_BASE, + .virtual = (unsigned long)EASI_BASE, .pfn = __phys_to_pfn(EASI_START), .length = EASI_SIZE, .type = MT_DEVICE -- cgit v1.2.3 From 0d26449dd61852358477ade4afe3759edf5cab1b Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 7 Jul 2011 14:43:11 +0100 Subject: ARM: io: RiscPC: eliminate private inb() et.al. definitions As we've got rid of the bit-31 set IO addresses, we can now use the standard inb() definitions and reduce the IO space limit to 64K. Signed-off-by: Russell King --- arch/arm/mach-rpc/include/mach/io.h | 190 ++---------------------------------- 1 file changed, 8 insertions(+), 182 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-rpc/include/mach/io.h b/arch/arm/mach-rpc/include/mach/io.h index dd706ff25940..695f4ed2e11b 100644 --- a/arch/arm/mach-rpc/include/mach/io.h +++ b/arch/arm/mach-rpc/include/mach/io.h @@ -15,192 +15,18 @@ #include -#define IO_SPACE_LIMIT 0xffffffff +#define IO_SPACE_LIMIT 0xffff /* - * We use two different types of addressing - PC style addresses, and ARM - * addresses. PC style accesses the PC hardware with the normal PC IO - * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ - * and are translated to the start of IO. Note that all addresses are - * shifted left! - */ -#define __PORT_PCIO(x) (!((x) & 0x80000000)) - -/* - * Dynamic IO functions. - */ -static inline void __outb (unsigned int value, unsigned int port) -{ - unsigned long temp; - __asm__ __volatile__( - "tst %2, #0x80000000\n\t" - "mov %0, %4\n\t" - "addeq %0, %0, %3\n\t" - "strb %1, [%0, %2, lsl #2] @ outb" - : "=&r" (temp) - : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) - : "cc"); -} - -static inline void __outw (unsigned int value, unsigned int port) -{ - unsigned long temp; - __asm__ __volatile__( - "tst %2, #0x80000000\n\t" - "mov %0, %4\n\t" - "addeq %0, %0, %3\n\t" - "str %1, [%0, %2, lsl #2] @ outw" - : "=&r" (temp) - : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) - : "cc"); -} - -static inline void __outl (unsigned int value, unsigned int port) -{ - unsigned long temp; - __asm__ __volatile__( - "tst %2, #0x80000000\n\t" - "mov %0, %4\n\t" - "addeq %0, %0, %3\n\t" - "str %1, [%0, %2, lsl #2] @ outl" - : "=&r" (temp) - : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) - : "cc"); -} - -#define DECLARE_DYN_IN(sz,fnsuffix,instr) \ -static inline unsigned sz __in##fnsuffix (unsigned int port) \ -{ \ - unsigned long temp, value; \ - __asm__ __volatile__( \ - "tst %2, #0x80000000\n\t" \ - "mov %0, %4\n\t" \ - "addeq %0, %0, %3\n\t" \ - "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \ - : "=&r" (temp), "=r" (value) \ - : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ - : "cc"); \ - return (unsigned sz)value; \ -} - -static inline void __iomem *__deprecated __ioaddr(unsigned int port) -{ - void __iomem *ret; - if (__PORT_PCIO(port)) - ret = PCIO_BASE; - else - ret = IO_BASE; - return ret + (port << 2); -} - -#define DECLARE_IO(sz,fnsuffix,instr) \ - DECLARE_DYN_IN(sz,fnsuffix,instr) - -DECLARE_IO(char,b,"b") -DECLARE_IO(short,w,"") -DECLARE_IO(int,l,"") - -#undef DECLARE_IO -#undef DECLARE_DYN_IN - -/* - * Constant address IO functions + * We need PC style IO addressing for: + * - floppy (at 0x3f2,0x3f4,0x3f5,0x3f7) + * - parport (at 0x278-0x27a, 0x27b-0x27f, 0x778-0x77a) + * - 8250 serial (only for compile) * - * These have to be macros for the 'J' constraint to work - - * +/-4096 immediate operand. + * These peripherals are found in an area of MMIO which looks very much + * like an ISA bus, but with registers at the low byte of each word. */ -#define __outbc(value,port) \ -({ \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inbc(port) \ -({ \ - unsigned char result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result; \ -}) - -#define __outwc(value,port) \ -({ \ - unsigned long __v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outwc" \ - : : "r" (__v|__v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outwc" \ - : : "r" (__v|__v<<16), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inwc(port) \ -({ \ - unsigned short result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inwc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inwc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result & 0xffff; \ -}) - -#define __outlc(value,port) \ -({ \ - unsigned long __v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (__v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (__v), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inlc(port) \ -({ \ - unsigned long result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result; \ -}) - -#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) -#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) -#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) -#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) -#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) -#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) - -#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l) -#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l) - -#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l) -#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l) +#define __io(a) (PCIO_BASE + ((a) << 2)) /* * 1:1 mapping for ioremapped regions. -- cgit v1.2.3 From 04e1c83806e30ae339fc45def595960c7fef1697 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 6 Jul 2011 12:49:59 +0100 Subject: ARM: io: add a default IO_SPACE_LIMIT definition Add a default IO_SPACE_LIMIT definition. Explain the chosen value and suggest why platforms would want to make it larger. Signed-off-by: Russell King --- arch/arm/include/asm/io.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index d66605dea55a..ffb089d46a17 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -109,6 +109,27 @@ static inline void __iomem *__typesafe_io(unsigned long addr) */ #include +/* + * This is the limit of PC card/PCI/ISA IO space, which is by default + * 64K if we have PC card, PCI or ISA support. Otherwise, default to + * zero to prevent ISA/PCI drivers claiming IO space (and potentially + * oopsing.) + * + * Only set this larger if you really need inb() et.al. to operate over + * a larger address space. Note that SOC_COMMON ioremaps each sockets + * IO space area, and so inb() et.al. must be defined to operate as per + * readb() et.al. on such platforms. + */ +#ifndef IO_SPACE_LIMIT +#if defined(CONFIG_PCMCIA_SOC_COMMON) || defined(CONFIG_PCMCIA_SOC_COMMON_MODULE) +#define IO_SPACE_LIMIT ((resource_size_t)0xffffffff) +#elif defined(CONFIG_PCI) || defined(CONFIG_ISA) || defined(CONFIG_PCCARD) +#define IO_SPACE_LIMIT ((resource_size_t)0xffff) +#else +#define IO_SPACE_LIMIT ((resource_size_t)0) +#endif +#endif + /* * IO port access primitives * ------------------------- -- cgit v1.2.3 From deb9a75e623083b51f71eeee9a2846b97bf57438 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 7 Jul 2011 09:02:06 +0100 Subject: ARM: io: remove IO_SPACE_LIMIT from platforms with ISA/PCI and 64K window Remove IO_SPACE_LIMIT definitions from platforms which have a well defined ISA or PCI, and has a 64K window. EBSA110 - well defined set of ISA devices. Footbridge, Integrator, IXP4xx, VT8500 - PCI platforms. Signed-off-by: Russell King --- arch/arm/mach-ebsa110/include/mach/io.h | 2 -- arch/arm/mach-footbridge/include/mach/io.h | 2 -- arch/arm/mach-integrator/include/mach/io.h | 2 -- arch/arm/mach-ixp4xx/include/mach/io.h | 2 -- arch/arm/mach-vt8500/include/mach/io.h | 2 -- 5 files changed, 10 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ebsa110/include/mach/io.h b/arch/arm/mach-ebsa110/include/mach/io.h index f68daa632af0..44679db672fb 100644 --- a/arch/arm/mach-ebsa110/include/mach/io.h +++ b/arch/arm/mach-ebsa110/include/mach/io.h @@ -13,8 +13,6 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#define IO_SPACE_LIMIT 0xffff - u8 __inb8(unsigned int port); void __outb8(u8 val, unsigned int port); diff --git a/arch/arm/mach-footbridge/include/mach/io.h b/arch/arm/mach-footbridge/include/mach/io.h index 32e4cc397c28..15a70396c27d 100644 --- a/arch/arm/mach-footbridge/include/mach/io.h +++ b/arch/arm/mach-footbridge/include/mach/io.h @@ -23,8 +23,6 @@ #define PCIO_SIZE 0x00100000 #define PCIO_BASE MMU_IO(0xff000000, 0x7c000000) -#define IO_SPACE_LIMIT 0xffff - /* * Translation of various region addresses to virtual addresses */ diff --git a/arch/arm/mach-integrator/include/mach/io.h b/arch/arm/mach-integrator/include/mach/io.h index f21bb5493dd9..37beed3fa3ed 100644 --- a/arch/arm/mach-integrator/include/mach/io.h +++ b/arch/arm/mach-integrator/include/mach/io.h @@ -20,8 +20,6 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#define IO_SPACE_LIMIT 0xffff - /* * WARNING: this has to mirror definitions in platform.h */ diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h index 57b5410c31f4..ffb9d6afb89f 100644 --- a/arch/arm/mach-ixp4xx/include/mach/io.h +++ b/arch/arm/mach-ixp4xx/include/mach/io.h @@ -17,8 +17,6 @@ #include -#define IO_SPACE_LIMIT 0x0000ffff - extern int (*ixp4xx_pci_read)(u32 addr, u32 cmd, u32* data); extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); diff --git a/arch/arm/mach-vt8500/include/mach/io.h b/arch/arm/mach-vt8500/include/mach/io.h index 9077239f78c9..46181eecf273 100644 --- a/arch/arm/mach-vt8500/include/mach/io.h +++ b/arch/arm/mach-vt8500/include/mach/io.h @@ -20,8 +20,6 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#define IO_SPACE_LIMIT 0xffff - #define __io(a) __typesafe_io((a) + 0xf0000000) #define __mem_pci(a) (a) -- cgit v1.2.3 From 4b34f7d62e558736ea4f1d15e9444522fc2ac6a8 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 6 Jul 2011 12:55:41 +0100 Subject: ARM: io: remove IO_SPACE_LIMIT from platforms without PCI/ISA Nothing should be using PCI/ISA IO on these platforms, so their IO_SPACE_LIMIT definitions are irrelevent. Signed-off-by: Russell King --- arch/arm/mach-vexpress/include/mach/io.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-vexpress/include/mach/io.h b/arch/arm/mach-vexpress/include/mach/io.h index 748bb524ee71..13522d86685e 100644 --- a/arch/arm/mach-vexpress/include/mach/io.h +++ b/arch/arm/mach-vexpress/include/mach/io.h @@ -20,8 +20,6 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#define IO_SPACE_LIMIT 0xffffffff - #define __io(a) __typesafe_io(a) #define __mem_pci(a) (a) -- cgit v1.2.3 From 70e5f5efcc933af55a3a18efdb3b2edd3eb510ec Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 6 Jul 2011 16:57:41 +0100 Subject: ARM: io: remove IO_SPACE_LIMIT from SA11x0 SA11x0 only uses IO_SPACE_LIMIT for SOC_COMMON, so we can use the default value in asm/io.h. Signed-off-by: Russell King --- arch/arm/mach-sa1100/include/mach/io.h | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-sa1100/include/mach/io.h b/arch/arm/mach-sa1100/include/mach/io.h index d8b43f3dcd2d..dfc27ff08344 100644 --- a/arch/arm/mach-sa1100/include/mach/io.h +++ b/arch/arm/mach-sa1100/include/mach/io.h @@ -10,11 +10,9 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#define IO_SPACE_LIMIT 0xffffffff - /* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... + * __io() is required to be an equivalent mapping to __mem_pci() for + * SOC_COMMON to work. */ #define __io(a) __typesafe_io(a) #define __mem_pci(a) (a) -- cgit v1.2.3 From 3abd7f68b28dcf6394c71c998376fc7bc92342c4 Mon Sep 17 00:00:00 2001 From: Tanmay Upadhyay Date: Wed, 20 Jul 2011 10:00:58 +0530 Subject: USB: pxa168: Add onchip USB host controller support - Add EHCI Host controller driver - Add wrapper that creates resources for host controller driver v2 - Call clk_put() after clk_disable() in probe function Signed-off-by: Tanmay Upadhyay Signed-off-by: Greg Kroah-Hartman --- arch/arm/mach-mmp/include/mach/pxa168.h | 7 + arch/arm/mach-mmp/pxa168.c | 46 ++++ drivers/usb/Kconfig | 1 + drivers/usb/host/Kconfig | 7 + drivers/usb/host/ehci-hcd.c | 5 + drivers/usb/host/ehci-pxa168.c | 363 ++++++++++++++++++++++++++++++++ 6 files changed, 429 insertions(+) create mode 100644 drivers/usb/host/ehci-pxa168.c (limited to 'arch/arm') diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h index 7f005843a707..7fb568d2845b 100644 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ b/arch/arm/mach-mmp/include/mach/pxa168.h @@ -35,6 +35,13 @@ extern struct pxa_device_desc pxa168_device_fb; extern struct pxa_device_desc pxa168_device_keypad; extern struct pxa_device_desc pxa168_device_eth; +struct pxa168_usb_pdata { + /* If NULL, default phy init routine for PXA168 would be called */ + int (*phy_init)(void __iomem *usb_phy_reg_base); +}; +/* pdata can be NULL */ +int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata); + static inline int pxa168_add_uart(int id) { struct pxa_device_desc *d = NULL; diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c index 0156f535dae7..b2b280c517dd 100644 --- a/arch/arm/mach-mmp/pxa168.c +++ b/arch/arm/mach-mmp/pxa168.c @@ -25,6 +25,9 @@ #include #include #include +#include +#include +#include #include "common.h" #include "clock.h" @@ -83,6 +86,7 @@ static APBC_CLK(keypad, PXA168_KPC, 0, 32000); static APMU_CLK(nand, NAND, 0x19b, 156000000); static APMU_CLK(lcd, LCD, 0x7f, 312000000); static APMU_CLK(eth, ETH, 0x09, 0); +static APMU_CLK(usb, USB, 0x12, 0); /* device and clock bindings */ static struct clk_lookup pxa168_clkregs[] = { @@ -104,6 +108,7 @@ static struct clk_lookup pxa168_clkregs[] = { INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL), INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL), INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"), + INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"), }; static int __init pxa168_init(void) @@ -169,3 +174,44 @@ PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61); PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8); PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c); PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff); + +struct resource pxa168_usb_host_resources[] = { + /* USB Host conroller register base */ + [0] = { + .start = 0xd4209000, + .end = 0xd4209000 + 0x200, + .flags = IORESOURCE_MEM, + .name = "pxa168-usb-host", + }, + /* USB PHY register base */ + [1] = { + .start = 0xd4206000, + .end = 0xd4206000 + 0xff, + .flags = IORESOURCE_MEM, + .name = "pxa168-usb-phy", + }, + [2] = { + .start = IRQ_PXA168_USB2, + .end = IRQ_PXA168_USB2, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32); +struct platform_device pxa168_device_usb_host = { + .name = "pxa168-ehci", + .id = -1, + .dev = { + .dma_mask = &pxa168_usb_host_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + + .num_resources = ARRAY_SIZE(pxa168_usb_host_resources), + .resource = pxa168_usb_host_resources, +}; + +int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata) +{ + pxa168_device_usb_host.dev.platform_data = pdata; + return platform_device_register(&pxa168_device_usb_host); +} diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 48f1781352f1..7e7f42baa938 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -69,6 +69,7 @@ config USB_ARCH_HAS_EHCI default y if ARCH_MSM default y if MICROBLAZE default y if SPARC_LEON + default y if ARCH_MMP default PCI # ARM SA1111 chips have a non-PCI based "OHCI-compatible" USB host interface. diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index ab085f12d570..5791fe97b4a6 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -578,3 +578,10 @@ config USB_OCTEON_OHCI config USB_OCTEON2_COMMON bool default y if USB_OCTEON_EHCI || USB_OCTEON_OHCI + +config USB_PXA168_EHCI + bool "Marvell PXA168 on-chip EHCI HCD support" + depends on USB_EHCI_HCD && ARCH_MMP + help + Enable support for Marvell PXA168 SoC's on-chip EHCI + host controller diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index f72ae0b6ee7f..750f60fe6a9f 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -1291,6 +1291,11 @@ MODULE_LICENSE ("GPL"); #define PLATFORM_DRIVER ehci_grlib_driver #endif +#ifdef CONFIG_USB_PXA168_EHCI +#include "ehci-pxa168.c" +#define PLATFORM_DRIVER ehci_pxa168_driver +#endif + #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \ !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \ !defined(XILINX_OF_PLATFORM_DRIVER) diff --git a/drivers/usb/host/ehci-pxa168.c b/drivers/usb/host/ehci-pxa168.c new file mode 100644 index 000000000000..ac0c16e8f539 --- /dev/null +++ b/drivers/usb/host/ehci-pxa168.c @@ -0,0 +1,363 @@ +/* + * drivers/usb/host/ehci-pxa168.c + * + * Tanmay Upadhyay + * + * Based on drivers/usb/host/ehci-orion.c + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include + +#define USB_PHY_CTRL_REG 0x4 +#define USB_PHY_PLL_REG 0x8 +#define USB_PHY_TX_REG 0xc + +#define FBDIV_SHIFT 4 + +#define ICP_SHIFT 12 +#define ICP_15 2 +#define ICP_20 3 +#define ICP_25 4 + +#define KVCO_SHIFT 15 + +#define PLLCALI12_SHIFT 25 +#define CALI12_VDD 0 +#define CALI12_09 1 +#define CALI12_10 2 +#define CALI12_11 3 + +#define PLLVDD12_SHIFT 27 +#define VDD12_VDD 0 +#define VDD12_10 1 +#define VDD12_11 2 +#define VDD12_12 3 + +#define PLLVDD18_SHIFT 29 +#define VDD18_19 0 +#define VDD18_20 1 +#define VDD18_21 2 +#define VDD18_22 3 + + +#define PLL_READY (1 << 23) +#define VCOCAL_START (1 << 21) +#define REG_RCAL_START (1 << 12) + +struct pxa168_usb_drv_data { + struct ehci_hcd ehci; + struct clk *pxa168_usb_clk; + struct resource *usb_phy_res; + void __iomem *usb_phy_reg_base; +}; + +static int ehci_pxa168_setup(struct usb_hcd *hcd) +{ + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + int retval; + + ehci_reset(ehci); + retval = ehci_halt(ehci); + if (retval) + return retval; + + /* + * data structure init + */ + retval = ehci_init(hcd); + if (retval) + return retval; + + hcd->has_tt = 1; + + ehci_port_power(ehci, 0); + + return retval; +} + +static const struct hc_driver ehci_pxa168_hc_driver = { + .description = hcd_name, + .product_desc = "Marvell PXA168 EHCI", + .hcd_priv_size = sizeof(struct pxa168_usb_drv_data), + + /* + * generic hardware linkage + */ + .irq = ehci_irq, + .flags = HCD_MEMORY | HCD_USB2, + + /* + * basic lifecycle operations + */ + .reset = ehci_pxa168_setup, + .start = ehci_run, + .stop = ehci_stop, + .shutdown = ehci_shutdown, + + /* + * managing i/o requests and associated device resources + */ + .urb_enqueue = ehci_urb_enqueue, + .urb_dequeue = ehci_urb_dequeue, + .endpoint_disable = ehci_endpoint_disable, + .endpoint_reset = ehci_endpoint_reset, + + /* + * scheduling support + */ + .get_frame_number = ehci_get_frame, + + /* + * root hub support + */ + .hub_status_data = ehci_hub_status_data, + .hub_control = ehci_hub_control, + .bus_suspend = ehci_bus_suspend, + .bus_resume = ehci_bus_resume, + .relinquish_port = ehci_relinquish_port, + .port_handed_over = ehci_port_handed_over, + + .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete, +}; + +static int pxa168_usb_phy_init(struct platform_device *pdev) +{ + struct resource *res; + void __iomem *usb_phy_reg_base; + struct pxa168_usb_pdata *pdata; + struct pxa168_usb_drv_data *drv_data; + struct usb_hcd *hcd = platform_get_drvdata(pdev); + unsigned long reg_val; + int pll_retry_cont = 10000, err = 0; + + drv_data = (struct pxa168_usb_drv_data *)hcd->hcd_priv; + pdata = (struct pxa168_usb_pdata *)pdev->dev.platform_data; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!res) { + dev_err(&pdev->dev, + "Found HC with no PHY register addr. Check %s setup!\n", + dev_name(&pdev->dev)); + return -ENODEV; + } + + if (!request_mem_region(res->start, resource_size(res), + ehci_pxa168_hc_driver.description)) { + dev_dbg(&pdev->dev, "controller already in use\n"); + return -EBUSY; + } + + usb_phy_reg_base = ioremap(res->start, resource_size(res)); + if (usb_phy_reg_base == NULL) { + dev_dbg(&pdev->dev, "error mapping memory\n"); + err = -EFAULT; + goto err1; + } + drv_data->usb_phy_reg_base = usb_phy_reg_base; + drv_data->usb_phy_res = res; + + /* If someone wants to init USB phy in board specific way */ + if (pdata && pdata->phy_init) + return pdata->phy_init(usb_phy_reg_base); + + /* Power up the PHY and PLL */ + writel(readl(usb_phy_reg_base + USB_PHY_CTRL_REG) | 0x3, + usb_phy_reg_base + USB_PHY_CTRL_REG); + + /* Configure PHY PLL */ + reg_val = readl(usb_phy_reg_base + USB_PHY_PLL_REG) & ~(0x7e03ffff); + reg_val |= (VDD18_22 << PLLVDD18_SHIFT | VDD12_12 << PLLVDD12_SHIFT | + CALI12_11 << PLLCALI12_SHIFT | 3 << KVCO_SHIFT | + ICP_15 << ICP_SHIFT | 0xee << FBDIV_SHIFT | 0xb); + writel(reg_val, usb_phy_reg_base + USB_PHY_PLL_REG); + + /* Make sure PHY PLL is ready */ + while (!(readl(usb_phy_reg_base + USB_PHY_PLL_REG) & PLL_READY)) { + if (!(pll_retry_cont--)) { + dev_dbg(&pdev->dev, "USB PHY PLL not ready\n"); + err = -EIO; + goto err2; + } + } + + /* Toggle VCOCAL_START bit of U2PLL for PLL calibration */ + udelay(200); + writel(readl(usb_phy_reg_base + USB_PHY_PLL_REG) | VCOCAL_START, + usb_phy_reg_base + USB_PHY_PLL_REG); + udelay(40); + writel(readl(usb_phy_reg_base + USB_PHY_PLL_REG) & ~VCOCAL_START, + usb_phy_reg_base + USB_PHY_PLL_REG); + + /* Toggle REG_RCAL_START bit of U2PTX for impedance calibration */ + udelay(400); + writel(readl(usb_phy_reg_base + USB_PHY_TX_REG) | REG_RCAL_START, + usb_phy_reg_base + USB_PHY_TX_REG); + udelay(40); + writel(readl(usb_phy_reg_base + USB_PHY_TX_REG) & ~REG_RCAL_START, + usb_phy_reg_base + USB_PHY_TX_REG); + + /* Make sure PHY PLL is ready again */ + pll_retry_cont = 0; + while (!(readl(usb_phy_reg_base + USB_PHY_PLL_REG) & PLL_READY)) { + if (!(pll_retry_cont--)) { + dev_dbg(&pdev->dev, "USB PHY PLL not ready\n"); + err = -EIO; + goto err2; + } + } + + return 0; +err2: + iounmap(usb_phy_reg_base); +err1: + release_mem_region(res->start, resource_size(res)); + return err; +} + +static int __devinit ehci_pxa168_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + struct usb_hcd *hcd; + struct ehci_hcd *ehci; + struct pxa168_usb_drv_data *drv_data; + void __iomem *regs; + int irq, err = 0; + + if (usb_disabled()) + return -ENODEV; + + pr_debug("Initializing pxa168-SoC USB Host Controller\n"); + + irq = platform_get_irq(pdev, 0); + if (irq <= 0) { + dev_err(&pdev->dev, + "Found HC with no IRQ. Check %s setup!\n", + dev_name(&pdev->dev)); + err = -ENODEV; + goto err1; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, + "Found HC with no register addr. Check %s setup!\n", + dev_name(&pdev->dev)); + err = -ENODEV; + goto err1; + } + + if (!request_mem_region(res->start, resource_size(res), + ehci_pxa168_hc_driver.description)) { + dev_dbg(&pdev->dev, "controller already in use\n"); + err = -EBUSY; + goto err1; + } + + regs = ioremap(res->start, resource_size(res)); + if (regs == NULL) { + dev_dbg(&pdev->dev, "error mapping memory\n"); + err = -EFAULT; + goto err2; + } + + hcd = usb_create_hcd(&ehci_pxa168_hc_driver, + &pdev->dev, dev_name(&pdev->dev)); + if (!hcd) { + err = -ENOMEM; + goto err3; + } + + drv_data = (struct pxa168_usb_drv_data *)hcd->hcd_priv; + + /* Enable USB clock */ + drv_data->pxa168_usb_clk = clk_get(&pdev->dev, "PXA168-USBCLK"); + if (IS_ERR(drv_data->pxa168_usb_clk)) { + dev_err(&pdev->dev, "Couldn't get USB clock\n"); + err = PTR_ERR(drv_data->pxa168_usb_clk); + goto err4; + } + clk_enable(drv_data->pxa168_usb_clk); + + err = pxa168_usb_phy_init(pdev); + if (err) { + dev_err(&pdev->dev, "USB PHY initialization failed\n"); + goto err5; + } + + hcd->rsrc_start = res->start; + hcd->rsrc_len = resource_size(res); + hcd->regs = regs; + + ehci = hcd_to_ehci(hcd); + ehci->caps = hcd->regs + 0x100; + ehci->regs = hcd->regs + 0x100 + + HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); + ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); + hcd->has_tt = 1; + ehci->sbrn = 0x20; + + err = usb_add_hcd(hcd, irq, IRQF_SHARED | IRQF_DISABLED); + if (err) + goto err5; + + return 0; + +err5: + clk_disable(drv_data->pxa168_usb_clk); + clk_put(drv_data->pxa168_usb_clk); +err4: + usb_put_hcd(hcd); +err3: + iounmap(regs); +err2: + release_mem_region(res->start, resource_size(res)); +err1: + dev_err(&pdev->dev, "init %s fail, %d\n", + dev_name(&pdev->dev), err); + + return err; +} + +static int __exit ehci_pxa168_drv_remove(struct platform_device *pdev) +{ + struct usb_hcd *hcd = platform_get_drvdata(pdev); + struct pxa168_usb_drv_data *drv_data = + (struct pxa168_usb_drv_data *)hcd->hcd_priv; + + usb_remove_hcd(hcd); + + /* Power down PHY & PLL */ + writel(readl(drv_data->usb_phy_reg_base + USB_PHY_CTRL_REG) & (~0x3), + drv_data->usb_phy_reg_base + USB_PHY_CTRL_REG); + + clk_disable(drv_data->pxa168_usb_clk); + clk_put(drv_data->pxa168_usb_clk); + + iounmap(hcd->regs); + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); + + iounmap(drv_data->usb_phy_reg_base); + release_mem_region(drv_data->usb_phy_res->start, + resource_size(drv_data->usb_phy_res)); + + usb_put_hcd(hcd); + + return 0; +} + +MODULE_ALIAS("platform:pxa168-ehci"); + +static struct platform_driver ehci_pxa168_driver = { + .probe = ehci_pxa168_drv_probe, + .remove = __exit_p(ehci_pxa168_drv_remove), + .shutdown = usb_hcd_platform_shutdown, + .driver.name = "pxa168-ehci", +}; -- cgit v1.2.3 From 01f461a3a4321a9f98b6b508f32d2396c5704b7c Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Tue, 23 Aug 2011 13:59:14 +0100 Subject: ARM: 7058/1: LPAE: Cast the dma_addr_t argument to unsigned long in dma_to_virt This is to avoid a compiler warning when invoking the __bus_to_virt() macro. The dma_to_virt() function gets addresses within the 32-bit range. Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/include/asm/dma-mapping.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index 7a21d0bf7134..28b7ee8d7398 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h @@ -32,7 +32,7 @@ static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr) static inline void *dma_to_virt(struct device *dev, dma_addr_t addr) { - return (void *)__bus_to_virt(addr); + return (void *)__bus_to_virt((unsigned long)addr); } static inline dma_addr_t virt_to_dma(struct device *dev, void *addr) -- cgit v1.2.3 From e73fc88e19d74fd4dd664cff45b88caab8cde45c Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Tue, 23 Aug 2011 14:07:23 +0100 Subject: ARM: 7059/1: LPAE: Use PMD_(SHIFT|SIZE|MASK) instead of PGDIR_* PGDIR_SHIFT and PMD_SHIFT for the classic 2-level page table format have the same value (21). This patch converts the PGDIR_* uses in the kernel to the PMD_* equivalent so that LPAE builds can reuse the same code. Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/kernel/head.S | 74 +++++++++++++++++++++++++---------------------- arch/arm/kernel/module.c | 2 +- arch/arm/mm/dma-mapping.c | 6 ++-- arch/arm/mm/mmu.c | 14 +++++---- 4 files changed, 51 insertions(+), 45 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 742b6108a001..4598c9699d30 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -21,6 +21,7 @@ #include #include #include +#include #ifdef CONFIG_DEBUG_LL #include @@ -38,11 +39,14 @@ #error KERNEL_RAM_VADDR must start at 0xXXXX8000 #endif +#define PG_DIR_SIZE 0x4000 +#define PMD_ORDER 2 + .globl swapper_pg_dir - .equ swapper_pg_dir, KERNEL_RAM_VADDR - 0x4000 + .equ swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE .macro pgtbl, rd, phys - add \rd, \phys, #TEXT_OFFSET - 0x4000 + add \rd, \phys, #TEXT_OFFSET - PG_DIR_SIZE .endm #ifdef CONFIG_XIP_KERNEL @@ -148,11 +152,11 @@ __create_page_tables: pgtbl r4, r8 @ page table address /* - * Clear the 16K level 1 swapper page table + * Clear the swapper page table */ mov r0, r4 mov r3, #0 - add r6, r0, #0x4000 + add r6, r0, #PG_DIR_SIZE 1: str r3, [r0], #4 str r3, [r0], #4 str r3, [r0], #4 @@ -171,30 +175,30 @@ __create_page_tables: sub r0, r0, r3 @ virt->phys offset add r5, r5, r0 @ phys __enable_mmu add r6, r6, r0 @ phys __enable_mmu_end - mov r5, r5, lsr #20 - mov r6, r6, lsr #20 + mov r5, r5, lsr #SECTION_SHIFT + mov r6, r6, lsr #SECTION_SHIFT -1: orr r3, r7, r5, lsl #20 @ flags + kernel base - str r3, [r4, r5, lsl #2] @ identity mapping - teq r5, r6 - addne r5, r5, #1 @ next section - bne 1b +1: orr r3, r7, r5, lsl #SECTION_SHIFT @ flags + kernel base + str r3, [r4, r5, lsl #PMD_ORDER] @ identity mapping + cmp r5, r6 + addlo r5, r5, #1 @ next section + blo 1b /* * Now setup the pagetables for our kernel direct * mapped region. */ mov r3, pc - mov r3, r3, lsr #20 - orr r3, r7, r3, lsl #20 - add r0, r4, #(KERNEL_START & 0xff000000) >> 18 - str r3, [r0, #(KERNEL_START & 0x00f00000) >> 18]! + mov r3, r3, lsr #SECTION_SHIFT + orr r3, r7, r3, lsl #SECTION_SHIFT + add r0, r4, #(KERNEL_START & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER) + str r3, [r0, #((KERNEL_START & 0x00f00000) >> SECTION_SHIFT) << PMD_ORDER]! ldr r6, =(KERNEL_END - 1) - add r0, r0, #4 - add r6, r4, r6, lsr #18 + add r0, r0, #1 << PMD_ORDER + add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER) 1: cmp r0, r6 - add r3, r3, #1 << 20 - strls r3, [r0], #4 + add r3, r3, #1 << SECTION_SHIFT + strls r3, [r0], #1 << PMD_ORDER bls 1b #ifdef CONFIG_XIP_KERNEL @@ -203,11 +207,11 @@ __create_page_tables: */ add r3, r8, #TEXT_OFFSET orr r3, r3, r7 - add r0, r4, #(KERNEL_RAM_VADDR & 0xff000000) >> 18 - str r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> 18]! + add r0, r4, #(KERNEL_RAM_VADDR & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER) + str r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> (SECTION_SHIFT - PMD_ORDER)]! ldr r6, =(_end - 1) add r0, r0, #4 - add r6, r4, r6, lsr #18 + add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER) 1: cmp r0, r6 add r3, r3, #1 << 20 strls r3, [r0], #4 @@ -218,12 +222,12 @@ __create_page_tables: * Then map boot params address in r2 or * the first 1MB of ram if boot params address is not specified. */ - mov r0, r2, lsr #20 - movs r0, r0, lsl #20 + mov r0, r2, lsr #SECTION_SHIFT + movs r0, r0, lsl #SECTION_SHIFT moveq r0, r8 sub r3, r0, r8 add r3, r3, #PAGE_OFFSET - add r3, r4, r3, lsr #18 + add r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER) orr r6, r7, r0 str r6, [r3] @@ -236,21 +240,21 @@ __create_page_tables: */ addruart r7, r3 - mov r3, r3, lsr #20 - mov r3, r3, lsl #2 + mov r3, r3, lsr #SECTION_SHIFT + mov r3, r3, lsl #PMD_ORDER add r0, r4, r3 rsb r3, r3, #0x4000 @ PTRS_PER_PGD*sizeof(long) cmp r3, #0x0800 @ limit to 512MB movhi r3, #0x0800 add r6, r0, r3 - mov r3, r7, lsr #20 + mov r3, r7, lsr #SECTION_SHIFT ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags - orr r3, r7, r3, lsl #20 + orr r3, r7, r3, lsl #SECTION_SHIFT 1: str r3, [r0], #4 - add r3, r3, #1 << 20 - teq r0, r6 - bne 1b + add r3, r3, #1 << SECTION_SHIFT + cmp r0, r6 + blo 1b #else /* CONFIG_DEBUG_ICEDCC */ /* we don't need any serial debugging mappings for ICEDCC */ @@ -262,7 +266,7 @@ __create_page_tables: * If we're using the NetWinder or CATS, we also need to map * in the 16550-type serial port for the debug messages */ - add r0, r4, #0xff000000 >> 18 + add r0, r4, #0xff000000 >> (SECTION_SHIFT - PMD_ORDER) orr r3, r7, #0x7c000000 str r3, [r0] #endif @@ -272,10 +276,10 @@ __create_page_tables: * Similar reasons here - for debug. This is * only for Acorn RiscPC architectures. */ - add r0, r4, #0x02000000 >> 18 + add r0, r4, #0x02000000 >> (SECTION_SHIFT - PMD_ORDER) orr r3, r7, #0x02000000 str r3, [r0] - add r0, r4, #0xd8000000 >> 18 + add r0, r4, #0xd8000000 >> (SECTION_SHIFT - PMD_ORDER) str r3, [r0] #endif #endif diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c index cc2020c2c709..1e9be5d25e56 100644 --- a/arch/arm/kernel/module.c +++ b/arch/arm/kernel/module.c @@ -33,7 +33,7 @@ * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off. */ #undef MODULES_VADDR -#define MODULES_VADDR (((unsigned long)_etext + ~PGDIR_MASK) & PGDIR_MASK) +#define MODULES_VADDR (((unsigned long)_etext + ~PMD_MASK) & PMD_MASK) #endif #ifdef CONFIG_MMU diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index 0a0a1e7c20d2..4f01bfd6899a 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -123,8 +123,8 @@ static void __dma_free_buffer(struct page *page, size_t size) #endif #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT) -#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT) -#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT) +#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PMD_SHIFT) +#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PMD_SHIFT) /* * These are the page tables (2MB each) covering uncached, DMA consistent allocations @@ -183,7 +183,7 @@ static int __init consistent_init(void) } consistent_pte[i++] = pte; - base += (1 << PGDIR_SHIFT); + base += PMD_SIZE; } while (base < CONSISTENT_END); return ret; diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 594d677b92c8..36e983d98315 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -863,14 +863,14 @@ static inline void prepare_page_table(void) /* * Clear out all the mappings below the kernel image. */ - for (addr = 0; addr < MODULES_VADDR; addr += PGDIR_SIZE) + for (addr = 0; addr < MODULES_VADDR; addr += PMD_SIZE) pmd_clear(pmd_off_k(addr)); #ifdef CONFIG_XIP_KERNEL /* The XIP kernel is mapped in the module area -- skip over it */ - addr = ((unsigned long)_etext + PGDIR_SIZE - 1) & PGDIR_MASK; + addr = ((unsigned long)_etext + PMD_SIZE - 1) & PMD_MASK; #endif - for ( ; addr < PAGE_OFFSET; addr += PGDIR_SIZE) + for ( ; addr < PAGE_OFFSET; addr += PMD_SIZE) pmd_clear(pmd_off_k(addr)); /* @@ -885,10 +885,12 @@ static inline void prepare_page_table(void) * memory bank, up to the end of the vmalloc region. */ for (addr = __phys_to_virt(end); - addr < VMALLOC_END; addr += PGDIR_SIZE) + addr < VMALLOC_END; addr += PMD_SIZE) pmd_clear(pmd_off_k(addr)); } +#define SWAPPER_PG_DIR_SIZE (PTRS_PER_PGD * sizeof(pgd_t)) + /* * Reserve the special regions of memory */ @@ -898,7 +900,7 @@ void __init arm_mm_memblock_reserve(void) * Reserve the page tables. These are already in use, * and can only be in node 0. */ - memblock_reserve(__pa(swapper_pg_dir), PTRS_PER_PGD * sizeof(pgd_t)); + memblock_reserve(__pa(swapper_pg_dir), SWAPPER_PG_DIR_SIZE); #ifdef CONFIG_SA1111 /* @@ -926,7 +928,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc) */ vectors_page = early_alloc(PAGE_SIZE); - for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE) + for (addr = VMALLOC_END; addr; addr += PMD_SIZE) pmd_clear(pmd_off_k(addr)); /* -- cgit v1.2.3 From 2a8d7bddf273477d6aa81405c9b4bae223e11ed9 Mon Sep 17 00:00:00 2001 From: Thomas Abraham Date: Wed, 10 Aug 2011 15:51:20 +0530 Subject: ARM: SAMSUNG: Remove uart irq handling from plaform code With uart tx/rx/err interrupt handling moved into the driver for s3c64xx and later SoC's, the uart interrupt handling in plaform code can be removed. The uart device irq resources is reduced to one and the related unused macros are removed. Suggested-by: Grant Likely CC: Ben Dooks Signed-off-by: Thomas Abraham Signed-off-by: Greg Kroah-Hartman --- arch/arm/Kconfig | 1 - arch/arm/mach-s3c64xx/dev-uart.c | 60 ++------------- arch/arm/mach-s3c64xx/include/mach/irqs.h | 30 -------- arch/arm/mach-s3c64xx/irq.c | 25 ------ arch/arm/plat-s5p/Kconfig | 1 - arch/arm/plat-s5p/dev-uart.c | 84 +++------------------ arch/arm/plat-s5p/include/plat/irqs.h | 35 --------- arch/arm/plat-s5p/irq.c | 34 --------- arch/arm/plat-samsung/Kconfig | 5 -- arch/arm/plat-samsung/Makefile | 1 - arch/arm/plat-samsung/include/plat/regs-serial.h | 5 ++ arch/arm/plat-samsung/irq-uart.c | 96 ------------------------ 12 files changed, 25 insertions(+), 352 deletions(-) delete mode 100644 arch/arm/plat-samsung/irq-uart.c (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5ebc5d922ea1..325d2f55744d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -722,7 +722,6 @@ config ARCH_S3C64XX select ARCH_REQUIRE_GPIOLIB select SAMSUNG_CLKSRC select SAMSUNG_IRQ_VIC_TIMER - select SAMSUNG_IRQ_UART select S3C_GPIO_TRACK select S3C_GPIO_PULL_UPDOWN select S3C_GPIO_CFG_S3C24XX diff --git a/arch/arm/mach-s3c64xx/dev-uart.c b/arch/arm/mach-s3c64xx/dev-uart.c index f797f748b999..c681b99eda08 100644 --- a/arch/arm/mach-s3c64xx/dev-uart.c +++ b/arch/arm/mach-s3c64xx/dev-uart.c @@ -37,21 +37,10 @@ static struct resource s3c64xx_uart0_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_S3CUART_RX0, - .end = IRQ_S3CUART_RX0, + .start = IRQ_UART0, + .end = IRQ_UART0, .flags = IORESOURCE_IRQ, }, - [2] = { - .start = IRQ_S3CUART_TX0, - .end = IRQ_S3CUART_TX0, - .flags = IORESOURCE_IRQ, - - }, - [3] = { - .start = IRQ_S3CUART_ERR0, - .end = IRQ_S3CUART_ERR0, - .flags = IORESOURCE_IRQ, - } }; static struct resource s3c64xx_uart1_resource[] = { @@ -61,19 +50,8 @@ static struct resource s3c64xx_uart1_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_S3CUART_RX1, - .end = IRQ_S3CUART_RX1, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = IRQ_S3CUART_TX1, - .end = IRQ_S3CUART_TX1, - .flags = IORESOURCE_IRQ, - - }, - [3] = { - .start = IRQ_S3CUART_ERR1, - .end = IRQ_S3CUART_ERR1, + .start = IRQ_UART1, + .end = IRQ_UART1, .flags = IORESOURCE_IRQ, }, }; @@ -85,19 +63,8 @@ static struct resource s3c6xx_uart2_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_S3CUART_RX2, - .end = IRQ_S3CUART_RX2, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = IRQ_S3CUART_TX2, - .end = IRQ_S3CUART_TX2, - .flags = IORESOURCE_IRQ, - - }, - [3] = { - .start = IRQ_S3CUART_ERR2, - .end = IRQ_S3CUART_ERR2, + .start = IRQ_UART2, + .end = IRQ_UART2, .flags = IORESOURCE_IRQ, }, }; @@ -109,19 +76,8 @@ static struct resource s3c64xx_uart3_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_S3CUART_RX3, - .end = IRQ_S3CUART_RX3, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = IRQ_S3CUART_TX3, - .end = IRQ_S3CUART_TX3, - .flags = IORESOURCE_IRQ, - - }, - [3] = { - .start = IRQ_S3CUART_ERR3, - .end = IRQ_S3CUART_ERR3, + .start = IRQ_UART3, + .end = IRQ_UART3, .flags = IORESOURCE_IRQ, }, }; diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h index c026f67a80de..443f85b3c203 100644 --- a/arch/arm/mach-s3c64xx/include/mach/irqs.h +++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h @@ -27,36 +27,6 @@ #define IRQ_VIC0_BASE S3C_IRQ(0) #define IRQ_VIC1_BASE S3C_IRQ(32) -/* UART interrupts, each UART has 4 intterupts per channel so - * use the space between the ISA and S3C main interrupts. Note, these - * are not in the same order as the S3C24XX series! */ - -#define IRQ_S3CUART_BASE0 (16) -#define IRQ_S3CUART_BASE1 (20) -#define IRQ_S3CUART_BASE2 (24) -#define IRQ_S3CUART_BASE3 (28) - -#define UART_IRQ_RXD (0) -#define UART_IRQ_ERR (1) -#define UART_IRQ_TXD (2) -#define UART_IRQ_MODEM (3) - -#define IRQ_S3CUART_RX0 (IRQ_S3CUART_BASE0 + UART_IRQ_RXD) -#define IRQ_S3CUART_TX0 (IRQ_S3CUART_BASE0 + UART_IRQ_TXD) -#define IRQ_S3CUART_ERR0 (IRQ_S3CUART_BASE0 + UART_IRQ_ERR) - -#define IRQ_S3CUART_RX1 (IRQ_S3CUART_BASE1 + UART_IRQ_RXD) -#define IRQ_S3CUART_TX1 (IRQ_S3CUART_BASE1 + UART_IRQ_TXD) -#define IRQ_S3CUART_ERR1 (IRQ_S3CUART_BASE1 + UART_IRQ_ERR) - -#define IRQ_S3CUART_RX2 (IRQ_S3CUART_BASE2 + UART_IRQ_RXD) -#define IRQ_S3CUART_TX2 (IRQ_S3CUART_BASE2 + UART_IRQ_TXD) -#define IRQ_S3CUART_ERR2 (IRQ_S3CUART_BASE2 + UART_IRQ_ERR) - -#define IRQ_S3CUART_RX3 (IRQ_S3CUART_BASE3 + UART_IRQ_RXD) -#define IRQ_S3CUART_TX3 (IRQ_S3CUART_BASE3 + UART_IRQ_TXD) -#define IRQ_S3CUART_ERR3 (IRQ_S3CUART_BASE3 + UART_IRQ_ERR) - /* VIC based IRQs */ #define S3C64XX_IRQ_VIC0(x) (IRQ_VIC0_BASE + (x)) diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c index 75d9a0e49193..b07357e94958 100644 --- a/arch/arm/mach-s3c64xx/irq.c +++ b/arch/arm/mach-s3c64xx/irq.c @@ -25,29 +25,6 @@ #include #include -static struct s3c_uart_irq uart_irqs[] = { - [0] = { - .regs = S3C_VA_UART0, - .base_irq = IRQ_S3CUART_BASE0, - .parent_irq = IRQ_UART0, - }, - [1] = { - .regs = S3C_VA_UART1, - .base_irq = IRQ_S3CUART_BASE1, - .parent_irq = IRQ_UART1, - }, - [2] = { - .regs = S3C_VA_UART2, - .base_irq = IRQ_S3CUART_BASE2, - .parent_irq = IRQ_UART2, - }, - [3] = { - .regs = S3C_VA_UART3, - .base_irq = IRQ_S3CUART_BASE3, - .parent_irq = IRQ_UART3, - }, -}; - /* setup the sources the vic should advertise resume for, even though it * is not doing the wake (set_irq_wake needs to be valid) */ #define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE)) @@ -67,6 +44,4 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) /* add the timer sub-irqs */ s3c_init_vic_timer_irq(5, IRQ_TIMER0); - - s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs)); } diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig index 9843c954c042..9a197e55f669 100644 --- a/arch/arm/plat-s5p/Kconfig +++ b/arch/arm/plat-s5p/Kconfig @@ -22,7 +22,6 @@ config PLAT_S5P select PLAT_SAMSUNG select SAMSUNG_CLKSRC select SAMSUNG_IRQ_VIC_TIMER - select SAMSUNG_IRQ_UART help Base platform code for Samsung's S5P series SoC. diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c index afaf87fdb93e..c9308db36183 100644 --- a/arch/arm/plat-s5p/dev-uart.c +++ b/arch/arm/plat-s5p/dev-uart.c @@ -32,20 +32,10 @@ static struct resource s5p_uart0_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_S5P_UART_RX0, - .end = IRQ_S5P_UART_RX0, + .start = IRQ_UART0, + .end = IRQ_UART0, .flags = IORESOURCE_IRQ, }, - [2] = { - .start = IRQ_S5P_UART_TX0, - .end = IRQ_S5P_UART_TX0, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = IRQ_S5P_UART_ERR0, - .end = IRQ_S5P_UART_ERR0, - .flags = IORESOURCE_IRQ, - } }; static struct resource s5p_uart1_resource[] = { @@ -55,18 +45,8 @@ static struct resource s5p_uart1_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_S5P_UART_RX1, - .end = IRQ_S5P_UART_RX1, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = IRQ_S5P_UART_TX1, - .end = IRQ_S5P_UART_TX1, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = IRQ_S5P_UART_ERR1, - .end = IRQ_S5P_UART_ERR1, + .start = IRQ_UART1, + .end = IRQ_UART1, .flags = IORESOURCE_IRQ, }, }; @@ -78,18 +58,8 @@ static struct resource s5p_uart2_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_S5P_UART_RX2, - .end = IRQ_S5P_UART_RX2, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = IRQ_S5P_UART_TX2, - .end = IRQ_S5P_UART_TX2, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = IRQ_S5P_UART_ERR2, - .end = IRQ_S5P_UART_ERR2, + .start = IRQ_UART2, + .end = IRQ_UART2, .flags = IORESOURCE_IRQ, }, }; @@ -102,18 +72,8 @@ static struct resource s5p_uart3_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_S5P_UART_RX3, - .end = IRQ_S5P_UART_RX3, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = IRQ_S5P_UART_TX3, - .end = IRQ_S5P_UART_TX3, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = IRQ_S5P_UART_ERR3, - .end = IRQ_S5P_UART_ERR3, + .start = IRQ_UART3, + .end = IRQ_UART3, .flags = IORESOURCE_IRQ, }, #endif @@ -127,18 +87,8 @@ static struct resource s5p_uart4_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_S5P_UART_RX4, - .end = IRQ_S5P_UART_RX4, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = IRQ_S5P_UART_TX4, - .end = IRQ_S5P_UART_TX4, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = IRQ_S5P_UART_ERR4, - .end = IRQ_S5P_UART_ERR4, + .start = IRQ_UART4, + .end = IRQ_UART4, .flags = IORESOURCE_IRQ, }, #endif @@ -152,18 +102,8 @@ static struct resource s5p_uart5_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_S5P_UART_RX5, - .end = IRQ_S5P_UART_RX5, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = IRQ_S5P_UART_TX5, - .end = IRQ_S5P_UART_TX5, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = IRQ_S5P_UART_ERR5, - .end = IRQ_S5P_UART_ERR5, + .start = IRQ_UART5, + .end = IRQ_UART5, .flags = IORESOURCE_IRQ, }, #endif diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h index ba9121c60a2a..144dbfc6506d 100644 --- a/arch/arm/plat-s5p/include/plat/irqs.h +++ b/arch/arm/plat-s5p/include/plat/irqs.h @@ -37,41 +37,6 @@ #define IRQ_VIC1_BASE S5P_VIC1_BASE #define IRQ_VIC2_BASE S5P_VIC2_BASE -/* UART interrupts, each UART has 4 intterupts per channel so - * use the space between the ISA and S3C main interrupts. Note, these - * are not in the same order as the S3C24XX series! */ - -#define IRQ_S5P_UART_BASE0 (16) -#define IRQ_S5P_UART_BASE1 (20) -#define IRQ_S5P_UART_BASE2 (24) -#define IRQ_S5P_UART_BASE3 (28) - -#define UART_IRQ_RXD (0) -#define UART_IRQ_ERR (1) -#define UART_IRQ_TXD (2) - -#define IRQ_S5P_UART_RX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_RXD) -#define IRQ_S5P_UART_TX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_TXD) -#define IRQ_S5P_UART_ERR0 (IRQ_S5P_UART_BASE0 + UART_IRQ_ERR) - -#define IRQ_S5P_UART_RX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_RXD) -#define IRQ_S5P_UART_TX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_TXD) -#define IRQ_S5P_UART_ERR1 (IRQ_S5P_UART_BASE1 + UART_IRQ_ERR) - -#define IRQ_S5P_UART_RX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_RXD) -#define IRQ_S5P_UART_TX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_TXD) -#define IRQ_S5P_UART_ERR2 (IRQ_S5P_UART_BASE2 + UART_IRQ_ERR) - -#define IRQ_S5P_UART_RX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_RXD) -#define IRQ_S5P_UART_TX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_TXD) -#define IRQ_S5P_UART_ERR3 (IRQ_S5P_UART_BASE3 + UART_IRQ_ERR) - -/* S3C compatibilty defines */ -#define IRQ_S3CUART_RX0 IRQ_S5P_UART_RX0 -#define IRQ_S3CUART_RX1 IRQ_S5P_UART_RX1 -#define IRQ_S3CUART_RX2 IRQ_S5P_UART_RX2 -#define IRQ_S3CUART_RX3 IRQ_S5P_UART_RX3 - /* VIC based IRQs */ #define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x)) diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c index a97c08957f49..afdaa1082b9f 100644 --- a/arch/arm/plat-s5p/irq.c +++ b/arch/arm/plat-s5p/irq.c @@ -17,42 +17,10 @@ #include -#include #include #include -#include #include #include -#include - -/* - * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3] - * are consecutive when looking up the interrupt in the demux routines. - */ -static struct s3c_uart_irq uart_irqs[] = { - [0] = { - .regs = S5P_VA_UART0, - .base_irq = IRQ_S5P_UART_BASE0, - .parent_irq = IRQ_UART0, - }, - [1] = { - .regs = S5P_VA_UART1, - .base_irq = IRQ_S5P_UART_BASE1, - .parent_irq = IRQ_UART1, - }, - [2] = { - .regs = S5P_VA_UART2, - .base_irq = IRQ_S5P_UART_BASE2, - .parent_irq = IRQ_UART2, - }, -#if CONFIG_SERIAL_SAMSUNG_UARTS > 3 - [3] = { - .regs = S5P_VA_UART3, - .base_irq = IRQ_S5P_UART_BASE3, - .parent_irq = IRQ_UART3, - }, -#endif -}; void __init s5p_init_irq(u32 *vic, u32 num_vic) { @@ -65,6 +33,4 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic) #endif s3c_init_vic_timer_irq(5, IRQ_TIMER0); - - s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs)); } diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index b3e10659e4b8..dffa37bc4a0b 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -65,11 +65,6 @@ config SAMSUNG_IRQ_VIC_TIMER help Internal configuration to build the VIC timer interrupt code. -config SAMSUNG_IRQ_UART - bool - help - Internal configuration to build the IRQ UART demux code. - # options for gpio configuration support config SAMSUNG_GPIOLIB_4BIT diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 853764ba8cc5..1105922342fe 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile @@ -21,7 +21,6 @@ obj-y += dev-asocdma.o obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o -obj-$(CONFIG_SAMSUNG_IRQ_UART) += irq-uart.o obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o # ADC diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h index bac36fa3becb..720734847027 100644 --- a/arch/arm/plat-samsung/include/plat/regs-serial.h +++ b/arch/arm/plat-samsung/include/plat/regs-serial.h @@ -186,6 +186,11 @@ #define S3C64XX_UINTSP 0x34 #define S3C64XX_UINTM 0x38 +#define S3C64XX_UINTM_RXD (0) +#define S3C64XX_UINTM_TXD (2) +#define S3C64XX_UINTM_RXD_MSK (1 << S3C64XX_UINTM_RXD) +#define S3C64XX_UINTM_TXD_MSK (1 << S3C64XX_UINTM_TXD) + /* Following are specific to S5PV210 */ #define S5PV210_UCON_CLKMASK (1<<10) #define S5PV210_UCON_PCLK (0<<10) diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c deleted file mode 100644 index 3014c7226bd1..000000000000 --- a/arch/arm/plat-samsung/irq-uart.c +++ /dev/null @@ -1,96 +0,0 @@ -/* arch/arm/plat-samsung/irq-uart.c - * originally part of arch/arm/plat-s3c64xx/irq.c - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * Samsung- UART Interrupt handling - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include - -/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3] - * are consecutive when looking up the interrupt in the demux routines. - */ -static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc) -{ - struct s3c_uart_irq *uirq = desc->irq_data.handler_data; - struct irq_chip *chip = irq_get_chip(irq); - u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP); - int base = uirq->base_irq; - - chained_irq_enter(chip, desc); - - if (pend & (1 << 0)) - generic_handle_irq(base); - if (pend & (1 << 1)) - generic_handle_irq(base + 1); - if (pend & (1 << 2)) - generic_handle_irq(base + 2); - if (pend & (1 << 3)) - generic_handle_irq(base + 3); - - chained_irq_exit(chip, desc); -} - -static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq) -{ - void __iomem *reg_base = uirq->regs; - struct irq_chip_generic *gc; - struct irq_chip_type *ct; - - /* mask all interrupts at the start. */ - __raw_writel(0xf, reg_base + S3C64XX_UINTM); - - gc = irq_alloc_generic_chip("s3c-uart", 1, uirq->base_irq, reg_base, - handle_level_irq); - - if (!gc) { - pr_err("%s: irq_alloc_generic_chip for IRQ %u failed\n", - __func__, uirq->base_irq); - return; - } - - ct = gc->chip_types; - ct->chip.irq_ack = irq_gc_ack_set_bit; - ct->chip.irq_mask = irq_gc_mask_set_bit; - ct->chip.irq_unmask = irq_gc_mask_clr_bit; - ct->regs.ack = S3C64XX_UINTP; - ct->regs.mask = S3C64XX_UINTM; - irq_setup_generic_chip(gc, IRQ_MSK(4), IRQ_GC_INIT_MASK_CACHE, - IRQ_NOREQUEST | IRQ_NOPROBE, 0); - - irq_set_handler_data(uirq->parent_irq, uirq); - irq_set_chained_handler(uirq->parent_irq, s3c_irq_demux_uart); -} - -/** - * s3c_init_uart_irqs() - initialise UART IRQs and the necessary demuxing - * @irq: The interrupt data for registering - * @nr_irqs: The number of interrupt descriptions in @irq. - * - * Register the UART interrupts specified by @irq including the demuxing - * routines. This supports the S3C6400 and newer style of devices. - */ -void __init s3c_init_uart_irqs(struct s3c_uart_irq *irq, unsigned int nr_irqs) -{ - for (; nr_irqs > 0; nr_irqs--, irq++) - s3c_init_uart_irq(irq); -} -- cgit v1.2.3 From 111058c3ff29a6a25216b31789046c2a330baa7d Mon Sep 17 00:00:00 2001 From: "Rafael J. Wysocki" Date: Sun, 14 Aug 2011 13:35:39 +0200 Subject: ARM / shmobile: Make A3RV be a subdomain of A4LC on SH7372 Instead of coding the undocumented dependencies between power domains A3RV and A4LC on SH7372 directly into the low-level power up/down routines, make A3RV be a subdomain of A4LC, which will cause the same dependecies to hold. Signed-off-by: Rafael J. Wysocki Acked-by: Magnus Damm --- arch/arm/mach-shmobile/include/mach/sh7372.h | 3 ++ arch/arm/mach-shmobile/pm-sh7372.c | 48 +++++----------------------- arch/arm/mach-shmobile/setup-sh7372.c | 3 ++ 3 files changed, 14 insertions(+), 40 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h index ce595cee86cd..713cd2111e85 100644 --- a/arch/arm/mach-shmobile/include/mach/sh7372.h +++ b/arch/arm/mach-shmobile/include/mach/sh7372.h @@ -494,9 +494,12 @@ extern struct sh7372_pm_domain sh7372_a3sg; extern void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd); extern void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd, struct platform_device *pdev); +extern void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd, + struct sh7372_pm_domain *sh7372_sd); #else #define sh7372_init_pm_domain(pd) do { } while(0) #define sh7372_add_device_to_domain(pd, pdev) do { } while(0) +#define sh7372_pm_add_subdomain(pd, sd) do { } while(0) #endif /* CONFIG_PM */ #endif /* __ASM_SH7372_H__ */ diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c index 933fb411be0f..b471b795dfc3 100644 --- a/arch/arm/mach-shmobile/pm-sh7372.c +++ b/arch/arm/mach-shmobile/pm-sh7372.c @@ -91,35 +91,6 @@ static int pd_power_up(struct generic_pm_domain *genpd) return ret; } -static int pd_power_up_a3rv(struct generic_pm_domain *genpd) -{ - int ret = pd_power_up(genpd); - - /* force A4LC on after A3RV has been requested on */ - pm_genpd_poweron(&sh7372_a4lc.genpd); - - return ret; -} - -static int pd_power_down_a3rv(struct generic_pm_domain *genpd) -{ - int ret = pd_power_down(genpd); - - /* try to power down A4LC after A3RV is requested off */ - genpd_queue_power_off_work(&sh7372_a4lc.genpd); - - return ret; -} - -static int pd_power_down_a4lc(struct generic_pm_domain *genpd) -{ - /* only power down A4LC if A3RV is off */ - if (!(__raw_readl(PSTR) & (1 << sh7372_a3rv.bit_shift))) - return pd_power_down(genpd); - - return -EBUSY; -} - static bool pd_active_wakeup(struct device *dev) { return true; @@ -133,17 +104,8 @@ void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd) genpd->stop_device = pm_clk_suspend; genpd->start_device = pm_clk_resume; genpd->active_wakeup = pd_active_wakeup; - - if (sh7372_pd == &sh7372_a4lc) { - genpd->power_off = pd_power_down_a4lc; - genpd->power_on = pd_power_up; - } else if (sh7372_pd == &sh7372_a3rv) { - genpd->power_off = pd_power_down_a3rv; - genpd->power_on = pd_power_up_a3rv; - } else { - genpd->power_off = pd_power_down; - genpd->power_on = pd_power_up; - } + genpd->power_off = pd_power_down; + genpd->power_on = pd_power_up; genpd->power_on(&sh7372_pd->genpd); } @@ -159,6 +121,12 @@ void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd, pm_genpd_add_device(&sh7372_pd->genpd, dev); } +void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd, + struct sh7372_pm_domain *sh7372_sd) +{ + pm_genpd_add_subdomain(&sh7372_pd->genpd, &sh7372_sd->genpd); +} + struct sh7372_pm_domain sh7372_a4lc = { .bit_shift = 1, }; diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index 79f0413d8725..a12ee41f5c03 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include #include @@ -848,6 +849,8 @@ void __init sh7372_add_standard_devices(void) sh7372_init_pm_domain(&sh7372_a3ri); sh7372_init_pm_domain(&sh7372_a3sg); + sh7372_pm_add_subdomain(&sh7372_a4lc, &sh7372_a3rv); + platform_add_devices(sh7372_early_devices, ARRAY_SIZE(sh7372_early_devices)); -- cgit v1.2.3 From 5c095a0e0d600d5a5a4207eaadabd18db46395ce Mon Sep 17 00:00:00 2001 From: "Rafael J. Wysocki" Date: Thu, 25 Aug 2011 15:33:50 +0200 Subject: PM: Introduce struct pm_subsys_data Introduce struct pm_subsys_data that may be subclassed by subsystems to store subsystem-specific information related to the device. Move the clock management fields accessed through the power.subsys_data pointer in struct device to the new strucutre. Signed-off-by: Rafael J. Wysocki --- arch/arm/mach-shmobile/pm-sh7372.c | 2 +- drivers/base/power/clock_ops.c | 122 +++++++++++++++++++------------------ include/linux/device.h | 5 ++ include/linux/pm.h | 9 ++- include/linux/pm_runtime.h | 8 ++- 5 files changed, 84 insertions(+), 62 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c index b471b795dfc3..54d4d86883c9 100644 --- a/arch/arm/mach-shmobile/pm-sh7372.c +++ b/arch/arm/mach-shmobile/pm-sh7372.c @@ -115,7 +115,7 @@ void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd, struct device *dev = &pdev->dev; if (!dev->power.subsys_data) { - pm_clk_init(dev); + pm_clk_create(dev); pm_clk_add(dev, NULL); } pm_genpd_add_device(&sh7372_pd->genpd, dev); diff --git a/drivers/base/power/clock_ops.c b/drivers/base/power/clock_ops.c index 2c18d584066d..b7f1db4f5945 100644 --- a/drivers/base/power/clock_ops.c +++ b/drivers/base/power/clock_ops.c @@ -17,11 +17,6 @@ #ifdef CONFIG_PM -struct pm_clk_data { - struct list_head clock_list; - spinlock_t lock; -}; - enum pce_status { PCE_STATUS_NONE = 0, PCE_STATUS_ACQUIRED, @@ -36,11 +31,6 @@ struct pm_clock_entry { enum pce_status status; }; -static struct pm_clk_data *__to_pcd(struct device *dev) -{ - return dev ? dev->power.subsys_data : NULL; -} - /** * pm_clk_add - Start using a device clock for power management. * @dev: Device whose clock is going to be used for power management. @@ -51,10 +41,10 @@ static struct pm_clk_data *__to_pcd(struct device *dev) */ int pm_clk_add(struct device *dev, const char *con_id) { - struct pm_clk_data *pcd = __to_pcd(dev); + struct pm_subsys_data *psd = dev_to_psd(dev); struct pm_clock_entry *ce; - if (!pcd) + if (!psd) return -EINVAL; ce = kzalloc(sizeof(*ce), GFP_KERNEL); @@ -73,9 +63,9 @@ int pm_clk_add(struct device *dev, const char *con_id) } } - spin_lock_irq(&pcd->lock); - list_add_tail(&ce->node, &pcd->clock_list); - spin_unlock_irq(&pcd->lock); + spin_lock_irq(&psd->lock); + list_add_tail(&ce->node, &psd->clock_list); + spin_unlock_irq(&psd->lock); return 0; } @@ -117,15 +107,15 @@ static void __pm_clk_remove(struct pm_clock_entry *ce) */ void pm_clk_remove(struct device *dev, const char *con_id) { - struct pm_clk_data *pcd = __to_pcd(dev); + struct pm_subsys_data *psd = dev_to_psd(dev); struct pm_clock_entry *ce; - if (!pcd) + if (!psd) return; - spin_lock_irq(&pcd->lock); + spin_lock_irq(&psd->lock); - list_for_each_entry(ce, &pcd->clock_list, node) { + list_for_each_entry(ce, &psd->clock_list, node) { if (!con_id && !ce->con_id) { __pm_clk_remove(ce); break; @@ -137,29 +127,45 @@ void pm_clk_remove(struct device *dev, const char *con_id) } } - spin_unlock_irq(&pcd->lock); + spin_unlock_irq(&psd->lock); } /** * pm_clk_init - Initialize a device's list of power management clocks. * @dev: Device to initialize the list of PM clocks for. * - * Allocate a struct pm_clk_data object, initialize its lock member and - * make the @dev's power.subsys_data field point to it. + * Initialize the lock and clock_list members of the device's pm_subsys_data + * object. */ -int pm_clk_init(struct device *dev) +void pm_clk_init(struct device *dev) { - struct pm_clk_data *pcd; + struct pm_subsys_data *psd = dev_to_psd(dev); + + if (!psd) + return; - pcd = kzalloc(sizeof(*pcd), GFP_KERNEL); - if (!pcd) { + INIT_LIST_HEAD(&psd->clock_list); + spin_lock_init(&psd->lock); +} + +/** + * pm_clk_create - Create and initialize a device's list of PM clocks. + * @dev: Device to create and initialize the list of PM clocks for. + * + * Allocate a struct pm_subsys_data object, initialize its lock and clock_list + * members and make the @dev's power.subsys_data field point to it. + */ +int pm_clk_create(struct device *dev) +{ + struct pm_subsys_data *psd; + + psd = kzalloc(sizeof(*psd), GFP_KERNEL); + if (!psd) { dev_err(dev, "Not enough memory for PM clock data.\n"); return -ENOMEM; } - - INIT_LIST_HEAD(&pcd->clock_list); - spin_lock_init(&pcd->lock); - dev->power.subsys_data = pcd; + dev->power.subsys_data = psd; + pm_clk_init(dev); return 0; } @@ -168,27 +174,27 @@ int pm_clk_init(struct device *dev) * @dev: Device to destroy the list of PM clocks for. * * Clear the @dev's power.subsys_data field, remove the list of clock entries - * from the struct pm_clk_data object pointed to by it before and free + * from the struct pm_subsys_data object pointed to by it before and free * that object. */ void pm_clk_destroy(struct device *dev) { - struct pm_clk_data *pcd = __to_pcd(dev); + struct pm_subsys_data *psd = dev_to_psd(dev); struct pm_clock_entry *ce, *c; - if (!pcd) + if (!psd) return; dev->power.subsys_data = NULL; - spin_lock_irq(&pcd->lock); + spin_lock_irq(&psd->lock); - list_for_each_entry_safe_reverse(ce, c, &pcd->clock_list, node) + list_for_each_entry_safe_reverse(ce, c, &psd->clock_list, node) __pm_clk_remove(ce); - spin_unlock_irq(&pcd->lock); + spin_unlock_irq(&psd->lock); - kfree(pcd); + kfree(psd); } #endif /* CONFIG_PM */ @@ -218,18 +224,18 @@ static void pm_clk_acquire(struct device *dev, */ int pm_clk_suspend(struct device *dev) { - struct pm_clk_data *pcd = __to_pcd(dev); + struct pm_subsys_data *psd = dev_to_psd(dev); struct pm_clock_entry *ce; unsigned long flags; dev_dbg(dev, "%s()\n", __func__); - if (!pcd) + if (!psd) return 0; - spin_lock_irqsave(&pcd->lock, flags); + spin_lock_irqsave(&psd->lock, flags); - list_for_each_entry_reverse(ce, &pcd->clock_list, node) { + list_for_each_entry_reverse(ce, &psd->clock_list, node) { if (ce->status == PCE_STATUS_NONE) pm_clk_acquire(dev, ce); @@ -239,7 +245,7 @@ int pm_clk_suspend(struct device *dev) } } - spin_unlock_irqrestore(&pcd->lock, flags); + spin_unlock_irqrestore(&psd->lock, flags); return 0; } @@ -250,18 +256,18 @@ int pm_clk_suspend(struct device *dev) */ int pm_clk_resume(struct device *dev) { - struct pm_clk_data *pcd = __to_pcd(dev); + struct pm_subsys_data *psd = dev_to_psd(dev); struct pm_clock_entry *ce; unsigned long flags; dev_dbg(dev, "%s()\n", __func__); - if (!pcd) + if (!psd) return 0; - spin_lock_irqsave(&pcd->lock, flags); + spin_lock_irqsave(&psd->lock, flags); - list_for_each_entry(ce, &pcd->clock_list, node) { + list_for_each_entry(ce, &psd->clock_list, node) { if (ce->status == PCE_STATUS_NONE) pm_clk_acquire(dev, ce); @@ -271,7 +277,7 @@ int pm_clk_resume(struct device *dev) } } - spin_unlock_irqrestore(&pcd->lock, flags); + spin_unlock_irqrestore(&psd->lock, flags); return 0; } @@ -309,7 +315,7 @@ static int pm_clk_notify(struct notifier_block *nb, if (dev->pm_domain) break; - error = pm_clk_init(dev); + error = pm_clk_create(dev); if (error) break; @@ -344,22 +350,22 @@ static int pm_clk_notify(struct notifier_block *nb, */ int pm_clk_suspend(struct device *dev) { - struct pm_clk_data *pcd = __to_pcd(dev); + struct pm_subsys_data *psd = dev_to_psd(dev); struct pm_clock_entry *ce; unsigned long flags; dev_dbg(dev, "%s()\n", __func__); /* If there is no driver, the clocks are already disabled. */ - if (!pcd || !dev->driver) + if (!psd || !dev->driver) return 0; - spin_lock_irqsave(&pcd->lock, flags); + spin_lock_irqsave(&psd->lock, flags); - list_for_each_entry_reverse(ce, &pcd->clock_list, node) + list_for_each_entry_reverse(ce, &psd->clock_list, node) clk_disable(ce->clk); - spin_unlock_irqrestore(&pcd->lock, flags); + spin_unlock_irqrestore(&psd->lock, flags); return 0; } @@ -370,22 +376,22 @@ int pm_clk_suspend(struct device *dev) */ int pm_clk_resume(struct device *dev) { - struct pm_clk_data *pcd = __to_pcd(dev); + struct pm_subsys_data *psd = dev_to_psd(dev); struct pm_clock_entry *ce; unsigned long flags; dev_dbg(dev, "%s()\n", __func__); /* If there is no driver, the clocks should remain disabled. */ - if (!pcd || !dev->driver) + if (!psd || !dev->driver) return 0; - spin_lock_irqsave(&pcd->lock, flags); + spin_lock_irqsave(&psd->lock, flags); - list_for_each_entry(ce, &pcd->clock_list, node) + list_for_each_entry(ce, &psd->clock_list, node) clk_enable(ce->clk); - spin_unlock_irqrestore(&pcd->lock, flags); + spin_unlock_irqrestore(&psd->lock, flags); return 0; } diff --git a/include/linux/device.h b/include/linux/device.h index c20dfbfc49b4..5d200ed0071a 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -636,6 +636,11 @@ static inline void set_dev_node(struct device *dev, int node) } #endif +static inline struct pm_subsys_data *dev_to_psd(struct device *dev) +{ + return dev ? dev->power.subsys_data : NULL; +} + static inline unsigned int dev_get_uevent_suppress(const struct device *dev) { return dev->kobj.uevent_suppress; diff --git a/include/linux/pm.h b/include/linux/pm.h index f7c84c9abd30..bf5ee37388d4 100644 --- a/include/linux/pm.h +++ b/include/linux/pm.h @@ -421,6 +421,13 @@ enum rpm_request { struct wakeup_source; +struct pm_subsys_data { + spinlock_t lock; +#ifdef CONFIG_PM_CLK + struct list_head clock_list; +#endif +}; + struct dev_pm_info { pm_message_t power_state; unsigned int can_wakeup:1; @@ -462,7 +469,7 @@ struct dev_pm_info { unsigned long suspended_jiffies; unsigned long accounting_timestamp; #endif - void *subsys_data; /* Owned by the subsystem. */ + struct pm_subsys_data *subsys_data; /* Owned by the subsystem. */ }; extern void update_pm_runtime_accounting(struct device *dev); diff --git a/include/linux/pm_runtime.h b/include/linux/pm_runtime.h index daac05d751b2..6b90630e3c98 100644 --- a/include/linux/pm_runtime.h +++ b/include/linux/pm_runtime.h @@ -258,14 +258,18 @@ struct pm_clk_notifier_block { }; #ifdef CONFIG_PM_CLK -extern int pm_clk_init(struct device *dev); +extern void pm_clk_init(struct device *dev); +extern int pm_clk_create(struct device *dev); extern void pm_clk_destroy(struct device *dev); extern int pm_clk_add(struct device *dev, const char *con_id); extern void pm_clk_remove(struct device *dev, const char *con_id); extern int pm_clk_suspend(struct device *dev); extern int pm_clk_resume(struct device *dev); #else -static inline int pm_clk_init(struct device *dev) +static inline void pm_clk_init(struct device *dev) +{ +} +static inline int pm_clk_create(struct device *dev) { return -EINVAL; } -- cgit v1.2.3 From 4605ab653c1f9d7cc2dda8033de215c9cee325f4 Mon Sep 17 00:00:00 2001 From: "Rafael J. Wysocki" Date: Thu, 25 Aug 2011 15:34:12 +0200 Subject: PM / Domains: Use power.sybsys_data to reduce overhead Currently pm_genpd_runtime_resume() has to walk the list of devices from the device's PM domain to find the corresponding device list object containing the need_restore field to check if the driver's .runtime_resume() callback should be executed for the device. This is suboptimal and can be simplified by using power.sybsys_data to store device information used by the generic PM domains code. Signed-off-by: Rafael J. Wysocki --- arch/arm/mach-shmobile/pm-sh7372.c | 6 +-- drivers/base/power/domain.c | 87 +++++++++++++------------------------- include/linux/pm.h | 9 ++++ include/linux/pm_domain.h | 6 --- include/linux/pm_runtime.h | 10 +++++ 5 files changed, 51 insertions(+), 67 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c index 54d4d86883c9..4aeca0adae56 100644 --- a/arch/arm/mach-shmobile/pm-sh7372.c +++ b/arch/arm/mach-shmobile/pm-sh7372.c @@ -114,11 +114,9 @@ void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd, { struct device *dev = &pdev->dev; - if (!dev->power.subsys_data) { - pm_clk_create(dev); - pm_clk_add(dev, NULL); - } pm_genpd_add_device(&sh7372_pd->genpd, dev); + if (pm_clk_no_clocks(dev)) + pm_clk_add(dev, NULL); } void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd, diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c index 1fc6cc9835ad..339eb2d9bdda 100644 --- a/drivers/base/power/domain.c +++ b/drivers/base/power/domain.c @@ -181,18 +181,18 @@ int pm_genpd_poweron(struct generic_pm_domain *genpd) /** * __pm_genpd_save_device - Save the pre-suspend state of a device. - * @dle: Device list entry of the device to save the state of. + * @pdd: Domain data of the device to save the state of. * @genpd: PM domain the device belongs to. */ -static int __pm_genpd_save_device(struct dev_list_entry *dle, +static int __pm_genpd_save_device(struct pm_domain_data *pdd, struct generic_pm_domain *genpd) __releases(&genpd->lock) __acquires(&genpd->lock) { - struct device *dev = dle->dev; + struct device *dev = pdd->dev; struct device_driver *drv = dev->driver; int ret = 0; - if (dle->need_restore) + if (pdd->need_restore) return 0; mutex_unlock(&genpd->lock); @@ -210,24 +210,24 @@ static int __pm_genpd_save_device(struct dev_list_entry *dle, mutex_lock(&genpd->lock); if (!ret) - dle->need_restore = true; + pdd->need_restore = true; return ret; } /** * __pm_genpd_restore_device - Restore the pre-suspend state of a device. - * @dle: Device list entry of the device to restore the state of. + * @pdd: Domain data of the device to restore the state of. * @genpd: PM domain the device belongs to. */ -static void __pm_genpd_restore_device(struct dev_list_entry *dle, +static void __pm_genpd_restore_device(struct pm_domain_data *pdd, struct generic_pm_domain *genpd) __releases(&genpd->lock) __acquires(&genpd->lock) { - struct device *dev = dle->dev; + struct device *dev = pdd->dev; struct device_driver *drv = dev->driver; - if (!dle->need_restore) + if (!pdd->need_restore) return; mutex_unlock(&genpd->lock); @@ -244,7 +244,7 @@ static void __pm_genpd_restore_device(struct dev_list_entry *dle, mutex_lock(&genpd->lock); - dle->need_restore = false; + pdd->need_restore = false; } /** @@ -286,7 +286,7 @@ void genpd_queue_power_off_work(struct generic_pm_domain *genpd) static int pm_genpd_poweroff(struct generic_pm_domain *genpd) __releases(&genpd->lock) __acquires(&genpd->lock) { - struct dev_list_entry *dle; + struct pm_domain_data *pdd; struct gpd_link *link; unsigned int not_suspended; int ret = 0; @@ -308,8 +308,8 @@ static int pm_genpd_poweroff(struct generic_pm_domain *genpd) return -EBUSY; not_suspended = 0; - list_for_each_entry(dle, &genpd->dev_list, node) - if (dle->dev->driver && !pm_runtime_suspended(dle->dev)) + list_for_each_entry(pdd, &genpd->dev_list, list_node) + if (pdd->dev->driver && !pm_runtime_suspended(pdd->dev)) not_suspended++; if (not_suspended > genpd->in_progress) @@ -332,9 +332,9 @@ static int pm_genpd_poweroff(struct generic_pm_domain *genpd) genpd->status = GPD_STATE_BUSY; genpd->poweroff_task = current; - list_for_each_entry_reverse(dle, &genpd->dev_list, node) { + list_for_each_entry_reverse(pdd, &genpd->dev_list, list_node) { ret = atomic_read(&genpd->sd_count) == 0 ? - __pm_genpd_save_device(dle, genpd) : -EBUSY; + __pm_genpd_save_device(pdd, genpd) : -EBUSY; if (genpd_abort_poweroff(genpd)) goto out; @@ -432,24 +432,6 @@ static int pm_genpd_runtime_suspend(struct device *dev) return 0; } -/** - * __pm_genpd_runtime_resume - Resume a device belonging to I/O PM domain. - * @dev: Device to resume. - * @genpd: PM domain the device belongs to. - */ -static void __pm_genpd_runtime_resume(struct device *dev, - struct generic_pm_domain *genpd) -{ - struct dev_list_entry *dle; - - list_for_each_entry(dle, &genpd->dev_list, node) { - if (dle->dev == dev) { - __pm_genpd_restore_device(dle, genpd); - break; - } - } -} - /** * pm_genpd_runtime_resume - Resume a device belonging to I/O PM domain. * @dev: Device to resume. @@ -495,7 +477,7 @@ static int pm_genpd_runtime_resume(struct device *dev) mutex_lock(&genpd->lock); } finish_wait(&genpd->status_wait_queue, &wait); - __pm_genpd_runtime_resume(dev, genpd); + __pm_genpd_restore_device(&dev->power.subsys_data->domain_data, genpd); genpd->resume_count--; genpd_set_active(genpd); wake_up_all(&genpd->status_wait_queue); @@ -525,8 +507,6 @@ void pm_genpd_poweroff_unused(void) #else static inline void genpd_power_off_work_fn(struct work_struct *work) {} -static inline void __pm_genpd_runtime_resume(struct device *dev, - struct generic_pm_domain *genpd) {} #define pm_genpd_runtime_suspend NULL #define pm_genpd_runtime_resume NULL @@ -1083,7 +1063,7 @@ static void pm_genpd_complete(struct device *dev) */ int pm_genpd_add_device(struct generic_pm_domain *genpd, struct device *dev) { - struct dev_list_entry *dle; + struct pm_domain_data *pdd; int ret = 0; dev_dbg(dev, "%s()\n", __func__); @@ -1103,26 +1083,20 @@ int pm_genpd_add_device(struct generic_pm_domain *genpd, struct device *dev) goto out; } - list_for_each_entry(dle, &genpd->dev_list, node) - if (dle->dev == dev) { + list_for_each_entry(pdd, &genpd->dev_list, list_node) + if (pdd->dev == dev) { ret = -EINVAL; goto out; } - dle = kzalloc(sizeof(*dle), GFP_KERNEL); - if (!dle) { - ret = -ENOMEM; - goto out; - } - - dle->dev = dev; - dle->need_restore = false; - list_add_tail(&dle->node, &genpd->dev_list); genpd->device_count++; - spin_lock_irq(&dev->power.lock); dev->pm_domain = &genpd->domain; - spin_unlock_irq(&dev->power.lock); + dev_pm_get_subsys_data(dev); + pdd = &dev->power.subsys_data->domain_data; + pdd->dev = dev; + pdd->need_restore = false; + list_add_tail(&pdd->list_node, &genpd->dev_list); out: genpd_release_lock(genpd); @@ -1138,7 +1112,7 @@ int pm_genpd_add_device(struct generic_pm_domain *genpd, struct device *dev) int pm_genpd_remove_device(struct generic_pm_domain *genpd, struct device *dev) { - struct dev_list_entry *dle; + struct pm_domain_data *pdd; int ret = -EINVAL; dev_dbg(dev, "%s()\n", __func__); @@ -1153,17 +1127,16 @@ int pm_genpd_remove_device(struct generic_pm_domain *genpd, goto out; } - list_for_each_entry(dle, &genpd->dev_list, node) { - if (dle->dev != dev) + list_for_each_entry(pdd, &genpd->dev_list, list_node) { + if (pdd->dev != dev) continue; - spin_lock_irq(&dev->power.lock); + list_del_init(&pdd->list_node); + pdd->dev = NULL; + dev_pm_put_subsys_data(dev); dev->pm_domain = NULL; - spin_unlock_irq(&dev->power.lock); genpd->device_count--; - list_del(&dle->node); - kfree(dle); ret = 0; break; diff --git a/include/linux/pm.h b/include/linux/pm.h index c6b5a0a41ab3..ed10f24d5259 100644 --- a/include/linux/pm.h +++ b/include/linux/pm.h @@ -421,12 +421,21 @@ enum rpm_request { struct wakeup_source; +struct pm_domain_data { + struct list_head list_node; + struct device *dev; + bool need_restore; +}; + struct pm_subsys_data { spinlock_t lock; unsigned int refcount; #ifdef CONFIG_PM_CLK struct list_head clock_list; #endif +#ifdef CONFIG_PM_GENERIC_DOMAINS + struct pm_domain_data domain_data; +#endif }; struct dev_pm_info { diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h index bf679f59f9a8..5cce46c2d926 100644 --- a/include/linux/pm_domain.h +++ b/include/linux/pm_domain.h @@ -61,12 +61,6 @@ struct gpd_link { struct list_head slave_node; }; -struct dev_list_entry { - struct list_head node; - struct device *dev; - bool need_restore; -}; - #ifdef CONFIG_PM_GENERIC_DOMAINS extern int pm_genpd_add_device(struct generic_pm_domain *genpd, struct device *dev); diff --git a/include/linux/pm_runtime.h b/include/linux/pm_runtime.h index 6b90630e3c98..a5a41a850efb 100644 --- a/include/linux/pm_runtime.h +++ b/include/linux/pm_runtime.h @@ -258,6 +258,12 @@ struct pm_clk_notifier_block { }; #ifdef CONFIG_PM_CLK +static inline bool pm_clk_no_clocks(struct device *dev) +{ + return dev && dev->power.subsys_data + && list_empty(&dev->power.subsys_data->clock_list); +} + extern void pm_clk_init(struct device *dev); extern int pm_clk_create(struct device *dev); extern void pm_clk_destroy(struct device *dev); @@ -266,6 +272,10 @@ extern void pm_clk_remove(struct device *dev, const char *con_id); extern int pm_clk_suspend(struct device *dev); extern int pm_clk_resume(struct device *dev); #else +static inline bool pm_clk_no_clocks(struct device *dev) +{ + return true; +} static inline void pm_clk_init(struct device *dev) { } -- cgit v1.2.3 From b5e8d269d814763d597ccc0108d1fa6639ad35a1 Mon Sep 17 00:00:00 2001 From: "Rafael J. Wysocki" Date: Thu, 25 Aug 2011 15:34:19 +0200 Subject: PM: Move clock-related definitions and headers to separate file Since the PM clock management code in drivers/base/power/clock_ops.c is used for both runtime PM and system suspend/hibernation, the definitions of data structures and headers related to it should not be located in include/linux/pm_rumtime.h. Move them to a separate header file. Signed-off-by: Rafael J. Wysocki --- arch/arm/mach-omap1/pm_bus.c | 1 + arch/arm/mach-shmobile/board-ap4evb.c | 1 + arch/arm/mach-shmobile/board-mackerel.c | 2 +- arch/arm/mach-shmobile/pm-sh7372.c | 2 +- arch/arm/mach-shmobile/pm_runtime.c | 1 + drivers/base/power/clock_ops.c | 2 +- drivers/base/power/common.c | 3 +- include/linux/pm_clock.h | 71 +++++++++++++++++++++++++++++++++ include/linux/pm_runtime.h | 56 -------------------------- 9 files changed, 78 insertions(+), 61 deletions(-) create mode 100644 include/linux/pm_clock.h (limited to 'arch/arm') diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c index 943072d5a1d5..7868e75ad077 100644 --- a/arch/arm/mach-omap1/pm_bus.c +++ b/arch/arm/mach-omap1/pm_bus.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index fadbe5b3005d..074884c646db 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c @@ -42,6 +42,7 @@ #include #include #include +#include #include #include diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 0ea71f8d4b89..4978e8186127 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c @@ -39,7 +39,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c index 4aeca0adae56..5d35831e4fb1 100644 --- a/arch/arm/mach-shmobile/pm-sh7372.c +++ b/arch/arm/mach-shmobile/pm-sh7372.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-shmobile/pm_runtime.c b/arch/arm/mach-shmobile/pm_runtime.c index 6ec454e1e063..bd5c6a3b8c55 100644 --- a/arch/arm/mach-shmobile/pm_runtime.c +++ b/arch/arm/mach-shmobile/pm_runtime.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/base/power/clock_ops.c b/drivers/base/power/clock_ops.c index 8383e2488d79..cb44b58d6813 100644 --- a/drivers/base/power/clock_ops.c +++ b/drivers/base/power/clock_ops.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/base/power/common.c b/drivers/base/power/common.c index d398cf029b32..29820c396182 100644 --- a/drivers/base/power/common.c +++ b/drivers/base/power/common.c @@ -10,8 +10,7 @@ #include #include #include -#include -#include +#include /** * dev_pm_get_subsys_data - Create or refcount power.subsys_data for device. diff --git a/include/linux/pm_clock.h b/include/linux/pm_clock.h new file mode 100644 index 000000000000..8348866e7b05 --- /dev/null +++ b/include/linux/pm_clock.h @@ -0,0 +1,71 @@ +/* + * pm_clock.h - Definitions and headers related to device clocks. + * + * Copyright (C) 2011 Rafael J. Wysocki , Renesas Electronics Corp. + * + * This file is released under the GPLv2. + */ + +#ifndef _LINUX_PM_CLOCK_H +#define _LINUX_PM_CLOCK_H + +#include +#include + +struct pm_clk_notifier_block { + struct notifier_block nb; + struct dev_pm_domain *pm_domain; + char *con_ids[]; +}; + +#ifdef CONFIG_PM_CLK +static inline bool pm_clk_no_clocks(struct device *dev) +{ + return dev && dev->power.subsys_data + && list_empty(&dev->power.subsys_data->clock_list); +} + +extern void pm_clk_init(struct device *dev); +extern int pm_clk_create(struct device *dev); +extern void pm_clk_destroy(struct device *dev); +extern int pm_clk_add(struct device *dev, const char *con_id); +extern void pm_clk_remove(struct device *dev, const char *con_id); +extern int pm_clk_suspend(struct device *dev); +extern int pm_clk_resume(struct device *dev); +#else +static inline bool pm_clk_no_clocks(struct device *dev) +{ + return true; +} +static inline void pm_clk_init(struct device *dev) +{ +} +static inline int pm_clk_create(struct device *dev) +{ + return -EINVAL; +} +static inline void pm_clk_destroy(struct device *dev) +{ +} +static inline int pm_clk_add(struct device *dev, const char *con_id) +{ + return -EINVAL; +} +static inline void pm_clk_remove(struct device *dev, const char *con_id) +{ +} +#define pm_clk_suspend NULL +#define pm_clk_resume NULL +#endif + +#ifdef CONFIG_HAVE_CLK +extern void pm_clk_add_notifier(struct bus_type *bus, + struct pm_clk_notifier_block *clknb); +#else +static inline void pm_clk_add_notifier(struct bus_type *bus, + struct pm_clk_notifier_block *clknb) +{ +} +#endif + +#endif diff --git a/include/linux/pm_runtime.h b/include/linux/pm_runtime.h index a5a41a850efb..70b284024d9e 100644 --- a/include/linux/pm_runtime.h +++ b/include/linux/pm_runtime.h @@ -251,60 +251,4 @@ static inline void pm_runtime_dont_use_autosuspend(struct device *dev) __pm_runtime_use_autosuspend(dev, false); } -struct pm_clk_notifier_block { - struct notifier_block nb; - struct dev_pm_domain *pm_domain; - char *con_ids[]; -}; - -#ifdef CONFIG_PM_CLK -static inline bool pm_clk_no_clocks(struct device *dev) -{ - return dev && dev->power.subsys_data - && list_empty(&dev->power.subsys_data->clock_list); -} - -extern void pm_clk_init(struct device *dev); -extern int pm_clk_create(struct device *dev); -extern void pm_clk_destroy(struct device *dev); -extern int pm_clk_add(struct device *dev, const char *con_id); -extern void pm_clk_remove(struct device *dev, const char *con_id); -extern int pm_clk_suspend(struct device *dev); -extern int pm_clk_resume(struct device *dev); -#else -static inline bool pm_clk_no_clocks(struct device *dev) -{ - return true; -} -static inline void pm_clk_init(struct device *dev) -{ -} -static inline int pm_clk_create(struct device *dev) -{ - return -EINVAL; -} -static inline void pm_clk_destroy(struct device *dev) -{ -} -static inline int pm_clk_add(struct device *dev, const char *con_id) -{ - return -EINVAL; -} -static inline void pm_clk_remove(struct device *dev, const char *con_id) -{ -} -#define pm_clk_suspend NULL -#define pm_clk_resume NULL -#endif - -#ifdef CONFIG_HAVE_CLK -extern void pm_clk_add_notifier(struct bus_type *bus, - struct pm_clk_notifier_block *clknb); -#else -static inline void pm_clk_add_notifier(struct bus_type *bus, - struct pm_clk_notifier_block *clknb) -{ -} -#endif - #endif -- cgit v1.2.3 From e8db0be1245de16a6cc6365506abc392c3c212d4 Mon Sep 17 00:00:00 2001 From: Jean Pihet Date: Thu, 25 Aug 2011 15:35:03 +0200 Subject: PM QoS: Move and rename the implementation files The PM QoS implementation files are better named kernel/power/qos.c and include/linux/pm_qos.h. The PM QoS support is compiled under the CONFIG_PM option. Signed-off-by: Jean Pihet Acked-by: markgross Reviewed-by: Kevin Hilman Signed-off-by: Rafael J. Wysocki --- arch/arm/mach-msm/clock.c | 2 +- drivers/acpi/processor_idle.c | 2 +- drivers/cpuidle/cpuidle.c | 2 +- drivers/cpuidle/governors/ladder.c | 2 +- drivers/cpuidle/governors/menu.c | 2 +- drivers/media/video/via-camera.c | 2 +- drivers/net/e1000e/netdev.c | 2 +- drivers/net/wireless/ipw2x00/ipw2100.c | 2 +- include/linux/netdevice.h | 2 +- include/linux/pm_qos.h | 61 +++++ include/linux/pm_qos_params.h | 38 --- include/sound/pcm.h | 2 +- kernel/Makefile | 2 +- kernel/pm_qos_params.c | 481 --------------------------------- kernel/power/Makefile | 2 +- kernel/power/qos.c | 481 +++++++++++++++++++++++++++++++++ net/mac80211/main.c | 2 +- net/mac80211/mlme.c | 2 +- net/mac80211/scan.c | 2 +- sound/core/pcm_native.c | 2 +- 20 files changed, 558 insertions(+), 535 deletions(-) create mode 100644 include/linux/pm_qos.h delete mode 100644 include/linux/pm_qos_params.h delete mode 100644 kernel/pm_qos_params.c create mode 100644 kernel/power/qos.c (limited to 'arch/arm') diff --git a/arch/arm/mach-msm/clock.c b/arch/arm/mach-msm/clock.c index 22a537669624..d9145dfc2a3b 100644 --- a/arch/arm/mach-msm/clock.c +++ b/arch/arm/mach-msm/clock.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c index 431ab11c8c1b..2e69e09ff03e 100644 --- a/drivers/acpi/processor_idle.c +++ b/drivers/acpi/processor_idle.c @@ -37,7 +37,7 @@ #include #include #include /* need_resched() */ -#include +#include #include #include #include diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c index d4c542372886..0df014110097 100644 --- a/drivers/cpuidle/cpuidle.c +++ b/drivers/cpuidle/cpuidle.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/cpuidle/governors/ladder.c b/drivers/cpuidle/governors/ladder.c index 12c98900dcf8..f62fde21e962 100644 --- a/drivers/cpuidle/governors/ladder.c +++ b/drivers/cpuidle/governors/ladder.c @@ -14,7 +14,7 @@ #include #include -#include +#include #include #include diff --git a/drivers/cpuidle/governors/menu.c b/drivers/cpuidle/governors/menu.c index c47f3d09c1ee..3600f1955e48 100644 --- a/drivers/cpuidle/governors/menu.c +++ b/drivers/cpuidle/governors/menu.c @@ -12,7 +12,7 @@ #include #include -#include +#include #include #include #include diff --git a/drivers/media/video/via-camera.c b/drivers/media/video/via-camera.c index 85d3048c1d67..b3ca3893f3de 100644 --- a/drivers/media/video/via-camera.c +++ b/drivers/media/video/via-camera.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c index 2198e615f241..07031af38964 100644 --- a/drivers/net/e1000e/netdev.c +++ b/drivers/net/e1000e/netdev.c @@ -47,7 +47,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c index 3774dd034746..aaab76ce6020 100644 --- a/drivers/net/wireless/ipw2x00/ipw2100.c +++ b/drivers/net/wireless/ipw2x00/ipw2100.c @@ -161,7 +161,7 @@ that only one external action is invoked at a time. #include #include #include -#include +#include #include diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index ddee79bb8f15..f72ac6b972b7 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -31,7 +31,7 @@ #include #ifdef __KERNEL__ -#include +#include #include #include #include diff --git a/include/linux/pm_qos.h b/include/linux/pm_qos.h new file mode 100644 index 000000000000..7ba675413b08 --- /dev/null +++ b/include/linux/pm_qos.h @@ -0,0 +1,61 @@ +#ifndef _LINUX_PM_QOS_H +#define _LINUX_PM_QOS_H +/* interface for the pm_qos_power infrastructure of the linux kernel. + * + * Mark Gross + */ +#include +#include +#include + +#define PM_QOS_RESERVED 0 +#define PM_QOS_CPU_DMA_LATENCY 1 +#define PM_QOS_NETWORK_LATENCY 2 +#define PM_QOS_NETWORK_THROUGHPUT 3 + +#define PM_QOS_NUM_CLASSES 4 +#define PM_QOS_DEFAULT_VALUE -1 + +#define PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC) +#define PM_QOS_NETWORK_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC) +#define PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE 0 + +struct pm_qos_request_list { + struct plist_node list; + int pm_qos_class; +}; + +#ifdef CONFIG_PM +void pm_qos_add_request(struct pm_qos_request_list *l, + int pm_qos_class, s32 value); +void pm_qos_update_request(struct pm_qos_request_list *pm_qos_req, + s32 new_value); +void pm_qos_remove_request(struct pm_qos_request_list *pm_qos_req); + +int pm_qos_request(int pm_qos_class); +int pm_qos_add_notifier(int pm_qos_class, struct notifier_block *notifier); +int pm_qos_remove_notifier(int pm_qos_class, struct notifier_block *notifier); +int pm_qos_request_active(struct pm_qos_request_list *req); +#else +static inline void pm_qos_add_request(struct pm_qos_request_list *l, + int pm_qos_class, s32 value) + { return; } +static inline void pm_qos_update_request(struct pm_qos_request_list *pm_qos_req, + s32 new_value) + { return; } +static inline void pm_qos_remove_request(struct pm_qos_request_list *pm_qos_req) + { return; } + +static inline int pm_qos_request(int pm_qos_class) + { return 0; } +static inline int pm_qos_add_notifier(int pm_qos_class, + struct notifier_block *notifier) + { return 0; } +static inline int pm_qos_remove_notifier(int pm_qos_class, + struct notifier_block *notifier) + { return 0; } +static inline int pm_qos_request_active(struct pm_qos_request_list *req) + { return 0; } +#endif + +#endif diff --git a/include/linux/pm_qos_params.h b/include/linux/pm_qos_params.h deleted file mode 100644 index a7d87f911cab..000000000000 --- a/include/linux/pm_qos_params.h +++ /dev/null @@ -1,38 +0,0 @@ -#ifndef _LINUX_PM_QOS_PARAMS_H -#define _LINUX_PM_QOS_PARAMS_H -/* interface for the pm_qos_power infrastructure of the linux kernel. - * - * Mark Gross - */ -#include -#include -#include - -#define PM_QOS_RESERVED 0 -#define PM_QOS_CPU_DMA_LATENCY 1 -#define PM_QOS_NETWORK_LATENCY 2 -#define PM_QOS_NETWORK_THROUGHPUT 3 - -#define PM_QOS_NUM_CLASSES 4 -#define PM_QOS_DEFAULT_VALUE -1 - -#define PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC) -#define PM_QOS_NETWORK_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC) -#define PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE 0 - -struct pm_qos_request_list { - struct plist_node list; - int pm_qos_class; -}; - -void pm_qos_add_request(struct pm_qos_request_list *l, int pm_qos_class, s32 value); -void pm_qos_update_request(struct pm_qos_request_list *pm_qos_req, - s32 new_value); -void pm_qos_remove_request(struct pm_qos_request_list *pm_qos_req); - -int pm_qos_request(int pm_qos_class); -int pm_qos_add_notifier(int pm_qos_class, struct notifier_block *notifier); -int pm_qos_remove_notifier(int pm_qos_class, struct notifier_block *notifier); -int pm_qos_request_active(struct pm_qos_request_list *req); - -#endif diff --git a/include/sound/pcm.h b/include/sound/pcm.h index 57e71fa33f7c..666ee91e8a2e 100644 --- a/include/sound/pcm.h +++ b/include/sound/pcm.h @@ -29,7 +29,7 @@ #include #include #include -#include +#include #define snd_pcm_substream_chip(substream) ((substream)->private_data) #define snd_pcm_chip(pcm) ((pcm)->private_data) diff --git a/kernel/Makefile b/kernel/Makefile index eca595e2fd52..2da48d3515eb 100644 --- a/kernel/Makefile +++ b/kernel/Makefile @@ -9,7 +9,7 @@ obj-y = sched.o fork.o exec_domain.o panic.o printk.o \ rcupdate.o extable.o params.o posix-timers.o \ kthread.o wait.o kfifo.o sys_ni.o posix-cpu-timers.o mutex.o \ hrtimer.o rwsem.o nsproxy.o srcu.o semaphore.o \ - notifier.o ksysfs.o pm_qos_params.o sched_clock.o cred.o \ + notifier.o ksysfs.o sched_clock.o cred.o \ async.o range.o obj-y += groups.o diff --git a/kernel/pm_qos_params.c b/kernel/pm_qos_params.c deleted file mode 100644 index 37f05d0f0793..000000000000 --- a/kernel/pm_qos_params.c +++ /dev/null @@ -1,481 +0,0 @@ -/* - * This module exposes the interface to kernel space for specifying - * QoS dependencies. It provides infrastructure for registration of: - * - * Dependents on a QoS value : register requests - * Watchers of QoS value : get notified when target QoS value changes - * - * This QoS design is best effort based. Dependents register their QoS needs. - * Watchers register to keep track of the current QoS needs of the system. - * - * There are 3 basic classes of QoS parameter: latency, timeout, throughput - * each have defined units: - * latency: usec - * timeout: usec <-- currently not used. - * throughput: kbs (kilo byte / sec) - * - * There are lists of pm_qos_objects each one wrapping requests, notifiers - * - * User mode requests on a QOS parameter register themselves to the - * subsystem by opening the device node /dev/... and writing there request to - * the node. As long as the process holds a file handle open to the node the - * client continues to be accounted for. Upon file release the usermode - * request is removed and a new qos target is computed. This way when the - * request that the application has is cleaned up when closes the file - * pointer or exits the pm_qos_object will get an opportunity to clean up. - * - * Mark Gross - */ - -/*#define DEBUG*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -/* - * locking rule: all changes to requests or notifiers lists - * or pm_qos_object list and pm_qos_objects need to happen with pm_qos_lock - * held, taken with _irqsave. One lock to rule them all - */ -enum pm_qos_type { - PM_QOS_MAX, /* return the largest value */ - PM_QOS_MIN /* return the smallest value */ -}; - -/* - * Note: The lockless read path depends on the CPU accessing - * target_value atomically. Atomic access is only guaranteed on all CPU - * types linux supports for 32 bit quantites - */ -struct pm_qos_object { - struct plist_head requests; - struct blocking_notifier_head *notifiers; - struct miscdevice pm_qos_power_miscdev; - char *name; - s32 target_value; /* Do not change to 64 bit */ - s32 default_value; - enum pm_qos_type type; -}; - -static DEFINE_SPINLOCK(pm_qos_lock); - -static struct pm_qos_object null_pm_qos; -static BLOCKING_NOTIFIER_HEAD(cpu_dma_lat_notifier); -static struct pm_qos_object cpu_dma_pm_qos = { - .requests = PLIST_HEAD_INIT(cpu_dma_pm_qos.requests), - .notifiers = &cpu_dma_lat_notifier, - .name = "cpu_dma_latency", - .target_value = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE, - .default_value = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE, - .type = PM_QOS_MIN, -}; - -static BLOCKING_NOTIFIER_HEAD(network_lat_notifier); -static struct pm_qos_object network_lat_pm_qos = { - .requests = PLIST_HEAD_INIT(network_lat_pm_qos.requests), - .notifiers = &network_lat_notifier, - .name = "network_latency", - .target_value = PM_QOS_NETWORK_LAT_DEFAULT_VALUE, - .default_value = PM_QOS_NETWORK_LAT_DEFAULT_VALUE, - .type = PM_QOS_MIN -}; - - -static BLOCKING_NOTIFIER_HEAD(network_throughput_notifier); -static struct pm_qos_object network_throughput_pm_qos = { - .requests = PLIST_HEAD_INIT(network_throughput_pm_qos.requests), - .notifiers = &network_throughput_notifier, - .name = "network_throughput", - .target_value = PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE, - .default_value = PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE, - .type = PM_QOS_MAX, -}; - - -static struct pm_qos_object *pm_qos_array[] = { - &null_pm_qos, - &cpu_dma_pm_qos, - &network_lat_pm_qos, - &network_throughput_pm_qos -}; - -static ssize_t pm_qos_power_write(struct file *filp, const char __user *buf, - size_t count, loff_t *f_pos); -static ssize_t pm_qos_power_read(struct file *filp, char __user *buf, - size_t count, loff_t *f_pos); -static int pm_qos_power_open(struct inode *inode, struct file *filp); -static int pm_qos_power_release(struct inode *inode, struct file *filp); - -static const struct file_operations pm_qos_power_fops = { - .write = pm_qos_power_write, - .read = pm_qos_power_read, - .open = pm_qos_power_open, - .release = pm_qos_power_release, - .llseek = noop_llseek, -}; - -/* unlocked internal variant */ -static inline int pm_qos_get_value(struct pm_qos_object *o) -{ - if (plist_head_empty(&o->requests)) - return o->default_value; - - switch (o->type) { - case PM_QOS_MIN: - return plist_first(&o->requests)->prio; - - case PM_QOS_MAX: - return plist_last(&o->requests)->prio; - - default: - /* runtime check for not using enum */ - BUG(); - } -} - -static inline s32 pm_qos_read_value(struct pm_qos_object *o) -{ - return o->target_value; -} - -static inline void pm_qos_set_value(struct pm_qos_object *o, s32 value) -{ - o->target_value = value; -} - -static void update_target(struct pm_qos_object *o, struct plist_node *node, - int del, int value) -{ - unsigned long flags; - int prev_value, curr_value; - - spin_lock_irqsave(&pm_qos_lock, flags); - prev_value = pm_qos_get_value(o); - /* PM_QOS_DEFAULT_VALUE is a signal that the value is unchanged */ - if (value != PM_QOS_DEFAULT_VALUE) { - /* - * to change the list, we atomically remove, reinit - * with new value and add, then see if the extremal - * changed - */ - plist_del(node, &o->requests); - plist_node_init(node, value); - plist_add(node, &o->requests); - } else if (del) { - plist_del(node, &o->requests); - } else { - plist_add(node, &o->requests); - } - curr_value = pm_qos_get_value(o); - pm_qos_set_value(o, curr_value); - spin_unlock_irqrestore(&pm_qos_lock, flags); - - if (prev_value != curr_value) - blocking_notifier_call_chain(o->notifiers, - (unsigned long)curr_value, - NULL); -} - -static int register_pm_qos_misc(struct pm_qos_object *qos) -{ - qos->pm_qos_power_miscdev.minor = MISC_DYNAMIC_MINOR; - qos->pm_qos_power_miscdev.name = qos->name; - qos->pm_qos_power_miscdev.fops = &pm_qos_power_fops; - - return misc_register(&qos->pm_qos_power_miscdev); -} - -static int find_pm_qos_object_by_minor(int minor) -{ - int pm_qos_class; - - for (pm_qos_class = 0; - pm_qos_class < PM_QOS_NUM_CLASSES; pm_qos_class++) { - if (minor == - pm_qos_array[pm_qos_class]->pm_qos_power_miscdev.minor) - return pm_qos_class; - } - return -1; -} - -/** - * pm_qos_request - returns current system wide qos expectation - * @pm_qos_class: identification of which qos value is requested - * - * This function returns the current target value. - */ -int pm_qos_request(int pm_qos_class) -{ - return pm_qos_read_value(pm_qos_array[pm_qos_class]); -} -EXPORT_SYMBOL_GPL(pm_qos_request); - -int pm_qos_request_active(struct pm_qos_request_list *req) -{ - return req->pm_qos_class != 0; -} -EXPORT_SYMBOL_GPL(pm_qos_request_active); - -/** - * pm_qos_add_request - inserts new qos request into the list - * @dep: pointer to a preallocated handle - * @pm_qos_class: identifies which list of qos request to use - * @value: defines the qos request - * - * This function inserts a new entry in the pm_qos_class list of requested qos - * performance characteristics. It recomputes the aggregate QoS expectations - * for the pm_qos_class of parameters and initializes the pm_qos_request_list - * handle. Caller needs to save this handle for later use in updates and - * removal. - */ - -void pm_qos_add_request(struct pm_qos_request_list *dep, - int pm_qos_class, s32 value) -{ - struct pm_qos_object *o = pm_qos_array[pm_qos_class]; - int new_value; - - if (pm_qos_request_active(dep)) { - WARN(1, KERN_ERR "pm_qos_add_request() called for already added request\n"); - return; - } - if (value == PM_QOS_DEFAULT_VALUE) - new_value = o->default_value; - else - new_value = value; - plist_node_init(&dep->list, new_value); - dep->pm_qos_class = pm_qos_class; - update_target(o, &dep->list, 0, PM_QOS_DEFAULT_VALUE); -} -EXPORT_SYMBOL_GPL(pm_qos_add_request); - -/** - * pm_qos_update_request - modifies an existing qos request - * @pm_qos_req : handle to list element holding a pm_qos request to use - * @value: defines the qos request - * - * Updates an existing qos request for the pm_qos_class of parameters along - * with updating the target pm_qos_class value. - * - * Attempts are made to make this code callable on hot code paths. - */ -void pm_qos_update_request(struct pm_qos_request_list *pm_qos_req, - s32 new_value) -{ - s32 temp; - struct pm_qos_object *o; - - if (!pm_qos_req) /*guard against callers passing in null */ - return; - - if (!pm_qos_request_active(pm_qos_req)) { - WARN(1, KERN_ERR "pm_qos_update_request() called for unknown object\n"); - return; - } - - o = pm_qos_array[pm_qos_req->pm_qos_class]; - - if (new_value == PM_QOS_DEFAULT_VALUE) - temp = o->default_value; - else - temp = new_value; - - if (temp != pm_qos_req->list.prio) - update_target(o, &pm_qos_req->list, 0, temp); -} -EXPORT_SYMBOL_GPL(pm_qos_update_request); - -/** - * pm_qos_remove_request - modifies an existing qos request - * @pm_qos_req: handle to request list element - * - * Will remove pm qos request from the list of requests and - * recompute the current target value for the pm_qos_class. Call this - * on slow code paths. - */ -void pm_qos_remove_request(struct pm_qos_request_list *pm_qos_req) -{ - struct pm_qos_object *o; - - if (pm_qos_req == NULL) - return; - /* silent return to keep pcm code cleaner */ - - if (!pm_qos_request_active(pm_qos_req)) { - WARN(1, KERN_ERR "pm_qos_remove_request() called for unknown object\n"); - return; - } - - o = pm_qos_array[pm_qos_req->pm_qos_class]; - update_target(o, &pm_qos_req->list, 1, PM_QOS_DEFAULT_VALUE); - memset(pm_qos_req, 0, sizeof(*pm_qos_req)); -} -EXPORT_SYMBOL_GPL(pm_qos_remove_request); - -/** - * pm_qos_add_notifier - sets notification entry for changes to target value - * @pm_qos_class: identifies which qos target changes should be notified. - * @notifier: notifier block managed by caller. - * - * will register the notifier into a notification chain that gets called - * upon changes to the pm_qos_class target value. - */ -int pm_qos_add_notifier(int pm_qos_class, struct notifier_block *notifier) -{ - int retval; - - retval = blocking_notifier_chain_register( - pm_qos_array[pm_qos_class]->notifiers, notifier); - - return retval; -} -EXPORT_SYMBOL_GPL(pm_qos_add_notifier); - -/** - * pm_qos_remove_notifier - deletes notification entry from chain. - * @pm_qos_class: identifies which qos target changes are notified. - * @notifier: notifier block to be removed. - * - * will remove the notifier from the notification chain that gets called - * upon changes to the pm_qos_class target value. - */ -int pm_qos_remove_notifier(int pm_qos_class, struct notifier_block *notifier) -{ - int retval; - - retval = blocking_notifier_chain_unregister( - pm_qos_array[pm_qos_class]->notifiers, notifier); - - return retval; -} -EXPORT_SYMBOL_GPL(pm_qos_remove_notifier); - -static int pm_qos_power_open(struct inode *inode, struct file *filp) -{ - long pm_qos_class; - - pm_qos_class = find_pm_qos_object_by_minor(iminor(inode)); - if (pm_qos_class >= 0) { - struct pm_qos_request_list *req = kzalloc(sizeof(*req), GFP_KERNEL); - if (!req) - return -ENOMEM; - - pm_qos_add_request(req, pm_qos_class, PM_QOS_DEFAULT_VALUE); - filp->private_data = req; - - if (filp->private_data) - return 0; - } - return -EPERM; -} - -static int pm_qos_power_release(struct inode *inode, struct file *filp) -{ - struct pm_qos_request_list *req; - - req = filp->private_data; - pm_qos_remove_request(req); - kfree(req); - - return 0; -} - - -static ssize_t pm_qos_power_read(struct file *filp, char __user *buf, - size_t count, loff_t *f_pos) -{ - s32 value; - unsigned long flags; - struct pm_qos_object *o; - struct pm_qos_request_list *pm_qos_req = filp->private_data; - - if (!pm_qos_req) - return -EINVAL; - if (!pm_qos_request_active(pm_qos_req)) - return -EINVAL; - - o = pm_qos_array[pm_qos_req->pm_qos_class]; - spin_lock_irqsave(&pm_qos_lock, flags); - value = pm_qos_get_value(o); - spin_unlock_irqrestore(&pm_qos_lock, flags); - - return simple_read_from_buffer(buf, count, f_pos, &value, sizeof(s32)); -} - -static ssize_t pm_qos_power_write(struct file *filp, const char __user *buf, - size_t count, loff_t *f_pos) -{ - s32 value; - struct pm_qos_request_list *pm_qos_req; - - if (count == sizeof(s32)) { - if (copy_from_user(&value, buf, sizeof(s32))) - return -EFAULT; - } else if (count <= 11) { /* ASCII perhaps? */ - char ascii_value[11]; - unsigned long int ulval; - int ret; - - if (copy_from_user(ascii_value, buf, count)) - return -EFAULT; - - if (count > 10) { - if (ascii_value[10] == '\n') - ascii_value[10] = '\0'; - else - return -EINVAL; - } else { - ascii_value[count] = '\0'; - } - ret = strict_strtoul(ascii_value, 16, &ulval); - if (ret) { - pr_debug("%s, 0x%lx, 0x%x\n", ascii_value, ulval, ret); - return -EINVAL; - } - value = (s32)lower_32_bits(ulval); - } else { - return -EINVAL; - } - - pm_qos_req = filp->private_data; - pm_qos_update_request(pm_qos_req, value); - - return count; -} - - -static int __init pm_qos_power_init(void) -{ - int ret = 0; - - ret = register_pm_qos_misc(&cpu_dma_pm_qos); - if (ret < 0) { - printk(KERN_ERR "pm_qos_param: cpu_dma_latency setup failed\n"); - return ret; - } - ret = register_pm_qos_misc(&network_lat_pm_qos); - if (ret < 0) { - printk(KERN_ERR "pm_qos_param: network_latency setup failed\n"); - return ret; - } - ret = register_pm_qos_misc(&network_throughput_pm_qos); - if (ret < 0) - printk(KERN_ERR - "pm_qos_param: network_throughput setup failed\n"); - - return ret; -} - -late_initcall(pm_qos_power_init); diff --git a/kernel/power/Makefile b/kernel/power/Makefile index c5ebc6a90643..ad6bdd8b401a 100644 --- a/kernel/power/Makefile +++ b/kernel/power/Makefile @@ -1,7 +1,7 @@ ccflags-$(CONFIG_PM_DEBUG) := -DDEBUG -obj-$(CONFIG_PM) += main.o +obj-$(CONFIG_PM) += main.o qos.o obj-$(CONFIG_PM_SLEEP) += console.o obj-$(CONFIG_FREEZER) += process.o obj-$(CONFIG_SUSPEND) += suspend.o diff --git a/kernel/power/qos.c b/kernel/power/qos.c new file mode 100644 index 000000000000..61b47384329e --- /dev/null +++ b/kernel/power/qos.c @@ -0,0 +1,481 @@ +/* + * This module exposes the interface to kernel space for specifying + * QoS dependencies. It provides infrastructure for registration of: + * + * Dependents on a QoS value : register requests + * Watchers of QoS value : get notified when target QoS value changes + * + * This QoS design is best effort based. Dependents register their QoS needs. + * Watchers register to keep track of the current QoS needs of the system. + * + * There are 3 basic classes of QoS parameter: latency, timeout, throughput + * each have defined units: + * latency: usec + * timeout: usec <-- currently not used. + * throughput: kbs (kilo byte / sec) + * + * There are lists of pm_qos_objects each one wrapping requests, notifiers + * + * User mode requests on a QOS parameter register themselves to the + * subsystem by opening the device node /dev/... and writing there request to + * the node. As long as the process holds a file handle open to the node the + * client continues to be accounted for. Upon file release the usermode + * request is removed and a new qos target is computed. This way when the + * request that the application has is cleaned up when closes the file + * pointer or exits the pm_qos_object will get an opportunity to clean up. + * + * Mark Gross + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +/* + * locking rule: all changes to requests or notifiers lists + * or pm_qos_object list and pm_qos_objects need to happen with pm_qos_lock + * held, taken with _irqsave. One lock to rule them all + */ +enum pm_qos_type { + PM_QOS_MAX, /* return the largest value */ + PM_QOS_MIN /* return the smallest value */ +}; + +/* + * Note: The lockless read path depends on the CPU accessing + * target_value atomically. Atomic access is only guaranteed on all CPU + * types linux supports for 32 bit quantites + */ +struct pm_qos_object { + struct plist_head requests; + struct blocking_notifier_head *notifiers; + struct miscdevice pm_qos_power_miscdev; + char *name; + s32 target_value; /* Do not change to 64 bit */ + s32 default_value; + enum pm_qos_type type; +}; + +static DEFINE_SPINLOCK(pm_qos_lock); + +static struct pm_qos_object null_pm_qos; +static BLOCKING_NOTIFIER_HEAD(cpu_dma_lat_notifier); +static struct pm_qos_object cpu_dma_pm_qos = { + .requests = PLIST_HEAD_INIT(cpu_dma_pm_qos.requests), + .notifiers = &cpu_dma_lat_notifier, + .name = "cpu_dma_latency", + .target_value = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE, + .default_value = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE, + .type = PM_QOS_MIN, +}; + +static BLOCKING_NOTIFIER_HEAD(network_lat_notifier); +static struct pm_qos_object network_lat_pm_qos = { + .requests = PLIST_HEAD_INIT(network_lat_pm_qos.requests), + .notifiers = &network_lat_notifier, + .name = "network_latency", + .target_value = PM_QOS_NETWORK_LAT_DEFAULT_VALUE, + .default_value = PM_QOS_NETWORK_LAT_DEFAULT_VALUE, + .type = PM_QOS_MIN +}; + + +static BLOCKING_NOTIFIER_HEAD(network_throughput_notifier); +static struct pm_qos_object network_throughput_pm_qos = { + .requests = PLIST_HEAD_INIT(network_throughput_pm_qos.requests), + .notifiers = &network_throughput_notifier, + .name = "network_throughput", + .target_value = PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE, + .default_value = PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE, + .type = PM_QOS_MAX, +}; + + +static struct pm_qos_object *pm_qos_array[] = { + &null_pm_qos, + &cpu_dma_pm_qos, + &network_lat_pm_qos, + &network_throughput_pm_qos +}; + +static ssize_t pm_qos_power_write(struct file *filp, const char __user *buf, + size_t count, loff_t *f_pos); +static ssize_t pm_qos_power_read(struct file *filp, char __user *buf, + size_t count, loff_t *f_pos); +static int pm_qos_power_open(struct inode *inode, struct file *filp); +static int pm_qos_power_release(struct inode *inode, struct file *filp); + +static const struct file_operations pm_qos_power_fops = { + .write = pm_qos_power_write, + .read = pm_qos_power_read, + .open = pm_qos_power_open, + .release = pm_qos_power_release, + .llseek = noop_llseek, +}; + +/* unlocked internal variant */ +static inline int pm_qos_get_value(struct pm_qos_object *o) +{ + if (plist_head_empty(&o->requests)) + return o->default_value; + + switch (o->type) { + case PM_QOS_MIN: + return plist_first(&o->requests)->prio; + + case PM_QOS_MAX: + return plist_last(&o->requests)->prio; + + default: + /* runtime check for not using enum */ + BUG(); + } +} + +static inline s32 pm_qos_read_value(struct pm_qos_object *o) +{ + return o->target_value; +} + +static inline void pm_qos_set_value(struct pm_qos_object *o, s32 value) +{ + o->target_value = value; +} + +static void update_target(struct pm_qos_object *o, struct plist_node *node, + int del, int value) +{ + unsigned long flags; + int prev_value, curr_value; + + spin_lock_irqsave(&pm_qos_lock, flags); + prev_value = pm_qos_get_value(o); + /* PM_QOS_DEFAULT_VALUE is a signal that the value is unchanged */ + if (value != PM_QOS_DEFAULT_VALUE) { + /* + * to change the list, we atomically remove, reinit + * with new value and add, then see if the extremal + * changed + */ + plist_del(node, &o->requests); + plist_node_init(node, value); + plist_add(node, &o->requests); + } else if (del) { + plist_del(node, &o->requests); + } else { + plist_add(node, &o->requests); + } + curr_value = pm_qos_get_value(o); + pm_qos_set_value(o, curr_value); + spin_unlock_irqrestore(&pm_qos_lock, flags); + + if (prev_value != curr_value) + blocking_notifier_call_chain(o->notifiers, + (unsigned long)curr_value, + NULL); +} + +static int register_pm_qos_misc(struct pm_qos_object *qos) +{ + qos->pm_qos_power_miscdev.minor = MISC_DYNAMIC_MINOR; + qos->pm_qos_power_miscdev.name = qos->name; + qos->pm_qos_power_miscdev.fops = &pm_qos_power_fops; + + return misc_register(&qos->pm_qos_power_miscdev); +} + +static int find_pm_qos_object_by_minor(int minor) +{ + int pm_qos_class; + + for (pm_qos_class = 0; + pm_qos_class < PM_QOS_NUM_CLASSES; pm_qos_class++) { + if (minor == + pm_qos_array[pm_qos_class]->pm_qos_power_miscdev.minor) + return pm_qos_class; + } + return -1; +} + +/** + * pm_qos_request - returns current system wide qos expectation + * @pm_qos_class: identification of which qos value is requested + * + * This function returns the current target value. + */ +int pm_qos_request(int pm_qos_class) +{ + return pm_qos_read_value(pm_qos_array[pm_qos_class]); +} +EXPORT_SYMBOL_GPL(pm_qos_request); + +int pm_qos_request_active(struct pm_qos_request_list *req) +{ + return req->pm_qos_class != 0; +} +EXPORT_SYMBOL_GPL(pm_qos_request_active); + +/** + * pm_qos_add_request - inserts new qos request into the list + * @dep: pointer to a preallocated handle + * @pm_qos_class: identifies which list of qos request to use + * @value: defines the qos request + * + * This function inserts a new entry in the pm_qos_class list of requested qos + * performance characteristics. It recomputes the aggregate QoS expectations + * for the pm_qos_class of parameters and initializes the pm_qos_request_list + * handle. Caller needs to save this handle for later use in updates and + * removal. + */ + +void pm_qos_add_request(struct pm_qos_request_list *dep, + int pm_qos_class, s32 value) +{ + struct pm_qos_object *o = pm_qos_array[pm_qos_class]; + int new_value; + + if (pm_qos_request_active(dep)) { + WARN(1, KERN_ERR "pm_qos_add_request() called for already added request\n"); + return; + } + if (value == PM_QOS_DEFAULT_VALUE) + new_value = o->default_value; + else + new_value = value; + plist_node_init(&dep->list, new_value); + dep->pm_qos_class = pm_qos_class; + update_target(o, &dep->list, 0, PM_QOS_DEFAULT_VALUE); +} +EXPORT_SYMBOL_GPL(pm_qos_add_request); + +/** + * pm_qos_update_request - modifies an existing qos request + * @pm_qos_req : handle to list element holding a pm_qos request to use + * @value: defines the qos request + * + * Updates an existing qos request for the pm_qos_class of parameters along + * with updating the target pm_qos_class value. + * + * Attempts are made to make this code callable on hot code paths. + */ +void pm_qos_update_request(struct pm_qos_request_list *pm_qos_req, + s32 new_value) +{ + s32 temp; + struct pm_qos_object *o; + + if (!pm_qos_req) /*guard against callers passing in null */ + return; + + if (!pm_qos_request_active(pm_qos_req)) { + WARN(1, KERN_ERR "pm_qos_update_request() called for unknown object\n"); + return; + } + + o = pm_qos_array[pm_qos_req->pm_qos_class]; + + if (new_value == PM_QOS_DEFAULT_VALUE) + temp = o->default_value; + else + temp = new_value; + + if (temp != pm_qos_req->list.prio) + update_target(o, &pm_qos_req->list, 0, temp); +} +EXPORT_SYMBOL_GPL(pm_qos_update_request); + +/** + * pm_qos_remove_request - modifies an existing qos request + * @pm_qos_req: handle to request list element + * + * Will remove pm qos request from the list of requests and + * recompute the current target value for the pm_qos_class. Call this + * on slow code paths. + */ +void pm_qos_remove_request(struct pm_qos_request_list *pm_qos_req) +{ + struct pm_qos_object *o; + + if (pm_qos_req == NULL) + return; + /* silent return to keep pcm code cleaner */ + + if (!pm_qos_request_active(pm_qos_req)) { + WARN(1, KERN_ERR "pm_qos_remove_request() called for unknown object\n"); + return; + } + + o = pm_qos_array[pm_qos_req->pm_qos_class]; + update_target(o, &pm_qos_req->list, 1, PM_QOS_DEFAULT_VALUE); + memset(pm_qos_req, 0, sizeof(*pm_qos_req)); +} +EXPORT_SYMBOL_GPL(pm_qos_remove_request); + +/** + * pm_qos_add_notifier - sets notification entry for changes to target value + * @pm_qos_class: identifies which qos target changes should be notified. + * @notifier: notifier block managed by caller. + * + * will register the notifier into a notification chain that gets called + * upon changes to the pm_qos_class target value. + */ +int pm_qos_add_notifier(int pm_qos_class, struct notifier_block *notifier) +{ + int retval; + + retval = blocking_notifier_chain_register( + pm_qos_array[pm_qos_class]->notifiers, notifier); + + return retval; +} +EXPORT_SYMBOL_GPL(pm_qos_add_notifier); + +/** + * pm_qos_remove_notifier - deletes notification entry from chain. + * @pm_qos_class: identifies which qos target changes are notified. + * @notifier: notifier block to be removed. + * + * will remove the notifier from the notification chain that gets called + * upon changes to the pm_qos_class target value. + */ +int pm_qos_remove_notifier(int pm_qos_class, struct notifier_block *notifier) +{ + int retval; + + retval = blocking_notifier_chain_unregister( + pm_qos_array[pm_qos_class]->notifiers, notifier); + + return retval; +} +EXPORT_SYMBOL_GPL(pm_qos_remove_notifier); + +static int pm_qos_power_open(struct inode *inode, struct file *filp) +{ + long pm_qos_class; + + pm_qos_class = find_pm_qos_object_by_minor(iminor(inode)); + if (pm_qos_class >= 0) { + struct pm_qos_request_list *req = kzalloc(sizeof(*req), GFP_KERNEL); + if (!req) + return -ENOMEM; + + pm_qos_add_request(req, pm_qos_class, PM_QOS_DEFAULT_VALUE); + filp->private_data = req; + + if (filp->private_data) + return 0; + } + return -EPERM; +} + +static int pm_qos_power_release(struct inode *inode, struct file *filp) +{ + struct pm_qos_request_list *req; + + req = filp->private_data; + pm_qos_remove_request(req); + kfree(req); + + return 0; +} + + +static ssize_t pm_qos_power_read(struct file *filp, char __user *buf, + size_t count, loff_t *f_pos) +{ + s32 value; + unsigned long flags; + struct pm_qos_object *o; + struct pm_qos_request_list *pm_qos_req = filp->private_data; + + if (!pm_qos_req) + return -EINVAL; + if (!pm_qos_request_active(pm_qos_req)) + return -EINVAL; + + o = pm_qos_array[pm_qos_req->pm_qos_class]; + spin_lock_irqsave(&pm_qos_lock, flags); + value = pm_qos_get_value(o); + spin_unlock_irqrestore(&pm_qos_lock, flags); + + return simple_read_from_buffer(buf, count, f_pos, &value, sizeof(s32)); +} + +static ssize_t pm_qos_power_write(struct file *filp, const char __user *buf, + size_t count, loff_t *f_pos) +{ + s32 value; + struct pm_qos_request_list *pm_qos_req; + + if (count == sizeof(s32)) { + if (copy_from_user(&value, buf, sizeof(s32))) + return -EFAULT; + } else if (count <= 11) { /* ASCII perhaps? */ + char ascii_value[11]; + unsigned long int ulval; + int ret; + + if (copy_from_user(ascii_value, buf, count)) + return -EFAULT; + + if (count > 10) { + if (ascii_value[10] == '\n') + ascii_value[10] = '\0'; + else + return -EINVAL; + } else { + ascii_value[count] = '\0'; + } + ret = strict_strtoul(ascii_value, 16, &ulval); + if (ret) { + pr_debug("%s, 0x%lx, 0x%x\n", ascii_value, ulval, ret); + return -EINVAL; + } + value = (s32)lower_32_bits(ulval); + } else { + return -EINVAL; + } + + pm_qos_req = filp->private_data; + pm_qos_update_request(pm_qos_req, value); + + return count; +} + + +static int __init pm_qos_power_init(void) +{ + int ret = 0; + + ret = register_pm_qos_misc(&cpu_dma_pm_qos); + if (ret < 0) { + printk(KERN_ERR "pm_qos_param: cpu_dma_latency setup failed\n"); + return ret; + } + ret = register_pm_qos_misc(&network_lat_pm_qos); + if (ret < 0) { + printk(KERN_ERR "pm_qos_param: network_latency setup failed\n"); + return ret; + } + ret = register_pm_qos_misc(&network_throughput_pm_qos); + if (ret < 0) + printk(KERN_ERR + "pm_qos_param: network_throughput setup failed\n"); + + return ret; +} + +late_initcall(pm_qos_power_init); diff --git a/net/mac80211/main.c b/net/mac80211/main.c index 866f269183cf..bb771e9f15bc 100644 --- a/net/mac80211/main.c +++ b/net/mac80211/main.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/net/mac80211/mlme.c b/net/mac80211/mlme.c index d6470c7fd6ce..9604abc61a59 100644 --- a/net/mac80211/mlme.c +++ b/net/mac80211/mlme.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/net/mac80211/scan.c b/net/mac80211/scan.c index 6f09eca01112..beefb0afefa1 100644 --- a/net/mac80211/scan.c +++ b/net/mac80211/scan.c @@ -14,7 +14,7 @@ #include #include -#include +#include #include #include #include diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c index 1c6be91dfb98..c74e228731ed 100644 --- a/sound/core/pcm_native.c +++ b/sound/core/pcm_native.c @@ -23,7 +23,7 @@ #include #include #include -#include +#include #include #include #include -- cgit v1.2.3 From 0aa2a221696cc8ea20a4cdca01315d3b6b4ecc4d Mon Sep 17 00:00:00 2001 From: "Rafael J. Wysocki" Date: Thu, 25 Aug 2011 15:37:04 +0200 Subject: PM / Domains: Preliminary support for devices with power.irq_safe set The generic PM domains framework currently doesn't work with devices whose power.irq_safe flag is set, because runtime PM callbacks for such devices are run with interrupts disabled and the callbacks provided by the generic PM domains framework use domain mutexes and may sleep. However, such devices very well may belong to power domains on some systems, so the generic PM domains framework should take them into account. For this reason, modify the generic PM domains framework so that the domain .power_off() and .power_on() callbacks are never executed for a domain containing devices with power.irq_safe set, although the .stop_device() and .start_device() callbacks are still run for them. Additionally, introduce a flag allowing the creator of a struct generic_pm_domain object to indicate that its .stop_device() and .start_device() callbacks may be run in interrupt context (might_sleep_if() triggers if that flag is not set and one of those callbacks is run in interrupt context). Signed-off-by: Rafael J. Wysocki --- arch/arm/mach-shmobile/pm-sh7372.c | 1 + drivers/base/power/domain.c | 19 ++++++++++++++++++- include/linux/pm_domain.h | 1 + 3 files changed, 20 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c index 5d35831e4fb1..ac47bfcd287e 100644 --- a/arch/arm/mach-shmobile/pm-sh7372.c +++ b/arch/arm/mach-shmobile/pm-sh7372.c @@ -103,6 +103,7 @@ void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd) pm_genpd_init(genpd, NULL, false); genpd->stop_device = pm_clk_suspend; genpd->start_device = pm_clk_resume; + genpd->dev_irq_safe = true; genpd->active_wakeup = pd_active_wakeup; genpd->power_off = pd_power_down; genpd->power_on = pd_power_up; diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c index 339eb2d9bdda..c2468a7e5b21 100644 --- a/drivers/base/power/domain.c +++ b/drivers/base/power/domain.c @@ -309,7 +309,8 @@ static int pm_genpd_poweroff(struct generic_pm_domain *genpd) not_suspended = 0; list_for_each_entry(pdd, &genpd->dev_list, list_node) - if (pdd->dev->driver && !pm_runtime_suspended(pdd->dev)) + if (pdd->dev->driver && (!pm_runtime_suspended(pdd->dev) + || pdd->dev->power.irq_safe)) not_suspended++; if (not_suspended > genpd->in_progress) @@ -417,12 +418,21 @@ static int pm_genpd_runtime_suspend(struct device *dev) if (IS_ERR(genpd)) return -EINVAL; + might_sleep_if(!genpd->dev_irq_safe); + if (genpd->stop_device) { int ret = genpd->stop_device(dev); if (ret) return ret; } + /* + * If power.irq_safe is set, this routine will be run with interrupts + * off, so it can't use mutexes. + */ + if (dev->power.irq_safe) + return 0; + mutex_lock(&genpd->lock); genpd->in_progress++; pm_genpd_poweroff(genpd); @@ -452,6 +462,12 @@ static int pm_genpd_runtime_resume(struct device *dev) if (IS_ERR(genpd)) return -EINVAL; + might_sleep_if(!genpd->dev_irq_safe); + + /* If power.irq_safe, the PM domain is never powered off. */ + if (dev->power.irq_safe) + goto out; + mutex_lock(&genpd->lock); ret = __pm_genpd_poweron(genpd); if (ret) { @@ -483,6 +499,7 @@ static int pm_genpd_runtime_resume(struct device *dev) wake_up_all(&genpd->status_wait_queue); mutex_unlock(&genpd->lock); + out: if (genpd->start_device) genpd->start_device(dev); diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h index 5cce46c2d926..2538d906bcd1 100644 --- a/include/linux/pm_domain.h +++ b/include/linux/pm_domain.h @@ -42,6 +42,7 @@ struct generic_pm_domain { unsigned int suspended_count; /* System suspend device counter */ unsigned int prepared_count; /* Suspend counter of prepared devices */ bool suspend_power_off; /* Power status before system suspend */ + bool dev_irq_safe; /* Device callbacks are IRQ-safe */ int (*power_off)(struct generic_pm_domain *domain); int (*power_on)(struct generic_pm_domain *domain); int (*start_device)(struct device *dev); -- cgit v1.2.3 From 0e392412f334c80baedb30a29796a256b0d5e629 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Thu, 25 Aug 2011 11:16:01 +0200 Subject: ARM: mxc: convert device creation to use platform_device_register_full MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Greg Kroah-Hartman --- arch/arm/plat-mxc/devices.c | 53 ------------------------- arch/arm/plat-mxc/include/mach/devices-common.h | 16 +++++++- 2 files changed, 14 insertions(+), 55 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/plat-mxc/devices.c index 0d6ed31bdbf2..a34b2ae895f2 100644 --- a/arch/arm/plat-mxc/devices.c +++ b/arch/arm/plat-mxc/devices.c @@ -37,59 +37,6 @@ int __init mxc_register_device(struct platform_device *pdev, void *data) return ret; } -struct platform_device *__init imx_add_platform_device_dmamask( - const char *name, int id, - const struct resource *res, unsigned int num_resources, - const void *data, size_t size_data, u64 dmamask) -{ - int ret = -ENOMEM; - struct platform_device *pdev; - - pdev = platform_device_alloc(name, id); - if (!pdev) - goto err; - - if (dmamask) { - /* - * This memory isn't freed when the device is put, - * I don't have a nice idea for that though. Conceptually - * dma_mask in struct device should not be a pointer. - * See http://thread.gmane.org/gmane.linux.kernel.pci/9081 - */ - pdev->dev.dma_mask = - kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL); - if (!pdev->dev.dma_mask) - /* ret is still -ENOMEM; */ - goto err; - - *pdev->dev.dma_mask = dmamask; - pdev->dev.coherent_dma_mask = dmamask; - } - - if (res) { - ret = platform_device_add_resources(pdev, res, num_resources); - if (ret) - goto err; - } - - if (data) { - ret = platform_device_add_data(pdev, data, size_data); - if (ret) - goto err; - } - - ret = platform_device_add(pdev); - if (ret) { -err: - if (dmamask) - kfree(pdev->dev.dma_mask); - platform_device_put(pdev); - return ERR_PTR(ret); - } - - return pdev; -} - struct device mxc_aips_bus = { .init_name = "mxc_aips", .parent = &platform_bus, diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 524538aabc4b..543525d76a60 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -14,10 +14,22 @@ extern struct device mxc_aips_bus; extern struct device mxc_ahb_bus; -struct platform_device *imx_add_platform_device_dmamask( +static inline struct platform_device *imx_add_platform_device_dmamask( const char *name, int id, const struct resource *res, unsigned int num_resources, - const void *data, size_t size_data, u64 dmamask); + const void *data, size_t size_data, u64 dmamask) +{ + struct platform_device_info pdevinfo = { + .name = name, + .id = id, + .res = res, + .num_res = num_resources, + .data = data, + .size_data = size_data, + .dma_mask = dmamask, + }; + return platform_device_register_full(&pdevinfo); +} static inline struct platform_device *imx_add_platform_device( const char *name, int id, -- cgit v1.2.3 From b3c3dc22366b15350281b1c273adecd2b91e320f Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Sun, 10 Jul 2011 12:22:20 +0300 Subject: usb: musb: fix build breakage This patch fixes the compilation brekage which commits 208466dc ("usb: otg:OMAP4430: Powerdown the internal PHY when USB is disabled") and fb91cde4 ("usb: musb: OMAP4430: Power down the PHY during board init") introduced when building a OMAP2-only kernel. LD .tmp_vmlinux1 arch/arm/mach-omap2/built-in.o:(.data+0x7ce0): undefined reference to +`omap4430_phy_init' arch/arm/mach-omap2/built-in.o:(.data+0x7ce4): undefined reference to +`omap4430_phy_exit' arch/arm/mach-omap2/built-in.o:(.data+0x7ce8): undefined reference to +`omap4430_phy_power' arch/arm/mach-omap2/built-in.o:(.data+0x7cec): undefined reference to +`omap4430_phy_set_clk' arch/arm/mach-omap2/built-in.o:(.data+0x7cf0): undefined reference to +`omap4430_phy_suspend' make: *** [.tmp_vmlinux1] Error 1 Reported-by: Paul Walmsley Signed-off-by: Felipe Balbi --- arch/arm/mach-omap2/Makefile | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index f34336560437..7317a2b39dd1 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -242,14 +242,11 @@ obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o \ obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) += board-omap3touchbook.o \ hsmmc.o obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o \ - hsmmc.o \ - omap_phy_internal.o + hsmmc.o obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o \ - hsmmc.o \ - omap_phy_internal.o + hsmmc.o -obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o \ - omap_phy_internal.o \ +obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o @@ -260,6 +257,8 @@ obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o usbfs-$(CONFIG_ARCH_OMAP_OTG) := usb-fs.o obj-y += $(usbfs-m) $(usbfs-y) obj-y += usb-musb.o +obj-y += omap_phy_internal.o + obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o obj-y += usb-host.o -- cgit v1.2.3 From bd31b85960a7fcb2d7ede216460b8da71a88411c Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 3 Jul 2009 08:44:46 -0500 Subject: locking, ARM: Annotate low level hw locks as raw Annotate the low level hardware locks which must not be preempted. In mainline this change documents the low level nature of the lock - otherwise there's no functional difference. Lockdep and Sparse checking will work as usual. Signed-off-by: Thomas Gleixner Cc: Russell King Signed-off-by: Ingo Molnar --- arch/arm/common/gic.c | 26 +++++++------- arch/arm/include/asm/dma.h | 6 ++-- arch/arm/include/asm/mmu.h | 4 +-- arch/arm/kernel/dma.c | 2 +- arch/arm/kernel/smp.c | 6 ++-- arch/arm/kernel/traps.c | 20 +++++------ arch/arm/mach-footbridge/include/mach/hardware.h | 2 +- arch/arm/mach-footbridge/netwinder-hw.c | 14 ++++---- arch/arm/mach-footbridge/netwinder-leds.c | 10 +++--- arch/arm/mach-integrator/core.c | 6 ++-- arch/arm/mach-integrator/pci_v3.c | 14 ++++---- arch/arm/mach-ixp4xx/common-pci.c | 22 ++++++------ arch/arm/mach-shark/leds.c | 6 ++-- arch/arm/mm/cache-l2x0.c | 46 ++++++++++++------------ arch/arm/mm/context.c | 14 ++++---- arch/arm/mm/copypage-v4mc.c | 6 ++-- arch/arm/mm/copypage-v6.c | 10 +++--- arch/arm/mm/copypage-xscale.c | 6 ++-- 18 files changed, 110 insertions(+), 110 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 3227ca952a12..6fba8bd5689e 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -33,7 +33,7 @@ #include #include -static DEFINE_SPINLOCK(irq_controller_lock); +static DEFINE_RAW_SPINLOCK(irq_controller_lock); /* Address of GIC 0 CPU interface */ void __iomem *gic_cpu_base_addr __read_mostly; @@ -82,30 +82,30 @@ static void gic_mask_irq(struct irq_data *d) { u32 mask = 1 << (d->irq % 32); - spin_lock(&irq_controller_lock); + raw_spin_lock(&irq_controller_lock); writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4); if (gic_arch_extn.irq_mask) gic_arch_extn.irq_mask(d); - spin_unlock(&irq_controller_lock); + raw_spin_unlock(&irq_controller_lock); } static void gic_unmask_irq(struct irq_data *d) { u32 mask = 1 << (d->irq % 32); - spin_lock(&irq_controller_lock); + raw_spin_lock(&irq_controller_lock); if (gic_arch_extn.irq_unmask) gic_arch_extn.irq_unmask(d); writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4); - spin_unlock(&irq_controller_lock); + raw_spin_unlock(&irq_controller_lock); } static void gic_eoi_irq(struct irq_data *d) { if (gic_arch_extn.irq_eoi) { - spin_lock(&irq_controller_lock); + raw_spin_lock(&irq_controller_lock); gic_arch_extn.irq_eoi(d); - spin_unlock(&irq_controller_lock); + raw_spin_unlock(&irq_controller_lock); } writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI); @@ -129,7 +129,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type) if (type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_EDGE_RISING) return -EINVAL; - spin_lock(&irq_controller_lock); + raw_spin_lock(&irq_controller_lock); if (gic_arch_extn.irq_set_type) gic_arch_extn.irq_set_type(d, type); @@ -154,7 +154,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type) if (enabled) writel_relaxed(enablemask, base + GIC_DIST_ENABLE_SET + enableoff); - spin_unlock(&irq_controller_lock); + raw_spin_unlock(&irq_controller_lock); return 0; } @@ -182,10 +182,10 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, mask = 0xff << shift; bit = 1 << (cpu + shift); - spin_lock(&irq_controller_lock); + raw_spin_lock(&irq_controller_lock); val = readl_relaxed(reg) & ~mask; writel_relaxed(val | bit, reg); - spin_unlock(&irq_controller_lock); + raw_spin_unlock(&irq_controller_lock); return IRQ_SET_MASK_OK; } @@ -215,9 +215,9 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) chained_irq_enter(chip, desc); - spin_lock(&irq_controller_lock); + raw_spin_lock(&irq_controller_lock); status = readl_relaxed(chip_data->cpu_base + GIC_CPU_INTACK); - spin_unlock(&irq_controller_lock); + raw_spin_unlock(&irq_controller_lock); gic_irq = (status & 0x3ff); if (gic_irq == 1023) diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h index 628670e9d7c9..69a5b0b6455c 100644 --- a/arch/arm/include/asm/dma.h +++ b/arch/arm/include/asm/dma.h @@ -34,18 +34,18 @@ #define DMA_MODE_CASCADE 0xc0 #define DMA_AUTOINIT 0x10 -extern spinlock_t dma_spin_lock; +extern raw_spinlock_t dma_spin_lock; static inline unsigned long claim_dma_lock(void) { unsigned long flags; - spin_lock_irqsave(&dma_spin_lock, flags); + raw_spin_lock_irqsave(&dma_spin_lock, flags); return flags; } static inline void release_dma_lock(unsigned long flags) { - spin_unlock_irqrestore(&dma_spin_lock, flags); + raw_spin_unlock_irqrestore(&dma_spin_lock, flags); } /* Clear the 'DMA Pointer Flip Flop'. diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h index b4ffe9d5b526..14965658a923 100644 --- a/arch/arm/include/asm/mmu.h +++ b/arch/arm/include/asm/mmu.h @@ -6,7 +6,7 @@ typedef struct { #ifdef CONFIG_CPU_HAS_ASID unsigned int id; - spinlock_t id_lock; + raw_spinlock_t id_lock; #endif unsigned int kvm_seq; } mm_context_t; @@ -16,7 +16,7 @@ typedef struct { /* init_mm.context.id_lock should be initialized. */ #define INIT_MM_CONTEXT(name) \ - .context.id_lock = __SPIN_LOCK_UNLOCKED(name.context.id_lock), + .context.id_lock = __RAW_SPIN_LOCK_UNLOCKED(name.context.id_lock), #else #define ASID(mm) (0) #endif diff --git a/arch/arm/kernel/dma.c b/arch/arm/kernel/dma.c index 2c4a185f92cd..7b829d9663b1 100644 --- a/arch/arm/kernel/dma.c +++ b/arch/arm/kernel/dma.c @@ -23,7 +23,7 @@ #include -DEFINE_SPINLOCK(dma_spin_lock); +DEFINE_RAW_SPINLOCK(dma_spin_lock); EXPORT_SYMBOL(dma_spin_lock); static dma_t *dma_chan[MAX_DMA_CHANNELS]; diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index d88ff0230e82..4e76e0cf09fb 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -538,7 +538,7 @@ static void percpu_timer_stop(void) } #endif -static DEFINE_SPINLOCK(stop_lock); +static DEFINE_RAW_SPINLOCK(stop_lock); /* * ipi_cpu_stop - handle IPI from smp_send_stop() @@ -547,10 +547,10 @@ static void ipi_cpu_stop(unsigned int cpu) { if (system_state == SYSTEM_BOOTING || system_state == SYSTEM_RUNNING) { - spin_lock(&stop_lock); + raw_spin_lock(&stop_lock); printk(KERN_CRIT "CPU%u: stopping\n", cpu); dump_stack(); - spin_unlock(&stop_lock); + raw_spin_unlock(&stop_lock); } set_cpu_online(cpu, false); diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index bc9f9da782cb..81cc05a0274c 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -255,7 +255,7 @@ static int __die(const char *str, int err, struct thread_info *thread, struct pt return ret; } -static DEFINE_SPINLOCK(die_lock); +static DEFINE_RAW_SPINLOCK(die_lock); /* * This function is protected against re-entrancy. @@ -267,7 +267,7 @@ void die(const char *str, struct pt_regs *regs, int err) oops_enter(); - spin_lock_irq(&die_lock); + raw_spin_lock_irq(&die_lock); console_verbose(); bust_spinlocks(1); ret = __die(str, err, thread, regs); @@ -277,7 +277,7 @@ void die(const char *str, struct pt_regs *regs, int err) bust_spinlocks(0); add_taint(TAINT_DIE); - spin_unlock_irq(&die_lock); + raw_spin_unlock_irq(&die_lock); oops_exit(); if (in_interrupt()) @@ -302,24 +302,24 @@ void arm_notify_die(const char *str, struct pt_regs *regs, } static LIST_HEAD(undef_hook); -static DEFINE_SPINLOCK(undef_lock); +static DEFINE_RAW_SPINLOCK(undef_lock); void register_undef_hook(struct undef_hook *hook) { unsigned long flags; - spin_lock_irqsave(&undef_lock, flags); + raw_spin_lock_irqsave(&undef_lock, flags); list_add(&hook->node, &undef_hook); - spin_unlock_irqrestore(&undef_lock, flags); + raw_spin_unlock_irqrestore(&undef_lock, flags); } void unregister_undef_hook(struct undef_hook *hook) { unsigned long flags; - spin_lock_irqsave(&undef_lock, flags); + raw_spin_lock_irqsave(&undef_lock, flags); list_del(&hook->node); - spin_unlock_irqrestore(&undef_lock, flags); + raw_spin_unlock_irqrestore(&undef_lock, flags); } static int call_undef_hook(struct pt_regs *regs, unsigned int instr) @@ -328,12 +328,12 @@ static int call_undef_hook(struct pt_regs *regs, unsigned int instr) unsigned long flags; int (*fn)(struct pt_regs *regs, unsigned int instr) = NULL; - spin_lock_irqsave(&undef_lock, flags); + raw_spin_lock_irqsave(&undef_lock, flags); list_for_each_entry(hook, &undef_hook, node) if ((instr & hook->instr_mask) == hook->instr_val && (regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val) fn = hook->fn; - spin_unlock_irqrestore(&undef_lock, flags); + raw_spin_unlock_irqrestore(&undef_lock, flags); return fn ? fn(regs, instr) : 1; } diff --git a/arch/arm/mach-footbridge/include/mach/hardware.h b/arch/arm/mach-footbridge/include/mach/hardware.h index 15d54981674c..e3d6ccac2162 100644 --- a/arch/arm/mach-footbridge/include/mach/hardware.h +++ b/arch/arm/mach-footbridge/include/mach/hardware.h @@ -93,7 +93,7 @@ #define CPLD_FLASH_WR_ENABLE 1 #ifndef __ASSEMBLY__ -extern spinlock_t nw_gpio_lock; +extern raw_spinlock_t nw_gpio_lock; extern void nw_gpio_modify_op(unsigned int mask, unsigned int set); extern void nw_gpio_modify_io(unsigned int mask, unsigned int in); extern unsigned int nw_gpio_read(void); diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c index 06e514f372d0..5b73190feb3a 100644 --- a/arch/arm/mach-footbridge/netwinder-hw.c +++ b/arch/arm/mach-footbridge/netwinder-hw.c @@ -68,7 +68,7 @@ static inline void wb977_ww(int reg, int val) /* * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE */ -DEFINE_SPINLOCK(nw_gpio_lock); +DEFINE_RAW_SPINLOCK(nw_gpio_lock); EXPORT_SYMBOL(nw_gpio_lock); static unsigned int current_gpio_op; @@ -327,9 +327,9 @@ static inline void wb977_init_gpio(void) /* * Set Group1/Group2 outputs */ - spin_lock_irqsave(&nw_gpio_lock, flags); + raw_spin_lock_irqsave(&nw_gpio_lock, flags); nw_gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN); - spin_unlock_irqrestore(&nw_gpio_lock, flags); + raw_spin_unlock_irqrestore(&nw_gpio_lock, flags); } /* @@ -390,9 +390,9 @@ static void __init cpld_init(void) { unsigned long flags; - spin_lock_irqsave(&nw_gpio_lock, flags); + raw_spin_lock_irqsave(&nw_gpio_lock, flags); nw_cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE); - spin_unlock_irqrestore(&nw_gpio_lock, flags); + raw_spin_unlock_irqrestore(&nw_gpio_lock, flags); } static unsigned char rwa_unlock[] __initdata = @@ -616,9 +616,9 @@ static int __init nw_hw_init(void) cpld_init(); rwa010_init(); - spin_lock_irqsave(&nw_gpio_lock, flags); + raw_spin_lock_irqsave(&nw_gpio_lock, flags); nw_gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS); - spin_unlock_irqrestore(&nw_gpio_lock, flags); + raw_spin_unlock_irqrestore(&nw_gpio_lock, flags); } return 0; } diff --git a/arch/arm/mach-footbridge/netwinder-leds.c b/arch/arm/mach-footbridge/netwinder-leds.c index 00269fe0be8a..e57102e871fc 100644 --- a/arch/arm/mach-footbridge/netwinder-leds.c +++ b/arch/arm/mach-footbridge/netwinder-leds.c @@ -31,13 +31,13 @@ static char led_state; static char hw_led_state; -static DEFINE_SPINLOCK(leds_lock); +static DEFINE_RAW_SPINLOCK(leds_lock); static void netwinder_leds_event(led_event_t evt) { unsigned long flags; - spin_lock_irqsave(&leds_lock, flags); + raw_spin_lock_irqsave(&leds_lock, flags); switch (evt) { case led_start: @@ -117,12 +117,12 @@ static void netwinder_leds_event(led_event_t evt) break; } - spin_unlock_irqrestore(&leds_lock, flags); + raw_spin_unlock_irqrestore(&leds_lock, flags); if (led_state & LED_STATE_ENABLED) { - spin_lock_irqsave(&nw_gpio_lock, flags); + raw_spin_lock_irqsave(&nw_gpio_lock, flags); nw_gpio_modify_op(GPIO_RED_LED | GPIO_GREEN_LED, hw_led_state); - spin_unlock_irqrestore(&nw_gpio_lock, flags); + raw_spin_unlock_irqrestore(&nw_gpio_lock, flags); } } diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index 77315b995681..0c20cf638575 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c @@ -205,7 +205,7 @@ static struct amba_pl010_data integrator_uart_data = { #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL) -static DEFINE_SPINLOCK(cm_lock); +static DEFINE_RAW_SPINLOCK(cm_lock); /** * cm_control - update the CM_CTRL register. @@ -217,10 +217,10 @@ void cm_control(u32 mask, u32 set) unsigned long flags; u32 val; - spin_lock_irqsave(&cm_lock, flags); + raw_spin_lock_irqsave(&cm_lock, flags); val = readl(CM_CTRL) & ~mask; writel(val | set, CM_CTRL); - spin_unlock_irqrestore(&cm_lock, flags); + raw_spin_unlock_irqrestore(&cm_lock, flags); } EXPORT_SYMBOL(cm_control); diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index dd56bfb351e3..56c30622d239 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c @@ -164,7 +164,7 @@ * 7:2 register number * */ -static DEFINE_SPINLOCK(v3_lock); +static DEFINE_RAW_SPINLOCK(v3_lock); #define PCI_BUS_NONMEM_START 0x00000000 #define PCI_BUS_NONMEM_SIZE SZ_256M @@ -285,7 +285,7 @@ static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where, unsigned long flags; u32 v; - spin_lock_irqsave(&v3_lock, flags); + raw_spin_lock_irqsave(&v3_lock, flags); addr = v3_open_config_window(bus, devfn, where); switch (size) { @@ -303,7 +303,7 @@ static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where, } v3_close_config_window(); - spin_unlock_irqrestore(&v3_lock, flags); + raw_spin_unlock_irqrestore(&v3_lock, flags); *val = v; return PCIBIOS_SUCCESSFUL; @@ -315,7 +315,7 @@ static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where, unsigned long addr; unsigned long flags; - spin_lock_irqsave(&v3_lock, flags); + raw_spin_lock_irqsave(&v3_lock, flags); addr = v3_open_config_window(bus, devfn, where); switch (size) { @@ -336,7 +336,7 @@ static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where, } v3_close_config_window(); - spin_unlock_irqrestore(&v3_lock, flags); + raw_spin_unlock_irqrestore(&v3_lock, flags); return PCIBIOS_SUCCESSFUL; } @@ -515,7 +515,7 @@ void __init pci_v3_preinit(void) hook_fault_code(8, v3_pci_fault, SIGBUS, 0, "external abort on non-linefetch"); hook_fault_code(10, v3_pci_fault, SIGBUS, 0, "external abort on non-linefetch"); - spin_lock_irqsave(&v3_lock, flags); + raw_spin_lock_irqsave(&v3_lock, flags); /* * Unlock V3 registers, but only if they were previously locked. @@ -588,7 +588,7 @@ void __init pci_v3_preinit(void) printk(KERN_ERR "PCI: unable to grab PCI error " "interrupt: %d\n", ret); - spin_unlock_irqrestore(&v3_lock, flags); + raw_spin_unlock_irqrestore(&v3_lock, flags); } void __init pci_v3_postinit(void) diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 2131832ee6ba..1b5fe8705757 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c @@ -54,7 +54,7 @@ unsigned long ixp4xx_pci_reg_base = 0; * these transactions are atomic or we will end up * with corrupt data on the bus or in a driver. */ -static DEFINE_SPINLOCK(ixp4xx_pci_lock); +static DEFINE_RAW_SPINLOCK(ixp4xx_pci_lock); /* * Read from PCI config space @@ -62,10 +62,10 @@ static DEFINE_SPINLOCK(ixp4xx_pci_lock); static void crp_read(u32 ad_cbe, u32 *data) { unsigned long flags; - spin_lock_irqsave(&ixp4xx_pci_lock, flags); + raw_spin_lock_irqsave(&ixp4xx_pci_lock, flags); *PCI_CRP_AD_CBE = ad_cbe; *data = *PCI_CRP_RDATA; - spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); + raw_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); } /* @@ -74,10 +74,10 @@ static void crp_read(u32 ad_cbe, u32 *data) static void crp_write(u32 ad_cbe, u32 data) { unsigned long flags; - spin_lock_irqsave(&ixp4xx_pci_lock, flags); + raw_spin_lock_irqsave(&ixp4xx_pci_lock, flags); *PCI_CRP_AD_CBE = CRP_AD_CBE_WRITE | ad_cbe; *PCI_CRP_WDATA = data; - spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); + raw_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); } static inline int check_master_abort(void) @@ -101,7 +101,7 @@ int ixp4xx_pci_read_errata(u32 addr, u32 cmd, u32* data) int retval = 0; int i; - spin_lock_irqsave(&ixp4xx_pci_lock, flags); + raw_spin_lock_irqsave(&ixp4xx_pci_lock, flags); *PCI_NP_AD = addr; @@ -118,7 +118,7 @@ int ixp4xx_pci_read_errata(u32 addr, u32 cmd, u32* data) if(check_master_abort()) retval = 1; - spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); + raw_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); return retval; } @@ -127,7 +127,7 @@ int ixp4xx_pci_read_no_errata(u32 addr, u32 cmd, u32* data) unsigned long flags; int retval = 0; - spin_lock_irqsave(&ixp4xx_pci_lock, flags); + raw_spin_lock_irqsave(&ixp4xx_pci_lock, flags); *PCI_NP_AD = addr; @@ -140,7 +140,7 @@ int ixp4xx_pci_read_no_errata(u32 addr, u32 cmd, u32* data) if(check_master_abort()) retval = 1; - spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); + raw_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); return retval; } @@ -149,7 +149,7 @@ int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data) unsigned long flags; int retval = 0; - spin_lock_irqsave(&ixp4xx_pci_lock, flags); + raw_spin_lock_irqsave(&ixp4xx_pci_lock, flags); *PCI_NP_AD = addr; @@ -162,7 +162,7 @@ int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data) if(check_master_abort()) retval = 1; - spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); + raw_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags); return retval; } diff --git a/arch/arm/mach-shark/leds.c b/arch/arm/mach-shark/leds.c index c9e32de4adf9..ccd49189bbd0 100644 --- a/arch/arm/mach-shark/leds.c +++ b/arch/arm/mach-shark/leds.c @@ -36,7 +36,7 @@ static char led_state; static short hw_led_state; static short saved_state; -static DEFINE_SPINLOCK(leds_lock); +static DEFINE_RAW_SPINLOCK(leds_lock); short sequoia_read(int addr) { outw(addr,0x24); @@ -52,7 +52,7 @@ static void sequoia_leds_event(led_event_t evt) { unsigned long flags; - spin_lock_irqsave(&leds_lock, flags); + raw_spin_lock_irqsave(&leds_lock, flags); hw_led_state = sequoia_read(0x09); @@ -144,7 +144,7 @@ static void sequoia_leds_event(led_event_t evt) if (led_state & LED_STATE_ENABLED) sequoia_write(hw_led_state,0x09); - spin_unlock_irqrestore(&leds_lock, flags); + raw_spin_unlock_irqrestore(&leds_lock, flags); } static int __init leds_init(void) diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 9ecfdb511951..3255c51e3e35 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -26,7 +26,7 @@ #define CACHE_LINE_SIZE 32 static void __iomem *l2x0_base; -static DEFINE_SPINLOCK(l2x0_lock); +static DEFINE_RAW_SPINLOCK(l2x0_lock); static uint32_t l2x0_way_mask; /* Bitmask of active ways */ static uint32_t l2x0_size; @@ -115,9 +115,9 @@ static void l2x0_cache_sync(void) { unsigned long flags; - spin_lock_irqsave(&l2x0_lock, flags); + raw_spin_lock_irqsave(&l2x0_lock, flags); cache_sync(); - spin_unlock_irqrestore(&l2x0_lock, flags); + raw_spin_unlock_irqrestore(&l2x0_lock, flags); } static void __l2x0_flush_all(void) @@ -134,9 +134,9 @@ static void l2x0_flush_all(void) unsigned long flags; /* clean all ways */ - spin_lock_irqsave(&l2x0_lock, flags); + raw_spin_lock_irqsave(&l2x0_lock, flags); __l2x0_flush_all(); - spin_unlock_irqrestore(&l2x0_lock, flags); + raw_spin_unlock_irqrestore(&l2x0_lock, flags); } static void l2x0_clean_all(void) @@ -144,11 +144,11 @@ static void l2x0_clean_all(void) unsigned long flags; /* clean all ways */ - spin_lock_irqsave(&l2x0_lock, flags); + raw_spin_lock_irqsave(&l2x0_lock, flags); writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_WAY); cache_wait_way(l2x0_base + L2X0_CLEAN_WAY, l2x0_way_mask); cache_sync(); - spin_unlock_irqrestore(&l2x0_lock, flags); + raw_spin_unlock_irqrestore(&l2x0_lock, flags); } static void l2x0_inv_all(void) @@ -156,13 +156,13 @@ static void l2x0_inv_all(void) unsigned long flags; /* invalidate all ways */ - spin_lock_irqsave(&l2x0_lock, flags); + raw_spin_lock_irqsave(&l2x0_lock, flags); /* Invalidating when L2 is enabled is a nono */ BUG_ON(readl(l2x0_base + L2X0_CTRL) & 1); writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY); cache_wait_way(l2x0_base + L2X0_INV_WAY, l2x0_way_mask); cache_sync(); - spin_unlock_irqrestore(&l2x0_lock, flags); + raw_spin_unlock_irqrestore(&l2x0_lock, flags); } static void l2x0_inv_range(unsigned long start, unsigned long end) @@ -170,7 +170,7 @@ static void l2x0_inv_range(unsigned long start, unsigned long end) void __iomem *base = l2x0_base; unsigned long flags; - spin_lock_irqsave(&l2x0_lock, flags); + raw_spin_lock_irqsave(&l2x0_lock, flags); if (start & (CACHE_LINE_SIZE - 1)) { start &= ~(CACHE_LINE_SIZE - 1); debug_writel(0x03); @@ -195,13 +195,13 @@ static void l2x0_inv_range(unsigned long start, unsigned long end) } if (blk_end < end) { - spin_unlock_irqrestore(&l2x0_lock, flags); - spin_lock_irqsave(&l2x0_lock, flags); + raw_spin_unlock_irqrestore(&l2x0_lock, flags); + raw_spin_lock_irqsave(&l2x0_lock, flags); } } cache_wait(base + L2X0_INV_LINE_PA, 1); cache_sync(); - spin_unlock_irqrestore(&l2x0_lock, flags); + raw_spin_unlock_irqrestore(&l2x0_lock, flags); } static void l2x0_clean_range(unsigned long start, unsigned long end) @@ -214,7 +214,7 @@ static void l2x0_clean_range(unsigned long start, unsigned long end) return; } - spin_lock_irqsave(&l2x0_lock, flags); + raw_spin_lock_irqsave(&l2x0_lock, flags); start &= ~(CACHE_LINE_SIZE - 1); while (start < end) { unsigned long blk_end = start + min(end - start, 4096UL); @@ -225,13 +225,13 @@ static void l2x0_clean_range(unsigned long start, unsigned long end) } if (blk_end < end) { - spin_unlock_irqrestore(&l2x0_lock, flags); - spin_lock_irqsave(&l2x0_lock, flags); + raw_spin_unlock_irqrestore(&l2x0_lock, flags); + raw_spin_lock_irqsave(&l2x0_lock, flags); } } cache_wait(base + L2X0_CLEAN_LINE_PA, 1); cache_sync(); - spin_unlock_irqrestore(&l2x0_lock, flags); + raw_spin_unlock_irqrestore(&l2x0_lock, flags); } static void l2x0_flush_range(unsigned long start, unsigned long end) @@ -244,7 +244,7 @@ static void l2x0_flush_range(unsigned long start, unsigned long end) return; } - spin_lock_irqsave(&l2x0_lock, flags); + raw_spin_lock_irqsave(&l2x0_lock, flags); start &= ~(CACHE_LINE_SIZE - 1); while (start < end) { unsigned long blk_end = start + min(end - start, 4096UL); @@ -257,24 +257,24 @@ static void l2x0_flush_range(unsigned long start, unsigned long end) debug_writel(0x00); if (blk_end < end) { - spin_unlock_irqrestore(&l2x0_lock, flags); - spin_lock_irqsave(&l2x0_lock, flags); + raw_spin_unlock_irqrestore(&l2x0_lock, flags); + raw_spin_lock_irqsave(&l2x0_lock, flags); } } cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1); cache_sync(); - spin_unlock_irqrestore(&l2x0_lock, flags); + raw_spin_unlock_irqrestore(&l2x0_lock, flags); } static void l2x0_disable(void) { unsigned long flags; - spin_lock_irqsave(&l2x0_lock, flags); + raw_spin_lock_irqsave(&l2x0_lock, flags); __l2x0_flush_all(); writel_relaxed(0, l2x0_base + L2X0_CTRL); dsb(); - spin_unlock_irqrestore(&l2x0_lock, flags); + raw_spin_unlock_irqrestore(&l2x0_lock, flags); } static void __init l2x0_unlock(__u32 cache_id) diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c index b0ee9ba3cfab..93aac068da94 100644 --- a/arch/arm/mm/context.c +++ b/arch/arm/mm/context.c @@ -16,7 +16,7 @@ #include #include -static DEFINE_SPINLOCK(cpu_asid_lock); +static DEFINE_RAW_SPINLOCK(cpu_asid_lock); unsigned int cpu_last_asid = ASID_FIRST_VERSION; #ifdef CONFIG_SMP DEFINE_PER_CPU(struct mm_struct *, current_mm); @@ -31,7 +31,7 @@ DEFINE_PER_CPU(struct mm_struct *, current_mm); void __init_new_context(struct task_struct *tsk, struct mm_struct *mm) { mm->context.id = 0; - spin_lock_init(&mm->context.id_lock); + raw_spin_lock_init(&mm->context.id_lock); } static void flush_context(void) @@ -58,7 +58,7 @@ static void set_mm_context(struct mm_struct *mm, unsigned int asid) * the broadcast. This function is also called via IPI so the * mm->context.id_lock has to be IRQ-safe. */ - spin_lock_irqsave(&mm->context.id_lock, flags); + raw_spin_lock_irqsave(&mm->context.id_lock, flags); if (likely((mm->context.id ^ cpu_last_asid) >> ASID_BITS)) { /* * Old version of ASID found. Set the new one and @@ -67,7 +67,7 @@ static void set_mm_context(struct mm_struct *mm, unsigned int asid) mm->context.id = asid; cpumask_clear(mm_cpumask(mm)); } - spin_unlock_irqrestore(&mm->context.id_lock, flags); + raw_spin_unlock_irqrestore(&mm->context.id_lock, flags); /* * Set the mm_cpumask(mm) bit for the current CPU. @@ -117,7 +117,7 @@ void __new_context(struct mm_struct *mm) { unsigned int asid; - spin_lock(&cpu_asid_lock); + raw_spin_lock(&cpu_asid_lock); #ifdef CONFIG_SMP /* * Check the ASID again, in case the change was broadcast from @@ -125,7 +125,7 @@ void __new_context(struct mm_struct *mm) */ if (unlikely(((mm->context.id ^ cpu_last_asid) >> ASID_BITS) == 0)) { cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm)); - spin_unlock(&cpu_asid_lock); + raw_spin_unlock(&cpu_asid_lock); return; } #endif @@ -153,5 +153,5 @@ void __new_context(struct mm_struct *mm) } set_mm_context(mm, asid); - spin_unlock(&cpu_asid_lock); + raw_spin_unlock(&cpu_asid_lock); } diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c index b8061519ce77..7d0a8c230342 100644 --- a/arch/arm/mm/copypage-v4mc.c +++ b/arch/arm/mm/copypage-v4mc.c @@ -30,7 +30,7 @@ #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \ L_PTE_MT_MINICACHE) -static DEFINE_SPINLOCK(minicache_lock); +static DEFINE_RAW_SPINLOCK(minicache_lock); /* * ARMv4 mini-dcache optimised copy_user_highpage @@ -76,14 +76,14 @@ void v4_mc_copy_user_highpage(struct page *to, struct page *from, if (!test_and_set_bit(PG_dcache_clean, &from->flags)) __flush_dcache_page(page_mapping(from), from); - spin_lock(&minicache_lock); + raw_spin_lock(&minicache_lock); set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(page_to_pfn(from), minicache_pgprot), 0); flush_tlb_kernel_page(0xffff8000); mc_copy_user_page((void *)0xffff8000, kto); - spin_unlock(&minicache_lock); + raw_spin_unlock(&minicache_lock); kunmap_atomic(kto, KM_USER1); } diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c index 63cca0097130..3d9a1552cef6 100644 --- a/arch/arm/mm/copypage-v6.c +++ b/arch/arm/mm/copypage-v6.c @@ -27,7 +27,7 @@ #define from_address (0xffff8000) #define to_address (0xffffc000) -static DEFINE_SPINLOCK(v6_lock); +static DEFINE_RAW_SPINLOCK(v6_lock); /* * Copy the user page. No aliasing to deal with so we can just @@ -88,7 +88,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to, * Now copy the page using the same cache colour as the * pages ultimate destination. */ - spin_lock(&v6_lock); + raw_spin_lock(&v6_lock); set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0); set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0); @@ -101,7 +101,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to, copy_page((void *)kto, (void *)kfrom); - spin_unlock(&v6_lock); + raw_spin_unlock(&v6_lock); } /* @@ -121,13 +121,13 @@ static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vad * Now clear the page using the same cache colour as * the pages ultimate destination. */ - spin_lock(&v6_lock); + raw_spin_lock(&v6_lock); set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(page), PAGE_KERNEL), 0); flush_tlb_kernel_page(to); clear_page((void *)to); - spin_unlock(&v6_lock); + raw_spin_unlock(&v6_lock); } struct cpu_user_fns v6_user_fns __initdata = { diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c index 649bbcd325bf..610c24ced310 100644 --- a/arch/arm/mm/copypage-xscale.c +++ b/arch/arm/mm/copypage-xscale.c @@ -32,7 +32,7 @@ #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \ L_PTE_MT_MINICACHE) -static DEFINE_SPINLOCK(minicache_lock); +static DEFINE_RAW_SPINLOCK(minicache_lock); /* * XScale mini-dcache optimised copy_user_highpage @@ -98,14 +98,14 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from, if (!test_and_set_bit(PG_dcache_clean, &from->flags)) __flush_dcache_page(page_mapping(from), from); - spin_lock(&minicache_lock); + raw_spin_lock(&minicache_lock); set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(page_to_pfn(from), minicache_pgprot), 0); flush_tlb_kernel_page(COPYPAGE_MINICACHE); mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto); - spin_unlock(&minicache_lock); + raw_spin_unlock(&minicache_lock); kunmap_atomic(kto, KM_USER1); } -- cgit v1.2.3 From fb914ebff5d0c4cf4e9ff16974057e07f82805c7 Mon Sep 17 00:00:00 2001 From: Vitaliy Ivanov Date: Thu, 23 Jun 2011 20:01:55 +0300 Subject: treewide: typo 'interrrupt' word corrections. Signed-off-by: Justin P. Mattock Signed-off-by: Vitaliy Ivanov Signed-off-by: Jiri Kosina --- arch/arm/mach-omap2/smartreflex.c | 2 +- arch/powerpc/platforms/embedded6xx/storcenter.c | 2 +- drivers/net/arm/ks8695net.c | 2 +- drivers/net/atlx/atl1.c | 2 +- drivers/net/bnx2.h | 12 ++++++------ drivers/net/sky2.c | 2 +- drivers/net/wireless/rtlwifi/pci.c | 6 +++--- drivers/tty/serial/mrst_max3110.c | 2 +- drivers/usb/gadget/langwell_udc.c | 2 +- drivers/usb/gadget/net2280.c | 2 +- drivers/usb/musb/musb_gadget.c | 2 +- 11 files changed, 18 insertions(+), 18 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 2ce2fb7664bc..f56b1bd41f28 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c @@ -247,7 +247,7 @@ static void sr_stop_vddautocomp(struct omap_sr *sr) * driver register and sr device intializtion API's. Only one call * will ultimately succeed. * - * Currently this function registers interrrupt handler for a particular SR + * Currently this function registers interrupt handler for a particular SR * if smartreflex class driver is already registered and has * requested for interrupts and the SR interrupt line in present. */ diff --git a/arch/powerpc/platforms/embedded6xx/storcenter.c b/arch/powerpc/platforms/embedded6xx/storcenter.c index 613070e9ddbe..f1eebcae9bf0 100644 --- a/arch/powerpc/platforms/embedded6xx/storcenter.c +++ b/arch/powerpc/platforms/embedded6xx/storcenter.c @@ -77,7 +77,7 @@ static void __init storcenter_setup_arch(void) } /* - * Interrupt setup and service. Interrrupts on the turbostation come + * Interrupt setup and service. Interrupts on the turbostation come * from the four PCI slots plus onboard 8241 devices: I2C, DUART. */ static void __init storcenter_init_IRQ(void) diff --git a/drivers/net/arm/ks8695net.c b/drivers/net/arm/ks8695net.c index c827a6097d02..8d0baeceaaa3 100644 --- a/drivers/net/arm/ks8695net.c +++ b/drivers/net/arm/ks8695net.c @@ -414,7 +414,7 @@ ks8695_tx_irq(int irq, void *dev_id) * Interrupt Status Register (Offset 0xF208) * Bit29: WAN MAC Receive Status * Bit16: LAN MAC Receive Status - * So, this Rx interrrupt enable/status bit number is equal + * So, this Rx interrupt enable/status bit number is equal * as Rx IRQ number. */ static inline u32 ks8695_get_rx_enable_bit(struct ks8695_priv *ksp) diff --git a/drivers/net/atlx/atl1.c b/drivers/net/atlx/atl1.c index 6f0e9403004b..c346e65e51ef 100644 --- a/drivers/net/atlx/atl1.c +++ b/drivers/net/atlx/atl1.c @@ -858,7 +858,7 @@ static s32 atl1_init_hw(struct atl1_hw *hw) atl1_init_flash_opcode(hw); if (!hw->phy_configured) { - /* enable GPHY LinkChange Interrrupt */ + /* enable GPHY LinkChange Interrupt */ ret_val = atl1_write_phy_reg(hw, 18, 0xC00); if (ret_val) return ret_val; diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index fc50d4267df8..99d31a7d6aaa 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h @@ -5617,7 +5617,7 @@ struct l2_fhdr { #define BNX2_TXP_CPU_STATE_FIO_ABORT_HALTED (1L<<8) #define BNX2_TXP_CPU_STATE_SOFT_HALTED (1L<<10) #define BNX2_TXP_CPU_STATE_SPAD_UNDERFLOW (1L<<11) -#define BNX2_TXP_CPU_STATE_INTERRRUPT (1L<<12) +#define BNX2_TXP_CPU_STATE_INTERRUPT (1L<<12) #define BNX2_TXP_CPU_STATE_DATA_ACCESS_STALL (1L<<14) #define BNX2_TXP_CPU_STATE_INST_FETCH_STALL (1L<<15) #define BNX2_TXP_CPU_STATE_BLOCKED_READ (1L<<31) @@ -5712,7 +5712,7 @@ struct l2_fhdr { #define BNX2_TPAT_CPU_STATE_FIO_ABORT_HALTED (1L<<8) #define BNX2_TPAT_CPU_STATE_SOFT_HALTED (1L<<10) #define BNX2_TPAT_CPU_STATE_SPAD_UNDERFLOW (1L<<11) -#define BNX2_TPAT_CPU_STATE_INTERRRUPT (1L<<12) +#define BNX2_TPAT_CPU_STATE_INTERRUPT (1L<<12) #define BNX2_TPAT_CPU_STATE_DATA_ACCESS_STALL (1L<<14) #define BNX2_TPAT_CPU_STATE_INST_FETCH_STALL (1L<<15) #define BNX2_TPAT_CPU_STATE_BLOCKED_READ (1L<<31) @@ -5807,7 +5807,7 @@ struct l2_fhdr { #define BNX2_RXP_CPU_STATE_FIO_ABORT_HALTED (1L<<8) #define BNX2_RXP_CPU_STATE_SOFT_HALTED (1L<<10) #define BNX2_RXP_CPU_STATE_SPAD_UNDERFLOW (1L<<11) -#define BNX2_RXP_CPU_STATE_INTERRRUPT (1L<<12) +#define BNX2_RXP_CPU_STATE_INTERRUPT (1L<<12) #define BNX2_RXP_CPU_STATE_DATA_ACCESS_STALL (1L<<14) #define BNX2_RXP_CPU_STATE_INST_FETCH_STALL (1L<<15) #define BNX2_RXP_CPU_STATE_BLOCKED_READ (1L<<31) @@ -5953,7 +5953,7 @@ struct l2_fhdr { #define BNX2_COM_CPU_STATE_FIO_ABORT_HALTED (1L<<8) #define BNX2_COM_CPU_STATE_SOFT_HALTED (1L<<10) #define BNX2_COM_CPU_STATE_SPAD_UNDERFLOW (1L<<11) -#define BNX2_COM_CPU_STATE_INTERRRUPT (1L<<12) +#define BNX2_COM_CPU_STATE_INTERRUPT (1L<<12) #define BNX2_COM_CPU_STATE_DATA_ACCESS_STALL (1L<<14) #define BNX2_COM_CPU_STATE_INST_FETCH_STALL (1L<<15) #define BNX2_COM_CPU_STATE_BLOCKED_READ (1L<<31) @@ -6119,7 +6119,7 @@ struct l2_fhdr { #define BNX2_CP_CPU_STATE_FIO_ABORT_HALTED (1L<<8) #define BNX2_CP_CPU_STATE_SOFT_HALTED (1L<<10) #define BNX2_CP_CPU_STATE_SPAD_UNDERFLOW (1L<<11) -#define BNX2_CP_CPU_STATE_INTERRRUPT (1L<<12) +#define BNX2_CP_CPU_STATE_INTERRUPT (1L<<12) #define BNX2_CP_CPU_STATE_DATA_ACCESS_STALL (1L<<14) #define BNX2_CP_CPU_STATE_INST_FETCH_STALL (1L<<15) #define BNX2_CP_CPU_STATE_BLOCKED_READ (1L<<31) @@ -6291,7 +6291,7 @@ struct l2_fhdr { #define BNX2_MCP_CPU_STATE_FIO_ABORT_HALTED (1L<<8) #define BNX2_MCP_CPU_STATE_SOFT_HALTED (1L<<10) #define BNX2_MCP_CPU_STATE_SPAD_UNDERFLOW (1L<<11) -#define BNX2_MCP_CPU_STATE_INTERRRUPT (1L<<12) +#define BNX2_MCP_CPU_STATE_INTERRUPT (1L<<12) #define BNX2_MCP_CPU_STATE_DATA_ACCESS_STALL (1L<<14) #define BNX2_MCP_CPU_STATE_INST_FETCH_STALL (1L<<15) #define BNX2_MCP_CPU_STATE_BLOCKED_READ (1L<<31) diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index 57339da76326..d7f879dfb1c9 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c @@ -2057,7 +2057,7 @@ static void sky2_hw_down(struct sky2_port *sky2) sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); - /* Force any delayed status interrrupt and NAPI */ + /* Force any delayed status interrupt and NAPI */ sky2_write32(hw, STAT_LEV_TIMER_CNT, 0); sky2_write32(hw, STAT_TX_TIMER_CNT, 0); sky2_write32(hw, STAT_ISR_TIMER_CNT, 0); diff --git a/drivers/net/wireless/rtlwifi/pci.c b/drivers/net/wireless/rtlwifi/pci.c index 5efd57833489..c1ea65e5d036 100644 --- a/drivers/net/wireless/rtlwifi/pci.c +++ b/drivers/net/wireless/rtlwifi/pci.c @@ -488,7 +488,7 @@ static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw) struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); struct sk_buff *skb = NULL; struct ieee80211_tx_info *info = NULL; - int tid; /* should be int */ + int tid; if (!rtlpriv->rtlhal.earlymode_enable) return; @@ -1538,7 +1538,7 @@ static int rtl_pci_start(struct ieee80211_hw *hw) rtl_init_rx_config(hw); - /*should after adapter start and interrupt enable. */ + /*should be after adapter start and interrupt enable. */ set_hal_start(rtlhal); RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC); @@ -1559,7 +1559,7 @@ static void rtl_pci_stop(struct ieee80211_hw *hw) u8 RFInProgressTimeOut = 0; /* - *should before disable interrrupt&adapter + *should be before disable interrupt&adapter *and will do it immediately. */ set_hal_stop(rtlhal); diff --git a/drivers/tty/serial/mrst_max3110.c b/drivers/tty/serial/mrst_max3110.c index a764bf99743b..fbd9261a0c2c 100644 --- a/drivers/tty/serial/mrst_max3110.c +++ b/drivers/tty/serial/mrst_max3110.c @@ -23,7 +23,7 @@ * 1 word. If SPI master controller doesn't support sclk frequency change, * then the char need be sent out one by one with some delay * - * 2. Currently only RX available interrrupt is used, no need for waiting TXE + * 2. Currently only RX available interrupt is used, no need for waiting TXE * interrupt for a low speed UART device */ diff --git a/drivers/usb/gadget/langwell_udc.c b/drivers/usb/gadget/langwell_udc.c index a06e2c27b435..ff4d40d77c30 100644 --- a/drivers/usb/gadget/langwell_udc.c +++ b/drivers/usb/gadget/langwell_udc.c @@ -2969,7 +2969,7 @@ static irqreturn_t langwell_irq(int irq, void *_dev) handle_port_change(dev); } - /* suspend interrrupt */ + /* suspend interrupt */ if (irq_sts & STS_SLI) { dev_vdbg(&dev->pdev->dev, "suspend interrupt\n"); handle_bus_suspend(dev); diff --git a/drivers/usb/gadget/net2280.c b/drivers/usb/gadget/net2280.c index 3dd40b4e675c..a218a4de5dc9 100644 --- a/drivers/usb/gadget/net2280.c +++ b/drivers/usb/gadget/net2280.c @@ -2481,7 +2481,7 @@ static void handle_stat1_irqs (struct net2280 *dev, u32 stat) mask = (1 << HIGH_SPEED) | (1 << FULL_SPEED); /* VBUS disconnect is indicated by VBUS_PIN and VBUS_INTERRUPT set. - * Root Port Reset is indicated by ROOT_PORT_RESET_INTERRRUPT set and + * Root Port Reset is indicated by ROOT_PORT_RESET_INTERRUPT set and * both HIGH_SPEED and FULL_SPEED clear (as ROOT_PORT_RESET_INTERRUPT * only indicates a change in the reset state). */ diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c index b67a062f556b..95a67fea393b 100644 --- a/drivers/usb/musb/musb_gadget.c +++ b/drivers/usb/musb/musb_gadget.c @@ -704,7 +704,7 @@ static void rxstate(struct musb *musb, struct musb_request *req) * most these gadgets, end of is signified either by a short packet, * or filling the last byte of the buffer. (Sending extra data in * that last pckate should trigger an overflow fault.) But in mode 1, - * we don't get DMA completion interrrupt for short packets. + * we don't get DMA completion interrupt for short packets. * * Theoretically, we could enable DMAReq irq (MUSB_RXCSR_DMAMODE = 1), * to get endpoint interrupt on every DMA req, but that didn't seem -- cgit v1.2.3 From 699324871fcc3650f2023c5e36cb119a92d7894b Mon Sep 17 00:00:00 2001 From: "Justin P. Mattock" Date: Tue, 26 Jul 2011 23:06:29 -0700 Subject: treewide: remove extra semicolons from various parts of the kernel This is a resend from the original, changing the title from PATCH to RFC(since this is a review for commit, and I should have put that the first go around). and also removing some of the commit's with ia64 and bash since it is significant. let me know if I might have missed anything etc.. Signed-off-by: Justin P. Mattock Signed-off-by: Jiri Kosina --- arch/arm/mach-nuc93x/time.c | 2 +- arch/arm/mach-w90x900/cpu.c | 2 +- drivers/block/rbd.c | 2 +- drivers/gpu/drm/radeon/radeon_fence.c | 2 +- drivers/i2c/busses/i2c-designware.c | 2 +- drivers/media/radio/wl128x/fmdrv_v4l2.c | 2 +- drivers/scsi/isci/phy.c | 2 +- drivers/staging/iio/addac/adt7316-i2c.c | 2 +- drivers/staging/iio/dds/ad9832.c | 2 +- drivers/usb/gadget/mv_udc_core.c | 4 ++-- scripts/checkpatch.pl | 4 ++-- 11 files changed, 13 insertions(+), 13 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-nuc93x/time.c b/arch/arm/mach-nuc93x/time.c index 2f90f9dc6e30..f9807c029ec5 100644 --- a/arch/arm/mach-nuc93x/time.c +++ b/arch/arm/mach-nuc93x/time.c @@ -82,7 +82,7 @@ static void nuc93x_timer_setup(void) timer0_load = (rate / TICKS_PER_SEC); __raw_writel(timer0_load, REG_TICR0); - val |= (PERIOD | COUNTEN | INTEN | PRESCALE);; + val |= (PERIOD | COUNTEN | INTEN | PRESCALE); __raw_writel(val, REG_TCSR0); } diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c index 83c56324a472..0a235e502330 100644 --- a/arch/arm/mach-w90x900/cpu.c +++ b/arch/arm/mach-w90x900/cpu.c @@ -60,7 +60,7 @@ static DEFINE_CLK(emc, 7); static DEFINE_SUBCLK(rmii, 2); static DEFINE_CLK(usbd, 8); static DEFINE_CLK(usbh, 9); -static DEFINE_CLK(g2d, 10);; +static DEFINE_CLK(g2d, 10); static DEFINE_CLK(pwm, 18); static DEFINE_CLK(ps2, 24); static DEFINE_CLK(kpi, 25); diff --git a/drivers/block/rbd.c b/drivers/block/rbd.c index 1278098624e6..2c09102adbaa 100644 --- a/drivers/block/rbd.c +++ b/drivers/block/rbd.c @@ -192,7 +192,7 @@ static ssize_t rbd_snap_add(struct device *dev, const char *buf, size_t count); static void __rbd_remove_snap_dev(struct rbd_device *rbd_dev, - struct rbd_snap *snap);; + struct rbd_snap *snap); static struct rbd_device *dev_to_rbd(struct device *dev) diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c index 021d2b6b556f..9a9f9fcde378 100644 --- a/drivers/gpu/drm/radeon/radeon_fence.c +++ b/drivers/gpu/drm/radeon/radeon_fence.c @@ -48,7 +48,7 @@ static void radeon_fence_write(struct radeon_device *rdev, u32 seq) scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; else scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; - rdev->wb.wb[scratch_index/4] = cpu_to_le32(seq);; + rdev->wb.wb[scratch_index/4] = cpu_to_le32(seq); } else WREG32(rdev->fence_drv.scratch_reg, seq); } diff --git a/drivers/i2c/busses/i2c-designware.c b/drivers/i2c/busses/i2c-designware.c index b7a51c43b185..1b42b50b5992 100644 --- a/drivers/i2c/busses/i2c-designware.c +++ b/drivers/i2c/busses/i2c-designware.c @@ -390,7 +390,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) int tx_limit, rx_limit; u32 addr = msgs[dev->msg_write_idx].addr; u32 buf_len = dev->tx_buf_len; - u8 *buf = dev->tx_buf;; + u8 *buf = dev->tx_buf; intr_mask = DW_IC_INTR_DEFAULT_MASK; diff --git a/drivers/media/radio/wl128x/fmdrv_v4l2.c b/drivers/media/radio/wl128x/fmdrv_v4l2.c index 87010724f914..a4f07f8b2f20 100644 --- a/drivers/media/radio/wl128x/fmdrv_v4l2.c +++ b/drivers/media/radio/wl128x/fmdrv_v4l2.c @@ -403,7 +403,7 @@ static int fm_v4l2_vidioc_s_hw_freq_seek(struct file *file, void *priv, static int fm_v4l2_vidioc_g_modulator(struct file *file, void *priv, struct v4l2_modulator *mod) { - struct fmdev *fmdev = video_drvdata(file);; + struct fmdev *fmdev = video_drvdata(file); if (mod->index != 0) return -EINVAL; diff --git a/drivers/scsi/isci/phy.c b/drivers/scsi/isci/phy.c index 79313a7a2356..8d9192d49f4a 100644 --- a/drivers/scsi/isci/phy.c +++ b/drivers/scsi/isci/phy.c @@ -695,7 +695,7 @@ enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code) __func__, event_code); - return SCI_FAILURE;; + return SCI_FAILURE; } return SCI_SUCCESS; case SCI_PHY_SUB_AWAIT_SATA_SPEED_EN: diff --git a/drivers/staging/iio/addac/adt7316-i2c.c b/drivers/staging/iio/addac/adt7316-i2c.c index 52d1ea349635..1c86cf11ab94 100644 --- a/drivers/staging/iio/addac/adt7316-i2c.c +++ b/drivers/staging/iio/addac/adt7316-i2c.c @@ -109,7 +109,7 @@ static int __devinit adt7316_i2c_probe(struct i2c_client *client, static int __devexit adt7316_i2c_remove(struct i2c_client *client) { - return adt7316_remove(&client->dev);; + return adt7316_remove(&client->dev); } static const struct i2c_device_id adt7316_i2c_id[] = { diff --git a/drivers/staging/iio/dds/ad9832.c b/drivers/staging/iio/dds/ad9832.c index e3e61a469bb8..6f0efe6580e7 100644 --- a/drivers/staging/iio/dds/ad9832.c +++ b/drivers/staging/iio/dds/ad9832.c @@ -52,7 +52,7 @@ static int ad9832_write_frequency(struct ad9832_state *st, ((addr - 3) << ADD_SHIFT) | ((regval >> 0) & 0xFF)); - return spi_sync(st->spi, &st->freq_msg);; + return spi_sync(st->spi, &st->freq_msg); } static int ad9832_write_phase(struct ad9832_state *st, diff --git a/drivers/usb/gadget/mv_udc_core.c b/drivers/usb/gadget/mv_udc_core.c index ce1ac2bcb314..0b3b8d0462db 100644 --- a/drivers/usb/gadget/mv_udc_core.c +++ b/drivers/usb/gadget/mv_udc_core.c @@ -335,7 +335,7 @@ static int queue_dtd(struct mv_ep *ep, struct mv_req *req) } else { /* Write dQH next pointer and terminate bit to 0 */ dqh->next_dtd_ptr = req->head->td_dma - & EP_QUEUE_HEAD_NEXT_POINTER_MASK;; + & EP_QUEUE_HEAD_NEXT_POINTER_MASK; dqh->size_ioc_int_sts = 0; /* Ensure that updates to the QH will occur before priming. */ @@ -376,7 +376,7 @@ static int queue_dtd(struct mv_ep *ep, struct mv_req *req) } } done: - return retval;; + return retval; } static struct mv_dtd *build_dtd(struct mv_req *req, unsigned *length, diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index 9d761c95eca2..14f6a90ca217 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -2931,11 +2931,11 @@ sub process { } } if ($level == 0 && $block =~ /^\s*\{/ && !$allowed) { - my $herectx = $here . "\n";; + my $herectx = $here . "\n"; my $cnt = statement_rawlines($block); for (my $n = 0; $n < $cnt; $n++) { - $herectx .= raw_line($linenr, $n) . "\n";; + $herectx .= raw_line($linenr, $n) . "\n"; } WARN("BRACES", -- cgit v1.2.3 From e0ffaa8cba275c48531f1a005f8ff8973fbebea9 Mon Sep 17 00:00:00 2001 From: Jesper Juhl Date: Mon, 1 Aug 2011 23:13:48 +0200 Subject: Remove unneeded version.h includes from arch/arm/ It was pointed out by 'make versioncheck' that some includes of linux/version.h are not needed in arch/arm/. This patch removes them. Signed-off-by: Jesper Juhl Signed-off-by: Jiri Kosina --- arch/arm/mach-bcmring/irq.c | 1 - arch/arm/mach-bcmring/timer.c | 1 - 2 files changed, 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-bcmring/irq.c b/arch/arm/mach-bcmring/irq.c index c48feaf4e8e9..437fa683bcb2 100644 --- a/arch/arm/mach-bcmring/irq.c +++ b/arch/arm/mach-bcmring/irq.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include diff --git a/arch/arm/mach-bcmring/timer.c b/arch/arm/mach-bcmring/timer.c index 2d415d2a8e68..af9c3d7e2a0c 100644 --- a/arch/arm/mach-bcmring/timer.c +++ b/arch/arm/mach-bcmring/timer.c @@ -12,7 +12,6 @@ * consent. *****************************************************************************/ -#include #include #include #include -- cgit v1.2.3 From 06b841666a5a47918d31472dd77837906f999a9a Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Sun, 25 Sep 2011 23:18:42 +0200 Subject: ARM: mach-shmobile: sh7372 generic suspend/resume support Convert the sh7372 Core Standby code to make use of the new generic ARM cpu suspend/resume code. Signed-off-by: Magnus Damm Signed-off-by: Rafael J. Wysocki --- arch/arm/mach-shmobile/include/mach/common.h | 3 +- arch/arm/mach-shmobile/pm-sh7372.c | 36 ++--- arch/arm/mach-shmobile/sleep-sh7372.S | 230 +-------------------------- 3 files changed, 23 insertions(+), 246 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 06aecb31d9c7..7b6f6f91da81 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -35,8 +35,7 @@ extern void sh7372_add_standard_devices(void); extern void sh7372_clock_init(void); extern void sh7372_pinmux_init(void); extern void sh7372_pm_init(void); -extern void sh7372_cpu_suspend(void); -extern void sh7372_cpu_resume(void); +extern void sh7372_resume_core_standby(void); extern struct clk sh7372_extal1_clk; extern struct clk sh7372_extal2_clk; diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c index ac47bfcd287e..aa7d352920d4 100644 --- a/arch/arm/mach-shmobile/pm-sh7372.c +++ b/arch/arm/mach-shmobile/pm-sh7372.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -152,30 +153,25 @@ struct sh7372_pm_domain sh7372_a3sg = { #endif /* CONFIG_PM */ -static void sh7372_enter_core_standby(void) +static int sh7372_do_idle_core_standby(unsigned long unused) { - void __iomem *smfram = (void __iomem *)SMFRAM; - - __raw_writel(0, APARMBAREA); /* translate 4k */ - __raw_writel(__pa(sh7372_cpu_resume), SBAR); /* set reset vector */ - __raw_writel(0x10, SYSTBCR); /* enable core standby */ - - __raw_writel(0, smfram + 0x3c); /* clear page table address */ - - sh7372_cpu_suspend(); - cpu_init(); + cpu_do_idle(); /* WFI when SYSTBCR == 0x10 -> Core Standby */ + return 0; +} - /* if page table address is non-NULL then we have been powered down */ - if (__raw_readl(smfram + 0x3c)) { - __raw_writel(__raw_readl(smfram + 0x40), - __va(__raw_readl(smfram + 0x3c))); +static void sh7372_enter_core_standby(void) +{ + /* set reset vector, translate 4k */ + __raw_writel(__pa(sh7372_resume_core_standby), SBAR); + __raw_writel(0, APARMBAREA); - flush_tlb_all(); - set_cr(__raw_readl(smfram + 0x38)); - } + /* enter sleep mode with SYSTBCR to 0x10 */ + __raw_writel(0x10, SYSTBCR); + cpu_suspend(0, sh7372_do_idle_core_standby); + __raw_writel(0, SYSTBCR); - __raw_writel(0, SYSTBCR); /* disable core standby */ - __raw_writel(0, SBAR); /* disable reset vector translation */ + /* disable reset vector translation */ + __raw_writel(0, SBAR); } #ifdef CONFIG_CPU_IDLE diff --git a/arch/arm/mach-shmobile/sleep-sh7372.S b/arch/arm/mach-shmobile/sleep-sh7372.S index d37d3ca4d18f..dedf6126789c 100644 --- a/arch/arm/mach-shmobile/sleep-sh7372.S +++ b/arch/arm/mach-shmobile/sleep-sh7372.S @@ -30,231 +30,13 @@ */ #include +#include +#include #include -#define SMFRAM 0xe6a70000 - - .align -kernel_flush: - .word v7_flush_dcache_all - - .align 3 -ENTRY(sh7372_cpu_suspend) - stmfd sp!, {r0-r12, lr} @ save registers on stack - - ldr r8, =SMFRAM - - mov r4, sp @ Store sp - mrs r5, spsr @ Store spsr - mov r6, lr @ Store lr - stmia r8!, {r4-r6} - - mrc p15, 0, r4, c1, c0, 2 @ Coprocessor access control register - mrc p15, 0, r5, c2, c0, 0 @ TTBR0 - mrc p15, 0, r6, c2, c0, 1 @ TTBR1 - mrc p15, 0, r7, c2, c0, 2 @ TTBCR - stmia r8!, {r4-r7} - - mrc p15, 0, r4, c3, c0, 0 @ Domain access Control Register - mrc p15, 0, r5, c10, c2, 0 @ PRRR - mrc p15, 0, r6, c10, c2, 1 @ NMRR - stmia r8!,{r4-r6} - - mrc p15, 0, r4, c13, c0, 1 @ Context ID - mrc p15, 0, r5, c13, c0, 2 @ User r/w thread and process ID - mrc p15, 0, r6, c12, c0, 0 @ Secure or NS vector base address - mrs r7, cpsr @ Store current cpsr - stmia r8!, {r4-r7} - - mrc p15, 0, r4, c1, c0, 0 @ save control register - stmia r8!, {r4} - - /* - * jump out to kernel flush routine - * - reuse that code is better - * - it executes in a cached space so is faster than refetch per-block - * - should be faster and will change with kernel - * - 'might' have to copy address, load and jump to it - * Flush all data from the L1 data cache before disabling - * SCTLR.C bit. - */ - ldr r1, kernel_flush - mov lr, pc - bx r1 - - /* - * Clear the SCTLR.C bit to prevent further data cache - * allocation. Clearing SCTLR.C would make all the data accesses - * strongly ordered and would not hit the cache. - */ - mrc p15, 0, r0, c1, c0, 0 - bic r0, r0, #(1 << 2) @ Disable the C bit - mcr p15, 0, r0, c1, c0, 0 - isb - - /* - * Invalidate L1 data cache. Even though only invalidate is - * necessary exported flush API is used here. Doing clean - * on already clean cache would be almost NOP. - */ - ldr r1, kernel_flush - blx r1 - /* - * The kernel doesn't interwork: v7_flush_dcache_all in particluar will - * always return in Thumb state when CONFIG_THUMB2_KERNEL is enabled. - * This sequence switches back to ARM. Note that .align may insert a - * nop: bx pc needs to be word-aligned in order to work. - */ - THUMB( .thumb ) - THUMB( .align ) - THUMB( bx pc ) - THUMB( nop ) - .arm - - /* Data memory barrier and Data sync barrier */ - dsb - dmb - -/* - * =================================== - * == WFI instruction => Enter idle == - * =================================== - */ - wfi @ wait for interrupt - -/* - * =================================== - * == Resume path for non-OFF modes == - * =================================== - */ - mrc p15, 0, r0, c1, c0, 0 - tst r0, #(1 << 2) @ Check C bit enabled? - orreq r0, r0, #(1 << 2) @ Enable the C bit if cleared - mcreq p15, 0, r0, c1, c0, 0 - isb - -/* - * =================================== - * == Exit point from non-OFF modes == - * =================================== - */ - ldmfd sp!, {r0-r12, pc} @ restore regs and return - - .pool - .align 12 .text - .global sh7372_cpu_resume -sh7372_cpu_resume: - - mov r1, #0 - /* - * Invalidate all instruction caches to PoU - * and flush branch target cache - */ - mcr p15, 0, r1, c7, c5, 0 - - ldr r3, =SMFRAM - - ldmia r3!, {r4-r6} - mov sp, r4 @ Restore sp - msr spsr_cxsf, r5 @ Restore spsr - mov lr, r6 @ Restore lr - - ldmia r3!, {r4-r7} - mcr p15, 0, r4, c1, c0, 2 @ Coprocessor access Control Register - mcr p15, 0, r5, c2, c0, 0 @ TTBR0 - mcr p15, 0, r6, c2, c0, 1 @ TTBR1 - mcr p15, 0, r7, c2, c0, 2 @ TTBCR - - ldmia r3!,{r4-r6} - mcr p15, 0, r4, c3, c0, 0 @ Domain access Control Register - mcr p15, 0, r5, c10, c2, 0 @ PRRR - mcr p15, 0, r6, c10, c2, 1 @ NMRR - - ldmia r3!,{r4-r7} - mcr p15, 0, r4, c13, c0, 1 @ Context ID - mcr p15, 0, r5, c13, c0, 2 @ User r/w thread and process ID - mrc p15, 0, r6, c12, c0, 0 @ Secure or NS vector base address - msr cpsr, r7 @ store cpsr - - /* Starting to enable MMU here */ - mrc p15, 0, r7, c2, c0, 2 @ Read TTBRControl - /* Extract N (0:2) bits and decide whether to use TTBR0 or TTBR1 */ - and r7, #0x7 - cmp r7, #0x0 - beq usettbr0 -ttbr_error: - /* - * More work needs to be done to support N[0:2] value other than 0 - * So looping here so that the error can be detected - */ - b ttbr_error - - .align -cache_pred_disable_mask: - .word 0xFFFFE7FB -ttbrbit_mask: - .word 0xFFFFC000 -table_index_mask: - .word 0xFFF00000 -table_entry: - .word 0x00000C02 -usettbr0: - - mrc p15, 0, r2, c2, c0, 0 - ldr r5, ttbrbit_mask - and r2, r5 - mov r4, pc - ldr r5, table_index_mask - and r4, r5 @ r4 = 31 to 20 bits of pc - /* Extract the value to be written to table entry */ - ldr r6, table_entry - /* r6 has the value to be written to table entry */ - add r6, r6, r4 - /* Getting the address of table entry to modify */ - lsr r4, #18 - /* r2 has the location which needs to be modified */ - add r2, r4 - ldr r4, [r2] - str r6, [r2] /* modify the table entry */ - - mov r7, r6 - mov r5, r2 - mov r6, r4 - /* r5 = original page table address */ - /* r6 = original page table data */ - - mov r0, #0 - mcr p15, 0, r0, c7, c5, 4 @ Flush prefetch buffer - mcr p15, 0, r0, c7, c5, 6 @ Invalidate branch predictor array - mcr p15, 0, r0, c8, c5, 0 @ Invalidate instruction TLB - mcr p15, 0, r0, c8, c6, 0 @ Invalidate data TLB - - /* - * Restore control register. This enables the MMU. - * The caches and prediction are not enabled here, they - * will be enabled after restoring the MMU table entry. - */ - ldmia r3!, {r4} - stmia r3!, {r5} /* save original page table address */ - stmia r3!, {r6} /* save original page table data */ - stmia r3!, {r7} /* save modified page table data */ - - ldr r2, cache_pred_disable_mask - and r4, r2 - mcr p15, 0, r4, c1, c0, 0 - dsb - isb - - ldr r0, =restoremmu_on - bx r0 - -/* - * ============================== - * == Exit point from OFF mode == - * ============================== - */ -restoremmu_on: - - ldmfd sp!, {r0-r12, pc} @ restore regs and return + .global sh7372_resume_core_standby +sh7372_resume_core_standby: + ldr pc, 1f +1: .long cpu_resume - PAGE_OFFSET + PLAT_PHYS_OFFSET -- cgit v1.2.3 From cf33835c5fc528cacd4f98bc38f246022dad340d Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Sun, 25 Sep 2011 23:20:49 +0200 Subject: ARM: mach-shmobile: sh7372 A3SM support This patch adds sh7372 A3SM power domain support. The sh7372 A3SM hardware power domain contains the ARM Cortex-A8 CPU Core including L2 cache. This sleep mode can be seen as a one step deeper sleep mode from the already existing Core Standby mode. To wake up from A3SM sleep only a few wakeup sources are supported - so the regular INTC controller will not be able to help us unfortunately. The code in this patch will enter A3SM sleep via the regular Suspend-to-RAM interface in the case of only wakeups supported by A3SM are enabled. If unsupported wakeups are enabled then Core Standby will be used instead. Signed-off-by: Magnus Damm Signed-off-by: Rafael J. Wysocki --- arch/arm/mach-shmobile/include/mach/common.h | 3 +- arch/arm/mach-shmobile/pm-sh7372.c | 211 +++++++++++++++++++++++++-- arch/arm/mach-shmobile/sleep-sh7372.S | 55 ++++++- 3 files changed, 257 insertions(+), 12 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 7b6f6f91da81..c0cdbf997c91 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -35,7 +35,8 @@ extern void sh7372_add_standard_devices(void); extern void sh7372_clock_init(void); extern void sh7372_pinmux_init(void); extern void sh7372_pm_init(void); -extern void sh7372_resume_core_standby(void); +extern void sh7372_resume_core_standby_a3sm(void); +extern int sh7372_do_idle_a3sm(unsigned long unused); extern struct clk sh7372_extal1_clk; extern struct clk sh7372_extal2_clk; diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c index aa7d352920d4..444f42fe1359 100644 --- a/arch/arm/mach-shmobile/pm-sh7372.c +++ b/arch/arm/mach-shmobile/pm-sh7372.c @@ -18,6 +18,8 @@ #include #include #include +#include +#include #include #include #include @@ -25,14 +27,48 @@ #include #include -#define SMFRAM 0xe6a70000 -#define SYSTBCR 0xe6150024 -#define SBAR 0xe6180020 -#define APARMBAREA 0xe6f10020 +/* DBG */ +#define DBGREG1 0xe6100020 +#define DBGREG9 0xe6100040 +/* CPGA */ +#define SYSTBCR 0xe6150024 +#define MSTPSR0 0xe6150030 +#define MSTPSR1 0xe6150038 +#define MSTPSR2 0xe6150040 +#define MSTPSR3 0xe6150048 +#define MSTPSR4 0xe615004c +#define PLLC01STPCR 0xe61500c8 + +/* SYSC */ #define SPDCR 0xe6180008 #define SWUCR 0xe6180014 +#define SBAR 0xe6180020 +#define WUPSMSK 0xe618002c +#define WUPSMSK2 0xe6180048 #define PSTR 0xe6180080 +#define WUPSFAC 0xe6180098 +#define IRQCR 0xe618022c +#define IRQCR2 0xe6180238 +#define IRQCR3 0xe6180244 +#define IRQCR4 0xe6180248 +#define PDNSEL 0xe6180254 + +/* INTC */ +#define ICR1A 0xe6900000 +#define ICR2A 0xe6900004 +#define ICR3A 0xe6900008 +#define ICR4A 0xe690000c +#define INTMSK00A 0xe6900040 +#define INTMSK10A 0xe6900044 +#define INTMSK20A 0xe6900048 +#define INTMSK30A 0xe690004c + +/* MFIS */ +#define SMFRAM 0xe6a70000 + +/* AP-System Core */ +#define APARMBAREA 0xe6f10020 #define PSTR_RETRIES 100 #define PSTR_DELAY_US 10 @@ -162,7 +198,7 @@ static int sh7372_do_idle_core_standby(unsigned long unused) static void sh7372_enter_core_standby(void) { /* set reset vector, translate 4k */ - __raw_writel(__pa(sh7372_resume_core_standby), SBAR); + __raw_writel(__pa(sh7372_resume_core_standby_a3sm), SBAR); __raw_writel(0, APARMBAREA); /* enter sleep mode with SYSTBCR to 0x10 */ @@ -174,7 +210,151 @@ static void sh7372_enter_core_standby(void) __raw_writel(0, SBAR); } +static void sh7372_enter_a3sm_common(int pllc0_on) +{ + /* set reset vector, translate 4k */ + __raw_writel(__pa(sh7372_resume_core_standby_a3sm), SBAR); + __raw_writel(0, APARMBAREA); + + if (pllc0_on) + __raw_writel(0, PLLC01STPCR); + else + __raw_writel(1 << 28, PLLC01STPCR); + + __raw_writel(0, PDNSEL); /* power-down A3SM only, not A4S */ + __raw_readl(WUPSFAC); /* read wakeup int. factor before sleep */ + cpu_suspend(0, sh7372_do_idle_a3sm); + __raw_readl(WUPSFAC); /* read wakeup int. factor after wakeup */ + + /* disable reset vector translation */ + __raw_writel(0, SBAR); +} + +static int sh7372_a3sm_valid(unsigned long *mskp, unsigned long *msk2p) +{ + unsigned long mstpsr0, mstpsr1, mstpsr2, mstpsr3, mstpsr4; + unsigned long msk, msk2; + + /* check active clocks to determine potential wakeup sources */ + + mstpsr0 = __raw_readl(MSTPSR0); + if ((mstpsr0 & 0x00000003) != 0x00000003) { + pr_debug("sh7372 mstpsr0 0x%08lx\n", mstpsr0); + return 0; + } + + mstpsr1 = __raw_readl(MSTPSR1); + if ((mstpsr1 & 0xff079b7f) != 0xff079b7f) { + pr_debug("sh7372 mstpsr1 0x%08lx\n", mstpsr1); + return 0; + } + + mstpsr2 = __raw_readl(MSTPSR2); + if ((mstpsr2 & 0x000741ff) != 0x000741ff) { + pr_debug("sh7372 mstpsr2 0x%08lx\n", mstpsr2); + return 0; + } + + mstpsr3 = __raw_readl(MSTPSR3); + if ((mstpsr3 & 0x1a60f010) != 0x1a60f010) { + pr_debug("sh7372 mstpsr3 0x%08lx\n", mstpsr3); + return 0; + } + + mstpsr4 = __raw_readl(MSTPSR4); + if ((mstpsr4 & 0x00008cf0) != 0x00008cf0) { + pr_debug("sh7372 mstpsr4 0x%08lx\n", mstpsr4); + return 0; + } + + msk = 0; + msk2 = 0; + + /* make bitmaps of limited number of wakeup sources */ + + if ((mstpsr2 & (1 << 23)) == 0) /* SPU2 */ + msk |= 1 << 31; + + if ((mstpsr2 & (1 << 12)) == 0) /* MFI_MFIM */ + msk |= 1 << 21; + + if ((mstpsr4 & (1 << 3)) == 0) /* KEYSC */ + msk |= 1 << 2; + + if ((mstpsr1 & (1 << 24)) == 0) /* CMT0 */ + msk |= 1 << 1; + + if ((mstpsr3 & (1 << 29)) == 0) /* CMT1 */ + msk |= 1 << 1; + + if ((mstpsr4 & (1 << 0)) == 0) /* CMT2 */ + msk |= 1 << 1; + + if ((mstpsr2 & (1 << 13)) == 0) /* MFI_MFIS */ + msk2 |= 1 << 17; + + *mskp = msk; + *msk2p = msk2; + + return 1; +} + +static void sh7372_icr_to_irqcr(unsigned long icr, u16 *irqcr1p, u16 *irqcr2p) +{ + u16 tmp, irqcr1, irqcr2; + int k; + + irqcr1 = 0; + irqcr2 = 0; + + /* convert INTCA ICR register layout to SYSC IRQCR+IRQCR2 */ + for (k = 0; k <= 7; k++) { + tmp = (icr >> ((7 - k) * 4)) & 0xf; + irqcr1 |= (tmp & 0x03) << (k * 2); + irqcr2 |= (tmp >> 2) << (k * 2); + } + + *irqcr1p = irqcr1; + *irqcr2p = irqcr2; +} + +static void sh7372_setup_a3sm(unsigned long msk, unsigned long msk2) +{ + u16 irqcrx_low, irqcrx_high, irqcry_low, irqcry_high; + unsigned long tmp; + + /* read IRQ0A -> IRQ15A mask */ + tmp = bitrev8(__raw_readb(INTMSK00A)); + tmp |= bitrev8(__raw_readb(INTMSK10A)) << 8; + + /* setup WUPSMSK from clocks and external IRQ mask */ + msk = (~msk & 0xc030000f) | (tmp << 4); + __raw_writel(msk, WUPSMSK); + + /* propage level/edge trigger for external IRQ 0->15 */ + sh7372_icr_to_irqcr(__raw_readl(ICR1A), &irqcrx_low, &irqcry_low); + sh7372_icr_to_irqcr(__raw_readl(ICR2A), &irqcrx_high, &irqcry_high); + __raw_writel((irqcrx_high << 16) | irqcrx_low, IRQCR); + __raw_writel((irqcry_high << 16) | irqcry_low, IRQCR2); + + /* read IRQ16A -> IRQ31A mask */ + tmp = bitrev8(__raw_readb(INTMSK20A)); + tmp |= bitrev8(__raw_readb(INTMSK30A)) << 8; + + /* setup WUPSMSK2 from clocks and external IRQ mask */ + msk2 = (~msk2 & 0x00030000) | tmp; + __raw_writel(msk2, WUPSMSK2); + + /* propage level/edge trigger for external IRQ 16->31 */ + sh7372_icr_to_irqcr(__raw_readl(ICR3A), &irqcrx_low, &irqcry_low); + sh7372_icr_to_irqcr(__raw_readl(ICR4A), &irqcrx_high, &irqcry_high); + __raw_writel((irqcrx_high << 16) | irqcrx_low, IRQCR3); + __raw_writel((irqcry_high << 16) | irqcry_low, IRQCR4); +} + + #ifdef CONFIG_CPU_IDLE + static void sh7372_cpuidle_setup(struct cpuidle_device *dev) { struct cpuidle_state *state; @@ -202,9 +382,25 @@ static void sh7372_cpuidle_init(void) {} #endif #ifdef CONFIG_SUSPEND + static int sh7372_enter_suspend(suspend_state_t suspend_state) { - sh7372_enter_core_standby(); + unsigned long msk, msk2; + + /* check active clocks to determine potential wakeup sources */ + if (sh7372_a3sm_valid(&msk, &msk2)) { + + /* convert INTC mask and sense to SYSC mask and sense */ + sh7372_setup_a3sm(msk, msk2); + + /* enter A3SM sleep with PLLC0 off */ + pr_debug("entering A3SM\n"); + sh7372_enter_a3sm_common(0); + } else { + /* default to Core Standby that supports all wakeup sources */ + pr_debug("entering Core Standby\n"); + sh7372_enter_core_standby(); + } return 0; } @@ -216,9 +412,6 @@ static void sh7372_suspend_init(void) static void sh7372_suspend_init(void) {} #endif -#define DBGREG1 0xe6100020 -#define DBGREG9 0xe6100040 - void __init sh7372_pm_init(void) { /* enable DBG hardware block to kick SYSC */ diff --git a/arch/arm/mach-shmobile/sleep-sh7372.S b/arch/arm/mach-shmobile/sleep-sh7372.S index dedf6126789c..d365842ded47 100644 --- a/arch/arm/mach-shmobile/sleep-sh7372.S +++ b/arch/arm/mach-shmobile/sleep-sh7372.S @@ -36,7 +36,58 @@ .align 12 .text - .global sh7372_resume_core_standby -sh7372_resume_core_standby: + .global sh7372_resume_core_standby_a3sm +sh7372_resume_core_standby_a3sm: ldr pc, 1f 1: .long cpu_resume - PAGE_OFFSET + PLAT_PHYS_OFFSET + + .global sh7372_do_idle_a3sm +sh7372_do_idle_a3sm: + /* + * Clear the SCTLR.C bit to prevent further data cache + * allocation. Clearing SCTLR.C would make all the data accesses + * strongly ordered and would not hit the cache. + */ + mrc p15, 0, r0, c1, c0, 0 + bic r0, r0, #(1 << 2) @ Disable the C bit + mcr p15, 0, r0, c1, c0, 0 + isb + + /* disable L2 cache in the aux control register */ + mrc p15, 0, r10, c1, c0, 1 + bic r10, r10, #2 + mcr p15, 0, r10, c1, c0, 1 + + /* + * Invalidate data cache again. + */ + ldr r1, kernel_flush + blx r1 + /* + * The kernel doesn't interwork: v7_flush_dcache_all in particluar will + * always return in Thumb state when CONFIG_THUMB2_KERNEL is enabled. + * This sequence switches back to ARM. Note that .align may insert a + * nop: bx pc needs to be word-aligned in order to work. + */ + THUMB( .thumb ) + THUMB( .align ) + THUMB( bx pc ) + THUMB( nop ) + .arm + + /* Data memory barrier and Data sync barrier */ + dsb + dmb + +#define SPDCR 0xe6180008 +#define A3SM (1 << 12) + + /* A3SM power down */ + ldr r0, =SPDCR + ldr r1, =A3SM + str r1, [r0] +1: + b 1b + +kernel_flush: + .word v7_flush_dcache_all -- cgit v1.2.3 From a0089bd617adea27ebc352e1e0871649ab1dbaa6 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Sun, 25 Sep 2011 23:21:02 +0200 Subject: ARM: mach-shmobile: sh7372 sleep warning fixes Update the sh7372 sleep code to build parts of the code only when SUSPEND and/or CPU_IDLE are set. Signed-off-by: Magnus Damm Signed-off-by: Rafael J. Wysocki --- arch/arm/mach-shmobile/pm-sh7372.c | 5 ++++- arch/arm/mach-shmobile/sleep-sh7372.S | 2 ++ 2 files changed, 6 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c index 444f42fe1359..8e0944f96ba1 100644 --- a/arch/arm/mach-shmobile/pm-sh7372.c +++ b/arch/arm/mach-shmobile/pm-sh7372.c @@ -189,6 +189,7 @@ struct sh7372_pm_domain sh7372_a3sg = { #endif /* CONFIG_PM */ +#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE) static int sh7372_do_idle_core_standby(unsigned long unused) { cpu_do_idle(); /* WFI when SYSTBCR == 0x10 -> Core Standby */ @@ -209,7 +210,9 @@ static void sh7372_enter_core_standby(void) /* disable reset vector translation */ __raw_writel(0, SBAR); } +#endif +#ifdef CONFIG_SUSPEND static void sh7372_enter_a3sm_common(int pllc0_on) { /* set reset vector, translate 4k */ @@ -351,7 +354,7 @@ static void sh7372_setup_a3sm(unsigned long msk, unsigned long msk2) __raw_writel((irqcrx_high << 16) | irqcrx_low, IRQCR3); __raw_writel((irqcry_high << 16) | irqcry_low, IRQCR4); } - +#endif #ifdef CONFIG_CPU_IDLE diff --git a/arch/arm/mach-shmobile/sleep-sh7372.S b/arch/arm/mach-shmobile/sleep-sh7372.S index d365842ded47..f3ab3c5810ea 100644 --- a/arch/arm/mach-shmobile/sleep-sh7372.S +++ b/arch/arm/mach-shmobile/sleep-sh7372.S @@ -34,6 +34,7 @@ #include #include +#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE) .align 12 .text .global sh7372_resume_core_standby_a3sm @@ -91,3 +92,4 @@ sh7372_do_idle_a3sm: kernel_flush: .word v7_flush_dcache_all +#endif -- cgit v1.2.3 From 395cf9691d72173d8cdaa613c5f0255f993af94b Mon Sep 17 00:00:00 2001 From: Paul Bolle Date: Mon, 15 Aug 2011 02:02:26 +0200 Subject: doc: fix broken references There are numerous broken references to Documentation files (in other Documentation files, in comments, etc.). These broken references are caused by typo's in the references, and by renames or removals of the Documentation files. Some broken references are simply odd. Fix these broken references, sometimes by dropping the irrelevant text they were part of. Signed-off-by: Paul Bolle Signed-off-by: Jiri Kosina --- Documentation/PCI/pci.txt | 2 +- Documentation/blackfin/bfin-gpio-notes.txt | 2 +- Documentation/block/biodoc.txt | 2 +- Documentation/bus-virt-phys-mapping.txt | 2 +- Documentation/cdrom/packet-writing.txt | 2 +- Documentation/development-process/4.Coding | 2 +- Documentation/devicetree/bindings/gpio/led.txt | 2 +- Documentation/filesystems/caching/object.txt | 6 +++--- Documentation/filesystems/locks.txt | 11 ++++++----- Documentation/filesystems/nfs/idmapper.txt | 2 +- Documentation/filesystems/pohmelfs/design_notes.txt | 5 +++-- Documentation/filesystems/proc.txt | 2 +- Documentation/filesystems/vfs.txt | 3 --- Documentation/frv/booting.txt | 6 ------ Documentation/input/input.txt | 2 +- Documentation/kernel-docs.txt | 4 ++-- Documentation/kernel-parameters.txt | 12 ++++++------ Documentation/laptops/thinkpad-acpi.txt | 4 ++-- Documentation/media-framework.txt | 4 ++-- Documentation/memory-barriers.txt | 2 +- Documentation/networking/scaling.txt | 2 +- Documentation/power/basic-pm-debugging.txt | 2 +- Documentation/power/userland-swsusp.txt | 3 ++- Documentation/rfkill.txt | 3 +-- Documentation/scsi/aic7xxx_old.txt | 2 +- Documentation/scsi/scsi_mid_low_api.txt | 5 ----- Documentation/security/keys-trusted-encrypted.txt | 3 ++- Documentation/sound/oss/PAS16 | 3 +-- Documentation/spi/pxa2xx | 4 ++-- Documentation/timers/highres.txt | 2 +- Documentation/usb/dma.txt | 6 +++--- Documentation/virtual/lguest/lguest.c | 2 +- Documentation/vm/numa | 4 ++-- Documentation/vm/slub.txt | 2 +- arch/alpha/kernel/srm_env.c | 5 ++--- arch/arm/Kconfig | 2 +- arch/arm/include/asm/io.h | 2 +- arch/arm/mach-pxa/xcep.c | 3 +-- arch/ia64/hp/common/sba_iommu.c | 12 ++++++------ arch/m68k/q40/README | 2 +- arch/microblaze/include/asm/dma-mapping.h | 2 +- arch/mips/include/asm/lasat/lasat.h | 6 ++---- arch/mn10300/Kconfig | 2 +- arch/mn10300/kernel/irq.c | 1 - arch/openrisc/Kconfig | 2 +- arch/openrisc/include/asm/dma-mapping.h | 2 +- arch/parisc/include/asm/dma-mapping.h | 2 +- arch/parisc/kernel/pci-dma.c | 2 +- arch/powerpc/include/asm/qe.h | 2 +- arch/powerpc/sysdev/qe_lib/qe.c | 2 +- arch/unicore32/include/asm/io.h | 2 +- arch/x86/Kconfig | 2 +- arch/x86/Kconfig.debug | 2 +- arch/x86/boot/header.S | 2 +- arch/x86/include/asm/dma-mapping.h | 2 +- arch/x86/kernel/amd_gart_64.c | 2 +- arch/x86/kernel/apm_32.c | 2 -- arch/x86/kernel/pci-dma.c | 4 ++-- drivers/char/apm-emulation.c | 5 +---- drivers/input/misc/rotary_encoder.c | 2 +- drivers/leds/Kconfig | 2 +- drivers/media/dvb/dvb-usb/af9005-remote.c | 2 +- drivers/media/dvb/dvb-usb/af9005.c | 2 +- drivers/media/dvb/frontends/dib3000.h | 2 +- drivers/media/dvb/frontends/dib3000mb.c | 2 +- drivers/mtd/Kconfig | 2 +- drivers/net/Kconfig | 3 +-- drivers/net/can/sja1000/sja1000_of_platform.c | 2 +- drivers/net/tulip/21142.c | 3 --- drivers/net/tulip/eeprom.c | 2 -- drivers/net/tulip/interrupt.c | 3 --- drivers/net/tulip/media.c | 3 --- drivers/net/tulip/pnic.c | 3 --- drivers/net/tulip/pnic2.c | 3 --- drivers/net/tulip/timer.c | 3 --- drivers/net/tulip/tulip.h | 3 --- drivers/net/tulip/tulip_core.c | 3 --- drivers/parisc/sba_iommu.c | 16 ++++++++-------- drivers/platform/x86/Kconfig | 5 +---- drivers/scsi/megaraid/megaraid_mbox.c | 2 +- drivers/staging/cxt1e1/Kconfig | 3 +-- drivers/usb/serial/digi_acceleport.c | 2 +- drivers/video/igafb.c | 2 +- drivers/watchdog/smsc37b787_wdt.c | 2 +- fs/configfs/inode.c | 3 ++- fs/configfs/item.c | 2 +- fs/locks.c | 2 +- fs/squashfs/Kconfig | 6 +++--- include/linux/io-mapping.h | 2 +- include/linux/isdn.h | 2 +- include/linux/platform_data/ntc_thermistor.h | 2 +- include/media/videobuf-dma-sg.h | 2 +- include/target/configfs_macros.h | 4 ++-- net/netfilter/Kconfig | 2 +- sound/oss/Kconfig | 4 +--- tools/perf/util/config.c | 4 ++-- 96 files changed, 125 insertions(+), 179 deletions(-) (limited to 'arch/arm') diff --git a/Documentation/PCI/pci.txt b/Documentation/PCI/pci.txt index 6148d4080f88..aa09e5476bba 100644 --- a/Documentation/PCI/pci.txt +++ b/Documentation/PCI/pci.txt @@ -314,7 +314,7 @@ from the PCI device config space. Use the values in the pci_dev structure as the PCI "bus address" might have been remapped to a "host physical" address by the arch/chip-set specific kernel support. -See Documentation/IO-mapping.txt for how to access device registers +See Documentation/io-mapping.txt for how to access device registers or device memory. The device driver needs to call pci_request_region() to verify diff --git a/Documentation/blackfin/bfin-gpio-notes.txt b/Documentation/blackfin/bfin-gpio-notes.txt index f731c1e56475..d36b01f778b9 100644 --- a/Documentation/blackfin/bfin-gpio-notes.txt +++ b/Documentation/blackfin/bfin-gpio-notes.txt @@ -1,5 +1,5 @@ /* - * File: Documentation/blackfin/bfin-gpio-note.txt + * File: Documentation/blackfin/bfin-gpio-notes.txt * Based on: * Author: * diff --git a/Documentation/block/biodoc.txt b/Documentation/block/biodoc.txt index c6d84cfd2f56..e418dc0a7086 100644 --- a/Documentation/block/biodoc.txt +++ b/Documentation/block/biodoc.txt @@ -186,7 +186,7 @@ a virtual address mapping (unlike the earlier scheme of virtual address do not have a corresponding kernel virtual address space mapping) and low-memory pages. -Note: Please refer to Documentation/PCI/PCI-DMA-mapping.txt for a discussion +Note: Please refer to Documentation/DMA-API-HOWTO.txt for a discussion on PCI high mem DMA aspects and mapping of scatter gather lists, and support for 64 bit PCI. diff --git a/Documentation/bus-virt-phys-mapping.txt b/Documentation/bus-virt-phys-mapping.txt index 1b5aa10df845..2bc55ff3b4d1 100644 --- a/Documentation/bus-virt-phys-mapping.txt +++ b/Documentation/bus-virt-phys-mapping.txt @@ -1,6 +1,6 @@ [ NOTE: The virt_to_bus() and bus_to_virt() functions have been superseded by the functionality provided by the PCI DMA interface - (see Documentation/PCI/PCI-DMA-mapping.txt). They continue + (see Documentation/DMA-API-HOWTO.txt). They continue to be documented below for historical purposes, but new code must not use them. --davidm 00/12/12 ] diff --git a/Documentation/cdrom/packet-writing.txt b/Documentation/cdrom/packet-writing.txt index 13c251d5add6..2834170d821e 100644 --- a/Documentation/cdrom/packet-writing.txt +++ b/Documentation/cdrom/packet-writing.txt @@ -109,7 +109,7 @@ this interface. (see http://tom.ist-im-web.de/download/pktcdvd ) For a description of the sysfs interface look into the file: - Documentation/ABI/testing/sysfs-block-pktcdvd + Documentation/ABI/testing/sysfs-class-pktcdvd Using the pktcdvd debugfs interface diff --git a/Documentation/development-process/4.Coding b/Documentation/development-process/4.Coding index 83f5f5b365a3..e3cb6a56653a 100644 --- a/Documentation/development-process/4.Coding +++ b/Documentation/development-process/4.Coding @@ -278,7 +278,7 @@ enabled, a configurable percentage of memory allocations will be made to fail; these failures can be restricted to a specific range of code. Running with fault injection enabled allows the programmer to see how the code responds when things go badly. See -Documentation/fault-injection/fault-injection.text for more information on +Documentation/fault-injection/fault-injection.txt for more information on how to use this facility. Other kinds of errors can be found with the "sparse" static analysis tool. diff --git a/Documentation/devicetree/bindings/gpio/led.txt b/Documentation/devicetree/bindings/gpio/led.txt index 064db928c3c1..141087cf3107 100644 --- a/Documentation/devicetree/bindings/gpio/led.txt +++ b/Documentation/devicetree/bindings/gpio/led.txt @@ -8,7 +8,7 @@ node's name represents the name of the corresponding LED. LED sub-node properties: - gpios : Should specify the LED's GPIO, see "Specifying GPIO information - for devices" in Documentation/powerpc/booting-without-of.txt. Active + for devices" in Documentation/devicetree/booting-without-of.txt. Active low LEDs should be indicated using flags in the GPIO specifier. - label : (optional) The label for this LED. If omitted, the label is taken from the node name (excluding the unit address). diff --git a/Documentation/filesystems/caching/object.txt b/Documentation/filesystems/caching/object.txt index e8b0a35d8fe5..58313348da87 100644 --- a/Documentation/filesystems/caching/object.txt +++ b/Documentation/filesystems/caching/object.txt @@ -127,9 +127,9 @@ fscache_enqueue_object()). PROVISION OF CPU TIME --------------------- -The work to be done by the various states is given CPU time by the threads of -the slow work facility (see Documentation/slow-work.txt). This is used in -preference to the workqueue facility because: +The work to be done by the various states was given CPU time by the threads of +the slow work facility. This was used in preference to the workqueue facility +because: (1) Threads may be completely occupied for very long periods of time by a particular work item. These state actions may be doing sequences of diff --git a/Documentation/filesystems/locks.txt b/Documentation/filesystems/locks.txt index fab857accbd6..2cf81082581d 100644 --- a/Documentation/filesystems/locks.txt +++ b/Documentation/filesystems/locks.txt @@ -53,11 +53,12 @@ fcntl(), with all the problems that implies. 1.3 Mandatory Locking As A Mount Option --------------------------------------- -Mandatory locking, as described in 'Documentation/filesystems/mandatory.txt' -was prior to this release a general configuration option that was valid for -all mounted filesystems. This had a number of inherent dangers, not the -least of which was the ability to freeze an NFS server by asking it to read -a file for which a mandatory lock existed. +Mandatory locking, as described in +'Documentation/filesystems/mandatory-locking.txt' was prior to this release a +general configuration option that was valid for all mounted filesystems. This +had a number of inherent dangers, not the least of which was the ability to +freeze an NFS server by asking it to read a file for which a mandatory lock +existed. From this release of the kernel, mandatory locking can be turned on and off on a per-filesystem basis, using the mount options 'mand' and 'nomand'. diff --git a/Documentation/filesystems/nfs/idmapper.txt b/Documentation/filesystems/nfs/idmapper.txt index 9c8fd6148656..120fd3cf7fd9 100644 --- a/Documentation/filesystems/nfs/idmapper.txt +++ b/Documentation/filesystems/nfs/idmapper.txt @@ -47,7 +47,7 @@ request-key will find the first matching line and corresponding program. In this case, /some/other/program will handle all uid lookups and /usr/sbin/nfs.idmap will handle gid, user, and group lookups. -See for more information +See for more information about the request-key function. diff --git a/Documentation/filesystems/pohmelfs/design_notes.txt b/Documentation/filesystems/pohmelfs/design_notes.txt index dcf833587162..8aef91335701 100644 --- a/Documentation/filesystems/pohmelfs/design_notes.txt +++ b/Documentation/filesystems/pohmelfs/design_notes.txt @@ -58,8 +58,9 @@ data transfers. POHMELFS clients operate with a working set of servers and are capable of balancing read-only operations (like lookups or directory listings) between them according to IO priorities. Administrators can add or remove servers from the set at run-time via special commands (described -in Documentation/pohmelfs/info.txt file). Writes are replicated to all servers, which are connected -with write permission turned on. IO priority and permissions can be changed in run-time. +in Documentation/filesystems/pohmelfs/info.txt file). Writes are replicated to all servers, which +are connected with write permission turned on. IO priority and permissions can be changed in +run-time. POHMELFS is capable of full data channel encryption and/or strong crypto hashing. One can select any kernel supported cipher, encryption mode, hash type and operation mode diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt index db3b1aba32a3..0ec91f03422e 100644 --- a/Documentation/filesystems/proc.txt +++ b/Documentation/filesystems/proc.txt @@ -1263,7 +1263,7 @@ review the kernel documentation in the directory /usr/src/linux/Documentation. This chapter is heavily based on the documentation included in the pre 2.2 kernels, and became part of it in version 2.2.1 of the Linux kernel. -Please see: Documentation/sysctls/ directory for descriptions of these +Please see: Documentation/sysctl/ directory for descriptions of these entries. ------------------------------------------------------------------------------ diff --git a/Documentation/filesystems/vfs.txt b/Documentation/filesystems/vfs.txt index 52d8fb81cfff..43cbd0821721 100644 --- a/Documentation/filesystems/vfs.txt +++ b/Documentation/filesystems/vfs.txt @@ -1053,9 +1053,6 @@ manipulate dentries: and the dentry is returned. The caller must use dput() to free the dentry when it finishes using it. -For further information on dentry locking, please refer to the document -Documentation/filesystems/dentry-locking.txt. - Mount Options ============= diff --git a/Documentation/frv/booting.txt b/Documentation/frv/booting.txt index 37c4d84a0e57..9bdf4b46e741 100644 --- a/Documentation/frv/booting.txt +++ b/Documentation/frv/booting.txt @@ -180,9 +180,3 @@ separated by spaces: This tells the kernel what program to run initially. By default this is /sbin/init, but /sbin/sash or /bin/sh are common alternatives. - - (*) vdc=... - - This option configures the MB93493 companion chip visual display - driver. Please see Documentation/frv/mb93493/vdc.txt for more - information. diff --git a/Documentation/input/input.txt b/Documentation/input/input.txt index b93c08442e3c..b3d6787b4fb1 100644 --- a/Documentation/input/input.txt +++ b/Documentation/input/input.txt @@ -111,7 +111,7 @@ LCDs and many other purposes. The monitor and speaker controls should be easy to add to the hid/input interface, but for the UPSs and LCDs it doesn't make much sense. For this, -the hiddev interface was designed. See Documentation/usb/hiddev.txt +the hiddev interface was designed. See Documentation/hid/hiddev.txt for more information about it. The usage of the usbhid module is very simple, it takes no parameters, diff --git a/Documentation/kernel-docs.txt b/Documentation/kernel-docs.txt index 0e0734b509d8..eda1eb1451a0 100644 --- a/Documentation/kernel-docs.txt +++ b/Documentation/kernel-docs.txt @@ -300,7 +300,7 @@ * Title: "The Kernel Hacking HOWTO" Author: Various Talented People, and Rusty. - Location: in kernel tree, Documentation/DocBook/kernel-hacking/ + Location: in kernel tree, Documentation/DocBook/kernel-hacking.tmpl (must be built as "make {htmldocs | psdocs | pdfdocs}) Keywords: HOWTO, kernel contexts, deadlock, locking, modules, symbols, return conventions. @@ -351,7 +351,7 @@ * Title: "Linux Kernel Locking HOWTO" Author: Various Talented People, and Rusty. - Location: in kernel tree, Documentation/DocBook/kernel-locking/ + Location: in kernel tree, Documentation/DocBook/kernel-locking.tmpl (must be built as "make {htmldocs | psdocs | pdfdocs}) Keywords: locks, locking, spinlock, semaphore, atomic, race condition, bottom halves, tasklets, softirqs. diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 854ed5ca7e3f..be9370c764c8 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -163,7 +163,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. rsdt -- prefer RSDT over (default) XSDT copy_dsdt -- copy DSDT to memory - See also Documentation/power/pm.txt, pci=noacpi + See also Documentation/power/runtime_pm.txt, pci=noacpi acpi_rsdp= [ACPI,EFI,KEXEC] Pass the RSDP address to the kernel, mostly used @@ -319,7 +319,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. amijoy.map= [HW,JOY] Amiga joystick support Map of devices attached to JOY0DAT and JOY1DAT Format: , - See also Documentation/kernel/input/joystick.txt + See also Documentation/input/joystick.txt analog.map= [HW,JOY] Analog joystick and gamepad support Specifies type or capabilities of an analog joystick @@ -408,7 +408,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. bttv.radio= Most important insmod options are available as kernel args too. bttv.pll= See Documentation/video4linux/bttv/Insmod-options - bttv.tuner= and Documentation/video4linux/bttv/CARDLIST + bttv.tuner= bulk_remove=off [PPC] This parameter disables the use of the pSeries firmware feature for flushing multiple hpte entries @@ -724,7 +724,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. elevator= [IOSCHED] Format: {"cfq" | "deadline" | "noop"} - See Documentation/block/as-iosched.txt and + See Documentation/block/cfq-iosched.txt and Documentation/block/deadline-iosched.txt for details. elfcorehdr= [IA-64,PPC,SH,X86] @@ -765,7 +765,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. fail_make_request=[KNL] General fault injection mechanism. Format: ,,, - See also /Documentation/fault-injection/. + See also Documentation/fault-injection/. floppy= [HW] See Documentation/blockdev/floppy.txt. @@ -2375,7 +2375,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. Format: sonypi.*= [HW] Sony Programmable I/O Control Device driver - See Documentation/sonypi.txt + See Documentation/laptops/sonypi.txt specialix= [HW,SERIAL] Specialix multi-serial port adapter See Documentation/serial/specialix.txt. diff --git a/Documentation/laptops/thinkpad-acpi.txt b/Documentation/laptops/thinkpad-acpi.txt index 61815483efa3..3ff0dad62d36 100644 --- a/Documentation/laptops/thinkpad-acpi.txt +++ b/Documentation/laptops/thinkpad-acpi.txt @@ -736,7 +736,7 @@ status as "unknown". The available commands are: sysfs notes: The ThinkLight sysfs interface is documented by the LED class -documentation, in Documentation/leds-class.txt. The ThinkLight LED name +documentation, in Documentation/leds/leds-class.txt. The ThinkLight LED name is "tpacpi::thinklight". Due to limitations in the sysfs LED class, if the status of the ThinkLight @@ -833,7 +833,7 @@ All of the above can be turned on and off and can be made to blink. sysfs notes: The ThinkPad LED sysfs interface is described in detail by the LED class -documentation, in Documentation/leds-class.txt. +documentation, in Documentation/leds/leds-class.txt. The LEDs are named (in LED ID order, from 0 to 12): "tpacpi::power", "tpacpi:orange:batt", "tpacpi:green:batt", diff --git a/Documentation/media-framework.txt b/Documentation/media-framework.txt index 669b5fb03a86..3a0f879533ce 100644 --- a/Documentation/media-framework.txt +++ b/Documentation/media-framework.txt @@ -9,8 +9,8 @@ Introduction ------------ The media controller API is documented in DocBook format in -Documentation/DocBook/v4l/media-controller.xml. This document will focus on -the kernel-side implementation of the media framework. +Documentation/DocBook/media/v4l/media-controller.xml. This document will focus +on the kernel-side implementation of the media framework. Abstract media device model diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index f0d3a8026a56..2759f7c188f0 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -438,7 +438,7 @@ There are certain things that the Linux kernel memory barriers do not guarantee: [*] For information on bus mastering DMA and coherency please read: Documentation/PCI/pci.txt - Documentation/PCI/PCI-DMA-mapping.txt + Documentation/DMA-API-HOWTO.txt Documentation/DMA-API.txt diff --git a/Documentation/networking/scaling.txt b/Documentation/networking/scaling.txt index 58fd7414e6c0..729985ed05bd 100644 --- a/Documentation/networking/scaling.txt +++ b/Documentation/networking/scaling.txt @@ -73,7 +73,7 @@ of queues to IRQs can be determined from /proc/interrupts. By default, an IRQ may be handled on any CPU. Because a non-negligible part of packet processing takes place in receive interrupt handling, it is advantageous to spread receive interrupts between CPUs. To manually adjust the IRQ -affinity of each interrupt see Documentation/IRQ-affinity. Some systems +affinity of each interrupt see Documentation/IRQ-affinity.txt. Some systems will be running irqbalance, a daemon that dynamically optimizes IRQ assignments and as a result may override any manual settings. diff --git a/Documentation/power/basic-pm-debugging.txt b/Documentation/power/basic-pm-debugging.txt index ddd78172ef73..05a7fe76232d 100644 --- a/Documentation/power/basic-pm-debugging.txt +++ b/Documentation/power/basic-pm-debugging.txt @@ -173,7 +173,7 @@ kernel messages using the serial console. This may provide you with some information about the reasons of the suspend (resume) failure. Alternatively, it may be possible to use a FireWire port for debugging with firescope (ftp://ftp.firstfloor.org/pub/ak/firescope/). On x86 it is also possible to -use the PM_TRACE mechanism documented in Documentation/s2ram.txt . +use the PM_TRACE mechanism documented in Documentation/power/s2ram.txt . 2. Testing suspend to RAM (STR) diff --git a/Documentation/power/userland-swsusp.txt b/Documentation/power/userland-swsusp.txt index 1101bee4e822..0e870825c1b9 100644 --- a/Documentation/power/userland-swsusp.txt +++ b/Documentation/power/userland-swsusp.txt @@ -77,7 +77,8 @@ SNAPSHOT_SET_SWAP_AREA - set the resume partition and the offset (in resume_swap_area, as defined in kernel/power/suspend_ioctls.h, containing the resume device specification and the offset); for swap partitions the offset is always 0, but it is different from zero for - swap files (see Documentation/swsusp-and-swap-files.txt for details). + swap files (see Documentation/power/swsusp-and-swap-files.txt for + details). SNAPSHOT_PLATFORM_SUPPORT - enable/disable the hibernation platform support, depending on the argument value (enable, if the argument is nonzero) diff --git a/Documentation/rfkill.txt b/Documentation/rfkill.txt index 83668e5dd17f..03c9d9299c6b 100644 --- a/Documentation/rfkill.txt +++ b/Documentation/rfkill.txt @@ -117,5 +117,4 @@ The contents of these variables corresponds to the "name", "state" and "type" sysfs files explained above. -For further details consult Documentation/ABI/stable/dev-rfkill and -Documentation/ABI/stable/sysfs-class-rfkill. +For further details consult Documentation/ABI/stable/sysfs-class-rfkill. diff --git a/Documentation/scsi/aic7xxx_old.txt b/Documentation/scsi/aic7xxx_old.txt index 7bd210ab45a1..ecfc474f36a8 100644 --- a/Documentation/scsi/aic7xxx_old.txt +++ b/Documentation/scsi/aic7xxx_old.txt @@ -444,7 +444,7 @@ linux-1.1.x and fairly stable since linux-1.2.x, and are also in FreeBSD Kernel Compile options ------------------------------ The various kernel compile time options for this driver are now fairly - well documented in the file Documentation/Configure.help. In order to + well documented in the file drivers/scsi/Kconfig. In order to see this documentation, you need to use one of the advanced configuration programs (menuconfig and xconfig). If you are using the "make menuconfig" method of configuring your kernel, then you would simply highlight the diff --git a/Documentation/scsi/scsi_mid_low_api.txt b/Documentation/scsi/scsi_mid_low_api.txt index 5f17d29c59b5..a340b18cd4eb 100644 --- a/Documentation/scsi/scsi_mid_low_api.txt +++ b/Documentation/scsi/scsi_mid_low_api.txt @@ -55,11 +55,6 @@ or in the same directory as the C source code. For example to find a url about the USB mass storage driver see the /usr/src/linux/drivers/usb/storage directory. -The Linux kernel source Documentation/DocBook/scsidrivers.tmpl file -refers to this file. With the appropriate DocBook tool-set, this permits -users to generate html, ps and pdf renderings of information within this -file (e.g. the interface functions). - Driver structure ================ Traditionally an LLD for the SCSI subsystem has been at least two files in diff --git a/Documentation/security/keys-trusted-encrypted.txt b/Documentation/security/keys-trusted-encrypted.txt index 5f50ccabfc8a..c9e4855ed3d7 100644 --- a/Documentation/security/keys-trusted-encrypted.txt +++ b/Documentation/security/keys-trusted-encrypted.txt @@ -156,4 +156,5 @@ Load an encrypted key "evm" from saved blob: Other uses for trusted and encrypted keys, such as for disk and file encryption are anticipated. In particular the new format 'ecryptfs' has been defined in in order to use encrypted keys to mount an eCryptfs filesystem. More details -about the usage can be found in the file 'Documentation/keys-ecryptfs.txt'. +about the usage can be found in the file +'Documentation/security/keys-ecryptfs.txt'. diff --git a/Documentation/sound/oss/PAS16 b/Documentation/sound/oss/PAS16 index 951b3dce51b4..3dca4b75988e 100644 --- a/Documentation/sound/oss/PAS16 +++ b/Documentation/sound/oss/PAS16 @@ -60,8 +60,7 @@ With PAS16 you can use two audio device files at the same time. /dev/dsp (and The new stuff for 2.3.99 and later ============================================================================ -The following configuration options from Documentation/Configure.help -are relevant to configuring the PAS16: +The following configuration options are relevant to configuring the PAS16: Sound card support CONFIG_SOUND diff --git a/Documentation/spi/pxa2xx b/Documentation/spi/pxa2xx index 00511e08db78..3352f97430e4 100644 --- a/Documentation/spi/pxa2xx +++ b/Documentation/spi/pxa2xx @@ -2,7 +2,7 @@ PXA2xx SPI on SSP driver HOWTO =================================================== This a mini howto on the pxa2xx_spi driver. The driver turns a PXA2xx synchronous serial port into a SPI master controller -(see Documentation/spi/spi_summary). The driver has the following features +(see Documentation/spi/spi-summary). The driver has the following features - Support for any PXA2xx SSP - SSP PIO and SSP DMA data transfers. @@ -85,7 +85,7 @@ Declaring Slave Devices ----------------------- Typically each SPI slave (chip) is defined in the arch/.../mach-*/board-*.c using the "spi_board_info" structure found in "linux/spi/spi.h". See -"Documentation/spi/spi_summary" for additional information. +"Documentation/spi/spi-summary" for additional information. Each slave device attached to the PXA must provide slave specific configuration information via the structure "pxa2xx_spi_chip" found in diff --git a/Documentation/timers/highres.txt b/Documentation/timers/highres.txt index 21332233cef1..e8789976e77c 100644 --- a/Documentation/timers/highres.txt +++ b/Documentation/timers/highres.txt @@ -30,7 +30,7 @@ hrtimer base infrastructure --------------------------- The hrtimer base infrastructure was merged into the 2.6.16 kernel. Details of -the base implementation are covered in Documentation/hrtimers/hrtimer.txt. See +the base implementation are covered in Documentation/timers/hrtimers.txt. See also figure #2 (OLS slides p. 15) The main differences to the timer wheel, which holds the armed timer_list type diff --git a/Documentation/usb/dma.txt b/Documentation/usb/dma.txt index 84ef865237db..444651e70d95 100644 --- a/Documentation/usb/dma.txt +++ b/Documentation/usb/dma.txt @@ -7,7 +7,7 @@ API OVERVIEW The big picture is that USB drivers can continue to ignore most DMA issues, though they still must provide DMA-ready buffers (see -Documentation/PCI/PCI-DMA-mapping.txt). That's how they've worked through +Documentation/DMA-API-HOWTO.txt). That's how they've worked through the 2.4 (and earlier) kernels. OR: they can now be DMA-aware. @@ -57,7 +57,7 @@ and effects like cache-trashing can impose subtle penalties. force a consistent memory access ordering by using memory barriers. It's not using a streaming DMA mapping, so it's good for small transfers on systems where the I/O would otherwise thrash an IOMMU mapping. (See - Documentation/PCI/PCI-DMA-mapping.txt for definitions of "coherent" and + Documentation/DMA-API-HOWTO.txt for definitions of "coherent" and "streaming" DMA mappings.) Asking for 1/Nth of a page (as well as asking for N pages) is reasonably @@ -88,7 +88,7 @@ WORKING WITH EXISTING BUFFERS Existing buffers aren't usable for DMA without first being mapped into the DMA address space of the device. However, most buffers passed to your driver can safely be used with such DMA mapping. (See the first section -of Documentation/PCI/PCI-DMA-mapping.txt, titled "What memory is DMA-able?") +of Documentation/DMA-API-HOWTO.txt, titled "What memory is DMA-able?") - When you're using scatterlists, you can map everything at once. On some systems, this kicks in an IOMMU and turns the scatterlists into single diff --git a/Documentation/virtual/lguest/lguest.c b/Documentation/virtual/lguest/lguest.c index d928c134dee6..c095d79cae73 100644 --- a/Documentation/virtual/lguest/lguest.c +++ b/Documentation/virtual/lguest/lguest.c @@ -436,7 +436,7 @@ static unsigned long load_bzimage(int fd) /* * Go back to the start of the file and read the header. It should be - * a Linux boot header (see Documentation/x86/i386/boot.txt) + * a Linux boot header (see Documentation/x86/boot.txt) */ lseek(fd, 0, SEEK_SET); read(fd, &boot, sizeof(boot)); diff --git a/Documentation/vm/numa b/Documentation/vm/numa index a200a386429d..ade01274212d 100644 --- a/Documentation/vm/numa +++ b/Documentation/vm/numa @@ -109,11 +109,11 @@ to improve NUMA locality using various CPU affinity command line interfaces, such as taskset(1) and numactl(1), and program interfaces such as sched_setaffinity(2). Further, one can modify the kernel's default local allocation behavior using Linux NUMA memory policy. -[see Documentation/vm/numa_memory_policy.] +[see Documentation/vm/numa_memory_policy.txt.] System administrators can restrict the CPUs and nodes' memories that a non- privileged user can specify in the scheduling or NUMA commands and functions -using control groups and CPUsets. [see Documentation/cgroups/CPUsets.txt] +using control groups and CPUsets. [see Documentation/cgroups/cpusets.txt] On architectures that do not hide memoryless nodes, Linux will include only zones [nodes] with memory in the zonelists. This means that for a memoryless diff --git a/Documentation/vm/slub.txt b/Documentation/vm/slub.txt index 07375e73981a..f464f47bc60d 100644 --- a/Documentation/vm/slub.txt +++ b/Documentation/vm/slub.txt @@ -17,7 +17,7 @@ data and perform operation on the slabs. By default slabinfo only lists slabs that have data in them. See "slabinfo -h" for more options when running the command. slabinfo can be compiled with -gcc -o slabinfo Documentation/vm/slabinfo.c +gcc -o slabinfo tools/slub/slabinfo.c Some of the modes of operation of slabinfo require that slub debugging be enabled on the command line. F.e. no tracking information will be diff --git a/arch/alpha/kernel/srm_env.c b/arch/alpha/kernel/srm_env.c index f0df3fbd8402..b9fc6c309d2e 100644 --- a/arch/alpha/kernel/srm_env.c +++ b/arch/alpha/kernel/srm_env.c @@ -4,9 +4,8 @@ * * (C) 2001,2002,2006 by Jan-Benedict Glaw * - * This driver is at all a modified version of Erik Mouw's - * Documentation/DocBook/procfs_example.c, so: thank - * you, Erik! He can be reached via email at + * This driver is a modified version of Erik Mouw's example proc + * interface, so: thank you, Erik! He can be reached via email at * . It is based on an idea * provided by DEC^WCompaq^WIntel's "Jumpstart" CD. They * included a patch like this as well. Thanks for idea! diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3269576dbfa8..05b53941b819 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1374,7 +1374,7 @@ config SMP processor machines. On a single processor machine, the kernel will run faster if you say N here. - See also , + See also , and the SMP-HOWTO available at . diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index d66605dea55a..4bdb77bb5e62 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -238,7 +238,7 @@ extern void _memset_io(volatile void __iomem *, int, size_t); * ioremap and friends. * * ioremap takes a PCI memory address, as specified in - * Documentation/IO-mapping.txt. + * Documentation/io-mapping.txt. * */ #ifndef __arch_ioremap diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c index acc600f5e72f..937c42845df9 100644 --- a/arch/arm/mach-pxa/xcep.c +++ b/arch/arm/mach-pxa/xcep.c @@ -142,8 +142,7 @@ static struct platform_device *devices[] __initdata = { /* We have to state that there are HWMON devices on the I2C bus on XCEP. * Drivers for HWMON verify capabilities of the adapter when loading and - * refuse to attach if the adapter doesn't support HWMON class of devices. - * See also Documentation/i2c/porting-clients. */ + * refuse to attach if the adapter doesn't support HWMON class of devices. */ static struct i2c_pxa_platform_data xcep_i2c_platform_data = { .class = I2C_CLASS_HWMON }; diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c index 80241fe03f50..f5f4ef149aac 100644 --- a/arch/ia64/hp/common/sba_iommu.c +++ b/arch/ia64/hp/common/sba_iommu.c @@ -915,7 +915,7 @@ sba_mark_invalid(struct ioc *ioc, dma_addr_t iova, size_t byte_cnt) * @dir: R/W or both. * @attrs: optional dma attributes * - * See Documentation/PCI/PCI-DMA-mapping.txt + * See Documentation/DMA-API-HOWTO.txt */ static dma_addr_t sba_map_page(struct device *dev, struct page *page, unsigned long poff, size_t size, @@ -1044,7 +1044,7 @@ sba_mark_clean(struct ioc *ioc, dma_addr_t iova, size_t size) * @dir: R/W or both. * @attrs: optional dma attributes * - * See Documentation/PCI/PCI-DMA-mapping.txt + * See Documentation/DMA-API-HOWTO.txt */ static void sba_unmap_page(struct device *dev, dma_addr_t iova, size_t size, enum dma_data_direction dir, struct dma_attrs *attrs) @@ -1127,7 +1127,7 @@ void sba_unmap_single_attrs(struct device *dev, dma_addr_t iova, size_t size, * @size: number of bytes mapped in driver buffer. * @dma_handle: IOVA of new buffer. * - * See Documentation/PCI/PCI-DMA-mapping.txt + * See Documentation/DMA-API-HOWTO.txt */ static void * sba_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flags) @@ -1190,7 +1190,7 @@ sba_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp * @vaddr: virtual address IOVA of "consistent" buffer. * @dma_handler: IO virtual address of "consistent" buffer. * - * See Documentation/PCI/PCI-DMA-mapping.txt + * See Documentation/DMA-API-HOWTO.txt */ static void sba_free_coherent (struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle) @@ -1453,7 +1453,7 @@ static void sba_unmap_sg_attrs(struct device *dev, struct scatterlist *sglist, * @dir: R/W or both. * @attrs: optional dma attributes * - * See Documentation/PCI/PCI-DMA-mapping.txt + * See Documentation/DMA-API-HOWTO.txt */ static int sba_map_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents, enum dma_data_direction dir, @@ -1549,7 +1549,7 @@ static int sba_map_sg_attrs(struct device *dev, struct scatterlist *sglist, * @dir: R/W or both. * @attrs: optional dma attributes * - * See Documentation/PCI/PCI-DMA-mapping.txt + * See Documentation/DMA-API-HOWTO.txt */ static void sba_unmap_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents, enum dma_data_direction dir, diff --git a/arch/m68k/q40/README b/arch/m68k/q40/README index b26d5f55e91d..93f4c4cd3c45 100644 --- a/arch/m68k/q40/README +++ b/arch/m68k/q40/README @@ -31,7 +31,7 @@ drivers used by the Q40, apart from the very obvious (console etc.): char/joystick/* # most of this should work, not # in default config.in block/q40ide.c # startup for ide - ide* # see Documentation/ide.txt + ide* # see Documentation/ide/ide.txt floppy.c # normal PC driver, DMA emu in asm/floppy.h # and arch/m68k/kernel/entry.S # see drivers/block/README.fd diff --git a/arch/microblaze/include/asm/dma-mapping.h b/arch/microblaze/include/asm/dma-mapping.h index 8fbb0ec10233..a569514cf19f 100644 --- a/arch/microblaze/include/asm/dma-mapping.h +++ b/arch/microblaze/include/asm/dma-mapping.h @@ -16,7 +16,7 @@ #define _ASM_MICROBLAZE_DMA_MAPPING_H /* - * See Documentation/PCI/PCI-DMA-mapping.txt and + * See Documentation/DMA-API-HOWTO.txt and * Documentation/DMA-API.txt for documentation. */ diff --git a/arch/mips/include/asm/lasat/lasat.h b/arch/mips/include/asm/lasat/lasat.h index a1ada1c27c16..e8ff70f80e13 100644 --- a/arch/mips/include/asm/lasat/lasat.h +++ b/arch/mips/include/asm/lasat/lasat.h @@ -41,10 +41,8 @@ enum lasat_mtdparts { /* * The format of the data record in the EEPROM. - * See Documentation/LASAT/eeprom.txt for a detailed description - * of the fields in this struct, and the LASAT Hardware Configuration - * field specification for a detailed description of the config - * field. + * See the LASAT Hardware Configuration field specification for a detailed + * description of the config field. */ #include diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig index 1f870340ebdd..f093b3a8a4a1 100644 --- a/arch/mn10300/Kconfig +++ b/arch/mn10300/Kconfig @@ -195,7 +195,7 @@ config SMP singleprocessor machines. On a singleprocessor machine, the kernel will run faster if you say N here. - See also , + See also , and the SMP-HOWTO available at . diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c index 2623d19f4f4c..2381df83bd00 100644 --- a/arch/mn10300/kernel/irq.c +++ b/arch/mn10300/kernel/irq.c @@ -260,7 +260,6 @@ void set_intr_level(int irq, u16 level) /* * mark an interrupt to be ACK'd after interrupt handlers have been run rather * than before - * - see Documentation/mn10300/features.txt */ void mn10300_set_lateack_irq_type(int irq) { diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig index 4558bafbd1a2..9460e1c266dd 100644 --- a/arch/openrisc/Kconfig +++ b/arch/openrisc/Kconfig @@ -1,6 +1,6 @@ # # For a description of the syntax of this configuration file, -# see Documentation/kbuild/config-language.txt. +# see Documentation/kbuild/kconfig-language.txt. # config OPENRISC diff --git a/arch/openrisc/include/asm/dma-mapping.h b/arch/openrisc/include/asm/dma-mapping.h index 60b472233900..b206ba4608b2 100644 --- a/arch/openrisc/include/asm/dma-mapping.h +++ b/arch/openrisc/include/asm/dma-mapping.h @@ -18,7 +18,7 @@ #define __ASM_OPENRISC_DMA_MAPPING_H /* - * See Documentation/PCI/PCI-DMA-mapping.txt and + * See Documentation/DMA-API-HOWTO.txt and * Documentation/DMA-API.txt for documentation. * * This file is written with the intention of eventually moving over diff --git a/arch/parisc/include/asm/dma-mapping.h b/arch/parisc/include/asm/dma-mapping.h index 890531e32fe8..467bbd510eac 100644 --- a/arch/parisc/include/asm/dma-mapping.h +++ b/arch/parisc/include/asm/dma-mapping.h @@ -5,7 +5,7 @@ #include #include -/* See Documentation/PCI/PCI-DMA-mapping.txt */ +/* See Documentation/DMA-API-HOWTO.txt */ struct hppa_dma_ops { int (*dma_supported)(struct device *dev, u64 mask); void *(*alloc_consistent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag); diff --git a/arch/parisc/kernel/pci-dma.c b/arch/parisc/kernel/pci-dma.c index a029f74a3c5c..d047edea2504 100644 --- a/arch/parisc/kernel/pci-dma.c +++ b/arch/parisc/kernel/pci-dma.c @@ -2,7 +2,7 @@ ** PARISC 1.1 Dynamic DMA mapping support. ** This implementation is for PA-RISC platforms that do not support ** I/O TLBs (aka DMA address translation hardware). -** See Documentation/PCI/PCI-DMA-mapping.txt for interface definitions. +** See Documentation/DMA-API-HOWTO.txt for interface definitions. ** ** (c) Copyright 1999,2000 Hewlett-Packard Company ** (c) Copyright 2000 Grant Grundler diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h index 0947b36e534c..5e0b6d511e14 100644 --- a/arch/powerpc/include/asm/qe.h +++ b/arch/powerpc/include/asm/qe.h @@ -196,7 +196,7 @@ static inline int qe_alive_during_sleep(void) /* Structure that defines QE firmware binary files. * - * See Documentation/powerpc/qe-firmware.txt for a description of these + * See Documentation/powerpc/qe_firmware.txt for a description of these * fields. */ struct qe_firmware { diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c index 904c6cbaf45b..3363fbc964f8 100644 --- a/arch/powerpc/sysdev/qe_lib/qe.c +++ b/arch/powerpc/sysdev/qe_lib/qe.c @@ -382,7 +382,7 @@ static void qe_upload_microcode(const void *base, /* * Upload a microcode to the I-RAM at a specific address. * - * See Documentation/powerpc/qe-firmware.txt for information on QE microcode + * See Documentation/powerpc/qe_firmware.txt for information on QE microcode * uploading. * * Currently, only version 1 is supported, so the 'version' field must be diff --git a/arch/unicore32/include/asm/io.h b/arch/unicore32/include/asm/io.h index 4bd87f3d13d4..1a5c5a5eb39c 100644 --- a/arch/unicore32/include/asm/io.h +++ b/arch/unicore32/include/asm/io.h @@ -32,7 +32,7 @@ extern void __uc32_iounmap(volatile void __iomem *addr); * ioremap and friends. * * ioremap takes a PCI memory address, as specified in - * Documentation/IO-mapping.txt. + * Documentation/io-mapping.txt. * */ #define ioremap(cookie, size) __uc32_ioremap(cookie, size) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 6a47bb22657f..9a4a267a8a55 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -279,7 +279,7 @@ config SMP Y to "Enhanced Real Time Clock Support", below. The "Advanced Power Management" code will be disabled if you say Y here. - See also , + See also , and the SMP-HOWTO available at . diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug index c0f8a5c88910..bf56e1793272 100644 --- a/arch/x86/Kconfig.debug +++ b/arch/x86/Kconfig.debug @@ -139,7 +139,7 @@ config IOMMU_DEBUG code. When you use it make sure you have a big enough IOMMU/AGP aperture. Most of the options enabled by this can be set more finegrained using the iommu= command line - options. See Documentation/x86_64/boot-options.txt for more + options. See Documentation/x86/x86_64/boot-options.txt for more details. config IOMMU_STRESS diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S index 93e689f4bd86..bdb4d458ec8c 100644 --- a/arch/x86/boot/header.S +++ b/arch/x86/boot/header.S @@ -129,7 +129,7 @@ start_sys_seg: .word SYSSEG # obsolete and meaningless, but just type_of_loader: .byte 0 # 0 means ancient bootloader, newer # bootloaders know to change this. - # See Documentation/i386/boot.txt for + # See Documentation/x86/boot.txt for # assigned ids # flags, unused bits must be zero (RFU) bit within loadflags diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h index d4c419f883a0..ed3065fd6314 100644 --- a/arch/x86/include/asm/dma-mapping.h +++ b/arch/x86/include/asm/dma-mapping.h @@ -2,7 +2,7 @@ #define _ASM_X86_DMA_MAPPING_H /* - * IOMMU interface. See Documentation/PCI/PCI-DMA-mapping.txt and + * IOMMU interface. See Documentation/DMA-API-HOWTO.txt and * Documentation/DMA-API.txt for documentation. */ diff --git a/arch/x86/kernel/amd_gart_64.c b/arch/x86/kernel/amd_gart_64.c index 8a439d364b94..b1e7c7f7a0af 100644 --- a/arch/x86/kernel/amd_gart_64.c +++ b/arch/x86/kernel/amd_gart_64.c @@ -5,7 +5,7 @@ * This allows to use PCI devices that only support 32bit addresses on systems * with more than 4GB. * - * See Documentation/PCI/PCI-DMA-mapping.txt for the interface specification. + * See Documentation/DMA-API-HOWTO.txt for the interface specification. * * Copyright 2002 Andi Kleen, SuSE Labs. * Subject to the GNU General Public License v2 only. diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c index 0371c484bb8a..a46bd383953c 100644 --- a/arch/x86/kernel/apm_32.c +++ b/arch/x86/kernel/apm_32.c @@ -249,8 +249,6 @@ extern int (*console_blank_hook)(int); #define APM_MINOR_DEV 134 /* - * See Documentation/Config.help for the configuration options. - * * Various options can be changed at boot time as follows: * (We allow underscores for compatibility with the modules code) * apm=on/off enable/disable APM diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c index b49d00da2aed..622872054fbe 100644 --- a/arch/x86/kernel/pci-dma.c +++ b/arch/x86/kernel/pci-dma.c @@ -117,8 +117,8 @@ again: } /* - * See for the iommu kernel parameter - * documentation. + * See for the iommu kernel + * parameter documentation. */ static __init int iommu_setup(char *p) { diff --git a/drivers/char/apm-emulation.c b/drivers/char/apm-emulation.c index a7346ab97a3c..ae6a93306325 100644 --- a/drivers/char/apm-emulation.c +++ b/drivers/char/apm-emulation.c @@ -40,10 +40,7 @@ #define APM_MINOR_DEV 134 /* - * See Documentation/Config.help for the configuration options. - * - * Various options can be changed at boot time as follows: - * (We allow underscores for compatibility with the modules code) + * One option can be changed at boot time as follows: * apm=on/off enable/disable APM */ diff --git a/drivers/input/misc/rotary_encoder.c b/drivers/input/misc/rotary_encoder.c index 2c8b84dd9dac..2be21694fac1 100644 --- a/drivers/input/misc/rotary_encoder.c +++ b/drivers/input/misc/rotary_encoder.c @@ -7,7 +7,7 @@ * state machine code inspired by code from Tim Ruetz * * A generic driver for rotary encoders connected to GPIO lines. - * See file:Documentation/input/rotary_encoder.txt for more information + * See file:Documentation/input/rotary-encoder.txt for more information * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index b591e726a6fa..807c875f1c2e 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -400,7 +400,7 @@ config LEDS_TRIGGER_TIMER This allows LEDs to be controlled by a programmable timer via sysfs. Some LED hardware can be programmed to start blinking the LED without any further software interaction. - For more details read Documentation/leds-class.txt. + For more details read Documentation/leds/leds-class.txt. If unsure, say Y. diff --git a/drivers/media/dvb/dvb-usb/af9005-remote.c b/drivers/media/dvb/dvb-usb/af9005-remote.c index c3bc64ed405c..7e3961d0db6b 100644 --- a/drivers/media/dvb/dvb-usb/af9005-remote.c +++ b/drivers/media/dvb/dvb-usb/af9005-remote.c @@ -21,7 +21,7 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * - * see Documentation/dvb/REDME.dvb-usb for more information + * see Documentation/dvb/README.dvb-usb for more information */ #include "af9005.h" /* debug */ diff --git a/drivers/media/dvb/dvb-usb/af9005.c b/drivers/media/dvb/dvb-usb/af9005.c index 51f6439dcfd5..0351c0e52dd2 100644 --- a/drivers/media/dvb/dvb-usb/af9005.c +++ b/drivers/media/dvb/dvb-usb/af9005.c @@ -19,7 +19,7 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * - * see Documentation/dvb/REDME.dvb-usb for more information + * see Documentation/dvb/README.dvb-usb for more information */ #include "af9005.h" diff --git a/drivers/media/dvb/frontends/dib3000.h b/drivers/media/dvb/frontends/dib3000.h index ba917359fa65..404f63a6f26b 100644 --- a/drivers/media/dvb/frontends/dib3000.h +++ b/drivers/media/dvb/frontends/dib3000.h @@ -17,7 +17,7 @@ * Amaury Demol (ademol@dibcom.fr) from DiBcom for providing specs and driver * sources, on which this driver (and the dvb-dibusb) are based. * - * see Documentation/dvb/README.dibusb for more information + * see Documentation/dvb/README.dvb-usb for more information * */ diff --git a/drivers/media/dvb/frontends/dib3000mb.c b/drivers/media/dvb/frontends/dib3000mb.c index e80c59796368..437904cbf3e6 100644 --- a/drivers/media/dvb/frontends/dib3000mb.c +++ b/drivers/media/dvb/frontends/dib3000mb.c @@ -17,7 +17,7 @@ * Amaury Demol (ademol@dibcom.fr) from DiBcom for providing specs and driver * sources, on which this driver (and the dvb-dibusb) are based. * - * see Documentation/dvb/README.dibusb for more information + * see Documentation/dvb/README.dvb-usb for more information * */ diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 4be8373d43e5..66b616ebe536 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -142,7 +142,7 @@ config MTD_OF_PARTS help This provides a partition parsing function which derives the partition map from the children of the flash node, - as described in Documentation/powerpc/booting-without-of.txt. + as described in Documentation/devicetree/booting-without-of.txt. config MTD_AR7_PARTS tristate "TI AR7 partitioning support" diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 8d0314dbd946..8b8efe52b228 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -1063,8 +1063,7 @@ config SMSC911X Say Y here if you want support for SMSC LAN911x and LAN921x families of ethernet controllers. - To compile this driver as a module, choose M here and read - . The module + To compile this driver as a module, choose M here. The module will be called smsc911x. config SMSC911X_ARCH_HOOKS diff --git a/drivers/net/can/sja1000/sja1000_of_platform.c b/drivers/net/can/sja1000/sja1000_of_platform.c index cee6ba2b8b58..c3dd9d09be57 100644 --- a/drivers/net/can/sja1000/sja1000_of_platform.c +++ b/drivers/net/can/sja1000/sja1000_of_platform.c @@ -29,7 +29,7 @@ * nxp,external-clock-frequency = <16000000>; * }; * - * See "Documentation/powerpc/dts-bindings/can/sja1000.txt" for further + * See "Documentation/devicetree/bindings/net/can/sja1000.txt" for further * information. */ diff --git a/drivers/net/tulip/21142.c b/drivers/net/tulip/21142.c index 092c3faa882a..25b8deedbef8 100644 --- a/drivers/net/tulip/21142.c +++ b/drivers/net/tulip/21142.c @@ -7,9 +7,6 @@ This software may be used and distributed according to the terms of the GNU General Public License, incorporated herein by reference. - Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html} - for more information on this driver. - DC21143 manual "21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller Hardware Reference Manual" is currently available at : http://developer.intel.com/design/network/manuals/278074.htm diff --git a/drivers/net/tulip/eeprom.c b/drivers/net/tulip/eeprom.c index fa5eee925f25..14d5b611783d 100644 --- a/drivers/net/tulip/eeprom.c +++ b/drivers/net/tulip/eeprom.c @@ -7,8 +7,6 @@ This software may be used and distributed according to the terms of the GNU General Public License, incorporated herein by reference. - Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html} - for more information on this driver. Please submit bug reports to http://bugzilla.kernel.org/. */ diff --git a/drivers/net/tulip/interrupt.c b/drivers/net/tulip/interrupt.c index 5350d753e0ff..4fb8c8c0a420 100644 --- a/drivers/net/tulip/interrupt.c +++ b/drivers/net/tulip/interrupt.c @@ -7,10 +7,7 @@ This software may be used and distributed according to the terms of the GNU General Public License, incorporated herein by reference. - Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html} - for more information on this driver. Please submit bugs to http://bugzilla.kernel.org/ . - */ #include diff --git a/drivers/net/tulip/media.c b/drivers/net/tulip/media.c index 4bd13922875d..beeb17b52ad4 100644 --- a/drivers/net/tulip/media.c +++ b/drivers/net/tulip/media.c @@ -7,9 +7,6 @@ This software may be used and distributed according to the terms of the GNU General Public License, incorporated herein by reference. - Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html} - for more information on this driver. - Please submit bugs to http://bugzilla.kernel.org/ . */ diff --git a/drivers/net/tulip/pnic.c b/drivers/net/tulip/pnic.c index 52d898bdbeb4..9c16e4ad02a6 100644 --- a/drivers/net/tulip/pnic.c +++ b/drivers/net/tulip/pnic.c @@ -7,9 +7,6 @@ This software may be used and distributed according to the terms of the GNU General Public License, incorporated herein by reference. - Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html} - for more information on this driver. - Please submit bugs to http://bugzilla.kernel.org/ . */ diff --git a/drivers/net/tulip/pnic2.c b/drivers/net/tulip/pnic2.c index 93358ee4d830..04a7e477eaff 100644 --- a/drivers/net/tulip/pnic2.c +++ b/drivers/net/tulip/pnic2.c @@ -8,9 +8,6 @@ This software may be used and distributed according to the terms of the GNU General Public License, incorporated herein by reference. - Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html} - for more information on this driver. - Please submit bugs to http://bugzilla.kernel.org/ . */ diff --git a/drivers/net/tulip/timer.c b/drivers/net/tulip/timer.c index 2017faf2d0e6..19078d28ffb9 100644 --- a/drivers/net/tulip/timer.c +++ b/drivers/net/tulip/timer.c @@ -7,9 +7,6 @@ This software may be used and distributed according to the terms of the GNU General Public License, incorporated herein by reference. - Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html} - for more information on this driver. - Please submit bugs to http://bugzilla.kernel.org/ . */ diff --git a/drivers/net/tulip/tulip.h b/drivers/net/tulip/tulip.h index 9db528967da9..fb3887c18dc6 100644 --- a/drivers/net/tulip/tulip.h +++ b/drivers/net/tulip/tulip.h @@ -7,9 +7,6 @@ This software may be used and distributed according to the terms of the GNU General Public License, incorporated herein by reference. - Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html} - for more information on this driver. - Please submit bugs to http://bugzilla.kernel.org/ . */ diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c index 1246998a677c..b905c0dc5648 100644 --- a/drivers/net/tulip/tulip_core.c +++ b/drivers/net/tulip/tulip_core.c @@ -6,9 +6,6 @@ This software may be used and distributed according to the terms of the GNU General Public License, incorporated herein by reference. - Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html} - for more information on this driver. - Please submit bugs to http://bugzilla.kernel.org/ . */ diff --git a/drivers/parisc/sba_iommu.c b/drivers/parisc/sba_iommu.c index 57a6d19eba4c..a6f762188bc3 100644 --- a/drivers/parisc/sba_iommu.c +++ b/drivers/parisc/sba_iommu.c @@ -668,7 +668,7 @@ sba_mark_invalid(struct ioc *ioc, dma_addr_t iova, size_t byte_cnt) * @dev: instance of PCI owned by the driver that's asking * @mask: number of address bits this PCI device can handle * - * See Documentation/PCI/PCI-DMA-mapping.txt + * See Documentation/DMA-API-HOWTO.txt */ static int sba_dma_supported( struct device *dev, u64 mask) { @@ -680,7 +680,7 @@ static int sba_dma_supported( struct device *dev, u64 mask) return(0); } - /* Documentation/PCI/PCI-DMA-mapping.txt tells drivers to try 64-bit + /* Documentation/DMA-API-HOWTO.txt tells drivers to try 64-bit * first, then fall back to 32-bit if that fails. * We are just "encouraging" 32-bit DMA masks here since we can * never allow IOMMU bypass unless we add special support for ZX1. @@ -706,7 +706,7 @@ static int sba_dma_supported( struct device *dev, u64 mask) * @size: number of bytes to map in driver buffer. * @direction: R/W or both. * - * See Documentation/PCI/PCI-DMA-mapping.txt + * See Documentation/DMA-API-HOWTO.txt */ static dma_addr_t sba_map_single(struct device *dev, void *addr, size_t size, @@ -785,7 +785,7 @@ sba_map_single(struct device *dev, void *addr, size_t size, * @size: number of bytes mapped in driver buffer. * @direction: R/W or both. * - * See Documentation/PCI/PCI-DMA-mapping.txt + * See Documentation/DMA-API-HOWTO.txt */ static void sba_unmap_single(struct device *dev, dma_addr_t iova, size_t size, @@ -861,7 +861,7 @@ sba_unmap_single(struct device *dev, dma_addr_t iova, size_t size, * @size: number of bytes mapped in driver buffer. * @dma_handle: IOVA of new buffer. * - * See Documentation/PCI/PCI-DMA-mapping.txt + * See Documentation/DMA-API-HOWTO.txt */ static void *sba_alloc_consistent(struct device *hwdev, size_t size, dma_addr_t *dma_handle, gfp_t gfp) @@ -892,7 +892,7 @@ static void *sba_alloc_consistent(struct device *hwdev, size_t size, * @vaddr: virtual address IOVA of "consistent" buffer. * @dma_handler: IO virtual address of "consistent" buffer. * - * See Documentation/PCI/PCI-DMA-mapping.txt + * See Documentation/DMA-API-HOWTO.txt */ static void sba_free_consistent(struct device *hwdev, size_t size, void *vaddr, @@ -927,7 +927,7 @@ int dump_run_sg = 0; * @nents: number of entries in list * @direction: R/W or both. * - * See Documentation/PCI/PCI-DMA-mapping.txt + * See Documentation/DMA-API-HOWTO.txt */ static int sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents, @@ -1011,7 +1011,7 @@ sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents, * @nents: number of entries in list * @direction: R/W or both. * - * See Documentation/PCI/PCI-DMA-mapping.txt + * See Documentation/DMA-API-HOWTO.txt */ static void sba_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents, diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index 1e88d4785321..10cf2500522b 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig @@ -31,9 +31,6 @@ config ACER_WMI wireless radio and bluetooth control, and on some laptops, exposes the mail LED and LCD backlight. - For more information about this driver see - - If you have an ACPI-WMI compatible Acer/ Wistron laptop, say Y or M here. @@ -164,7 +161,7 @@ config HP_ACCEL Support for a led indicating disk protection will be provided as hp::hddprotect. For more information on the feature, refer to - Documentation/hwmon/lis3lv02d. + Documentation/misc-devices/lis3lv02d. To compile this driver as a module, choose M here: the module will be called hp_accel. diff --git a/drivers/scsi/megaraid/megaraid_mbox.c b/drivers/scsi/megaraid/megaraid_mbox.c index 2e6619eff3ea..8883ca36f932 100644 --- a/drivers/scsi/megaraid/megaraid_mbox.c +++ b/drivers/scsi/megaraid/megaraid_mbox.c @@ -67,7 +67,7 @@ * * NEC MegaRAID PCI Express ROMB 1000 0408 1033 8287 * - * For history of changes, see Documentation/ChangeLog.megaraid + * For history of changes, see Documentation/scsi/ChangeLog.megaraid */ #include diff --git a/drivers/staging/cxt1e1/Kconfig b/drivers/staging/cxt1e1/Kconfig index 73430ef6ae2b..947f42a65c59 100644 --- a/drivers/staging/cxt1e1/Kconfig +++ b/drivers/staging/cxt1e1/Kconfig @@ -6,8 +6,7 @@ config CXT1E1 channelized stream WAN adapter card which contains a HDLC/Transparent mode controller. - If you want to compile this driver as a module - say M here and read . + If you want to compile this driver as a module say M here. The module will be called 'cxt1e1'. If unsure, say N. diff --git a/drivers/usb/serial/digi_acceleport.c b/drivers/usb/serial/digi_acceleport.c index 86fbba6336c9..e92cbefc0f88 100644 --- a/drivers/usb/serial/digi_acceleport.c +++ b/drivers/usb/serial/digi_acceleport.c @@ -227,7 +227,7 @@ * - All sleeps use a timeout of DIGI_RETRY_TIMEOUT before looping to * recheck the condition they are sleeping on. This is defensive, * in case a wake up is lost. -* - Following Documentation/DocBook/kernel-locking.pdf no spin locks +* - Following Documentation/DocBook/kernel-locking.tmpl no spin locks * are held when calling copy_to/from_user or printk. */ diff --git a/drivers/video/igafb.c b/drivers/video/igafb.c index d885c770eb84..2d97752f79a5 100644 --- a/drivers/video/igafb.c +++ b/drivers/video/igafb.c @@ -428,7 +428,7 @@ static int __init igafb_init(void) * * IGS2000 has its I/O memory mapped and we want * to generate memory cycles on PCI, e.g. do ioremap(), - * then readb/writeb() as in Documentation/IO-mapping.txt. + * then readb/writeb() as in Documentation/io-mapping.txt. * * IGS1682 is more traditional, it responds to PCI I/O * cycles, so we want to access it with inb()/outb(). diff --git a/drivers/watchdog/smsc37b787_wdt.c b/drivers/watchdog/smsc37b787_wdt.c index e97b0499bd0d..97b8184614ae 100644 --- a/drivers/watchdog/smsc37b787_wdt.c +++ b/drivers/watchdog/smsc37b787_wdt.c @@ -40,7 +40,7 @@ * mknod /dev/watchdog c 10 130 * * For an example userspace keep-alive daemon, see: - * Documentation/watchdog/watchdog.txt + * Documentation/watchdog/wdt.txt */ #include diff --git a/fs/configfs/inode.c b/fs/configfs/inode.c index c83f4768eeaa..ca418aaf6352 100644 --- a/fs/configfs/inode.c +++ b/fs/configfs/inode.c @@ -23,7 +23,8 @@ * * configfs Copyright (C) 2005 Oracle. All rights reserved. * - * Please see Documentation/filesystems/configfs.txt for more information. + * Please see Documentation/filesystems/configfs/configfs.txt for more + * information. */ #undef DEBUG diff --git a/fs/configfs/item.c b/fs/configfs/item.c index 76dc4c3e5d51..50cee7f9110b 100644 --- a/fs/configfs/item.c +++ b/fs/configfs/item.c @@ -23,7 +23,7 @@ * * configfs Copyright (C) 2005 Oracle. All rights reserved. * - * Please see the file Documentation/filesystems/configfs.txt for + * Please see the file Documentation/filesystems/configfs/configfs.txt for * critical information about using the config_item interface. */ diff --git a/fs/locks.c b/fs/locks.c index 703f545097de..96b33989147d 100644 --- a/fs/locks.c +++ b/fs/locks.c @@ -60,7 +60,7 @@ * * Initial implementation of mandatory locks. SunOS turned out to be * a rotten model, so I implemented the "obvious" semantics. - * See 'Documentation/mandatory.txt' for details. + * See 'Documentation/filesystems/mandatory-locking.txt' for details. * Andy Walker (andy@lysaker.kvaerner.no), April 06, 1996. * * Don't allow mandatory locks on mmap()'ed files. Added simple functions to diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig index 1360d4f88f41..048b59d5b2f0 100644 --- a/fs/squashfs/Kconfig +++ b/fs/squashfs/Kconfig @@ -19,9 +19,9 @@ config SQUASHFS If you want to compile this as a module ( = code which can be inserted in and removed from the running kernel whenever you want), - say M here and read . The module - will be called squashfs. Note that the root file system (the one - containing the directory /) cannot be compiled as a module. + say M here. The module will be called squashfs. Note that the root + file system (the one containing the directory /) cannot be compiled + as a module. If unsure, say N. diff --git a/include/linux/io-mapping.h b/include/linux/io-mapping.h index 8cdcc2a199ad..c81ed2ac16bd 100644 --- a/include/linux/io-mapping.h +++ b/include/linux/io-mapping.h @@ -27,7 +27,7 @@ * The io_mapping mechanism provides an abstraction for mapping * individual pages from an io device to the CPU in an efficient fashion. * - * See Documentation/io_mapping.txt + * See Documentation/io-mapping.txt */ #ifdef CONFIG_HAVE_ATOMIC_IOMAP diff --git a/include/linux/isdn.h b/include/linux/isdn.h index 44cd663c53b6..4ccf95d681b4 100644 --- a/include/linux/isdn.h +++ b/include/linux/isdn.h @@ -68,7 +68,7 @@ #define ISDN_NET_ENCAP_SYNCPPP 4 #define ISDN_NET_ENCAP_UIHDLC 5 #define ISDN_NET_ENCAP_CISCOHDLCK 6 /* With SLARP and keepalive */ -#define ISDN_NET_ENCAP_X25IFACE 7 /* Documentation/networking/x25-iface.txt*/ +#define ISDN_NET_ENCAP_X25IFACE 7 /* Documentation/networking/x25-iface.txt */ #define ISDN_NET_ENCAP_MAX_ENCAP ISDN_NET_ENCAP_X25IFACE /* Facility which currently uses an ISDN-channel */ diff --git a/include/linux/platform_data/ntc_thermistor.h b/include/linux/platform_data/ntc_thermistor.h index abd286215279..88734e871e3a 100644 --- a/include/linux/platform_data/ntc_thermistor.h +++ b/include/linux/platform_data/ntc_thermistor.h @@ -36,7 +36,7 @@ struct ntc_thermistor_platform_data { * read_uV() * * How to setup pullup_ohm, pulldown_ohm, and connect is - * described at Documentation/hwmon/ntc + * described at Documentation/hwmon/ntc_thermistor * * pullup/down_ohm: 0 for infinite / not-connected */ diff --git a/include/media/videobuf-dma-sg.h b/include/media/videobuf-dma-sg.h index 1c647e8148c4..d8fb6012c10d 100644 --- a/include/media/videobuf-dma-sg.h +++ b/include/media/videobuf-dma-sg.h @@ -34,7 +34,7 @@ * does memory allocation too using vmalloc_32(). * * videobuf_dma_*() - * see Documentation/PCI/PCI-DMA-mapping.txt, these functions to + * see Documentation/DMA-API-HOWTO.txt, these functions to * basically the same. The map function does also build a * scatterlist for the buffer (and unmap frees it ...) * diff --git a/include/target/configfs_macros.h b/include/target/configfs_macros.h index 7fe74608b437..a0fc85bbe2da 100644 --- a/include/target/configfs_macros.h +++ b/include/target/configfs_macros.h @@ -30,8 +30,8 @@ * Added CONFIGFS_EATTR() macros from original configfs.h macros * Copright (C) 2008-2009 Nicholas A. Bellinger * - * Please read Documentation/filesystems/configfs.txt before using the - * configfs interface, ESPECIALLY the parts about reference counts and + * Please read Documentation/filesystems/configfs/configfs.txt before using + * the configfs interface, ESPECIALLY the parts about reference counts and * item destructors. */ diff --git a/net/netfilter/Kconfig b/net/netfilter/Kconfig index 32bff6d86cb2..8260b13d93c9 100644 --- a/net/netfilter/Kconfig +++ b/net/netfilter/Kconfig @@ -505,7 +505,7 @@ config NETFILTER_XT_TARGET_LED echo netfilter-ssh > /sys/class/leds//trigger For more information on the LEDs available on your system, see - Documentation/leds-class.txt + Documentation/leds/leds-class.txt config NETFILTER_XT_TARGET_MARK tristate '"MARK" target support' diff --git a/sound/oss/Kconfig b/sound/oss/Kconfig index 6c93e051f9ae..6c9e8e8f45f8 100644 --- a/sound/oss/Kconfig +++ b/sound/oss/Kconfig @@ -432,9 +432,7 @@ config SOUND_SB ALS-007 and ALS-1X0 chips (read ) and for cards based on ESS chips (read and - ). If you have an SB AWE 32 or SB AWE - 64, say Y here and also to "AWE32 synth" below and read - . If you have an IBM Mwave + ). If you have an IBM Mwave card, say Y here and read . If you compile the driver into the kernel and don't want to use diff --git a/tools/perf/util/config.c b/tools/perf/util/config.c index fe02903f7d0f..80d9598db31a 100644 --- a/tools/perf/util/config.c +++ b/tools/perf/util/config.c @@ -341,7 +341,7 @@ const char *perf_config_dirname(const char *name, const char *value) static int perf_default_core_config(const char *var __used, const char *value __used) { - /* Add other config variables here and to Documentation/config.txt. */ + /* Add other config variables here. */ return 0; } @@ -350,7 +350,7 @@ int perf_default_config(const char *var, const char *value, void *dummy __used) if (!prefixcmp(var, "core.")) return perf_default_core_config(var, value); - /* Add other config variables here and to Documentation/config.txt. */ + /* Add other config variables here. */ return 0; } -- cgit v1.2.3 From 63216d3c235d662726d6f5c55ceca91c70bb3eda Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 10 Jun 2011 13:58:30 +0000 Subject: ARM: export rtc_lock for nvram driver The rtc_lock is used by both the nvram and rtc drivers, so we need to export it if at least one of the two is built, not just for the rtc driver. Signed-off-by: Arnd Bergmann --- arch/arm/kernel/time.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index cb634c3e28e9..5a54b95d6bd2 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c @@ -39,13 +39,11 @@ */ static struct sys_timer *system_timer; -#if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE) +#if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE) || \ + defined(CONFIG_NVRAM) || defined(CONFIG_NVRAM_MODULE) /* this needs a better home */ DEFINE_SPINLOCK(rtc_lock); - -#ifdef CONFIG_RTC_DRV_CMOS_MODULE EXPORT_SYMBOL(rtc_lock); -#endif #endif /* pc-style 'CMOS' RTC support */ /* change this if you have some constant time drift */ -- cgit v1.2.3 From 9934ebb8ffb1554ad76764b6e71767378d051329 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 10 Jun 2011 14:05:22 +0000 Subject: ARM: SMP depends on MMU The SMP implementation on ARM heavily depends on MMU-only code. As long as nobody is interested in fixing this, let's disable the SMP option when building for nommu. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5ebc5d922ea1..4e1eee0c2d64 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1349,6 +1349,7 @@ config SMP MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE + depends on MMU select USE_GENERIC_SMP_HELPERS select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP help -- cgit v1.2.3 From 89bace652cbfb78a2fd830025f8ea048d6eb3657 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 10 Jun 2011 14:12:21 +0000 Subject: ARM: always use ARM_UNWIND for thumb2 kernels Thumb2 kernels cannot be built with frame pointers, but can use the ARM_UNWIND feature for unwinding instead. This makes sure that all features that rely on unwinding includeing CONFIG_LATENCYTOP and FAULT_INJECTION_STACKTRACE_FILTER do not enable frame pointers when the unwinder is already selected, and we always build with the unwinder when we want a thumb2 kernel, to make sure we do not get the frame pointers instead. A different option would be to redefine the CONFIG_FRAME_POINTERS option on ARM to mean builing with either frame pointers or the unwinder, and then select which one to use based on the CPU architecture or another user option. That would still allow building thumb2 kernels without the unwinder but would also be more confusing. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 1 + lib/Kconfig.debug | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4e1eee0c2d64..497af51e9176 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1457,6 +1457,7 @@ config THUMB2_KERNEL depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL select AEABI select ARM_ASM_UNIFIED + select ARM_UNWIND help By enabling this option, the kernel will be compiled in Thumb-2 mode. A compiler/assembler that understand the unified diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug index c0cb9c4bc46d..103c171ce605 100644 --- a/lib/Kconfig.debug +++ b/lib/Kconfig.debug @@ -1081,7 +1081,7 @@ config FAULT_INJECTION_STACKTRACE_FILTER depends on FAULT_INJECTION_DEBUG_FS && STACKTRACE_SUPPORT depends on !X86_64 select STACKTRACE - select FRAME_POINTER if !PPC && !S390 && !MICROBLAZE + select FRAME_POINTER if !PPC && !S390 && !MICROBLAZE && !ARM_UNWIND help Provide stacktrace filter for fault-injection capabilities @@ -1091,7 +1091,7 @@ config LATENCYTOP depends on DEBUG_KERNEL depends on STACKTRACE_SUPPORT depends on PROC_FS - select FRAME_POINTER if !MIPS && !PPC && !S390 && !MICROBLAZE + select FRAME_POINTER if !MIPS && !PPC && !S390 && !MICROBLAZE && !ARM_UNWIND select KALLSYMS select KALLSYMS_ALL select STACKTRACE -- cgit v1.2.3 From ffc660c51b66312938e25fd6af24e3defdd0bc1b Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 27 Aug 2011 20:01:07 +0200 Subject: ARM: allow building alignment.c without PROC_FS The two functions cpu_is_v6_unaligned and safe_usermode are only defined when CONFIG_PROC_FS is enabled, but are used outside of the #ifdef. Signed-off-by: Arnd Bergmann Cc: Dave Martin --- arch/arm/mm/alignment.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index cfbcf8b95599..c335c76e0d88 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c @@ -86,16 +86,6 @@ core_param(alignment, ai_usermode, int, 0600); #define UM_FIXUP (1 << 1) #define UM_SIGNAL (1 << 2) -#ifdef CONFIG_PROC_FS -static const char *usermode_action[] = { - "ignored", - "warn", - "fixup", - "fixup+warn", - "signal", - "signal+warn" -}; - /* Return true if and only if the ARMv6 unaligned access model is in use. */ static bool cpu_is_v6_unaligned(void) { @@ -123,6 +113,16 @@ static int safe_usermode(int new_usermode, bool warn) return new_usermode; } +#ifdef CONFIG_PROC_FS +static const char *usermode_action[] = { + "ignored", + "warn", + "fixup", + "fixup+warn", + "signal", + "signal+warn" +}; + static int alignment_proc_show(struct seq_file *m, void *v) { seq_printf(m, "User:\t\t%lu\n", ai_user); -- cgit v1.2.3 From 82b9c18dc0ee38b5c78c5d09b9cffc79d98613c5 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 27 Aug 2011 22:09:36 +0200 Subject: ARM: vfp: use -mfloat-abi=soft to build vfp Distros are starting to ship with toolchains defaulting to hardfloat. Using such a compiler to build the kernel fails in the VFP directory with arch/arm/vfp/entry.S:1:0: sorry, unimplemented: -mfloat-abi=hard and VFP Adding -mfloat-abi=soft to the gcc command line fixes this. Signed-off-by: Arnd Bergmann --- arch/arm/vfp/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/vfp/Makefile b/arch/arm/vfp/Makefile index 6de73aab0195..a81404c09d5d 100644 --- a/arch/arm/vfp/Makefile +++ b/arch/arm/vfp/Makefile @@ -7,7 +7,7 @@ # ccflags-y := -DDEBUG # asflags-y := -DDEBUG -KBUILD_AFLAGS :=$(KBUILD_AFLAGS:-msoft-float=-Wa,-mfpu=softvfp+vfp) +KBUILD_AFLAGS :=$(KBUILD_AFLAGS:-msoft-float=-Wa,-mfpu=softvfp+vfp -mfloat-abi=soft) LDFLAGS +=--no-warn-mismatch obj-y += vfp.o -- cgit v1.2.3 From 15e0d9e37c7fe9711b60f47221c394d45553ad8c Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 1 Oct 2011 21:09:39 +0200 Subject: ARM: pm: let platforms select cpu_suspend support Support for the cpu_suspend functions is only built-in when CONFIG_PM_SLEEP is enabled, but omap3/4, exynos4 and pxa always call cpu_suspend when CONFIG_PM is enabled. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 4 ++++ arch/arm/kernel/Makefile | 2 +- arch/arm/mach-exynos4/Kconfig | 1 + arch/arm/mach-omap2/Kconfig | 2 ++ arch/arm/mm/proc-v7.S | 2 +- 5 files changed, 9 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 497af51e9176..3445f50b0b7d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -631,6 +631,7 @@ config ARCH_PXA select SPARSE_IRQ select AUTO_ZRELADDR select MULTI_IRQ_HANDLER + select ARM_CPU_SUSPEND if PM help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. @@ -2077,6 +2078,9 @@ config ARCH_SUSPEND_POSSIBLE CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE def_bool y +config ARM_CPU_SUSPEND + def_bool PM_SLEEP + endmenu source "net/Kconfig" diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index f7887dc53c1f..4ce3303a4194 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -29,7 +29,7 @@ obj-$(CONFIG_MODULES) += armksyms.o module.o obj-$(CONFIG_ARTHUR) += arthur.o obj-$(CONFIG_ISA_DMA) += dma-isa.o obj-$(CONFIG_PCI) += bios32.o isa.o -obj-$(CONFIG_PM_SLEEP) += sleep.o +obj-$(CONFIG_ARM_CPU_SUSPEND) += sleep.o obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o obj-$(CONFIG_SMP) += smp.o smp_tlb.o obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig index 0c77ab99fa16..fc1f92dfbea8 100644 --- a/arch/arm/mach-exynos4/Kconfig +++ b/arch/arm/mach-exynos4/Kconfig @@ -12,6 +12,7 @@ if ARCH_EXYNOS4 config CPU_EXYNOS4210 bool select S3C_PL330_DMA + select ARM_CPU_SUSPEND if PM help Enable EXYNOS4210 CPU support diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 57b66d590c52..89bfb49389f2 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -36,6 +36,7 @@ config ARCH_OMAP3 select ARM_L1_CACHE_SHIFT_6 if !ARCH_OMAP4 select ARCH_HAS_OPP select PM_OPP if PM + select ARM_CPU_SUSPEND if PM config ARCH_OMAP4 bool "TI OMAP4" @@ -50,6 +51,7 @@ config ARCH_OMAP4 select ARCH_HAS_OPP select PM_OPP if PM select USB_ARCH_HAS_EHCI + select ARM_CPU_SUSPEND if PM comment "OMAP Core Type" depends on ARCH_OMAP2 diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index a30e78542ccf..591accdb56e8 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -217,7 +217,7 @@ ENDPROC(cpu_v7_set_pte_ext) /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ .globl cpu_v7_suspend_size .equ cpu_v7_suspend_size, 4 * 9 -#ifdef CONFIG_PM_SLEEP +#ifdef CONFIG_ARM_CPU_SUSPEND ENTRY(cpu_v7_do_suspend) stmfd sp!, {r4 - r11, lr} mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID -- cgit v1.2.3 From d0ee9f404f42e69e4bf4c1afd24a3b6474f61e72 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 1 Oct 2011 21:10:32 +0200 Subject: ARM: limit CONFIG_HAVE_IDE to platforms that do Support for IDE drivers should not be automatic, since most platforms cannot actually support any IDE low-level drivers. This partly reverts 2064c946e "ARM: always select HAVE_IDE" to set this symbol only when either a PC-style bus (PCI, ISA, PCMCIA) is enabled or a platform is used that is known to have an existing driver in drivers/ide. New platforms should not need this option and just use CONFIG_ATA with drivers/ata/. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 6 +++++- arch/arm/plat-omap/Kconfig | 1 + 2 files changed, 6 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3445f50b0b7d..ed69fcde83ed 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -3,7 +3,7 @@ config ARM default y select HAVE_AOUT select HAVE_DMA_API_DEBUG - select HAVE_IDE + select HAVE_IDE if PCI || ISA || PCMCIA select HAVE_MEMBLOCK select RTC_LIB select SYS_SUPPORTS_APM_EMULATION @@ -385,6 +385,7 @@ config ARCH_FOOTBRIDGE select CPU_SA110 select FOOTBRIDGE select GENERIC_CLOCKEVENTS + select HAVE_IDE help Support for systems based on the DC21285 companion chip ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. @@ -632,6 +633,7 @@ config ARCH_PXA select AUTO_ZRELADDR select MULTI_IRQ_HANDLER select ARM_CPU_SUSPEND if PM + select HAVE_IDE help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. @@ -672,6 +674,7 @@ config ARCH_RPC select NO_IOPORT select ARCH_SPARSEMEM_ENABLE select ARCH_USES_GETTIMEOFFSET + select HAVE_IDE help On the Acorn Risc-PC, Linux can support the internal IDE disk and CD-ROM interface, serial and parallel port, and the floppy drive. @@ -690,6 +693,7 @@ config ARCH_SA1100 select HAVE_SCHED_CLOCK select TICK_ONESHOT select ARCH_REQUIRE_GPIOLIB + select HAVE_IDE help Support for StrongARM 11x0 based boards. diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index bb8f4a6b3e37..5b605a9eb091 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -14,6 +14,7 @@ config ARCH_OMAP1 select CLKDEV_LOOKUP select CLKSRC_MMIO select GENERIC_IRQ_CHIP + select HAVE_IDE help "Systems based on omap7xx, omap15xx or omap16xx" -- cgit v1.2.3 From 06901bd83412db5a31de7526e637101ed0c2c472 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 3 Sep 2011 17:54:44 +0200 Subject: ARM: add io{read,write}{16,32}be functions These functions are used in some PCI drivers with big-endian MMIO space, and they are trivial to add here. Signed-off-by: Arnd Bergmann --- arch/arm/include/asm/io.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index d66605dea55a..bad7bfb7af20 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -260,10 +260,16 @@ extern void _memset_io(volatile void __iomem *, int, size_t); #define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __iormb(); __v; }) #define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __iormb(); __v; }) +#define ioread16be(p) ({ unsigned int __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; }) +#define ioread32be(p) ({ unsigned int __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; }) + #define iowrite8(v,p) ({ __iowmb(); (void)__raw_writeb(v, p); }) #define iowrite16(v,p) ({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_le16(v), p); }) #define iowrite32(v,p) ({ __iowmb(); (void)__raw_writel((__force __u32)cpu_to_le32(v), p); }) +#define iowrite16be(v,p) ({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_be16(v), p); }) +#define iowrite32be(v,p) ({ __iowmb(); (void)__raw_writel((__force __u32)cpu_to_be32(v), p); }) + #define ioread8_rep(p,d,c) __raw_readsb(p,d,c) #define ioread16_rep(p,d,c) __raw_readsw(p,d,c) #define ioread32_rep(p,d,c) __raw_readsl(p,d,c) -- cgit v1.2.3 From b214bea525c5b62f6f8984557022e4593c441205 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sun, 4 Sep 2011 22:30:06 +0200 Subject: ARM: pci: always export pcibios_bus_to_resource Some PCI drivers call pcibios_bus_to_resource directly, but it is only exported when CONFIG_HOTPLUG is set, because it was initially mean for pccard support. Moving the export out of the #ifdef lets us avoid these build errors: ERROR: "pcibios_bus_to_resource" [drivers/video/vt8623fb.ko] undefined! ERROR: "pcibios_bus_to_resource" [drivers/video/arkfb.ko] undefined! ERROR: "pcibios_bus_to_resource" [drivers/video/s3fb.ko] undefined! Signed-off-by: Arnd Bergmann --- arch/arm/kernel/bios32.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index d6df359408f0..c0d9203fc75e 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -412,6 +412,9 @@ void pcibios_fixup_bus(struct pci_bus *bus) printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n", bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis"); } +#ifdef CONFIG_HOTPLUG +EXPORT_SYMBOL(pcibios_fixup_bus); +#endif /* * Convert from Linux-centric to bus-centric addresses for bridge devices. @@ -431,6 +434,7 @@ pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, region->start = res->start - offset; region->end = res->end - offset; } +EXPORT_SYMBOL(pcibios_resource_to_bus); void __devinit pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, @@ -447,12 +451,7 @@ pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, res->start = region->start + offset; res->end = region->end + offset; } - -#ifdef CONFIG_HOTPLUG -EXPORT_SYMBOL(pcibios_fixup_bus); -EXPORT_SYMBOL(pcibios_resource_to_bus); EXPORT_SYMBOL(pcibios_bus_to_resource); -#endif /* * Swizzle the device pin each time we cross a bridge. -- cgit v1.2.3 From 53eebb0df85e4005006920ae12150e8d6d31b132 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 7 Sep 2011 10:02:35 +0200 Subject: ARM: OC_ETM should not select ARM_AMBA The CONFIG_ARM_AMBA symbol is selected by the platforms that support AMBA, and the other platforms (e.g. orion) might not be able to build that code at all when they do not support the clk API. Instead, make sure that OC_ETM is only built on platforms that do support the amba subsystem already. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig.debug | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 81cbe40c159c..0c7a4f52d2b3 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -94,7 +94,7 @@ config DEBUG_ICEDCC config OC_ETM bool "On-chip ETM and ETB" - select ARM_AMBA + depends on ARM_AMBA help Enables the on-chip embedded trace macrocell and embedded trace buffer driver that will allow you to collect traces of the -- cgit v1.2.3 From d4f3add28bd90caddd5a39e422aed621d57f89a8 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 23 Sep 2011 10:13:49 +0200 Subject: ARM: common/vic: use proper __iomem annotations In vic_init, we pass addr into readl, so it needs to be a pointer, not a u32 address. Signed-off-by: Arnd Bergmann --- arch/arm/common/vic.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index 7aa4262ada7a..adccf6d002b8 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c @@ -347,7 +347,8 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, /* Identify which VIC cell this one is, by reading the ID */ for (i = 0; i < 4; i++) { - u32 addr = ((u32)base & PAGE_MASK) + 0xfe0 + (i * 4); + void __iomem *addr; + addr = (void __iomem *)((u32)base & PAGE_MASK) + 0xfe0 + (i * 4); cellid |= (readl(addr) & 0xff) << (8 * i); } vendor = (cellid >> 12) & 0xff; -- cgit v1.2.3 From 7816e210a7e4681fb775bbb57bffbef3cc4aa456 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 6 Jun 2011 16:56:21 +0000 Subject: ARM: include linux/highmem.h in uaccess functions When highpte support is enabled, this is required to build the kernel. Signed-off-by: Arnd Bergmann --- arch/arm/lib/uaccess_with_memcpy.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/lib/uaccess_with_memcpy.c b/arch/arm/lib/uaccess_with_memcpy.c index 8b9b13649f81..025f742dd4df 100644 --- a/arch/arm/lib/uaccess_with_memcpy.c +++ b/arch/arm/lib/uaccess_with_memcpy.c @@ -17,6 +17,7 @@ #include #include /* for in_atomic() */ #include +#include #include #include -- cgit v1.2.3 From dcb69290af30f7ef54e03bf82e1be0950f167789 Mon Sep 17 00:00:00 2001 From: John Stultz Date: Tue, 16 Aug 2011 15:51:03 -0700 Subject: time: Cleanup old CONFIG_GENERIC_TIME references that snuck in Awhile back I removed all the CONFIG_GENERIC_TIME referecnes as the last of the non-GENERIC_TIME arches were converted. However, due to the functionality being important and around for awhile, there apparently were some out of tree hardware enablement patches that used it and have since been merged. This patch removes the remaining instances of GENERIC_TIME. Singed-off-by: John Stultz --- arch/arm/Kconfig | 4 ---- arch/mn10300/Kconfig | 3 --- arch/tile/Kconfig | 3 --- arch/tile/configs/tilegx_defconfig | 1 - arch/tile/configs/tilepro_defconfig | 1 - arch/um/defconfig | 1 - arch/xtensa/configs/iss_defconfig | 1 - arch/xtensa/configs/s6105_defconfig | 1 - 8 files changed, 15 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2c71a8f3535a..37cc7227732e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -347,7 +347,6 @@ config ARCH_GEMINI config ARCH_PRIMA2 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" select CPU_V7 - select GENERIC_TIME select NO_IOPORT select GENERIC_CLOCKEVENTS select CLKDEV_LOOKUP @@ -520,7 +519,6 @@ config ARCH_LPC32XX select ARM_AMBA select USB_ARCH_HAS_OHCI select CLKDEV_LOOKUP - select GENERIC_TIME select GENERIC_CLOCKEVENTS help Support for the NXP LPC32XX family of processors @@ -599,7 +597,6 @@ config ARCH_TEGRA bool "NVIDIA Tegra" select CLKDEV_LOOKUP select CLKSRC_MMIO - select GENERIC_TIME select GENERIC_CLOCKEVENTS select GENERIC_GPIO select HAVE_CLK @@ -911,7 +908,6 @@ config ARCH_VT8500 config ARCH_ZYNQ bool "Xilinx Zynq ARM Cortex A9 Platform" select CPU_V7 - select GENERIC_TIME select GENERIC_CLOCKEVENTS select CLKDEV_LOOKUP select ARM_GIC diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig index 1f870340ebdd..5f7f2f8deb89 100644 --- a/arch/mn10300/Kconfig +++ b/arch/mn10300/Kconfig @@ -47,9 +47,6 @@ config GENERIC_CMOS_UPDATE config GENERIC_HWEIGHT def_bool y -config GENERIC_TIME - def_bool y - config GENERIC_CLOCKEVENTS def_bool y diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig index b30f71ac0d06..70a0de46cd1b 100644 --- a/arch/tile/Kconfig +++ b/arch/tile/Kconfig @@ -46,9 +46,6 @@ config NEED_PER_CPU_PAGE_FIRST_CHUNK config SYS_SUPPORTS_HUGETLBFS def_bool y -config GENERIC_TIME - def_bool y - config GENERIC_CLOCKEVENTS def_bool y diff --git a/arch/tile/configs/tilegx_defconfig b/arch/tile/configs/tilegx_defconfig index 2ad73fb707b9..dafdbbae1124 100644 --- a/arch/tile/configs/tilegx_defconfig +++ b/arch/tile/configs/tilegx_defconfig @@ -11,7 +11,6 @@ CONFIG_HAVE_ARCH_ALLOC_REMAP=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_GENERIC_TIME=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_RWSEM_GENERIC_SPINLOCK=y CONFIG_DEFAULT_MIGRATION_COST=10000000 diff --git a/arch/tile/configs/tilepro_defconfig b/arch/tile/configs/tilepro_defconfig index f58dc362b944..6f05f969b564 100644 --- a/arch/tile/configs/tilepro_defconfig +++ b/arch/tile/configs/tilepro_defconfig @@ -11,7 +11,6 @@ CONFIG_HAVE_ARCH_ALLOC_REMAP=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_GENERIC_TIME=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_RWSEM_GENERIC_SPINLOCK=y CONFIG_DEFAULT_MIGRATION_COST=10000000 diff --git a/arch/um/defconfig b/arch/um/defconfig index 9f7634f08cf3..761f5e1a657e 100644 --- a/arch/um/defconfig +++ b/arch/um/defconfig @@ -13,7 +13,6 @@ CONFIG_LOCKDEP_SUPPORT=y # CONFIG_STACKTRACE_SUPPORT is not set CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_TIME=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_IRQ_RELEASE_METHOD=y CONFIG_HZ=100 diff --git a/arch/xtensa/configs/iss_defconfig b/arch/xtensa/configs/iss_defconfig index 0234cd198c54..f932b30b47fb 100644 --- a/arch/xtensa/configs/iss_defconfig +++ b/arch/xtensa/configs/iss_defconfig @@ -15,7 +15,6 @@ CONFIG_GENERIC_GPIO=y # CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_NO_IOPORT=y CONFIG_HZ=100 -CONFIG_GENERIC_TIME=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" CONFIG_CONSTRUCTORS=y diff --git a/arch/xtensa/configs/s6105_defconfig b/arch/xtensa/configs/s6105_defconfig index 4891abbf16bc..550e8ed5b5c6 100644 --- a/arch/xtensa/configs/s6105_defconfig +++ b/arch/xtensa/configs/s6105_defconfig @@ -15,7 +15,6 @@ CONFIG_GENERIC_GPIO=y # CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_NO_IOPORT=y CONFIG_HZ=100 -CONFIG_GENERIC_TIME=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # -- cgit v1.2.3 From 17f57211969bddca2e922299a2530b1c65ccabfa Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Mon, 5 Sep 2011 17:41:02 +0100 Subject: ARM: 7075/1: LPAE: Factor out 2-level page table definitions into separate files This patch moves page table definitions from asm/page.h, asm/pgtable.h and asm/ptgable-hwdef.h into corresponding *-2level* files. Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/include/asm/page.h | 42 +------- arch/arm/include/asm/pgtable-2level-hwdef.h | 91 ++++++++++++++++++ arch/arm/include/asm/pgtable-2level-types.h | 64 +++++++++++++ arch/arm/include/asm/pgtable-2level.h | 143 ++++++++++++++++++++++++++++ arch/arm/include/asm/pgtable-hwdef.h | 77 +-------------- arch/arm/include/asm/pgtable.h | 135 +------------------------- 6 files changed, 302 insertions(+), 250 deletions(-) create mode 100644 arch/arm/include/asm/pgtable-2level-hwdef.h create mode 100644 arch/arm/include/asm/pgtable-2level-types.h create mode 100644 arch/arm/include/asm/pgtable-2level.h (limited to 'arch/arm') diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h index ac75d0848889..ca94653f1ecb 100644 --- a/arch/arm/include/asm/page.h +++ b/arch/arm/include/asm/page.h @@ -151,47 +151,7 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from, #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) extern void copy_page(void *to, const void *from); -typedef unsigned long pteval_t; - -#undef STRICT_MM_TYPECHECKS - -#ifdef STRICT_MM_TYPECHECKS -/* - * These are used to make use of C type-checking.. - */ -typedef struct { pteval_t pte; } pte_t; -typedef struct { unsigned long pmd; } pmd_t; -typedef struct { unsigned long pgd[2]; } pgd_t; -typedef struct { unsigned long pgprot; } pgprot_t; - -#define pte_val(x) ((x).pte) -#define pmd_val(x) ((x).pmd) -#define pgd_val(x) ((x).pgd[0]) -#define pgprot_val(x) ((x).pgprot) - -#define __pte(x) ((pte_t) { (x) } ) -#define __pmd(x) ((pmd_t) { (x) } ) -#define __pgprot(x) ((pgprot_t) { (x) } ) - -#else -/* - * .. while these make it easier on the compiler - */ -typedef pteval_t pte_t; -typedef unsigned long pmd_t; -typedef unsigned long pgd_t[2]; -typedef unsigned long pgprot_t; - -#define pte_val(x) (x) -#define pmd_val(x) (x) -#define pgd_val(x) ((x)[0]) -#define pgprot_val(x) (x) - -#define __pte(x) (x) -#define __pmd(x) (x) -#define __pgprot(x) (x) - -#endif /* STRICT_MM_TYPECHECKS */ +#include #endif /* CONFIG_MMU */ diff --git a/arch/arm/include/asm/pgtable-2level-hwdef.h b/arch/arm/include/asm/pgtable-2level-hwdef.h new file mode 100644 index 000000000000..436529c1cda2 --- /dev/null +++ b/arch/arm/include/asm/pgtable-2level-hwdef.h @@ -0,0 +1,91 @@ +/* + * arch/arm/include/asm/pgtable-2level-hwdef.h + * + * Copyright (C) 1995-2002 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef _ASM_PGTABLE_2LEVEL_HWDEF_H +#define _ASM_PGTABLE_2LEVEL_HWDEF_H + +/* + * Hardware page table definitions. + * + * + Level 1 descriptor (PMD) + * - common + */ +#define PMD_TYPE_MASK (3 << 0) +#define PMD_TYPE_FAULT (0 << 0) +#define PMD_TYPE_TABLE (1 << 0) +#define PMD_TYPE_SECT (2 << 0) +#define PMD_BIT4 (1 << 4) +#define PMD_DOMAIN(x) ((x) << 5) +#define PMD_PROTECTION (1 << 9) /* v5 */ +/* + * - section + */ +#define PMD_SECT_BUFFERABLE (1 << 2) +#define PMD_SECT_CACHEABLE (1 << 3) +#define PMD_SECT_XN (1 << 4) /* v6 */ +#define PMD_SECT_AP_WRITE (1 << 10) +#define PMD_SECT_AP_READ (1 << 11) +#define PMD_SECT_TEX(x) ((x) << 12) /* v5 */ +#define PMD_SECT_APX (1 << 15) /* v6 */ +#define PMD_SECT_S (1 << 16) /* v6 */ +#define PMD_SECT_nG (1 << 17) /* v6 */ +#define PMD_SECT_SUPER (1 << 18) /* v6 */ +#define PMD_SECT_AF (0) + +#define PMD_SECT_UNCACHED (0) +#define PMD_SECT_BUFFERED (PMD_SECT_BUFFERABLE) +#define PMD_SECT_WT (PMD_SECT_CACHEABLE) +#define PMD_SECT_WB (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) +#define PMD_SECT_MINICACHE (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE) +#define PMD_SECT_WBWA (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) +#define PMD_SECT_NONSHARED_DEV (PMD_SECT_TEX(2)) + +/* + * - coarse table (not used) + */ + +/* + * + Level 2 descriptor (PTE) + * - common + */ +#define PTE_TYPE_MASK (3 << 0) +#define PTE_TYPE_FAULT (0 << 0) +#define PTE_TYPE_LARGE (1 << 0) +#define PTE_TYPE_SMALL (2 << 0) +#define PTE_TYPE_EXT (3 << 0) /* v5 */ +#define PTE_BUFFERABLE (1 << 2) +#define PTE_CACHEABLE (1 << 3) + +/* + * - extended small page/tiny page + */ +#define PTE_EXT_XN (1 << 0) /* v6 */ +#define PTE_EXT_AP_MASK (3 << 4) +#define PTE_EXT_AP0 (1 << 4) +#define PTE_EXT_AP1 (2 << 4) +#define PTE_EXT_AP_UNO_SRO (0 << 4) +#define PTE_EXT_AP_UNO_SRW (PTE_EXT_AP0) +#define PTE_EXT_AP_URO_SRW (PTE_EXT_AP1) +#define PTE_EXT_AP_URW_SRW (PTE_EXT_AP1|PTE_EXT_AP0) +#define PTE_EXT_TEX(x) ((x) << 6) /* v5 */ +#define PTE_EXT_APX (1 << 9) /* v6 */ +#define PTE_EXT_COHERENT (1 << 9) /* XScale3 */ +#define PTE_EXT_SHARED (1 << 10) /* v6 */ +#define PTE_EXT_NG (1 << 11) /* v6 */ + +/* + * - small page + */ +#define PTE_SMALL_AP_MASK (0xff << 4) +#define PTE_SMALL_AP_UNO_SRO (0x00 << 4) +#define PTE_SMALL_AP_UNO_SRW (0x55 << 4) +#define PTE_SMALL_AP_URO_SRW (0xaa << 4) +#define PTE_SMALL_AP_URW_SRW (0xff << 4) + +#endif diff --git a/arch/arm/include/asm/pgtable-2level-types.h b/arch/arm/include/asm/pgtable-2level-types.h new file mode 100644 index 000000000000..8a01f62d8a16 --- /dev/null +++ b/arch/arm/include/asm/pgtable-2level-types.h @@ -0,0 +1,64 @@ +/* + * arch/arm/include/asm/pgtable-2level-types.h + * + * Copyright (C) 1995-2003 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef _ASM_PGTABLE_2LEVEL_TYPES_H +#define _ASM_PGTABLE_2LEVEL_TYPES_H + +typedef unsigned long pteval_t; + +#undef STRICT_MM_TYPECHECKS + +#ifdef STRICT_MM_TYPECHECKS +/* + * These are used to make use of C type-checking.. + */ +typedef struct { pteval_t pte; } pte_t; +typedef struct { unsigned long pmd; } pmd_t; +typedef struct { unsigned long pgd[2]; } pgd_t; +typedef struct { unsigned long pgprot; } pgprot_t; + +#define pte_val(x) ((x).pte) +#define pmd_val(x) ((x).pmd) +#define pgd_val(x) ((x).pgd[0]) +#define pgprot_val(x) ((x).pgprot) + +#define __pte(x) ((pte_t) { (x) } ) +#define __pmd(x) ((pmd_t) { (x) } ) +#define __pgprot(x) ((pgprot_t) { (x) } ) + +#else +/* + * .. while these make it easier on the compiler + */ +typedef pteval_t pte_t; +typedef unsigned long pmd_t; +typedef unsigned long pgd_t[2]; +typedef unsigned long pgprot_t; + +#define pte_val(x) (x) +#define pmd_val(x) (x) +#define pgd_val(x) ((x)[0]) +#define pgprot_val(x) (x) + +#define __pte(x) (x) +#define __pmd(x) (x) +#define __pgprot(x) (x) + +#endif /* STRICT_MM_TYPECHECKS */ + +#endif /* _ASM_PGTABLE_2LEVEL_TYPES_H */ diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h new file mode 100644 index 000000000000..470457e1cfc5 --- /dev/null +++ b/arch/arm/include/asm/pgtable-2level.h @@ -0,0 +1,143 @@ +/* + * arch/arm/include/asm/pgtable-2level.h + * + * Copyright (C) 1995-2002 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef _ASM_PGTABLE_2LEVEL_H +#define _ASM_PGTABLE_2LEVEL_H + +/* + * Hardware-wise, we have a two level page table structure, where the first + * level has 4096 entries, and the second level has 256 entries. Each entry + * is one 32-bit word. Most of the bits in the second level entry are used + * by hardware, and there aren't any "accessed" and "dirty" bits. + * + * Linux on the other hand has a three level page table structure, which can + * be wrapped to fit a two level page table structure easily - using the PGD + * and PTE only. However, Linux also expects one "PTE" table per page, and + * at least a "dirty" bit. + * + * Therefore, we tweak the implementation slightly - we tell Linux that we + * have 2048 entries in the first level, each of which is 8 bytes (iow, two + * hardware pointers to the second level.) The second level contains two + * hardware PTE tables arranged contiguously, preceded by Linux versions + * which contain the state information Linux needs. We, therefore, end up + * with 512 entries in the "PTE" level. + * + * This leads to the page tables having the following layout: + * + * pgd pte + * | | + * +--------+ + * | | +------------+ +0 + * +- - - - + | Linux pt 0 | + * | | +------------+ +1024 + * +--------+ +0 | Linux pt 1 | + * | |-----> +------------+ +2048 + * +- - - - + +4 | h/w pt 0 | + * | |-----> +------------+ +3072 + * +--------+ +8 | h/w pt 1 | + * | | +------------+ +4096 + * + * See L_PTE_xxx below for definitions of bits in the "Linux pt", and + * PTE_xxx for definitions of bits appearing in the "h/w pt". + * + * PMD_xxx definitions refer to bits in the first level page table. + * + * The "dirty" bit is emulated by only granting hardware write permission + * iff the page is marked "writable" and "dirty" in the Linux PTE. This + * means that a write to a clean page will cause a permission fault, and + * the Linux MM layer will mark the page dirty via handle_pte_fault(). + * For the hardware to notice the permission change, the TLB entry must + * be flushed, and ptep_set_access_flags() does that for us. + * + * The "accessed" or "young" bit is emulated by a similar method; we only + * allow accesses to the page if the "young" bit is set. Accesses to the + * page will cause a fault, and handle_pte_fault() will set the young bit + * for us as long as the page is marked present in the corresponding Linux + * PTE entry. Again, ptep_set_access_flags() will ensure that the TLB is + * up to date. + * + * However, when the "young" bit is cleared, we deny access to the page + * by clearing the hardware PTE. Currently Linux does not flush the TLB + * for us in this case, which means the TLB will retain the transation + * until either the TLB entry is evicted under pressure, or a context + * switch which changes the user space mapping occurs. + */ +#define PTRS_PER_PTE 512 +#define PTRS_PER_PMD 1 +#define PTRS_PER_PGD 2048 + +#define PTE_HWTABLE_PTRS (PTRS_PER_PTE) +#define PTE_HWTABLE_OFF (PTE_HWTABLE_PTRS * sizeof(pte_t)) +#define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u32)) + +/* + * PMD_SHIFT determines the size of the area a second-level page table can map + * PGDIR_SHIFT determines what a third-level page table entry can map + */ +#define PMD_SHIFT 21 +#define PGDIR_SHIFT 21 + +#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) +#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) + +/* + * section address mask and size definitions. + */ +#define SECTION_SHIFT 20 +#define SECTION_SIZE (1UL << SECTION_SHIFT) +#define SECTION_MASK (~(SECTION_SIZE-1)) + +/* + * ARMv6 supersection address mask and size definitions. + */ +#define SUPERSECTION_SHIFT 24 +#define SUPERSECTION_SIZE (1UL << SUPERSECTION_SHIFT) +#define SUPERSECTION_MASK (~(SUPERSECTION_SIZE-1)) + +#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) + +/* + * "Linux" PTE definitions. + * + * We keep two sets of PTEs - the hardware and the linux version. + * This allows greater flexibility in the way we map the Linux bits + * onto the hardware tables, and allows us to have YOUNG and DIRTY + * bits. + * + * The PTE table pointer refers to the hardware entries; the "Linux" + * entries are stored 1024 bytes below. + */ +#define L_PTE_PRESENT (_AT(pteval_t, 1) << 0) +#define L_PTE_YOUNG (_AT(pteval_t, 1) << 1) +#define L_PTE_FILE (_AT(pteval_t, 1) << 2) /* only when !PRESENT */ +#define L_PTE_DIRTY (_AT(pteval_t, 1) << 6) +#define L_PTE_RDONLY (_AT(pteval_t, 1) << 7) +#define L_PTE_USER (_AT(pteval_t, 1) << 8) +#define L_PTE_XN (_AT(pteval_t, 1) << 9) +#define L_PTE_SHARED (_AT(pteval_t, 1) << 10) /* shared(v6), coherent(xsc3) */ + +/* + * These are the memory types, defined to be compatible with + * pre-ARMv6 CPUs cacheable and bufferable bits: XXCB + */ +#define L_PTE_MT_UNCACHED (_AT(pteval_t, 0x00) << 2) /* 0000 */ +#define L_PTE_MT_BUFFERABLE (_AT(pteval_t, 0x01) << 2) /* 0001 */ +#define L_PTE_MT_WRITETHROUGH (_AT(pteval_t, 0x02) << 2) /* 0010 */ +#define L_PTE_MT_WRITEBACK (_AT(pteval_t, 0x03) << 2) /* 0011 */ +#define L_PTE_MT_MINICACHE (_AT(pteval_t, 0x06) << 2) /* 0110 (sa1100, xscale) */ +#define L_PTE_MT_WRITEALLOC (_AT(pteval_t, 0x07) << 2) /* 0111 */ +#define L_PTE_MT_DEV_SHARED (_AT(pteval_t, 0x04) << 2) /* 0100 */ +#define L_PTE_MT_DEV_NONSHARED (_AT(pteval_t, 0x0c) << 2) /* 1100 */ +#define L_PTE_MT_DEV_WC (_AT(pteval_t, 0x09) << 2) /* 1001 */ +#define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 0x0b) << 2) /* 1011 */ +#define L_PTE_MT_MASK (_AT(pteval_t, 0x0f) << 2) + +#endif /* _ASM_PGTABLE_2LEVEL_H */ diff --git a/arch/arm/include/asm/pgtable-hwdef.h b/arch/arm/include/asm/pgtable-hwdef.h index fd1521d5cb9d..183111164ce9 100644 --- a/arch/arm/include/asm/pgtable-hwdef.h +++ b/arch/arm/include/asm/pgtable-hwdef.h @@ -10,81 +10,6 @@ #ifndef _ASMARM_PGTABLE_HWDEF_H #define _ASMARM_PGTABLE_HWDEF_H -/* - * Hardware page table definitions. - * - * + Level 1 descriptor (PMD) - * - common - */ -#define PMD_TYPE_MASK (3 << 0) -#define PMD_TYPE_FAULT (0 << 0) -#define PMD_TYPE_TABLE (1 << 0) -#define PMD_TYPE_SECT (2 << 0) -#define PMD_BIT4 (1 << 4) -#define PMD_DOMAIN(x) ((x) << 5) -#define PMD_PROTECTION (1 << 9) /* v5 */ -/* - * - section - */ -#define PMD_SECT_BUFFERABLE (1 << 2) -#define PMD_SECT_CACHEABLE (1 << 3) -#define PMD_SECT_XN (1 << 4) /* v6 */ -#define PMD_SECT_AP_WRITE (1 << 10) -#define PMD_SECT_AP_READ (1 << 11) -#define PMD_SECT_TEX(x) ((x) << 12) /* v5 */ -#define PMD_SECT_APX (1 << 15) /* v6 */ -#define PMD_SECT_S (1 << 16) /* v6 */ -#define PMD_SECT_nG (1 << 17) /* v6 */ -#define PMD_SECT_SUPER (1 << 18) /* v6 */ - -#define PMD_SECT_UNCACHED (0) -#define PMD_SECT_BUFFERED (PMD_SECT_BUFFERABLE) -#define PMD_SECT_WT (PMD_SECT_CACHEABLE) -#define PMD_SECT_WB (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) -#define PMD_SECT_MINICACHE (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE) -#define PMD_SECT_WBWA (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) -#define PMD_SECT_NONSHARED_DEV (PMD_SECT_TEX(2)) - -/* - * - coarse table (not used) - */ - -/* - * + Level 2 descriptor (PTE) - * - common - */ -#define PTE_TYPE_MASK (3 << 0) -#define PTE_TYPE_FAULT (0 << 0) -#define PTE_TYPE_LARGE (1 << 0) -#define PTE_TYPE_SMALL (2 << 0) -#define PTE_TYPE_EXT (3 << 0) /* v5 */ -#define PTE_BUFFERABLE (1 << 2) -#define PTE_CACHEABLE (1 << 3) - -/* - * - extended small page/tiny page - */ -#define PTE_EXT_XN (1 << 0) /* v6 */ -#define PTE_EXT_AP_MASK (3 << 4) -#define PTE_EXT_AP0 (1 << 4) -#define PTE_EXT_AP1 (2 << 4) -#define PTE_EXT_AP_UNO_SRO (0 << 4) -#define PTE_EXT_AP_UNO_SRW (PTE_EXT_AP0) -#define PTE_EXT_AP_URO_SRW (PTE_EXT_AP1) -#define PTE_EXT_AP_URW_SRW (PTE_EXT_AP1|PTE_EXT_AP0) -#define PTE_EXT_TEX(x) ((x) << 6) /* v5 */ -#define PTE_EXT_APX (1 << 9) /* v6 */ -#define PTE_EXT_COHERENT (1 << 9) /* XScale3 */ -#define PTE_EXT_SHARED (1 << 10) /* v6 */ -#define PTE_EXT_NG (1 << 11) /* v6 */ - -/* - * - small page - */ -#define PTE_SMALL_AP_MASK (0xff << 4) -#define PTE_SMALL_AP_UNO_SRO (0x00 << 4) -#define PTE_SMALL_AP_UNO_SRW (0x55 << 4) -#define PTE_SMALL_AP_URO_SRW (0xaa << 4) -#define PTE_SMALL_AP_URW_SRW (0xff << 4) +#include #endif diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index 5750704e0271..d6436dacb17b 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h @@ -24,6 +24,8 @@ #include #include +#include + /* * Just any arbitrary offset to the start of the vmalloc VM area: the * current 8MB value just means that there will be a 8MB "hole" after the @@ -41,79 +43,6 @@ #define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) #endif -/* - * Hardware-wise, we have a two level page table structure, where the first - * level has 4096 entries, and the second level has 256 entries. Each entry - * is one 32-bit word. Most of the bits in the second level entry are used - * by hardware, and there aren't any "accessed" and "dirty" bits. - * - * Linux on the other hand has a three level page table structure, which can - * be wrapped to fit a two level page table structure easily - using the PGD - * and PTE only. However, Linux also expects one "PTE" table per page, and - * at least a "dirty" bit. - * - * Therefore, we tweak the implementation slightly - we tell Linux that we - * have 2048 entries in the first level, each of which is 8 bytes (iow, two - * hardware pointers to the second level.) The second level contains two - * hardware PTE tables arranged contiguously, preceded by Linux versions - * which contain the state information Linux needs. We, therefore, end up - * with 512 entries in the "PTE" level. - * - * This leads to the page tables having the following layout: - * - * pgd pte - * | | - * +--------+ - * | | +------------+ +0 - * +- - - - + | Linux pt 0 | - * | | +------------+ +1024 - * +--------+ +0 | Linux pt 1 | - * | |-----> +------------+ +2048 - * +- - - - + +4 | h/w pt 0 | - * | |-----> +------------+ +3072 - * +--------+ +8 | h/w pt 1 | - * | | +------------+ +4096 - * - * See L_PTE_xxx below for definitions of bits in the "Linux pt", and - * PTE_xxx for definitions of bits appearing in the "h/w pt". - * - * PMD_xxx definitions refer to bits in the first level page table. - * - * The "dirty" bit is emulated by only granting hardware write permission - * iff the page is marked "writable" and "dirty" in the Linux PTE. This - * means that a write to a clean page will cause a permission fault, and - * the Linux MM layer will mark the page dirty via handle_pte_fault(). - * For the hardware to notice the permission change, the TLB entry must - * be flushed, and ptep_set_access_flags() does that for us. - * - * The "accessed" or "young" bit is emulated by a similar method; we only - * allow accesses to the page if the "young" bit is set. Accesses to the - * page will cause a fault, and handle_pte_fault() will set the young bit - * for us as long as the page is marked present in the corresponding Linux - * PTE entry. Again, ptep_set_access_flags() will ensure that the TLB is - * up to date. - * - * However, when the "young" bit is cleared, we deny access to the page - * by clearing the hardware PTE. Currently Linux does not flush the TLB - * for us in this case, which means the TLB will retain the transation - * until either the TLB entry is evicted under pressure, or a context - * switch which changes the user space mapping occurs. - */ -#define PTRS_PER_PTE 512 -#define PTRS_PER_PMD 1 -#define PTRS_PER_PGD 2048 - -#define PTE_HWTABLE_PTRS (PTRS_PER_PTE) -#define PTE_HWTABLE_OFF (PTE_HWTABLE_PTRS * sizeof(pte_t)) -#define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u32)) - -/* - * PMD_SHIFT determines the size of the area a second-level page table can map - * PGDIR_SHIFT determines what a third-level page table entry can map - */ -#define PMD_SHIFT 21 -#define PGDIR_SHIFT 21 - #define LIBRARY_TEXT_START 0x0c000000 #ifndef __ASSEMBLY__ @@ -124,12 +53,6 @@ extern void __pgd_error(const char *file, int line, pgd_t); #define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte) #define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd) #define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd) -#endif /* !__ASSEMBLY__ */ - -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) /* * This is the lowest virtual address we can permit any user space @@ -138,60 +61,6 @@ extern void __pgd_error(const char *file, int line, pgd_t); */ #define FIRST_USER_ADDRESS PAGE_SIZE -#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) - -/* - * section address mask and size definitions. - */ -#define SECTION_SHIFT 20 -#define SECTION_SIZE (1UL << SECTION_SHIFT) -#define SECTION_MASK (~(SECTION_SIZE-1)) - -/* - * ARMv6 supersection address mask and size definitions. - */ -#define SUPERSECTION_SHIFT 24 -#define SUPERSECTION_SIZE (1UL << SUPERSECTION_SHIFT) -#define SUPERSECTION_MASK (~(SUPERSECTION_SIZE-1)) - -/* - * "Linux" PTE definitions. - * - * We keep two sets of PTEs - the hardware and the linux version. - * This allows greater flexibility in the way we map the Linux bits - * onto the hardware tables, and allows us to have YOUNG and DIRTY - * bits. - * - * The PTE table pointer refers to the hardware entries; the "Linux" - * entries are stored 1024 bytes below. - */ -#define L_PTE_PRESENT (_AT(pteval_t, 1) << 0) -#define L_PTE_YOUNG (_AT(pteval_t, 1) << 1) -#define L_PTE_FILE (_AT(pteval_t, 1) << 2) /* only when !PRESENT */ -#define L_PTE_DIRTY (_AT(pteval_t, 1) << 6) -#define L_PTE_RDONLY (_AT(pteval_t, 1) << 7) -#define L_PTE_USER (_AT(pteval_t, 1) << 8) -#define L_PTE_XN (_AT(pteval_t, 1) << 9) -#define L_PTE_SHARED (_AT(pteval_t, 1) << 10) /* shared(v6), coherent(xsc3) */ - -/* - * These are the memory types, defined to be compatible with - * pre-ARMv6 CPUs cacheable and bufferable bits: XXCB - */ -#define L_PTE_MT_UNCACHED (_AT(pteval_t, 0x00) << 2) /* 0000 */ -#define L_PTE_MT_BUFFERABLE (_AT(pteval_t, 0x01) << 2) /* 0001 */ -#define L_PTE_MT_WRITETHROUGH (_AT(pteval_t, 0x02) << 2) /* 0010 */ -#define L_PTE_MT_WRITEBACK (_AT(pteval_t, 0x03) << 2) /* 0011 */ -#define L_PTE_MT_MINICACHE (_AT(pteval_t, 0x06) << 2) /* 0110 (sa1100, xscale) */ -#define L_PTE_MT_WRITEALLOC (_AT(pteval_t, 0x07) << 2) /* 0111 */ -#define L_PTE_MT_DEV_SHARED (_AT(pteval_t, 0x04) << 2) /* 0100 */ -#define L_PTE_MT_DEV_NONSHARED (_AT(pteval_t, 0x0c) << 2) /* 1100 */ -#define L_PTE_MT_DEV_WC (_AT(pteval_t, 0x09) << 2) /* 1001 */ -#define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 0x0b) << 2) /* 1011 */ -#define L_PTE_MT_MASK (_AT(pteval_t, 0x0f) << 2) - -#ifndef __ASSEMBLY__ - /* * The pgprot_* and protection_map entries will be fixed up in runtime * to include the cachable and bufferable bits based on memory policy, -- cgit v1.2.3 From 442e70c0b3536e832547eed89629435462f4b515 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Mon, 5 Sep 2011 17:51:56 +0100 Subject: ARM: 7076/1: LPAE: Add (pte|pmd)val_t type definitions as u32 This patch defines the (pte|pmd)val_t as u32 and changes the page table types to be based on these. The PMD bits are converted to the corresponding type using the _AT macro. The flush_pmd_entry/clean_pmd_entry argument was changed to (void *) to allow them to be used with both PGD and PMD pointers and avoid code duplication. Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/include/asm/pgalloc.h | 4 +- arch/arm/include/asm/pgtable-2level-hwdef.h | 82 ++++++++++++++--------------- arch/arm/include/asm/pgtable-2level-types.h | 17 +++--- arch/arm/include/asm/tlbflush.h | 4 +- arch/arm/mm/mm.h | 4 +- arch/arm/mm/mmu.c | 4 +- 6 files changed, 59 insertions(+), 56 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/pgalloc.h b/arch/arm/include/asm/pgalloc.h index 22de005f159c..3e08fd3fbb6b 100644 --- a/arch/arm/include/asm/pgalloc.h +++ b/arch/arm/include/asm/pgalloc.h @@ -105,9 +105,9 @@ static inline void pte_free(struct mm_struct *mm, pgtable_t pte) } static inline void __pmd_populate(pmd_t *pmdp, phys_addr_t pte, - unsigned long prot) + pmdval_t prot) { - unsigned long pmdval = (pte + PTE_HWTABLE_OFF) | prot; + pmdval_t pmdval = (pte + PTE_HWTABLE_OFF) | prot; pmdp[0] = __pmd(pmdval); pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t)); flush_pmd_entry(pmdp); diff --git a/arch/arm/include/asm/pgtable-2level-hwdef.h b/arch/arm/include/asm/pgtable-2level-hwdef.h index 436529c1cda2..2b52c40edd80 100644 --- a/arch/arm/include/asm/pgtable-2level-hwdef.h +++ b/arch/arm/include/asm/pgtable-2level-hwdef.h @@ -16,29 +16,29 @@ * + Level 1 descriptor (PMD) * - common */ -#define PMD_TYPE_MASK (3 << 0) -#define PMD_TYPE_FAULT (0 << 0) -#define PMD_TYPE_TABLE (1 << 0) -#define PMD_TYPE_SECT (2 << 0) -#define PMD_BIT4 (1 << 4) -#define PMD_DOMAIN(x) ((x) << 5) -#define PMD_PROTECTION (1 << 9) /* v5 */ +#define PMD_TYPE_MASK (_AT(pmdval_t, 3) << 0) +#define PMD_TYPE_FAULT (_AT(pmdval_t, 0) << 0) +#define PMD_TYPE_TABLE (_AT(pmdval_t, 1) << 0) +#define PMD_TYPE_SECT (_AT(pmdval_t, 2) << 0) +#define PMD_BIT4 (_AT(pmdval_t, 1) << 4) +#define PMD_DOMAIN(x) (_AT(pmdval_t, (x)) << 5) +#define PMD_PROTECTION (_AT(pmdval_t, 1) << 9) /* v5 */ /* * - section */ -#define PMD_SECT_BUFFERABLE (1 << 2) -#define PMD_SECT_CACHEABLE (1 << 3) -#define PMD_SECT_XN (1 << 4) /* v6 */ -#define PMD_SECT_AP_WRITE (1 << 10) -#define PMD_SECT_AP_READ (1 << 11) -#define PMD_SECT_TEX(x) ((x) << 12) /* v5 */ -#define PMD_SECT_APX (1 << 15) /* v6 */ -#define PMD_SECT_S (1 << 16) /* v6 */ -#define PMD_SECT_nG (1 << 17) /* v6 */ -#define PMD_SECT_SUPER (1 << 18) /* v6 */ -#define PMD_SECT_AF (0) +#define PMD_SECT_BUFFERABLE (_AT(pmdval_t, 1) << 2) +#define PMD_SECT_CACHEABLE (_AT(pmdval_t, 1) << 3) +#define PMD_SECT_XN (_AT(pmdval_t, 1) << 4) /* v6 */ +#define PMD_SECT_AP_WRITE (_AT(pmdval_t, 1) << 10) +#define PMD_SECT_AP_READ (_AT(pmdval_t, 1) << 11) +#define PMD_SECT_TEX(x) (_AT(pmdval_t, (x)) << 12) /* v5 */ +#define PMD_SECT_APX (_AT(pmdval_t, 1) << 15) /* v6 */ +#define PMD_SECT_S (_AT(pmdval_t, 1) << 16) /* v6 */ +#define PMD_SECT_nG (_AT(pmdval_t, 1) << 17) /* v6 */ +#define PMD_SECT_SUPER (_AT(pmdval_t, 1) << 18) /* v6 */ +#define PMD_SECT_AF (_AT(pmdval_t, 0)) -#define PMD_SECT_UNCACHED (0) +#define PMD_SECT_UNCACHED (_AT(pmdval_t, 0)) #define PMD_SECT_BUFFERED (PMD_SECT_BUFFERABLE) #define PMD_SECT_WT (PMD_SECT_CACHEABLE) #define PMD_SECT_WB (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) @@ -54,38 +54,38 @@ * + Level 2 descriptor (PTE) * - common */ -#define PTE_TYPE_MASK (3 << 0) -#define PTE_TYPE_FAULT (0 << 0) -#define PTE_TYPE_LARGE (1 << 0) -#define PTE_TYPE_SMALL (2 << 0) -#define PTE_TYPE_EXT (3 << 0) /* v5 */ -#define PTE_BUFFERABLE (1 << 2) -#define PTE_CACHEABLE (1 << 3) +#define PTE_TYPE_MASK (_AT(pteval_t, 3) << 0) +#define PTE_TYPE_FAULT (_AT(pteval_t, 0) << 0) +#define PTE_TYPE_LARGE (_AT(pteval_t, 1) << 0) +#define PTE_TYPE_SMALL (_AT(pteval_t, 2) << 0) +#define PTE_TYPE_EXT (_AT(pteval_t, 3) << 0) /* v5 */ +#define PTE_BUFFERABLE (_AT(pteval_t, 1) << 2) +#define PTE_CACHEABLE (_AT(pteval_t, 1) << 3) /* * - extended small page/tiny page */ -#define PTE_EXT_XN (1 << 0) /* v6 */ -#define PTE_EXT_AP_MASK (3 << 4) -#define PTE_EXT_AP0 (1 << 4) -#define PTE_EXT_AP1 (2 << 4) -#define PTE_EXT_AP_UNO_SRO (0 << 4) +#define PTE_EXT_XN (_AT(pteval_t, 1) << 0) /* v6 */ +#define PTE_EXT_AP_MASK (_AT(pteval_t, 3) << 4) +#define PTE_EXT_AP0 (_AT(pteval_t, 1) << 4) +#define PTE_EXT_AP1 (_AT(pteval_t, 2) << 4) +#define PTE_EXT_AP_UNO_SRO (_AT(pteval_t, 0) << 4) #define PTE_EXT_AP_UNO_SRW (PTE_EXT_AP0) #define PTE_EXT_AP_URO_SRW (PTE_EXT_AP1) #define PTE_EXT_AP_URW_SRW (PTE_EXT_AP1|PTE_EXT_AP0) -#define PTE_EXT_TEX(x) ((x) << 6) /* v5 */ -#define PTE_EXT_APX (1 << 9) /* v6 */ -#define PTE_EXT_COHERENT (1 << 9) /* XScale3 */ -#define PTE_EXT_SHARED (1 << 10) /* v6 */ -#define PTE_EXT_NG (1 << 11) /* v6 */ +#define PTE_EXT_TEX(x) (_AT(pteval_t, (x)) << 6) /* v5 */ +#define PTE_EXT_APX (_AT(pteval_t, 1) << 9) /* v6 */ +#define PTE_EXT_COHERENT (_AT(pteval_t, 1) << 9) /* XScale3 */ +#define PTE_EXT_SHARED (_AT(pteval_t, 1) << 10) /* v6 */ +#define PTE_EXT_NG (_AT(pteval_t, 1) << 11) /* v6 */ /* * - small page */ -#define PTE_SMALL_AP_MASK (0xff << 4) -#define PTE_SMALL_AP_UNO_SRO (0x00 << 4) -#define PTE_SMALL_AP_UNO_SRW (0x55 << 4) -#define PTE_SMALL_AP_URO_SRW (0xaa << 4) -#define PTE_SMALL_AP_URW_SRW (0xff << 4) +#define PTE_SMALL_AP_MASK (_AT(pteval_t, 0xff) << 4) +#define PTE_SMALL_AP_UNO_SRO (_AT(pteval_t, 0x00) << 4) +#define PTE_SMALL_AP_UNO_SRW (_AT(pteval_t, 0x55) << 4) +#define PTE_SMALL_AP_URO_SRW (_AT(pteval_t, 0xaa) << 4) +#define PTE_SMALL_AP_URW_SRW (_AT(pteval_t, 0xff) << 4) #endif diff --git a/arch/arm/include/asm/pgtable-2level-types.h b/arch/arm/include/asm/pgtable-2level-types.h index 8a01f62d8a16..66cb5b0e89c5 100644 --- a/arch/arm/include/asm/pgtable-2level-types.h +++ b/arch/arm/include/asm/pgtable-2level-types.h @@ -19,7 +19,10 @@ #ifndef _ASM_PGTABLE_2LEVEL_TYPES_H #define _ASM_PGTABLE_2LEVEL_TYPES_H -typedef unsigned long pteval_t; +#include + +typedef u32 pteval_t; +typedef u32 pmdval_t; #undef STRICT_MM_TYPECHECKS @@ -28,9 +31,9 @@ typedef unsigned long pteval_t; * These are used to make use of C type-checking.. */ typedef struct { pteval_t pte; } pte_t; -typedef struct { unsigned long pmd; } pmd_t; -typedef struct { unsigned long pgd[2]; } pgd_t; -typedef struct { unsigned long pgprot; } pgprot_t; +typedef struct { pmdval_t pmd; } pmd_t; +typedef struct { pmdval_t pgd[2]; } pgd_t; +typedef struct { pteval_t pgprot; } pgprot_t; #define pte_val(x) ((x).pte) #define pmd_val(x) ((x).pmd) @@ -46,9 +49,9 @@ typedef struct { unsigned long pgprot; } pgprot_t; * .. while these make it easier on the compiler */ typedef pteval_t pte_t; -typedef unsigned long pmd_t; -typedef unsigned long pgd_t[2]; -typedef unsigned long pgprot_t; +typedef pmdval_t pmd_t; +typedef pmdval_t pgd_t[2]; +typedef pteval_t pgprot_t; #define pte_val(x) (x) #define pmd_val(x) (x) diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h index 8077145698ff..02b2f8203982 100644 --- a/arch/arm/include/asm/tlbflush.h +++ b/arch/arm/include/asm/tlbflush.h @@ -471,7 +471,7 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr) * these operations. This is typically used when we are removing * PMD entries. */ -static inline void flush_pmd_entry(pmd_t *pmd) +static inline void flush_pmd_entry(void *pmd) { const unsigned int __tlb_flag = __cpu_tlb_flags; @@ -487,7 +487,7 @@ static inline void flush_pmd_entry(pmd_t *pmd) dsb(); } -static inline void clean_pmd_entry(pmd_t *pmd) +static inline void clean_pmd_entry(void *pmd) { const unsigned int __tlb_flag = __cpu_tlb_flags; diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h index 010566799c80..ad7cce3bc431 100644 --- a/arch/arm/mm/mm.h +++ b/arch/arm/mm/mm.h @@ -12,8 +12,8 @@ static inline pmd_t *pmd_off_k(unsigned long virt) struct mem_type { pteval_t prot_pte; - unsigned int prot_l1; - unsigned int prot_sect; + pmdval_t prot_l1; + pmdval_t prot_sect; unsigned int domain; }; diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 36e983d98315..226f1804be12 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -60,7 +60,7 @@ EXPORT_SYMBOL(pgprot_kernel); struct cachepolicy { const char policy[16]; unsigned int cr_mask; - unsigned int pmd; + pmdval_t pmd; pteval_t pte; }; @@ -288,7 +288,7 @@ static void __init build_mem_type_table(void) { struct cachepolicy *cp; unsigned int cr = get_cr(); - unsigned int user_pgprot, kern_pgprot, vecs_pgprot; + pteval_t user_pgprot, kern_pgprot, vecs_pgprot; int cpu_arch = cpu_architecture(); int i; -- cgit v1.2.3 From d7c5d0dcffb3b5702d9477faceff4b8398e6fed0 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Mon, 5 Sep 2011 17:52:36 +0100 Subject: ARM: 7077/1: LPAE: Use a mask for physical addresses in page table entries With LPAE, the physical address mask is 40-bit while the page table entry is 64-bit. This patch introduces PHYS_MASK for the 2-level page table format, defined as ~0UL. Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/include/asm/pgtable-2level-hwdef.h | 2 ++ arch/arm/include/asm/pgtable.h | 6 +++--- 2 files changed, 5 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/pgtable-2level-hwdef.h b/arch/arm/include/asm/pgtable-2level-hwdef.h index 2b52c40edd80..5cfba15cb401 100644 --- a/arch/arm/include/asm/pgtable-2level-hwdef.h +++ b/arch/arm/include/asm/pgtable-2level-hwdef.h @@ -88,4 +88,6 @@ #define PTE_SMALL_AP_URO_SRW (_AT(pteval_t, 0xaa) << 4) #define PTE_SMALL_AP_URW_SRW (_AT(pteval_t, 0xff) << 4) +#define PHYS_MASK (~0UL) + #endif diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index d6436dacb17b..8ade1840c6f2 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h @@ -196,10 +196,10 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; static inline pte_t *pmd_page_vaddr(pmd_t pmd) { - return __va(pmd_val(pmd) & PAGE_MASK); + return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK); } -#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd))) +#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK)) /* we don't need complex calculations here as the pmd is folded into the pgd */ #define pmd_addr_end(addr,end) (end) @@ -220,7 +220,7 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) #define pte_offset_map(pmd,addr) (__pte_map(pmd) + pte_index(addr)) #define pte_unmap(pte) __pte_unmap(pte) -#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT) +#define pte_pfn(pte) ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT) #define pfn_pte(pfn,prot) __pte(__pfn_to_phys(pfn) | pgprot_val(prot)) #define pte_page(pte) pfn_to_page(pte_pfn(pte)) -- cgit v1.2.3 From 2656de7e0e3539351d30bdf107d7392b1cac0920 Mon Sep 17 00:00:00 2001 From: Paul Bolle Date: Thu, 6 Oct 2011 13:11:52 +0200 Subject: bcmring: drop commented out line in Kconfig There's no file named "drivers/char/bcmring/Kconfig". It seems it has never been part of the mainline kernel tree. So there's nothing to be sourced here. Signed-off-by: Paul Bolle Signed-off-by: Jiri Kosina --- arch/arm/mach-bcmring/Kconfig | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-bcmring/Kconfig b/arch/arm/mach-bcmring/Kconfig index 457b4384913e..9170d16dca50 100644 --- a/arch/arm/mach-bcmring/Kconfig +++ b/arch/arm/mach-bcmring/Kconfig @@ -17,5 +17,3 @@ config BCM_ZRELADDR hex "Compressed ZREL ADDR" endmenu - -# source "drivers/char/bcmring/Kconfig" -- cgit v1.2.3 From d0451c287cf4d0dff707a351c3c6edaed5e742ac Mon Sep 17 00:00:00 2001 From: Paul Bolle Date: Wed, 12 Oct 2011 14:18:51 +0200 Subject: ARM: mxc: fix Kconfig typo 'i.MX51' Signed-off-by: Paul Bolle Signed-off-by: Jiri Kosina --- arch/arm/plat-mxc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index a5353fc0793f..4c8fdbcc9467 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig @@ -39,7 +39,7 @@ config ARCH_MX503 select ARCH_MX50_SUPPORTED select ARCH_MX53_SUPPORTED help - This enables support for machines using Freescale's i.MX50 and i.MX51 + This enables support for machines using Freescale's i.MX50 and i.MX53 processors. config ARCH_MX51 -- cgit v1.2.3 From 98da3529536ed3c78ae493f4cc3d7ac8d43fc72c Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 2 May 2011 20:54:38 +0200 Subject: pinctrl: add a driver for the U300 pinmux This adds a driver for the U300 pinmux portions of the system controller "SYSCON". It also serves as an example of how to use the pinmux subsystem. This driver also houses the platform data for the only supported platform. This deletes the old U300 driver in arch/arm/mach-u300 and replace it with a driver using the new subsystem. The new driver is considerably fatter than the old one, but it also registers all 467 pins of the system and adds the power and EMIF pin groups and corresponding functions. The idea is to use this driver as a a reference for other implementation so it needs to be as complete and verbose as possible. Reviewed-by: Barry Song <21cnbao@gmail.com> [Fixup for changed function names and semantics in the v10 patch] Signed-off-by: Linus Walleij --- arch/arm/mach-u300/Kconfig | 2 + arch/arm/mach-u300/Makefile | 2 +- arch/arm/mach-u300/core.c | 84 ++- arch/arm/mach-u300/include/mach/syscon.h | 136 ---- arch/arm/mach-u300/mmc.c | 16 - arch/arm/mach-u300/padmux.c | 367 ---------- arch/arm/mach-u300/padmux.h | 39 - arch/arm/mach-u300/spi.c | 20 - drivers/pinctrl/Kconfig | 7 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinmux-u300.c | 1135 ++++++++++++++++++++++++++++++ 11 files changed, 1228 insertions(+), 581 deletions(-) delete mode 100644 arch/arm/mach-u300/padmux.c delete mode 100644 arch/arm/mach-u300/padmux.h create mode 100644 drivers/pinctrl/pinmux-u300.c (limited to 'arch/arm') diff --git a/arch/arm/mach-u300/Kconfig b/arch/arm/mach-u300/Kconfig index 32a7b0f7e9f7..449fd6a8dbd6 100644 --- a/arch/arm/mach-u300/Kconfig +++ b/arch/arm/mach-u300/Kconfig @@ -6,6 +6,8 @@ comment "ST-Ericsson Mobile Platform Products" config MACH_U300 bool "U300" + select PINCTRL + select PINMUX_U300 comment "ST-Ericsson U300/U330/U335/U365 Feature Selections" diff --git a/arch/arm/mach-u300/Makefile b/arch/arm/mach-u300/Makefile index 8fd354aaf0a7..285538124e5e 100644 --- a/arch/arm/mach-u300/Makefile +++ b/arch/arm/mach-u300/Makefile @@ -2,7 +2,7 @@ # Makefile for the linux kernel, U300 machine. # -obj-y := core.o clock.o timer.o padmux.o +obj-y := core.o clock.o timer.o obj-m := obj-n := obj- := diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index 399c89f14dfb..2f5929bdeaa2 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c @@ -25,6 +25,8 @@ #include #include #include +#include +#include #include #include @@ -1535,6 +1537,14 @@ static struct coh901318_platform coh901318_platform = { .max_channels = U300_DMA_CHANNELS, }; +static struct resource pinmux_resources[] = { + { + .start = U300_SYSCON_BASE, + .end = U300_SYSCON_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + static struct platform_device wdog_device = { .name = "coh901327_wdog", .id = -1, @@ -1630,6 +1640,72 @@ static struct platform_device dma_device = { }, }; +static struct platform_device pinmux_device = { + .name = "pinmux-u300", + .id = -1, + .num_resources = ARRAY_SIZE(pinmux_resources), + .resource = pinmux_resources, +}; + +/* Pinmux settings */ +static struct pinmux_map u300_pinmux_map[] = { + /* anonymous maps for chip power and EMIFs */ + PINMUX_MAP_PRIMARY_SYS_HOG("POWER", "power"), + PINMUX_MAP_PRIMARY_SYS_HOG("EMIF0", "emif0"), + PINMUX_MAP_PRIMARY_SYS_HOG("EMIF1", "emif1"), + /* per-device maps for MMC/SD, SPI and UART */ + PINMUX_MAP_PRIMARY("MMCSD", "mmc0", "mmci"), + PINMUX_MAP_PRIMARY("SPI", "spi0", "pl022"), + PINMUX_MAP_PRIMARY("UART0", "uart0", "uart0"), +}; + +struct u300_mux_hog { + const char *name; + struct device *dev; + struct pinmux *pmx; +}; + +static struct u300_mux_hog u300_mux_hogs[] = { + { + .name = "uart0", + .dev = &uart0_device.dev, + }, + { + .name = "spi0", + .dev = &pl022_device.dev, + }, + { + .name = "mmc0", + .dev = &mmcsd_device.dev, + }, +}; + +static int __init u300_pinmux_fetch(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(u300_mux_hogs); i++) { + struct pinmux *pmx; + int ret; + + pmx = pinmux_get(u300_mux_hogs[i].dev, NULL); + if (IS_ERR(pmx)) { + pr_err("u300: could not get pinmux hog %s\n", + u300_mux_hogs[i].name); + continue; + } + ret = pinmux_enable(pmx); + if (ret) { + pr_err("u300: could enable pinmux hog %s\n", + u300_mux_hogs[i].name); + continue; + } + u300_mux_hogs[i].pmx = pmx; + } + return 0; +} +subsys_initcall(u300_pinmux_fetch); + /* * Notice that AMBA devices are initialized before platform devices. * @@ -1643,10 +1719,10 @@ static struct platform_device *platform_devs[] __initdata = { &gpio_device, &nand_device, &wdog_device, - &ave_device + &ave_device, + &pinmux_device, }; - /* * Interrupts: the U300 platforms have two pl190 ARM PrimeCells connected * together so some interrupts are connected to the first one and some @@ -1828,6 +1904,10 @@ void __init u300_init_devices(void) u300_assign_physmem(); + /* Initialize pinmuxing */ + pinmux_register_mappings(u300_pinmux_map, + ARRAY_SIZE(u300_pinmux_map)); + /* Register subdevices on the I2C buses */ u300_i2c_register_board_devices(); diff --git a/arch/arm/mach-u300/include/mach/syscon.h b/arch/arm/mach-u300/include/mach/syscon.h index 7444f5c7da97..6e84f07a7c6f 100644 --- a/arch/arm/mach-u300/include/mach/syscon.h +++ b/arch/arm/mach-u300/include/mach/syscon.h @@ -234,91 +234,6 @@ #define U300_SYSCON_ECCR_EMIF_1_RET_OUT_CLK_EN_N_DISABLE (0x0004) #define U300_SYSCON_ECCR_EMIF_MEMCLK_RET_EN_N_DISABLE (0x0002) #define U300_SYSCON_ECCR_EMIF_SDRCLK_RET_EN_N_DISABLE (0x0001) -/* PAD MUX Control register 1 (LOW) 16bit (R/W) */ -#define U300_SYSCON_PMC1LR (0x007C) -#define U300_SYSCON_PMC1LR_MASK (0xFFFF) -#define U300_SYSCON_PMC1LR_CDI_MASK (0xC000) -#define U300_SYSCON_PMC1LR_CDI_CDI (0x0000) -#define U300_SYSCON_PMC1LR_CDI_EMIF (0x4000) -#ifdef CONFIG_MACH_U300_BS335 -#define U300_SYSCON_PMC1LR_CDI_CDI2 (0x8000) -#define U300_SYSCON_PMC1LR_CDI_WCDMA_APP_GPIO (0xC000) -#elif CONFIG_MACH_U300_BS365 -#define U300_SYSCON_PMC1LR_CDI_GPIO (0x8000) -#define U300_SYSCON_PMC1LR_CDI_WCDMA (0xC000) -#endif -#define U300_SYSCON_PMC1LR_PDI_MASK (0x3000) -#define U300_SYSCON_PMC1LR_PDI_PDI (0x0000) -#define U300_SYSCON_PMC1LR_PDI_EGG (0x1000) -#define U300_SYSCON_PMC1LR_PDI_WCDMA (0x3000) -#define U300_SYSCON_PMC1LR_MMCSD_MASK (0x0C00) -#define U300_SYSCON_PMC1LR_MMCSD_MMCSD (0x0000) -#define U300_SYSCON_PMC1LR_MMCSD_MSPRO (0x0400) -#define U300_SYSCON_PMC1LR_MMCSD_DSP (0x0800) -#define U300_SYSCON_PMC1LR_MMCSD_WCDMA (0x0C00) -#define U300_SYSCON_PMC1LR_ETM_MASK (0x0300) -#define U300_SYSCON_PMC1LR_ETM_ACC (0x0000) -#define U300_SYSCON_PMC1LR_ETM_APP (0x0100) -#define U300_SYSCON_PMC1LR_EMIF_1_CS2_MASK (0x00C0) -#define U300_SYSCON_PMC1LR_EMIF_1_CS2_STATIC (0x0000) -#define U300_SYSCON_PMC1LR_EMIF_1_CS2_NFIF (0x0040) -#define U300_SYSCON_PMC1LR_EMIF_1_CS2_SDRAM (0x0080) -#define U300_SYSCON_PMC1LR_EMIF_1_CS2_STATIC_2GB (0x00C0) -#define U300_SYSCON_PMC1LR_EMIF_1_CS1_MASK (0x0030) -#define U300_SYSCON_PMC1LR_EMIF_1_CS1_STATIC (0x0000) -#define U300_SYSCON_PMC1LR_EMIF_1_CS1_NFIF (0x0010) -#define U300_SYSCON_PMC1LR_EMIF_1_CS1_SDRAM (0x0020) -#define U300_SYSCON_PMC1LR_EMIF_1_CS1_SEMI (0x0030) -#define U300_SYSCON_PMC1LR_EMIF_1_CS0_MASK (0x000C) -#define U300_SYSCON_PMC1LR_EMIF_1_CS0_STATIC (0x0000) -#define U300_SYSCON_PMC1LR_EMIF_1_CS0_NFIF (0x0004) -#define U300_SYSCON_PMC1LR_EMIF_1_CS0_SDRAM (0x0008) -#define U300_SYSCON_PMC1LR_EMIF_1_CS0_SEMI (0x000C) -#define U300_SYSCON_PMC1LR_EMIF_1_MASK (0x0003) -#define U300_SYSCON_PMC1LR_EMIF_1_STATIC (0x0000) -#define U300_SYSCON_PMC1LR_EMIF_1_SDRAM0 (0x0001) -#define U300_SYSCON_PMC1LR_EMIF_1_SDRAM1 (0x0002) -#define U300_SYSCON_PMC1LR_EMIF_1 (0x0003) -/* PAD MUX Control register 2 (HIGH) 16bit (R/W) */ -#define U300_SYSCON_PMC1HR (0x007E) -#define U300_SYSCON_PMC1HR_MASK (0xFFFF) -#define U300_SYSCON_PMC1HR_MISC_2_MASK (0xC000) -#define U300_SYSCON_PMC1HR_MISC_2_APP_GPIO (0x0000) -#define U300_SYSCON_PMC1HR_MISC_2_MSPRO (0x4000) -#define U300_SYSCON_PMC1HR_MISC_2_DSP (0x8000) -#define U300_SYSCON_PMC1HR_MISC_2_AAIF (0xC000) -#define U300_SYSCON_PMC1HR_APP_GPIO_2_MASK (0x3000) -#define U300_SYSCON_PMC1HR_APP_GPIO_2_APP_GPIO (0x0000) -#define U300_SYSCON_PMC1HR_APP_GPIO_2_NFIF (0x1000) -#define U300_SYSCON_PMC1HR_APP_GPIO_2_DSP (0x2000) -#define U300_SYSCON_PMC1HR_APP_GPIO_2_AAIF (0x3000) -#define U300_SYSCON_PMC1HR_APP_GPIO_1_MASK (0x0C00) -#define U300_SYSCON_PMC1HR_APP_GPIO_1_APP_GPIO (0x0000) -#define U300_SYSCON_PMC1HR_APP_GPIO_1_MMC (0x0400) -#define U300_SYSCON_PMC1HR_APP_GPIO_1_DSP (0x0800) -#define U300_SYSCON_PMC1HR_APP_GPIO_1_AAIF (0x0C00) -#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_MASK (0x0300) -#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_APP_GPIO (0x0000) -#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_SPI (0x0100) -#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_AAIF (0x0300) -#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_MASK (0x00C0) -#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_APP_GPIO (0x0000) -#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_SPI (0x0040) -#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_AAIF (0x00C0) -#define U300_SYSCON_PMC1HR_APP_SPI_2_MASK (0x0030) -#define U300_SYSCON_PMC1HR_APP_SPI_2_APP_GPIO (0x0000) -#define U300_SYSCON_PMC1HR_APP_SPI_2_SPI (0x0010) -#define U300_SYSCON_PMC1HR_APP_SPI_2_DSP (0x0020) -#define U300_SYSCON_PMC1HR_APP_SPI_2_AAIF (0x0030) -#define U300_SYSCON_PMC1HR_APP_UART0_2_MASK (0x000C) -#define U300_SYSCON_PMC1HR_APP_UART0_2_APP_GPIO (0x0000) -#define U300_SYSCON_PMC1HR_APP_UART0_2_UART0 (0x0004) -#define U300_SYSCON_PMC1HR_APP_UART0_2_NFIF_CS (0x0008) -#define U300_SYSCON_PMC1HR_APP_UART0_2_AAIF (0x000C) -#define U300_SYSCON_PMC1HR_APP_UART0_1_MASK (0x0003) -#define U300_SYSCON_PMC1HR_APP_UART0_1_APP_GPIO (0x0000) -#define U300_SYSCON_PMC1HR_APP_UART0_1_UART0 (0x0001) -#define U300_SYSCON_PMC1HR_APP_UART0_1_AAIF (0x0003) /* Step one for killing the applications system 16bit (-/W) */ #define U300_SYSCON_KA1R (0x0080) #define U300_SYSCON_KA1R_MASK (0xFFFF) @@ -357,57 +272,6 @@ #define U300_SYSCON_PUCR_EMIF_1_16BIT_PU_ENABLE (0x0080) #define U300_SYSCON_PUCR_EMIF_1_8BIT_PU_ENABLE (0x0040) #define U300_SYSCON_PUCR_KEY_IN_PU_EN_MASK (0x003F) -/* Padmux 2 control */ -#define U300_SYSCON_PMC2R (0x100) -#define U300_SYSCON_PMC2R_APP_MISC_0_MASK (0x00C0) -#define U300_SYSCON_PMC2R_APP_MISC_0_APP_GPIO (0x0000) -#define U300_SYSCON_PMC2R_APP_MISC_0_EMIF_SDRAM (0x0040) -#define U300_SYSCON_PMC2R_APP_MISC_0_MMC (0x0080) -#define U300_SYSCON_PMC2R_APP_MISC_0_CDI2 (0x00C0) -#define U300_SYSCON_PMC2R_APP_MISC_1_MASK (0x0300) -#define U300_SYSCON_PMC2R_APP_MISC_1_APP_GPIO (0x0000) -#define U300_SYSCON_PMC2R_APP_MISC_1_EMIF_SDRAM (0x0100) -#define U300_SYSCON_PMC2R_APP_MISC_1_MMC (0x0200) -#define U300_SYSCON_PMC2R_APP_MISC_1_CDI2 (0x0300) -#define U300_SYSCON_PMC2R_APP_MISC_2_MASK (0x0C00) -#define U300_SYSCON_PMC2R_APP_MISC_2_APP_GPIO (0x0000) -#define U300_SYSCON_PMC2R_APP_MISC_2_EMIF_SDRAM (0x0400) -#define U300_SYSCON_PMC2R_APP_MISC_2_MMC (0x0800) -#define U300_SYSCON_PMC2R_APP_MISC_2_CDI2 (0x0C00) -#define U300_SYSCON_PMC2R_APP_MISC_3_MASK (0x3000) -#define U300_SYSCON_PMC2R_APP_MISC_3_APP_GPIO (0x0000) -#define U300_SYSCON_PMC2R_APP_MISC_3_EMIF_SDRAM (0x1000) -#define U300_SYSCON_PMC2R_APP_MISC_3_MMC (0x2000) -#define U300_SYSCON_PMC2R_APP_MISC_3_CDI2 (0x3000) -#define U300_SYSCON_PMC2R_APP_MISC_4_MASK (0xC000) -#define U300_SYSCON_PMC2R_APP_MISC_4_APP_GPIO (0x0000) -#define U300_SYSCON_PMC2R_APP_MISC_4_EMIF_SDRAM (0x4000) -#define U300_SYSCON_PMC2R_APP_MISC_4_MMC (0x8000) -#define U300_SYSCON_PMC2R_APP_MISC_4_ACC_GPIO (0xC000) -/* TODO: More SYSCON registers missing */ -#define U300_SYSCON_PMC3R (0x10c) -#define U300_SYSCON_PMC3R_APP_MISC_11_MASK (0xc000) -#define U300_SYSCON_PMC3R_APP_MISC_11_SPI (0x4000) -#define U300_SYSCON_PMC3R_APP_MISC_10_MASK (0x3000) -#define U300_SYSCON_PMC3R_APP_MISC_10_SPI (0x1000) -/* TODO: Missing other configs */ -#define U300_SYSCON_PMC4R (0x168) -#define U300_SYSCON_PMC4R_APP_MISC_12_MASK (0x0003) -#define U300_SYSCON_PMC4R_APP_MISC_12_APP_GPIO (0x0000) -#define U300_SYSCON_PMC4R_APP_MISC_13_MASK (0x000C) -#define U300_SYSCON_PMC4R_APP_MISC_13_CDI (0x0000) -#define U300_SYSCON_PMC4R_APP_MISC_13_SMIA (0x0004) -#define U300_SYSCON_PMC4R_APP_MISC_13_SMIA2 (0x0008) -#define U300_SYSCON_PMC4R_APP_MISC_13_APP_GPIO (0x000C) -#define U300_SYSCON_PMC4R_APP_MISC_14_MASK (0x0030) -#define U300_SYSCON_PMC4R_APP_MISC_14_CDI (0x0000) -#define U300_SYSCON_PMC4R_APP_MISC_14_SMIA (0x0010) -#define U300_SYSCON_PMC4R_APP_MISC_14_CDI2 (0x0020) -#define U300_SYSCON_PMC4R_APP_MISC_14_APP_GPIO (0x0030) -#define U300_SYSCON_PMC4R_APP_MISC_16_MASK (0x0300) -#define U300_SYSCON_PMC4R_APP_MISC_16_APP_GPIO_13 (0x0000) -#define U300_SYSCON_PMC4R_APP_MISC_16_APP_UART1_CTS (0x0100) -#define U300_SYSCON_PMC4R_APP_MISC_16_EMIF_1_STATIC_CS5_N (0x0200) /* SYS_0_CLK_CONTROL first clock control 16bit (R/W) */ #define U300_SYSCON_S0CCR (0x120) #define U300_SYSCON_S0CCR_FIELD_MASK (0x43FF) diff --git a/arch/arm/mach-u300/mmc.c b/arch/arm/mach-u300/mmc.c index 677ccef5cd32..d5e4a98a9ab8 100644 --- a/arch/arm/mach-u300/mmc.c +++ b/arch/arm/mach-u300/mmc.c @@ -21,7 +21,6 @@ #include #include "mmc.h" -#include "padmux.h" static struct mmci_platform_data mmc0_plat_data = { /* @@ -45,24 +44,9 @@ static struct mmci_platform_data mmc0_plat_data = { int __devinit mmc_init(struct amba_device *adev) { struct device *mmcsd_device = &adev->dev; - struct pmx *pmx; int ret = 0; mmcsd_device->platform_data = &mmc0_plat_data; - /* - * Setup padmuxing for MMC. Since this must always be - * compiled into the kernel, pmx is never released. - */ - pmx = pmx_get(mmcsd_device, U300_APP_PMX_MMC_SETTING); - - if (IS_ERR(pmx)) - pr_warning("Could not get padmux handle\n"); - else { - ret = pmx_activate(mmcsd_device, pmx); - if (IS_ERR_VALUE(ret)) - pr_warning("Could not activate padmuxing\n"); - } - return ret; } diff --git a/arch/arm/mach-u300/padmux.c b/arch/arm/mach-u300/padmux.c deleted file mode 100644 index 4c93c6cefd37..000000000000 --- a/arch/arm/mach-u300/padmux.c +++ /dev/null @@ -1,367 +0,0 @@ -/* - * - * arch/arm/mach-u300/padmux.c - * - * - * Copyright (C) 2009 ST-Ericsson AB - * License terms: GNU General Public License (GPL) version 2 - * U300 PADMUX functions - * Author: Martin Persson - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "padmux.h" - -static DEFINE_MUTEX(pmx_mutex); - -const u32 pmx_registers[] = { - (U300_SYSCON_VBASE + U300_SYSCON_PMC1LR), - (U300_SYSCON_VBASE + U300_SYSCON_PMC1HR), - (U300_SYSCON_VBASE + U300_SYSCON_PMC2R), - (U300_SYSCON_VBASE + U300_SYSCON_PMC3R), - (U300_SYSCON_VBASE + U300_SYSCON_PMC4R) -}; - -/* High level functionality */ - -/* Lazy dog: - * onmask = { - * {"PMC1LR" mask, "PMC1LR" value}, - * {"PMC1HR" mask, "PMC1HR" value}, - * {"PMC2R" mask, "PMC2R" value}, - * {"PMC3R" mask, "PMC3R" value}, - * {"PMC4R" mask, "PMC4R" value} - * } - */ -static struct pmx mmc_setting = { - .setting = U300_APP_PMX_MMC_SETTING, - .default_on = false, - .activated = false, - .name = "MMC", - .onmask = { - {U300_SYSCON_PMC1LR_MMCSD_MASK, - U300_SYSCON_PMC1LR_MMCSD_MMCSD}, - {0, 0}, - {0, 0}, - {0, 0}, - {U300_SYSCON_PMC4R_APP_MISC_12_MASK, - U300_SYSCON_PMC4R_APP_MISC_12_APP_GPIO} - }, -}; - -static struct pmx spi_setting = { - .setting = U300_APP_PMX_SPI_SETTING, - .default_on = false, - .activated = false, - .name = "SPI", - .onmask = {{0, 0}, - {U300_SYSCON_PMC1HR_APP_SPI_2_MASK | - U300_SYSCON_PMC1HR_APP_SPI_CS_1_MASK | - U300_SYSCON_PMC1HR_APP_SPI_CS_2_MASK, - U300_SYSCON_PMC1HR_APP_SPI_2_SPI | - U300_SYSCON_PMC1HR_APP_SPI_CS_1_SPI | - U300_SYSCON_PMC1HR_APP_SPI_CS_2_SPI}, - {0, 0}, - {0, 0}, - {0, 0} - }, -}; - -/* Available padmux settings */ -static struct pmx *pmx_settings[] = { - &mmc_setting, - &spi_setting, -}; - -static void update_registers(struct pmx *pmx, bool activate) -{ - u16 regval, val, mask; - int i; - - for (i = 0; i < ARRAY_SIZE(pmx_registers); i++) { - if (activate) - val = pmx->onmask[i].val; - else - val = 0; - - mask = pmx->onmask[i].mask; - if (mask != 0) { - regval = readw(pmx_registers[i]); - regval &= ~mask; - regval |= val; - writew(regval, pmx_registers[i]); - } - } -} - -struct pmx *pmx_get(struct device *dev, enum pmx_settings setting) -{ - int i; - struct pmx *pmx = ERR_PTR(-ENOENT); - - if (dev == NULL) - return ERR_PTR(-EINVAL); - - mutex_lock(&pmx_mutex); - for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) { - - if (setting == pmx_settings[i]->setting) { - - if (pmx_settings[i]->dev != NULL) { - WARN(1, "padmux: required setting " - "in use by another consumer\n"); - } else { - pmx = pmx_settings[i]; - pmx->dev = dev; - dev_dbg(dev, "padmux: setting nr %d is now " - "bound to %s and ready to use\n", - setting, dev_name(dev)); - break; - } - } - } - mutex_unlock(&pmx_mutex); - - return pmx; -} -EXPORT_SYMBOL(pmx_get); - -int pmx_put(struct device *dev, struct pmx *pmx) -{ - int i; - int ret = -ENOENT; - - if (pmx == NULL || dev == NULL) - return -EINVAL; - - mutex_lock(&pmx_mutex); - for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) { - - if (pmx->setting == pmx_settings[i]->setting) { - - if (dev != pmx->dev) { - WARN(1, "padmux: cannot release handle as " - "it is bound to another consumer\n"); - ret = -EINVAL; - break; - } else { - pmx_settings[i]->dev = NULL; - ret = 0; - break; - } - } - } - mutex_unlock(&pmx_mutex); - - return ret; -} -EXPORT_SYMBOL(pmx_put); - -int pmx_activate(struct device *dev, struct pmx *pmx) -{ - int i, j, ret; - ret = 0; - - if (pmx == NULL || dev == NULL) - return -EINVAL; - - mutex_lock(&pmx_mutex); - - /* Make sure the required bits are not used */ - for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) { - - if (pmx_settings[i]->dev == NULL || pmx_settings[i] == pmx) - continue; - - for (j = 0; j < ARRAY_SIZE(pmx_registers); j++) { - - if (pmx_settings[i]->onmask[j].mask & pmx-> - onmask[j].mask) { - /* More than one entry on the same bits */ - WARN(1, "padmux: cannot activate " - "setting. Bit conflict with " - "an active setting\n"); - - ret = -EUSERS; - goto exit; - } - } - } - update_registers(pmx, true); - pmx->activated = true; - dev_dbg(dev, "padmux: setting nr %d is activated\n", - pmx->setting); - -exit: - mutex_unlock(&pmx_mutex); - return ret; -} -EXPORT_SYMBOL(pmx_activate); - -int pmx_deactivate(struct device *dev, struct pmx *pmx) -{ - int i; - int ret = -ENOENT; - - if (pmx == NULL || dev == NULL) - return -EINVAL; - - mutex_lock(&pmx_mutex); - for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) { - - if (pmx_settings[i]->dev == NULL) - continue; - - if (pmx->setting == pmx_settings[i]->setting) { - - if (dev != pmx->dev) { - WARN(1, "padmux: cannot deactivate " - "pmx setting as it was activated " - "by another consumer\n"); - - ret = -EBUSY; - continue; - } else { - update_registers(pmx, false); - pmx_settings[i]->dev = NULL; - pmx->activated = false; - ret = 0; - dev_dbg(dev, "padmux: setting nr %d is deactivated", - pmx->setting); - break; - } - } - } - mutex_unlock(&pmx_mutex); - - return ret; -} -EXPORT_SYMBOL(pmx_deactivate); - -/* - * For internal use only. If it is to be exported, - * it should be reentrant. Notice that pmx_activate - * (i.e. runtime settings) always override default settings. - */ -static int pmx_set_default(void) -{ - /* Used to identify several entries on the same bits */ - u16 modbits[ARRAY_SIZE(pmx_registers)]; - - int i, j; - - memset(modbits, 0, ARRAY_SIZE(pmx_registers) * sizeof(u16)); - - for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) { - - if (!pmx_settings[i]->default_on) - continue; - - for (j = 0; j < ARRAY_SIZE(pmx_registers); j++) { - - /* Make sure there is only one entry on the same bits */ - if (modbits[j] & pmx_settings[i]->onmask[j].mask) { - BUG(); - return -EUSERS; - } - modbits[j] |= pmx_settings[i]->onmask[j].mask; - } - update_registers(pmx_settings[i], true); - } - return 0; -} - -#if (defined(CONFIG_DEBUG_FS) && defined(CONFIG_U300_DEBUG)) -static int pmx_show(struct seq_file *s, void *data) -{ - int i; - seq_printf(s, "-------------------------------------------------\n"); - seq_printf(s, "SETTING BOUND TO DEVICE STATE\n"); - seq_printf(s, "-------------------------------------------------\n"); - mutex_lock(&pmx_mutex); - for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) { - /* Format pmx and device name nicely */ - char cdp[33]; - int chars; - - chars = snprintf(&cdp[0], 17, "%s", pmx_settings[i]->name); - while (chars < 16) { - cdp[chars] = ' '; - chars++; - } - chars = snprintf(&cdp[16], 17, "%s", pmx_settings[i]->dev ? - dev_name(pmx_settings[i]->dev) : "N/A"); - while (chars < 16) { - cdp[chars+16] = ' '; - chars++; - } - cdp[32] = '\0'; - - seq_printf(s, - "%s\t%s\n", - &cdp[0], - pmx_settings[i]->activated ? - "ACTIVATED" : "DEACTIVATED" - ); - - } - mutex_unlock(&pmx_mutex); - return 0; -} - -static int pmx_open(struct inode *inode, struct file *file) -{ - return single_open(file, pmx_show, NULL); -} - -static const struct file_operations pmx_operations = { - .owner = THIS_MODULE, - .open = pmx_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static int __init init_pmx_read_debugfs(void) -{ - /* Expose a simple debugfs interface to view pmx settings */ - (void) debugfs_create_file("padmux", S_IFREG | S_IRUGO, - NULL, NULL, - &pmx_operations); - return 0; -} - -/* - * This needs to come in after the core_initcall(), - * because debugfs is not available until - * the subsystems come up. - */ -module_init(init_pmx_read_debugfs); -#endif - -static int __init pmx_init(void) -{ - int ret; - - ret = pmx_set_default(); - - if (IS_ERR_VALUE(ret)) - pr_crit("padmux: default settings could not be set\n"); - - return 0; -} - -/* Should be initialized before consumers */ -core_initcall(pmx_init); diff --git a/arch/arm/mach-u300/padmux.h b/arch/arm/mach-u300/padmux.h deleted file mode 100644 index 6e8b86064097..000000000000 --- a/arch/arm/mach-u300/padmux.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * - * arch/arm/mach-u300/padmux.h - * - * - * Copyright (C) 2009 ST-Ericsson AB - * License terms: GNU General Public License (GPL) version 2 - * U300 PADMUX API - * Author: Martin Persson - */ - -#ifndef __MACH_U300_PADMUX_H -#define __MACH_U300_PADMUX_H - -enum pmx_settings { - U300_APP_PMX_MMC_SETTING, - U300_APP_PMX_SPI_SETTING -}; - -struct pmx_onmask { - u16 mask; /* Mask bits */ - u16 val; /* Value when active */ -}; - -struct pmx { - struct device *dev; - enum pmx_settings setting; - char *name; - bool activated; - bool default_on; - struct pmx_onmask onmask[]; -}; - -struct pmx *pmx_get(struct device *dev, enum pmx_settings setting); -int pmx_put(struct device *dev, struct pmx *pmx); -int pmx_activate(struct device *dev, struct pmx *pmx); -int pmx_deactivate(struct device *dev, struct pmx *pmx); - -#endif diff --git a/arch/arm/mach-u300/spi.c b/arch/arm/mach-u300/spi.c index 7b597e2b19e2..a1affacfa59c 100644 --- a/arch/arm/mach-u300/spi.c +++ b/arch/arm/mach-u300/spi.c @@ -14,8 +14,6 @@ #include #include -#include "padmux.h" - /* * The following is for the actual devices on the SSP/SPI bus */ @@ -95,25 +93,7 @@ static struct pl022_ssp_controller ssp_platform_data = { void __init u300_spi_init(struct amba_device *adev) { - struct pmx *pmx; - adev->dev.platform_data = &ssp_platform_data; - /* - * Setup padmuxing for SPI. Since this must always be - * compiled into the kernel, pmx is never released. - */ - pmx = pmx_get(&adev->dev, U300_APP_PMX_SPI_SETTING); - - if (IS_ERR(pmx)) - dev_warn(&adev->dev, "Could not get padmux handle\n"); - else { - int ret; - - ret = pmx_activate(&adev->dev, pmx); - if (IS_ERR_VALUE(ret)) - dev_warn(&adev->dev, "Could not activate padmuxing\n"); - } - } void __init u300_spi_register_board_devices(void) diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 02b4d4e92ffe..7b175c37731f 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -26,4 +26,11 @@ config DEBUG_PINCTRL help Say Y here to add some extra checks and diagnostics to PINCTRL calls. +config PINMUX_U300 + bool "U300 pinmux driver" + depends on ARCH_U300 + select PINMUX + help + Say Y here to enable the U300 pinmux driver + endif diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 596ce9f22896..63d4241a0918 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -4,3 +4,4 @@ ccflags-$(CONFIG_DEBUG_PINMUX) += -DDEBUG obj-$(CONFIG_PINCTRL) += core.o obj-$(CONFIG_PINMUX) += pinmux.o +obj-$(CONFIG_PINMUX_U300) += pinmux-u300.o diff --git a/drivers/pinctrl/pinmux-u300.c b/drivers/pinctrl/pinmux-u300.c new file mode 100644 index 000000000000..f9db1cebff00 --- /dev/null +++ b/drivers/pinctrl/pinmux-u300.c @@ -0,0 +1,1135 @@ +/* + * Driver for the U300 pin controller + * + * Based on the original U300 padmux functions + * Copyright (C) 2009-2011 ST-Ericsson AB + * Author: Martin Persson + * Author: Linus Walleij + * + * The DB3350 design and control registers are oriented around pads rather than + * pins, so we enumerate the pads we can mux rather than actual pins. The pads + * are connected to different pins in different packaging types, so it would + * be confusing. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Register definitions for the U300 Padmux control registers in the + * system controller + */ + +/* PAD MUX Control register 1 (LOW) 16bit (R/W) */ +#define U300_SYSCON_PMC1LR 0x007C +#define U300_SYSCON_PMC1LR_MASK 0xFFFF +#define U300_SYSCON_PMC1LR_CDI_MASK 0xC000 +#define U300_SYSCON_PMC1LR_CDI_CDI 0x0000 +#define U300_SYSCON_PMC1LR_CDI_EMIF 0x4000 +/* For BS335 */ +#define U300_SYSCON_PMC1LR_CDI_CDI2 0x8000 +#define U300_SYSCON_PMC1LR_CDI_WCDMA_APP_GPIO 0xC000 +/* For BS365 */ +#define U300_SYSCON_PMC1LR_CDI_GPIO 0x8000 +#define U300_SYSCON_PMC1LR_CDI_WCDMA 0xC000 +/* Common defs */ +#define U300_SYSCON_PMC1LR_PDI_MASK 0x3000 +#define U300_SYSCON_PMC1LR_PDI_PDI 0x0000 +#define U300_SYSCON_PMC1LR_PDI_EGG 0x1000 +#define U300_SYSCON_PMC1LR_PDI_WCDMA 0x3000 +#define U300_SYSCON_PMC1LR_MMCSD_MASK 0x0C00 +#define U300_SYSCON_PMC1LR_MMCSD_MMCSD 0x0000 +#define U300_SYSCON_PMC1LR_MMCSD_MSPRO 0x0400 +#define U300_SYSCON_PMC1LR_MMCSD_DSP 0x0800 +#define U300_SYSCON_PMC1LR_MMCSD_WCDMA 0x0C00 +#define U300_SYSCON_PMC1LR_ETM_MASK 0x0300 +#define U300_SYSCON_PMC1LR_ETM_ACC 0x0000 +#define U300_SYSCON_PMC1LR_ETM_APP 0x0100 +#define U300_SYSCON_PMC1LR_EMIF_1_CS2_MASK 0x00C0 +#define U300_SYSCON_PMC1LR_EMIF_1_CS2_STATIC 0x0000 +#define U300_SYSCON_PMC1LR_EMIF_1_CS2_NFIF 0x0040 +#define U300_SYSCON_PMC1LR_EMIF_1_CS2_SDRAM 0x0080 +#define U300_SYSCON_PMC1LR_EMIF_1_CS2_STATIC_2GB 0x00C0 +#define U300_SYSCON_PMC1LR_EMIF_1_CS1_MASK 0x0030 +#define U300_SYSCON_PMC1LR_EMIF_1_CS1_STATIC 0x0000 +#define U300_SYSCON_PMC1LR_EMIF_1_CS1_NFIF 0x0010 +#define U300_SYSCON_PMC1LR_EMIF_1_CS1_SDRAM 0x0020 +#define U300_SYSCON_PMC1LR_EMIF_1_CS1_SEMI 0x0030 +#define U300_SYSCON_PMC1LR_EMIF_1_CS0_MASK 0x000C +#define U300_SYSCON_PMC1LR_EMIF_1_CS0_STATIC 0x0000 +#define U300_SYSCON_PMC1LR_EMIF_1_CS0_NFIF 0x0004 +#define U300_SYSCON_PMC1LR_EMIF_1_CS0_SDRAM 0x0008 +#define U300_SYSCON_PMC1LR_EMIF_1_CS0_SEMI 0x000C +#define U300_SYSCON_PMC1LR_EMIF_1_MASK 0x0003 +#define U300_SYSCON_PMC1LR_EMIF_1_STATIC 0x0000 +#define U300_SYSCON_PMC1LR_EMIF_1_SDRAM0 0x0001 +#define U300_SYSCON_PMC1LR_EMIF_1_SDRAM1 0x0002 +#define U300_SYSCON_PMC1LR_EMIF_1 0x0003 +/* PAD MUX Control register 2 (HIGH) 16bit (R/W) */ +#define U300_SYSCON_PMC1HR 0x007E +#define U300_SYSCON_PMC1HR_MASK 0xFFFF +#define U300_SYSCON_PMC1HR_MISC_2_MASK 0xC000 +#define U300_SYSCON_PMC1HR_MISC_2_APP_GPIO 0x0000 +#define U300_SYSCON_PMC1HR_MISC_2_MSPRO 0x4000 +#define U300_SYSCON_PMC1HR_MISC_2_DSP 0x8000 +#define U300_SYSCON_PMC1HR_MISC_2_AAIF 0xC000 +#define U300_SYSCON_PMC1HR_APP_GPIO_2_MASK 0x3000 +#define U300_SYSCON_PMC1HR_APP_GPIO_2_APP_GPIO 0x0000 +#define U300_SYSCON_PMC1HR_APP_GPIO_2_NFIF 0x1000 +#define U300_SYSCON_PMC1HR_APP_GPIO_2_DSP 0x2000 +#define U300_SYSCON_PMC1HR_APP_GPIO_2_AAIF 0x3000 +#define U300_SYSCON_PMC1HR_APP_GPIO_1_MASK 0x0C00 +#define U300_SYSCON_PMC1HR_APP_GPIO_1_APP_GPIO 0x0000 +#define U300_SYSCON_PMC1HR_APP_GPIO_1_MMC 0x0400 +#define U300_SYSCON_PMC1HR_APP_GPIO_1_DSP 0x0800 +#define U300_SYSCON_PMC1HR_APP_GPIO_1_AAIF 0x0C00 +#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_MASK 0x0300 +#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_APP_GPIO 0x0000 +#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_SPI 0x0100 +#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_AAIF 0x0300 +#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_MASK 0x00C0 +#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_APP_GPIO 0x0000 +#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_SPI 0x0040 +#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_AAIF 0x00C0 +#define U300_SYSCON_PMC1HR_APP_SPI_2_MASK 0x0030 +#define U300_SYSCON_PMC1HR_APP_SPI_2_APP_GPIO 0x0000 +#define U300_SYSCON_PMC1HR_APP_SPI_2_SPI 0x0010 +#define U300_SYSCON_PMC1HR_APP_SPI_2_DSP 0x0020 +#define U300_SYSCON_PMC1HR_APP_SPI_2_AAIF 0x0030 +#define U300_SYSCON_PMC1HR_APP_UART0_2_MASK 0x000C +#define U300_SYSCON_PMC1HR_APP_UART0_2_APP_GPIO 0x0000 +#define U300_SYSCON_PMC1HR_APP_UART0_2_UART0 0x0004 +#define U300_SYSCON_PMC1HR_APP_UART0_2_NFIF_CS 0x0008 +#define U300_SYSCON_PMC1HR_APP_UART0_2_AAIF 0x000C +#define U300_SYSCON_PMC1HR_APP_UART0_1_MASK 0x0003 +#define U300_SYSCON_PMC1HR_APP_UART0_1_APP_GPIO 0x0000 +#define U300_SYSCON_PMC1HR_APP_UART0_1_UART0 0x0001 +#define U300_SYSCON_PMC1HR_APP_UART0_1_AAIF 0x0003 +/* Padmux 2 control */ +#define U300_SYSCON_PMC2R 0x100 +#define U300_SYSCON_PMC2R_APP_MISC_0_MASK 0x00C0 +#define U300_SYSCON_PMC2R_APP_MISC_0_APP_GPIO 0x0000 +#define U300_SYSCON_PMC2R_APP_MISC_0_EMIF_SDRAM 0x0040 +#define U300_SYSCON_PMC2R_APP_MISC_0_MMC 0x0080 +#define U300_SYSCON_PMC2R_APP_MISC_0_CDI2 0x00C0 +#define U300_SYSCON_PMC2R_APP_MISC_1_MASK 0x0300 +#define U300_SYSCON_PMC2R_APP_MISC_1_APP_GPIO 0x0000 +#define U300_SYSCON_PMC2R_APP_MISC_1_EMIF_SDRAM 0x0100 +#define U300_SYSCON_PMC2R_APP_MISC_1_MMC 0x0200 +#define U300_SYSCON_PMC2R_APP_MISC_1_CDI2 0x0300 +#define U300_SYSCON_PMC2R_APP_MISC_2_MASK 0x0C00 +#define U300_SYSCON_PMC2R_APP_MISC_2_APP_GPIO 0x0000 +#define U300_SYSCON_PMC2R_APP_MISC_2_EMIF_SDRAM 0x0400 +#define U300_SYSCON_PMC2R_APP_MISC_2_MMC 0x0800 +#define U300_SYSCON_PMC2R_APP_MISC_2_CDI2 0x0C00 +#define U300_SYSCON_PMC2R_APP_MISC_3_MASK 0x3000 +#define U300_SYSCON_PMC2R_APP_MISC_3_APP_GPIO 0x0000 +#define U300_SYSCON_PMC2R_APP_MISC_3_EMIF_SDRAM 0x1000 +#define U300_SYSCON_PMC2R_APP_MISC_3_MMC 0x2000 +#define U300_SYSCON_PMC2R_APP_MISC_3_CDI2 0x3000 +#define U300_SYSCON_PMC2R_APP_MISC_4_MASK 0xC000 +#define U300_SYSCON_PMC2R_APP_MISC_4_APP_GPIO 0x0000 +#define U300_SYSCON_PMC2R_APP_MISC_4_EMIF_SDRAM 0x4000 +#define U300_SYSCON_PMC2R_APP_MISC_4_MMC 0x8000 +#define U300_SYSCON_PMC2R_APP_MISC_4_ACC_GPIO 0xC000 +/* TODO: More SYSCON registers missing */ +#define U300_SYSCON_PMC3R 0x10C +#define U300_SYSCON_PMC3R_APP_MISC_11_MASK 0xC000 +#define U300_SYSCON_PMC3R_APP_MISC_11_SPI 0x4000 +#define U300_SYSCON_PMC3R_APP_MISC_10_MASK 0x3000 +#define U300_SYSCON_PMC3R_APP_MISC_10_SPI 0x1000 +/* TODO: Missing other configs */ +#define U300_SYSCON_PMC4R 0x168 +#define U300_SYSCON_PMC4R_APP_MISC_12_MASK 0x0003 +#define U300_SYSCON_PMC4R_APP_MISC_12_APP_GPIO 0x0000 +#define U300_SYSCON_PMC4R_APP_MISC_13_MASK 0x000C +#define U300_SYSCON_PMC4R_APP_MISC_13_CDI 0x0000 +#define U300_SYSCON_PMC4R_APP_MISC_13_SMIA 0x0004 +#define U300_SYSCON_PMC4R_APP_MISC_13_SMIA2 0x0008 +#define U300_SYSCON_PMC4R_APP_MISC_13_APP_GPIO 0x000C +#define U300_SYSCON_PMC4R_APP_MISC_14_MASK 0x0030 +#define U300_SYSCON_PMC4R_APP_MISC_14_CDI 0x0000 +#define U300_SYSCON_PMC4R_APP_MISC_14_SMIA 0x0010 +#define U300_SYSCON_PMC4R_APP_MISC_14_CDI2 0x0020 +#define U300_SYSCON_PMC4R_APP_MISC_14_APP_GPIO 0x0030 +#define U300_SYSCON_PMC4R_APP_MISC_16_MASK 0x0300 +#define U300_SYSCON_PMC4R_APP_MISC_16_APP_GPIO_13 0x0000 +#define U300_SYSCON_PMC4R_APP_MISC_16_APP_UART1_CTS 0x0100 +#define U300_SYSCON_PMC4R_APP_MISC_16_EMIF_1_STATIC_CS5_N 0x0200 + +#define DRIVER_NAME "pinmux-u300" + +/* + * The DB3350 has 467 pads, I have enumerated the pads clockwise around the + * edges of the silicon, finger by finger. LTCORNER upper left is pad 0. + * Data taken from the PadRing chart, arranged like this: + * + * 0 ..... 104 + * 466 105 + * . . + * . . + * 358 224 + * 357 .... 225 + */ +#define U300_NUM_PADS 467 + +/* Pad names for the pinmux subsystem */ +static const struct pinctrl_pin_desc __refdata u300_pads[] = { + /* Pads along the top edge of the chip */ + PINCTRL_PIN(0, "P PAD VDD 28"), + PINCTRL_PIN(1, "P PAD GND 28"), + PINCTRL_PIN(2, "PO SIM RST N"), + PINCTRL_PIN(3, "VSSIO 25"), + PINCTRL_PIN(4, "VSSA ADDA ESDSUB"), + PINCTRL_PIN(5, "PWR VSSCOMMON"), + PINCTRL_PIN(6, "PI ADC I1 POS"), + PINCTRL_PIN(7, "PI ADC I1 NEG"), + PINCTRL_PIN(8, "PWR VSSAD0"), + PINCTRL_PIN(9, "PWR VCCAD0"), + PINCTRL_PIN(10, "PI ADC Q1 NEG"), + PINCTRL_PIN(11, "PI ADC Q1 POS"), + PINCTRL_PIN(12, "PWR VDDAD"), + PINCTRL_PIN(13, "PWR GNDAD"), + PINCTRL_PIN(14, "PI ADC I2 POS"), + PINCTRL_PIN(15, "PI ADC I2 NEG"), + PINCTRL_PIN(16, "PWR VSSAD1"), + PINCTRL_PIN(17, "PWR VCCAD1"), + PINCTRL_PIN(18, "PI ADC Q2 NEG"), + PINCTRL_PIN(19, "PI ADC Q2 POS"), + PINCTRL_PIN(20, "VSSA ADDA ESDSUB"), + PINCTRL_PIN(21, "PWR VCCGPAD"), + PINCTRL_PIN(22, "PI TX POW"), + PINCTRL_PIN(23, "PWR VSSGPAD"), + PINCTRL_PIN(24, "PO DAC I POS"), + PINCTRL_PIN(25, "PO DAC I NEG"), + PINCTRL_PIN(26, "PO DAC Q POS"), + PINCTRL_PIN(27, "PO DAC Q NEG"), + PINCTRL_PIN(28, "PWR VSSDA"), + PINCTRL_PIN(29, "PWR VCCDA"), + PINCTRL_PIN(30, "VSSA ADDA ESDSUB"), + PINCTRL_PIN(31, "P PAD VDDIO 11"), + PINCTRL_PIN(32, "PI PLL 26 FILTVDD"), + PINCTRL_PIN(33, "PI PLL 26 VCONT"), + PINCTRL_PIN(34, "PWR AGNDPLL2V5 32 13"), + PINCTRL_PIN(35, "PWR AVDDPLL2V5 32 13"), + PINCTRL_PIN(36, "VDDA PLL ESD"), + PINCTRL_PIN(37, "VSSA PLL ESD"), + PINCTRL_PIN(38, "VSS PLL"), + PINCTRL_PIN(39, "VDDC PLL"), + PINCTRL_PIN(40, "PWR AGNDPLL2V5 26 60"), + PINCTRL_PIN(41, "PWR AVDDPLL2V5 26 60"), + PINCTRL_PIN(42, "PWR AVDDPLL2V5 26 208"), + PINCTRL_PIN(43, "PWR AGNDPLL2V5 26 208"), + PINCTRL_PIN(44, "PWR AVDDPLL2V5 13 208"), + PINCTRL_PIN(45, "PWR AGNDPLL2V5 13 208"), + PINCTRL_PIN(46, "P PAD VSSIO 11"), + PINCTRL_PIN(47, "P PAD VSSIO 12"), + PINCTRL_PIN(48, "PI POW RST N"), + PINCTRL_PIN(49, "VDDC IO"), + PINCTRL_PIN(50, "P PAD VDDIO 16"), + PINCTRL_PIN(51, "PO RF WCDMA EN 4"), + PINCTRL_PIN(52, "PO RF WCDMA EN 3"), + PINCTRL_PIN(53, "PO RF WCDMA EN 2"), + PINCTRL_PIN(54, "PO RF WCDMA EN 1"), + PINCTRL_PIN(55, "PO RF WCDMA EN 0"), + PINCTRL_PIN(56, "PO GSM PA ENABLE"), + PINCTRL_PIN(57, "PO RF DATA STRB"), + PINCTRL_PIN(58, "PO RF DATA2"), + PINCTRL_PIN(59, "PIO RF DATA1"), + PINCTRL_PIN(60, "PIO RF DATA0"), + PINCTRL_PIN(61, "P PAD VDD 11"), + PINCTRL_PIN(62, "P PAD GND 11"), + PINCTRL_PIN(63, "P PAD VSSIO 16"), + PINCTRL_PIN(64, "P PAD VDDIO 18"), + PINCTRL_PIN(65, "PO RF CTRL STRB2"), + PINCTRL_PIN(66, "PO RF CTRL STRB1"), + PINCTRL_PIN(67, "PO RF CTRL STRB0"), + PINCTRL_PIN(68, "PIO RF CTRL DATA"), + PINCTRL_PIN(69, "PO RF CTRL CLK"), + PINCTRL_PIN(70, "PO TX ADC STRB"), + PINCTRL_PIN(71, "PO ANT SW 2"), + PINCTRL_PIN(72, "PO ANT SW 3"), + PINCTRL_PIN(73, "PO ANT SW 0"), + PINCTRL_PIN(74, "PO ANT SW 1"), + PINCTRL_PIN(75, "PO M CLKRQ"), + PINCTRL_PIN(76, "PI M CLK"), + PINCTRL_PIN(77, "PI RTC CLK"), + PINCTRL_PIN(78, "P PAD VDD 8"), + PINCTRL_PIN(79, "P PAD GND 8"), + PINCTRL_PIN(80, "P PAD VSSIO 13"), + PINCTRL_PIN(81, "P PAD VDDIO 13"), + PINCTRL_PIN(82, "PO SYS 1 CLK"), + PINCTRL_PIN(83, "PO SYS 2 CLK"), + PINCTRL_PIN(84, "PO SYS 0 CLK"), + PINCTRL_PIN(85, "PI SYS 0 CLKRQ"), + PINCTRL_PIN(86, "PO PWR MNGT CTRL 1"), + PINCTRL_PIN(87, "PO PWR MNGT CTRL 0"), + PINCTRL_PIN(88, "PO RESOUT2 RST N"), + PINCTRL_PIN(89, "PO RESOUT1 RST N"), + PINCTRL_PIN(90, "PO RESOUT0 RST N"), + PINCTRL_PIN(91, "PI SERVICE N"), + PINCTRL_PIN(92, "P PAD VDD 29"), + PINCTRL_PIN(93, "P PAD GND 29"), + PINCTRL_PIN(94, "P PAD VSSIO 8"), + PINCTRL_PIN(95, "P PAD VDDIO 8"), + PINCTRL_PIN(96, "PI EXT IRQ1 N"), + PINCTRL_PIN(97, "PI EXT IRQ0 N"), + PINCTRL_PIN(98, "PIO DC ON"), + PINCTRL_PIN(99, "PIO ACC APP I2C DATA"), + PINCTRL_PIN(100, "PIO ACC APP I2C CLK"), + PINCTRL_PIN(101, "P PAD VDD 12"), + PINCTRL_PIN(102, "P PAD GND 12"), + PINCTRL_PIN(103, "P PAD VSSIO 14"), + PINCTRL_PIN(104, "P PAD VDDIO 14"), + /* Pads along the right edge of the chip */ + PINCTRL_PIN(105, "PIO APP I2C1 DATA"), + PINCTRL_PIN(106, "PIO APP I2C1 CLK"), + PINCTRL_PIN(107, "PO KEY OUT0"), + PINCTRL_PIN(108, "PO KEY OUT1"), + PINCTRL_PIN(109, "PO KEY OUT2"), + PINCTRL_PIN(110, "PO KEY OUT3"), + PINCTRL_PIN(111, "PO KEY OUT4"), + PINCTRL_PIN(112, "PI KEY IN0"), + PINCTRL_PIN(113, "PI KEY IN1"), + PINCTRL_PIN(114, "PI KEY IN2"), + PINCTRL_PIN(115, "P PAD VDDIO 15"), + PINCTRL_PIN(116, "P PAD VSSIO 15"), + PINCTRL_PIN(117, "P PAD GND 13"), + PINCTRL_PIN(118, "P PAD VDD 13"), + PINCTRL_PIN(119, "PI KEY IN3"), + PINCTRL_PIN(120, "PI KEY IN4"), + PINCTRL_PIN(121, "PI KEY IN5"), + PINCTRL_PIN(122, "PIO APP PCM I2S1 DATA B"), + PINCTRL_PIN(123, "PIO APP PCM I2S1 DATA A"), + PINCTRL_PIN(124, "PIO APP PCM I2S1 WS"), + PINCTRL_PIN(125, "PIO APP PCM I2S1 CLK"), + PINCTRL_PIN(126, "PIO APP PCM I2S0 DATA B"), + PINCTRL_PIN(127, "PIO APP PCM I2S0 DATA A"), + PINCTRL_PIN(128, "PIO APP PCM I2S0 WS"), + PINCTRL_PIN(129, "PIO APP PCM I2S0 CLK"), + PINCTRL_PIN(130, "P PAD VDD 17"), + PINCTRL_PIN(131, "P PAD GND 17"), + PINCTRL_PIN(132, "P PAD VSSIO 19"), + PINCTRL_PIN(133, "P PAD VDDIO 19"), + PINCTRL_PIN(134, "UART0 RTS"), + PINCTRL_PIN(135, "UART0 CTS"), + PINCTRL_PIN(136, "UART0 TX"), + PINCTRL_PIN(137, "UART0 RX"), + PINCTRL_PIN(138, "PIO ACC SPI DO"), + PINCTRL_PIN(139, "PIO ACC SPI DI"), + PINCTRL_PIN(140, "PIO ACC SPI CS0 N"), + PINCTRL_PIN(141, "PIO ACC SPI CS1 N"), + PINCTRL_PIN(142, "PIO ACC SPI CS2 N"), + PINCTRL_PIN(143, "PIO ACC SPI CLK"), + PINCTRL_PIN(144, "PO PDI EXT RST N"), + PINCTRL_PIN(145, "P PAD VDDIO 22"), + PINCTRL_PIN(146, "P PAD VSSIO 22"), + PINCTRL_PIN(147, "P PAD GND 18"), + PINCTRL_PIN(148, "P PAD VDD 18"), + PINCTRL_PIN(149, "PIO PDI C0"), + PINCTRL_PIN(150, "PIO PDI C1"), + PINCTRL_PIN(151, "PIO PDI C2"), + PINCTRL_PIN(152, "PIO PDI C3"), + PINCTRL_PIN(153, "PIO PDI C4"), + PINCTRL_PIN(154, "PIO PDI C5"), + PINCTRL_PIN(155, "PIO PDI D0"), + PINCTRL_PIN(156, "PIO PDI D1"), + PINCTRL_PIN(157, "PIO PDI D2"), + PINCTRL_PIN(158, "PIO PDI D3"), + PINCTRL_PIN(159, "P PAD VDDIO 21"), + PINCTRL_PIN(160, "P PAD VSSIO 21"), + PINCTRL_PIN(161, "PIO PDI D4"), + PINCTRL_PIN(162, "PIO PDI D5"), + PINCTRL_PIN(163, "PIO PDI D6"), + PINCTRL_PIN(164, "PIO PDI D7"), + PINCTRL_PIN(165, "PIO MS INS"), + PINCTRL_PIN(166, "MMC DATA DIR LS"), + PINCTRL_PIN(167, "MMC DATA 3"), + PINCTRL_PIN(168, "MMC DATA 2"), + PINCTRL_PIN(169, "MMC DATA 1"), + PINCTRL_PIN(170, "MMC DATA 0"), + PINCTRL_PIN(171, "MMC CMD DIR LS"), + PINCTRL_PIN(172, "P PAD VDD 27"), + PINCTRL_PIN(173, "P PAD GND 27"), + PINCTRL_PIN(174, "P PAD VSSIO 20"), + PINCTRL_PIN(175, "P PAD VDDIO 20"), + PINCTRL_PIN(176, "MMC CMD"), + PINCTRL_PIN(177, "MMC CLK"), + PINCTRL_PIN(178, "PIO APP GPIO 14"), + PINCTRL_PIN(179, "PIO APP GPIO 13"), + PINCTRL_PIN(180, "PIO APP GPIO 11"), + PINCTRL_PIN(181, "PIO APP GPIO 25"), + PINCTRL_PIN(182, "PIO APP GPIO 24"), + PINCTRL_PIN(183, "PIO APP GPIO 23"), + PINCTRL_PIN(184, "PIO APP GPIO 22"), + PINCTRL_PIN(185, "PIO APP GPIO 21"), + PINCTRL_PIN(186, "PIO APP GPIO 20"), + PINCTRL_PIN(187, "P PAD VDD 19"), + PINCTRL_PIN(188, "P PAD GND 19"), + PINCTRL_PIN(189, "P PAD VSSIO 23"), + PINCTRL_PIN(190, "P PAD VDDIO 23"), + PINCTRL_PIN(191, "PIO APP GPIO 19"), + PINCTRL_PIN(192, "PIO APP GPIO 18"), + PINCTRL_PIN(193, "PIO APP GPIO 17"), + PINCTRL_PIN(194, "PIO APP GPIO 16"), + PINCTRL_PIN(195, "PI CI D1"), + PINCTRL_PIN(196, "PI CI D0"), + PINCTRL_PIN(197, "PI CI HSYNC"), + PINCTRL_PIN(198, "PI CI VSYNC"), + PINCTRL_PIN(199, "PI CI EXT CLK"), + PINCTRL_PIN(200, "PO CI EXT RST N"), + PINCTRL_PIN(201, "P PAD VSSIO 43"), + PINCTRL_PIN(202, "P PAD VDDIO 43"), + PINCTRL_PIN(203, "PI CI D6"), + PINCTRL_PIN(204, "PI CI D7"), + PINCTRL_PIN(205, "PI CI D2"), + PINCTRL_PIN(206, "PI CI D3"), + PINCTRL_PIN(207, "PI CI D4"), + PINCTRL_PIN(208, "PI CI D5"), + PINCTRL_PIN(209, "PI CI D8"), + PINCTRL_PIN(210, "PI CI D9"), + PINCTRL_PIN(211, "P PAD VDD 20"), + PINCTRL_PIN(212, "P PAD GND 20"), + PINCTRL_PIN(213, "P PAD VSSIO 24"), + PINCTRL_PIN(214, "P PAD VDDIO 24"), + PINCTRL_PIN(215, "P PAD VDDIO 26"), + PINCTRL_PIN(216, "PO EMIF 1 A26"), + PINCTRL_PIN(217, "PO EMIF 1 A25"), + PINCTRL_PIN(218, "P PAD VSSIO 26"), + PINCTRL_PIN(219, "PO EMIF 1 A24"), + PINCTRL_PIN(220, "PO EMIF 1 A23"), + /* Pads along the bottom edge of the chip */ + PINCTRL_PIN(221, "PO EMIF 1 A22"), + PINCTRL_PIN(222, "PO EMIF 1 A21"), + PINCTRL_PIN(223, "P PAD VDD 21"), + PINCTRL_PIN(224, "P PAD GND 21"), + PINCTRL_PIN(225, "P PAD VSSIO 27"), + PINCTRL_PIN(226, "P PAD VDDIO 27"), + PINCTRL_PIN(227, "PO EMIF 1 A20"), + PINCTRL_PIN(228, "PO EMIF 1 A19"), + PINCTRL_PIN(229, "PO EMIF 1 A18"), + PINCTRL_PIN(230, "PO EMIF 1 A17"), + PINCTRL_PIN(231, "P PAD VDDIO 28"), + PINCTRL_PIN(232, "P PAD VSSIO 28"), + PINCTRL_PIN(233, "PO EMIF 1 A16"), + PINCTRL_PIN(234, "PIO EMIF 1 D15"), + PINCTRL_PIN(235, "PO EMIF 1 A15"), + PINCTRL_PIN(236, "PIO EMIF 1 D14"), + PINCTRL_PIN(237, "P PAD VDD 22"), + PINCTRL_PIN(238, "P PAD GND 22"), + PINCTRL_PIN(239, "P PAD VSSIO 29"), + PINCTRL_PIN(240, "P PAD VDDIO 29"), + PINCTRL_PIN(241, "PO EMIF 1 A14"), + PINCTRL_PIN(242, "PIO EMIF 1 D13"), + PINCTRL_PIN(243, "PO EMIF 1 A13"), + PINCTRL_PIN(244, "PIO EMIF 1 D12"), + PINCTRL_PIN(245, "P PAD VSSIO 30"), + PINCTRL_PIN(246, "P PAD VDDIO 30"), + PINCTRL_PIN(247, "PO EMIF 1 A12"), + PINCTRL_PIN(248, "PIO EMIF 1 D11"), + PINCTRL_PIN(249, "PO EMIF 1 A11"), + PINCTRL_PIN(250, "PIO EMIF 1 D10"), + PINCTRL_PIN(251, "P PAD VSSIO 31"), + PINCTRL_PIN(252, "P PAD VDDIO 31"), + PINCTRL_PIN(253, "PO EMIF 1 A10"), + PINCTRL_PIN(254, "PIO EMIF 1 D09"), + PINCTRL_PIN(255, "PO EMIF 1 A09"), + PINCTRL_PIN(256, "P PAD VDDIO 32"), + PINCTRL_PIN(257, "P PAD VSSIO 32"), + PINCTRL_PIN(258, "P PAD GND 24"), + PINCTRL_PIN(259, "P PAD VDD 24"), + PINCTRL_PIN(260, "PIO EMIF 1 D08"), + PINCTRL_PIN(261, "PO EMIF 1 A08"), + PINCTRL_PIN(262, "PIO EMIF 1 D07"), + PINCTRL_PIN(263, "PO EMIF 1 A07"), + PINCTRL_PIN(264, "P PAD VDDIO 33"), + PINCTRL_PIN(265, "P PAD VSSIO 33"), + PINCTRL_PIN(266, "PIO EMIF 1 D06"), + PINCTRL_PIN(267, "PO EMIF 1 A06"), + PINCTRL_PIN(268, "PIO EMIF 1 D05"), + PINCTRL_PIN(269, "PO EMIF 1 A05"), + PINCTRL_PIN(270, "P PAD VDDIO 34"), + PINCTRL_PIN(271, "P PAD VSSIO 34"), + PINCTRL_PIN(272, "PIO EMIF 1 D04"), + PINCTRL_PIN(273, "PO EMIF 1 A04"), + PINCTRL_PIN(274, "PIO EMIF 1 D03"), + PINCTRL_PIN(275, "PO EMIF 1 A03"), + PINCTRL_PIN(276, "P PAD VDDIO 35"), + PINCTRL_PIN(277, "P PAD VSSIO 35"), + PINCTRL_PIN(278, "P PAD GND 23"), + PINCTRL_PIN(279, "P PAD VDD 23"), + PINCTRL_PIN(280, "PIO EMIF 1 D02"), + PINCTRL_PIN(281, "PO EMIF 1 A02"), + PINCTRL_PIN(282, "PIO EMIF 1 D01"), + PINCTRL_PIN(283, "PO EMIF 1 A01"), + PINCTRL_PIN(284, "P PAD VDDIO 36"), + PINCTRL_PIN(285, "P PAD VSSIO 36"), + PINCTRL_PIN(286, "PIO EMIF 1 D00"), + PINCTRL_PIN(287, "PO EMIF 1 BE1 N"), + PINCTRL_PIN(288, "PO EMIF 1 BE0 N"), + PINCTRL_PIN(289, "PO EMIF 1 ADV N"), + PINCTRL_PIN(290, "P PAD VDDIO 37"), + PINCTRL_PIN(291, "P PAD VSSIO 37"), + PINCTRL_PIN(292, "PO EMIF 1 SD CKE0"), + PINCTRL_PIN(293, "PO EMIF 1 OE N"), + PINCTRL_PIN(294, "PO EMIF 1 WE N"), + PINCTRL_PIN(295, "P PAD VDDIO 38"), + PINCTRL_PIN(296, "P PAD VSSIO 38"), + PINCTRL_PIN(297, "PO EMIF 1 CLK"), + PINCTRL_PIN(298, "PIO EMIF 1 SD CLK"), + PINCTRL_PIN(299, "P PAD VSSIO 45 (not bonded)"), + PINCTRL_PIN(300, "P PAD VDDIO 42"), + PINCTRL_PIN(301, "P PAD VSSIO 42"), + PINCTRL_PIN(302, "P PAD GND 31"), + PINCTRL_PIN(303, "P PAD VDD 31"), + PINCTRL_PIN(304, "PI EMIF 1 RET CLK"), + PINCTRL_PIN(305, "PI EMIF 1 WAIT N"), + PINCTRL_PIN(306, "PI EMIF 1 NFIF READY"), + PINCTRL_PIN(307, "PO EMIF 1 SD CKE1"), + PINCTRL_PIN(308, "PO EMIF 1 CS3 N"), + PINCTRL_PIN(309, "P PAD VDD 25"), + PINCTRL_PIN(310, "P PAD GND 25"), + PINCTRL_PIN(311, "P PAD VSSIO 39"), + PINCTRL_PIN(312, "P PAD VDDIO 39"), + PINCTRL_PIN(313, "PO EMIF 1 CS2 N"), + PINCTRL_PIN(314, "PO EMIF 1 CS1 N"), + PINCTRL_PIN(315, "PO EMIF 1 CS0 N"), + PINCTRL_PIN(316, "PO ETM TRACE PKT0"), + PINCTRL_PIN(317, "PO ETM TRACE PKT1"), + PINCTRL_PIN(318, "PO ETM TRACE PKT2"), + PINCTRL_PIN(319, "P PAD VDD 30"), + PINCTRL_PIN(320, "P PAD GND 30"), + PINCTRL_PIN(321, "P PAD VSSIO 44"), + PINCTRL_PIN(322, "P PAD VDDIO 44"), + PINCTRL_PIN(323, "PO ETM TRACE PKT3"), + PINCTRL_PIN(324, "PO ETM TRACE PKT4"), + PINCTRL_PIN(325, "PO ETM TRACE PKT5"), + PINCTRL_PIN(326, "PO ETM TRACE PKT6"), + PINCTRL_PIN(327, "PO ETM TRACE PKT7"), + PINCTRL_PIN(328, "PO ETM PIPE STAT0"), + PINCTRL_PIN(329, "P PAD VDD 26"), + PINCTRL_PIN(330, "P PAD GND 26"), + PINCTRL_PIN(331, "P PAD VSSIO 40"), + PINCTRL_PIN(332, "P PAD VDDIO 40"), + PINCTRL_PIN(333, "PO ETM PIPE STAT1"), + PINCTRL_PIN(334, "PO ETM PIPE STAT2"), + PINCTRL_PIN(335, "PO ETM TRACE CLK"), + PINCTRL_PIN(336, "PO ETM TRACE SYNC"), + PINCTRL_PIN(337, "PIO ACC GPIO 33"), + PINCTRL_PIN(338, "PIO ACC GPIO 32"), + PINCTRL_PIN(339, "PIO ACC GPIO 30"), + PINCTRL_PIN(340, "PIO ACC GPIO 29"), + PINCTRL_PIN(341, "P PAD VDDIO 17"), + PINCTRL_PIN(342, "P PAD VSSIO 17"), + PINCTRL_PIN(343, "P PAD GND 15"), + PINCTRL_PIN(344, "P PAD VDD 15"), + PINCTRL_PIN(345, "PIO ACC GPIO 28"), + PINCTRL_PIN(346, "PIO ACC GPIO 27"), + PINCTRL_PIN(347, "PIO ACC GPIO 16"), + PINCTRL_PIN(348, "PI TAP TMS"), + PINCTRL_PIN(349, "PI TAP TDI"), + PINCTRL_PIN(350, "PO TAP TDO"), + PINCTRL_PIN(351, "PI TAP RST N"), + /* Pads along the left edge of the chip */ + PINCTRL_PIN(352, "PI EMU MODE 0"), + PINCTRL_PIN(353, "PO TAP RET CLK"), + PINCTRL_PIN(354, "PI TAP CLK"), + PINCTRL_PIN(355, "PO EMIF 0 SD CS N"), + PINCTRL_PIN(356, "PO EMIF 0 SD CAS N"), + PINCTRL_PIN(357, "PO EMIF 0 SD WE N"), + PINCTRL_PIN(358, "P PAD VDDIO 1"), + PINCTRL_PIN(359, "P PAD VSSIO 1"), + PINCTRL_PIN(360, "P PAD GND 1"), + PINCTRL_PIN(361, "P PAD VDD 1"), + PINCTRL_PIN(362, "PO EMIF 0 SD CKE"), + PINCTRL_PIN(363, "PO EMIF 0 SD DQML"), + PINCTRL_PIN(364, "PO EMIF 0 SD DQMU"), + PINCTRL_PIN(365, "PO EMIF 0 SD RAS N"), + PINCTRL_PIN(366, "PIO EMIF 0 D15"), + PINCTRL_PIN(367, "PO EMIF 0 A15"), + PINCTRL_PIN(368, "PIO EMIF 0 D14"), + PINCTRL_PIN(369, "PO EMIF 0 A14"), + PINCTRL_PIN(370, "PIO EMIF 0 D13"), + PINCTRL_PIN(371, "PO EMIF 0 A13"), + PINCTRL_PIN(372, "P PAD VDDIO 2"), + PINCTRL_PIN(373, "P PAD VSSIO 2"), + PINCTRL_PIN(374, "P PAD GND 2"), + PINCTRL_PIN(375, "P PAD VDD 2"), + PINCTRL_PIN(376, "PIO EMIF 0 D12"), + PINCTRL_PIN(377, "PO EMIF 0 A12"), + PINCTRL_PIN(378, "PIO EMIF 0 D11"), + PINCTRL_PIN(379, "PO EMIF 0 A11"), + PINCTRL_PIN(380, "PIO EMIF 0 D10"), + PINCTRL_PIN(381, "PO EMIF 0 A10"), + PINCTRL_PIN(382, "PIO EMIF 0 D09"), + PINCTRL_PIN(383, "PO EMIF 0 A09"), + PINCTRL_PIN(384, "PIO EMIF 0 D08"), + PINCTRL_PIN(385, "PO EMIF 0 A08"), + PINCTRL_PIN(386, "PIO EMIF 0 D07"), + PINCTRL_PIN(387, "PO EMIF 0 A07"), + PINCTRL_PIN(388, "P PAD VDDIO 3"), + PINCTRL_PIN(389, "P PAD VSSIO 3"), + PINCTRL_PIN(390, "P PAD GND 3"), + PINCTRL_PIN(391, "P PAD VDD 3"), + PINCTRL_PIN(392, "PO EFUSE RDOUT1"), + PINCTRL_PIN(393, "PIO EMIF 0 D06"), + PINCTRL_PIN(394, "PO EMIF 0 A06"), + PINCTRL_PIN(395, "PIO EMIF 0 D05"), + PINCTRL_PIN(396, "PO EMIF 0 A05"), + PINCTRL_PIN(397, "PIO EMIF 0 D04"), + PINCTRL_PIN(398, "PO EMIF 0 A04"), + PINCTRL_PIN(399, "A PADS/A VDDCO1v82v5 GND 80U SF LIN VDDCO AF"), + PINCTRL_PIN(400, "PWR VDDCO AF"), + PINCTRL_PIN(401, "PWR EFUSE HV1"), + PINCTRL_PIN(402, "P PAD VSSIO 4"), + PINCTRL_PIN(403, "P PAD VDDIO 4"), + PINCTRL_PIN(404, "P PAD GND 4"), + PINCTRL_PIN(405, "P PAD VDD 4"), + PINCTRL_PIN(406, "PIO EMIF 0 D03"), + PINCTRL_PIN(407, "PO EMIF 0 A03"), + PINCTRL_PIN(408, "PWR EFUSE HV2"), + PINCTRL_PIN(409, "PWR EFUSE HV3"), + PINCTRL_PIN(410, "PIO EMIF 0 D02"), + PINCTRL_PIN(411, "PO EMIF 0 A02"), + PINCTRL_PIN(412, "PIO EMIF 0 D01"), + PINCTRL_PIN(413, "P PAD VDDIO 5"), + PINCTRL_PIN(414, "P PAD VSSIO 5"), + PINCTRL_PIN(415, "P PAD GND 5"), + PINCTRL_PIN(416, "P PAD VDD 5"), + PINCTRL_PIN(417, "PO EMIF 0 A01"), + PINCTRL_PIN(418, "PIO EMIF 0 D00"), + PINCTRL_PIN(419, "IF 0 SD CLK"), + PINCTRL_PIN(420, "APP SPI CLK"), + PINCTRL_PIN(421, "APP SPI DO"), + PINCTRL_PIN(422, "APP SPI DI"), + PINCTRL_PIN(423, "APP SPI CS0"), + PINCTRL_PIN(424, "APP SPI CS1"), + PINCTRL_PIN(425, "APP SPI CS2"), + PINCTRL_PIN(426, "PIO APP GPIO 10"), + PINCTRL_PIN(427, "P PAD VDDIO 41"), + PINCTRL_PIN(428, "P PAD VSSIO 41"), + PINCTRL_PIN(429, "P PAD GND 6"), + PINCTRL_PIN(430, "P PAD VDD 6"), + PINCTRL_PIN(431, "PIO ACC SDIO0 CMD"), + PINCTRL_PIN(432, "PIO ACC SDIO0 CK"), + PINCTRL_PIN(433, "PIO ACC SDIO0 D3"), + PINCTRL_PIN(434, "PIO ACC SDIO0 D2"), + PINCTRL_PIN(435, "PIO ACC SDIO0 D1"), + PINCTRL_PIN(436, "PIO ACC SDIO0 D0"), + PINCTRL_PIN(437, "PIO USB PU"), + PINCTRL_PIN(438, "PIO USB SP"), + PINCTRL_PIN(439, "PIO USB DAT VP"), + PINCTRL_PIN(440, "PIO USB SE0 VM"), + PINCTRL_PIN(441, "PIO USB OE"), + PINCTRL_PIN(442, "PIO USB SUSP"), + PINCTRL_PIN(443, "P PAD VSSIO 6"), + PINCTRL_PIN(444, "P PAD VDDIO 6"), + PINCTRL_PIN(445, "PIO USB PUEN"), + PINCTRL_PIN(446, "PIO ACC UART0 RX"), + PINCTRL_PIN(447, "PIO ACC UART0 TX"), + PINCTRL_PIN(448, "PIO ACC UART0 CTS"), + PINCTRL_PIN(449, "PIO ACC UART0 RTS"), + PINCTRL_PIN(450, "PIO ACC UART3 RX"), + PINCTRL_PIN(451, "PIO ACC UART3 TX"), + PINCTRL_PIN(452, "PIO ACC UART3 CTS"), + PINCTRL_PIN(453, "PIO ACC UART3 RTS"), + PINCTRL_PIN(454, "PIO ACC IRDA TX"), + PINCTRL_PIN(455, "P PAD VDDIO 7"), + PINCTRL_PIN(456, "P PAD VSSIO 7"), + PINCTRL_PIN(457, "P PAD GND 7"), + PINCTRL_PIN(458, "P PAD VDD 7"), + PINCTRL_PIN(459, "PIO ACC IRDA RX"), + PINCTRL_PIN(460, "PIO ACC PCM I2S CLK"), + PINCTRL_PIN(461, "PIO ACC PCM I2S WS"), + PINCTRL_PIN(462, "PIO ACC PCM I2S DATA A"), + PINCTRL_PIN(463, "PIO ACC PCM I2S DATA B"), + PINCTRL_PIN(464, "PO SIM CLK"), + PINCTRL_PIN(465, "PIO ACC IRDA SD"), + PINCTRL_PIN(466, "PIO SIM DATA"), +}; + +/** + * @dev: a pointer back to containing device + * @virtbase: the offset to the controller in virtual memory + */ +struct u300_pmx { + struct device *dev; + struct pinctrl_dev *pctl; + u32 phybase; + u32 physize; + void __iomem *virtbase; +}; + +/** + * u300_pmx_registers - the array of registers read/written for each pinmux + * shunt setting + */ +const u32 u300_pmx_registers[] = { + U300_SYSCON_PMC1LR, + U300_SYSCON_PMC1HR, + U300_SYSCON_PMC2R, + U300_SYSCON_PMC3R, + U300_SYSCON_PMC4R, +}; + +/** + * struct u300_pin_group - describes a U300 pin group + * @name: the name of this specific pin group + * @pins: an array of discrete physical pins used in this group, taken + * from the driver-local pin enumeration space + * @num_pins: the number of pins in this group array, i.e. the number of + * elements in .pins so we can iterate over that array + */ +struct u300_pin_group { + const char *name; + const unsigned int *pins; + const unsigned num_pins; +}; + +/** + * struct pmx_onmask - mask bits to enable/disable padmux + * @mask: mask bits to disable + * @val: mask bits to enable + * + * onmask lazy dog: + * onmask = { + * {"PMC1LR" mask, "PMC1LR" value}, + * {"PMC1HR" mask, "PMC1HR" value}, + * {"PMC2R" mask, "PMC2R" value}, + * {"PMC3R" mask, "PMC3R" value}, + * {"PMC4R" mask, "PMC4R" value} + * } + */ +struct u300_pmx_mask { + u16 mask; + u16 bits; +}; + +/* The chip power pins are VDD, GND, VDDIO and VSSIO */ +static const unsigned power_pins[] = { 0, 1, 3, 31, 46, 47, 49, 50, 61, 62, 63, + 64, 78, 79, 80, 81, 92, 93, 94, 95, 101, 102, 103, 104, 115, 116, 117, + 118, 130, 131, 132, 133, 145, 146, 147, 148, 159, 160, 172, 173, 174, + 175, 187, 188, 189, 190, 201, 202, 211, 212, 213, 214, 215, 218, 223, + 224, 225, 226, 231, 232, 237, 238, 239, 240, 245, 246, 251, 252, 256, + 257, 258, 259, 264, 265, 270, 271, 276, 277, 278, 279, 284, 285, 290, + 291, 295, 296, 299, 300, 301, 302, 303, 309, 310, 311, 312, 319, 320, + 321, 322, 329, 330, 331, 332, 341, 342, 343, 344, 358, 359, 360, 361, + 372, 373, 374, 375, 388, 389, 390, 391, 402, 403, 404, 405, 413, 414, + 415, 416, 427, 428, 429, 430, 443, 444, 455, 456, 457, 458 }; +static const unsigned emif0_pins[] = { 355, 356, 357, 362, 363, 364, 365, 366, + 367, 368, 369, 370, 371, 376, 377, 378, 379, 380, 381, 382, 383, 384, + 385, 386, 387, 393, 394, 395, 396, 397, 398, 406, 407, 410, 411, 412, + 417, 418 }; +static const unsigned emif1_pins[] = { 216, 217, 219, 220, 221, 222, 227, 228, + 229, 230, 233, 234, 235, 236, 241, 242, 243, 244, 247, 248, 249, 250, + 253, 254, 255, 260, 261, 262, 263, 266, 267, 268, 269, 272, 273, 274, + 275, 280, 281, 282, 283, 286, 287, 288, 289, 292, 293, 294, 297, 298, + 304, 305, 306, 307, 308, 313, 314, 315 }; +static const unsigned uart0_pins[] = { 134, 135, 136, 137 }; +static const unsigned mmc0_pins[] = { 166, 167, 168, 169, 170, 171, 176, 177 }; +static const unsigned spi0_pins[] = { 420, 421, 422, 423, 424, 425 }; + +static const struct u300_pmx_mask emif0_mask[] = { + {0, 0}, + {0, 0}, + {0, 0}, + {0, 0}, + {0, 0}, +}; + +static const struct u300_pmx_mask emif1_mask[] = { + /* + * This connects the SDRAM to CS2 and a NAND flash to + * CS0 on the EMIF. + */ + { + U300_SYSCON_PMC1LR_EMIF_1_CS2_MASK | + U300_SYSCON_PMC1LR_EMIF_1_CS1_MASK | + U300_SYSCON_PMC1LR_EMIF_1_CS0_MASK | + U300_SYSCON_PMC1LR_EMIF_1_MASK, + U300_SYSCON_PMC1LR_EMIF_1_CS2_SDRAM | + U300_SYSCON_PMC1LR_EMIF_1_CS1_STATIC | + U300_SYSCON_PMC1LR_EMIF_1_CS0_NFIF | + U300_SYSCON_PMC1LR_EMIF_1_SDRAM0 + }, + {0, 0}, + {0, 0}, + {0, 0}, + {0, 0}, +}; + +static const struct u300_pmx_mask uart0_mask[] = { + {0, 0}, + { + U300_SYSCON_PMC1HR_APP_UART0_1_MASK | + U300_SYSCON_PMC1HR_APP_UART0_2_MASK, + U300_SYSCON_PMC1HR_APP_UART0_1_UART0 | + U300_SYSCON_PMC1HR_APP_UART0_2_UART0 + }, + {0, 0}, + {0, 0}, + {0, 0}, +}; + +static const struct u300_pmx_mask mmc0_mask[] = { + { U300_SYSCON_PMC1LR_MMCSD_MASK, U300_SYSCON_PMC1LR_MMCSD_MMCSD}, + {0, 0}, + {0, 0}, + {0, 0}, + { U300_SYSCON_PMC4R_APP_MISC_12_MASK, + U300_SYSCON_PMC4R_APP_MISC_12_APP_GPIO } +}; + +static const struct u300_pmx_mask spi0_mask[] = { + {0, 0}, + { + U300_SYSCON_PMC1HR_APP_SPI_2_MASK | + U300_SYSCON_PMC1HR_APP_SPI_CS_1_MASK | + U300_SYSCON_PMC1HR_APP_SPI_CS_2_MASK, + U300_SYSCON_PMC1HR_APP_SPI_2_SPI | + U300_SYSCON_PMC1HR_APP_SPI_CS_1_SPI | + U300_SYSCON_PMC1HR_APP_SPI_CS_2_SPI + }, + {0, 0}, + {0, 0}, + {0, 0} +}; + +static const struct u300_pin_group u300_pin_groups[] = { + { + .name = "powergrp", + .pins = power_pins, + .num_pins = ARRAY_SIZE(power_pins), + }, + { + .name = "emif0grp", + .pins = emif0_pins, + .num_pins = ARRAY_SIZE(emif0_pins), + }, + { + .name = "emif1grp", + .pins = emif1_pins, + .num_pins = ARRAY_SIZE(emif1_pins), + }, + { + .name = "uart0grp", + .pins = uart0_pins, + .num_pins = ARRAY_SIZE(uart0_pins), + }, + { + .name = "mmc0grp", + .pins = mmc0_pins, + .num_pins = ARRAY_SIZE(mmc0_pins), + }, + { + .name = "spi0grp", + .pins = spi0_pins, + .num_pins = ARRAY_SIZE(spi0_pins), + }, +}; + +static int u300_list_groups(struct pinctrl_dev *pctldev, unsigned selector) +{ + if (selector >= ARRAY_SIZE(u300_pin_groups)) + return -EINVAL; + return 0; +} + +static const char *u300_get_group_name(struct pinctrl_dev *pctldev, + unsigned selector) +{ + if (selector >= ARRAY_SIZE(u300_pin_groups)) + return NULL; + return u300_pin_groups[selector].name; +} + +static int u300_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, + unsigned ** const pins, + unsigned * const num_pins) +{ + if (selector >= ARRAY_SIZE(u300_pin_groups)) + return -EINVAL; + *pins = (unsigned *) u300_pin_groups[selector].pins; + *num_pins = u300_pin_groups[selector].num_pins; + return 0; +} + +static void u300_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, + unsigned offset) +{ + seq_printf(s, " " DRIVER_NAME); +} + +static struct pinctrl_ops u300_pctrl_ops = { + .list_groups = u300_list_groups, + .get_group_name = u300_get_group_name, + .get_group_pins = u300_get_group_pins, + .pin_dbg_show = u300_pin_dbg_show, +}; + +/* + * Here we define the available functions and their corresponding pin groups + */ + +/** + * struct u300_pmx_func - describes U300 pinmux functions + * @name: the name of this specific function + * @groups: corresponding pin groups + * @onmask: bits to set to enable this when doing pin muxing + */ +struct u300_pmx_func { + const char *name; + const char * const *groups; + const unsigned num_groups; + const struct u300_pmx_mask *mask; +}; + +static const char * const powergrps[] = { "powergrp" }; +static const char * const emif0grps[] = { "emif0grp" }; +static const char * const emif1grps[] = { "emif1grp" }; +static const char * const uart0grps[] = { "uart0grp" }; +static const char * const mmc0grps[] = { "mmc0grp" }; +static const char * const spi0grps[] = { "spi0grp" }; + +static const struct u300_pmx_func u300_pmx_functions[] = { + { + .name = "power", + .groups = powergrps, + .num_groups = ARRAY_SIZE(powergrps), + /* Mask is N/A */ + }, + { + .name = "emif0", + .groups = emif0grps, + .num_groups = ARRAY_SIZE(emif0grps), + .mask = emif0_mask, + }, + { + .name = "emif1", + .groups = emif1grps, + .num_groups = ARRAY_SIZE(emif1grps), + .mask = emif1_mask, + }, + { + .name = "uart0", + .groups = uart0grps, + .num_groups = ARRAY_SIZE(uart0grps), + .mask = uart0_mask, + }, + { + .name = "mmc0", + .groups = mmc0grps, + .num_groups = ARRAY_SIZE(mmc0grps), + .mask = mmc0_mask, + }, + { + .name = "spi0", + .groups = spi0grps, + .num_groups = ARRAY_SIZE(spi0grps), + .mask = spi0_mask, + }, +}; + +static void u300_pmx_endisable(struct u300_pmx *upmx, unsigned selector, + bool enable) +{ + u16 regval, val, mask; + int i; + + for (i = 0; i < ARRAY_SIZE(u300_pmx_registers); i++) { + if (enable) + val = u300_pmx_functions[selector].mask->bits; + else + val = 0; + + mask = u300_pmx_functions[selector].mask->mask; + if (mask != 0) { + regval = readw(upmx->virtbase + u300_pmx_registers[i]); + regval &= ~mask; + regval |= val; + writew(regval, upmx->virtbase + u300_pmx_registers[i]); + } + } +} + +static int u300_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector, + unsigned group) +{ + struct u300_pmx *upmx; + + /* There is nothing to do with the power pins */ + if (selector == 0) + return 0; + + upmx = pinctrl_dev_get_drvdata(pctldev); + u300_pmx_endisable(upmx, selector, true); + + return 0; +} + +static void u300_pmx_disable(struct pinctrl_dev *pctldev, unsigned selector, + unsigned group) +{ + struct u300_pmx *upmx; + + /* There is nothing to do with the power pins */ + if (selector == 0) + return; + + upmx = pinctrl_dev_get_drvdata(pctldev); + u300_pmx_endisable(upmx, selector, false); +} + +static int u300_pmx_list_funcs(struct pinctrl_dev *pctldev, unsigned selector) +{ + if (selector >= ARRAY_SIZE(u300_pmx_functions)) + return -EINVAL; + return 0; +} + +static const char *u300_pmx_get_func_name(struct pinctrl_dev *pctldev, + unsigned selector) +{ + return u300_pmx_functions[selector].name; +} + +static int u300_pmx_get_groups(struct pinctrl_dev *pctldev, unsigned selector, + const char * const **groups, + unsigned * const num_groups) +{ + *groups = u300_pmx_functions[selector].groups; + *num_groups = u300_pmx_functions[selector].num_groups; + return 0; +} + +static struct pinmux_ops u300_pmx_ops = { + .list_functions = u300_pmx_list_funcs, + .get_function_name = u300_pmx_get_func_name, + .get_function_groups = u300_pmx_get_groups, + .enable = u300_pmx_enable, + .disable = u300_pmx_disable, +}; + +/* + * FIXME: this will be set to sane values as this driver engulfs + * drivers/gpio/gpio-u300.c and we really know this stuff. + */ +static struct pinctrl_gpio_range u300_gpio_range = { + .name = "COH901*", + .id = 0, + .base = 0, + .npins = 64, +}; + +static struct pinctrl_desc u300_pmx_desc = { + .name = DRIVER_NAME, + .pins = u300_pads, + .npins = ARRAY_SIZE(u300_pads), + .maxpin = U300_NUM_PADS-1, + .pctlops = &u300_pctrl_ops, + .pmxops = &u300_pmx_ops, + .owner = THIS_MODULE, +}; + +static int __init u300_pmx_probe(struct platform_device *pdev) +{ + int ret; + struct u300_pmx *upmx; + struct resource *res; + + /* Create state holders etc for this driver */ + upmx = devm_kzalloc(&pdev->dev, sizeof(*upmx), GFP_KERNEL); + if (!upmx) + return -ENOMEM; + + upmx->dev = &pdev->dev; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + ret = -ENOENT; + goto out_no_resource; + } + upmx->phybase = res->start; + upmx->physize = resource_size(res); + + if (request_mem_region(upmx->phybase, upmx->physize, + DRIVER_NAME) == NULL) { + ret = -ENOMEM; + goto out_no_memregion; + } + + upmx->virtbase = ioremap(upmx->phybase, upmx->physize); + if (!upmx->virtbase) { + ret = -ENOMEM; + goto out_no_remap; + } + + upmx->pctl = pinctrl_register(&u300_pmx_desc, &pdev->dev, upmx); + if (!upmx->pctl) { + dev_err(&pdev->dev, "could not register U300 pinmux driver\n"); + ret = -EINVAL; + goto out_no_pmx; + } + + /* We will handle a range of GPIO pins */ + pinctrl_add_gpio_range(upmx->pctl, &u300_gpio_range); + + platform_set_drvdata(pdev, upmx); + + dev_info(&pdev->dev, "initialized U300 pinmux driver\n"); + + return 0; + +out_no_pmx: + iounmap(upmx->virtbase); +out_no_remap: + platform_set_drvdata(pdev, NULL); +out_no_memregion: + release_mem_region(upmx->phybase, upmx->physize); +out_no_resource: + devm_kfree(&pdev->dev, upmx); + return ret; +} + +static int __exit u300_pmx_remove(struct platform_device *pdev) +{ + struct u300_pmx *upmx = platform_get_drvdata(pdev); + + pinctrl_remove_gpio_range(upmx->pctl, &u300_gpio_range); + pinctrl_unregister(upmx->pctl); + iounmap(upmx->virtbase); + release_mem_region(upmx->phybase, upmx->physize); + platform_set_drvdata(pdev, NULL); + devm_kfree(&pdev->dev, upmx); + + return 0; +} + +static struct platform_driver u300_pmx_driver = { + .driver = { + .name = DRIVER_NAME, + .owner = THIS_MODULE, + }, + .remove = __exit_p(u300_pmx_remove), +}; + +static int __init u300_pmx_init(void) +{ + return platform_driver_probe(&u300_pmx_driver, u300_pmx_probe); +} +arch_initcall(u300_pmx_init); + +static void __exit u300_pmx_exit(void) +{ + platform_driver_unregister(&u300_pmx_driver); +} +module_exit(u300_pmx_exit); + +MODULE_AUTHOR("Linus Walleij "); +MODULE_DESCRIPTION("U300 pin control driver"); +MODULE_LICENSE("GPL v2"); -- cgit v1.2.3 From f427eb64f4c5433a91da5eb139970dd5cbad9082 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 10 Oct 2011 22:06:12 -0700 Subject: usb: gadget: renesas_usbhs: support otg pin control some renesas_usbhs device is supporting OTG external device interface. In that device, it is necessary to control PWEN/EXTLP on DVSTCTR. This patch support it. But renesas_usbhs driver doesn't have OTG support for now. Signed-off-by: Kuninori Morimoto Signed-off-by: Felipe Balbi --- arch/arm/mach-shmobile/board-mackerel.c | 1 + drivers/usb/renesas_usbhs/common.c | 4 ++++ include/linux/usb/renesas_usbhs.h | 5 +++++ 3 files changed, 10 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 0ea71f8d4b89..c20612ea5d0e 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c @@ -808,6 +808,7 @@ static struct usbhs_private usbhs1_private = { }, .driver_param = { .buswait_bwait = 4, + .has_otg = 1, .pipe_type = usbhs1_pipe_cfg, .pipe_size = ARRAY_SIZE(usbhs1_pipe_cfg), }, diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c index b327458f5cad..1161d78e1665 100644 --- a/drivers/usb/renesas_usbhs/common.c +++ b/drivers/usb/renesas_usbhs/common.c @@ -114,6 +114,10 @@ void usbhs_sys_host_ctrl(struct usbhs_priv *priv, int enable) { u16 mask = DCFM | DRPD | DPRPU; u16 val = DCFM | DRPD; + int has_otg = usbhs_get_dparam(priv, has_otg); + + if (has_otg) + usbhs_bset(priv, DVSTCTR, (EXTLP | PWEN), (EXTLP | PWEN)); /* * if enable diff --git a/include/linux/usb/renesas_usbhs.h b/include/linux/usb/renesas_usbhs.h index 040d8bb2b5a2..e5a40c318548 100644 --- a/include/linux/usb/renesas_usbhs.h +++ b/include/linux/usb/renesas_usbhs.h @@ -136,6 +136,11 @@ struct renesas_usbhs_driver_param { * pio <--> dma border. */ int pio_dma_border; /* default is 64byte */ + + /* + * option: + */ + u32 has_otg:1; /* for controlling PWEN/EXTLP */ }; /* -- cgit v1.2.3 From c9018aab8eee24b993c12c7aff7fc99d3d73f298 Mon Sep 17 00:00:00 2001 From: Vincent Guittot Date: Mon, 8 Aug 2011 13:21:59 +0100 Subject: ARM: 7011/1: Add ARM cpu topology definition The affinity between ARM processors is defined in the MPIDR register. We can identify which processors are in the same cluster, and which ones have performance interdependency. We can define the cpu topology of ARM platform, that is then used by sched_mc and sched_smt. The default state of sched_mc and sched_smt config is disable. When enabled, the behavior of the scheduler can be modified with sched_mc_power_savings and sched_smt_power_savings sysfs interfaces. Changes since v4 : * Remove unnecessary parentheses and blank lines Changes since v3 : * Update the format of printk message * Remove blank line Changes since v2 : * Update the commit message and some comments Changes since v1 : * Update the commit message * Add read_cpuid_mpidr in arch/arm/include/asm/cputype.h * Modify header of arch/arm/kernel/topology.c * Modify tests and manipulation of MPIDR's bitfields * Modify the place and dependancy of the config * Modify Noop functions Signed-off-by: Vincent Guittot Reviewed-by: Amit Kucheria Signed-off-by: Russell King --- arch/arm/Kconfig | 25 +++++++ arch/arm/include/asm/cputype.h | 6 ++ arch/arm/include/asm/topology.h | 33 +++++++++ arch/arm/kernel/Makefile | 1 + arch/arm/kernel/smp.c | 5 ++ arch/arm/kernel/topology.c | 148 ++++++++++++++++++++++++++++++++++++++++ 6 files changed, 218 insertions(+) create mode 100644 arch/arm/kernel/topology.c (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3269576dbfa8..c208fd97c180 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1393,6 +1393,31 @@ config SMP_ON_UP If you don't know what to do here, say Y. +config ARM_CPU_TOPOLOGY + bool "Support cpu topology definition" + depends on SMP && CPU_V7 + default y + help + Support ARM cpu topology definition. The MPIDR register defines + affinity between processors which is then used to describe the cpu + topology of an ARM System. + +config SCHED_MC + bool "Multi-core scheduler support" + depends on ARM_CPU_TOPOLOGY + help + Multi-core scheduler support improves the CPU scheduler's decision + making when dealing with multi-core CPU chips at a cost of slightly + increased overhead in some places. If unsure say N here. + +config SCHED_SMT + bool "SMT scheduler support" + depends on ARM_CPU_TOPOLOGY + help + Improves the CPU scheduler's decision making when dealing with + MultiThreading at a cost of slightly increased overhead in some + places. If unsure say N here. + config HAVE_ARM_SCU bool help diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h index cd4458f64171..cb47d28cbe1f 100644 --- a/arch/arm/include/asm/cputype.h +++ b/arch/arm/include/asm/cputype.h @@ -8,6 +8,7 @@ #define CPUID_CACHETYPE 1 #define CPUID_TCM 2 #define CPUID_TLBTYPE 3 +#define CPUID_MPIDR 5 #define CPUID_EXT_PFR0 "c1, 0" #define CPUID_EXT_PFR1 "c1, 1" @@ -70,6 +71,11 @@ static inline unsigned int __attribute_const__ read_cpuid_tcmstatus(void) return read_cpuid(CPUID_TCM); } +static inline unsigned int __attribute_const__ read_cpuid_mpidr(void) +{ + return read_cpuid(CPUID_MPIDR); +} + /* * Intel's XScale3 core supports some v6 features (supersections, L2) * but advertises itself as v5 as it does not support the v6 ISA. For diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h index accbd7cad9b5..a7e457ed27c3 100644 --- a/arch/arm/include/asm/topology.h +++ b/arch/arm/include/asm/topology.h @@ -1,6 +1,39 @@ #ifndef _ASM_ARM_TOPOLOGY_H #define _ASM_ARM_TOPOLOGY_H +#ifdef CONFIG_ARM_CPU_TOPOLOGY + +#include + +struct cputopo_arm { + int thread_id; + int core_id; + int socket_id; + cpumask_t thread_sibling; + cpumask_t core_sibling; +}; + +extern struct cputopo_arm cpu_topology[NR_CPUS]; + +#define topology_physical_package_id(cpu) (cpu_topology[cpu].socket_id) +#define topology_core_id(cpu) (cpu_topology[cpu].core_id) +#define topology_core_cpumask(cpu) (&cpu_topology[cpu].core_sibling) +#define topology_thread_cpumask(cpu) (&cpu_topology[cpu].thread_sibling) + +#define mc_capable() (cpu_topology[0].socket_id != -1) +#define smt_capable() (cpu_topology[0].thread_id != -1) + +void init_cpu_topology(void); +void store_cpu_topology(unsigned int cpuid); +const struct cpumask *cpu_coregroup_mask(unsigned int cpu); + +#else + +static inline void init_cpu_topology(void) { } +static inline void store_cpu_topology(unsigned int cpuid) { } + +#endif + #include #endif /* _ASM_ARM_TOPOLOGY_H */ diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index f7887dc53c1f..c687bceba7da 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -66,6 +66,7 @@ obj-$(CONFIG_IWMMXT) += iwmmxt.o obj-$(CONFIG_CPU_HAS_PMU) += pmu.o obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt +obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o ifneq ($(CONFIG_ARCH_EBSA110),y) obj-y += io.o diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index d88ff0230e82..62775c5c5ba0 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include @@ -268,6 +269,8 @@ static void __cpuinit smp_store_cpu_info(unsigned int cpuid) struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid); cpu_info->loops_per_jiffy = loops_per_jiffy; + + store_cpu_topology(cpuid); } /* @@ -358,6 +361,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus) { unsigned int ncores = num_possible_cpus(); + init_cpu_topology(); + smp_store_cpu_info(smp_processor_id()); /* diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c new file mode 100644 index 000000000000..1040c00405d0 --- /dev/null +++ b/arch/arm/kernel/topology.c @@ -0,0 +1,148 @@ +/* + * arch/arm/kernel/topology.c + * + * Copyright (C) 2011 Linaro Limited. + * Written by: Vincent Guittot + * + * based on arch/sh/kernel/topology.c + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#define MPIDR_SMP_BITMASK (0x3 << 30) +#define MPIDR_SMP_VALUE (0x2 << 30) + +#define MPIDR_MT_BITMASK (0x1 << 24) + +/* + * These masks reflect the current use of the affinity levels. + * The affinity level can be up to 16 bits according to ARM ARM + */ + +#define MPIDR_LEVEL0_MASK 0x3 +#define MPIDR_LEVEL0_SHIFT 0 + +#define MPIDR_LEVEL1_MASK 0xF +#define MPIDR_LEVEL1_SHIFT 8 + +#define MPIDR_LEVEL2_MASK 0xFF +#define MPIDR_LEVEL2_SHIFT 16 + +struct cputopo_arm cpu_topology[NR_CPUS]; + +const struct cpumask *cpu_coregroup_mask(unsigned int cpu) +{ + return &cpu_topology[cpu].core_sibling; +} + +/* + * store_cpu_topology is called at boot when only one cpu is running + * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, + * which prevents simultaneous write access to cpu_topology array + */ +void store_cpu_topology(unsigned int cpuid) +{ + struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; + unsigned int mpidr; + unsigned int cpu; + + /* If the cpu topology has been already set, just return */ + if (cpuid_topo->core_id != -1) + return; + + mpidr = read_cpuid_mpidr(); + + /* create cpu topology mapping */ + if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) { + /* + * This is a multiprocessor system + * multiprocessor format & multiprocessor mode field are set + */ + + if (mpidr & MPIDR_MT_BITMASK) { + /* core performance interdependency */ + cpuid_topo->thread_id = (mpidr >> MPIDR_LEVEL0_SHIFT) + & MPIDR_LEVEL0_MASK; + cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL1_SHIFT) + & MPIDR_LEVEL1_MASK; + cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL2_SHIFT) + & MPIDR_LEVEL2_MASK; + } else { + /* largely independent cores */ + cpuid_topo->thread_id = -1; + cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL0_SHIFT) + & MPIDR_LEVEL0_MASK; + cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL1_SHIFT) + & MPIDR_LEVEL1_MASK; + } + } else { + /* + * This is an uniprocessor system + * we are in multiprocessor format but uniprocessor system + * or in the old uniprocessor format + */ + cpuid_topo->thread_id = -1; + cpuid_topo->core_id = 0; + cpuid_topo->socket_id = -1; + } + + /* update core and thread sibling masks */ + for_each_possible_cpu(cpu) { + struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; + + if (cpuid_topo->socket_id == cpu_topo->socket_id) { + cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->core_sibling); + + if (cpuid_topo->core_id == cpu_topo->core_id) { + cpumask_set_cpu(cpuid, + &cpu_topo->thread_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->thread_sibling); + } + } + } + smp_wmb(); + + printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", + cpuid, cpu_topology[cpuid].thread_id, + cpu_topology[cpuid].core_id, + cpu_topology[cpuid].socket_id, mpidr); +} + +/* + * init_cpu_topology is called at boot when only one cpu is running + * which prevent simultaneous write access to cpu_topology array + */ +void init_cpu_topology(void) +{ + unsigned int cpu; + + /* init core mask */ + for_each_possible_cpu(cpu) { + struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]); + + cpu_topo->thread_id = -1; + cpu_topo->core_id = -1; + cpu_topo->socket_id = -1; + cpumask_clear(&cpu_topo->core_sibling); + cpumask_clear(&cpu_topo->thread_sibling); + } + smp_wmb(); +} -- cgit v1.2.3 From d6257288c4052465feeff7e283e35ec0ed06ca03 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Tue, 23 Aug 2011 22:19:29 +0100 Subject: ARM: 7060/1: smp: populate logical CPU mapping during boot To allow booting Linux on a CPU with physical ID != 0, we need to provide a mapping from the logical CPU number to the physical CPU number. This patch adds such a mapping and populates it during boot. Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/include/asm/smp.h | 6 ++++++ arch/arm/kernel/smp.c | 15 +++++++++++++++ 2 files changed, 21 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h index e42d96a45d3e..674ebcd337fe 100644 --- a/arch/arm/include/asm/smp.h +++ b/arch/arm/include/asm/smp.h @@ -65,6 +65,12 @@ extern void platform_secondary_init(unsigned int cpu); */ extern void platform_smp_prepare_cpus(unsigned int); +/* + * Logical CPU mapping. + */ +extern int __cpu_logical_map[NR_CPUS]; +#define cpu_logical_map(cpu) __cpu_logical_map[cpu] + /* * Initial data for bringing up a secondary CPU. */ diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 62775c5c5ba0..3f12ce9b0796 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -40,6 +40,7 @@ #include #include #include +#include /* * as from 2.5, kernels no longer have an init_tasks structure @@ -260,6 +261,20 @@ void __ref cpu_die(void) } #endif /* CONFIG_HOTPLUG_CPU */ +int __cpu_logical_map[NR_CPUS]; + +void __init smp_setup_processor_id(void) +{ + int i; + u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0; + + cpu_logical_map(0) = cpu; + for (i = 1; i < NR_CPUS; ++i) + cpu_logical_map(i) = i == cpu ? 0 : i; + + printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu); +} + /* * Called by both boot and secondaries to move global data into * per-processor storage. -- cgit v1.2.3 From 267840f3397fd9f6a2bdde14de38b9d29d525d7b Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Tue, 23 Aug 2011 22:20:03 +0100 Subject: ARM: 7061/1: gic: convert logical CPU numbers into physical numbers The GIC driver must convert logical CPU numbers passed in from Linux into physical CPU numbers that are understood by the hardware. This patch uses the new cpu_logical_map macro for performing the conversion inside the GIC driver. Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/common/gic.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 3227ca952a12..666b278e56d7 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -180,7 +180,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, return -EINVAL; mask = 0xff << shift; - bit = 1 << (cpu + shift); + bit = 1 << (cpu_logical_map(cpu) + shift); spin_lock(&irq_controller_lock); val = readl_relaxed(reg) & ~mask; @@ -259,9 +259,15 @@ static void __init gic_dist_init(struct gic_chip_data *gic, unsigned int irq_start) { unsigned int gic_irqs, irq_limit, i; + u32 cpumask; void __iomem *base = gic->dist_base; - u32 cpumask = 1 << smp_processor_id(); + u32 cpu = 0; +#ifdef CONFIG_SMP + cpu = cpu_logical_map(smp_processor_id()); +#endif + + cpumask = 1 << cpu; cpumask |= cpumask << 8; cpumask |= cpumask << 16; @@ -382,7 +388,12 @@ void __cpuinit gic_enable_ppi(unsigned int irq) #ifdef CONFIG_SMP void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) { - unsigned long map = *cpus_addr(*mask); + int cpu; + unsigned long map = 0; + + /* Convert our logical CPU mask into a physical one. */ + for_each_cpu(cpu, mask) + map |= 1 << cpu_logical_map(cpu); /* * Ensure that stores to Normal memory are visible to the -- cgit v1.2.3 From 26a527e69d6e6077bff9e2cddcb08337ac33a52d Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 25 Sep 2011 08:25:43 +0100 Subject: ARM: 7100/1: smp_scu: remove __init annotation from scu_enable() When Cortex-A9 MPCore resumes from Dormant or Shutdown modes, SCU needs to be re-enabled. This patch removes __init annotation from function scu_enable(), so that platform resume procedure can call it to re-enable SCU. Signed-off-by: Shawn Guo Signed-off-by: Russell King --- arch/arm/kernel/smp_scu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c index 79ed5e7f204a..5b6d536cbfe3 100644 --- a/arch/arm/kernel/smp_scu.c +++ b/arch/arm/kernel/smp_scu.c @@ -33,7 +33,7 @@ unsigned int __init scu_get_core_count(void __iomem *scu_base) /* * Enable the SCU */ -void __init scu_enable(void __iomem *scu_base) +void scu_enable(void __iomem *scu_base) { u32 scu_ctrl; -- cgit v1.2.3 From 0b5a1b95dcdfa451125132d5ce3f79a27ffb0950 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 6 Oct 2011 15:18:14 +0100 Subject: ARM: 7123/1: smp: Add an IPI handler callable from C code In order to be able to handle IPI directly from C code instead of assembly code, introduce handle_IPI(), which is modeled after handle_IRQ(). Signed-off-by: Marc Zyngier Signed-off-by: Russell King --- arch/arm/include/asm/smp.h | 5 +++++ arch/arm/kernel/smp.c | 5 +++++ 2 files changed, 10 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h index 674ebcd337fe..0a17b62538c2 100644 --- a/arch/arm/include/asm/smp.h +++ b/arch/arm/include/asm/smp.h @@ -32,6 +32,11 @@ extern void show_ipi_list(struct seq_file *, int); */ asmlinkage void do_IPI(int ipinr, struct pt_regs *regs); +/* + * Called from C code, this handles an IPI. + */ +void handle_IPI(int ipinr, struct pt_regs *regs); + /* * Setup the set of possible CPUs (via set_cpu_possible) */ diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 3f12ce9b0796..2e49f1883fe9 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -586,6 +586,11 @@ static void ipi_cpu_stop(unsigned int cpu) * Main handler for inter-processor interrupts */ asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs) +{ + handle_IPI(ipinr, regs); +} + +void handle_IPI(int ipinr, struct pt_regs *regs) { unsigned int cpu = smp_processor_id(); struct pt_regs *old_regs = set_irq_regs(regs); -- cgit v1.2.3 From 0af8aa0069e43f90d59666510342c05e97d8c4b8 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 6 Oct 2011 15:19:14 +0100 Subject: ARM: 7124/1: smp: Add a localtimer handler callable from C code In order to be able to handle localtimer directly from C code instead of assembly code, introduce handle_local_timer(), which is modeled after handle_IRQ(). Signed-off-by: Shawn Guo Signed-off-by: Russell King --- arch/arm/include/asm/localtimer.h | 4 ++++ arch/arm/kernel/smp.c | 5 +++++ 2 files changed, 9 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/localtimer.h b/arch/arm/include/asm/localtimer.h index 080d74f8128d..3306f281333c 100644 --- a/arch/arm/include/asm/localtimer.h +++ b/arch/arm/include/asm/localtimer.h @@ -22,6 +22,10 @@ void percpu_timer_setup(void); */ asmlinkage void do_local_timer(struct pt_regs *); +/* + * Called from C code + */ +void handle_local_timer(struct pt_regs *); #ifdef CONFIG_LOCAL_TIMERS diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 2e49f1883fe9..0949007d09a8 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -479,6 +479,11 @@ static void ipi_timer(void) #ifdef CONFIG_LOCAL_TIMERS asmlinkage void __exception_irq_entry do_local_timer(struct pt_regs *regs) +{ + handle_local_timer(regs); +} + +void handle_local_timer(struct pt_regs *regs) { struct pt_regs *old_regs = set_irq_regs(regs); int cpu = smp_processor_id(); -- cgit v1.2.3 From 5a567d78c437e3be1c512734cdfe64b4ae6b82d7 Mon Sep 17 00:00:00 2001 From: Jamie Iles Date: Sat, 8 Oct 2011 11:20:42 +0100 Subject: ARM: 7115/4: move __exception and friends to asm/exception.h The definition of __exception_irq_entry for CONFIG_FUNCTION_GRAPH_TRACER=y needs linux/ftrace.h, but this creates a circular dependency with it's current home in asm/system.h. Create asm/exception.h and update all current users. v4: - rebase to rmk/for-next v3: - remove redundant includes of linux/ftrace.h v2: - document the usage restricitions of __exception* Cc: Zoltan Devai Signed-off-by: Jamie Iles Signed-off-by: Russell King --- arch/arm/include/asm/exception.h | 19 +++++++++++++++++++ arch/arm/include/asm/system.h | 7 ------- arch/arm/kernel/irq.c | 2 +- arch/arm/kernel/smp.c | 2 +- arch/arm/kernel/traps.c | 1 + arch/arm/mach-pxa/irq.c | 2 ++ arch/arm/mm/fault.c | 1 + 7 files changed, 25 insertions(+), 9 deletions(-) create mode 100644 arch/arm/include/asm/exception.h (limited to 'arch/arm') diff --git a/arch/arm/include/asm/exception.h b/arch/arm/include/asm/exception.h new file mode 100644 index 000000000000..5abaf5bbd985 --- /dev/null +++ b/arch/arm/include/asm/exception.h @@ -0,0 +1,19 @@ +/* + * Annotations for marking C functions as exception handlers. + * + * These should only be used for C functions that are called from the low + * level exception entry code and not any intervening C code. + */ +#ifndef __ASM_ARM_EXCEPTION_H +#define __ASM_ARM_EXCEPTION_H + +#include + +#define __exception __attribute__((section(".exception.text"))) +#ifdef CONFIG_FUNCTION_GRAPH_TRACER +#define __exception_irq_entry __irq_entry +#else +#define __exception_irq_entry __exception +#endif + +#endif /* __ASM_ARM_EXCEPTION_H */ diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 832888d0c20c..ed6b0499a106 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -62,13 +62,6 @@ #include -#define __exception __attribute__((section(".exception.text"))) -#ifdef CONFIG_FUNCTION_GRAPH_TRACER -#define __exception_irq_entry __irq_entry -#else -#define __exception_irq_entry __exception -#endif - struct thread_info; struct task_struct; diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index de3dcab8610b..53919b230e8b 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -35,8 +35,8 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 0949007d09a8..35417d0fb8ab 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include @@ -31,6 +30,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index bc9f9da782cb..210382555af1 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -27,6 +27,7 @@ #include #include +#include #include #include #include diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index b09e848eb6c6..ca6075717824 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -19,6 +19,8 @@ #include #include +#include + #include #include #include diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index 3b5ea68acbb8..aa33949fef60 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c @@ -20,6 +20,7 @@ #include #include +#include #include #include #include -- cgit v1.2.3 From 17916b284e6afea210484e4c2688debb8c9641c2 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Thu, 1 Sep 2011 18:58:51 +0100 Subject: ARM: 7072/1: debug: use kconfig choice for selecting DEBUG_LL UART Enabling CONFIG_DEBUG_LL (which is required for earlyprintk) hardwires the debug UART address into the kernel, so that we can print before the platform is initialised. If the user inadvertently selects multiple platforms with DEBUG_LL enabled, the UART address may not be correct and will likely cause the kernel to hang in the very early stages of boot. This patch, based on a skeleton from Russell, uses a Kconfig choice for selecting the DEBUG_LL UART, therefore allowing the user to make a choice about the supported platform when DEBUG_LL is enabled. Acked-by: Nicolas Pitre Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/Kconfig.debug | 41 ++++++++++++++++++++++++----------------- 1 file changed, 24 insertions(+), 17 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 81cbe40c159c..11604c9e55e0 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -72,6 +72,30 @@ config DEBUG_LL in the kernel. This is helpful if you are debugging code that executes before the console is initialized. +choice + prompt "Kernel low-level debugging port" + depends on DEBUG_LL + + config DEBUG_DC21285_PORT + bool "Kernel low-level debugging messages via footbridge serial port" + depends on FOOTBRIDGE + help + Say Y here if you want the debug print routines to direct + their output to the serial port in the DC21285 (Footbridge). + Saying N will cause the debug messages to appear on the first + 16550 serial port. + + config DEBUG_CLPS711X_UART2 + bool "Kernel low-level debugging messages via UART2" + depends on ARCH_CLPS711X + help + Say Y here if you want the debug print routines to direct + their output to the second serial port on these devices. + Saying N will cause the debug messages to appear on the first + serial port. + +endchoice + config EARLY_PRINTK bool "Early printk" depends on DEBUG_LL @@ -100,23 +124,6 @@ config OC_ETM buffer driver that will allow you to collect traces of the kernel code. -config DEBUG_DC21285_PORT - bool "Kernel low-level debugging messages via footbridge serial port" - depends on DEBUG_LL && FOOTBRIDGE - help - Say Y here if you want the debug print routines to direct their - output to the serial port in the DC21285 (Footbridge). Saying N - will cause the debug messages to appear on the first 16550 - serial port. - -config DEBUG_CLPS711X_UART2 - bool "Kernel low-level debugging messages via UART2" - depends on DEBUG_LL && ARCH_CLPS711X - help - Say Y here if you want the debug print routines to direct their - output to the second serial port on these devices. Saying N will - cause the debug messages to appear on the first serial port. - config DEBUG_S3C_UART depends on PLAT_SAMSUNG int "S3C UART to use for low-level debug" -- cgit v1.2.3 From 4f5ef9226afab7c9920f1e6c560f046f6aaba89c Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Thu, 1 Sep 2011 19:04:44 +0100 Subject: ARM: 7073/1: debug: augment DEBUG_LL Kconfig help to clarify behaviour Enabled DEBUG_LL hardcodes the UART address into the kernel and results in a non-portable kernel image. Since this option is only intended for use when debugging early boot failures, supporting multiple platforms in such a configuration is not the intended use-case. This patch documents this limitation in the DEBUG_LL Kconfig help text, so that users are aware of the portability restrictions that are associated with enabling low-level debugging support. Reported-by: Sascha Hauer Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/Kconfig.debug | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 11604c9e55e0..60d184677955 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -65,13 +65,18 @@ config DEBUG_USER # These options are only for real kernel hackers who want to get their hands dirty. config DEBUG_LL - bool "Kernel low-level debugging functions" + bool "Kernel low-level debugging functions (read help!)" depends on DEBUG_KERNEL help Say Y here to include definitions of printascii, printch, printhex in the kernel. This is helpful if you are debugging code that executes before the console is initialized. + Note that selecting this option will limit the kernel to a single + UART definition, as specified below. Attempting to boot the kernel + image on a different platform *will not work*, so this option should + not be enabled for kernels that are intended to be portable. + choice prompt "Kernel low-level debugging port" depends on DEBUG_LL -- cgit v1.2.3 From 164acf96a979deae3cf04f8eebcc66567fb8a520 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Thu, 22 Sep 2011 20:28:35 +0100 Subject: ARM: 7096/1: debug: Add UART1 config choices ARM patch 7072/1 (debug: use kconfig choice for selecting DEBUG_LL UART) didn't notice that the Kconfigs relied on being unselected to configure a different serial port. Since there is no NONE option in a choice menu, explicitly add the other option so that both serial ports can be selected. Signed-off-by: Stephen Boyd Acked-by: Will Deacon Signed-off-by: Russell King --- arch/arm/Kconfig.debug | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 60d184677955..6dbcb0068b47 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -81,14 +81,27 @@ choice prompt "Kernel low-level debugging port" depends on DEBUG_LL + + config DEBUG_FOOTBRIDGE_COM1 + bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" + depends on FOOTBRIDGE + help + Say Y here if you want the debug print routines to direct + their output to the 8250 at PCI COM1. + config DEBUG_DC21285_PORT bool "Kernel low-level debugging messages via footbridge serial port" depends on FOOTBRIDGE help Say Y here if you want the debug print routines to direct their output to the serial port in the DC21285 (Footbridge). - Saying N will cause the debug messages to appear on the first - 16550 serial port. + + config DEBUG_CLPS711X_UART1 + bool "Kernel low-level debugging messages via UART1" + depends on ARCH_CLPS711X + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on these devices. config DEBUG_CLPS711X_UART2 bool "Kernel low-level debugging messages via UART2" @@ -96,8 +109,6 @@ choice help Say Y here if you want the debug print routines to direct their output to the second serial port on these devices. - Saying N will cause the debug messages to appear on the first - serial port. endchoice -- cgit v1.2.3 From 6996f425e57d58a6f1884b7fd4bfc3ed3dd10c2d Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Thu, 22 Sep 2011 20:28:36 +0100 Subject: ARM: 7097/1: debug: Move DEBUG_ICEDCC into the DEBUG_LL choice DEBUG_ICEDCC support is just another DEBUG_LL choice and selecting it along with other DEBUG_LL options doesn't make much sense. Put it into the DEBUG_LL choice to avoid confusion. Signed-off-by: Stephen Boyd Acked-by: Will Deacon Signed-off-by: Russell King --- arch/arm/Kconfig.debug | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 6dbcb0068b47..91a826308d56 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -81,6 +81,16 @@ choice prompt "Kernel low-level debugging port" depends on DEBUG_LL + config DEBUG_ICEDCC + bool "Kernel low-level debugging via EmbeddedICE DCC channel" + help + Say Y here if you want the debug print routines to direct + their output to the EmbeddedICE macrocell's DCC channel using + co-processor 14. This is known to work on the ARM9 style ICE + channel and on the XScale with the PEEDI. + + It does include a timeout to ensure that the system does not + totally freeze when there is nothing connected to read. config DEBUG_FOOTBRIDGE_COM1 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" @@ -120,18 +130,6 @@ config EARLY_PRINTK kernel low-level debugging functions. Add earlyprintk to your kernel parameters to enable this console. -config DEBUG_ICEDCC - bool "Kernel low-level debugging via EmbeddedICE DCC channel" - depends on DEBUG_LL - help - Say Y here if you want the debug print routines to direct their - output to the EmbeddedICE macrocell's DCC channel using - co-processor 14. This is known to work on the ARM9 style ICE - channel and on the XScale with the PEEDI. - - It does include a timeout to ensure that the system does not - totally freeze when there is nothing connected to read. - config OC_ETM bool "On-chip ETM and ETB" select ARM_AMBA -- cgit v1.2.3 From f73765fcb8bb79e80af58059441eb931679e68c0 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Mon, 3 Oct 2011 18:29:03 +0100 Subject: ARM: 7116/1: debug: provide dummy default option for DEBUG_LL UART choice Defaulting to DEBUG_ICEDCC will cause systems to hang during boot unless a hardware debugger is listening to the debug comms. channel. This patch adds a dummy UART option as the default DEBUG_LL choice which requires the platform to do the right thing. Acked-by: Stephen Boyd Tested-by: Marc Zyngier Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/Kconfig.debug | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 91a826308d56..b3dc1fa30848 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -81,6 +81,14 @@ choice prompt "Kernel low-level debugging port" depends on DEBUG_LL + config DEBUG_LL_UART_NONE + bool "No low-level debugging UART" + help + Say Y here if your platform doesn't provide a UART option + below. This relies on your platform choosing the right UART + definition internally in order for low-level debugging to + work. + config DEBUG_ICEDCC bool "Kernel low-level debugging via EmbeddedICE DCC channel" help @@ -89,8 +97,8 @@ choice co-processor 14. This is known to work on the ARM9 style ICE channel and on the XScale with the PEEDI. - It does include a timeout to ensure that the system does not - totally freeze when there is nothing connected to read. + Note that the system will appear to hang during boot if there + is nothing connected to read from the DCC. config DEBUG_FOOTBRIDGE_COM1 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" -- cgit v1.2.3 From 8c369264b6de3b2ab796f330a4d85770a6b8b033 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 3 Aug 2011 18:12:05 +0100 Subject: ARM: 7009/1: l2x0: Add OF based initialization This adds probing for ARM L2x0 cache controllers via device tree. Support includes the L210, L220, and PL310 controllers. The binding allows setting up cache RAM latencies and filter addresses (PL310 only). Signed-off-by: Rob Herring Acked-by: Grant Likely Acked-by: Arnd Bergmann Acked-by: Olof Johansson Acked-by: Barry Song <21cnbao@gmail.com> Signed-off-by: Russell King --- Documentation/devicetree/bindings/arm/l2cc.txt | 42 ++++++++++ arch/arm/include/asm/hardware/cache-l2x0.h | 17 ++++ arch/arm/mm/cache-l2x0.c | 103 +++++++++++++++++++++++++ 3 files changed, 162 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/l2cc.txt (limited to 'arch/arm') diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt new file mode 100644 index 000000000000..f50e021a0998 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/l2cc.txt @@ -0,0 +1,42 @@ +* ARM L2 Cache Controller + +ARM cores often have a separate level 2 cache controller. There are various +implementations of the L2 cache controller with compatible programming models. +The ARM L2 cache representation in the device tree should be done as follows: + +Required properties: + +- compatible : should be one of: + "arm,pl310-cache" + "arm,l220-cache" + "arm,l210-cache" +- cache-unified : Specifies the cache is a unified cache. +- cache-level : Should be set to 2 for a level 2 cache. +- reg : Physical base address and size of cache controller's memory mapped + registers. + +Optional properties: + +- arm,data-latency : Cycles of latency for Data RAM accesses. Specifies 3 cells of + read, write and setup latencies. Minimum valid values are 1. Controllers + without setup latency control should use a value of 0. +- arm,tag-latency : Cycles of latency for Tag RAM accesses. Specifies 3 cells of + read, write and setup latencies. Controllers without setup latency control + should use 0. Controllers without separate read and write Tag RAM latency + values should only use the first cell. +- arm,dirty-latency : Cycles of latency for Dirty RAMs. This is a single cell. +- arm,filter-ranges : Starting address and length of window to + filter. Addresses in the filter window are directed to the M1 port. Other + addresses will go to the M0 port. + +Example: + +L2: cache-controller { + compatible = "arm,pl310-cache"; + reg = <0xfff12000 0x1000>; + arm,data-latency = <1 1 1>; + arm,tag-latency = <2 2 2>; + arm,filter-latency = <0x80000000 0x8000000>; + cache-unified; + cache-level = <2>; +}; diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h index 99a6ed7e1bfd..c48cb1e1c46c 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h @@ -52,6 +52,8 @@ #define L2X0_LOCKDOWN_WAY_D_BASE 0x900 #define L2X0_LOCKDOWN_WAY_I_BASE 0x904 #define L2X0_LOCKDOWN_STRIDE 0x08 +#define L2X0_ADDR_FILTER_START 0xC00 +#define L2X0_ADDR_FILTER_END 0xC04 #define L2X0_TEST_OPERATION 0xF00 #define L2X0_LINE_DATA 0xF10 #define L2X0_LINE_TAG 0xF30 @@ -67,6 +69,14 @@ #define L2X0_CACHE_ID_PART_L310 (3 << 6) #define L2X0_AUX_CTRL_MASK 0xc0000fff +#define L2X0_AUX_CTRL_DATA_RD_LATENCY_SHIFT 0 +#define L2X0_AUX_CTRL_DATA_RD_LATENCY_MASK 0x7 +#define L2X0_AUX_CTRL_DATA_WR_LATENCY_SHIFT 3 +#define L2X0_AUX_CTRL_DATA_WR_LATENCY_MASK (0x7 << 3) +#define L2X0_AUX_CTRL_TAG_LATENCY_SHIFT 6 +#define L2X0_AUX_CTRL_TAG_LATENCY_MASK (0x7 << 6) +#define L2X0_AUX_CTRL_DIRTY_LATENCY_SHIFT 9 +#define L2X0_AUX_CTRL_DIRTY_LATENCY_MASK (0x7 << 9) #define L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT 16 #define L2X0_AUX_CTRL_WAY_SIZE_SHIFT 17 #define L2X0_AUX_CTRL_WAY_SIZE_MASK (0x7 << 17) @@ -77,8 +87,15 @@ #define L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT 29 #define L2X0_AUX_CTRL_EARLY_BRESP_SHIFT 30 +#define L2X0_LATENCY_CTRL_SETUP_SHIFT 0 +#define L2X0_LATENCY_CTRL_RD_SHIFT 4 +#define L2X0_LATENCY_CTRL_WR_SHIFT 8 + +#define L2X0_ADDR_FILTER_EN 1 + #ifndef __ASSEMBLY__ extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); +extern int l2x0_of_init(__u32 aux_val, __u32 aux_mask); #endif #endif diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 9ecfdb511951..db4484f5bf98 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -16,9 +16,12 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ +#include #include #include #include +#include +#include #include #include @@ -372,3 +375,103 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n", ways, cache_id, aux, l2x0_size); } + +#ifdef CONFIG_OF +static void __init l2x0_of_setup(const struct device_node *np, + __u32 *aux_val, __u32 *aux_mask) +{ + u32 data[2] = { 0, 0 }; + u32 tag = 0; + u32 dirty = 0; + u32 val = 0, mask = 0; + + of_property_read_u32(np, "arm,tag-latency", &tag); + if (tag) { + mask |= L2X0_AUX_CTRL_TAG_LATENCY_MASK; + val |= (tag - 1) << L2X0_AUX_CTRL_TAG_LATENCY_SHIFT; + } + + of_property_read_u32_array(np, "arm,data-latency", + data, ARRAY_SIZE(data)); + if (data[0] && data[1]) { + mask |= L2X0_AUX_CTRL_DATA_RD_LATENCY_MASK | + L2X0_AUX_CTRL_DATA_WR_LATENCY_MASK; + val |= ((data[0] - 1) << L2X0_AUX_CTRL_DATA_RD_LATENCY_SHIFT) | + ((data[1] - 1) << L2X0_AUX_CTRL_DATA_WR_LATENCY_SHIFT); + } + + of_property_read_u32(np, "arm,dirty-latency", &dirty); + if (dirty) { + mask |= L2X0_AUX_CTRL_DIRTY_LATENCY_MASK; + val |= (dirty - 1) << L2X0_AUX_CTRL_DIRTY_LATENCY_SHIFT; + } + + *aux_val &= ~mask; + *aux_val |= val; + *aux_mask &= ~mask; +} + +static void __init pl310_of_setup(const struct device_node *np, + __u32 *aux_val, __u32 *aux_mask) +{ + u32 data[3] = { 0, 0, 0 }; + u32 tag[3] = { 0, 0, 0 }; + u32 filter[2] = { 0, 0 }; + + of_property_read_u32_array(np, "arm,tag-latency", tag, ARRAY_SIZE(tag)); + if (tag[0] && tag[1] && tag[2]) + writel_relaxed( + ((tag[0] - 1) << L2X0_LATENCY_CTRL_RD_SHIFT) | + ((tag[1] - 1) << L2X0_LATENCY_CTRL_WR_SHIFT) | + ((tag[2] - 1) << L2X0_LATENCY_CTRL_SETUP_SHIFT), + l2x0_base + L2X0_TAG_LATENCY_CTRL); + + of_property_read_u32_array(np, "arm,data-latency", + data, ARRAY_SIZE(data)); + if (data[0] && data[1] && data[2]) + writel_relaxed( + ((data[0] - 1) << L2X0_LATENCY_CTRL_RD_SHIFT) | + ((data[1] - 1) << L2X0_LATENCY_CTRL_WR_SHIFT) | + ((data[2] - 1) << L2X0_LATENCY_CTRL_SETUP_SHIFT), + l2x0_base + L2X0_DATA_LATENCY_CTRL); + + of_property_read_u32_array(np, "arm,filter-ranges", + filter, ARRAY_SIZE(filter)); + if (filter[0] && filter[1]) { + writel_relaxed(ALIGN(filter[0] + filter[1], SZ_1M), + l2x0_base + L2X0_ADDR_FILTER_END); + writel_relaxed((filter[0] & ~(SZ_1M - 1)) | L2X0_ADDR_FILTER_EN, + l2x0_base + L2X0_ADDR_FILTER_START); + } +} + +static const struct of_device_id l2x0_ids[] __initconst = { + { .compatible = "arm,pl310-cache", .data = pl310_of_setup }, + { .compatible = "arm,l220-cache", .data = l2x0_of_setup }, + { .compatible = "arm,l210-cache", .data = l2x0_of_setup }, + {} +}; + +int __init l2x0_of_init(__u32 aux_val, __u32 aux_mask) +{ + struct device_node *np; + void (*l2_setup)(const struct device_node *np, + __u32 *aux_val, __u32 *aux_mask); + + np = of_find_matching_node(NULL, l2x0_ids); + if (!np) + return -ENODEV; + l2x0_base = of_iomap(np, 0); + if (!l2x0_base) + return -ENOMEM; + + /* L2 configuration can only be changed if the cache is disabled */ + if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) { + l2_setup = of_match_node(l2x0_ids, np)->data; + if (l2_setup) + l2_setup(np, &aux_val, &aux_mask); + } + l2x0_init(l2x0_base, aux_val, aux_mask); + return 0; +} +#endif -- cgit v1.2.3 From 1caf30924f71ae16a26aa59b02a6401f467bf1c8 Mon Sep 17 00:00:00 2001 From: Barry Song <21cnbao@gmail.com> Date: Fri, 9 Sep 2011 10:30:34 +0100 Subject: ARM: 7089/1: L2X0: add explicit cpu_relax() for busy wait loop using cpu_relax in busy loops is a well-known idiom in the kernel. It's more for documentation purposes than technically needed here. Signed-off-by: Barry Song Acked-by: Arnd Bergmann Reviewed-by: Jamie Iles Signed-off-by: Russell King --- arch/arm/mm/cache-l2x0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index db4484f5bf98..a78044885ed5 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -37,7 +37,7 @@ static inline void cache_wait_way(void __iomem *reg, unsigned long mask) { /* wait for cache operation by line or way to complete */ while (readl_relaxed(reg) & mask) - ; + cpu_relax(); } #ifdef CONFIG_CACHE_PL310 -- cgit v1.2.3 From 74d41f39a9c161cd0434bb13d929d75fc7be75bd Mon Sep 17 00:00:00 2001 From: Barry Song <21cnbao@gmail.com> Date: Wed, 14 Sep 2011 03:20:01 +0100 Subject: ARM: 7090/1: CACHE-L2X0: filter start address can be 0 and is often 0 this patch fixes the error in Rob Herring's ARM: 7009/1: l2x0: Add OF based initialization http://www.spinics.net/lists/arm-kernel/msg131123.html it has been in rmk/for-next with commit 41c86ff5b Cc: Shawn Guo Cc: Arnd Bergmann Signed-off-by: Barry Song Acked-by: Rob Herring Signed-off-by: Russell King --- arch/arm/mm/cache-l2x0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index a78044885ed5..0d85d221d7b0 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -437,7 +437,7 @@ static void __init pl310_of_setup(const struct device_node *np, of_property_read_u32_array(np, "arm,filter-ranges", filter, ARRAY_SIZE(filter)); - if (filter[0] && filter[1]) { + if (filter[1]) { writel_relaxed(ALIGN(filter[0] + filter[1], SZ_1M), l2x0_base + L2X0_ADDR_FILTER_END); writel_relaxed((filter[0] & ~(SZ_1M - 1)) | L2X0_ADDR_FILTER_EN, -- cgit v1.2.3 From 91c2ebb90b1890abc648ba9dec5608cbc97e1cb9 Mon Sep 17 00:00:00 2001 From: Barry Song Date: Fri, 30 Sep 2011 14:43:12 +0100 Subject: ARM: 7114/1: cache-l2x0: add resume entry for l2 in secure mode we save the l2x0 registers at the first initialization, and platform codes can get them to restore l2x0 status after wakeup. Cc: Lorenzo Pieralisi Signed-off-by: Barry Song Reviewed-by: Santosh Shilimkar Tested-by: Shawn Guo Signed-off-by: Russell King --- arch/arm/include/asm/hardware/cache-l2x0.h | 25 ++++++ arch/arm/include/asm/outercache.h | 7 ++ arch/arm/kernel/asm-offsets.c | 12 +++ arch/arm/mm/cache-l2x0.c | 129 ++++++++++++++++++++++++++--- 4 files changed, 163 insertions(+), 10 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h index c48cb1e1c46c..434edccdf7f3 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h @@ -67,6 +67,13 @@ #define L2X0_CACHE_ID_PART_MASK (0xf << 6) #define L2X0_CACHE_ID_PART_L210 (1 << 6) #define L2X0_CACHE_ID_PART_L310 (3 << 6) +#define L2X0_CACHE_ID_RTL_MASK 0x3f +#define L2X0_CACHE_ID_RTL_R0P0 0x0 +#define L2X0_CACHE_ID_RTL_R1P0 0x2 +#define L2X0_CACHE_ID_RTL_R2P0 0x4 +#define L2X0_CACHE_ID_RTL_R3P0 0x5 +#define L2X0_CACHE_ID_RTL_R3P1 0x6 +#define L2X0_CACHE_ID_RTL_R3P2 0x8 #define L2X0_AUX_CTRL_MASK 0xc0000fff #define L2X0_AUX_CTRL_DATA_RD_LATENCY_SHIFT 0 @@ -96,6 +103,24 @@ #ifndef __ASSEMBLY__ extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); extern int l2x0_of_init(__u32 aux_val, __u32 aux_mask); + +struct l2x0_regs { + unsigned long phy_base; + unsigned long aux_ctrl; + /* + * Whether the following registers need to be saved/restored + * depends on platform + */ + unsigned long tag_latency; + unsigned long data_latency; + unsigned long filter_start; + unsigned long filter_end; + unsigned long prefetch_ctrl; + unsigned long pwr_ctrl; +}; + +extern struct l2x0_regs l2x0_saved_regs; + #endif #endif diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h index d8387437ec5a..53426c66352a 100644 --- a/arch/arm/include/asm/outercache.h +++ b/arch/arm/include/asm/outercache.h @@ -34,6 +34,7 @@ struct outer_cache_fns { void (*sync)(void); #endif void (*set_debug)(unsigned long); + void (*resume)(void); }; #ifdef CONFIG_OUTER_CACHE @@ -74,6 +75,12 @@ static inline void outer_disable(void) outer_cache.disable(); } +static inline void outer_resume(void) +{ + if (outer_cache.resume) + outer_cache.resume(); +} + #else static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c index 16baba2e4369..1429d8989fb9 100644 --- a/arch/arm/kernel/asm-offsets.c +++ b/arch/arm/kernel/asm-offsets.c @@ -20,6 +20,7 @@ #include #include #include +#include #include /* @@ -92,6 +93,17 @@ int main(void) DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0)); DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs)); BLANK(); +#ifdef CONFIG_CACHE_L2X0 + DEFINE(L2X0_R_PHY_BASE, offsetof(struct l2x0_regs, phy_base)); + DEFINE(L2X0_R_AUX_CTRL, offsetof(struct l2x0_regs, aux_ctrl)); + DEFINE(L2X0_R_TAG_LATENCY, offsetof(struct l2x0_regs, tag_latency)); + DEFINE(L2X0_R_DATA_LATENCY, offsetof(struct l2x0_regs, data_latency)); + DEFINE(L2X0_R_FILTER_START, offsetof(struct l2x0_regs, filter_start)); + DEFINE(L2X0_R_FILTER_END, offsetof(struct l2x0_regs, filter_end)); + DEFINE(L2X0_R_PREFETCH_CTRL, offsetof(struct l2x0_regs, prefetch_ctrl)); + DEFINE(L2X0_R_PWR_CTRL, offsetof(struct l2x0_regs, pwr_ctrl)); + BLANK(); +#endif #ifdef CONFIG_CPU_HAS_ASID DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id)); BLANK(); diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 0d85d221d7b0..3f9b9980478e 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -33,6 +33,14 @@ static DEFINE_SPINLOCK(l2x0_lock); static uint32_t l2x0_way_mask; /* Bitmask of active ways */ static uint32_t l2x0_size; +struct l2x0_regs l2x0_saved_regs; + +struct l2x0_of_data { + void (*setup)(const struct device_node *, __u32 *, __u32 *); + void (*save)(void); + void (*resume)(void); +}; + static inline void cache_wait_way(void __iomem *reg, unsigned long mask) { /* wait for cache operation by line or way to complete */ @@ -280,7 +288,7 @@ static void l2x0_disable(void) spin_unlock_irqrestore(&l2x0_lock, flags); } -static void __init l2x0_unlock(__u32 cache_id) +static void l2x0_unlock(__u32 cache_id) { int lockregs; int i; @@ -356,6 +364,8 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) /* l2x0 controller is disabled */ writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL); + l2x0_saved_regs.aux_ctrl = aux; + l2x0_inv_all(); /* enable L2X0 */ @@ -445,33 +455,132 @@ static void __init pl310_of_setup(const struct device_node *np, } } +static void __init pl310_save(void) +{ + u32 l2x0_revision = readl_relaxed(l2x0_base + L2X0_CACHE_ID) & + L2X0_CACHE_ID_RTL_MASK; + + l2x0_saved_regs.tag_latency = readl_relaxed(l2x0_base + + L2X0_TAG_LATENCY_CTRL); + l2x0_saved_regs.data_latency = readl_relaxed(l2x0_base + + L2X0_DATA_LATENCY_CTRL); + l2x0_saved_regs.filter_end = readl_relaxed(l2x0_base + + L2X0_ADDR_FILTER_END); + l2x0_saved_regs.filter_start = readl_relaxed(l2x0_base + + L2X0_ADDR_FILTER_START); + + if (l2x0_revision >= L2X0_CACHE_ID_RTL_R2P0) { + /* + * From r2p0, there is Prefetch offset/control register + */ + l2x0_saved_regs.prefetch_ctrl = readl_relaxed(l2x0_base + + L2X0_PREFETCH_CTRL); + /* + * From r3p0, there is Power control register + */ + if (l2x0_revision >= L2X0_CACHE_ID_RTL_R3P0) + l2x0_saved_regs.pwr_ctrl = readl_relaxed(l2x0_base + + L2X0_POWER_CTRL); + } +} + +static void l2x0_resume(void) +{ + if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) { + /* restore aux ctrl and enable l2 */ + l2x0_unlock(readl_relaxed(l2x0_base + L2X0_CACHE_ID)); + + writel_relaxed(l2x0_saved_regs.aux_ctrl, l2x0_base + + L2X0_AUX_CTRL); + + l2x0_inv_all(); + + writel_relaxed(1, l2x0_base + L2X0_CTRL); + } +} + +static void pl310_resume(void) +{ + u32 l2x0_revision; + + if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) { + /* restore pl310 setup */ + writel_relaxed(l2x0_saved_regs.tag_latency, + l2x0_base + L2X0_TAG_LATENCY_CTRL); + writel_relaxed(l2x0_saved_regs.data_latency, + l2x0_base + L2X0_DATA_LATENCY_CTRL); + writel_relaxed(l2x0_saved_regs.filter_end, + l2x0_base + L2X0_ADDR_FILTER_END); + writel_relaxed(l2x0_saved_regs.filter_start, + l2x0_base + L2X0_ADDR_FILTER_START); + + l2x0_revision = readl_relaxed(l2x0_base + L2X0_CACHE_ID) & + L2X0_CACHE_ID_RTL_MASK; + + if (l2x0_revision >= L2X0_CACHE_ID_RTL_R2P0) { + writel_relaxed(l2x0_saved_regs.prefetch_ctrl, + l2x0_base + L2X0_PREFETCH_CTRL); + if (l2x0_revision >= L2X0_CACHE_ID_RTL_R3P0) + writel_relaxed(l2x0_saved_regs.pwr_ctrl, + l2x0_base + L2X0_POWER_CTRL); + } + } + + l2x0_resume(); +} + +static const struct l2x0_of_data pl310_data = { + pl310_of_setup, + pl310_save, + pl310_resume, +}; + +static const struct l2x0_of_data l2x0_data = { + l2x0_of_setup, + NULL, + l2x0_resume, +}; + static const struct of_device_id l2x0_ids[] __initconst = { - { .compatible = "arm,pl310-cache", .data = pl310_of_setup }, - { .compatible = "arm,l220-cache", .data = l2x0_of_setup }, - { .compatible = "arm,l210-cache", .data = l2x0_of_setup }, + { .compatible = "arm,pl310-cache", .data = (void *)&pl310_data }, + { .compatible = "arm,l220-cache", .data = (void *)&l2x0_data }, + { .compatible = "arm,l210-cache", .data = (void *)&l2x0_data }, {} }; int __init l2x0_of_init(__u32 aux_val, __u32 aux_mask) { struct device_node *np; - void (*l2_setup)(const struct device_node *np, - __u32 *aux_val, __u32 *aux_mask); + struct l2x0_of_data *data; + struct resource res; np = of_find_matching_node(NULL, l2x0_ids); if (!np) return -ENODEV; - l2x0_base = of_iomap(np, 0); + + if (of_address_to_resource(np, 0, &res)) + return -ENODEV; + + l2x0_base = ioremap(res.start, resource_size(&res)); if (!l2x0_base) return -ENOMEM; + l2x0_saved_regs.phy_base = res.start; + + data = of_match_node(l2x0_ids, np)->data; + /* L2 configuration can only be changed if the cache is disabled */ if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) { - l2_setup = of_match_node(l2x0_ids, np)->data; - if (l2_setup) - l2_setup(np, &aux_val, &aux_mask); + if (data->setup) + data->setup(np, &aux_val, &aux_mask); } + + if (data->save) + data->save(); + l2x0_init(l2x0_base, aux_val, aux_mask); + + outer_cache.resume = data->resume; return 0; } #endif -- cgit v1.2.3 From 3f8e288033ec7f52b570efad7c2eb42741f6d710 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Tue, 26 Jul 2011 18:45:54 +0100 Subject: ARM: 7006/1: Migrate to asm-generic wrapper support With d8ecc5c (kbuild: asm-generic support, 2011-04-27) we can remove a handful of asm-generic wrappers in ARM code. Since the generic version of sizes.h doesn't contain SZ_48M, we replace the 4 users of SZ_48M with the equivalent SZ_32M + SZ_16M. Signed-off-by: Stephen Boyd Cc: Imre Kaloz Acked-by: Krzysztof Halasa Cc: Eric Miao Signed-off-by: Russell King --- arch/arm/include/asm/Kbuild | 17 +++++++++++++++++ arch/arm/include/asm/auxvec.h | 4 ---- arch/arm/include/asm/bitsperlong.h | 1 - arch/arm/include/asm/cputime.h | 6 ------ arch/arm/include/asm/emergency-restart.h | 6 ------ arch/arm/include/asm/errno.h | 6 ------ arch/arm/include/asm/ioctl.h | 1 - arch/arm/include/asm/irq_regs.h | 1 - arch/arm/include/asm/kdebug.h | 1 - arch/arm/include/asm/local.h | 1 - arch/arm/include/asm/local64.h | 1 - arch/arm/include/asm/percpu.h | 6 ------ arch/arm/include/asm/poll.h | 1 - arch/arm/include/asm/resource.h | 6 ------ arch/arm/include/asm/sections.h | 1 - arch/arm/include/asm/siginfo.h | 6 ------ arch/arm/include/asm/sizes.h | 21 --------------------- arch/arm/mach-ixp4xx/common-pci.c | 3 ++- arch/arm/mach-mmp/aspenite.c | 2 +- arch/arm/mach-mmp/ttc_dkb.c | 2 +- arch/arm/mach-pxa/saar.c | 2 +- 21 files changed, 22 insertions(+), 73 deletions(-) delete mode 100644 arch/arm/include/asm/auxvec.h delete mode 100644 arch/arm/include/asm/bitsperlong.h delete mode 100644 arch/arm/include/asm/cputime.h delete mode 100644 arch/arm/include/asm/emergency-restart.h delete mode 100644 arch/arm/include/asm/errno.h delete mode 100644 arch/arm/include/asm/ioctl.h delete mode 100644 arch/arm/include/asm/irq_regs.h delete mode 100644 arch/arm/include/asm/kdebug.h delete mode 100644 arch/arm/include/asm/local.h delete mode 100644 arch/arm/include/asm/local64.h delete mode 100644 arch/arm/include/asm/percpu.h delete mode 100644 arch/arm/include/asm/poll.h delete mode 100644 arch/arm/include/asm/resource.h delete mode 100644 arch/arm/include/asm/sections.h delete mode 100644 arch/arm/include/asm/siginfo.h delete mode 100644 arch/arm/include/asm/sizes.h (limited to 'arch/arm') diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild index 6550db3aa5c7..960abceb8e14 100644 --- a/arch/arm/include/asm/Kbuild +++ b/arch/arm/include/asm/Kbuild @@ -1,3 +1,20 @@ include include/asm-generic/Kbuild.asm header-y += hwcap.h + +generic-y += auxvec.h +generic-y += bitsperlong.h +generic-y += cputime.h +generic-y += emergency-restart.h +generic-y += errno.h +generic-y += ioctl.h +generic-y += irq_regs.h +generic-y += kdebug.h +generic-y += local.h +generic-y += local64.h +generic-y += percpu.h +generic-y += poll.h +generic-y += resource.h +generic-y += sections.h +generic-y += siginfo.h +generic-y += sizes.h diff --git a/arch/arm/include/asm/auxvec.h b/arch/arm/include/asm/auxvec.h deleted file mode 100644 index c0536f6b29a7..000000000000 --- a/arch/arm/include/asm/auxvec.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __ASMARM_AUXVEC_H -#define __ASMARM_AUXVEC_H - -#endif diff --git a/arch/arm/include/asm/bitsperlong.h b/arch/arm/include/asm/bitsperlong.h deleted file mode 100644 index 6dc0bb0c13b2..000000000000 --- a/arch/arm/include/asm/bitsperlong.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/arm/include/asm/cputime.h b/arch/arm/include/asm/cputime.h deleted file mode 100644 index 3a8002a5fec7..000000000000 --- a/arch/arm/include/asm/cputime.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ARM_CPUTIME_H -#define __ARM_CPUTIME_H - -#include - -#endif /* __ARM_CPUTIME_H */ diff --git a/arch/arm/include/asm/emergency-restart.h b/arch/arm/include/asm/emergency-restart.h deleted file mode 100644 index 108d8c48e42e..000000000000 --- a/arch/arm/include/asm/emergency-restart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_EMERGENCY_RESTART_H -#define _ASM_EMERGENCY_RESTART_H - -#include - -#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/arch/arm/include/asm/errno.h b/arch/arm/include/asm/errno.h deleted file mode 100644 index 6e60f0612bb6..000000000000 --- a/arch/arm/include/asm/errno.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ARM_ERRNO_H -#define _ARM_ERRNO_H - -#include - -#endif diff --git a/arch/arm/include/asm/ioctl.h b/arch/arm/include/asm/ioctl.h deleted file mode 100644 index b279fe06dfe5..000000000000 --- a/arch/arm/include/asm/ioctl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/arm/include/asm/irq_regs.h b/arch/arm/include/asm/irq_regs.h deleted file mode 100644 index 3dd9c0b70270..000000000000 --- a/arch/arm/include/asm/irq_regs.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/arm/include/asm/kdebug.h b/arch/arm/include/asm/kdebug.h deleted file mode 100644 index 6ece1b037665..000000000000 --- a/arch/arm/include/asm/kdebug.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/arm/include/asm/local.h b/arch/arm/include/asm/local.h deleted file mode 100644 index c11c530f74d0..000000000000 --- a/arch/arm/include/asm/local.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/arm/include/asm/local64.h b/arch/arm/include/asm/local64.h deleted file mode 100644 index 36c93b5cc239..000000000000 --- a/arch/arm/include/asm/local64.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/arm/include/asm/percpu.h b/arch/arm/include/asm/percpu.h deleted file mode 100644 index b4e32d8ec072..000000000000 --- a/arch/arm/include/asm/percpu.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ARM_PERCPU -#define __ARM_PERCPU - -#include - -#endif diff --git a/arch/arm/include/asm/poll.h b/arch/arm/include/asm/poll.h deleted file mode 100644 index c98509d3149e..000000000000 --- a/arch/arm/include/asm/poll.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/arm/include/asm/resource.h b/arch/arm/include/asm/resource.h deleted file mode 100644 index 734b581b5b6a..000000000000 --- a/arch/arm/include/asm/resource.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ARM_RESOURCE_H -#define _ARM_RESOURCE_H - -#include - -#endif diff --git a/arch/arm/include/asm/sections.h b/arch/arm/include/asm/sections.h deleted file mode 100644 index 2b8c5160388f..000000000000 --- a/arch/arm/include/asm/sections.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/arm/include/asm/siginfo.h b/arch/arm/include/asm/siginfo.h deleted file mode 100644 index 5e21852e6039..000000000000 --- a/arch/arm/include/asm/siginfo.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASMARM_SIGINFO_H -#define _ASMARM_SIGINFO_H - -#include - -#endif diff --git a/arch/arm/include/asm/sizes.h b/arch/arm/include/asm/sizes.h deleted file mode 100644 index 154b89b81d3e..000000000000 --- a/arch/arm/include/asm/sizes.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -/* Size definitions - * Copyright (C) ARM Limited 1998. All rights reserved. - */ -#include - -#define SZ_48M (SZ_32M + SZ_16M) diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 2131832ee6ba..85245e48099c 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c @@ -397,7 +397,8 @@ void __init ixp4xx_pci_preinit(void) local_write_config(PCI_BASE_ADDRESS_0, 4, PHYS_OFFSET); local_write_config(PCI_BASE_ADDRESS_1, 4, PHYS_OFFSET + SZ_16M); local_write_config(PCI_BASE_ADDRESS_2, 4, PHYS_OFFSET + SZ_32M); - local_write_config(PCI_BASE_ADDRESS_3, 4, PHYS_OFFSET + SZ_48M); + local_write_config(PCI_BASE_ADDRESS_3, 4, + PHYS_OFFSET + SZ_32M + SZ_16M); /* * Enable CSR window at 64 MiB to allow PCI masters diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c index 06b5fa853c93..49c5d6d843d6 100644 --- a/arch/arm/mach-mmp/aspenite.c +++ b/arch/arm/mach-mmp/aspenite.c @@ -160,7 +160,7 @@ static struct mtd_partition aspenite_nand_partitions[] = { }, { .name = "filesystem", .offset = MTDPART_OFS_APPEND, - .size = SZ_48M, + .size = SZ_32M + SZ_16M, .mask_flags = 0, } }; diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c index 6bd37a27e5fc..176515a76989 100644 --- a/arch/arm/mach-mmp/ttc_dkb.c +++ b/arch/arm/mach-mmp/ttc_dkb.c @@ -93,7 +93,7 @@ static struct mtd_partition ttc_dkb_onenand_partitions[] = { }, { .name = "filesystem", .offset = MTDPART_OFS_APPEND, - .size = SZ_48M, + .size = SZ_32M + SZ_16M, .mask_flags = 0, } }; diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c index df4356e8acae..72001ec6e7b5 100644 --- a/arch/arm/mach-pxa/saar.c +++ b/arch/arm/mach-pxa/saar.c @@ -540,7 +540,7 @@ static struct mtd_partition saar_onenand_partitions[] = { }, { .name = "filesystem", .offset = MTDPART_OFS_APPEND, - .size = SZ_48M, + .size = SZ_32M + SZ_16M, .mask_flags = 0, } }; -- cgit v1.2.3 From 60aac93283823b44644c92d0803d821b9d2d987a Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 17 Aug 2011 14:22:11 +0100 Subject: ARM: 7020/1: Check for multiple zreladdrs Without CONFIG_AUTO_ZRELADDR being set the kernel needs a single zreladdr for building zImages. Bail out if we detect multiple zreladdrs without CONFIG_AUTO_ZRELADDR. Signed-off-by: Sascha Hauer Signed-off-by: Russell King --- arch/arm/boot/compressed/Makefile | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 0c74a6fab952..a53a333c255d 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -139,8 +139,16 @@ bad_syms=$$($(CROSS_COMPILE)nm $@ | sed -n 's/^.\{8\} [bc] \(.*\)/\1/p') && \ ( echo "following symbols must have non local/private scope:" >&2; \ echo "$$bad_syms" >&2; rm -f $@; false ) +check_for_multiple_zreladdr = \ +if [ $(words $(ZRELADDR)) -gt 1 -a "$(CONFIG_AUTO_ZRELADDR)" == "" ]; then \ + echo 'multiple zreladdrs: $(ZRELADDR)'; \ + echo 'This needs CONFIG_AUTO_ZRELADDR to be set'; \ + false; \ +fi + $(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \ $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) FORCE + @$(check_for_multiple_zreladdr) $(call if_changed,ld) @$(check_for_bad_syms) -- cgit v1.2.3 From cd227fbffa9e971ee80065de772d3201c73e1670 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 17 Aug 2011 14:23:46 +0100 Subject: ARM: 7021/1: Check for multiple load addresses before building a uImage uImages need a load address specified. This makes them incompatible with multiple zreladdrs. Catch this error before building an uImage so that we do not end up with broken uImages. The load address can still be specified with LOADADDR= on the command line. Signed-off-by: Sascha Hauer Signed-off-by: Russell King --- arch/arm/boot/Makefile | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile index a1edfd5a129a..176062ac7f07 100644 --- a/arch/arm/boot/Makefile +++ b/arch/arm/boot/Makefile @@ -78,7 +78,16 @@ endif $(obj)/uImage: STARTADDR=$(LOADADDR) +check_for_multiple_loadaddr = \ +if [ $(words $(LOADADDR)) -gt 1 ]; then \ + echo 'multiple load addresses: $(LOADADDR)'; \ + echo 'This is incompatible with uImages'; \ + echo 'Specify LOADADDR on the commandline to build an uImage'; \ + false; \ +fi + $(obj)/uImage: $(obj)/zImage FORCE + @$(check_for_multiple_loadaddr) $(call if_changed,uimage) @echo ' Image $@ is ready' -- cgit v1.2.3 From 40c6d8aee40e373db75e6b0b4230fc8e8259d7a6 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 17 Aug 2011 14:24:52 +0100 Subject: ARM: 7022/1: allow to detect conflicting zreladdrs Boards used to specify zreladdr in their Makefile.boot with zreladdr-y := x, so conflicting zreladdrs were silently overwritten. This patch changes this to zreladdr-y += x, so that we end up with multiple words in zreladdr in such a case. We can detect this later and complain if necessary. Signed-off-by: Sascha Hauer Signed-off-by: Russell King --- arch/arm/mach-at91/Makefile.boot | 6 +++--- arch/arm/mach-bcmring/Makefile.boot | 2 +- arch/arm/mach-clps711x/Makefile.boot | 2 +- arch/arm/mach-cns3xxx/Makefile.boot | 2 +- arch/arm/mach-davinci/Makefile.boot | 4 ++-- arch/arm/mach-dove/Makefile.boot | 2 +- arch/arm/mach-ebsa110/Makefile.boot | 2 +- arch/arm/mach-ep93xx/Makefile.boot | 10 +++++----- arch/arm/mach-exynos4/Makefile.boot | 2 +- arch/arm/mach-footbridge/Makefile.boot | 2 +- arch/arm/mach-gemini/Makefile.boot | 4 ++-- arch/arm/mach-h720x/Makefile.boot | 2 +- arch/arm/mach-imx/Makefile.boot | 10 +++++----- arch/arm/mach-integrator/Makefile.boot | 2 +- arch/arm/mach-iop13xx/Makefile.boot | 2 +- arch/arm/mach-iop32x/Makefile.boot | 2 +- arch/arm/mach-iop33x/Makefile.boot | 2 +- arch/arm/mach-ixp2000/Makefile.boot | 2 +- arch/arm/mach-ixp23xx/Makefile.boot | 2 +- arch/arm/mach-ixp4xx/Makefile.boot | 2 +- arch/arm/mach-kirkwood/Makefile.boot | 2 +- arch/arm/mach-ks8695/Makefile.boot | 2 +- arch/arm/mach-lpc32xx/Makefile.boot | 2 +- arch/arm/mach-mmp/Makefile.boot | 2 +- arch/arm/mach-msm/Makefile.boot | 2 +- arch/arm/mach-mv78xx0/Makefile.boot | 2 +- arch/arm/mach-mx5/Makefile.boot | 6 +++--- arch/arm/mach-mxs/Makefile.boot | 2 +- arch/arm/mach-netx/Makefile.boot | 2 +- arch/arm/mach-nomadik/Makefile.boot | 2 +- arch/arm/mach-nuc93x/Makefile.boot | 2 +- arch/arm/mach-omap1/Makefile.boot | 2 +- arch/arm/mach-omap2/Makefile.boot | 2 +- arch/arm/mach-orion5x/Makefile.boot | 2 +- arch/arm/mach-pnx4008/Makefile.boot | 2 +- arch/arm/mach-prima2/Makefile.boot | 2 +- arch/arm/mach-pxa/Makefile.boot | 2 +- arch/arm/mach-realview/Makefile.boot | 4 ++-- arch/arm/mach-rpc/Makefile.boot | 2 +- arch/arm/mach-s3c2410/Makefile.boot | 4 ++-- arch/arm/mach-s3c64xx/Makefile.boot | 2 +- arch/arm/mach-s5p64x0/Makefile.boot | 2 +- arch/arm/mach-s5pc100/Makefile.boot | 2 +- arch/arm/mach-s5pv210/Makefile.boot | 2 +- arch/arm/mach-sa1100/Makefile.boot | 5 +++-- arch/arm/mach-shark/Makefile.boot | 2 +- arch/arm/mach-shmobile/Makefile.boot | 2 +- arch/arm/mach-spear3xx/Makefile.boot | 2 +- arch/arm/mach-spear6xx/Makefile.boot | 2 +- arch/arm/mach-tcc8k/Makefile.boot | 2 +- arch/arm/mach-tegra/Makefile.boot | 2 +- arch/arm/mach-u300/Makefile.boot | 4 ++-- arch/arm/mach-ux500/Makefile.boot | 2 +- arch/arm/mach-versatile/Makefile.boot | 2 +- arch/arm/mach-vexpress/Makefile.boot | 2 +- arch/arm/mach-vt8500/Makefile.boot | 2 +- arch/arm/mach-w90x900/Makefile.boot | 2 +- arch/arm/mach-zynq/Makefile.boot | 2 +- 58 files changed, 77 insertions(+), 76 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot index 3462b815054a..9ab5a3e5f4f1 100644 --- a/arch/arm/mach-at91/Makefile.boot +++ b/arch/arm/mach-at91/Makefile.boot @@ -4,15 +4,15 @@ # INITRD_PHYS must be in RAM ifeq ($(CONFIG_ARCH_AT91CAP9),y) - zreladdr-y := 0x70008000 + zreladdr-y += 0x70008000 params_phys-y := 0x70000100 initrd_phys-y := 0x70410000 else ifeq ($(CONFIG_ARCH_AT91SAM9G45),y) - zreladdr-y := 0x70008000 + zreladdr-y += 0x70008000 params_phys-y := 0x70000100 initrd_phys-y := 0x70410000 else - zreladdr-y := 0x20008000 + zreladdr-y += 0x20008000 params_phys-y := 0x20000100 initrd_phys-y := 0x20410000 endif diff --git a/arch/arm/mach-bcmring/Makefile.boot b/arch/arm/mach-bcmring/Makefile.boot index fb53b283bebb..aef2467757fa 100644 --- a/arch/arm/mach-bcmring/Makefile.boot +++ b/arch/arm/mach-bcmring/Makefile.boot @@ -1,6 +1,6 @@ # Address where decompressor will be written and eventually executed. # # default to SDRAM -zreladdr-y := $(CONFIG_BCM_ZRELADDR) +zreladdr-y += $(CONFIG_BCM_ZRELADDR) params_phys-y := 0x00000800 diff --git a/arch/arm/mach-clps711x/Makefile.boot b/arch/arm/mach-clps711x/Makefile.boot index a51fcef64fe0..9398e859b5af 100644 --- a/arch/arm/mach-clps711x/Makefile.boot +++ b/arch/arm/mach-clps711x/Makefile.boot @@ -1,5 +1,5 @@ # The standard locations for stuff on CLPS711x type processors - zreladdr-y := 0xc0028000 + zreladdr-y += 0xc0028000 params_phys-y := 0xc0000100 # Should probably have some agreement on these... initrd_phys-$(CONFIG_ARCH_P720T) := 0xc0400000 diff --git a/arch/arm/mach-cns3xxx/Makefile.boot b/arch/arm/mach-cns3xxx/Makefile.boot index 777012865220..d079de0b6e3b 100644 --- a/arch/arm/mach-cns3xxx/Makefile.boot +++ b/arch/arm/mach-cns3xxx/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00C00000 diff --git a/arch/arm/mach-davinci/Makefile.boot b/arch/arm/mach-davinci/Makefile.boot index db97ef2c6477..04a6c4e67b14 100644 --- a/arch/arm/mach-davinci/Makefile.boot +++ b/arch/arm/mach-davinci/Makefile.boot @@ -2,12 +2,12 @@ ifeq ($(CONFIG_ARCH_DAVINCI_DA8XX),y) ifeq ($(CONFIG_ARCH_DAVINCI_DMx),y) $(error Cannot enable DaVinci and DA8XX platforms concurrently) else - zreladdr-y := 0xc0008000 + zreladdr-y += 0xc0008000 params_phys-y := 0xc0000100 initrd_phys-y := 0xc0800000 endif else - zreladdr-y := 0x80008000 + zreladdr-y += 0x80008000 params_phys-y := 0x80000100 initrd_phys-y := 0x80800000 endif diff --git a/arch/arm/mach-dove/Makefile.boot b/arch/arm/mach-dove/Makefile.boot index 67039c3e0c48..760a0efe7580 100644 --- a/arch/arm/mach-dove/Makefile.boot +++ b/arch/arm/mach-dove/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-ebsa110/Makefile.boot b/arch/arm/mach-ebsa110/Makefile.boot index 232126044935..83cf07c38ada 100644 --- a/arch/arm/mach-ebsa110/Makefile.boot +++ b/arch/arm/mach-ebsa110/Makefile.boot @@ -1,4 +1,4 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000400 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-ep93xx/Makefile.boot b/arch/arm/mach-ep93xx/Makefile.boot index 0ad33f15c622..d3113a71cb40 100644 --- a/arch/arm/mach-ep93xx/Makefile.boot +++ b/arch/arm/mach-ep93xx/Makefile.boot @@ -1,14 +1,14 @@ - zreladdr-$(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET) := 0x00008000 + zreladdr-$(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET) += 0x00008000 params_phys-$(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET) := 0x00000100 - zreladdr-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0008000 + zreladdr-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) += 0xc0008000 params_phys-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0000100 - zreladdr-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) := 0xd0008000 + zreladdr-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) += 0xd0008000 params_phys-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) := 0xd0000100 - zreladdr-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) := 0xe0008000 + zreladdr-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) += 0xe0008000 params_phys-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) := 0xe0000100 - zreladdr-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) := 0xf0008000 + zreladdr-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) += 0xf0008000 params_phys-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) := 0xf0000100 diff --git a/arch/arm/mach-exynos4/Makefile.boot b/arch/arm/mach-exynos4/Makefile.boot index d65956ffb43d..b9862e22bf10 100644 --- a/arch/arm/mach-exynos4/Makefile.boot +++ b/arch/arm/mach-exynos4/Makefile.boot @@ -1,2 +1,2 @@ - zreladdr-y := 0x40008000 + zreladdr-y += 0x40008000 params_phys-y := 0x40000100 diff --git a/arch/arm/mach-footbridge/Makefile.boot b/arch/arm/mach-footbridge/Makefile.boot index c7e75acfe6c9..ff0a4b5b0a82 100644 --- a/arch/arm/mach-footbridge/Makefile.boot +++ b/arch/arm/mach-footbridge/Makefile.boot @@ -1,4 +1,4 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-gemini/Makefile.boot b/arch/arm/mach-gemini/Makefile.boot index 22a52c228d93..683f52b20e3d 100644 --- a/arch/arm/mach-gemini/Makefile.boot +++ b/arch/arm/mach-gemini/Makefile.boot @@ -1,9 +1,9 @@ ifeq ($(CONFIG_GEMINI_MEM_SWAP),y) - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 else - zreladdr-y := 0x10008000 + zreladdr-y += 0x10008000 params_phys-y := 0x10000100 initrd_phys-y := 0x10800000 endif diff --git a/arch/arm/mach-h720x/Makefile.boot b/arch/arm/mach-h720x/Makefile.boot index 52984017bd91..d875a7094dfe 100644 --- a/arch/arm/mach-h720x/Makefile.boot +++ b/arch/arm/mach-h720x/Makefile.boot @@ -1,2 +1,2 @@ - zreladdr-$(CONFIG_ARCH_H720X) := 0x40008000 + zreladdr-$(CONFIG_ARCH_H720X) += 0x40008000 diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot index ebee18b3884c..dbe61201bcd8 100644 --- a/arch/arm/mach-imx/Makefile.boot +++ b/arch/arm/mach-imx/Makefile.boot @@ -1,19 +1,19 @@ -zreladdr-$(CONFIG_ARCH_MX1) := 0x08008000 +zreladdr-$(CONFIG_ARCH_MX1) += 0x08008000 params_phys-$(CONFIG_ARCH_MX1) := 0x08000100 initrd_phys-$(CONFIG_ARCH_MX1) := 0x08800000 -zreladdr-$(CONFIG_MACH_MX21) := 0xC0008000 +zreladdr-$(CONFIG_MACH_MX21) += 0xC0008000 params_phys-$(CONFIG_MACH_MX21) := 0xC0000100 initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000 -zreladdr-$(CONFIG_ARCH_MX25) := 0x80008000 +zreladdr-$(CONFIG_ARCH_MX25) += 0x80008000 params_phys-$(CONFIG_ARCH_MX25) := 0x80000100 initrd_phys-$(CONFIG_ARCH_MX25) := 0x80800000 -zreladdr-$(CONFIG_MACH_MX27) := 0xA0008000 +zreladdr-$(CONFIG_MACH_MX27) += 0xA0008000 params_phys-$(CONFIG_MACH_MX27) := 0xA0000100 initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 -zreladdr-$(CONFIG_ARCH_MX3) := 0x80008000 +zreladdr-$(CONFIG_ARCH_MX3) += 0x80008000 params_phys-$(CONFIG_ARCH_MX3) := 0x80000100 initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000 diff --git a/arch/arm/mach-integrator/Makefile.boot b/arch/arm/mach-integrator/Makefile.boot index c7e75acfe6c9..ff0a4b5b0a82 100644 --- a/arch/arm/mach-integrator/Makefile.boot +++ b/arch/arm/mach-integrator/Makefile.boot @@ -1,4 +1,4 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-iop13xx/Makefile.boot b/arch/arm/mach-iop13xx/Makefile.boot index 0b0e19fdfe6c..3a8c38c3189c 100644 --- a/arch/arm/mach-iop13xx/Makefile.boot +++ b/arch/arm/mach-iop13xx/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-iop32x/Makefile.boot b/arch/arm/mach-iop32x/Makefile.boot index 47000dccd61f..0a833b11e38c 100644 --- a/arch/arm/mach-iop32x/Makefile.boot +++ b/arch/arm/mach-iop32x/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0xa0008000 + zreladdr-y += 0xa0008000 params_phys-y := 0xa0000100 initrd_phys-y := 0xa0800000 diff --git a/arch/arm/mach-iop33x/Makefile.boot b/arch/arm/mach-iop33x/Makefile.boot index 67039c3e0c48..760a0efe7580 100644 --- a/arch/arm/mach-iop33x/Makefile.boot +++ b/arch/arm/mach-iop33x/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-ixp2000/Makefile.boot b/arch/arm/mach-ixp2000/Makefile.boot index d84c5807a43d..9c7af91d93da 100644 --- a/arch/arm/mach-ixp2000/Makefile.boot +++ b/arch/arm/mach-ixp2000/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 diff --git a/arch/arm/mach-ixp23xx/Makefile.boot b/arch/arm/mach-ixp23xx/Makefile.boot index d5561ad15bad..44fb4a717c3f 100644 --- a/arch/arm/mach-ixp23xx/Makefile.boot +++ b/arch/arm/mach-ixp23xx/Makefile.boot @@ -1,2 +1,2 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 diff --git a/arch/arm/mach-ixp4xx/Makefile.boot b/arch/arm/mach-ixp4xx/Makefile.boot index d84c5807a43d..9c7af91d93da 100644 --- a/arch/arm/mach-ixp4xx/Makefile.boot +++ b/arch/arm/mach-ixp4xx/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 diff --git a/arch/arm/mach-kirkwood/Makefile.boot b/arch/arm/mach-kirkwood/Makefile.boot index 67039c3e0c48..760a0efe7580 100644 --- a/arch/arm/mach-kirkwood/Makefile.boot +++ b/arch/arm/mach-kirkwood/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-ks8695/Makefile.boot b/arch/arm/mach-ks8695/Makefile.boot index 48eb2cb3ac77..c9b0bebcf237 100644 --- a/arch/arm/mach-ks8695/Makefile.boot +++ b/arch/arm/mach-ks8695/Makefile.boot @@ -3,6 +3,6 @@ # PARAMS_PHYS must be within 4MB of ZRELADDR # INITRD_PHYS must be in RAM - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-lpc32xx/Makefile.boot b/arch/arm/mach-lpc32xx/Makefile.boot index b796b41ebf8f..2cfe0ee635c5 100644 --- a/arch/arm/mach-lpc32xx/Makefile.boot +++ b/arch/arm/mach-lpc32xx/Makefile.boot @@ -1,4 +1,4 @@ - zreladdr-y := 0x80008000 + zreladdr-y += 0x80008000 params_phys-y := 0x80000100 initrd_phys-y := 0x82000000 diff --git a/arch/arm/mach-mmp/Makefile.boot b/arch/arm/mach-mmp/Makefile.boot index 574a4aa8321a..5edf03e2beed 100644 --- a/arch/arm/mach-mmp/Makefile.boot +++ b/arch/arm/mach-mmp/Makefile.boot @@ -1 +1 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot index 24dfbf8c07c4..9b803a578b4d 100644 --- a/arch/arm/mach-msm/Makefile.boot +++ b/arch/arm/mach-msm/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x10008000 + zreladdr-y += 0x10008000 params_phys-y := 0x10000100 initrd_phys-y := 0x10800000 diff --git a/arch/arm/mach-mv78xx0/Makefile.boot b/arch/arm/mach-mv78xx0/Makefile.boot index 67039c3e0c48..760a0efe7580 100644 --- a/arch/arm/mach-mv78xx0/Makefile.boot +++ b/arch/arm/mach-mv78xx0/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-mx5/Makefile.boot b/arch/arm/mach-mx5/Makefile.boot index e928be1b6757..ca207ca305ec 100644 --- a/arch/arm/mach-mx5/Makefile.boot +++ b/arch/arm/mach-mx5/Makefile.boot @@ -1,9 +1,9 @@ - zreladdr-$(CONFIG_ARCH_MX50) := 0x70008000 + zreladdr-$(CONFIG_ARCH_MX50) += 0x70008000 params_phys-$(CONFIG_ARCH_MX50) := 0x70000100 initrd_phys-$(CONFIG_ARCH_MX50) := 0x70800000 - zreladdr-$(CONFIG_ARCH_MX51) := 0x90008000 + zreladdr-$(CONFIG_ARCH_MX51) += 0x90008000 params_phys-$(CONFIG_ARCH_MX51) := 0x90000100 initrd_phys-$(CONFIG_ARCH_MX51) := 0x90800000 - zreladdr-$(CONFIG_ARCH_MX53) := 0x70008000 + zreladdr-$(CONFIG_ARCH_MX53) += 0x70008000 params_phys-$(CONFIG_ARCH_MX53) := 0x70000100 initrd_phys-$(CONFIG_ARCH_MX53) := 0x70800000 diff --git a/arch/arm/mach-mxs/Makefile.boot b/arch/arm/mach-mxs/Makefile.boot index eb541e0291da..07b11fe6453f 100644 --- a/arch/arm/mach-mxs/Makefile.boot +++ b/arch/arm/mach-mxs/Makefile.boot @@ -1 +1 @@ -zreladdr-y := 0x40008000 +zreladdr-y += 0x40008000 diff --git a/arch/arm/mach-netx/Makefile.boot b/arch/arm/mach-netx/Makefile.boot index b81cf6aff0ac..534a4d27055e 100644 --- a/arch/arm/mach-netx/Makefile.boot +++ b/arch/arm/mach-netx/Makefile.boot @@ -1,2 +1,2 @@ - zreladdr-y := 0x80008000 + zreladdr-y += 0x80008000 diff --git a/arch/arm/mach-nomadik/Makefile.boot b/arch/arm/mach-nomadik/Makefile.boot index c7e75acfe6c9..ff0a4b5b0a82 100644 --- a/arch/arm/mach-nomadik/Makefile.boot +++ b/arch/arm/mach-nomadik/Makefile.boot @@ -1,4 +1,4 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-nuc93x/Makefile.boot b/arch/arm/mach-nuc93x/Makefile.boot index a057b546b6e5..6c3d421c2d11 100644 --- a/arch/arm/mach-nuc93x/Makefile.boot +++ b/arch/arm/mach-nuc93x/Makefile.boot @@ -1,3 +1,3 @@ -zreladdr-y := 0x00008000 +zreladdr-y += 0x00008000 params_phys-y := 0x00000100 diff --git a/arch/arm/mach-omap1/Makefile.boot b/arch/arm/mach-omap1/Makefile.boot index 292d56c5a888..13bda8dbd604 100644 --- a/arch/arm/mach-omap1/Makefile.boot +++ b/arch/arm/mach-omap1/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x10008000 + zreladdr-y += 0x10008000 params_phys-y := 0x10000100 initrd_phys-y := 0x10800000 diff --git a/arch/arm/mach-omap2/Makefile.boot b/arch/arm/mach-omap2/Makefile.boot index 565aff7f37a9..b03e562acc60 100644 --- a/arch/arm/mach-omap2/Makefile.boot +++ b/arch/arm/mach-omap2/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x80008000 + zreladdr-y += 0x80008000 params_phys-y := 0x80000100 initrd_phys-y := 0x80800000 diff --git a/arch/arm/mach-orion5x/Makefile.boot b/arch/arm/mach-orion5x/Makefile.boot index 67039c3e0c48..760a0efe7580 100644 --- a/arch/arm/mach-orion5x/Makefile.boot +++ b/arch/arm/mach-orion5x/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-pnx4008/Makefile.boot b/arch/arm/mach-pnx4008/Makefile.boot index 44c7117e20dd..9fa19baa7f2e 100644 --- a/arch/arm/mach-pnx4008/Makefile.boot +++ b/arch/arm/mach-pnx4008/Makefile.boot @@ -1,4 +1,4 @@ - zreladdr-y := 0x80008000 + zreladdr-y += 0x80008000 params_phys-y := 0x80000100 initrd_phys-y := 0x80800000 diff --git a/arch/arm/mach-prima2/Makefile.boot b/arch/arm/mach-prima2/Makefile.boot index d023db3ae4ff..c77a4883a4ee 100644 --- a/arch/arm/mach-prima2/Makefile.boot +++ b/arch/arm/mach-prima2/Makefile.boot @@ -1,3 +1,3 @@ -zreladdr-y := 0x00008000 +zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-pxa/Makefile.boot b/arch/arm/mach-pxa/Makefile.boot index 1ead67178eca..2c1ae92f2106 100644 --- a/arch/arm/mach-pxa/Makefile.boot +++ b/arch/arm/mach-pxa/Makefile.boot @@ -1,2 +1,2 @@ - zreladdr-y := 0xa0008000 + zreladdr-y += 0xa0008000 diff --git a/arch/arm/mach-realview/Makefile.boot b/arch/arm/mach-realview/Makefile.boot index d97e003d3df4..d2c3d788f688 100644 --- a/arch/arm/mach-realview/Makefile.boot +++ b/arch/arm/mach-realview/Makefile.boot @@ -1,9 +1,9 @@ ifeq ($(CONFIG_REALVIEW_HIGH_PHYS_OFFSET),y) - zreladdr-y := 0x70008000 + zreladdr-y += 0x70008000 params_phys-y := 0x70000100 initrd_phys-y := 0x70800000 else - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 endif diff --git a/arch/arm/mach-rpc/Makefile.boot b/arch/arm/mach-rpc/Makefile.boot index 9c9e7685ec7c..ae2df0d7d037 100644 --- a/arch/arm/mach-rpc/Makefile.boot +++ b/arch/arm/mach-rpc/Makefile.boot @@ -1,4 +1,4 @@ - zreladdr-y := 0x10008000 + zreladdr-y += 0x10008000 params_phys-y := 0x10000100 initrd_phys-y := 0x18000000 diff --git a/arch/arm/mach-s3c2410/Makefile.boot b/arch/arm/mach-s3c2410/Makefile.boot index 58c1dd7f8e1d..4457605ba04a 100644 --- a/arch/arm/mach-s3c2410/Makefile.boot +++ b/arch/arm/mach-s3c2410/Makefile.boot @@ -1,7 +1,7 @@ ifeq ($(CONFIG_PM_H1940),y) - zreladdr-y := 0x30108000 + zreladdr-y += 0x30108000 params_phys-y := 0x30100100 else - zreladdr-y := 0x30008000 + zreladdr-y += 0x30008000 params_phys-y := 0x30000100 endif diff --git a/arch/arm/mach-s3c64xx/Makefile.boot b/arch/arm/mach-s3c64xx/Makefile.boot index ba41fdc0a586..c642333af3ed 100644 --- a/arch/arm/mach-s3c64xx/Makefile.boot +++ b/arch/arm/mach-s3c64xx/Makefile.boot @@ -1,2 +1,2 @@ - zreladdr-y := 0x50008000 + zreladdr-y += 0x50008000 params_phys-y := 0x50000100 diff --git a/arch/arm/mach-s5p64x0/Makefile.boot b/arch/arm/mach-s5p64x0/Makefile.boot index ff90aa13bd67..79ece4055b02 100644 --- a/arch/arm/mach-s5p64x0/Makefile.boot +++ b/arch/arm/mach-s5p64x0/Makefile.boot @@ -1,2 +1,2 @@ - zreladdr-y := 0x20008000 + zreladdr-y += 0x20008000 params_phys-y := 0x20000100 diff --git a/arch/arm/mach-s5pc100/Makefile.boot b/arch/arm/mach-s5pc100/Makefile.boot index ff90aa13bd67..79ece4055b02 100644 --- a/arch/arm/mach-s5pc100/Makefile.boot +++ b/arch/arm/mach-s5pc100/Makefile.boot @@ -1,2 +1,2 @@ - zreladdr-y := 0x20008000 + zreladdr-y += 0x20008000 params_phys-y := 0x20000100 diff --git a/arch/arm/mach-s5pv210/Makefile.boot b/arch/arm/mach-s5pv210/Makefile.boot index ff90aa13bd67..79ece4055b02 100644 --- a/arch/arm/mach-s5pv210/Makefile.boot +++ b/arch/arm/mach-s5pv210/Makefile.boot @@ -1,2 +1,2 @@ - zreladdr-y := 0x20008000 + zreladdr-y += 0x20008000 params_phys-y := 0x20000100 diff --git a/arch/arm/mach-sa1100/Makefile.boot b/arch/arm/mach-sa1100/Makefile.boot index a56ad0417cf2..5a616f6e5612 100644 --- a/arch/arm/mach-sa1100/Makefile.boot +++ b/arch/arm/mach-sa1100/Makefile.boot @@ -1,6 +1,7 @@ - zreladdr-y := 0xc0008000 ifeq ($(CONFIG_ARCH_SA1100),y) - zreladdr-$(CONFIG_SA1111) := 0xc0208000 + zreladdr-$(CONFIG_SA1111) += 0xc0208000 +else + zreladdr-y += 0xc0008000 endif params_phys-y := 0xc0000100 initrd_phys-y := 0xc0800000 diff --git a/arch/arm/mach-shark/Makefile.boot b/arch/arm/mach-shark/Makefile.boot index 4320f8b92771..e40e24e4ca34 100644 --- a/arch/arm/mach-shark/Makefile.boot +++ b/arch/arm/mach-shark/Makefile.boot @@ -1,2 +1,2 @@ - zreladdr-y := 0x08008000 + zreladdr-y += 0x08008000 diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot index 1c08ee9de86a..498efd99338d 100644 --- a/arch/arm/mach-shmobile/Makefile.boot +++ b/arch/arm/mach-shmobile/Makefile.boot @@ -1,7 +1,7 @@ __ZRELADDR := $(shell /bin/bash -c 'printf "0x%08x" \ $$[$(CONFIG_MEMORY_START) + 0x8000]') - zreladdr-y := $(__ZRELADDR) + zreladdr-y += $(__ZRELADDR) # Unsupported legacy stuff # diff --git a/arch/arm/mach-spear3xx/Makefile.boot b/arch/arm/mach-spear3xx/Makefile.boot index 7a1f3c0eadb8..4674a4c221db 100644 --- a/arch/arm/mach-spear3xx/Makefile.boot +++ b/arch/arm/mach-spear3xx/Makefile.boot @@ -1,3 +1,3 @@ -zreladdr-y := 0x00008000 +zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-spear6xx/Makefile.boot b/arch/arm/mach-spear6xx/Makefile.boot index 7a1f3c0eadb8..4674a4c221db 100644 --- a/arch/arm/mach-spear6xx/Makefile.boot +++ b/arch/arm/mach-spear6xx/Makefile.boot @@ -1,3 +1,3 @@ -zreladdr-y := 0x00008000 +zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-tcc8k/Makefile.boot b/arch/arm/mach-tcc8k/Makefile.boot index f135c9deae10..5e02d4156b04 100644 --- a/arch/arm/mach-tcc8k/Makefile.boot +++ b/arch/arm/mach-tcc8k/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x20008000 + zreladdr-y += 0x20008000 params_phys-y := 0x20000100 initrd_phys-y := 0x20800000 diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot index 428ad122be03..5e870d29eca1 100644 --- a/arch/arm/mach-tegra/Makefile.boot +++ b/arch/arm/mach-tegra/Makefile.boot @@ -1,4 +1,4 @@ -zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00008000 +zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) += 0x00008000 params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100 initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 diff --git a/arch/arm/mach-u300/Makefile.boot b/arch/arm/mach-u300/Makefile.boot index 6fbfc6ea2d35..69357affbd77 100644 --- a/arch/arm/mach-u300/Makefile.boot +++ b/arch/arm/mach-u300/Makefile.boot @@ -4,10 +4,10 @@ # INITRD_PHYS must be in RAM ifdef CONFIG_MACH_U300_SINGLE_RAM - zreladdr-y := 0x28E08000 + zreladdr-y += 0x28E08000 params_phys-y := 0x28E00100 else - zreladdr-y := 0x48008000 + zreladdr-y += 0x48008000 params_phys-y := 0x48000100 endif diff --git a/arch/arm/mach-ux500/Makefile.boot b/arch/arm/mach-ux500/Makefile.boot index c7e75acfe6c9..ff0a4b5b0a82 100644 --- a/arch/arm/mach-ux500/Makefile.boot +++ b/arch/arm/mach-ux500/Makefile.boot @@ -1,4 +1,4 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-versatile/Makefile.boot b/arch/arm/mach-versatile/Makefile.boot index c7e75acfe6c9..ff0a4b5b0a82 100644 --- a/arch/arm/mach-versatile/Makefile.boot +++ b/arch/arm/mach-versatile/Makefile.boot @@ -1,4 +1,4 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-vexpress/Makefile.boot b/arch/arm/mach-vexpress/Makefile.boot index 07c2d9c457ec..8630b3d10a4d 100644 --- a/arch/arm/mach-vexpress/Makefile.boot +++ b/arch/arm/mach-vexpress/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x60008000 + zreladdr-y += 0x60008000 params_phys-y := 0x60000100 initrd_phys-y := 0x60800000 diff --git a/arch/arm/mach-vt8500/Makefile.boot b/arch/arm/mach-vt8500/Makefile.boot index a8acc4e24902..b79c41cdfdff 100644 --- a/arch/arm/mach-vt8500/Makefile.boot +++ b/arch/arm/mach-vt8500/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x01000000 diff --git a/arch/arm/mach-w90x900/Makefile.boot b/arch/arm/mach-w90x900/Makefile.boot index a057b546b6e5..6c3d421c2d11 100644 --- a/arch/arm/mach-w90x900/Makefile.boot +++ b/arch/arm/mach-w90x900/Makefile.boot @@ -1,3 +1,3 @@ -zreladdr-y := 0x00008000 +zreladdr-y += 0x00008000 params_phys-y := 0x00000100 diff --git a/arch/arm/mach-zynq/Makefile.boot b/arch/arm/mach-zynq/Makefile.boot index 67039c3e0c48..760a0efe7580 100644 --- a/arch/arm/mach-zynq/Makefile.boot +++ b/arch/arm/mach-zynq/Makefile.boot @@ -1,3 +1,3 @@ - zreladdr-y := 0x00008000 + zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 -- cgit v1.2.3 From 2ecccf90f2a6d821af4d33f086d59895e5d3bedc Mon Sep 17 00:00:00 2001 From: Dave Martin Date: Fri, 19 Aug 2011 17:58:35 +0100 Subject: ARM: 7029/1: Make cpu_architecture into a global variable The CPU architecture really should not be changing at runtime, so make it a global variable instead of a function. The cpu_architecture() function declared in remains the correct way to read this variable from C code. Signed-off-by: Dave Martin Reviewed-by: Jon Medhurst Signed-off-by: Russell King --- arch/arm/include/asm/system.h | 3 ++- arch/arm/kernel/setup.c | 20 +++++++++++++++++++- 2 files changed, 21 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 832888d0c20c..4adf71b2b54a 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -57,6 +57,7 @@ #ifndef __ASSEMBLY__ +#include #include #include @@ -104,7 +105,7 @@ struct mm_struct; extern void show_pte(struct mm_struct *mm, unsigned long addr); extern void __show_regs(struct pt_regs *); -extern int cpu_architecture(void); +extern int __pure cpu_architecture(void); extern void cpu_init(void); void arm_machine_restart(char mode, const char *cmd); diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index e514c76043b4..10fce616e995 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -29,6 +29,8 @@ #include #include #include +#include +#include #include #include @@ -42,6 +44,7 @@ #include #include #include +#include #include #include @@ -115,6 +118,13 @@ struct outer_cache_fns outer_cache __read_mostly; EXPORT_SYMBOL(outer_cache); #endif +/* + * Cached cpu_architecture() result for use by assembler code. + * C code should use the cpu_architecture() function instead of accessing this + * variable directly. + */ +int __cpu_architecture __read_mostly = CPU_ARCH_UNKNOWN; + struct stack { u32 irq[3]; u32 abt[3]; @@ -210,7 +220,7 @@ static const char *proc_arch[] = { "?(17)", }; -int cpu_architecture(void) +static int __get_cpu_architecture(void) { int cpu_arch; @@ -243,6 +253,13 @@ int cpu_architecture(void) return cpu_arch; } +int __pure cpu_architecture(void) +{ + BUG_ON(__cpu_architecture == CPU_ARCH_UNKNOWN); + + return __cpu_architecture; +} + static int cpu_has_aliasing_icache(unsigned int arch) { int aliasing_icache; @@ -414,6 +431,7 @@ static void __init setup_processor(void) } cpu_name = list->cpu_name; + __cpu_architecture = __get_cpu_architecture(); #ifdef MULTI_CPU processor = *list->proc; -- cgit v1.2.3 From 85519189df91c8aa9c368de0bdcfd7812200e614 Mon Sep 17 00:00:00 2001 From: Dave Martin Date: Fri, 19 Aug 2011 17:59:27 +0100 Subject: ARM: 7030/1: entry: Remove unnecessary masking when decoding Thumb-2 instructions When testing whether a Thumb-2 instruction is 32 bits long or not, the masking done in order to test bits 11-15 of the first instruction halfword won't affect the result of the comparison, so remove it. Signed-off-by: Dave Martin Reviewed-by: Jon Medhurst Acked-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/kernel/entry-armv.S | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index a87cbf889ff4..b7236d400aeb 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -262,8 +262,7 @@ __und_svc: ldr r0, [r4, #-4] #else ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2 - and r9, r0, #0xf800 - cmp r9, #0xe800 @ 32-bit instruction if xx >= 0 + cmp r0, #0xe800 @ 32-bit instruction if xx >= 0 ldrhhs r9, [r4] @ bottom 16 bits orrhs r0, r9, r0, lsl #16 #endif @@ -445,8 +444,7 @@ __und_usr: ARM( ldrht r5, [r4], #2 ) THUMB( ldrht r5, [r4] ) THUMB( add r4, r4, #2 ) - and r0, r5, #0xf800 @ mask bits 111x x... .... .... - cmp r0, #0xe800 @ 32bit instruction if xx != 0 + cmp r5, #0xe800 @ 32bit instruction if xx != 0 blo __und_usr_unknown 3: ldrht r0, [r4] add r2, r2, #2 @ r2 is PC + 2, make it PC + 4 -- cgit v1.2.3 From ef4c53687e0adf5409896c4fa688b15f8d4dc0c0 Mon Sep 17 00:00:00 2001 From: Dave Martin Date: Fri, 19 Aug 2011 18:00:08 +0100 Subject: ARM: 7031/1: entry: Fix Thumb-2 undef handling for multi-CPU kernels When v6 and >=v7 boards are supported in the same kernel, the __und_usr code currently makes a build-time assumption that Thumb-2 instructions occurring in userspace don't need to be supported. Strictly speaking this is incorrect. This patch fixes the above case by doing a run-time check on the CPU architecture in these cases. This only affects kernels which support v6 and >=v7 CPUs together: plain v6 and plain v7 kernels are unaffected. Signed-off-by: Dave Martin Reviewed-by: Jon Medhurst Signed-off-by: Russell King --- arch/arm/kernel/entry-armv.S | 38 +++++++++++++++++++++++++++++++++++++- 1 file changed, 37 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index b7236d400aeb..9ad50c4208ae 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -24,6 +24,7 @@ #include #include #include +#include #include "entry-header.S" #include @@ -439,7 +440,27 @@ __und_usr: #endif beq call_fpe @ Thumb instruction -#if __LINUX_ARM_ARCH__ >= 7 +#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7 +/* + * Thumb-2 instruction handling. Note that because pre-v6 and >= v6 platforms + * can never be supported in a single kernel, this code is not applicable at + * all when __LINUX_ARM_ARCH__ < 6. This allows simplifying assumptions to be + * made about .arch directives. + */ +#if __LINUX_ARM_ARCH__ < 7 +/* If the target CPU may not be Thumb-2-capable, a run-time check is needed: */ +#define NEED_CPU_ARCHITECTURE + ldr r5, .LCcpu_architecture + ldr r5, [r5] + cmp r5, #CPU_ARCH_ARMv7 + blo __und_usr_unknown +/* + * The following code won't get run unless the running CPU really is v7, so + * coding round the lack of ldrht on older arches is pointless. Temporarily + * override the assembler target arch with the minimum required instead: + */ + .arch armv6t2 +#endif 2: ARM( ldrht r5, [r4], #2 ) THUMB( ldrht r5, [r4] ) @@ -449,7 +470,16 @@ __und_usr: 3: ldrht r0, [r4] add r2, r2, #2 @ r2 is PC + 2, make it PC + 4 orr r0, r0, r5, lsl #16 + +#if __LINUX_ARM_ARCH__ < 7 +/* If the target arch was overridden, change it back: */ +#ifdef CONFIG_CPU_32v6K + .arch armv6k #else + .arch armv6 +#endif +#endif /* __LINUX_ARM_ARCH__ < 7 */ +#else /* !(CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7) */ b __und_usr_unknown #endif UNWIND(.fnend ) @@ -576,6 +606,12 @@ call_fpe: movw_pc lr @ CP#14 (Debug) movw_pc lr @ CP#15 (Control) +#ifdef NEED_CPU_ARCHITECTURE + .align 2 +.LCcpu_architecture: + .word __cpu_architecture +#endif + #ifdef CONFIG_NEON .align 6 -- cgit v1.2.3 From b3377d1865723cea5334954e6ffcb2182b6689c8 Mon Sep 17 00:00:00 2001 From: Nick Bowler Date: Wed, 24 Aug 2011 18:55:37 +0100 Subject: ARM: 7064/1: vexpress: Use wfi macro in platform_do_lowpower. Current Versatile Express CPU hotplug code includes a hardcoded WFI instruction, in ARM encoding. When the kernel is compiled in Thumb-2 mode, this is invalid and causes the machine to hang hard when a CPU is offlined. Using the wfi macro (which uses the appropriate assembler mnemonic) causes the correct instruction to be emitted in either case. As a consequence of this change, an apparently vestigial "cc" clobber is dropped from the asm (the macro uses "memory" only). Signed-off-by: Nick Bowler Reviewed-by: Jamie Iles Signed-off-by: Russell King --- arch/arm/mach-vexpress/hotplug.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-vexpress/hotplug.c b/arch/arm/mach-vexpress/hotplug.c index ea4cbfb90a66..3668cf91d2de 100644 --- a/arch/arm/mach-vexpress/hotplug.c +++ b/arch/arm/mach-vexpress/hotplug.c @@ -13,6 +13,7 @@ #include #include +#include extern volatile int pen_release; @@ -62,13 +63,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious) * code will have already disabled interrupts */ for (;;) { - /* - * here's the WFI - */ - asm(".word 0xe320f003\n" - : - : - : "memory", "cc"); + wfi(); if (pen_release == cpu) { /* -- cgit v1.2.3 From b380ab4f85d641574d91b12b333848a0731a497c Mon Sep 17 00:00:00 2001 From: Laura Abbott Date: Wed, 31 Aug 2011 02:04:06 +0100 Subject: ARM: 7068/1: process: change from __backtrace to dump_stack in show_regs Currently, show_regs calls __backtrace which does nothing if CONFIG_FRAME_POINTER is not set. Switch to dump_stack which handles both CONFIG_FRAME_POINTER and CONFIG_ARM_UNWIND correctly. __backtrace is now superseded by dump_stack in general and show_regs was the last caller so remove __backtrace as well. Signed-off-by: Laura Abbott Acked-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/include/asm/system.h | 1 - arch/arm/kernel/armksyms.c | 3 --- arch/arm/kernel/process.c | 2 +- arch/arm/lib/backtrace.S | 6 ------ 4 files changed, 1 insertion(+), 11 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 4adf71b2b54a..09cdfe6d960f 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -98,7 +98,6 @@ void hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int, #define xchg(ptr,x) \ ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) -extern asmlinkage void __backtrace(void); extern asmlinkage void c_backtrace(unsigned long fp, int pmode); struct mm_struct; diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index aeef960ff795..8e3c6f11b0a1 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -49,9 +49,6 @@ extern void __aeabi_ulcmp(void); extern void fpundefinstr(void); - -EXPORT_SYMBOL(__backtrace); - /* platform dependent support */ EXPORT_SYMBOL(__udelay); EXPORT_SYMBOL(__const_udelay); diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 1a347f481e5e..fd0814076ff6 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c @@ -319,7 +319,7 @@ void show_regs(struct pt_regs * regs) printk("\n"); printk("Pid: %d, comm: %20s\n", task_pid_nr(current), current->comm); __show_regs(regs); - __backtrace(); + dump_stack(); } ATOMIC_NOTIFIER_HEAD(thread_notify_head); diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S index a673297b0cf1..cd07b5814c23 100644 --- a/arch/arm/lib/backtrace.S +++ b/arch/arm/lib/backtrace.S @@ -22,15 +22,10 @@ #define mask r7 #define offset r8 -ENTRY(__backtrace) - mov r1, #0x10 - mov r0, fp - ENTRY(c_backtrace) #if !defined(CONFIG_FRAME_POINTER) || !defined(CONFIG_PRINTK) mov pc, lr -ENDPROC(__backtrace) ENDPROC(c_backtrace) #else stmfd sp!, {r4 - r8, lr} @ Save an extra register so we have a location... @@ -107,7 +102,6 @@ for_each_frame: tst frame, mask @ Check for address exceptions mov r1, frame bl printk no_frame: ldmfd sp!, {r4 - r8, pc} -ENDPROC(__backtrace) ENDPROC(c_backtrace) .pushsection __ex_table,"a" -- cgit v1.2.3 From f24dec9fdafadca53bf9db460da2cbbbfccdb584 Mon Sep 17 00:00:00 2001 From: Jochen Friedrich Date: Thu, 18 Aug 2011 21:53:57 +0100 Subject: ARM: 7027/1: simpad: Add ucb1x00 GPIO definitions and register GPIO Add ucb1x00 GPIO definitions to simpad.h and add gpio_base to ucb1x00 platform device so the pins are available using the GPIO API. Signed-off-by: Jochen Friedrich Signed-off-by: Russell King --- arch/arm/mach-sa1100/include/mach/simpad.h | 13 +++++++++++++ arch/arm/mach-sa1100/simpad.c | 1 + 2 files changed, 14 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-sa1100/include/mach/simpad.h b/arch/arm/mach-sa1100/include/mach/simpad.h index 9296c4513ce1..231550da7db8 100644 --- a/arch/arm/mach-sa1100/include/mach/simpad.h +++ b/arch/arm/mach-sa1100/include/mach/simpad.h @@ -48,6 +48,19 @@ #define GPIO_SMART_CARD GPIO_GPIO10 #define IRQ_GPIO_SMARD_CARD IRQ_GPIO10 +/*--- ucb1x00 GPIO ---*/ +#define SIMPAD_UCB1X00_GPIO_BASE (GPIO_MAX + 1) +#define SIMPAD_UCB1X00_GPIO_PROG1 (SIMPAD_UCB1X00_GPIO_BASE) +#define SIMPAD_UCB1X00_GPIO_PROG2 (SIMPAD_UCB1X00_GPIO_BASE + 1) +#define SIMPAD_UCB1X00_GPIO_UP (SIMPAD_UCB1X00_GPIO_BASE + 2) +#define SIMPAD_UCB1X00_GPIO_DOWN (SIMPAD_UCB1X00_GPIO_BASE + 3) +#define SIMPAD_UCB1X00_GPIO_LEFT (SIMPAD_UCB1X00_GPIO_BASE + 4) +#define SIMPAD_UCB1X00_GPIO_RIGHT (SIMPAD_UCB1X00_GPIO_BASE + 5) +#define SIMPAD_UCB1X00_GPIO_6 (SIMPAD_UCB1X00_GPIO_BASE + 6) +#define SIMPAD_UCB1X00_GPIO_7 (SIMPAD_UCB1X00_GPIO_BASE + 7) +#define SIMPAD_UCB1X00_GPIO_HEADSET (SIMPAD_UCB1X00_GPIO_BASE + 8) +#define SIMPAD_UCB1X00_GPIO_SPEAKER (SIMPAD_UCB1X00_GPIO_BASE + 9) + // CS3 Latch is write only, a shadow is necessary #define CS3BUSTYPE unsigned volatile long diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index cfb76077bd25..718b802bbff3 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c @@ -132,6 +132,7 @@ static struct resource simpad_flash_resources [] = { static struct mcp_plat_data simpad_mcp_data = { .mccr0 = MCCR0_ADM, .sclk_rate = 11981000, + .gpio_base = SIMPAD_UCB1X00_GPIO_BASE, }; -- cgit v1.2.3 From de0bc0d1b008d1240c03a0bac4f5534f995ab802 Mon Sep 17 00:00:00 2001 From: Jochen Friedrich Date: Thu, 18 Aug 2011 21:50:31 +0100 Subject: ARM: 7024/1: simpad: Cleanup CS3 accessors. - prepend CS3 accessors by simpad_ to indicate they are specific to simpad devices. - use spinlock to protect shadow register. - implement 8 read-only pins. - use readl/writel macros so barriers are used where necessary. - register CS3 as GPIO controller with 24 pins (16 output only and 8 input only). - fix PCMCIA driver to access the read-only pins rather than the shadow register for status bits. Signed-off-by: Jochen Friedrich Signed-off-by: Russell King --- arch/arm/mach-sa1100/include/mach/simpad.h | 81 ++++++++++++++------ arch/arm/mach-sa1100/leds-simpad.c | 7 +- arch/arm/mach-sa1100/simpad.c | 117 +++++++++++++++++++++++------ drivers/pcmcia/sa1100_simpad.c | 35 ++++----- 4 files changed, 169 insertions(+), 71 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-sa1100/include/mach/simpad.h b/arch/arm/mach-sa1100/include/mach/simpad.h index 231550da7db8..db28118103eb 100644 --- a/arch/arm/mach-sa1100/include/mach/simpad.h +++ b/arch/arm/mach-sa1100/include/mach/simpad.h @@ -61,32 +61,67 @@ #define SIMPAD_UCB1X00_GPIO_HEADSET (SIMPAD_UCB1X00_GPIO_BASE + 8) #define SIMPAD_UCB1X00_GPIO_SPEAKER (SIMPAD_UCB1X00_GPIO_BASE + 9) -// CS3 Latch is write only, a shadow is necessary +/*--- CS3 Latch ---*/ +#define SIMPAD_CS3_GPIO_BASE (GPIO_MAX + 11) +#define SIMPAD_CS3_VCC_5V_EN (SIMPAD_CS3_GPIO_BASE) +#define SIMPAD_CS3_VCC_3V_EN (SIMPAD_CS3_GPIO_BASE + 1) +#define SIMPAD_CS3_EN1 (SIMPAD_CS3_GPIO_BASE + 2) +#define SIMPAD_CS3_EN0 (SIMPAD_CS3_GPIO_BASE + 3) +#define SIMPAD_CS3_DISPLAY_ON (SIMPAD_CS3_GPIO_BASE + 4) +#define SIMPAD_CS3_PCMCIA_BUFF_DIS (SIMPAD_CS3_GPIO_BASE + 5) +#define SIMPAD_CS3_MQ_RESET (SIMPAD_CS3_GPIO_BASE + 6) +#define SIMPAD_CS3_PCMCIA_RESET (SIMPAD_CS3_GPIO_BASE + 7) +#define SIMPAD_CS3_DECT_POWER_ON (SIMPAD_CS3_GPIO_BASE + 8) +#define SIMPAD_CS3_IRDA_SD (SIMPAD_CS3_GPIO_BASE + 9) +#define SIMPAD_CS3_RS232_ON (SIMPAD_CS3_GPIO_BASE + 10) +#define SIMPAD_CS3_SD_MEDIAQ (SIMPAD_CS3_GPIO_BASE + 11) +#define SIMPAD_CS3_LED2_ON (SIMPAD_CS3_GPIO_BASE + 12) +#define SIMPAD_CS3_IRDA_MODE (SIMPAD_CS3_GPIO_BASE + 13) +#define SIMPAD_CS3_ENABLE_5V (SIMPAD_CS3_GPIO_BASE + 14) +#define SIMPAD_CS3_RESET_SIMCARD (SIMPAD_CS3_GPIO_BASE + 15) + +#define SIMPAD_CS3_PCMCIA_BVD1 (SIMPAD_CS3_GPIO_BASE + 16) +#define SIMPAD_CS3_PCMCIA_BVD2 (SIMPAD_CS3_GPIO_BASE + 17) +#define SIMPAD_CS3_PCMCIA_VS1 (SIMPAD_CS3_GPIO_BASE + 18) +#define SIMPAD_CS3_PCMCIA_VS2 (SIMPAD_CS3_GPIO_BASE + 19) +#define SIMPAD_CS3_LOCK_IND (SIMPAD_CS3_GPIO_BASE + 20) +#define SIMPAD_CS3_CHARGING_STATE (SIMPAD_CS3_GPIO_BASE + 21) +#define SIMPAD_CS3_PCMCIA_SHORT (SIMPAD_CS3_GPIO_BASE + 22) +#define SIMPAD_CS3_GPIO_23 (SIMPAD_CS3_GPIO_BASE + 23) -#define CS3BUSTYPE unsigned volatile long #define CS3_BASE 0xf1000000 -#define VCC_5V_EN 0x0001 // For 5V PCMCIA -#define VCC_3V_EN 0x0002 // FOR 3.3V PCMCIA -#define EN1 0x0004 // This is only for EPROM's -#define EN0 0x0008 // Both should be enable for 3.3V or 5V -#define DISPLAY_ON 0x0010 -#define PCMCIA_BUFF_DIS 0x0020 -#define MQ_RESET 0x0040 -#define PCMCIA_RESET 0x0080 -#define DECT_POWER_ON 0x0100 -#define IRDA_SD 0x0200 // Shutdown for powersave -#define RS232_ON 0x0400 -#define SD_MEDIAQ 0x0800 // Shutdown for powersave -#define LED2_ON 0x1000 -#define IRDA_MODE 0x2000 // Fast/Slow IrDA mode -#define ENABLE_5V 0x4000 // Enable 5V circuit -#define RESET_SIMCARD 0x8000 - -#define RS232_ENABLE 0x0440 -#define PCMCIAMASK 0x402f - - +long simpad_get_cs3_ro(void); +long simpad_get_cs3_shadow(void); +void simpad_set_cs3_bit(int value); +void simpad_clear_cs3_bit(int value); + +#define VCC_5V_EN 0x0001 /* For 5V PCMCIA */ +#define VCC_3V_EN 0x0002 /* FOR 3.3V PCMCIA */ +#define EN1 0x0004 /* This is only for EPROM's */ +#define EN0 0x0008 /* Both should be enable for 3.3V or 5V */ +#define DISPLAY_ON 0x0010 +#define PCMCIA_BUFF_DIS 0x0020 +#define MQ_RESET 0x0040 +#define PCMCIA_RESET 0x0080 +#define DECT_POWER_ON 0x0100 +#define IRDA_SD 0x0200 /* Shutdown for powersave */ +#define RS232_ON 0x0400 +#define SD_MEDIAQ 0x0800 /* Shutdown for powersave */ +#define LED2_ON 0x1000 +#define IRDA_MODE 0x2000 /* Fast/Slow IrDA mode */ +#define ENABLE_5V 0x4000 /* Enable 5V circuit */ +#define RESET_SIMCARD 0x8000 + +#define PCMCIA_BVD1 0x01 +#define PCMCIA_BVD2 0x02 +#define PCMCIA_VS1 0x04 +#define PCMCIA_VS2 0x08 +#define LOCK_IND 0x10 +#define CHARGING_STATE 0x20 +#define PCMCIA_SHORT 0x40 + +/*--- Battery ---*/ struct simpad_battery { unsigned char ac_status; /* line connected yes/no */ unsigned char status; /* battery loading yes/no */ diff --git a/arch/arm/mach-sa1100/leds-simpad.c b/arch/arm/mach-sa1100/leds-simpad.c index d50f4eeaa12e..d25784cc96e6 100644 --- a/arch/arm/mach-sa1100/leds-simpad.c +++ b/arch/arm/mach-sa1100/leds-simpad.c @@ -22,9 +22,6 @@ static unsigned int hw_led_state; #define LED_GREEN (1) #define LED_MASK (1) -extern void set_cs3_bit(int value); -extern void clear_cs3_bit(int value); - void simpad_leds_event(led_event_t evt) { switch (evt) @@ -93,8 +90,8 @@ void simpad_leds_event(led_event_t evt) } if (led_state & LED_STATE_ENABLED) - set_cs3_bit(LED2_ON); + simpad_set_cs3_bit(LED2_ON); else - clear_cs3_bit(LED2_ON); + simpad_clear_cs3_bit(LED2_ON); } diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index 718b802bbff3..c3c66b0d6b6e 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -31,32 +32,85 @@ #include "generic.h" -long cs3_shadow; +/* + * CS3 support + */ + +static long cs3_shadow; +static spinlock_t cs3_lock; +static struct gpio_chip cs3_gpio; + +long simpad_get_cs3_ro(void) +{ + return readl(CS3_BASE); +} +EXPORT_SYMBOL(simpad_get_cs3_ro); -long get_cs3_shadow(void) +long simpad_get_cs3_shadow(void) { return cs3_shadow; } +EXPORT_SYMBOL(simpad_get_cs3_shadow); -void set_cs3(long value) +static void __simpad_write_cs3(void) { - *(CS3BUSTYPE *)(CS3_BASE) = cs3_shadow = value; + writel(cs3_shadow, CS3_BASE); } -void set_cs3_bit(int value) +void simpad_set_cs3_bit(int value) { + unsigned long flags; + + spin_lock_irqsave(&cs3_lock, flags); cs3_shadow |= value; - *(CS3BUSTYPE *)(CS3_BASE) = cs3_shadow; + __simpad_write_cs3(); + spin_unlock_irqrestore(&cs3_lock, flags); } +EXPORT_SYMBOL(simpad_set_cs3_bit); -void clear_cs3_bit(int value) +void simpad_clear_cs3_bit(int value) { + unsigned long flags; + + spin_lock_irqsave(&cs3_lock, flags); cs3_shadow &= ~value; - *(CS3BUSTYPE *)(CS3_BASE) = cs3_shadow; + __simpad_write_cs3(); + spin_unlock_irqrestore(&cs3_lock, flags); } +EXPORT_SYMBOL(simpad_clear_cs3_bit); + +static void cs3_gpio_set(struct gpio_chip *chip, unsigned offset, int value) +{ + if (offset > 15) + return; + if (value) + simpad_set_cs3_bit(1 << offset); + else + simpad_clear_cs3_bit(1 << offset); +}; -EXPORT_SYMBOL(set_cs3_bit); -EXPORT_SYMBOL(clear_cs3_bit); +static int cs3_gpio_get(struct gpio_chip *chip, unsigned offset) +{ + if (offset > 15) + return simpad_get_cs3_ro() & (1 << (offset - 16)); + return simpad_get_cs3_shadow() & (1 << offset); +}; + +static int cs3_gpio_direction_input(struct gpio_chip *chip, unsigned offset) +{ + if (offset > 15) + return 0; + return -EINVAL; +}; + +static int cs3_gpio_direction_output(struct gpio_chip *chip, unsigned offset, + int value) +{ + if (offset > 15) + return -EINVAL; + cs3_gpio_set(chip, offset, value); + return 0; +}; static struct map_desc simpad_io_desc[] __initdata = { { /* MQ200 */ @@ -64,9 +118,9 @@ static struct map_desc simpad_io_desc[] __initdata = { .pfn = __phys_to_pfn(0x4b800000), .length = 0x00800000, .type = MT_DEVICE - }, { /* Paules CS3, write only */ - .virtual = 0xf1000000, - .pfn = __phys_to_pfn(0x18000000), + }, { /* Simpad CS3 */ + .virtual = CS3_BASE, + .pfn = __phys_to_pfn(SA1100_CS3_PHYS), .length = 0x00100000, .type = MT_DEVICE }, @@ -78,12 +132,12 @@ static void simpad_uart_pm(struct uart_port *port, u_int state, u_int oldstate) if (port->mapbase == (u_int)&Ser1UTCR0) { if (state) { - clear_cs3_bit(RS232_ON); - clear_cs3_bit(DECT_POWER_ON); + simpad_clear_cs3_bit(RS232_ON); + simpad_clear_cs3_bit(DECT_POWER_ON); }else { - set_cs3_bit(RS232_ON); - set_cs3_bit(DECT_POWER_ON); + simpad_set_cs3_bit(RS232_ON); + simpad_set_cs3_bit(DECT_POWER_ON); } } } @@ -143,9 +197,10 @@ static void __init simpad_map_io(void) iotable_init(simpad_io_desc, ARRAY_SIZE(simpad_io_desc)); - set_cs3_bit (EN1 | EN0 | LED2_ON | DISPLAY_ON | RS232_ON | - ENABLE_5V | RESET_SIMCARD | DECT_POWER_ON); - + /* Initialize CS3 */ + cs3_shadow = (EN1 | EN0 | LED2_ON | DISPLAY_ON | + RS232_ON | ENABLE_5V | RESET_SIMCARD | DECT_POWER_ON); + __simpad_write_cs3(); /* Spinlocks not yet initialized */ sa1100_register_uart_fns(&simpad_port_fns); sa1100_register_uart(0, 3); /* serial interface */ @@ -171,13 +226,14 @@ static void __init simpad_map_io(void) static void simpad_power_off(void) { - local_irq_disable(); // was cli - set_cs3(0x800); /* only SD_MEDIAQ */ + local_irq_disable(); + cs3_shadow = SD_MEDIAQ; + __simpad_write_cs3(); /* Bypass spinlock here */ /* disable internal oscillator, float CS lines */ PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS); - /* enable wake-up on GPIO0 (Assabet...) */ - PWER = GFER = GRER = 1; + /* enable wake-up on GPIO0 */ + PWER = GFER = GRER = PWER_GPIO0; /* * set scratchpad to zero, just in case it is used as a * restart address by the bootloader. @@ -212,6 +268,19 @@ static int __init simpad_init(void) { int ret; + spin_lock_init(&cs3_lock); + + cs3_gpio.label = "simpad_cs3"; + cs3_gpio.base = SIMPAD_CS3_GPIO_BASE; + cs3_gpio.ngpio = 24; + cs3_gpio.set = cs3_gpio_set; + cs3_gpio.get = cs3_gpio_get; + cs3_gpio.direction_input = cs3_gpio_direction_input; + cs3_gpio.direction_output = cs3_gpio_direction_output; + ret = gpiochip_add(&cs3_gpio); + if (ret) + printk(KERN_WARNING "simpad: Unable to register cs3 GPIO device"); + pm_power_off = simpad_power_off; sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources, diff --git a/drivers/pcmcia/sa1100_simpad.c b/drivers/pcmcia/sa1100_simpad.c index c998f7aaadbc..0fac9658b020 100644 --- a/drivers/pcmcia/sa1100_simpad.c +++ b/drivers/pcmcia/sa1100_simpad.c @@ -15,10 +15,6 @@ #include #include "sa1100_generic.h" -extern long get_cs3_shadow(void); -extern void set_cs3_bit(int value); -extern void clear_cs3_bit(int value); - static struct pcmcia_irqs irqs[] = { { 1, IRQ_GPIO_CF_CD, "CF_CD" }, }; @@ -26,7 +22,7 @@ static struct pcmcia_irqs irqs[] = { static int simpad_pcmcia_hw_init(struct soc_pcmcia_socket *skt) { - clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1); + simpad_clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1); skt->socket.pci_irq = IRQ_GPIO_CF_IRQ; @@ -38,8 +34,8 @@ static void simpad_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs)); /* Disable CF bus: */ - //set_cs3_bit(PCMCIA_BUFF_DIS); - clear_cs3_bit(PCMCIA_RESET); + /*simpad_set_cs3_bit(PCMCIA_BUFF_DIS);*/ + simpad_clear_cs3_bit(PCMCIA_RESET); } static void @@ -47,15 +43,16 @@ simpad_pcmcia_socket_state(struct soc_pcmcia_socket *skt, struct pcmcia_state *state) { unsigned long levels = GPLR; - long cs3reg = get_cs3_shadow(); + long cs3reg = simpad_get_cs3_ro(); state->detect=((levels & GPIO_CF_CD)==0)?1:0; state->ready=(levels & GPIO_CF_IRQ)?1:0; - state->bvd1=1; /* Not available on Simpad. */ - state->bvd2=1; /* Not available on Simpad. */ + state->bvd1 = 1; /* Might be cs3reg & PCMCIA_BVD1 */ + state->bvd2 = 1; /* Might be cs3reg & PCMCIA_BVD2 */ state->wrprot=0; /* Not available on Simpad. */ - - if((cs3reg & 0x0c) == 0x0c) { + + if ((cs3reg & (PCMCIA_VS1|PCMCIA_VS2)) == + (PCMCIA_VS1|PCMCIA_VS2)) { state->vs_3v=0; state->vs_Xv=0; } else { @@ -75,23 +72,23 @@ simpad_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, /* Murphy: see table of MIC2562a-1 */ switch (state->Vcc) { case 0: - clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1); + simpad_clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1); break; case 33: - clear_cs3_bit(VCC_3V_EN|EN1); - set_cs3_bit(VCC_5V_EN|EN0); + simpad_clear_cs3_bit(VCC_3V_EN|EN1); + simpad_set_cs3_bit(VCC_5V_EN|EN0); break; case 50: - clear_cs3_bit(VCC_5V_EN|EN1); - set_cs3_bit(VCC_3V_EN|EN0); + simpad_clear_cs3_bit(VCC_5V_EN|EN1); + simpad_set_cs3_bit(VCC_3V_EN|EN0); break; default: printk(KERN_ERR "%s(): unrecognized Vcc %u\n", __func__, state->Vcc); - clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1); + simpad_clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1); local_irq_restore(flags); return -1; } @@ -110,7 +107,7 @@ static void simpad_pcmcia_socket_init(struct soc_pcmcia_socket *skt) static void simpad_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) { soc_pcmcia_disable_irqs(skt, irqs, ARRAY_SIZE(irqs)); - set_cs3_bit(PCMCIA_RESET); + simpad_set_cs3_bit(PCMCIA_RESET); } static struct pcmcia_low_level simpad_pcmcia_ops = { -- cgit v1.2.3 From dbd406f9d0a1d33a1303eb75cbe3f9435513d339 Mon Sep 17 00:00:00 2001 From: Jochen Friedrich Date: Thu, 18 Aug 2011 21:51:06 +0100 Subject: ARM: 7025/1: simpad: add GPIO based device definitions. Register keyboard, polled keyboard and I2C platform devices based on GPIOs. Signed-off-by: Jochen Friedrich Signed-off-by: Russell King --- arch/arm/mach-sa1100/simpad.c | 67 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 66 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index c3c66b0d6b6e..9f0eefdaa2a1 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c @@ -29,6 +29,9 @@ #include #include +#include +#include +#include #include "generic.h" @@ -249,6 +252,65 @@ static void simpad_power_off(void) } +/* + * gpio_keys +*/ + +static struct gpio_keys_button simpad_button_table[] = { + { KEY_POWER, IRQ_GPIO_POWER_BUTTON, 1, "power button" }, +}; + +static struct gpio_keys_platform_data simpad_keys_data = { + .buttons = simpad_button_table, + .nbuttons = ARRAY_SIZE(simpad_button_table), +}; + +static struct platform_device simpad_keys = { + .name = "gpio-keys", + .dev = { + .platform_data = &simpad_keys_data, + }, +}; + +static struct gpio_keys_button simpad_polled_button_table[] = { + { KEY_PROG1, SIMPAD_UCB1X00_GPIO_PROG1, 1, "prog1 button" }, + { KEY_PROG2, SIMPAD_UCB1X00_GPIO_PROG2, 1, "prog2 button" }, + { KEY_UP, SIMPAD_UCB1X00_GPIO_UP, 1, "up button" }, + { KEY_DOWN, SIMPAD_UCB1X00_GPIO_DOWN, 1, "down button" }, + { KEY_LEFT, SIMPAD_UCB1X00_GPIO_LEFT, 1, "left button" }, + { KEY_RIGHT, SIMPAD_UCB1X00_GPIO_RIGHT, 1, "right button" }, +}; + +static struct gpio_keys_platform_data simpad_polled_keys_data = { + .buttons = simpad_polled_button_table, + .nbuttons = ARRAY_SIZE(simpad_polled_button_table), + .poll_interval = 50, +}; + +static struct platform_device simpad_polled_keys = { + .name = "gpio-keys-polled", + .dev = { + .platform_data = &simpad_polled_keys_data, + }, +}; + +/* + * i2c + */ +static struct i2c_gpio_platform_data simpad_i2c_data = { + .sda_pin = GPIO_GPIO21, + .scl_pin = GPIO_GPIO25, + .udelay = 10, + .timeout = HZ, +}; + +static struct platform_device simpad_i2c = { + .name = "i2c-gpio", + .id = 0, + .dev = { + .platform_data = &simpad_i2c_data, + }, +}; /* * MediaQ Video Device @@ -259,7 +321,10 @@ static struct platform_device simpad_mq200fb = { }; static struct platform_device *devices[] __initdata = { - &simpad_mq200fb + &simpad_keys, + &simpad_polled_keys, + &simpad_mq200fb, + &simpad_i2c, }; -- cgit v1.2.3 From d056f5a8fec028cc58c75706f35f2c3daed13e6e Mon Sep 17 00:00:00 2001 From: Jochen Friedrich Date: Thu, 18 Aug 2011 21:51:39 +0100 Subject: ARM: 7026/1: simpad: replace ARM specific LED code Remove the legacy ARM LED code for simpad devices and register a stadard LED platform device using GPIO line instead. Signed-off-by: Jochen Friedrich Signed-off-by: Russell King --- arch/arm/mach-sa1100/Makefile | 1 - arch/arm/mach-sa1100/leds-simpad.c | 97 -------------------------------------- arch/arm/mach-sa1100/leds.c | 2 - arch/arm/mach-sa1100/leds.h | 1 - arch/arm/mach-sa1100/simpad.c | 28 +++++++++++ 5 files changed, 28 insertions(+), 101 deletions(-) delete mode 100644 arch/arm/mach-sa1100/leds-simpad.c (limited to 'arch/arm') diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile index 41252d22e659..00631787e80a 100644 --- a/arch/arm/mach-sa1100/Makefile +++ b/arch/arm/mach-sa1100/Makefile @@ -45,7 +45,6 @@ obj-$(CONFIG_SA1100_PLEB) += pleb.o obj-$(CONFIG_SA1100_SHANNON) += shannon.o obj-$(CONFIG_SA1100_SIMPAD) += simpad.o -led-$(CONFIG_SA1100_SIMPAD) += leds-simpad.o # LEDs support obj-$(CONFIG_LEDS) += $(led-y) diff --git a/arch/arm/mach-sa1100/leds-simpad.c b/arch/arm/mach-sa1100/leds-simpad.c deleted file mode 100644 index d25784cc96e6..000000000000 --- a/arch/arm/mach-sa1100/leds-simpad.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * linux/arch/arm/mach-sa1100/leds-simpad.c - * - * Author: Juergen Messerer - */ -#include - -#include -#include -#include -#include - -#include "leds.h" - - -#define LED_STATE_ENABLED 1 -#define LED_STATE_CLAIMED 2 - -static unsigned int led_state; -static unsigned int hw_led_state; - -#define LED_GREEN (1) -#define LED_MASK (1) - -void simpad_leds_event(led_event_t evt) -{ - switch (evt) - { - case led_start: - hw_led_state = LED_GREEN; - led_state = LED_STATE_ENABLED; - break; - - case led_stop: - led_state &= ~LED_STATE_ENABLED; - break; - - case led_claim: - led_state |= LED_STATE_CLAIMED; - hw_led_state = LED_GREEN; - break; - - case led_release: - led_state &= ~LED_STATE_CLAIMED; - hw_led_state = LED_GREEN; - break; - -#ifdef CONFIG_LEDS_TIMER - case led_timer: - if (!(led_state & LED_STATE_CLAIMED)) - hw_led_state ^= LED_GREEN; - break; -#endif - -#ifdef CONFIG_LEDS_CPU - case led_idle_start: - break; - - case led_idle_end: - break; -#endif - - case led_halted: - break; - - case led_green_on: - if (led_state & LED_STATE_CLAIMED) - hw_led_state |= LED_GREEN; - break; - - case led_green_off: - if (led_state & LED_STATE_CLAIMED) - hw_led_state &= ~LED_GREEN; - break; - - case led_amber_on: - break; - - case led_amber_off: - break; - - case led_red_on: - break; - - case led_red_off: - break; - - default: - break; - } - - if (led_state & LED_STATE_ENABLED) - simpad_set_cs3_bit(LED2_ON); - else - simpad_clear_cs3_bit(LED2_ON); -} - diff --git a/arch/arm/mach-sa1100/leds.c b/arch/arm/mach-sa1100/leds.c index bbfe197fb4d6..5fe71a0f1053 100644 --- a/arch/arm/mach-sa1100/leds.c +++ b/arch/arm/mach-sa1100/leds.c @@ -42,8 +42,6 @@ sa1100_leds_init(void) leds_event = adsbitsy_leds_event; if (machine_is_pt_system3()) leds_event = system3_leds_event; - if (machine_is_simpad()) - leds_event = simpad_leds_event; /* what about machine registry? including led, apm... -zecke */ leds_event(led_start); return 0; diff --git a/arch/arm/mach-sa1100/leds.h b/arch/arm/mach-sa1100/leds.h index 68cc9f773d6d..776b6020f550 100644 --- a/arch/arm/mach-sa1100/leds.h +++ b/arch/arm/mach-sa1100/leds.h @@ -11,4 +11,3 @@ extern void pfs168_leds_event(led_event_t evt); extern void graphicsmaster_leds_event(led_event_t evt); extern void adsbitsy_leds_event(led_event_t evt); extern void system3_leds_event(led_event_t evt); -extern void simpad_leds_event(led_event_t evt); diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index 9f0eefdaa2a1..34659f354bef 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include "generic.h" @@ -294,6 +295,32 @@ static struct platform_device simpad_polled_keys = { }, }; +/* + * GPIO LEDs + */ + +static struct gpio_led simpad_leds[] = { + { + .name = "simpad:power", + .gpio = SIMPAD_CS3_LED2_ON, + .active_low = 0, + .default_trigger = "default-on", + }, +}; + +static struct gpio_led_platform_data simpad_led_data = { + .num_leds = ARRAY_SIZE(simpad_leds), + .leds = simpad_leds, +}; + +static struct platform_device simpad_gpio_leds = { + .name = "leds-gpio", + .id = 0, + .dev = { + .platform_data = &simpad_led_data, + }, +}; + /* * i2c */ @@ -324,6 +351,7 @@ static struct platform_device *devices[] __initdata = { &simpad_keys, &simpad_polled_keys, &simpad_mq200fb, + &simpad_gpio_leds, &simpad_i2c, }; -- cgit v1.2.3 From a7b0ab5bd0459253aa5efba445969ba5200104de Mon Sep 17 00:00:00 2001 From: Peter Hüwe Date: Mon, 5 Sep 2011 21:03:02 +0100 Subject: ARM: 7078/1: Footbridge: Sort KConfig Options alphabetically As per request of rmk, the options should be sorted alphabetically. Signed-off-by: Peter Huewe Signed-off-by: Russell King --- arch/arm/mach-footbridge/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-footbridge/Kconfig b/arch/arm/mach-footbridge/Kconfig index c8e7afcf14ec..f643ef819da6 100644 --- a/arch/arm/mach-footbridge/Kconfig +++ b/arch/arm/mach-footbridge/Kconfig @@ -4,8 +4,8 @@ menu "Footbridge Implementations" config ARCH_CATS bool "CATS" - select CLKSRC_I8253 select CLKEVT_I8253 + select CLKSRC_I8253 select FOOTBRIDGE_HOST select ISA select ISA_DMA @@ -61,8 +61,8 @@ config ARCH_EBSA285_HOST config ARCH_NETWINDER bool "NetWinder" - select CLKSRC_I8253 select CLKEVT_I8253 + select CLKSRC_I8253 select FOOTBRIDGE_HOST select ISA select ISA_DMA -- cgit v1.2.3 From 1b56b17f9903b6a17b8bb8d72d885f6d12b4d597 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 8 Sep 2011 09:11:40 +0100 Subject: ARM: 7084/1: mach-integrator: retire some timer macros These macros are not used by anything since the switch to generic time in commit b9cedda230793cbf58eb012ddadedd490cc8e129 so let's retire them. Acked-by: Thomas Gleixner Signed-off-by: Linus Walleij Signed-off-by: Russell King --- arch/arm/mach-integrator/integrator_ap.c | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index fcf0ae95651f..aa30ab650183 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -320,18 +320,6 @@ static void __init ap_init(void) #define TIMER1_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER1_BASE) #define TIMER2_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER2_BASE) -/* - * How long is the timer interval? - */ -#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10) -#if TIMER_INTERVAL >= 0x100000 -#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC) -#elif TIMER_INTERVAL >= 0x10000 -#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC) -#else -#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC) -#endif - static unsigned long timer_reload; static void integrator_clocksource_init(u32 khz) -- cgit v1.2.3 From 02f5632122ccbb6eb0c3b3f612b564b659defb32 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 8 Sep 2011 21:21:42 +0100 Subject: ARM: 7085/2: mach-integrator: clockevent supports oneshot mode The Integrator AP timer has no problem supporting oneshot ticks with proper code, so let's do it so we can have NOHZ configured in for this platform too. Cc: Thomas Gleixner Signed-off-by: Linus Walleij Signed-off-by: Russell King --- arch/arm/mach-integrator/integrator_ap.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index aa30ab650183..e66a8bce3999 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -360,15 +360,29 @@ static void clkevt_set_mode(enum clock_event_mode mode, struct clock_event_devic { u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE; - BUG_ON(mode == CLOCK_EVT_MODE_ONESHOT); + /* Disable timer */ + writel(ctrl, clkevt_base + TIMER_CTRL); - if (mode == CLOCK_EVT_MODE_PERIODIC) { - writel(ctrl, clkevt_base + TIMER_CTRL); + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + /* Enable the timer and start the periodic tick */ writel(timer_reload, clkevt_base + TIMER_LOAD); ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE; + writel(ctrl, clkevt_base + TIMER_CTRL); + break; + case CLOCK_EVT_MODE_ONESHOT: + /* Leave the timer disabled, .set_next_event will enable it */ + ctrl &= ~TIMER_CTRL_PERIODIC; + writel(ctrl, clkevt_base + TIMER_CTRL); + break; + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + case CLOCK_EVT_MODE_RESUME: + default: + /* Just leave in disabled state */ + break; } - writel(ctrl, clkevt_base + TIMER_CTRL); } static int clkevt_set_next_event(unsigned long next, struct clock_event_device *evt) @@ -385,7 +399,7 @@ static int clkevt_set_next_event(unsigned long next, struct clock_event_device * static struct clock_event_device integrator_clockevent = { .name = "timer1", .shift = 34, - .features = CLOCK_EVT_FEAT_PERIODIC, + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, .set_mode = clkevt_set_mode, .set_next_event = clkevt_set_next_event, .rating = 300, -- cgit v1.2.3 From 6d8ce7129f6c4c2f8716d6a771d59f263deab898 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 8 Sep 2011 21:22:32 +0100 Subject: ARM: 7086/2: mach-integrator: modernize clock event registration Drop mult, shift and delta calculations and let the clockevent core scale this as appropriate. Set the minimum interval to 1 rather than 15 (0xf), there is nothing in the data sheets I have indicating that 15 should be some minimum value. Acked-by: Thomas Gleixner Signed-off-by: Linus Walleij Signed-off-by: Russell King --- arch/arm/mach-integrator/integrator_ap.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index e66a8bce3999..0a6f397f1222 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -398,12 +398,10 @@ static int clkevt_set_next_event(unsigned long next, struct clock_event_device * static struct clock_event_device integrator_clockevent = { .name = "timer1", - .shift = 34, .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, .set_mode = clkevt_set_mode, .set_next_event = clkevt_set_next_event, .rating = 300, - .cpumask = cpu_all_mask, }; static struct irqaction integrator_timer_irq = { @@ -415,9 +413,9 @@ static struct irqaction integrator_timer_irq = { static void integrator_clockevent_init(u32 khz) { - struct clock_event_device *evt = &integrator_clockevent; unsigned int ctrl = 0; + /* Calculate and program a divisor */ if (khz * 1000 > 0x100000 * HZ) { khz /= 256; ctrl |= TIMER_CTRL_DIV256; @@ -425,17 +423,14 @@ static void integrator_clockevent_init(u32 khz) khz /= 16; ctrl |= TIMER_CTRL_DIV16; } - timer_reload = khz * 1000 / HZ; writel(ctrl, clkevt_base + TIMER_CTRL); - evt->irq = IRQ_TIMERINT1; - evt->mult = div_sc(khz, NSEC_PER_MSEC, evt->shift); - evt->max_delta_ns = clockevent_delta2ns(0xffff, evt); - evt->min_delta_ns = clockevent_delta2ns(0xf, evt); - setup_irq(IRQ_TIMERINT1, &integrator_timer_irq); - clockevents_register_device(evt); + clockevents_config_and_register(&integrator_clockevent, + khz * 1000, + 1, + 0xffffU); } /* -- cgit v1.2.3 From bb76079a7859fb33a23bef405517b6b653d9f649 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 8 Sep 2011 21:23:15 +0100 Subject: ARM: 7087/2: mach-integrator: get timer frequency from clock We already have a clock definition for the 24MHz clock in the Integrator, use that instead of some unclear defines from the platform.h header. Also delete the senseless comment that the file shouldn't be edited, I just edited it and the world didn't come to an end, so it's obviously false. If anyone still has the mentioned ".s file" and the s2h awk script generating that header, raise your hand (and give me your files). Acked-by: Thomas Gleixner Signed-off-by: Linus Walleij Signed-off-by: Russell King --- arch/arm/mach-integrator/core.c | 4 +++ arch/arm/mach-integrator/include/mach/platform.h | 12 -------- arch/arm/mach-integrator/integrator_ap.c | 37 +++++++++++++++--------- 3 files changed, 27 insertions(+), 26 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index 77315b995681..82ebc8d772d3 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c @@ -126,6 +126,10 @@ static struct clk_lookup lookups[] = { { /* Bus clock */ .con_id = "apb_pclk", .clk = &dummy_apb_pclk, + }, { + /* Integrator/AP timer frequency */ + .dev_id = "ap_timer", + .clk = &clk24mhz, }, { /* UART0 */ .dev_id = "mb:16", .clk = &uartclk, diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h index 5e6ea5cfea6e..ec467baade09 100644 --- a/arch/arm/mach-integrator/include/mach/platform.h +++ b/arch/arm/mach-integrator/include/mach/platform.h @@ -13,9 +13,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -/* DO NOT EDIT!! - this file automatically generated - * from .s file by awk -f s2h.awk - */ /************************************************************************** * * Copyright © ARM Limited 1998. All rights reserved. * ***********************************************************************/ @@ -399,15 +396,6 @@ #define INTEGRATOR_TIMER1_BASE (INTEGRATOR_CT_BASE + 0x100) #define INTEGRATOR_TIMER2_BASE (INTEGRATOR_CT_BASE + 0x200) -#define TICKS_PER_uSEC 24 - -/* - * These are useconds NOT ticks. - * - */ -#define mSEC_1 1000 -#define mSEC_10 (mSEC_1 * 10) - #define INTEGRATOR_CSR_BASE 0x10000000 #define INTEGRATOR_CSR_SIZE 0x10000000 diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 0a6f397f1222..8dca5a7ab370 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include @@ -322,13 +323,14 @@ static void __init ap_init(void) static unsigned long timer_reload; -static void integrator_clocksource_init(u32 khz) +static void integrator_clocksource_init(unsigned long inrate) { void __iomem *base = (void __iomem *)TIMER2_VA_BASE; u32 ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC; + unsigned long rate = inrate; - if (khz >= 1500) { - khz /= 16; + if (rate >= 1500000) { + rate /= 16; ctrl |= TIMER_CTRL_DIV16; } @@ -336,7 +338,7 @@ static void integrator_clocksource_init(u32 khz) writel(ctrl, base + TIMER_CTRL); clocksource_mmio_init(base + TIMER_VALUE, "timer2", - khz * 1000, 200, 16, clocksource_mmio_readl_down); + rate, 200, 16, clocksource_mmio_readl_down); } static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE; @@ -411,24 +413,25 @@ static struct irqaction integrator_timer_irq = { .dev_id = &integrator_clockevent, }; -static void integrator_clockevent_init(u32 khz) +static void integrator_clockevent_init(unsigned long inrate) { + unsigned long rate = inrate; unsigned int ctrl = 0; /* Calculate and program a divisor */ - if (khz * 1000 > 0x100000 * HZ) { - khz /= 256; + if (rate > 0x100000 * HZ) { + rate /= 256; ctrl |= TIMER_CTRL_DIV256; - } else if (khz * 1000 > 0x10000 * HZ) { - khz /= 16; + } else if (rate > 0x10000 * HZ) { + rate /= 16; ctrl |= TIMER_CTRL_DIV16; } - timer_reload = khz * 1000 / HZ; + timer_reload = rate / HZ; writel(ctrl, clkevt_base + TIMER_CTRL); setup_irq(IRQ_TIMERINT1, &integrator_timer_irq); clockevents_config_and_register(&integrator_clockevent, - khz * 1000, + rate, 1, 0xffffU); } @@ -438,14 +441,20 @@ static void integrator_clockevent_init(u32 khz) */ static void __init ap_init_timer(void) { - u32 khz = TICKS_PER_uSEC * 1000; + struct clk *clk; + unsigned long rate; + + clk = clk_get_sys("ap_timer", NULL); + BUG_ON(IS_ERR(clk)); + clk_enable(clk); + rate = clk_get_rate(clk); writel(0, TIMER0_VA_BASE + TIMER_CTRL); writel(0, TIMER1_VA_BASE + TIMER_CTRL); writel(0, TIMER2_VA_BASE + TIMER_CTRL); - integrator_clocksource_init(khz); - integrator_clockevent_init(khz); + integrator_clocksource_init(rate); + integrator_clockevent_init(rate); } static struct sys_timer ap_timer = { -- cgit v1.2.3 From a675002c797815ec5df4a89748d8cab83158b11d Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 27 Sep 2011 06:41:19 +0100 Subject: ARM: 7102/1: mach-integrator: update defconfig Update the Integrator defconfig with some sensible defaults: - Compile a combined image supporting Integrator/AP and Integrator/CP, with the core modules CM720, CM920, CM922, CM926, CM1020, CM1022 and CM1026 in a single image, this works just fine and gives some nice compilation coverage - NOHZ (tickless) and HRTIMERS turned on - Compile using EABI, let's assume recent compilers are used now (tested using GCC 4.4.1) - Remove forced 32MiB at command line, the bootloader usually knows this better, and my U-Boot patches nowadays make that boot loader pass the correct adjusted value - Enable the MTD Physmap flash driver, so that the changes done earlier by Marc Zyngier replacing integrator-flash takes effect - Enable the PL030 RTC driver that has not been default-compiled with any config for a while This has been tested on the real hardware Integrator AP with both an ARM920T and ARM926EJ-S core module. Cc: Marc Zyngier Signed-off-by: Linus Walleij Signed-off-by: Russell King --- arch/arm/configs/integrator_defconfig | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/configs/integrator_defconfig b/arch/arm/configs/integrator_defconfig index 7196ade07e27..1103f62a1964 100644 --- a/arch/arm/configs/integrator_defconfig +++ b/arch/arm/configs/integrator_defconfig @@ -1,5 +1,6 @@ CONFIG_EXPERIMENTAL=y CONFIG_SYSVIPC=y +CONFIG_TINY_RCU=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 @@ -8,20 +9,29 @@ CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_ARCH_INTEGRATOR=y CONFIG_ARCH_INTEGRATOR_AP=y +CONFIG_ARCH_INTEGRATOR_CP=y CONFIG_CPU_ARM720T=y CONFIG_CPU_ARM920T=y +CONFIG_CPU_ARM922T=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_ARM1020=y +CONFIG_CPU_ARM1022=y +CONFIG_CPU_ARM1026=y CONFIG_PCI=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y CONFIG_LEDS=y CONFIG_LEDS_CPU=y CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="console=ttyAM0,38400n8 root=/dev/nfs ip=bootp mem=32M" +CONFIG_CMDLINE="console=ttyAM0,38400n8 root=/dev/nfs ip=bootp" CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_GOV_POWERSAVE=y CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_FPE_NWFPE=y -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -32,7 +42,6 @@ CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_BOOTP=y # CONFIG_IPV6 is not set CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_AFS_PARTS=y CONFIG_MTD_CHAR=y @@ -40,6 +49,7 @@ CONFIG_MTD_BLOCK=y CONFIG_MTD_CFI=y CONFIG_MTD_CFI_ADV_OPTIONS=y CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_PHYSMAP=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=8192 @@ -56,6 +66,8 @@ CONFIG_FB_MODE_HELPERS=y CONFIG_FB_MATROX=y CONFIG_FB_MATROX_MILLENIUM=y CONFIG_FB_MATROX_MYSTIQUE=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_PL030=y CONFIG_EXT2_FS=y CONFIG_TMPFS=y CONFIG_JFFS2_FS=y @@ -68,4 +80,3 @@ CONFIG_NFSD_V3=y CONFIG_PARTITION_ADVANCED=y CONFIG_MAGIC_SYSRQ=y CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_ERRORS=y -- cgit v1.2.3 From 87e040b6456fd3416a1f6831c1eedaef5c0a94ff Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 16 Aug 2011 23:44:26 +0100 Subject: ARM: 7017/1: Use generic BUG() handler ARM uses its own BUG() handler which makes its output slightly different from other archtectures. One of the problems is that the ARM implementation doesn't report the function with the BUG() in it, but always reports the PC being in __bug(). The generic implementation doesn't have this problem. Currently we get something like: kernel BUG at fs/proc/breakme.c:35! Unable to handle kernel NULL pointer dereference at virtual address 00000000 ... PC is at __bug+0x20/0x2c With this patch it displays: kernel BUG at fs/proc/breakme.c:35! Internal error: Oops - undefined instruction: 0 [#1] PREEMPT SMP ... PC is at write_breakme+0xd0/0x1b4 This implementation uses an undefined instruction to implement BUG, and sets up a bug table containing the relevant information. Many versions of gcc do not support %c properly for ARM (inserting a # when they shouldn't) so we work around this using distasteful macro magic. v1: Initial version to replace existing ARM BUG() implementation with something more similar to other architectures. v2: Add Thumb support, remove backtrace whitespace output changes. Change to use macros instead of requiring the asm %d flag to work (thanks to Dave Martin ) v3: Remove old BUG() implementation in favor of this one. Remove the Backtrace: message (will submit this separately). Use ARM_EXIT_KEEP() so that some architectures can dump exit text at link time thanks to Stephen Boyd (although since we always define GENERIC_BUG this might be academic.) Rebase to linux-2.6.git master. v4: Allow BUGS in modules (these were not reported correctly in v3) (thanks to Stephen Boyd for suggesting that.) Remove __bug() as this is no longer needed. v5: Add %progbits as the section flags. Signed-off-by: Simon Glass Reviewed-by: Stephen Boyd Tested-by: Stephen Boyd Signed-off-by: Russell King --- arch/arm/Kconfig | 4 ++++ arch/arm/include/asm/bug.h | 55 ++++++++++++++++++++++++++++++++++++------- arch/arm/kernel/traps.c | 31 ++++++++++++++++-------- arch/arm/kernel/vmlinux.lds.S | 3 ++- 4 files changed, 73 insertions(+), 20 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3269576dbfa8..1412da8ccf05 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -215,6 +215,10 @@ config ARM_PATCH_PHYS_VIRT_16BIT to allow physical memory down to a theoretical minimum of 64K boundaries. +config GENERIC_BUG + def_bool y + depends on BUG + source "init/Kconfig" source "kernel/Kconfig.freezer" diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h index 4d88425a4169..9abe7a07d5ac 100644 --- a/arch/arm/include/asm/bug.h +++ b/arch/arm/include/asm/bug.h @@ -3,21 +3,58 @@ #ifdef CONFIG_BUG -#ifdef CONFIG_DEBUG_BUGVERBOSE -extern void __bug(const char *file, int line) __attribute__((noreturn)); - -/* give file/line information */ -#define BUG() __bug(__FILE__, __LINE__) +/* + * Use a suitable undefined instruction to use for ARM/Thumb2 bug handling. + * We need to be careful not to conflict with those used by other modules and + * the register_undef_hook() system. + */ +#ifdef CONFIG_THUMB2_KERNEL +#define BUG_INSTR_VALUE 0xde02 +#define BUG_INSTR_TYPE ".hword " #else +#define BUG_INSTR_VALUE 0xe7f001f2 +#define BUG_INSTR_TYPE ".word " +#endif -/* this just causes an oops */ -#define BUG() do { *(int *)0 = 0; } while (1) -#endif +#define BUG() _BUG(__FILE__, __LINE__, BUG_INSTR_VALUE) +#define _BUG(file, line, value) __BUG(file, line, value) + +#ifdef CONFIG_DEBUG_BUGVERBOSE + +/* + * The extra indirection is to ensure that the __FILE__ string comes through + * OK. Many version of gcc do not support the asm %c parameter which would be + * preferable to this unpleasantness. We use mergeable string sections to + * avoid multiple copies of the string appearing in the kernel image. + */ + +#define __BUG(__file, __line, __value) \ +do { \ + BUILD_BUG_ON(sizeof(struct bug_entry) != 12); \ + asm volatile("1:\t" BUG_INSTR_TYPE #__value "\n" \ + ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \ + "2:\t.asciz " #__file "\n" \ + ".popsection\n" \ + ".pushsection __bug_table,\"a\"\n" \ + "3:\t.word 1b, 2b\n" \ + "\t.hword " #__line ", 0\n" \ + ".popsection"); \ + unreachable(); \ +} while (0) + +#else /* not CONFIG_DEBUG_BUGVERBOSE */ + +#define __BUG(__file, __line, __value) \ +do { \ + asm volatile(BUG_INSTR_TYPE #__value); \ + unreachable(); \ +} while (0) +#endif /* CONFIG_DEBUG_BUGVERBOSE */ #define HAVE_ARCH_BUG -#endif +#endif /* CONFIG_BUG */ #include diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index bc9f9da782cb..74969248c375 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -270,6 +271,8 @@ void die(const char *str, struct pt_regs *regs, int err) spin_lock_irq(&die_lock); console_verbose(); bust_spinlocks(1); + if (!user_mode(regs)) + report_bug(regs->ARM_pc, regs); ret = __die(str, err, thread, regs); if (regs && kexec_should_crash(thread->task)) @@ -301,6 +304,24 @@ void arm_notify_die(const char *str, struct pt_regs *regs, } } +#ifdef CONFIG_GENERIC_BUG + +int is_valid_bugaddr(unsigned long pc) +{ +#ifdef CONFIG_THUMB2_KERNEL + unsigned short bkpt; +#else + unsigned long bkpt; +#endif + + if (probe_kernel_address((unsigned *)pc, bkpt)) + return 0; + + return bkpt == BUG_INSTR_VALUE; +} + +#endif + static LIST_HEAD(undef_hook); static DEFINE_SPINLOCK(undef_lock); @@ -706,16 +727,6 @@ baddataabort(int code, unsigned long instr, struct pt_regs *regs) arm_notify_die("unknown data abort code", regs, &info, instr, 0); } -void __attribute__((noreturn)) __bug(const char *file, int line) -{ - printk(KERN_CRIT"kernel BUG at %s:%d!\n", file, line); - *(int *)0 = 0; - - /* Avoid "noreturn function does return" */ - for (;;); -} -EXPORT_SYMBOL(__bug); - void __readwrite_bug(const char *fn) { printk("%s called, but not implemented\n", fn); diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index bf977f8514f6..7b2541efd9f8 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S @@ -21,7 +21,8 @@ #define ARM_CPU_KEEP(x) #endif -#if defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK) +#if (defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)) || \ + defined(CONFIG_GENERIC_BUG) #define ARM_EXIT_KEEP(x) x #else #define ARM_EXIT_KEEP(x) -- cgit v1.2.3 From 0744a3ee37784dfda0025963716a36c3f1e3adcc Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 20 Dec 2010 10:37:50 +0000 Subject: ARM: platform fixups: remove mdesc argument to fixup function Get rid of the mdesc pointer in the fixup function call. No one uses the mdesc pointer, it shouldn't be modified anyway, and we can't wrap it, so let's remove it. Platform files found by: $ regexp=$(git grep -h '\.fixup.*=' arch/arm | sed 's!.*= *\([^,]*\),* *!\1!' | sort -u | tr '\n' '|' | sed 's,|$,,;s,|,\\|,g') $ git grep $regexp arch/arm Acked-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/include/asm/mach/arch.h | 3 +-- arch/arm/kernel/setup.c | 2 +- arch/arm/mach-bcmring/arch.c | 4 ++-- arch/arm/mach-clps711x/clep7312.c | 3 +-- arch/arm/mach-clps711x/edb7211-arch.c | 3 +-- arch/arm/mach-clps711x/fortunet.c | 3 +-- arch/arm/mach-clps711x/p720t.c | 3 +-- arch/arm/mach-footbridge/cats-hw.c | 3 +-- arch/arm/mach-footbridge/netwinder-hw.c | 3 +-- arch/arm/mach-msm/board-halibut.c | 4 ++-- arch/arm/mach-msm/board-mahimahi.c | 4 ++-- arch/arm/mach-msm/board-sapphire.c | 4 ++-- arch/arm/mach-msm/board-trout.c | 4 ++-- arch/arm/mach-orion5x/common.c | 4 ++-- arch/arm/mach-orion5x/common.h | 4 +--- arch/arm/mach-pxa/cm-x300.c | 4 ++-- arch/arm/mach-pxa/corgi.c | 4 ++-- arch/arm/mach-pxa/eseries.c | 3 +-- arch/arm/mach-pxa/eseries.h | 3 +-- arch/arm/mach-pxa/poodle.c | 4 ++-- arch/arm/mach-pxa/spitz.c | 4 ++-- arch/arm/mach-pxa/tosa.c | 4 ++-- arch/arm/mach-realview/core.c | 3 +-- arch/arm/mach-realview/core.h | 4 ++-- arch/arm/mach-realview/realview_pb1176.c | 3 +-- arch/arm/mach-realview/realview_pbx.c | 6 +++--- arch/arm/mach-s3c2412/mach-smdk2413.c | 3 +-- arch/arm/mach-s3c2412/mach-vstms.c | 5 ++--- arch/arm/mach-sa1100/assabet.c | 3 +-- arch/arm/mach-tegra/board-harmony.c | 4 ++-- arch/arm/mach-tegra/board-paz00.c | 4 ++-- arch/arm/mach-tegra/board-trimslice.c | 4 ++-- 32 files changed, 50 insertions(+), 66 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h index 217aa1911dd7..c5699987fa98 100644 --- a/arch/arm/include/asm/mach/arch.h +++ b/arch/arm/include/asm/mach/arch.h @@ -34,8 +34,7 @@ struct machine_desc { unsigned int reserve_lp1 :1; /* never has lp1 */ unsigned int reserve_lp2 :1; /* never has lp2 */ unsigned int soft_reboot :1; /* soft reboot */ - void (*fixup)(struct machine_desc *, - struct tag *, char **, + void (*fixup)(struct tag *, char **, struct meminfo *); void (*reserve)(void);/* reserve mem blocks */ void (*map_io)(void);/* IO mapping function */ diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 10fce616e995..93e39a3d2c1e 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -879,7 +879,7 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr) } if (mdesc->fixup) - mdesc->fixup(mdesc, tags, &from, &meminfo); + mdesc->fixup(tags, &from, &meminfo); if (tags->hdr.tag == ATAG_CORE) { if (meminfo.nr_banks != 0) diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c index a604b9ebb501..31a143592c81 100644 --- a/arch/arm/mach-bcmring/arch.c +++ b/arch/arm/mach-bcmring/arch.c @@ -136,8 +136,8 @@ static void __init bcmring_init_machine(void) * *****************************************************************************/ -static void __init bcmring_fixup(struct machine_desc *desc, - struct tag *t, char **cmdline, struct meminfo *mi) { +static void __init bcmring_fixup(struct tag *t, char **cmdline, + struct meminfo *mi) { #ifdef CONFIG_BLK_DEV_INITRD printk(KERN_NOTICE "bcmring_fixup\n"); t->hdr.tag = ATAG_CORE; diff --git a/arch/arm/mach-clps711x/clep7312.c b/arch/arm/mach-clps711x/clep7312.c index 67b5abb4a60a..0a2e74feb24a 100644 --- a/arch/arm/mach-clps711x/clep7312.c +++ b/arch/arm/mach-clps711x/clep7312.c @@ -26,8 +26,7 @@ #include "common.h" static void __init -fixup_clep7312(struct machine_desc *desc, struct tag *tags, - char **cmdline, struct meminfo *mi) +fixup_clep7312(struct tag *tags, char **cmdline, struct meminfo *mi) { mi->nr_banks=1; mi->bank[0].start = 0xc0000000; diff --git a/arch/arm/mach-clps711x/edb7211-arch.c b/arch/arm/mach-clps711x/edb7211-arch.c index 98ca5b2e940d..725a7a54ba42 100644 --- a/arch/arm/mach-clps711x/edb7211-arch.c +++ b/arch/arm/mach-clps711x/edb7211-arch.c @@ -37,8 +37,7 @@ static void __init edb7211_reserve(void) } static void __init -fixup_edb7211(struct machine_desc *desc, struct tag *tags, - char **cmdline, struct meminfo *mi) +fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi) { /* * Bank start addresses are not present in the information diff --git a/arch/arm/mach-clps711x/fortunet.c b/arch/arm/mach-clps711x/fortunet.c index b1cb479e71e9..1947b30f9b8c 100644 --- a/arch/arm/mach-clps711x/fortunet.c +++ b/arch/arm/mach-clps711x/fortunet.c @@ -57,8 +57,7 @@ typedef struct tag_IMAGE_PARAMS #define IMAGE_PARAMS_PHYS 0xC01F0000 static void __init -fortunet_fixup(struct machine_desc *desc, struct tag *tags, - char **cmdline, struct meminfo *mi) +fortunet_fixup(struct tag *tags, char **cmdline, struct meminfo *mi) { IMAGE_PARAMS *ip = phys_to_virt(IMAGE_PARAMS_PHYS); *cmdline = phys_to_virt(ip->command_line); diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c index cefbce0480b9..3f796e0d3284 100644 --- a/arch/arm/mach-clps711x/p720t.c +++ b/arch/arm/mach-clps711x/p720t.c @@ -56,8 +56,7 @@ static struct map_desc p720t_io_desc[] __initdata = { }; static void __init -fixup_p720t(struct machine_desc *desc, struct tag *tag, - char **cmdline, struct meminfo *mi) +fixup_p720t(struct tag *tag, char **cmdline, struct meminfo *mi) { /* * Our bootloader doesn't setup any tags (yet). diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c index 5b1a8db779be..206ff2f39d6c 100644 --- a/arch/arm/mach-footbridge/cats-hw.c +++ b/arch/arm/mach-footbridge/cats-hw.c @@ -76,8 +76,7 @@ __initcall(cats_hw_init); * hard reboots fail on early boards. */ static void __init -fixup_cats(struct machine_desc *desc, struct tag *tags, - char **cmdline, struct meminfo *mi) +fixup_cats(struct tag *tags, char **cmdline, struct meminfo *mi) { screen_info.orig_video_lines = 25; screen_info.orig_video_points = 16; diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c index 06e514f372d0..4cbc2e65ce3a 100644 --- a/arch/arm/mach-footbridge/netwinder-hw.c +++ b/arch/arm/mach-footbridge/netwinder-hw.c @@ -631,8 +631,7 @@ __initcall(nw_hw_init); * the parameter page. */ static void __init -fixup_netwinder(struct machine_desc *desc, struct tag *tags, - char **cmdline, struct meminfo *mi) +fixup_netwinder(struct tag *tags, char **cmdline, struct meminfo *mi) { #ifdef CONFIG_ISAPNP extern int isapnp_disable; diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c index 18a3c97bc863..f81ef1f9d46f 100644 --- a/arch/arm/mach-msm/board-halibut.c +++ b/arch/arm/mach-msm/board-halibut.c @@ -78,8 +78,8 @@ static void __init halibut_init(void) platform_add_devices(devices, ARRAY_SIZE(devices)); } -static void __init halibut_fixup(struct machine_desc *desc, struct tag *tags, - char **cmdline, struct meminfo *mi) +static void __init halibut_fixup(struct tag *tags, char **cmdline, + struct meminfo *mi) { mi->nr_banks=1; mi->bank[0].start = PHYS_OFFSET; diff --git a/arch/arm/mach-msm/board-mahimahi.c b/arch/arm/mach-msm/board-mahimahi.c index 7a9a03eb189c..1df15aa3c66d 100644 --- a/arch/arm/mach-msm/board-mahimahi.c +++ b/arch/arm/mach-msm/board-mahimahi.c @@ -53,8 +53,8 @@ static void __init mahimahi_init(void) platform_add_devices(devices, ARRAY_SIZE(devices)); } -static void __init mahimahi_fixup(struct machine_desc *desc, struct tag *tags, - char **cmdline, struct meminfo *mi) +static void __init mahimahi_fixup(struct tag *tags, char **cmdline, + struct meminfo *mi) { mi->nr_banks = 2; mi->bank[0].start = PHYS_OFFSET; diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c index 68f930f07d77..c6e043c896aa 100644 --- a/arch/arm/mach-msm/board-sapphire.c +++ b/arch/arm/mach-msm/board-sapphire.c @@ -77,8 +77,8 @@ static struct map_desc sapphire_io_desc[] __initdata = { } }; -static void __init sapphire_fixup(struct machine_desc *desc, struct tag *tags, - char **cmdline, struct meminfo *mi) +static void __init sapphire_fixup(struct tag *tags, char **cmdline, + struct meminfo *mi) { int smi_sz = parse_tag_smi((const struct tag *)tags); diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c index 814386772c66..7acd2021ada9 100644 --- a/arch/arm/mach-msm/board-trout.c +++ b/arch/arm/mach-msm/board-trout.c @@ -48,8 +48,8 @@ static void __init trout_init_irq(void) msm_init_irq(); } -static void __init trout_fixup(struct machine_desc *desc, struct tag *tags, - char **cmdline, struct meminfo *mi) +static void __init trout_fixup(struct tag *tags, char **cmdline, + struct meminfo *mi) { mi->nr_banks = 1; mi->bank[0].start = PHYS_OFFSET; diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 0ab531d047fc..22ace0bf2f92 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -308,8 +308,8 @@ void __init orion5x_init(void) * Many orion-based systems have buggy bootloader implementations. * This is a common fixup for bogus memory tags. */ -void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t, - char **from, struct meminfo *meminfo) +void __init tag_fixup_mem32(struct tag *t, char **from, + struct meminfo *meminfo) { for (; t->hdr.size; t = tag_next(t)) if (t->hdr.tag == ATAG_MEM && diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h index 3e5499dda49a..909489f4d23e 100644 --- a/arch/arm/mach-orion5x/common.h +++ b/arch/arm/mach-orion5x/common.h @@ -53,11 +53,9 @@ int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys); struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys); int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); -struct machine_desc; struct meminfo; struct tag; -extern void __init tag_fixup_mem32(struct machine_desc *, struct tag *, - char **, struct meminfo *); +extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *); #endif diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index b6a51340270b..d940e8a72270 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -839,8 +839,8 @@ static void __init cm_x300_init(void) cm_x300_init_bl(); } -static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags, - char **cmdline, struct meminfo *mi) +static void __init cm_x300_fixup(struct tag *tags, char **cmdline, + struct meminfo *mi) { /* Make sure that mi->bank[0].start = PHYS_ADDR */ for (; tags->hdr.size; tags = tag_next(tags)) diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 185a37cad254..3e9483b06053 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c @@ -705,8 +705,8 @@ static void __init corgi_init(void) platform_add_devices(devices, ARRAY_SIZE(devices)); } -static void __init fixup_corgi(struct machine_desc *desc, - struct tag *tags, char **cmdline, struct meminfo *mi) +static void __init fixup_corgi(struct tag *tags, char **cmdline, + struct meminfo *mi) { sharpsl_save_param(); mi->nr_banks=1; diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c index b4599ec9d619..e4a1f4dc89ff 100644 --- a/arch/arm/mach-pxa/eseries.c +++ b/arch/arm/mach-pxa/eseries.c @@ -41,8 +41,7 @@ #include "clock.h" /* Only e800 has 128MB RAM */ -void __init eseries_fixup(struct machine_desc *desc, - struct tag *tags, char **cmdline, struct meminfo *mi) +void __init eseries_fixup(struct tag *tags, char **cmdline, struct meminfo *mi) { mi->nr_banks=1; mi->bank[0].start = 0xa0000000; diff --git a/arch/arm/mach-pxa/eseries.h b/arch/arm/mach-pxa/eseries.h index 5930f5e2a123..be921965e91a 100644 --- a/arch/arm/mach-pxa/eseries.h +++ b/arch/arm/mach-pxa/eseries.h @@ -1,5 +1,4 @@ -void __init eseries_fixup(struct machine_desc *desc, - struct tag *tags, char **cmdline, struct meminfo *mi); +void __init eseries_fixup(struct tag *tags, char **cmdline, struct meminfo *mi); extern struct pxa2xx_udc_mach_info e7xx_udc_mach_info; extern struct pxaficp_platform_data e7xx_ficp_platform_data; diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index a113ea9ab4ab..948ce3e729fa 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -454,8 +454,8 @@ static void __init poodle_init(void) poodle_init_spi(); } -static void __init fixup_poodle(struct machine_desc *desc, - struct tag *tags, char **cmdline, struct meminfo *mi) +static void __init fixup_poodle(struct tag *tags, char **cmdline, + struct meminfo *mi) { sharpsl_save_param(); mi->nr_banks=1; diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 438c7b5e451f..d8dec9113aad 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -970,8 +970,8 @@ static void __init spitz_init(void) spitz_i2c_init(); } -static void __init spitz_fixup(struct machine_desc *desc, - struct tag *tags, char **cmdline, struct meminfo *mi) +static void __init spitz_fixup(struct tag *tags, char **cmdline, + struct meminfo *mi) { sharpsl_save_param(); mi->nr_banks = 1; diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 9f69a2682693..402b0c96613b 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -960,8 +960,8 @@ static void __init tosa_init(void) platform_add_devices(devices, ARRAY_SIZE(devices)); } -static void __init fixup_tosa(struct machine_desc *desc, - struct tag *tags, char **cmdline, struct meminfo *mi) +static void __init fixup_tosa(struct tag *tags, char **cmdline, + struct meminfo *mi) { sharpsl_save_param(); mi->nr_banks=1; diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index 5c23450d2d1d..d5ed5d4f77d6 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c @@ -517,8 +517,7 @@ void __init realview_timer_init(unsigned int timer_irq) /* * Setup the memory banks. */ -void realview_fixup(struct machine_desc *mdesc, struct tag *tags, char **from, - struct meminfo *meminfo) +void realview_fixup(struct tag *tags, char **from, struct meminfo *meminfo) { /* * Most RealView platforms have 512MB contiguous RAM at 0x70000000. diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h index 5c83d1e87a03..47259c89a75e 100644 --- a/arch/arm/mach-realview/core.h +++ b/arch/arm/mach-realview/core.h @@ -63,8 +63,8 @@ extern int realview_flash_register(struct resource *res, u32 num); extern int realview_eth_register(const char *name, struct resource *res); extern int realview_usb_register(struct resource *res); extern void realview_init_early(void); -extern void realview_fixup(struct machine_desc *mdesc, struct tag *tags, - char **from, struct meminfo *meminfo); +extern void realview_fixup(struct tag *tags, char **from, + struct meminfo *meminfo); extern void (*realview_reset)(char); #endif diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index ad5671acb66a..de6b9fa89372 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c @@ -316,8 +316,7 @@ static void realview_pb1176_reset(char mode) __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl); } -static void realview_pb1176_fixup(struct machine_desc *mdesc, - struct tag *tags, char **from, +static void realview_pb1176_fixup(struct tag *tags, char **from, struct meminfo *meminfo) { /* diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index 363b0ab56150..3e1eb2eb8132 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c @@ -319,8 +319,8 @@ static struct sys_timer realview_pbx_timer = { .init = realview_pbx_timer_init, }; -static void realview_pbx_fixup(struct machine_desc *mdesc, struct tag *tags, - char **from, struct meminfo *meminfo) +static void realview_pbx_fixup(struct tag *tags, char **from, + struct meminfo *meminfo) { #ifdef CONFIG_SPARSEMEM /* @@ -335,7 +335,7 @@ static void realview_pbx_fixup(struct machine_desc *mdesc, struct tag *tags, meminfo->bank[2].size = SZ_256M; meminfo->nr_banks = 3; #else - realview_fixup(mdesc, tags, from, meminfo); + realview_fixup(tags, from, meminfo); #endif } diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c index 834cfb61bcfe..3391713e0c92 100644 --- a/arch/arm/mach-s3c2412/mach-smdk2413.c +++ b/arch/arm/mach-s3c2412/mach-smdk2413.c @@ -92,8 +92,7 @@ static struct platform_device *smdk2413_devices[] __initdata = { &s3c_device_usbgadget, }; -static void __init smdk2413_fixup(struct machine_desc *desc, - struct tag *tags, char **cmdline, +static void __init smdk2413_fixup(struct tag *tags, char **cmdline, struct meminfo *mi) { if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) { diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c index 83544ebe20ac..b6ed4573553a 100644 --- a/arch/arm/mach-s3c2412/mach-vstms.c +++ b/arch/arm/mach-s3c2412/mach-vstms.c @@ -129,9 +129,8 @@ static struct platform_device *vstms_devices[] __initdata = { &s3c_device_nand, }; -static void __init vstms_fixup(struct machine_desc *desc, - struct tag *tags, char **cmdline, - struct meminfo *mi) +static void __init vstms_fixup(struct tag *tags, char **cmdline, + struct meminfo *mi) { if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) { mi->nr_banks=1; diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index 26257df19b63..6290ce28b883 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c @@ -301,8 +301,7 @@ static void __init get_assabet_scr(void) } static void __init -fixup_assabet(struct machine_desc *desc, struct tag *tags, - char **cmdline, struct meminfo *mi) +fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi) { /* This must be done before any call to machine_has_neponset() */ map_sa1100_gpio_regs(); diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c index 846cd7d69e3e..c78ce41cca16 100644 --- a/arch/arm/mach-tegra/board-harmony.c +++ b/arch/arm/mach-tegra/board-harmony.c @@ -123,8 +123,8 @@ static struct platform_device *harmony_devices[] __initdata = { &harmony_audio_device, }; -static void __init tegra_harmony_fixup(struct machine_desc *desc, - struct tag *tags, char **cmdline, struct meminfo *mi) +static void __init tegra_harmony_fixup(struct tag *tags, char **cmdline, + struct meminfo *mi) { mi->nr_banks = 2; mi->bank[0].start = PHYS_OFFSET; diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c index ea2f79c9879b..5e6bc7719642 100644 --- a/arch/arm/mach-tegra/board-paz00.c +++ b/arch/arm/mach-tegra/board-paz00.c @@ -84,8 +84,8 @@ static void paz00_usb_init(void) platform_device_register(&tegra_ehci3_device); } -static void __init tegra_paz00_fixup(struct machine_desc *desc, - struct tag *tags, char **cmdline, struct meminfo *mi) +static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline, + struct meminfo *mi) { mi->nr_banks = 1; mi->bank[0].start = PHYS_OFFSET; diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c index 89a6d2adc1de..652c3404d0e2 100644 --- a/arch/arm/mach-tegra/board-trimslice.c +++ b/arch/arm/mach-tegra/board-trimslice.c @@ -126,8 +126,8 @@ static void trimslice_usb_init(void) platform_device_register(&tegra_ehci1_device); } -static void __init tegra_trimslice_fixup(struct machine_desc *desc, - struct tag *tags, char **cmdline, struct meminfo *mi) +static void __init tegra_trimslice_fixup(struct tag *tags, char **cmdline, + struct meminfo *mi) { mi->nr_banks = 2; mi->bank[0].start = PHYS_OFFSET; -- cgit v1.2.3 From 7f94e9cc5e965519d865bf20215036f359a1e299 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Tue, 23 Aug 2011 22:22:11 +0100 Subject: ARM: 7062/1: cache: detect PIPT I-cache using CTR The Cache Type Register L1Ip field identifies I-caches with a PIPT policy using the encoding 11b. This patch extends the cache policy parsing to identify PIPT I-caches correctly and prevent them from being treated as VIPT aliasing in cases where they are sufficiently large. Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/include/asm/cachetype.h | 5 ++++- arch/arm/kernel/setup.c | 15 +++++++++++++-- 2 files changed, 17 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/cachetype.h b/arch/arm/include/asm/cachetype.h index c023db09fcc1..7ea78144ae22 100644 --- a/arch/arm/include/asm/cachetype.h +++ b/arch/arm/include/asm/cachetype.h @@ -7,6 +7,7 @@ #define CACHEID_VIPT (CACHEID_VIPT_ALIASING|CACHEID_VIPT_NONALIASING) #define CACHEID_ASID_TAGGED (1 << 3) #define CACHEID_VIPT_I_ALIASING (1 << 4) +#define CACHEID_PIPT (1 << 5) extern unsigned int cacheid; @@ -16,6 +17,7 @@ extern unsigned int cacheid; #define cache_is_vipt_aliasing() cacheid_is(CACHEID_VIPT_ALIASING) #define icache_is_vivt_asid_tagged() cacheid_is(CACHEID_ASID_TAGGED) #define icache_is_vipt_aliasing() cacheid_is(CACHEID_VIPT_I_ALIASING) +#define icache_is_pipt() cacheid_is(CACHEID_PIPT) /* * __LINUX_ARM_ARCH__ is the minimum supported CPU architecture @@ -26,7 +28,8 @@ extern unsigned int cacheid; #if __LINUX_ARM_ARCH__ >= 7 #define __CACHEID_ARCH_MIN (CACHEID_VIPT_NONALIASING |\ CACHEID_ASID_TAGGED |\ - CACHEID_VIPT_I_ALIASING) + CACHEID_VIPT_I_ALIASING |\ + CACHEID_PIPT) #elif __LINUX_ARM_ARCH__ >= 6 #define __CACHEID_ARCH_MIN (~CACHEID_VIVT) #else diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 93e39a3d2c1e..3fe93f75b55a 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -265,6 +265,10 @@ static int cpu_has_aliasing_icache(unsigned int arch) int aliasing_icache; unsigned int id_reg, num_sets, line_size; + /* PIPT caches never alias. */ + if (icache_is_pipt()) + return 0; + /* arch specifies the register format */ switch (arch) { case CPU_ARCH_ARMv7: @@ -299,8 +303,14 @@ static void __init cacheid_init(void) /* ARMv7 register format */ arch = CPU_ARCH_ARMv7; cacheid = CACHEID_VIPT_NONALIASING; - if ((cachetype & (3 << 14)) == 1 << 14) + switch (cachetype & (3 << 14)) { + case (1 << 14): cacheid |= CACHEID_ASID_TAGGED; + break; + case (3 << 14): + cacheid |= CACHEID_PIPT; + break; + } } else { arch = CPU_ARCH_ARMv6; if (cachetype & (1 << 23)) @@ -317,10 +327,11 @@ static void __init cacheid_init(void) printk("CPU: %s data cache, %s instruction cache\n", cache_is_vivt() ? "VIVT" : cache_is_vipt_aliasing() ? "VIPT aliasing" : - cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown", + cache_is_vipt_nonaliasing() ? "PIPT / VIPT nonaliasing" : "unknown", cache_is_vivt() ? "VIVT" : icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" : icache_is_vipt_aliasing() ? "VIPT aliasing" : + icache_is_pipt() ? "PIPT" : cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown"); } -- cgit v1.2.3 From 2b034922af2caa19df86f0c502e76cb6f6e910f9 Mon Sep 17 00:00:00 2001 From: Lei Wen Date: Fri, 23 Sep 2011 09:04:09 +0100 Subject: ARM: 7098/1: kdump: copy kernel relocation code at the kexec prepare stage This copy really don't need to do at the very second before the kernel would crash. Signed-off-by: Lei Wen Acked-by: Simon Horman Signed-off-by: Russell King --- arch/arm/kernel/machine_kexec.c | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c index e59bbd496c39..c1b4463dcc83 100644 --- a/arch/arm/kernel/machine_kexec.c +++ b/arch/arm/kernel/machine_kexec.c @@ -32,6 +32,24 @@ static atomic_t waiting_for_crash_ipi; int machine_kexec_prepare(struct kimage *image) { + unsigned long page_list; + void *reboot_code_buffer; + page_list = image->head & PAGE_MASK; + + reboot_code_buffer = page_address(image->control_code_page); + + /* Prepare parameters for reboot_code_buffer*/ + kexec_start_address = image->start; + kexec_indirection_page = page_list; + kexec_mach_type = machine_arch_type; + kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET; + + /* copy our kernel relocation code to the control code page */ + memcpy(reboot_code_buffer, + relocate_new_kernel, relocate_new_kernel_size); + + flush_icache_range((unsigned long) reboot_code_buffer, + (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE); return 0; } @@ -82,31 +100,14 @@ void (*kexec_reinit)(void); void machine_kexec(struct kimage *image) { - unsigned long page_list; unsigned long reboot_code_buffer_phys; void *reboot_code_buffer; - - page_list = image->head & PAGE_MASK; - /* we need both effective and real address here */ reboot_code_buffer_phys = page_to_pfn(image->control_code_page) << PAGE_SHIFT; reboot_code_buffer = page_address(image->control_code_page); - /* Prepare parameters for reboot_code_buffer*/ - kexec_start_address = image->start; - kexec_indirection_page = page_list; - kexec_mach_type = machine_arch_type; - kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET; - - /* copy our kernel relocation code to the control code page */ - memcpy(reboot_code_buffer, - relocate_new_kernel, relocate_new_kernel_size); - - - flush_icache_range((unsigned long) reboot_code_buffer, - (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE); printk(KERN_INFO "Bye!\n"); if (kexec_reinit) -- cgit v1.2.3 From 0ec5a95bbb8ba0b95506693a6bc0de72f1b5d969 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 6 Sep 2011 07:50:20 +0100 Subject: ARM: 6217/4: mach-realview: expose PB1176 ROM using physmap and map_rom This exposes the PB1176 ROM if you compile in the MTD physmap mapping and also the map_rom chiptype. Signed-off-by: Linus Walleij Signed-off-by: Russell King --- arch/arm/mach-realview/include/mach/board-pb1176.h | 1 + arch/arm/mach-realview/realview_pb1176.c | 45 ++++++++++++++++++---- 2 files changed, 38 insertions(+), 8 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-realview/include/mach/board-pb1176.h b/arch/arm/mach-realview/include/mach/board-pb1176.h index 002ab5d8c11c..2a15fef94730 100644 --- a/arch/arm/mach-realview/include/mach/board-pb1176.h +++ b/arch/arm/mach-realview/include/mach/board-pb1176.h @@ -70,6 +70,7 @@ #define REALVIEW_DC1176_GIC_CPU_BASE 0x10120000 /* GIC CPU interface, on devchip */ #define REALVIEW_DC1176_GIC_DIST_BASE 0x10121000 /* GIC distributor, on devchip */ +#define REALVIEW_DC1176_ROM_BASE 0x10200000 /* 16KiB NRAM preudo-ROM, on devchip */ #define REALVIEW_PB1176_GIC_CPU_BASE 0x10040000 /* GIC CPU interface, on FPGA */ #define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */ #define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */ diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index de6b9fa89372..865d440fcf58 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c @@ -26,6 +26,8 @@ #include #include #include +#include +#include #include #include @@ -204,22 +206,48 @@ static struct amba_device *amba_devs[] __initdata = { * RealView PB1176 platform devices */ static struct resource realview_pb1176_flash_resources[] = { - [0] = { + { .start = REALVIEW_PB1176_FLASH_BASE, .end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1, .flags = IORESOURCE_MEM, }, - [1] = { +#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH + { .start = REALVIEW_PB1176_SEC_FLASH_BASE, .end = REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1, .flags = IORESOURCE_MEM, }, -}; -#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH -#define PB1176_FLASH_BLOCKS 2 -#else -#define PB1176_FLASH_BLOCKS 1 #endif +}; + +static struct physmap_flash_data pb1176_rom_pdata = { + .probe_type = "map_rom", + .width = 4, + .nr_parts = 0, +}; + +static struct resource pb1176_rom_resources[] = { + /* + * This exposes the PB1176 DevChip ROM as an MTD ROM mapping. + * The reference manual states that this is actually a pseudo-ROM + * programmed in NVRAM. + */ + { + .start = REALVIEW_DC1176_ROM_BASE, + .end = REALVIEW_DC1176_ROM_BASE + SZ_16K - 1, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device pb1176_rom_device = { + .name = "physmap-flash", + .id = -1, + .num_resources = ARRAY_SIZE(pb1176_rom_resources), + .resource = pb1176_rom_resources, + .dev = { + .platform_data = &pb1176_rom_pdata, + }, +}; static struct resource realview_pb1176_smsc911x_resources[] = { [0] = { @@ -337,7 +365,8 @@ static void __init realview_pb1176_init(void) #endif realview_flash_register(realview_pb1176_flash_resources, - PB1176_FLASH_BLOCKS); + ARRAY_SIZE(realview_pb1176_flash_resources)); + platform_device_register(&pb1176_rom_device); realview_eth_register(NULL, realview_pb1176_smsc911x_resources); platform_device_register(&realview_i2c_device); realview_usb_register(realview_pb1176_isp1761_resources); -- cgit v1.2.3 From b0c1264f534a1cb3c52036a23a04d238434a0df6 Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Tue, 4 Oct 2011 03:44:07 +0100 Subject: ARM: 7118/1: rename temp variable in read*_relaxed() This resolves the following sparse warning from readl() and other macros, which ends up embedding readl_relaxed() using the same variable. arch/arm/mach-tegra/dma.c:169:8: warning: symbol '__v' shadows an earlier one arch/arm/mach-tegra/dma.c:169:8: originally declared here Signed-off-by: Olof Johansson Acked-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/include/asm/io.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index d66605dea55a..bbeb11eda814 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -189,11 +189,11 @@ extern void _memset_io(volatile void __iomem *, int, size_t); * IO port primitives for more information. */ #ifdef __mem_pci -#define readb_relaxed(c) ({ u8 __v = __raw_readb(__mem_pci(c)); __v; }) -#define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16) \ - __raw_readw(__mem_pci(c))); __v; }) -#define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32) \ - __raw_readl(__mem_pci(c))); __v; }) +#define readb_relaxed(c) ({ u8 __r = __raw_readb(__mem_pci(c)); __r; }) +#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \ + __raw_readw(__mem_pci(c))); __r; }) +#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \ + __raw_readl(__mem_pci(c))); __r; }) #define writeb_relaxed(v,c) ((void)__raw_writeb(v,__mem_pci(c))) #define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \ -- cgit v1.2.3 From 4bdad983a4a4fb509aba8b102a2233f0ea1d7681 Mon Sep 17 00:00:00 2001 From: Rabin Vincent Date: Tue, 4 Oct 2011 14:33:34 +0100 Subject: ARM: 7120/1: remove bashism in check for multiple zreladdrs Get rid of this complaint from dash: AS arch/arm/boot/compressed/lib1funcs.o /bin/sh: 1: [: y: unexpected operator LD arch/arm/boot/compressed/vmlinux Acked-by: Sascha Hauer Signed-off-by: Rabin Vincent Signed-off-by: Russell King --- arch/arm/boot/compressed/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index a53a333c255d..a6b30b35ca65 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -140,7 +140,7 @@ bad_syms=$$($(CROSS_COMPILE)nm $@ | sed -n 's/^.\{8\} [bc] \(.*\)/\1/p') && \ echo "$$bad_syms" >&2; rm -f $@; false ) check_for_multiple_zreladdr = \ -if [ $(words $(ZRELADDR)) -gt 1 -a "$(CONFIG_AUTO_ZRELADDR)" == "" ]; then \ +if [ $(words $(ZRELADDR)) -gt 1 -a "$(CONFIG_AUTO_ZRELADDR)" = "" ]; then \ echo 'multiple zreladdrs: $(ZRELADDR)'; \ echo 'This needs CONFIG_AUTO_ZRELADDR to be set'; \ false; \ -- cgit v1.2.3 From 01885bc5ce5a58e043e00f3f295301ef1b9a0fc4 Mon Sep 17 00:00:00 2001 From: Laura Abbott Date: Thu, 6 Oct 2011 20:53:14 +0100 Subject: ARM: 7125/1: Add unwinding annotations for 64bit division functions The 64bit division functions never had unwinding annotations added. This prevents a backtrace from being printed within the function and if a division by 0 occurs. Add the annotations. Signed-off-by: Laura Abbott Acked-by: Nicolas Pitre Acked-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/lib/div64.S | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/lib/div64.S b/arch/arm/lib/div64.S index faa7748142da..e55c4842c290 100644 --- a/arch/arm/lib/div64.S +++ b/arch/arm/lib/div64.S @@ -13,6 +13,7 @@ */ #include +#include #ifdef __ARMEB__ #define xh r0 @@ -44,6 +45,7 @@ */ ENTRY(__do_div64) +UNWIND(.fnstart) @ Test for easy paths first. subs ip, r4, #1 @@ -189,7 +191,12 @@ ENTRY(__do_div64) moveq yh, xh moveq xh, #0 moveq pc, lr +UNWIND(.fnend) +UNWIND(.fnstart) +UNWIND(.pad #4) +UNWIND(.save {lr}) +Ldiv0_64: @ Division by 0: str lr, [sp, #-8]! bl __div0 @@ -200,4 +207,5 @@ ENTRY(__do_div64) mov xh, #0 ldr pc, [sp], #8 +UNWIND(.fnend) ENDPROC(__do_div64) -- cgit v1.2.3 From cfb470b336f8bb69150697bde1316cf5fdad08fc Mon Sep 17 00:00:00 2001 From: Ohad Ben-Cohen Date: Thu, 13 Oct 2011 12:53:18 +0100 Subject: ARM: 7130/1: dev_archdata: add private iommu extension Add a private iommu pointer to the ARM-specific arch data in the device struct, which will be used to attach iommu-specific data to devices which require iommu support. Different iommu implementations (on different platforms) will attach different types of data to this pointer, so 'void *' is currently used (the downside is reduced typesafety). Note: ia64, x86 and sparc have this exact iommu extension as well, and if others are likely to adopt it too, we might want to consider adding this to the device struct itself directly. Signed-off-by: Ohad Ben-Cohen Cc: Arnd Bergmann Cc: Grant Likely Signed-off-by: Russell King --- arch/arm/include/asm/device.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/device.h b/arch/arm/include/asm/device.h index 9f390ce335cb..6615f03f56a5 100644 --- a/arch/arm/include/asm/device.h +++ b/arch/arm/include/asm/device.h @@ -10,6 +10,9 @@ struct dev_archdata { #ifdef CONFIG_DMABOUNCE struct dmabounce_device_info *dmabounce; #endif +#ifdef CONFIG_IOMMU_API + void *iommu; /* private IOMMU data */ +#endif }; struct pdev_archdata { -- cgit v1.2.3 From 628e1110feebeb834359fd6f44ec7e346bdf9611 Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 17 Oct 2011 10:26:51 +0100 Subject: ARM: Add a few machine types to mach-types Add vision_ep9307, rwi_ews, usb_a9g20, karo, apf9328, tx37, tx25, tx51, mx51_m2id, pca101, gplugd, smdk4212 and smdk4412. Signed-off-by: Russell King --- arch/arm/tools/mach-types | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 62cc8f981171..5bdeef969847 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types @@ -12,10 +12,9 @@ # # http://www.arm.linux.org.uk/developer/machines/?action=new # -# XXX: This is a cut-down version of the file; it contains only machines that -# XXX: are in mainline or have been submitted to the machine database within -# XXX: the last 12 months. If your entry is missing please email rmk at -# XXX: +# This is a cut-down version of the file; it contains only machines that +# are merged into mainline or have been edited in the machine database +# within the last 12 months. References to machine_is_NAME() do not count! # # Last update: Sat May 7 08:48:24 2011 # @@ -65,6 +64,7 @@ h7201 ARCH_H7201 H7201 161 h7202 ARCH_H7202 H7202 162 iq80321 ARCH_IQ80321 IQ80321 169 ks8695 ARCH_KS8695 KS8695 180 +karo ARCH_KARO KARO 190 smdk2410 ARCH_SMDK2410 SMDK2410 193 ceiva ARCH_CEIVA CEIVA 200 voiceblue MACH_VOICEBLUE VOICEBLUE 218 @@ -188,6 +188,7 @@ omap_2430sdp MACH_OMAP_2430SDP OMAP_2430SDP 900 davinci_evm MACH_DAVINCI_EVM DAVINCI_EVM 901 palmz72 MACH_PALMZ72 PALMZ72 904 nxdb500 MACH_NXDB500 NXDB500 905 +apf9328 MACH_APF9328 APF9328 906 palmt5 MACH_PALMT5 PALMT5 917 palmtc MACH_PALMTC PALMTC 918 omap_apollon MACH_OMAP_APOLLON OMAP_APOLLON 919 @@ -271,10 +272,12 @@ pcm038 MACH_PCM038 PCM038 1551 ts_x09 MACH_TS209 TS209 1565 at91cap9adk MACH_AT91CAP9ADK AT91CAP9ADK 1566 mx31moboard MACH_MX31MOBOARD MX31MOBOARD 1574 +vision_ep9307 MACH_VISION_EP9307 VISION_EP9307 1578 terastation_pro2 MACH_TERASTATION_PRO2 TERASTATION_PRO2 1584 linkstation_pro MACH_LINKSTATION_PRO LINKSTATION_PRO 1585 e350 MACH_E350 E350 1596 ts409 MACH_TS409 TS409 1601 +rsi_ews MACH_RSI_EWS RSI_EWS 1609 cm_x300 MACH_CM_X300 CM_X300 1616 at91sam9g20ek MACH_AT91SAM9G20EK AT91SAM9G20EK 1624 smdk6410 MACH_SMDK6410 SMDK6410 1626 @@ -331,6 +334,7 @@ smdkc100 MACH_SMDKC100 SMDKC100 1826 tavorevb MACH_TAVOREVB TAVOREVB 1827 saar MACH_SAAR SAAR 1828 at91sam9m10g45ek MACH_AT91SAM9M10G45EK AT91SAM9M10G45EK 1830 +usb_a9g20 MACH_USB_A9G20 USB_A9G20 1841 mxlads MACH_MXLADS MXLADS 1851 linkstation_mini MACH_LINKSTATION_MINI LINKSTATION_MINI 1858 afeb9260 MACH_AFEB9260 AFEB9260 1859 @@ -369,6 +373,7 @@ pcm043 MACH_PCM043 PCM043 2072 sheevaplug MACH_SHEEVAPLUG SHEEVAPLUG 2097 avengers_lite MACH_AVENGERS_LITE AVENGERS_LITE 2104 mx51_babbage MACH_MX51_BABBAGE MX51_BABBAGE 2125 +tx37 MACH_TX37 TX37 2127 rd78x00_masa MACH_RD78X00_MASA RD78X00_MASA 2135 dm355_leopard MACH_DM355_LEOPARD DM355_LEOPARD 2138 ts219 MACH_TS219 TS219 2139 @@ -379,6 +384,7 @@ omap_4430sdp MACH_OMAP_4430SDP OMAP_4430SDP 2160 magx_zn5 MACH_MAGX_ZN5 MAGX_ZN5 2162 btmavb101 MACH_BTMAVB101 BTMAVB101 2172 btmawb101 MACH_BTMAWB101 BTMAWB101 2173 +tx25 MACH_TX25 TX25 2177 omap3_torpedo MACH_OMAP3_TORPEDO OMAP3_TORPEDO 2178 anw6410 MACH_ANW6410 ANW6410 2183 imx27_visstrim_m10 MACH_IMX27_VISSTRIM_M10 IMX27_VISSTRIM_M10 2187 @@ -423,6 +429,7 @@ raumfeld_rc MACH_RAUMFELD_RC RAUMFELD_RC 2413 raumfeld_connector MACH_RAUMFELD_CONNECTOR RAUMFELD_CONNECTOR 2414 raumfeld_speaker MACH_RAUMFELD_SPEAKER RAUMFELD_SPEAKER 2415 tnetv107x MACH_TNETV107X TNETV107X 2418 +mx51_m2id MACH_MX51_M2ID MX51_M2ID 2428 smdkv210 MACH_SMDKV210 SMDKV210 2456 omap_zoom3 MACH_OMAP_ZOOM3 OMAP_ZOOM3 2464 omap_3630sdp MACH_OMAP_3630SDP OMAP_3630SDP 2465 @@ -433,14 +440,17 @@ omapl138_hawkboard MACH_OMAPL138_HAWKBOARD OMAPL138_HAWKBOARD 2495 ts41x MACH_TS41X TS41X 2502 phy3250 MACH_PHY3250 PHY3250 2511 mini6410 MACH_MINI6410 MINI6410 2520 +tx51 MACH_TX51 TX51 2529 mx28evk MACH_MX28EVK MX28EVK 2531 smartq5 MACH_SMARTQ5 SMARTQ5 2534 davinci_dm6467tevm MACH_DAVINCI_DM6467TEVM DAVINCI_DM6467TEVM 2548 mxt_td60 MACH_MXT_TD60 MXT_TD60 2550 riot_bei2 MACH_RIOT_BEI2 RIOT_BEI2 2576 riot_x37 MACH_RIOT_X37 RIOT_X37 2578 +pca101 MACH_PCA101 PCA101 2595 capc7117 MACH_CAPC7117 CAPC7117 2612 icontrol MACH_ICONTROL ICONTROL 2624 +gplugd MACH_GPLUGD GPLUGD 2625 qsd8x50a_st1_5 MACH_QSD8X50A_ST1_5 QSD8X50A_ST1_5 2627 mx23evk MACH_MX23EVK MX23EVK 2629 ap4evb MACH_AP4EVB AP4EVB 2630 @@ -1113,3 +1123,5 @@ blissc MACH_BLISSC BLISSC 3491 thales_adc MACH_THALES_ADC THALES_ADC 3492 ubisys_p9d_evp MACH_UBISYS_P9D_EVP UBISYS_P9D_EVP 3493 atdgp318 MACH_ATDGP318 ATDGP318 3494 +smdk4212 MACH_SMDK4212 SMDK4212 3638 +smdk4412 MACH_SMDK4412 SMDK4412 3765 -- cgit v1.2.3 From b55fa18817743c3c4aef14f0c6fc0e21d7bc1e62 Mon Sep 17 00:00:00 2001 From: Afzal Mohammed Date: Thu, 20 Oct 2011 19:32:07 +0100 Subject: ARM: 7137/1: Fix error upon adding LL debug Upon adding new board LL debug support, if the resultant code addition would not cause PC relative offset of "hexbuf" from "adr r2, hexbuf" (+2) instruction to be representable in a shifted 8-bit value (hence indirectly putting higher aligment requirement on larger offsets), following error occurs, arch/arm/kernel/debug.S: Assembler messages: arch/arm/kernel/debug.S:138: Error: invalid constant (428) after fixup Fix it by bringing "hexbuf" closer so that "adr" can have the offset. Signed-off-by: Afzal Mohammed Acked-by: Tony Lindgren Signed-off-by: Russell King --- arch/arm/kernel/debug.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index bcd66e00bdbe..0f852d082fcf 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S @@ -151,6 +151,8 @@ printhex: adr r2, hexbuf b printascii ENDPROC(printhex2) +hexbuf: .space 16 + .ltorg ENTRY(printascii) @@ -175,5 +177,3 @@ ENTRY(printch) mov r0, #0 b 1b ENDPROC(printch) - -hexbuf: .space 16 -- cgit v1.2.3 From a06f916b7a9b57447ceb875eb0a89f1a66b31bca Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 20 Oct 2011 22:04:18 +0100 Subject: ARM: smp: fix clipping of number of CPUs Rather than clipping the number of CPUs using the compile-time NR_CPUS constant, use the runtime nr_cpu_ids value instead. This allows the nr_cpus command line option to work as expected. Cc: Reported-by: Mark Salter Signed-off-by: Russell King --- arch/arm/mach-exynos4/platsmp.c | 10 ++++------ arch/arm/mach-msm/platsmp.c | 6 ++++++ arch/arm/mach-omap2/omap-smp.c | 10 ++++------ arch/arm/mach-realview/platsmp.c | 10 ++++------ arch/arm/mach-shmobile/platsmp.c | 6 ++++++ arch/arm/mach-tegra/platsmp.c | 8 ++++---- arch/arm/mach-ux500/platsmp.c | 10 ++++------ arch/arm/mach-vexpress/ct-ca9x4.c | 6 ++++++ 8 files changed, 38 insertions(+), 28 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsmp.c index 7c2282c6ba81..a08c536923f9 100644 --- a/arch/arm/mach-exynos4/platsmp.c +++ b/arch/arm/mach-exynos4/platsmp.c @@ -191,12 +191,10 @@ void __init smp_init_cpus(void) ncores = scu_base ? scu_get_core_count(scu_base) : 1; /* sanity check */ - if (ncores > NR_CPUS) { - printk(KERN_WARNING - "EXYNOS4: no. of cores (%d) greater than configured " - "maximum of %d - clipping\n", - ncores, NR_CPUS); - ncores = NR_CPUS; + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; } for (i = 0; i < ncores; i++) diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index 1a1af9e56250..727659520912 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c @@ -156,6 +156,12 @@ void __init smp_init_cpus(void) { unsigned int i, ncores = get_core_count(); + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; + } + for (i = 0; i < ncores; i++) set_cpu_possible(i, true); diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index ce65e9329c7b..889464dc7b2d 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -109,12 +109,10 @@ void __init smp_init_cpus(void) ncores = scu_get_core_count(scu_base); /* sanity check */ - if (ncores > NR_CPUS) { - printk(KERN_WARNING - "OMAP4: no. of cores (%d) greater than configured " - "maximum of %d - clipping\n", - ncores, NR_CPUS); - ncores = NR_CPUS; + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; } for (i = 0; i < ncores; i++) diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c index 4ae943bafa92..e83c654a58d0 100644 --- a/arch/arm/mach-realview/platsmp.c +++ b/arch/arm/mach-realview/platsmp.c @@ -52,12 +52,10 @@ void __init smp_init_cpus(void) ncores = scu_base ? scu_get_core_count(scu_base) : 1; /* sanity check */ - if (ncores > NR_CPUS) { - printk(KERN_WARNING - "Realview: no. of cores (%d) greater than configured " - "maximum of %d - clipping\n", - ncores, NR_CPUS); - ncores = NR_CPUS; + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; } for (i = 0; i < ncores; i++) diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c index 66f980625a33..e4e485fa2532 100644 --- a/arch/arm/mach-shmobile/platsmp.c +++ b/arch/arm/mach-shmobile/platsmp.c @@ -56,6 +56,12 @@ void __init smp_init_cpus(void) unsigned int ncores = shmobile_smp_get_core_count(); unsigned int i; + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; + } + for (i = 0; i < ncores; i++) set_cpu_possible(i, true); diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index 0886cbccddee..7d2b5d03c1df 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c @@ -114,10 +114,10 @@ void __init smp_init_cpus(void) { unsigned int i, ncores = scu_get_core_count(scu_base); - if (ncores > NR_CPUS) { - printk(KERN_ERR "Tegra: no. of cores (%u) greater than configured (%u), clipping\n", - ncores, NR_CPUS); - ncores = NR_CPUS; + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; } for (i = 0; i < ncores; i++) diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index a33df5f4c27a..eb5199102cfa 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -156,12 +156,10 @@ void __init smp_init_cpus(void) ncores = scu_base ? scu_get_core_count(scu_base) : 1; /* sanity check */ - if (ncores > NR_CPUS) { - printk(KERN_WARNING - "U8500: no. of cores (%d) greater than configured " - "maximum of %d - clipping\n", - ncores, NR_CPUS); - ncores = NR_CPUS; + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; } for (i = 0; i < ncores; i++) diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index bfd32f52c2db..2b1e836a76ed 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c @@ -221,6 +221,12 @@ static void ct_ca9x4_init_cpu_map(void) { int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU)); + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; + } + for (i = 0; i < ncores; ++i) set_cpu_possible(i, true); -- cgit v1.2.3 From 1052cff317e7636456595f2246b9f644c53eccbd Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Fri, 21 Oct 2011 18:04:54 +0900 Subject: ARM: S5P: fix offset calculation on gpio-interrupt Offsets of the irq controller registers were calculated correctly only for first GPIO bank. This patch fixes calculation of the register offsets for all GPIO banks. Reported-by: Sylwester Nawrocki Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park Signed-off-by: Kukjin Kim --- arch/arm/plat-s5p/irq-gpioint.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c index f88216d23991..c65eb791d1bb 100644 --- a/arch/arm/plat-s5p/irq-gpioint.c +++ b/arch/arm/plat-s5p/irq-gpioint.c @@ -163,9 +163,9 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip) ct->chip.irq_mask = irq_gc_mask_set_bit; ct->chip.irq_unmask = irq_gc_mask_clr_bit; ct->chip.irq_set_type = s5p_gpioint_set_type, - ct->regs.ack = PEND_OFFSET + REG_OFFSET(chip->group); - ct->regs.mask = MASK_OFFSET + REG_OFFSET(chip->group); - ct->regs.type = CON_OFFSET + REG_OFFSET(chip->group); + ct->regs.ack = PEND_OFFSET + REG_OFFSET(group - bank->start); + ct->regs.mask = MASK_OFFSET + REG_OFFSET(group - bank->start); + ct->regs.type = CON_OFFSET + REG_OFFSET(group - bank->start); irq_setup_generic_chip(gc, IRQ_MSK(chip->chip.ngpio), IRQ_GC_INIT_MASK_CACHE, IRQ_NOREQUEST | IRQ_NOPROBE, 0); -- cgit v1.2.3 From fb630b9fc902e24209166b1659a8b375bf38099c Mon Sep 17 00:00:00 2001 From: Domenico Andreoli Date: Sat, 22 Oct 2011 04:00:53 +0900 Subject: ARM: S3C24XX: Fix s3c24xx build errors if !CONFIG_PM v2: - register_syscore_ops(&s3c24xx_irq_syscore_ops) does not need to be conditionally compiled out, it is already optimized out on !CONFIG_PM - fix also s3c2412 and s3c2416 affected by the same build issue v1: s3c2440.c fails to build if !CONFIG_PM because in such case s3c2410_pm_syscore_ops is not defined. Same error should happen also in s3c2410.c and s3c2442.c Signed-off-by: Domenico Andreoli Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c2410/s3c2410.c | 2 ++ arch/arm/mach-s3c2412/s3c2412.c | 2 ++ arch/arm/mach-s3c2416/s3c2416.c | 2 ++ arch/arm/mach-s3c2440/s3c2440.c | 2 ++ arch/arm/mach-s3c2440/s3c2442.c | 2 ++ 5 files changed, 10 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c index f1d3bd8f6f17..343a540d86a9 100644 --- a/arch/arm/mach-s3c2410/s3c2410.c +++ b/arch/arm/mach-s3c2410/s3c2410.c @@ -170,7 +170,9 @@ int __init s3c2410_init(void) { printk("S3C2410: Initialising architecture\n"); +#ifdef CONFIG_PM register_syscore_ops(&s3c2410_pm_syscore_ops); +#endif register_syscore_ops(&s3c24xx_irq_syscore_ops); return sysdev_register(&s3c2410_sysdev); diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index ef0958d3e5c6..57a1e01e4e50 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c @@ -245,7 +245,9 @@ int __init s3c2412_init(void) { printk("S3C2412: Initialising architecture\n"); +#ifdef CONFIG_PM register_syscore_ops(&s3c2412_pm_syscore_ops); +#endif register_syscore_ops(&s3c24xx_irq_syscore_ops); return sysdev_register(&s3c2412_sysdev); diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c index 494ce913dc95..20b3fdfb3051 100644 --- a/arch/arm/mach-s3c2416/s3c2416.c +++ b/arch/arm/mach-s3c2416/s3c2416.c @@ -97,7 +97,9 @@ int __init s3c2416_init(void) s3c_fb_setname("s3c2443-fb"); +#ifdef CONFIG_PM register_syscore_ops(&s3c2416_pm_syscore_ops); +#endif register_syscore_ops(&s3c24xx_irq_syscore_ops); return sysdev_register(&s3c2416_sysdev); diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c index ce99ff72838d..2270d3360216 100644 --- a/arch/arm/mach-s3c2440/s3c2440.c +++ b/arch/arm/mach-s3c2440/s3c2440.c @@ -55,7 +55,9 @@ int __init s3c2440_init(void) /* register suspend/resume handlers */ +#ifdef CONFIG_PM register_syscore_ops(&s3c2410_pm_syscore_ops); +#endif register_syscore_ops(&s3c244x_pm_syscore_ops); register_syscore_ops(&s3c24xx_irq_syscore_ops); diff --git a/arch/arm/mach-s3c2440/s3c2442.c b/arch/arm/mach-s3c2440/s3c2442.c index 9ad99f8016a1..6f2b65e6e068 100644 --- a/arch/arm/mach-s3c2440/s3c2442.c +++ b/arch/arm/mach-s3c2440/s3c2442.c @@ -169,7 +169,9 @@ int __init s3c2442_init(void) { printk("S3C2442: Initialising architecture\n"); +#ifdef CONFIG_PM register_syscore_ops(&s3c2410_pm_syscore_ops); +#endif register_syscore_ops(&s3c244x_pm_syscore_ops); register_syscore_ops(&s3c24xx_irq_syscore_ops); -- cgit v1.2.3 From d93f5cdea968284f05aa9905ee9752874885a6fa Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 19 Oct 2011 23:52:41 +0200 Subject: ARM: mach-shmobile: sh7372 A3SP support (v4) This change adds support for the sh7372 A3SP power domain. The sh7372 A3SP hardware power domain contains a wide range of I/O devices. The list of I/O devices include SCIF serial ports, DMA Engine hardware, SD and MMC controller hardware, USB controllers and I2C master controllers. This patch adds the A3SP low level code which powers the hardware power domain on and off. It also ties in platform devices to the pm domain support code. It is worth noting that the serial console is hooked up to SCIFA0 on most sh7372 boards, and the SCIFA0 port is included in the A3SP hardware power domain. For this reason we cannot output debug messages from the low level power control code in the case of A3SP. QoS support is needed in drivers before we can enable the A3SP power control on the fly. Signed-off-by: Magnus Damm Signed-off-by: Rafael J. Wysocki --- arch/arm/mach-shmobile/board-ap4evb.c | 4 ++++ arch/arm/mach-shmobile/board-mackerel.c | 8 ++++++++ arch/arm/mach-shmobile/include/mach/sh7372.h | 3 +++ arch/arm/mach-shmobile/pm-sh7372.c | 30 +++++++++++++++++++++++----- arch/arm/mach-shmobile/setup-sh7372.c | 14 +++++++++++++ 5 files changed, 54 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index d6c8ae813175..bf4f6372dcf4 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c @@ -1409,6 +1409,10 @@ static void __init ap4evb_init(void) sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device); sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device); + hdmi_init_pm_clock(); fsi_init_pm_clock(); sh7372_pm_init(); diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 19f5d4922e2c..fdb1ca31dfe1 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c @@ -1588,6 +1588,14 @@ static void __init mackerel_init(void) sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device); sh7372_add_device_to_domain(&sh7372_a4lc, &hdmi_lcdc_device); sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs0_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs1_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device); +#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) + sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device); +#endif + sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi2_device); hdmi_init_pm_clock(); sh7372_pm_init(); diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h index efc984c4cef3..8542f2d31a56 100644 --- a/arch/arm/mach-shmobile/include/mach/sh7372.h +++ b/arch/arm/mach-shmobile/include/mach/sh7372.h @@ -479,7 +479,9 @@ struct platform_device; struct sh7372_pm_domain { struct generic_pm_domain genpd; + struct dev_power_governor *gov; unsigned int bit_shift; + bool no_debug; }; static inline struct sh7372_pm_domain *to_sh7372_pd(struct generic_pm_domain *d) @@ -493,6 +495,7 @@ extern struct sh7372_pm_domain sh7372_a4mp; extern struct sh7372_pm_domain sh7372_d4; extern struct sh7372_pm_domain sh7372_a3rv; extern struct sh7372_pm_domain sh7372_a3ri; +extern struct sh7372_pm_domain sh7372_a3sp; extern struct sh7372_pm_domain sh7372_a3sg; extern void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd); diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c index 8e0944f96ba1..fde619dd4c05 100644 --- a/arch/arm/mach-shmobile/pm-sh7372.c +++ b/arch/arm/mach-shmobile/pm-sh7372.c @@ -92,8 +92,9 @@ static int pd_power_down(struct generic_pm_domain *genpd) } } - pr_debug("sh7372 power domain down 0x%08x -> PSTR = 0x%08x\n", - mask, __raw_readl(PSTR)); + if (!sh7372_pd->no_debug) + pr_debug("sh7372 power domain down 0x%08x -> PSTR = 0x%08x\n", + mask, __raw_readl(PSTR)); return 0; } @@ -122,8 +123,9 @@ static int pd_power_up(struct generic_pm_domain *genpd) ret = -EIO; out: - pr_debug("sh7372 power domain up 0x%08x -> PSTR = 0x%08x\n", - mask, __raw_readl(PSTR)); + if (!sh7372_pd->no_debug) + pr_debug("sh7372 power domain up 0x%08x -> PSTR = 0x%08x\n", + mask, __raw_readl(PSTR)); return ret; } @@ -133,11 +135,20 @@ static bool pd_active_wakeup(struct device *dev) return true; } +static bool sh7372_power_down_forbidden(struct dev_pm_domain *domain) +{ + return false; +} + +struct dev_power_governor sh7372_always_on_gov = { + .power_down_ok = sh7372_power_down_forbidden, +}; + void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd) { struct generic_pm_domain *genpd = &sh7372_pd->genpd; - pm_genpd_init(genpd, NULL, false); + pm_genpd_init(genpd, sh7372_pd->gov, false); genpd->stop_device = pm_clk_suspend; genpd->start_device = pm_clk_resume; genpd->dev_irq_safe = true; @@ -183,6 +194,12 @@ struct sh7372_pm_domain sh7372_a3ri = { .bit_shift = 8, }; +struct sh7372_pm_domain sh7372_a3sp = { + .bit_shift = 11, + .gov = &sh7372_always_on_gov, + .no_debug = true, +}; + struct sh7372_pm_domain sh7372_a3sg = { .bit_shift = 13, }; @@ -422,6 +439,9 @@ void __init sh7372_pm_init(void) __raw_writel(0x0000a501, DBGREG9); __raw_writel(0x00000000, DBGREG1); + /* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */ + __raw_writel(0, PDNSEL); + sh7372_suspend_init(); sh7372_cpuidle_init(); } diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index d317c224ed63..5f1afcc4de6e 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c @@ -994,6 +994,7 @@ void __init sh7372_add_standard_devices(void) sh7372_init_pm_domain(&sh7372_a3rv); sh7372_init_pm_domain(&sh7372_a3ri); sh7372_init_pm_domain(&sh7372_a3sg); + sh7372_init_pm_domain(&sh7372_a3sp); sh7372_pm_add_subdomain(&sh7372_a4lc, &sh7372_a3rv); @@ -1006,6 +1007,19 @@ void __init sh7372_add_standard_devices(void) sh7372_add_device_to_domain(&sh7372_a3rv, &vpu_device); sh7372_add_device_to_domain(&sh7372_a4mp, &spu0_device); sh7372_add_device_to_domain(&sh7372_a4mp, &spu1_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &scif0_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &scif1_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &scif2_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &scif3_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &scif4_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &scif5_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &scif6_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &iic1_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &dma0_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &dma1_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &dma2_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &usb_dma0_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &usb_dma1_device); } void __init sh7372_add_early_devices(void) -- cgit v1.2.3 From 382414b93ac1e8ee7693be710e60c83eacc97c6f Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 19 Oct 2011 23:52:50 +0200 Subject: ARM: mach-shmobile: sh7372 A4R support (v4) This change adds support for the sh7372 A4R power domain. The sh7372 A4R hardware power domain contains the SH CPU Core and a set of I/O devices including multimedia accelerators and I2C controllers. One special case about A4R is the INTCS interrupt controller that needs to be saved and restored to keep working as expected. Also the LCDC hardware blocks are in a different hardware power domain but have their IRQs routed only through INTCS. So as long as LCDCs are active we cannot power down INTCS because that would risk losing interrupts. Signed-off-by: Magnus Damm Signed-off-by: Rafael J. Wysocki --- arch/arm/mach-shmobile/board-ap4evb.c | 1 + arch/arm/mach-shmobile/board-mackerel.c | 1 + arch/arm/mach-shmobile/include/mach/sh7372.h | 7 ++++ arch/arm/mach-shmobile/intc-sh7372.c | 52 +++++++++++++++++++++++++++- arch/arm/mach-shmobile/pm-sh7372.c | 29 +++++++++++++++- arch/arm/mach-shmobile/setup-sh7372.c | 8 +++++ 6 files changed, 96 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index bf4f6372dcf4..7e90d064ebcb 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c @@ -1412,6 +1412,7 @@ static void __init ap4evb_init(void) sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device); sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device); sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device); + sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device); hdmi_init_pm_clock(); fsi_init_pm_clock(); diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index fdb1ca31dfe1..56d4fed6f03a 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c @@ -1596,6 +1596,7 @@ static void __init mackerel_init(void) sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device); #endif sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi2_device); + sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device); hdmi_init_pm_clock(); sh7372_pm_init(); diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h index 8542f2d31a56..84532f9629b2 100644 --- a/arch/arm/mach-shmobile/include/mach/sh7372.h +++ b/arch/arm/mach-shmobile/include/mach/sh7372.h @@ -480,8 +480,11 @@ struct platform_device; struct sh7372_pm_domain { struct generic_pm_domain genpd; struct dev_power_governor *gov; + void (*suspend)(void); + void (*resume)(void); unsigned int bit_shift; bool no_debug; + bool stay_on; }; static inline struct sh7372_pm_domain *to_sh7372_pd(struct generic_pm_domain *d) @@ -493,6 +496,7 @@ static inline struct sh7372_pm_domain *to_sh7372_pd(struct generic_pm_domain *d) extern struct sh7372_pm_domain sh7372_a4lc; extern struct sh7372_pm_domain sh7372_a4mp; extern struct sh7372_pm_domain sh7372_d4; +extern struct sh7372_pm_domain sh7372_a4r; extern struct sh7372_pm_domain sh7372_a3rv; extern struct sh7372_pm_domain sh7372_a3ri; extern struct sh7372_pm_domain sh7372_a3sp; @@ -509,4 +513,7 @@ extern void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd, #define sh7372_pm_add_subdomain(pd, sd) do { } while(0) #endif /* CONFIG_PM */ +extern void sh7372_intcs_suspend(void); +extern void sh7372_intcs_resume(void); + #endif /* __ASM_SH7372_H__ */ diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c index 739315e30eb9..29cdc0522d9c 100644 --- a/arch/arm/mach-shmobile/intc-sh7372.c +++ b/arch/arm/mach-shmobile/intc-sh7372.c @@ -606,9 +606,16 @@ static void intcs_demux(unsigned int irq, struct irq_desc *desc) generic_handle_irq(intcs_evt2irq(evtcodeas)); } +static void __iomem *intcs_ffd2; +static void __iomem *intcs_ffd5; + void __init sh7372_init_irq(void) { - void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); + void __iomem *intevtsa; + + intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE); + intevtsa = intcs_ffd2 + 0x100; + intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE); register_intc_controller(&intca_desc); register_intc_controller(&intcs_desc); @@ -617,3 +624,46 @@ void __init sh7372_init_irq(void) irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa); irq_set_chained_handler(evt2irq(0xf80), intcs_demux); } + +static unsigned short ffd2[0x200]; +static unsigned short ffd5[0x100]; + +void sh7372_intcs_suspend(void) +{ + int k; + + for (k = 0x00; k <= 0x30; k += 4) + ffd2[k] = __raw_readw(intcs_ffd2 + k); + + for (k = 0x80; k <= 0xb0; k += 4) + ffd2[k] = __raw_readb(intcs_ffd2 + k); + + for (k = 0x180; k <= 0x188; k += 4) + ffd2[k] = __raw_readb(intcs_ffd2 + k); + + for (k = 0x00; k <= 0x3c; k += 4) + ffd5[k] = __raw_readw(intcs_ffd5 + k); + + for (k = 0x80; k <= 0x9c; k += 4) + ffd5[k] = __raw_readb(intcs_ffd5 + k); +} + +void sh7372_intcs_resume(void) +{ + int k; + + for (k = 0x00; k <= 0x30; k += 4) + __raw_writew(ffd2[k], intcs_ffd2 + k); + + for (k = 0x80; k <= 0xb0; k += 4) + __raw_writeb(ffd2[k], intcs_ffd2 + k); + + for (k = 0x180; k <= 0x188; k += 4) + __raw_writeb(ffd2[k], intcs_ffd2 + k); + + for (k = 0x00; k <= 0x3c; k += 4) + __raw_writew(ffd5[k], intcs_ffd5 + k); + + for (k = 0x80; k <= 0x9c; k += 4) + __raw_writeb(ffd5[k], intcs_ffd5 + k); +} diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c index fde619dd4c05..79612737c5b2 100644 --- a/arch/arm/mach-shmobile/pm-sh7372.c +++ b/arch/arm/mach-shmobile/pm-sh7372.c @@ -44,6 +44,7 @@ #define SPDCR 0xe6180008 #define SWUCR 0xe6180014 #define SBAR 0xe6180020 +#define WUPRMSK 0xe6180028 #define WUPSMSK 0xe618002c #define WUPSMSK2 0xe6180048 #define PSTR 0xe6180080 @@ -80,6 +81,12 @@ static int pd_power_down(struct generic_pm_domain *genpd) struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd); unsigned int mask = 1 << sh7372_pd->bit_shift; + if (sh7372_pd->suspend) + sh7372_pd->suspend(); + + if (sh7372_pd->stay_on) + return 0; + if (__raw_readl(PSTR) & mask) { unsigned int retry_count; @@ -106,6 +113,9 @@ static int pd_power_up(struct generic_pm_domain *genpd) unsigned int retry_count; int ret = 0; + if (sh7372_pd->stay_on) + goto out; + if (__raw_readl(PSTR) & mask) goto out; @@ -122,14 +132,23 @@ static int pd_power_up(struct generic_pm_domain *genpd) if (__raw_readl(SWUCR) & mask) ret = -EIO; - out: if (!sh7372_pd->no_debug) pr_debug("sh7372 power domain up 0x%08x -> PSTR = 0x%08x\n", mask, __raw_readl(PSTR)); + out: + if (ret == 0 && sh7372_pd->resume) + sh7372_pd->resume(); + return ret; } +static void sh7372_a4r_suspend(void) +{ + sh7372_intcs_suspend(); + __raw_writel(0x300fffff, WUPRMSK); /* avoid wakeup */ +} + static bool pd_active_wakeup(struct device *dev) { return true; @@ -186,6 +205,14 @@ struct sh7372_pm_domain sh7372_d4 = { .bit_shift = 3, }; +struct sh7372_pm_domain sh7372_a4r = { + .bit_shift = 5, + .gov = &sh7372_always_on_gov, + .suspend = sh7372_a4r_suspend, + .resume = sh7372_intcs_resume, + .stay_on = true, +}; + struct sh7372_pm_domain sh7372_a3rv = { .bit_shift = 6, }; diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index 5f1afcc4de6e..2380389e6ac5 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c @@ -991,12 +991,14 @@ void __init sh7372_add_standard_devices(void) sh7372_init_pm_domain(&sh7372_a4lc); sh7372_init_pm_domain(&sh7372_a4mp); sh7372_init_pm_domain(&sh7372_d4); + sh7372_init_pm_domain(&sh7372_a4r); sh7372_init_pm_domain(&sh7372_a3rv); sh7372_init_pm_domain(&sh7372_a3ri); sh7372_init_pm_domain(&sh7372_a3sg); sh7372_init_pm_domain(&sh7372_a3sp); sh7372_pm_add_subdomain(&sh7372_a4lc, &sh7372_a3rv); + sh7372_pm_add_subdomain(&sh7372_a4r, &sh7372_a4lc); platform_add_devices(sh7372_early_devices, ARRAY_SIZE(sh7372_early_devices)); @@ -1020,6 +1022,12 @@ void __init sh7372_add_standard_devices(void) sh7372_add_device_to_domain(&sh7372_a3sp, &dma2_device); sh7372_add_device_to_domain(&sh7372_a3sp, &usb_dma0_device); sh7372_add_device_to_domain(&sh7372_a3sp, &usb_dma1_device); + sh7372_add_device_to_domain(&sh7372_a4r, &iic0_device); + sh7372_add_device_to_domain(&sh7372_a4r, &veu0_device); + sh7372_add_device_to_domain(&sh7372_a4r, &veu1_device); + sh7372_add_device_to_domain(&sh7372_a4r, &veu2_device); + sh7372_add_device_to_domain(&sh7372_a4r, &veu3_device); + sh7372_add_device_to_domain(&sh7372_a4r, &jpu_device); } void __init sh7372_add_early_devices(void) -- cgit v1.2.3 From ee3f615819404a9438b2dd01b7a39f276d2737f2 Mon Sep 17 00:00:00 2001 From: Javi Merino Date: Tue, 18 Oct 2011 11:50:07 +0100 Subject: ARM: 7136/1: pl330: Fix a race condition If two requests have been submitted and one of them is running, if you call pl330_chan_ctrl(ch_id, PL330_OP_START), there's a window of time between the spin_lock_irqsave() and the _state() check in which the running transaction may finish. In that case, we don't receive the interrupt (because they are disabled), but _start() sees that the DMA is stopped, so it starts it. The problem is that it sends the transaction that has just finished again, because pl330_update() hasn't mark it as done yet. This patch fixes this race condition by not calling _start() if the DMA is already executing transactions. When interrupts are reenabled, pl330_update() will call _start(). Reference: <1317892206-3600-1-git-send-email-javi.merino@arm.com> Signed-off-by: Javi Merino Acked-by: Jassi Brar Signed-off-by: Russell King --- arch/arm/common/pl330.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c index 97912fa48782..7129cfbdacd6 100644 --- a/arch/arm/common/pl330.c +++ b/arch/arm/common/pl330.c @@ -1546,7 +1546,7 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op) /* Start the next */ case PL330_OP_START: - if (!_start(thrd)) + if (!_thrd_active(thrd) && !_start(thrd)) ret = -EIO; break; -- cgit v1.2.3 From 6c5482d53f195d3ca61c9ec1be25b0f4a92575fe Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 12 Oct 2011 01:02:50 +0100 Subject: ARM: 7129/1: Add __arm_ioremap_exec for mapping external memory as MT_MEMORY This allows mapping external memory such as SRAM for use. This is needed for some small chunks of code, such as reprogramming SDRAM memory source clocks that can't be executed in SDRAM. Other use cases include some PM related code. Acked-by: Nicolas Pitre Acked-by: Andres Salomon Signed-off-by: Tony Lindgren Signed-off-by: Russell King --- arch/arm/include/asm/io.h | 1 + arch/arm/mm/ioremap.c | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index bbeb11eda814..2e59180143a4 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -80,6 +80,7 @@ extern void __iomem *__arm_ioremap_caller(unsigned long, size_t, unsigned int, extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, unsigned int); extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int); +extern void __iomem *__arm_ioremap_exec(unsigned long, size_t, bool cached); extern void __iounmap(volatile void __iomem *addr); /* diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index ab506272b2d3..bdb248c4f55c 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c @@ -289,6 +289,27 @@ __arm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) } EXPORT_SYMBOL(__arm_ioremap); +/* + * Remap an arbitrary physical address space into the kernel virtual + * address space as memory. Needed when the kernel wants to execute + * code in external memory. This is needed for reprogramming source + * clocks that would affect normal memory for example. Please see + * CONFIG_GENERIC_ALLOCATOR for allocating external memory. + */ +void __iomem * +__arm_ioremap_exec(unsigned long phys_addr, size_t size, bool cached) +{ + unsigned int mtype; + + if (cached) + mtype = MT_MEMORY; + else + mtype = MT_MEMORY_NONCACHED; + + return __arm_ioremap_caller(phys_addr, size, mtype, + __builtin_return_address(0)); +} + void __iounmap(volatile void __iomem *io_addr) { void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr); -- cgit v1.2.3 From eb0474544bc16a9dab53b26abd846e86ba814eb1 Mon Sep 17 00:00:00 2001 From: Thomas Gleinxer Date: Fri, 14 Oct 2011 12:44:41 +0100 Subject: ARM: 7133/1: SMP: fix per cpu timer setup before the cpu is marked online The problem is related to the early enabling of interrupts and the per cpu timer setup before the cpu is marked online. This doesn't need to be done in order to call calibrate_delay(). calibrate_delay() monitors jiffies, which are updated from the CPU which is waiting for the new CPU to set the online bit. So simply calibrate_delay() can be called on the new CPU just from the interrupt disabled region and move the local timer setup after stored the cpu data and before enabling interrupts. This solves both the cpu_online vs. cpu_active problem and the affinity setting of the per cpu timers. Signed-off-by: Thomas Gleinxer Signed-off-by: Kukjin Kim Signed-off-by: Russell King --- arch/arm/kernel/smp.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index d88ff0230e82..697e9a8cbdd8 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -301,17 +301,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void) */ platform_secondary_init(cpu); - /* - * Enable local interrupts. - */ notify_cpu_starting(cpu); - local_irq_enable(); - local_fiq_enable(); - - /* - * Setup the percpu timer for this CPU. - */ - percpu_timer_setup(); calibrate_delay(); @@ -323,9 +313,22 @@ asmlinkage void __cpuinit secondary_start_kernel(void) * before we continue. */ set_cpu_online(cpu, true); + + /* + * Setup the percpu timer for this CPU. + */ + percpu_timer_setup(); + while (!cpu_active(cpu)) cpu_relax(); + /* + * cpu_active bit is set, so it's safe to enalbe interrupts + * now. + */ + local_irq_enable(); + local_fiq_enable(); + /* * OK, it's off to the idle thread for us */ -- cgit v1.2.3