From 35f752be4f412a1a58f4c15fa9282c53b956e067 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann <arnd@arndb.de> Date: Mon, 31 May 2021 13:51:18 +0200 Subject: mips: ralink: convert to CONFIG_COMMON_CLK ralink only has a very trivial clock implementation, with everything being fixed clocks. Convert it to CONFIG_COMMON_CLK to reduce the number of platforms that rely on legacy clocks. Of course, the clocks really should be read from the device tree instead, but this is a step into that direction. This adds about 50KB to the kernel image size, which is an unfortunate increase, but not as bad as I had feared: text data bss dec hex filename 3778560 1582216 92256 5453032 5334e8 vmlinux-vocore-before 3822148 1601192 92304 5515644 54297c vmlinux-vocore-after 3870226 1644468 200192 5714886 5733c6 vmlinux-rt305x-before 3916727 1668404 200240 5785371 58471b vmlinux-rt305x-after Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- arch/mips/ralink/Kconfig | 5 ----- 1 file changed, 5 deletions(-) (limited to 'arch/mips/ralink/Kconfig') diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig index ec4daa63c5e3..c800bf5559b5 100644 --- a/arch/mips/ralink/Kconfig +++ b/arch/mips/ralink/Kconfig @@ -28,22 +28,18 @@ choice bool "RT288x" select MIPS_AUTO_PFN_OFFSET select MIPS_L1_CACHE_SHIFT_4 - select HAVE_LEGACY_CLK select HAVE_PCI config SOC_RT305X bool "RT305x" - select HAVE_LEGACY_CLK config SOC_RT3883 bool "RT3883" - select HAVE_LEGACY_CLK select HAVE_PCI config SOC_MT7620 bool "MT7620/8" select CPU_MIPSR2_IRQ_VI - select HAVE_LEGACY_CLK select HAVE_PCI config SOC_MT7621 @@ -54,7 +50,6 @@ choice select SYS_SUPPORTS_MIPS_CPS select SYS_SUPPORTS_HIGHMEM select MIPS_GIC - select COMMON_CLK select CLKSRC_MIPS_GIC select HAVE_PCI if PCI_MT7621 select SOC_BUS -- cgit v1.2.3