From 6467cae318ba8adaab37a82e8dd8af60ca9ed6e4 Mon Sep 17 00:00:00 2001 From: Wolfgang Grandegger Date: Mon, 16 Mar 2009 09:56:26 +0100 Subject: powerpc/85xx: TQM85xx: correct address of LM75 I2C device nodes Commit 0f73a449a649acfca91404a98a35353a618b9555 added I2C device nodes for the LM75 thermal sensor on the TQM85xx modules, unfortunately with the wrong I2C address. The LM75s are located at address 0x48. Signed-off-by: Wolfgang Grandegger Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/tqm8540.dts | 4 ++-- arch/powerpc/boot/dts/tqm8541.dts | 4 ++-- arch/powerpc/boot/dts/tqm8548-bigflash.dts | 4 ++-- arch/powerpc/boot/dts/tqm8548.dts | 4 ++-- arch/powerpc/boot/dts/tqm8555.dts | 4 ++-- arch/powerpc/boot/dts/tqm8560.dts | 4 ++-- 6 files changed, 12 insertions(+), 12 deletions(-) (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts index 231bae756637..b6f1fc6eb960 100644 --- a/arch/powerpc/boot/dts/tqm8540.dts +++ b/arch/powerpc/boot/dts/tqm8540.dts @@ -84,9 +84,9 @@ interrupt-parent = <&mpic>; dfsrr; - dtt@50 { + dtt@48 { compatible = "national,lm75"; - reg = <0x50>; + reg = <0x48>; }; rtc@68 { diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts index 4356a1f08295..fa6a3d54a8a5 100644 --- a/arch/powerpc/boot/dts/tqm8541.dts +++ b/arch/powerpc/boot/dts/tqm8541.dts @@ -83,9 +83,9 @@ interrupt-parent = <&mpic>; dfsrr; - dtt@50 { + dtt@48 { compatible = "national,lm75"; - reg = <0x50>; + reg = <0x48>; }; rtc@68 { diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts index 28b1a95257cd..a423042b6915 100644 --- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts +++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts @@ -85,9 +85,9 @@ interrupt-parent = <&mpic>; dfsrr; - dtt@50 { + dtt@48 { compatible = "national,lm75"; - reg = <0x50>; + reg = <0x48>; }; rtc@68 { diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts index 826fb622cd3c..6734dddef777 100644 --- a/arch/powerpc/boot/dts/tqm8548.dts +++ b/arch/powerpc/boot/dts/tqm8548.dts @@ -85,9 +85,9 @@ interrupt-parent = <&mpic>; dfsrr; - dtt@50 { + dtt@48 { compatible = "national,lm75"; - reg = <0x50>; + reg = <0x48>; }; rtc@68 { diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts index 06d366ebbda3..6a99f1eef7ad 100644 --- a/arch/powerpc/boot/dts/tqm8555.dts +++ b/arch/powerpc/boot/dts/tqm8555.dts @@ -83,9 +83,9 @@ interrupt-parent = <&mpic>; dfsrr; - dtt@50 { + dtt@48 { compatible = "national,lm75"; - reg = <0x50>; + reg = <0x48>; }; rtc@68 { diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts index feff915e0492..b6c2d71defd3 100644 --- a/arch/powerpc/boot/dts/tqm8560.dts +++ b/arch/powerpc/boot/dts/tqm8560.dts @@ -85,9 +85,9 @@ interrupt-parent = <&mpic>; dfsrr; - dtt@50 { + dtt@48 { compatible = "national,lm75"; - reg = <0x50>; + reg = <0x48>; }; rtc@68 { -- cgit v1.2.3 From 655544c69c8d8bdc0c377ad1d30d147a5a28a1fb Mon Sep 17 00:00:00 2001 From: Wolfgang Grandegger Date: Mon, 16 Mar 2009 09:57:17 +0100 Subject: powerpc/85xx: TQM8548: use proper phy-handles for enet2 and enet3 For enet2 and enet3 the wrong phy-handles have been used in DTS files of the TQM8548 modules. Signed-off-by: Wolfgang Grandegger Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/tqm8548-bigflash.dts | 4 ++-- arch/powerpc/boot/dts/tqm8548.dts | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts index a423042b6915..5b669ea0da2c 100644 --- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts +++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts @@ -247,7 +247,7 @@ interrupts = <31 2 32 2 33 2>; interrupt-parent = <&mpic>; tbi-handle = <&tbi2>; - phy-handle = <&phy3>; + phy-handle = <&phy4>; mdio@520 { #address-cells = <1>; @@ -275,7 +275,7 @@ interrupts = <37 2 38 2 39 2>; interrupt-parent = <&mpic>; tbi-handle = <&tbi3>; - phy-handle = <&phy4>; + phy-handle = <&phy5>; mdio@520 { #address-cells = <1>; diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts index 6734dddef777..61437bfd3127 100644 --- a/arch/powerpc/boot/dts/tqm8548.dts +++ b/arch/powerpc/boot/dts/tqm8548.dts @@ -247,7 +247,7 @@ interrupts = <31 2 32 2 33 2>; interrupt-parent = <&mpic>; tbi-handle = <&tbi2>; - phy-handle = <&phy3>; + phy-handle = <&phy4>; mdio@520 { #address-cells = <1>; @@ -275,7 +275,7 @@ interrupts = <37 2 38 2 39 2>; interrupt-parent = <&mpic>; tbi-handle = <&tbi3>; - phy-handle = <&phy4>; + phy-handle = <&phy5>; mdio@520 { #address-cells = <1>; -- cgit v1.2.3 From bda9de2c4fff8d7e9ac3ee66ce853716280a21ea Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Thu, 16 Apr 2009 15:11:54 -0600 Subject: powerpc/5200: Add FLASH nodes to lite5200 device tree Signed-off-by: Grant Likely --- arch/powerpc/boot/dts/lite5200b.dts | 39 +++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts index c63e3566479e..d13cb11ce623 100644 --- a/arch/powerpc/boot/dts/lite5200b.dts +++ b/arch/powerpc/boot/dts/lite5200b.dts @@ -293,4 +293,43 @@ 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; }; + + localbus { + compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus"; + + #address-cells = <2>; + #size-cells = <1>; + + ranges = <0 0 0xfe000000 0x02000000>; + + flash@0,0 { + compatible = "cfi-flash"; + reg = <0 0 0x02000000>; + bank-width = <1>; + #size-cells = <1>; + #address-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x00000000 0x00200000>; + }; + partition@200000 { + label = "rootfs"; + reg = <0x00200000 0x01d00000>; + }; + partition@1f00000 { + label = "u-boot"; + reg = <0x01f00000 0x00060000>; + }; + partition@1f60000 { + label = "u-boot-env"; + reg = <0x01f60000 0x00020000>; + }; + partition@1f80000 { + label = "dtb"; + reg = <0x01f80000 0x00080000>; + }; + }; + }; + }; -- cgit v1.2.3 From 644e28f3426810710b176080cc906995ebc24b63 Mon Sep 17 00:00:00 2001 From: Valentine Barshak Date: Thu, 23 Apr 2009 10:55:06 +0000 Subject: powerpc/44x: Correct memory size calculation for denali-based boards Some U-Boot versions incorrectly set the number of chipselects to two for Sequoia/Rainier boards while they only have one chipselect hardwired. This patch adds a workaround for this, hardcoding the number of chipselects to one for sequioa/rainer board models and reading the actual value from the memory controller register DDR0_10 otherwise. It also fixes another error in the way ibm4xx_denali_fixup_memsize calculates memory size. When testing the DDR_REDUC bit, the polarity is backwards. A "1" implies 32-bit wide memory while a "0" implies 64-bit wide memory. Signed-off-by: Mikhail Zolotaryov Signed-off-by: Valentine Barshak Signed-off-by: Steven A. Falco Acked-by: Stefan Roese Signed-off-by: Josh Boyer --- arch/powerpc/boot/4xx.c | 56 +++++++++++++++++++++++++++++++++++++------------ 1 file changed, 43 insertions(+), 13 deletions(-) (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c index 5c878436f348..325b310573b9 100644 --- a/arch/powerpc/boot/4xx.c +++ b/arch/powerpc/boot/4xx.c @@ -158,21 +158,33 @@ void ibm440spe_fixup_memsize(void) #define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask)) -void ibm4xx_denali_fixup_memsize(void) +/* + * Some U-Boot versions set the number of chipselects to two + * for Sequoia/Rainier boards while they only have one chipselect + * hardwired. Hardcode the number of chipselects to one + * for sequioa/rainer board models or read the actual value + * from the memory controller register DDR0_10 otherwise. + */ +static inline u32 ibm4xx_denali_get_cs(void) { - u32 val, max_cs, max_col, max_row; - u32 cs, col, row, bank, dpath; - unsigned long memsize; + void *devp; + char model[64]; + u32 val, cs; - val = SDRAM0_READ(DDR0_02); - if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT)) - fatal("DDR controller is not initialized\n"); + devp = finddevice("/"); + if (!devp) + goto read_cs; - /* get maximum cs col and row values */ - max_cs = DDR_GET_VAL(val, DDR_MAX_CS_REG, DDR_MAX_CS_REG_SHIFT); - max_col = DDR_GET_VAL(val, DDR_MAX_COL_REG, DDR_MAX_COL_REG_SHIFT); - max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT); + if (getprop(devp, "model", model, sizeof(model)) <= 0) + goto read_cs; + model[sizeof(model)-1] = 0; + + if (!strcmp(model, "amcc,sequoia") || + !strcmp(model, "amcc,rainier")) + return 1; + +read_cs: /* get CS value */ val = SDRAM0_READ(DDR0_10); @@ -183,7 +195,25 @@ void ibm4xx_denali_fixup_memsize(void) cs++; val = val >> 1; } + return cs; +} + +void ibm4xx_denali_fixup_memsize(void) +{ + u32 val, max_cs, max_col, max_row; + u32 cs, col, row, bank, dpath; + unsigned long memsize; + + val = SDRAM0_READ(DDR0_02); + if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT)) + fatal("DDR controller is not initialized\n"); + /* get maximum cs col and row values */ + max_cs = DDR_GET_VAL(val, DDR_MAX_CS_REG, DDR_MAX_CS_REG_SHIFT); + max_col = DDR_GET_VAL(val, DDR_MAX_COL_REG, DDR_MAX_COL_REG_SHIFT); + max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT); + + cs = ibm4xx_denali_get_cs(); if (!cs) fatal("No memory installed\n"); if (cs > max_cs) @@ -193,9 +223,9 @@ void ibm4xx_denali_fixup_memsize(void) val = SDRAM0_READ(DDR0_14); if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT)) - dpath = 8; /* 64 bits */ - else dpath = 4; /* 32 bits */ + else + dpath = 8; /* 64 bits */ /* get address pins (rows) */ val = SDRAM0_READ(DDR0_42); -- cgit v1.2.3 From 28853da20c840f0d147674ac850c539d3306109f Mon Sep 17 00:00:00 2001 From: Martyn Welch Date: Mon, 27 Apr 2009 17:24:28 +0100 Subject: powerpc/86xx: Add device_type entry to soc for ppc9a The 'device_type = "soc";' line *is* needed in the DTS for get_immrbase() to return the correct address. Signed-off-by: Martyn Welch Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/gef_ppc9a.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts index d47ad0718759..53a7a6255909 100644 --- a/arch/powerpc/boot/dts/gef_ppc9a.dts +++ b/arch/powerpc/boot/dts/gef_ppc9a.dts @@ -161,6 +161,7 @@ #address-cells = <1>; #size-cells = <1>; #interrupt-cells = <2>; + device_type = "soc"; compatible = "fsl,mpc8641-soc", "simple-bus"; ranges = <0x0 0xfef00000 0x00100000>; reg = <0xfef00000 0x100000>; // CCSRBAR 1M -- cgit v1.2.3