From 765ae317ce030217af556dc46bec238dab15091e Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 11:31:32 +0900 Subject: sh: Fixup some uninitialized spinlocks. Fix use of uninitialized spinlocks, caught with spinlock debugging.. Signed-off-by: Paul Mundt --- arch/sh/kernel/semaphore.c | 2 +- arch/sh/kernel/traps.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/semaphore.c b/arch/sh/kernel/semaphore.c index a3c24dcbf01d..184119eeae56 100644 --- a/arch/sh/kernel/semaphore.c +++ b/arch/sh/kernel/semaphore.c @@ -14,7 +14,7 @@ #include #include -spinlock_t semaphore_wake_lock; +DEFINE_SPINLOCK(semaphore_wake_lock); /* * Semaphores are implemented using a two-way counter: diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c index d9db1180f770..21bef1b5f991 100644 --- a/arch/sh/kernel/traps.c +++ b/arch/sh/kernel/traps.c @@ -86,7 +86,7 @@ asmlinkage void do_##name(unsigned long r4, unsigned long r5, \ #define VMALLOC_OFFSET (8*1024*1024) #define MODULE_RANGE (8*1024*1024) -spinlock_t die_lock; +DEFINE_SPINLOCK(die_lock); void die(const char * str, struct pt_regs * regs, long err) { -- cgit v1.2.3 From 1c5f8f85df96dd7c17d63eed2d7da18b3ad00b6d Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 11:36:10 +0900 Subject: sh: Move syscall table in to syscall.S. Move the syscall table in to its own file, as per sh64. The entry.S bits will end up being considerably different in the sh2/sh2a cases, so this lets us keep things in sync somewhat.. Signed-off-by: Paul Mundt --- arch/sh/kernel/Makefile | 2 +- arch/sh/kernel/entry.S | 297 ------------------------------------------ arch/sh/kernel/syscalls.S | 324 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 325 insertions(+), 298 deletions(-) create mode 100644 arch/sh/kernel/syscalls.S (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile index f05cd96f8867..2de82b66af4a 100644 --- a/arch/sh/kernel/Makefile +++ b/arch/sh/kernel/Makefile @@ -6,7 +6,7 @@ extra-y := head.o init_task.o vmlinux.lds obj-y := process.o signal.o entry.o traps.o irq.o \ ptrace.o setup.o time.o sys_sh.o semaphore.o \ - io.o io_generic.o sh_ksyms.o + io.o io_generic.o sh_ksyms.o syscalls.o obj-y += cpu/ timers/ diff --git a/arch/sh/kernel/entry.S b/arch/sh/kernel/entry.S index 7dfd2ba75f7f..a3a717adbf43 100644 --- a/arch/sh/kernel/entry.S +++ b/arch/sh/kernel/entry.S @@ -838,300 +838,3 @@ ENTRY(exception_none) rts nop - .data -ENTRY(sys_call_table) - .long sys_ni_syscall /* 0 - old "setup()" system call*/ - .long sys_exit - .long sys_fork - .long sys_read - .long sys_write - .long sys_open /* 5 */ - .long sys_close - .long sys_waitpid - .long sys_creat - .long sys_link - .long sys_unlink /* 10 */ - .long sys_execve - .long sys_chdir - .long sys_time - .long sys_mknod - .long sys_chmod /* 15 */ - .long sys_lchown16 - .long sys_ni_syscall /* old break syscall holder */ - .long sys_stat - .long sys_lseek - .long sys_getpid /* 20 */ - .long sys_mount - .long sys_oldumount - .long sys_setuid16 - .long sys_getuid16 - .long sys_stime /* 25 */ - .long sys_ptrace - .long sys_alarm - .long sys_fstat - .long sys_pause - .long sys_utime /* 30 */ - .long sys_ni_syscall /* old stty syscall holder */ - .long sys_ni_syscall /* old gtty syscall holder */ - .long sys_access - .long sys_nice - .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */ - .long sys_sync - .long sys_kill - .long sys_rename - .long sys_mkdir - .long sys_rmdir /* 40 */ - .long sys_dup - .long sys_pipe - .long sys_times - .long sys_ni_syscall /* old prof syscall holder */ - .long sys_brk /* 45 */ - .long sys_setgid16 - .long sys_getgid16 - .long sys_signal - .long sys_geteuid16 - .long sys_getegid16 /* 50 */ - .long sys_acct - .long sys_umount /* recycled never used phys() */ - .long sys_ni_syscall /* old lock syscall holder */ - .long sys_ioctl - .long sys_fcntl /* 55 */ - .long sys_ni_syscall /* old mpx syscall holder */ - .long sys_setpgid - .long sys_ni_syscall /* old ulimit syscall holder */ - .long sys_ni_syscall /* sys_olduname */ - .long sys_umask /* 60 */ - .long sys_chroot - .long sys_ustat - .long sys_dup2 - .long sys_getppid - .long sys_getpgrp /* 65 */ - .long sys_setsid - .long sys_sigaction - .long sys_sgetmask - .long sys_ssetmask - .long sys_setreuid16 /* 70 */ - .long sys_setregid16 - .long sys_sigsuspend - .long sys_sigpending - .long sys_sethostname - .long sys_setrlimit /* 75 */ - .long sys_old_getrlimit - .long sys_getrusage - .long sys_gettimeofday - .long sys_settimeofday - .long sys_getgroups16 /* 80 */ - .long sys_setgroups16 - .long sys_ni_syscall /* sys_oldselect */ - .long sys_symlink - .long sys_lstat - .long sys_readlink /* 85 */ - .long sys_uselib - .long sys_swapon - .long sys_reboot - .long old_readdir - .long old_mmap /* 90 */ - .long sys_munmap - .long sys_truncate - .long sys_ftruncate - .long sys_fchmod - .long sys_fchown16 /* 95 */ - .long sys_getpriority - .long sys_setpriority - .long sys_ni_syscall /* old profil syscall holder */ - .long sys_statfs - .long sys_fstatfs /* 100 */ - .long sys_ni_syscall /* ioperm */ - .long sys_socketcall - .long sys_syslog - .long sys_setitimer - .long sys_getitimer /* 105 */ - .long sys_newstat - .long sys_newlstat - .long sys_newfstat - .long sys_uname - .long sys_ni_syscall /* 110 */ /* iopl */ - .long sys_vhangup - .long sys_ni_syscall /* idle */ - .long sys_ni_syscall /* vm86old */ - .long sys_wait4 - .long sys_swapoff /* 115 */ - .long sys_sysinfo - .long sys_ipc - .long sys_fsync - .long sys_sigreturn - .long sys_clone /* 120 */ - .long sys_setdomainname - .long sys_newuname - .long sys_ni_syscall /* sys_modify_ldt */ - .long sys_adjtimex - .long sys_mprotect /* 125 */ - .long sys_sigprocmask - .long sys_ni_syscall /* old "create_module" */ - .long sys_init_module - .long sys_delete_module - .long sys_ni_syscall /* 130: old "get_kernel_syms" */ - .long sys_quotactl - .long sys_getpgid - .long sys_fchdir - .long sys_bdflush - .long sys_sysfs /* 135 */ - .long sys_personality - .long sys_ni_syscall /* for afs_syscall */ - .long sys_setfsuid16 - .long sys_setfsgid16 - .long sys_llseek /* 140 */ - .long sys_getdents - .long sys_select - .long sys_flock - .long sys_msync - .long sys_readv /* 145 */ - .long sys_writev - .long sys_getsid - .long sys_fdatasync - .long sys_sysctl - .long sys_mlock /* 150 */ - .long sys_munlock - .long sys_mlockall - .long sys_munlockall - .long sys_sched_setparam - .long sys_sched_getparam /* 155 */ - .long sys_sched_setscheduler - .long sys_sched_getscheduler - .long sys_sched_yield - .long sys_sched_get_priority_max - .long sys_sched_get_priority_min /* 160 */ - .long sys_sched_rr_get_interval - .long sys_nanosleep - .long sys_mremap - .long sys_setresuid16 - .long sys_getresuid16 /* 165 */ - .long sys_ni_syscall /* vm86 */ - .long sys_ni_syscall /* old "query_module" */ - .long sys_poll - .long sys_nfsservctl - .long sys_setresgid16 /* 170 */ - .long sys_getresgid16 - .long sys_prctl - .long sys_rt_sigreturn - .long sys_rt_sigaction - .long sys_rt_sigprocmask /* 175 */ - .long sys_rt_sigpending - .long sys_rt_sigtimedwait - .long sys_rt_sigqueueinfo - .long sys_rt_sigsuspend - .long sys_pread_wrapper /* 180 */ - .long sys_pwrite_wrapper - .long sys_chown16 - .long sys_getcwd - .long sys_capget - .long sys_capset /* 185 */ - .long sys_sigaltstack - .long sys_sendfile - .long sys_ni_syscall /* streams1 */ - .long sys_ni_syscall /* streams2 */ - .long sys_vfork /* 190 */ - .long sys_getrlimit - .long sys_mmap2 - .long sys_truncate64 - .long sys_ftruncate64 - .long sys_stat64 /* 195 */ - .long sys_lstat64 - .long sys_fstat64 - .long sys_lchown - .long sys_getuid - .long sys_getgid /* 200 */ - .long sys_geteuid - .long sys_getegid - .long sys_setreuid - .long sys_setregid - .long sys_getgroups /* 205 */ - .long sys_setgroups - .long sys_fchown - .long sys_setresuid - .long sys_getresuid - .long sys_setresgid /* 210 */ - .long sys_getresgid - .long sys_chown - .long sys_setuid - .long sys_setgid - .long sys_setfsuid /* 215 */ - .long sys_setfsgid - .long sys_pivot_root - .long sys_mincore - .long sys_madvise - .long sys_getdents64 /* 220 */ - .long sys_fcntl64 - .long sys_ni_syscall /* reserved for TUX */ - .long sys_ni_syscall /* Reserved for Security */ - .long sys_gettid - .long sys_readahead /* 225 */ - .long sys_setxattr - .long sys_lsetxattr - .long sys_fsetxattr - .long sys_getxattr - .long sys_lgetxattr /* 230 */ - .long sys_fgetxattr - .long sys_listxattr - .long sys_llistxattr - .long sys_flistxattr - .long sys_removexattr /* 235 */ - .long sys_lremovexattr - .long sys_fremovexattr - .long sys_tkill - .long sys_sendfile64 - .long sys_futex /* 240 */ - .long sys_sched_setaffinity - .long sys_sched_getaffinity - .long sys_ni_syscall - .long sys_ni_syscall - .long sys_io_setup /* 245 */ - .long sys_io_destroy - .long sys_io_getevents - .long sys_io_submit - .long sys_io_cancel - .long sys_fadvise64 /* 250 */ - .long sys_ni_syscall - .long sys_exit_group - .long sys_lookup_dcookie - .long sys_epoll_create - .long sys_epoll_ctl /* 255 */ - .long sys_epoll_wait - .long sys_remap_file_pages - .long sys_set_tid_address - .long sys_timer_create - .long sys_timer_settime /* 260 */ - .long sys_timer_gettime - .long sys_timer_getoverrun - .long sys_timer_delete - .long sys_clock_settime - .long sys_clock_gettime /* 265 */ - .long sys_clock_getres - .long sys_clock_nanosleep - .long sys_statfs64 - .long sys_fstatfs64 - .long sys_tgkill /* 270 */ - .long sys_utimes - .long sys_fadvise64_64_wrapper - .long sys_ni_syscall /* Reserved for vserver */ - .long sys_ni_syscall /* Reserved for mbind */ - .long sys_ni_syscall /* 275 - get_mempolicy */ - .long sys_ni_syscall /* set_mempolicy */ - .long sys_mq_open - .long sys_mq_unlink - .long sys_mq_timedsend - .long sys_mq_timedreceive /* 280 */ - .long sys_mq_notify - .long sys_mq_getsetattr - .long sys_ni_syscall /* Reserved for kexec */ - .long sys_waitid - .long sys_add_key /* 285 */ - .long sys_request_key - .long sys_keyctl - .long sys_ioprio_set - .long sys_ioprio_get - .long sys_inotify_init /* 290 */ - .long sys_inotify_add_watch - .long sys_inotify_rm_watch - -/* End of entry.S */ diff --git a/arch/sh/kernel/syscalls.S b/arch/sh/kernel/syscalls.S new file mode 100644 index 000000000000..f500304cbd69 --- /dev/null +++ b/arch/sh/kernel/syscalls.S @@ -0,0 +1,324 @@ +/* + * arch/sh/kernel/syscalls.S + * + * System call table for SuperH + * + * Copyright (C) 1999, 2000, 2002 Niibe Yutaka + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + */ +#include +#include + +#if !defined(CONFIG_NFSD) && !defined(CONFIG_NFSD_MODULE) +#define sys_nfsservctl sys_ni_syscall +#endif + +#if !defined(CONFIG_MMU) +#define sys_madvise sys_ni_syscall +#define sys_readahead sys_ni_syscall +#define sys_mprotect sys_ni_syscall +#define sys_msync sys_ni_syscall +#define sys_mlock sys_ni_syscall +#define sys_munlock sys_ni_syscall +#define sys_mlockall sys_ni_syscall +#define sys_munlockall sys_ni_syscall +#define sys_mremap sys_ni_syscall +#define sys_mincore sys_ni_syscall +#define sys_remap_file_pages sys_ni_syscall +#endif + + .data +ENTRY(sys_call_table) + .long sys_ni_syscall /* 0 - old "setup()" system call*/ + .long sys_exit + .long sys_fork + .long sys_read + .long sys_write + .long sys_open /* 5 */ + .long sys_close + .long sys_waitpid + .long sys_creat + .long sys_link + .long sys_unlink /* 10 */ + .long sys_execve + .long sys_chdir + .long sys_time + .long sys_mknod + .long sys_chmod /* 15 */ + .long sys_lchown16 + .long sys_ni_syscall /* old break syscall holder */ + .long sys_stat + .long sys_lseek + .long sys_getpid /* 20 */ + .long sys_mount + .long sys_oldumount + .long sys_setuid16 + .long sys_getuid16 + .long sys_stime /* 25 */ + .long sys_ptrace + .long sys_alarm + .long sys_fstat + .long sys_pause + .long sys_utime /* 30 */ + .long sys_ni_syscall /* old stty syscall holder */ + .long sys_ni_syscall /* old gtty syscall holder */ + .long sys_access + .long sys_nice + .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */ + .long sys_sync + .long sys_kill + .long sys_rename + .long sys_mkdir + .long sys_rmdir /* 40 */ + .long sys_dup + .long sys_pipe + .long sys_times + .long sys_ni_syscall /* old prof syscall holder */ + .long sys_brk /* 45 */ + .long sys_setgid16 + .long sys_getgid16 + .long sys_signal + .long sys_geteuid16 + .long sys_getegid16 /* 50 */ + .long sys_acct + .long sys_umount /* recycled never used phys() */ + .long sys_ni_syscall /* old lock syscall holder */ + .long sys_ioctl + .long sys_fcntl /* 55 */ + .long sys_ni_syscall /* old mpx syscall holder */ + .long sys_setpgid + .long sys_ni_syscall /* old ulimit syscall holder */ + .long sys_ni_syscall /* sys_olduname */ + .long sys_umask /* 60 */ + .long sys_chroot + .long sys_ustat + .long sys_dup2 + .long sys_getppid + .long sys_getpgrp /* 65 */ + .long sys_setsid + .long sys_sigaction + .long sys_sgetmask + .long sys_ssetmask + .long sys_setreuid16 /* 70 */ + .long sys_setregid16 + .long sys_sigsuspend + .long sys_sigpending + .long sys_sethostname + .long sys_setrlimit /* 75 */ + .long sys_old_getrlimit + .long sys_getrusage + .long sys_gettimeofday + .long sys_settimeofday + .long sys_getgroups16 /* 80 */ + .long sys_setgroups16 + .long sys_ni_syscall /* sys_oldselect */ + .long sys_symlink + .long sys_lstat + .long sys_readlink /* 85 */ + .long sys_uselib + .long sys_swapon + .long sys_reboot + .long old_readdir + .long old_mmap /* 90 */ + .long sys_munmap + .long sys_truncate + .long sys_ftruncate + .long sys_fchmod + .long sys_fchown16 /* 95 */ + .long sys_getpriority + .long sys_setpriority + .long sys_ni_syscall /* old profil syscall holder */ + .long sys_statfs + .long sys_fstatfs /* 100 */ + .long sys_ni_syscall /* ioperm */ + .long sys_socketcall + .long sys_syslog + .long sys_setitimer + .long sys_getitimer /* 105 */ + .long sys_newstat + .long sys_newlstat + .long sys_newfstat + .long sys_uname + .long sys_ni_syscall /* 110 */ /* iopl */ + .long sys_vhangup + .long sys_ni_syscall /* idle */ + .long sys_ni_syscall /* vm86old */ + .long sys_wait4 + .long sys_swapoff /* 115 */ + .long sys_sysinfo + .long sys_ipc + .long sys_fsync + .long sys_sigreturn + .long sys_clone /* 120 */ + .long sys_setdomainname + .long sys_newuname + .long sys_ni_syscall /* sys_modify_ldt */ + .long sys_adjtimex + .long sys_mprotect /* 125 */ + .long sys_sigprocmask + .long sys_ni_syscall /* old "create_module" */ + .long sys_init_module + .long sys_delete_module + .long sys_ni_syscall /* 130: old "get_kernel_syms" */ + .long sys_quotactl + .long sys_getpgid + .long sys_fchdir + .long sys_bdflush + .long sys_sysfs /* 135 */ + .long sys_personality + .long sys_ni_syscall /* for afs_syscall */ + .long sys_setfsuid16 + .long sys_setfsgid16 + .long sys_llseek /* 140 */ + .long sys_getdents + .long sys_select + .long sys_flock + .long sys_msync + .long sys_readv /* 145 */ + .long sys_writev + .long sys_getsid + .long sys_fdatasync + .long sys_sysctl + .long sys_mlock /* 150 */ + .long sys_munlock + .long sys_mlockall + .long sys_munlockall + .long sys_sched_setparam + .long sys_sched_getparam /* 155 */ + .long sys_sched_setscheduler + .long sys_sched_getscheduler + .long sys_sched_yield + .long sys_sched_get_priority_max + .long sys_sched_get_priority_min /* 160 */ + .long sys_sched_rr_get_interval + .long sys_nanosleep + .long sys_mremap + .long sys_setresuid16 + .long sys_getresuid16 /* 165 */ + .long sys_ni_syscall /* vm86 */ + .long sys_ni_syscall /* old "query_module" */ + .long sys_poll + .long sys_nfsservctl + .long sys_setresgid16 /* 170 */ + .long sys_getresgid16 + .long sys_prctl + .long sys_rt_sigreturn + .long sys_rt_sigaction + .long sys_rt_sigprocmask /* 175 */ + .long sys_rt_sigpending + .long sys_rt_sigtimedwait + .long sys_rt_sigqueueinfo + .long sys_rt_sigsuspend + .long sys_pread_wrapper /* 180 */ + .long sys_pwrite_wrapper + .long sys_chown16 + .long sys_getcwd + .long sys_capget + .long sys_capset /* 185 */ + .long sys_sigaltstack + .long sys_sendfile + .long sys_ni_syscall /* streams1 */ + .long sys_ni_syscall /* streams2 */ + .long sys_vfork /* 190 */ + .long sys_getrlimit + .long sys_mmap2 + .long sys_truncate64 + .long sys_ftruncate64 + .long sys_stat64 /* 195 */ + .long sys_lstat64 + .long sys_fstat64 + .long sys_lchown + .long sys_getuid + .long sys_getgid /* 200 */ + .long sys_geteuid + .long sys_getegid + .long sys_setreuid + .long sys_setregid + .long sys_getgroups /* 205 */ + .long sys_setgroups + .long sys_fchown + .long sys_setresuid + .long sys_getresuid + .long sys_setresgid /* 210 */ + .long sys_getresgid + .long sys_chown + .long sys_setuid + .long sys_setgid + .long sys_setfsuid /* 215 */ + .long sys_setfsgid + .long sys_pivot_root + .long sys_mincore + .long sys_madvise + .long sys_getdents64 /* 220 */ + .long sys_fcntl64 + .long sys_ni_syscall /* reserved for TUX */ + .long sys_ni_syscall /* Reserved for Security */ + .long sys_gettid + .long sys_readahead /* 225 */ + .long sys_setxattr + .long sys_lsetxattr + .long sys_fsetxattr + .long sys_getxattr + .long sys_lgetxattr /* 230 */ + .long sys_fgetxattr + .long sys_listxattr + .long sys_llistxattr + .long sys_flistxattr + .long sys_removexattr /* 235 */ + .long sys_lremovexattr + .long sys_fremovexattr + .long sys_tkill + .long sys_sendfile64 + .long sys_futex /* 240 */ + .long sys_sched_setaffinity + .long sys_sched_getaffinity + .long sys_ni_syscall + .long sys_ni_syscall + .long sys_io_setup /* 245 */ + .long sys_io_destroy + .long sys_io_getevents + .long sys_io_submit + .long sys_io_cancel + .long sys_fadvise64 /* 250 */ + .long sys_ni_syscall + .long sys_exit_group + .long sys_lookup_dcookie + .long sys_epoll_create + .long sys_epoll_ctl /* 255 */ + .long sys_epoll_wait + .long sys_remap_file_pages + .long sys_set_tid_address + .long sys_timer_create + .long sys_timer_settime /* 260 */ + .long sys_timer_gettime + .long sys_timer_getoverrun + .long sys_timer_delete + .long sys_clock_settime + .long sys_clock_gettime /* 265 */ + .long sys_clock_getres + .long sys_clock_nanosleep + .long sys_statfs64 + .long sys_fstatfs64 + .long sys_tgkill /* 270 */ + .long sys_utimes + .long sys_fadvise64_64_wrapper + .long sys_ni_syscall /* Reserved for vserver */ + .long sys_ni_syscall /* Reserved for mbind */ + .long sys_ni_syscall /* 275 - get_mempolicy */ + .long sys_ni_syscall /* set_mempolicy */ + .long sys_mq_open + .long sys_mq_unlink + .long sys_mq_timedsend + .long sys_mq_timedreceive /* 280 */ + .long sys_mq_notify + .long sys_mq_getsetattr + .long sys_kexec_load + .long sys_waitid + .long sys_add_key /* 285 */ + .long sys_request_key + .long sys_keyctl -- cgit v1.2.3 From 6ae5e8d7598ce01ac0e7dab1b89894c7386a2e61 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 11:37:33 +0900 Subject: sh: Fix kGDB NMI handling. in_nmi shifted down a few labels, so we were inadvertently clearing the lower byte of do_syscall_trace, badness ensues. Signed-off-by: Paul Mundt --- arch/sh/kernel/entry.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/entry.S b/arch/sh/kernel/entry.S index a3a717adbf43..1a05804caf37 100644 --- a/arch/sh/kernel/entry.S +++ b/arch/sh/kernel/entry.S @@ -644,7 +644,7 @@ skip_restore: ! #if defined(CONFIG_KGDB_NMI) ! Clear in_nmi - mov.l 4f, k0 + mov.l 6f, k0 mov #0, k1 mov.b k1, @k0 #endif -- cgit v1.2.3 From 50e98e72e459e43b6b9a5449e35bb6fc54e21149 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 11:40:05 +0900 Subject: sh: Kill off the .stack section. We had a special .stack section in the ld script that was being used to position r15 initially. This is nonsensical, as we can just use a THREAD_SIZE offset from the init_thread_union instead (as every other arch does). Signed-off-by: Paul Mundt --- arch/sh/kernel/head.S | 2 +- arch/sh/kernel/vmlinux.lds.S | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/head.S b/arch/sh/kernel/head.S index 9b9e6ef626ce..00cd4708ef46 100644 --- a/arch/sh/kernel/head.S +++ b/arch/sh/kernel/head.S @@ -69,7 +69,7 @@ ENTRY(_stext) .balign 4 1: .long 0x400080F0 ! MD=1, RB=0, BL=0, FD=1, IMASK=0xF -2: .long stack +2: .long init_thread_union+8192 3: .long __bss_start 4: .long _end 5: .long start_kernel diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S index 95fdd9135fcf..3f3e1e0735f5 100644 --- a/arch/sh/kernel/vmlinux.lds.S +++ b/arch/sh/kernel/vmlinux.lds.S @@ -62,8 +62,6 @@ SECTIONS . = ALIGN(8192); /* init_task */ .data.init_task : { *(.data.init_task) } - /* stack */ - .stack : { stack = .; _stack = .; } . = ALIGN(4096); /* Init code and data */ __init_begin = .; -- cgit v1.2.3 From e4c2cfee5d5cf3e4c16b423be23551aeddf2717b Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 12:31:01 +0900 Subject: sh: Various cosmetic cleanups. We had quite a bit of whitespace damage, clean most of it up.. Signed-off-by: Stuart Menefy Signed-off-by: Arthur Othieno Signed-off-by: Paul Mundt --- arch/sh/boards/dreamcast/irq.c | 8 ++-- arch/sh/boards/dreamcast/rtc.c | 18 ++++----- arch/sh/boards/dreamcast/setup.c | 6 +-- arch/sh/boards/renesas/edosk7705/Makefile | 4 -- arch/sh/boards/renesas/hs7751rvoip/Makefile | 4 -- arch/sh/boards/renesas/hs7751rvoip/io.c | 4 +- arch/sh/boards/renesas/rts7751r2d/Makefile | 4 -- arch/sh/boards/renesas/rts7751r2d/led.c | 2 - arch/sh/boards/renesas/rts7751r2d/setup.c | 3 -- arch/sh/drivers/dma/dma-pvr2.c | 5 +-- arch/sh/kernel/cpu/clock.c | 2 +- arch/sh/kernel/cpu/sh4/sq.c | 3 +- arch/sh/kernel/entry.S | 18 --------- arch/sh/kernel/ptrace.c | 1 - arch/sh/kernel/sh_ksyms.c | 2 + drivers/char/watchdog/shwdt.c | 58 ++++++++++++----------------- include/asm-sh/atomic.h | 1 + include/asm-sh/bitops.h | 16 ++++---- include/asm-sh/checksum.h | 2 + include/asm-sh/fixmap.h | 2 +- include/asm-sh/watchdog.h | 3 -- 21 files changed, 60 insertions(+), 106 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/boards/dreamcast/irq.c b/arch/sh/boards/dreamcast/irq.c index b10a6b11c034..373a22e48ac4 100644 --- a/arch/sh/boards/dreamcast/irq.c +++ b/arch/sh/boards/dreamcast/irq.c @@ -26,10 +26,10 @@ event. There are three 32-bit ESRs located at 0xa05f8900 - 0xa05f6908. Event - types can be found in include/asm-sh/dc_sysasic.h. There are three groups - of EMRs that parallel the ESRs. Each EMR group corresponds to an IRQ, so - 0xa05f6910 - 0xa05f6918 triggers IRQ 13, 0xa05f6920 - 0xa05f6928 triggers - IRQ 11, and 0xa05f6930 - 0xa05f6938 triggers IRQ 9. + types can be found in include/asm-sh/dreamcast/sysasic.h. There are three + groups of EMRs that parallel the ESRs. Each EMR group corresponds to an + IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13, 0xa05f6920 - 0xa05f6928 + triggers IRQ 11, and 0xa05f6930 - 0xa05f6938 triggers IRQ 9. In the kernel, these events are mapped to virtual IRQs so that drivers can respond to them as they would a normal interrupt. In order to keep this diff --git a/arch/sh/boards/dreamcast/rtc.c b/arch/sh/boards/dreamcast/rtc.c index 379de1629134..44420494dc22 100644 --- a/arch/sh/boards/dreamcast/rtc.c +++ b/arch/sh/boards/dreamcast/rtc.c @@ -1,4 +1,5 @@ -/* arch/sh/kernel/rtc-aica.c +/* + * arch/sh/boards/dreamcast/rtc.c * * Dreamcast AICA RTC routines. * @@ -10,15 +11,12 @@ */ #include - +#include #include -extern void (*rtc_get_time)(struct timespec *); -extern int (*rtc_set_time)(const time_t); - /* The AICA RTC has an Epoch of 1/1/1950, so we must subtract 20 years (in - seconds to get the standard Unix Epoch when getting the time, and add 20 - years when setting the time. */ + seconds) to get the standard Unix Epoch when getting the time, and add + 20 years when setting the time. */ #define TWENTY_YEARS ((20 * 365LU + 5) * 86400) /* The AICA RTC is represented by a 32-bit seconds counter stored in 2 16-bit @@ -32,7 +30,8 @@ extern int (*rtc_set_time)(const time_t); * * Grabs the current RTC seconds counter and adjusts it to the Unix Epoch. */ -void aica_rtc_gettimeofday(struct timespec *ts) { +void aica_rtc_gettimeofday(struct timespec *ts) +{ unsigned long val1, val2; do { @@ -55,7 +54,8 @@ void aica_rtc_gettimeofday(struct timespec *ts) { * * Adjusts the given @tv to the AICA Epoch and sets the RTC seconds counter. */ -int aica_rtc_settimeofday(const time_t secs) { +int aica_rtc_settimeofday(const time_t secs) +{ unsigned long val1, val2; unsigned long adj = secs + TWENTY_YEARS; diff --git a/arch/sh/boards/dreamcast/setup.c b/arch/sh/boards/dreamcast/setup.c index 0027b80a2343..a00ac94beb05 100644 --- a/arch/sh/boards/dreamcast/setup.c +++ b/arch/sh/boards/dreamcast/setup.c @@ -25,18 +25,16 @@ #include #include +#include #include -#include #include extern struct hw_interrupt_type systemasic_int; -/* XXX: Move this into it's proper header. */ -extern void (*board_time_init)(void); extern void aica_time_init(void); extern int gapspci_init(void); extern int systemasic_irq_demux(int); -void *dreamcast_consistent_alloc(struct device *, size_t, dma_addr_t *, int); +void *dreamcast_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t); int dreamcast_consistent_free(struct device *, size_t, void *, dma_addr_t); const char *get_system_type(void) diff --git a/arch/sh/boards/renesas/edosk7705/Makefile b/arch/sh/boards/renesas/edosk7705/Makefile index 7fccbf2e4a1d..14bdd531f116 100644 --- a/arch/sh/boards/renesas/edosk7705/Makefile +++ b/arch/sh/boards/renesas/edosk7705/Makefile @@ -1,10 +1,6 @@ # # Makefile for the EDOSK7705 specific parts of the kernel # -# Note! Dependencies are done automagically by 'make dep', which also -# removes any old dependencies. DON'T put your own dependencies here -# unless it's something special (ie not a .c file). -# obj-y := setup.o io.o diff --git a/arch/sh/boards/renesas/hs7751rvoip/Makefile b/arch/sh/boards/renesas/hs7751rvoip/Makefile index e8b4109ace11..3ef8cbaa0b37 100644 --- a/arch/sh/boards/renesas/hs7751rvoip/Makefile +++ b/arch/sh/boards/renesas/hs7751rvoip/Makefile @@ -1,10 +1,6 @@ # # Makefile for the HS7751RVoIP specific parts of the kernel # -# Note! Dependencies are done automagically by 'make dep', which also -# removes any old dependencies. DON'T put your own dependencies here -# unless it's something special (ie not a .c file). -# obj-y := mach.o setup.o io.o irq.o led.o diff --git a/arch/sh/boards/renesas/hs7751rvoip/io.c b/arch/sh/boards/renesas/hs7751rvoip/io.c index 3a1abfa2fefb..09fb77ffb835 100644 --- a/arch/sh/boards/renesas/hs7751rvoip/io.c +++ b/arch/sh/boards/renesas/hs7751rvoip/io.c @@ -167,7 +167,7 @@ void hs7751rvoip_outb(unsigned char value, unsigned long port) *(volatile unsigned char *)port = value; #if defined(CONFIG_HS7751RVOIP_CODEC) else if (codec_port(port)) - *(volatile unsigned cjar *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = value; + *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = value; #endif else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) *(unsigned char *)PCI_IOMAP(port) = value; @@ -181,7 +181,7 @@ void hs7751rvoip_outb_p(unsigned char value, unsigned long port) *(volatile unsigned char *)port = value; #if defined(CONFIG_HS7751RVOIP_CODEC) else if (codec_port(port)) - *(volatile unsigned cjar *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = value; + *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = value; #endif else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) *(unsigned char *)PCI_IOMAP(port) = value; diff --git a/arch/sh/boards/renesas/rts7751r2d/Makefile b/arch/sh/boards/renesas/rts7751r2d/Makefile index daa53334bdc3..eee1ed6f5727 100644 --- a/arch/sh/boards/renesas/rts7751r2d/Makefile +++ b/arch/sh/boards/renesas/rts7751r2d/Makefile @@ -1,10 +1,6 @@ # # Makefile for the RTS7751R2D specific parts of the kernel # -# Note! Dependencies are done automagically by 'make dep', which also -# removes any old dependencies. DON'T put your own dependencies here -# unless it's something special (ie not a .c file). -# obj-y := mach.o setup.o io.o irq.o led.o diff --git a/arch/sh/boards/renesas/rts7751r2d/led.c b/arch/sh/boards/renesas/rts7751r2d/led.c index 4d16de71fac1..cf35f90dfe03 100644 --- a/arch/sh/boards/renesas/rts7751r2d/led.c +++ b/arch/sh/boards/renesas/rts7751r2d/led.c @@ -12,8 +12,6 @@ #include #include -extern unsigned int debug_counter; - #ifdef CONFIG_HEARTBEAT #include diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c index 7953dde0b91c..60907f574f34 100644 --- a/arch/sh/boards/renesas/rts7751r2d/setup.c +++ b/arch/sh/boards/renesas/rts7751r2d/setup.c @@ -14,8 +14,6 @@ #include #include -unsigned int debug_counter; - const char *get_system_type(void) { return "RTS7751R2D"; @@ -34,5 +32,4 @@ void __init platform_setup(void) printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); ctrl_outw(0x0000, PA_OUTPORT); pm_power_off = rts7751r2d_power_off; - debug_counter = 0; } diff --git a/arch/sh/drivers/dma/dma-pvr2.c b/arch/sh/drivers/dma/dma-pvr2.c index 30a580aa7cbd..3b0b0f60bb3c 100644 --- a/arch/sh/drivers/dma/dma-pvr2.c +++ b/arch/sh/drivers/dma/dma-pvr2.c @@ -18,8 +18,8 @@ #include #include -static unsigned int xfer_complete = 0; -static int count = 0; +static unsigned int xfer_complete; +static int count; static irqreturn_t pvr2_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs) { @@ -107,4 +107,3 @@ module_exit(pvr2_dma_exit); MODULE_AUTHOR("Paul Mundt "); MODULE_DESCRIPTION("NEC PowerVR 2 DMA driver"); MODULE_LICENSE("GPL"); - diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c index 97fa37f42b84..e7eef07536f5 100644 --- a/arch/sh/kernel/cpu/clock.c +++ b/arch/sh/kernel/cpu/clock.c @@ -225,7 +225,7 @@ int __init clk_init(void) { int i, ret = 0; - BUG_ON(unlikely(!master_clk.rate)); + BUG_ON(!master_clk.rate); for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) { struct clk *clk = onchip_clocks[i]; diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c index b09805f3ee23..00f6a3c8c43b 100644 --- a/arch/sh/kernel/cpu/sh4/sq.c +++ b/arch/sh/kernel/cpu/sh4/sq.c @@ -24,9 +24,10 @@ #include #include #include - +#include #include #include +#include #include #include diff --git a/arch/sh/kernel/entry.S b/arch/sh/kernel/entry.S index 1a05804caf37..306eb8d83de5 100644 --- a/arch/sh/kernel/entry.S +++ b/arch/sh/kernel/entry.S @@ -18,24 +18,6 @@ #include #include -#if !defined(CONFIG_NFSD) && !defined(CONFIG_NFSD_MODULE) -#define sys_nfsservctl sys_ni_syscall -#endif - -#if !defined(CONFIG_MMU) -#define sys_madvise sys_ni_syscall -#define sys_readahead sys_ni_syscall -#define sys_mprotect sys_ni_syscall -#define sys_msync sys_ni_syscall -#define sys_mlock sys_ni_syscall -#define sys_munlock sys_ni_syscall -#define sys_mlockall sys_ni_syscall -#define sys_munlockall sys_ni_syscall -#define sys_mremap sys_ni_syscall -#define sys_mincore sys_ni_syscall -#define sys_remap_file_pages sys_ni_syscall -#endif - ! NOTE: ! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address ! to be jumped is too far, but it causes illegal slot exception. diff --git a/arch/sh/kernel/ptrace.c b/arch/sh/kernel/ptrace.c index f7eebbde3291..04ca13a041c1 100644 --- a/arch/sh/kernel/ptrace.c +++ b/arch/sh/kernel/ptrace.c @@ -224,7 +224,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) case PTRACE_SETDSPREGS: { unsigned long dp; - int i; ret = -EIO; dp = ((unsigned long) child) + THREAD_SIZE - diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms.c index 245ed8f945e8..8cad80cec9a6 100644 --- a/arch/sh/kernel/sh_ksyms.c +++ b/arch/sh/kernel/sh_ksyms.c @@ -117,6 +117,8 @@ EXPORT_SYMBOL(synchronize_irq); #endif EXPORT_SYMBOL(csum_partial); +#ifdef CONFIG_IPV6 EXPORT_SYMBOL(csum_ipv6_magic); +#endif EXPORT_SYMBOL(consistent_sync); EXPORT_SYMBOL(clear_page); diff --git a/drivers/char/watchdog/shwdt.c b/drivers/char/watchdog/shwdt.c index 1355038f1044..7c39f39effdf 100644 --- a/drivers/char/watchdog/shwdt.c +++ b/drivers/char/watchdog/shwdt.c @@ -125,7 +125,6 @@ static void sh_wdt_start(void) /** * sh_wdt_stop - Stop the Watchdog - * * Stops the watchdog. */ static void sh_wdt_stop(void) @@ -141,22 +140,20 @@ static void sh_wdt_stop(void) /** * sh_wdt_keepalive - Keep the Userspace Watchdog Alive - * * The Userspace watchdog got a KeepAlive: schedule the next heartbeat. */ -static void sh_wdt_keepalive(void) +static inline void sh_wdt_keepalive(void) { next_heartbeat = jiffies + (heartbeat * HZ); } /** * sh_wdt_set_heartbeat - Set the Userspace Watchdog heartbeat - * * Set the Userspace Watchdog heartbeat */ static int sh_wdt_set_heartbeat(int t) { - if ((t < 1) || (t > 3600)) /* arbitrary upper limit */ + if (unlikely((t < 1) || (t > 3600))) /* arbitrary upper limit */ return -EINVAL; heartbeat = t; @@ -165,7 +162,6 @@ static int sh_wdt_set_heartbeat(int t) /** * sh_wdt_ping - Ping the Watchdog - * * @data: Unused * * Clears overflow bit, resets timer counter. @@ -182,14 +178,13 @@ static void sh_wdt_ping(unsigned long data) sh_wdt_write_cnt(0); mod_timer(&timer, next_ping_period(clock_division_ratio)); - } else { - printk(KERN_WARNING PFX "Heartbeat lost! Will not ping the watchdog\n"); - } + } else + printk(KERN_WARNING PFX "Heartbeat lost! Will not ping " + "the watchdog\n"); } /** * sh_wdt_open - Open the Device - * * @inode: inode of device * @file: file handle of device * @@ -209,7 +204,6 @@ static int sh_wdt_open(struct inode *inode, struct file *file) /** * sh_wdt_close - Close the Device - * * @inode: inode of device * @file: file handle of device * @@ -220,7 +214,8 @@ static int sh_wdt_close(struct inode *inode, struct file *file) if (shwdt_expect_close == 42) { sh_wdt_stop(); } else { - printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n"); + printk(KERN_CRIT PFX "Unexpected close, not " + "stopping watchdog!\n"); sh_wdt_keepalive(); } @@ -232,7 +227,6 @@ static int sh_wdt_close(struct inode *inode, struct file *file) /** * sh_wdt_write - Write to Device - * * @file: file handle of device * @buf: buffer to write * @count: length of buffer @@ -265,7 +259,6 @@ static ssize_t sh_wdt_write(struct file *file, const char *buf, /** * sh_wdt_ioctl - Query Device - * * @inode: inode of device * @file: file handle of device * @cmd: watchdog command @@ -326,7 +319,6 @@ static int sh_wdt_ioctl(struct inode *inode, struct file *file, /** * sh_wdt_notify_sys - Notifier Handler - * * @this: notifier block * @code: notifier event * @unused: unused @@ -337,9 +329,8 @@ static int sh_wdt_ioctl(struct inode *inode, struct file *file, static int sh_wdt_notify_sys(struct notifier_block *this, unsigned long code, void *unused) { - if (code == SYS_DOWN || code == SYS_HALT) { + if (code == SYS_DOWN || code == SYS_HALT) sh_wdt_stop(); - } return NOTIFY_DONE; } @@ -354,7 +345,8 @@ static const struct file_operations sh_wdt_fops = { }; static struct watchdog_info sh_wdt_info = { - .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE, + .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | + WDIOF_MAGICCLOSE, .firmware_version = 1, .identity = "SH WDT", }; @@ -371,7 +363,6 @@ static struct miscdevice sh_wdt_miscdev = { /** * sh_wdt_init - Initialize module - * * Registers the device and notifier handler. Actual device * initialization is handled by sh_wdt_open(). */ @@ -381,15 +372,15 @@ static int __init sh_wdt_init(void) if ((clock_division_ratio < 0x5) || (clock_division_ratio > 0x7)) { clock_division_ratio = WTCSR_CKS_4096; - printk(KERN_INFO PFX "clock_division_ratio value must be 0x5<=x<=0x7, using %d\n", - clock_division_ratio); + printk(KERN_INFO PFX "clock_division_ratio value must " + "be 0x5<=x<=0x7, using %d\n", clock_division_ratio); } - if (sh_wdt_set_heartbeat(heartbeat)) - { + rc = sh_wdt_set_heartbeat(heartbeat); + if (unlikely(rc)) { heartbeat = WATCHDOG_HEARTBEAT; - printk(KERN_INFO PFX "heartbeat value must be 1<=x<=3600, using %d\n", - heartbeat); + printk(KERN_INFO PFX "heartbeat value must " + "be 1<=x<=3600, using %d\n", heartbeat); } init_timer(&timer); @@ -397,15 +388,16 @@ static int __init sh_wdt_init(void) timer.data = 0; rc = register_reboot_notifier(&sh_wdt_notifier); - if (rc) { - printk(KERN_ERR PFX "Can't register reboot notifier (err=%d)\n", rc); + if (unlikely(rc)) { + printk(KERN_ERR PFX "Can't register reboot notifier (err=%d)\n", + rc); return rc; } rc = misc_register(&sh_wdt_miscdev); - if (rc) { - printk(KERN_ERR PFX "Can't register miscdev on minor=%d (err=%d)\n", - sh_wdt_miscdev.minor, rc); + if (unlikely(rc)) { + printk(KERN_ERR PFX "Can't register miscdev on " + "minor=%d (err=%d)\n", sh_wdt_miscdev.minor, rc); unregister_reboot_notifier(&sh_wdt_notifier); return rc; } @@ -418,7 +410,6 @@ static int __init sh_wdt_init(void) /** * sh_wdt_exit - Deinitialize module - * * Unregisters the device and notifier handler. Actual device * deinitialization is handled by sh_wdt_close(). */ @@ -434,14 +425,13 @@ MODULE_LICENSE("GPL"); MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); module_param(clock_division_ratio, int, 0); -MODULE_PARM_DESC(clock_division_ratio, "Clock division ratio. Valid ranges are from 0x5 (1.31ms) to 0x7 (5.25ms). Defaults to 0x7."); +MODULE_PARM_DESC(clock_division_ratio, "Clock division ratio. Valid ranges are from 0x5 (1.31ms) to 0x7 (5.25ms). (default=" __MODULE_STRING(clock_division_ratio) ")"); module_param(heartbeat, int, 0); MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (1<=heartbeat<=3600, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); module_param(nowayout, int, 0); -MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); +MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); module_init(sh_wdt_init); module_exit(sh_wdt_exit); - diff --git a/include/asm-sh/atomic.h b/include/asm-sh/atomic.h index fb627de217f2..049eb2dda6b6 100644 --- a/include/asm-sh/atomic.h +++ b/include/asm-sh/atomic.h @@ -14,6 +14,7 @@ typedef struct { volatile int counter; } atomic_t; #define atomic_read(v) ((v)->counter) #define atomic_set(v,i) ((v)->counter = (i)) +#include #include /* diff --git a/include/asm-sh/bitops.h b/include/asm-sh/bitops.h index e34f82508568..1c16792cee1d 100644 --- a/include/asm-sh/bitops.h +++ b/include/asm-sh/bitops.h @@ -6,7 +6,7 @@ /* For __swab32 */ #include -static __inline__ void set_bit(int nr, volatile void * addr) +static inline void set_bit(int nr, volatile void * addr) { int mask; volatile unsigned int *a = addr; @@ -24,7 +24,7 @@ static __inline__ void set_bit(int nr, volatile void * addr) */ #define smp_mb__before_clear_bit() barrier() #define smp_mb__after_clear_bit() barrier() -static __inline__ void clear_bit(int nr, volatile void * addr) +static inline void clear_bit(int nr, volatile void * addr) { int mask; volatile unsigned int *a = addr; @@ -37,7 +37,7 @@ static __inline__ void clear_bit(int nr, volatile void * addr) local_irq_restore(flags); } -static __inline__ void change_bit(int nr, volatile void * addr) +static inline void change_bit(int nr, volatile void * addr) { int mask; volatile unsigned int *a = addr; @@ -50,7 +50,7 @@ static __inline__ void change_bit(int nr, volatile void * addr) local_irq_restore(flags); } -static __inline__ int test_and_set_bit(int nr, volatile void * addr) +static inline int test_and_set_bit(int nr, volatile void * addr) { int mask, retval; volatile unsigned int *a = addr; @@ -66,7 +66,7 @@ static __inline__ int test_and_set_bit(int nr, volatile void * addr) return retval; } -static __inline__ int test_and_clear_bit(int nr, volatile void * addr) +static inline int test_and_clear_bit(int nr, volatile void * addr) { int mask, retval; volatile unsigned int *a = addr; @@ -82,7 +82,7 @@ static __inline__ int test_and_clear_bit(int nr, volatile void * addr) return retval; } -static __inline__ int test_and_change_bit(int nr, volatile void * addr) +static inline int test_and_change_bit(int nr, volatile void * addr) { int mask, retval; volatile unsigned int *a = addr; @@ -100,7 +100,7 @@ static __inline__ int test_and_change_bit(int nr, volatile void * addr) #include -static __inline__ unsigned long ffz(unsigned long word) +static inline unsigned long ffz(unsigned long word) { unsigned long result; @@ -120,7 +120,7 @@ static __inline__ unsigned long ffz(unsigned long word) * * Undefined if no bit exists, so code should check against 0 first. */ -static __inline__ unsigned long __ffs(unsigned long word) +static inline unsigned long __ffs(unsigned long word) { unsigned long result; diff --git a/include/asm-sh/checksum.h b/include/asm-sh/checksum.h index fa03b30c4269..08168afe6746 100644 --- a/include/asm-sh/checksum.h +++ b/include/asm-sh/checksum.h @@ -159,6 +159,7 @@ static __inline__ unsigned short ip_compute_csum(unsigned char * buff, int len) } #define _HAVE_ARCH_IPV6_CSUM +#ifdef CONFIG_IPV6 static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, __u32 len, @@ -194,6 +195,7 @@ static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, return csum_fold(sum); } +#endif /* * Copy and checksum to user diff --git a/include/asm-sh/fixmap.h b/include/asm-sh/fixmap.h index 412bccaa07e6..458e9fa59545 100644 --- a/include/asm-sh/fixmap.h +++ b/include/asm-sh/fixmap.h @@ -25,7 +25,7 @@ * addresses. The point is to have a constant address at * compile time, but to set the physical address only * in the boot process. We allocate these special addresses - * from the end of virtual memory (0xfffff000) backwards. + * from the end of P3 backwards. * Also this lets us do fail-safe vmalloc(), we * can guarantee that these special addresses and * vmalloc()-ed addresses never overlap. diff --git a/include/asm-sh/watchdog.h b/include/asm-sh/watchdog.h index 09ca41972a11..d19ea62ef8c6 100644 --- a/include/asm-sh/watchdog.h +++ b/include/asm-sh/watchdog.h @@ -62,7 +62,6 @@ /** * sh_wdt_read_cnt - Read from Counter - * * Reads back the WTCNT value. */ static inline __u8 sh_wdt_read_cnt(void) @@ -72,7 +71,6 @@ static inline __u8 sh_wdt_read_cnt(void) /** * sh_wdt_write_cnt - Write to Counter - * * @val: Value to write * * Writes the given value @val to the lower byte of the timer counter. @@ -95,7 +93,6 @@ static inline __u8 sh_wdt_read_csr(void) /** * sh_wdt_write_csr - Write to Control/Status Register - * * @val: Value to write * * Writes the given value @val to the lower byte of the control/status -- cgit v1.2.3 From b638d0b921dc95229af0dfd09cd24850336a2f75 Mon Sep 17 00:00:00 2001 From: Richard Curnow Date: Wed, 27 Sep 2006 14:09:26 +0900 Subject: sh: Optimized cache handling for SH-4/SH-4A caches. This reworks some of the SH-4 cache handling code to more easily accomodate newer-style caches (particularly for the > direct-mapped case), as well as optimizing some of the old code. Signed-off-by: Richard Curnow Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/init.c | 16 +- arch/sh/kernel/cpu/sh4/probe.c | 11 + arch/sh/mm/cache-sh4.c | 517 ++++++++++++++++++++++++++++++++++------- arch/sh/mm/clear_page.S | 99 +------- include/asm-sh/cache.h | 22 +- 5 files changed, 475 insertions(+), 190 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c index 868e68b28880..731dd61419dd 100644 --- a/arch/sh/kernel/cpu/init.c +++ b/arch/sh/kernel/cpu/init.c @@ -4,6 +4,7 @@ * CPU init code * * Copyright (C) 2002, 2003 Paul Mundt + * Copyright (C) 2003 Richard Curnow * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -51,7 +52,15 @@ static void __init cache_init(void) ccr = ctrl_inl(CCR); /* - * If the cache is already enabled .. flush it. + * At this point we don't know whether the cache is enabled or not - a + * bootloader may have enabled it. There are at least 2 things that + * could be dirty in the cache at this point: + * 1. kernel command line set up by boot loader + * 2. spilled registers from the prolog of this function + * => before re-initialising the cache, we must do a purge of the whole + * cache out to memory for safety. As long as nothing is spilled + * during the loop to lines that have already been done, this is safe. + * - RPC */ if (ccr & CCR_CACHE_ENABLE) { unsigned long ways, waysize, addrstart; @@ -98,6 +107,8 @@ static void __init cache_init(void) /* Force EMODE if possible */ if (cpu_data->dcache.ways > 1) flags |= CCR_CACHE_EMODE; + else + flags &= ~CCR_CACHE_EMODE; #endif #ifdef CONFIG_SH_WRITETHROUGH @@ -112,6 +123,9 @@ static void __init cache_init(void) /* Turn on OCRAM -- halve the OC */ flags |= CCR_CACHE_ORA; cpu_data->dcache.sets >>= 1; + + cpu_data->dcache.way_size = cpu_data->dcache.sets * + cpu_data->dcache.linesz; #endif ctrl_outl(flags, CCR); diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index 42427b79697b..1208da8fe5db 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c @@ -113,6 +113,11 @@ int __init detect_cpu_and_cache_system(void) break; } +#ifdef CONFIG_SH_DIRECT_MAPPED + cpu_data->icache.ways = 1; + cpu_data->dcache.ways = 1; +#endif + /* * On anything that's not a direct-mapped cache, look to the CVR * for I/D-cache specifics. @@ -125,6 +130,9 @@ int __init detect_cpu_and_cache_system(void) (cpu_data->icache.way_incr - (1 << 5)); } + cpu_data->icache.way_size = cpu_data->icache.sets * + cpu_data->icache.linesz; + if (cpu_data->dcache.ways > 1) { size = sizes[(cvr >> 16) & 0xf]; cpu_data->dcache.way_incr = (size >> 1); @@ -133,6 +141,9 @@ int __init detect_cpu_and_cache_system(void) (cpu_data->dcache.way_incr - (1 << 5)); } + cpu_data->dcache.way_size = cpu_data->dcache.sets * + cpu_data->dcache.linesz; + return 0; } diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c index 846b63d6f5e8..c036c2b4ac2b 100644 --- a/arch/sh/mm/cache-sh4.c +++ b/arch/sh/mm/cache-sh4.c @@ -25,28 +25,95 @@ #include #include -extern void __flush_cache_4096(unsigned long addr, unsigned long phys, +static void __flush_dcache_segment_1way(unsigned long start, + unsigned long extent); +static void __flush_dcache_segment_2way(unsigned long start, + unsigned long extent); +static void __flush_dcache_segment_4way(unsigned long start, + unsigned long extent); + +static void __flush_cache_4096(unsigned long addr, unsigned long phys, unsigned long exec_offset); -extern void __flush_cache_4096_all(unsigned long start); -static void __flush_cache_4096_all_ex(unsigned long start); -extern void __flush_dcache_all(void); -static void __flush_dcache_all_ex(void); + +/* + * This is initialised here to ensure that it is not placed in the BSS. If + * that were to happen, note that cache_init gets called before the BSS is + * cleared, so this would get nulled out which would be hopeless. + */ +static void (*__flush_dcache_segment_fn)(unsigned long, unsigned long) = + (void (*)(unsigned long, unsigned long))0xdeadbeef; + +static void compute_alias(struct cache_info *c) +{ + c->alias_mask = ((c->sets - 1) << c->entry_shift) & ~(PAGE_SIZE - 1); + c->n_aliases = (c->alias_mask >> PAGE_SHIFT) + 1; +} + +static void __init emit_cache_params(void) +{ + printk("PVR=%08x CVR=%08x PRR=%08x\n", + ctrl_inl(CCN_PVR), + ctrl_inl(CCN_CVR), + ctrl_inl(CCN_PRR)); + printk("I-cache : n_ways=%d n_sets=%d way_incr=%d\n", + cpu_data->icache.ways, + cpu_data->icache.sets, + cpu_data->icache.way_incr); + printk("I-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", + cpu_data->icache.entry_mask, + cpu_data->icache.alias_mask, + cpu_data->icache.n_aliases); + printk("D-cache : n_ways=%d n_sets=%d way_incr=%d\n", + cpu_data->dcache.ways, + cpu_data->dcache.sets, + cpu_data->dcache.way_incr); + printk("D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", + cpu_data->dcache.entry_mask, + cpu_data->dcache.alias_mask, + cpu_data->dcache.n_aliases); + + if (!__flush_dcache_segment_fn) + panic("unknown number of cache ways\n"); +} /* * SH-4 has virtually indexed and physically tagged cache. */ -struct semaphore p3map_sem[4]; +/* Worst case assumed to be 64k cache, direct-mapped i.e. 4 synonym bits. */ +#define MAX_P3_SEMAPHORES 16 + +struct semaphore p3map_sem[MAX_P3_SEMAPHORES]; void __init p3_cache_init(void) { - if (remap_area_pages(P3SEG, 0, PAGE_SIZE*4, _PAGE_CACHABLE)) + int i; + + compute_alias(&cpu_data->icache); + compute_alias(&cpu_data->dcache); + + switch (cpu_data->dcache.ways) { + case 1: + __flush_dcache_segment_fn = __flush_dcache_segment_1way; + break; + case 2: + __flush_dcache_segment_fn = __flush_dcache_segment_2way; + break; + case 4: + __flush_dcache_segment_fn = __flush_dcache_segment_4way; + break; + default: + __flush_dcache_segment_fn = NULL; + break; + } + + emit_cache_params(); + + if (remap_area_pages(P3SEG, 0, PAGE_SIZE * 4, _PAGE_CACHABLE)) panic("%s failed.", __FUNCTION__); - sema_init (&p3map_sem[0], 1); - sema_init (&p3map_sem[1], 1); - sema_init (&p3map_sem[2], 1); - sema_init (&p3map_sem[3], 1); + for (i = 0; i < cpu_data->dcache.n_aliases; i++) + sema_init(&p3map_sem[i], 1); } /* @@ -91,7 +158,6 @@ void __flush_purge_region(void *start, int size) } } - /* * No write back please */ @@ -110,46 +176,6 @@ void __flush_invalidate_region(void *start, int size) } } -static void __flush_dcache_all_ex(void) -{ - unsigned long addr, end_addr, entry_offset; - - end_addr = CACHE_OC_ADDRESS_ARRAY + - (cpu_data->dcache.sets << cpu_data->dcache.entry_shift) * - cpu_data->dcache.ways; - - entry_offset = 1 << cpu_data->dcache.entry_shift; - for (addr = CACHE_OC_ADDRESS_ARRAY; - addr < end_addr; - addr += entry_offset) { - ctrl_outl(0, addr); - } -} - -static void __flush_cache_4096_all_ex(unsigned long start) -{ - unsigned long addr, entry_offset; - int i; - - entry_offset = 1 << cpu_data->dcache.entry_shift; - for (i = 0; i < cpu_data->dcache.ways; - i++, start += cpu_data->dcache.way_incr) { - for (addr = CACHE_OC_ADDRESS_ARRAY + start; - addr < CACHE_OC_ADDRESS_ARRAY + 4096 + start; - addr += entry_offset) { - ctrl_outl(0, addr); - } - } -} - -void flush_cache_4096_all(unsigned long start) -{ - if (cpu_data->dcache.ways == 1) - __flush_cache_4096_all(start); - else - __flush_cache_4096_all_ex(start); -} - /* * Write back the range of D-cache, and purge the I-cache. * @@ -180,9 +206,11 @@ void flush_cache_sigtramp(unsigned long addr) local_irq_save(flags); jump_to_P2(); + for (i = 0; i < cpu_data->icache.ways; i++, index += cpu_data->icache.way_incr) ctrl_outl(0, index); /* Clear out Valid-bit */ + back_to_P1(); wmb(); local_irq_restore(flags); @@ -194,8 +222,8 @@ static inline void flush_cache_4096(unsigned long start, unsigned long flags; /* - * SH7751, SH7751R, and ST40 have no restriction to handle cache. - * (While SH7750 must do that at P2 area.) + * All types of SH-4 require PC to be in P2 to operate on the I-cache. + * Some types of SH-4 require PC to be in P2 to operate on the D-cache. */ if ((cpu_data->flags & CPU_HAS_P2_FLUSH_BUG) || start < CACHE_OC_ADDRESS_ARRAY) { @@ -217,12 +245,13 @@ void flush_dcache_page(struct page *page) { if (test_bit(PG_mapped, &page->flags)) { unsigned long phys = PHYSADDR(page_address(page)); + unsigned long addr = CACHE_OC_ADDRESS_ARRAY; + int i, n; /* Loop all the D-cache */ - flush_cache_4096(CACHE_OC_ADDRESS_ARRAY, phys); - flush_cache_4096(CACHE_OC_ADDRESS_ARRAY | 0x1000, phys); - flush_cache_4096(CACHE_OC_ADDRESS_ARRAY | 0x2000, phys); - flush_cache_4096(CACHE_OC_ADDRESS_ARRAY | 0x3000, phys); + n = cpu_data->dcache.n_aliases; + for (i = 0; i < n; i++, addr += PAGE_SIZE) + flush_cache_4096(addr, phys); } wmb(); @@ -246,10 +275,7 @@ static inline void flush_icache_all(void) void flush_dcache_all(void) { - if (cpu_data->dcache.ways == 1) - __flush_dcache_all(); - else - __flush_dcache_all_ex(); + (*__flush_dcache_segment_fn)(0UL, cpu_data->dcache.way_size); wmb(); } @@ -261,6 +287,16 @@ void flush_cache_all(void) void flush_cache_mm(struct mm_struct *mm) { + /* + * Note : (RPC) since the caches are physically tagged, the only point + * of flush_cache_mm for SH-4 is to get rid of aliases from the + * D-cache. The assumption elsewhere, e.g. flush_cache_range, is that + * lines can stay resident so long as the virtual address they were + * accessed with (hence cache set) is in accord with the physical + * address (i.e. tag). It's no different here. So I reckon we don't + * need to flush the I-cache, since aliases don't matter for that. We + * should try that. + */ flush_cache_all(); } @@ -273,24 +309,36 @@ void flush_cache_mm(struct mm_struct *mm) void flush_cache_page(struct vm_area_struct *vma, unsigned long address, unsigned long pfn) { unsigned long phys = pfn << PAGE_SHIFT; + unsigned int alias_mask; + + alias_mask = cpu_data->dcache.alias_mask; /* We only need to flush D-cache when we have alias */ - if ((address^phys) & CACHE_ALIAS) { + if ((address^phys) & alias_mask) { /* Loop 4K of the D-cache */ flush_cache_4096( - CACHE_OC_ADDRESS_ARRAY | (address & CACHE_ALIAS), + CACHE_OC_ADDRESS_ARRAY | (address & alias_mask), phys); /* Loop another 4K of the D-cache */ flush_cache_4096( - CACHE_OC_ADDRESS_ARRAY | (phys & CACHE_ALIAS), + CACHE_OC_ADDRESS_ARRAY | (phys & alias_mask), phys); } - if (vma->vm_flags & VM_EXEC) - /* Loop 4K (half) of the I-cache */ + alias_mask = cpu_data->icache.alias_mask; + if (vma->vm_flags & VM_EXEC) { + /* + * Evict entries from the portion of the cache from which code + * may have been executed at this address (virtual). There's + * no need to evict from the portion corresponding to the + * physical address as for the D-cache, because we know the + * kernel has never executed the code through its identity + * translation. + */ flush_cache_4096( - CACHE_IC_ADDRESS_ARRAY | (address & 0x1000), + CACHE_IC_ADDRESS_ARRAY | (address & alias_mask), phys); + } } /* @@ -305,14 +353,28 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long address, unsigne void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) { - unsigned long p = start & PAGE_MASK; + unsigned long d = 0, p = start & PAGE_MASK; + unsigned long alias_mask = cpu_data->dcache.alias_mask; + unsigned long n_aliases = cpu_data->dcache.n_aliases; + unsigned long select_bit; + unsigned long all_aliases_mask; + unsigned long addr_offset; + unsigned long phys; pgd_t *dir; pmd_t *pmd; pud_t *pud; pte_t *pte; pte_t entry; - unsigned long phys; - unsigned long d = 0; + int i; + + /* + * If cache is only 4k-per-way, there are never any 'aliases'. Since + * the cache is physically tagged, the data can just be left in there. + */ + if (n_aliases == 0) + return; + + all_aliases_mask = (1 << n_aliases) - 1; /* * Don't bother with the lookup and alias check if we have a @@ -335,39 +397,52 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, do { if (pmd_none(*pmd) || pmd_bad(*pmd)) { - p &= ~((1 << PMD_SHIFT) -1); + p &= ~((1 << PMD_SHIFT) - 1); p += (1 << PMD_SHIFT); pmd++; + continue; } + pte = pte_offset_kernel(pmd, p); + do { entry = *pte; + if ((pte_val(entry) & _PAGE_PRESENT)) { - phys = pte_val(entry)&PTE_PHYS_MASK; - if ((p^phys) & CACHE_ALIAS) { - d |= 1 << ((p & CACHE_ALIAS)>>12); - d |= 1 << ((phys & CACHE_ALIAS)>>12); - if (d == 0x0f) + phys = pte_val(entry) & PTE_PHYS_MASK; + + if ((p ^ phys) & alias_mask) { + d |= 1 << ((p & alias_mask) >> PAGE_SHIFT); + d |= 1 << ((phys & alias_mask) >> PAGE_SHIFT); + + if (d == all_aliases_mask) goto loop_exit; } } + pte++; p += PAGE_SIZE; } while (p < end && ((unsigned long)pte & ~PAGE_MASK)); pmd++; } while (p < end); - loop_exit: - if (d & 1) - flush_cache_4096_all(0); - if (d & 2) - flush_cache_4096_all(0x1000); - if (d & 4) - flush_cache_4096_all(0x2000); - if (d & 8) - flush_cache_4096_all(0x3000); - if (vma->vm_flags & VM_EXEC) + +loop_exit: + for (i = 0, select_bit = 0x1, addr_offset = 0x0; i < n_aliases; + i++, select_bit <<= 1, addr_offset += PAGE_SIZE) + if (d & select_bit) { + (*__flush_dcache_segment_fn)(addr_offset, PAGE_SIZE); + wmb(); + } + + if (vma->vm_flags & VM_EXEC) { + /* + * TODO: Is this required??? Need to look at how I-cache + * coherency is assured when new programs are loaded to see if + * this matters. + */ flush_icache_all(); + } } /* @@ -384,3 +459,271 @@ void flush_icache_user_range(struct vm_area_struct *vma, mb(); } +/** + * __flush_cache_4096 + * + * @addr: address in memory mapped cache array + * @phys: P1 address to flush (has to match tags if addr has 'A' bit + * set i.e. associative write) + * @exec_offset: set to 0x20000000 if flush has to be executed from P2 + * region else 0x0 + * + * The offset into the cache array implied by 'addr' selects the + * 'colour' of the virtual address range that will be flushed. The + * operation (purge/write-back) is selected by the lower 2 bits of + * 'phys'. + */ +static void __flush_cache_4096(unsigned long addr, unsigned long phys, + unsigned long exec_offset) +{ + int way_count; + unsigned long base_addr = addr; + struct cache_info *dcache; + unsigned long way_incr; + unsigned long a, ea, p; + unsigned long temp_pc; + + dcache = &cpu_data->dcache; + /* Write this way for better assembly. */ + way_count = dcache->ways; + way_incr = dcache->way_incr; + + /* + * Apply exec_offset (i.e. branch to P2 if required.). + * + * FIXME: + * + * If I write "=r" for the (temp_pc), it puts this in r6 hence + * trashing exec_offset before it's been added on - why? Hence + * "=&r" as a 'workaround' + */ + asm volatile("mov.l 1f, %0\n\t" + "add %1, %0\n\t" + "jmp @%0\n\t" + "nop\n\t" + ".balign 4\n\t" + "1: .long 2f\n\t" + "2:\n" : "=&r" (temp_pc) : "r" (exec_offset)); + + /* + * We know there will be >=1 iteration, so write as do-while to avoid + * pointless nead-of-loop check for 0 iterations. + */ + do { + ea = base_addr + PAGE_SIZE; + a = base_addr; + p = phys; + + do { + *(volatile unsigned long *)a = p; + /* + * Next line: intentionally not p+32, saves an add, p + * will do since only the cache tag bits need to + * match. + */ + *(volatile unsigned long *)(a+32) = p; + a += 64; + p += 64; + } while (a < ea); + + base_addr += way_incr; + } while (--way_count != 0); +} + +/* + * Break the 1, 2 and 4 way variants of this out into separate functions to + * avoid nearly all the overhead of having the conditional stuff in the function + * bodies (+ the 1 and 2 way cases avoid saving any registers too). + */ +static void __flush_dcache_segment_1way(unsigned long start, + unsigned long extent_per_way) +{ + unsigned long orig_sr, sr_with_bl; + unsigned long base_addr; + unsigned long way_incr, linesz, way_size; + struct cache_info *dcache; + register unsigned long a0, a0e; + + asm volatile("stc sr, %0" : "=r" (orig_sr)); + sr_with_bl = orig_sr | (1<<28); + base_addr = ((unsigned long)&empty_zero_page[0]); + + /* + * The previous code aligned base_addr to 16k, i.e. the way_size of all + * existing SH-4 D-caches. Whilst I don't see a need to have this + * aligned to any better than the cache line size (which it will be + * anyway by construction), let's align it to at least the way_size of + * any existing or conceivable SH-4 D-cache. -- RPC + */ + base_addr = ((base_addr >> 16) << 16); + base_addr |= start; + + dcache = &cpu_data->dcache; + linesz = dcache->linesz; + way_incr = dcache->way_incr; + way_size = dcache->way_size; + + a0 = base_addr; + a0e = base_addr + extent_per_way; + do { + asm volatile("ldc %0, sr" : : "r" (sr_with_bl)); + asm volatile("movca.l r0, @%0\n\t" + "ocbi @%0" : : "r" (a0)); + a0 += linesz; + asm volatile("movca.l r0, @%0\n\t" + "ocbi @%0" : : "r" (a0)); + a0 += linesz; + asm volatile("movca.l r0, @%0\n\t" + "ocbi @%0" : : "r" (a0)); + a0 += linesz; + asm volatile("movca.l r0, @%0\n\t" + "ocbi @%0" : : "r" (a0)); + asm volatile("ldc %0, sr" : : "r" (orig_sr)); + a0 += linesz; + } while (a0 < a0e); +} + +static void __flush_dcache_segment_2way(unsigned long start, + unsigned long extent_per_way) +{ + unsigned long orig_sr, sr_with_bl; + unsigned long base_addr; + unsigned long way_incr, linesz, way_size; + struct cache_info *dcache; + register unsigned long a0, a1, a0e; + + asm volatile("stc sr, %0" : "=r" (orig_sr)); + sr_with_bl = orig_sr | (1<<28); + base_addr = ((unsigned long)&empty_zero_page[0]); + + /* See comment under 1-way above */ + base_addr = ((base_addr >> 16) << 16); + base_addr |= start; + + dcache = &cpu_data->dcache; + linesz = dcache->linesz; + way_incr = dcache->way_incr; + way_size = dcache->way_size; + + a0 = base_addr; + a1 = a0 + way_incr; + a0e = base_addr + extent_per_way; + do { + asm volatile("ldc %0, sr" : : "r" (sr_with_bl)); + asm volatile("movca.l r0, @%0\n\t" + "movca.l r0, @%1\n\t" + "ocbi @%0\n\t" + "ocbi @%1" : : + "r" (a0), "r" (a1)); + a0 += linesz; + a1 += linesz; + asm volatile("movca.l r0, @%0\n\t" + "movca.l r0, @%1\n\t" + "ocbi @%0\n\t" + "ocbi @%1" : : + "r" (a0), "r" (a1)); + a0 += linesz; + a1 += linesz; + asm volatile("movca.l r0, @%0\n\t" + "movca.l r0, @%1\n\t" + "ocbi @%0\n\t" + "ocbi @%1" : : + "r" (a0), "r" (a1)); + a0 += linesz; + a1 += linesz; + asm volatile("movca.l r0, @%0\n\t" + "movca.l r0, @%1\n\t" + "ocbi @%0\n\t" + "ocbi @%1" : : + "r" (a0), "r" (a1)); + asm volatile("ldc %0, sr" : : "r" (orig_sr)); + a0 += linesz; + a1 += linesz; + } while (a0 < a0e); +} + +static void __flush_dcache_segment_4way(unsigned long start, + unsigned long extent_per_way) +{ + unsigned long orig_sr, sr_with_bl; + unsigned long base_addr; + unsigned long way_incr, linesz, way_size; + struct cache_info *dcache; + register unsigned long a0, a1, a2, a3, a0e; + + asm volatile("stc sr, %0" : "=r" (orig_sr)); + sr_with_bl = orig_sr | (1<<28); + base_addr = ((unsigned long)&empty_zero_page[0]); + + /* See comment under 1-way above */ + base_addr = ((base_addr >> 16) << 16); + base_addr |= start; + + dcache = &cpu_data->dcache; + linesz = dcache->linesz; + way_incr = dcache->way_incr; + way_size = dcache->way_size; + + a0 = base_addr; + a1 = a0 + way_incr; + a2 = a1 + way_incr; + a3 = a2 + way_incr; + a0e = base_addr + extent_per_way; + do { + asm volatile("ldc %0, sr" : : "r" (sr_with_bl)); + asm volatile("movca.l r0, @%0\n\t" + "movca.l r0, @%1\n\t" + "movca.l r0, @%2\n\t" + "movca.l r0, @%3\n\t" + "ocbi @%0\n\t" + "ocbi @%1\n\t" + "ocbi @%2\n\t" + "ocbi @%3\n\t" : : + "r" (a0), "r" (a1), "r" (a2), "r" (a3)); + a0 += linesz; + a1 += linesz; + a2 += linesz; + a3 += linesz; + asm volatile("movca.l r0, @%0\n\t" + "movca.l r0, @%1\n\t" + "movca.l r0, @%2\n\t" + "movca.l r0, @%3\n\t" + "ocbi @%0\n\t" + "ocbi @%1\n\t" + "ocbi @%2\n\t" + "ocbi @%3\n\t" : : + "r" (a0), "r" (a1), "r" (a2), "r" (a3)); + a0 += linesz; + a1 += linesz; + a2 += linesz; + a3 += linesz; + asm volatile("movca.l r0, @%0\n\t" + "movca.l r0, @%1\n\t" + "movca.l r0, @%2\n\t" + "movca.l r0, @%3\n\t" + "ocbi @%0\n\t" + "ocbi @%1\n\t" + "ocbi @%2\n\t" + "ocbi @%3\n\t" : : + "r" (a0), "r" (a1), "r" (a2), "r" (a3)); + a0 += linesz; + a1 += linesz; + a2 += linesz; + a3 += linesz; + asm volatile("movca.l r0, @%0\n\t" + "movca.l r0, @%1\n\t" + "movca.l r0, @%2\n\t" + "movca.l r0, @%3\n\t" + "ocbi @%0\n\t" + "ocbi @%1\n\t" + "ocbi @%2\n\t" + "ocbi @%3\n\t" : : + "r" (a0), "r" (a1), "r" (a2), "r" (a3)); + asm volatile("ldc %0, sr" : : "r" (orig_sr)); + a0 += linesz; + a1 += linesz; + a2 += linesz; + a3 += linesz; + } while (a0 < a0e); +} + diff --git a/arch/sh/mm/clear_page.S b/arch/sh/mm/clear_page.S index 08acead7b2a1..7b96425ae270 100644 --- a/arch/sh/mm/clear_page.S +++ b/arch/sh/mm/clear_page.S @@ -193,102 +193,5 @@ ENTRY(__clear_user_page) nop .L4096: .word 4096 -ENTRY(__flush_cache_4096) - mov.l 1f,r3 - add r6,r3 - mov r4,r0 - mov #64,r2 - shll r2 - mov #64,r6 - jmp @r3 - mov #96,r7 - .align 2 -1: .long 2f -2: - .rept 32 - mov.l r5,@r0 - mov.l r5,@(32,r0) - mov.l r5,@(r0,r6) - mov.l r5,@(r0,r7) - add r2,r5 - add r2,r0 - .endr - nop - nop - nop - nop - nop - nop - nop - rts - nop - -ENTRY(__flush_dcache_all) - mov.l 2f,r0 - mov.l 3f,r4 - and r0,r4 ! r4 = (unsigned long)&empty_zero_page[0] & ~0xffffc000 - stc sr,r1 ! save SR - mov.l 4f,r2 - or r1,r2 - mov #32,r3 - shll2 r3 -1: - ldc r2,sr ! set BL bit - movca.l r0,@r4 - ocbi @r4 - add #32,r4 - movca.l r0,@r4 - ocbi @r4 - add #32,r4 - movca.l r0,@r4 - ocbi @r4 - add #32,r4 - movca.l r0,@r4 - ocbi @r4 - ldc r1,sr ! restore SR - dt r3 - bf/s 1b - add #32,r4 - - rts - nop - .align 2 -2: .long 0xffffc000 -3: .long empty_zero_page -4: .long 0x10000000 ! BL bit - -/* __flush_cache_4096_all(unsigned long addr) */ -ENTRY(__flush_cache_4096_all) - mov.l 2f,r0 - mov.l 3f,r2 - and r0,r2 - or r2,r4 ! r4 = addr | (unsigned long)&empty_zero_page[0] & ~0x3fff - stc sr,r1 ! save SR - mov.l 4f,r2 - or r1,r2 - mov #32,r3 -1: - ldc r2,sr ! set BL bit - movca.l r0,@r4 - ocbi @r4 - add #32,r4 - movca.l r0,@r4 - ocbi @r4 - add #32,r4 - movca.l r0,@r4 - ocbi @r4 - add #32,r4 - movca.l r0,@r4 - ocbi @r4 - ldc r1,sr ! restore SR - dt r3 - bf/s 1b - add #32,r4 - - rts - nop - .align 2 -2: .long 0xffffc000 -3: .long empty_zero_page -4: .long 0x10000000 ! BL bit #endif + diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h index 656fdfe9e8b4..33f13367054b 100644 --- a/include/asm-sh/cache.h +++ b/include/asm-sh/cache.h @@ -23,15 +23,29 @@ #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) struct cache_info { - unsigned int ways; - unsigned int sets; - unsigned int linesz; + unsigned int ways; /* Number of cache ways */ + unsigned int sets; /* Number of cache sets */ + unsigned int linesz; /* Cache line size (bytes) */ - unsigned int way_incr; + unsigned int way_size; /* sets * line size */ + /* + * way_incr is the address offset for accessing the next way + * in memory mapped cache array ops. + */ + unsigned int way_incr; unsigned int entry_shift; unsigned int entry_mask; + /* + * Compute a mask which selects the address bits which overlap between + * 1. those used to select the cache set during indexing + * 2. those in the physical page number. + */ + unsigned int alias_mask; + + unsigned int n_aliases; /* Number of aliases */ + unsigned long flags; }; -- cgit v1.2.3 From 73388cc7c648861742e584a97fbffed16afc7dc3 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 14:11:33 +0900 Subject: sh: Refactor PRR masking to catch newer SH7760 cuts. Newer SH7760 cuts have a range of acceptable PRR values.. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4/probe.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index 1208da8fe5db..89986e70d041 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c @@ -99,9 +99,15 @@ int __init detect_cpu_and_cache_system(void) break; case 0x500 ... 0x501: switch (prr) { - case 0x10: cpu_data->type = CPU_SH7750R; break; - case 0x11: cpu_data->type = CPU_SH7751R; break; - case 0x50: cpu_data->type = CPU_SH7760; break; + case 0x10: + cpu_data->type = CPU_SH7750R; + break; + case 0x11: + cpu_data->type = CPU_SH7751R; + break; + case 0x50 ... 0x5f: + cpu_data->type = CPU_SH7760; + break; } cpu_data->icache.ways = 2; -- cgit v1.2.3 From a80fd21e52cc09ff1e4d36de5781173a5b87b2dc Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 14:26:53 +0900 Subject: sh: earlyprintk= support and cleanups. Allow multiple early printk consoles via earlyprintk=. With this change earlyprintk is no longer enabled by default, it must be specified on the kernel command line. Optionally with ,keep to prevent unreg by tty_io. Signed-off-by: Paul Mundt --- arch/sh/kernel/early_printk.c | 106 +++++++++++++++++++++++++++++++----------- arch/sh/kernel/setup.c | 22 +++++++-- include/asm-sh/setup.h | 2 + 3 files changed, 100 insertions(+), 30 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c index 1378db375e17..a00022722e9e 100644 --- a/arch/sh/kernel/early_printk.c +++ b/arch/sh/kernel/early_printk.c @@ -3,7 +3,7 @@ * * Copyright (C) 1999, 2000 Niibe Yutaka * Copyright (C) 2002 M. R. Brown - * Copyright (C) 2004 Paul Mundt + * Copyright (C) 2004 - 2006 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -49,7 +49,7 @@ static int __init sh_console_setup(struct console *co, char *options) return 0; } -static struct console early_console = { +static struct console bios_console = { .name = "bios", .write = sh_console_write, .setup = sh_console_setup, @@ -59,34 +59,43 @@ static struct console early_console = { #endif #ifdef CONFIG_EARLY_SCIF_CONSOLE +#include +#include "../../../drivers/serial/sh-sci.h" + +#ifdef CONFIG_CPU_SH4 #define SCIF_REG 0xffe80000 +#elif defined(CONFIG_CPU_SUBTYPE_SH72060) +#define SCIF_REG 0xfffe9800 +#else +#error "Undefined SCIF for this subtype" +#endif + +static struct uart_port scif_port = { + .mapbase = SCIF_REG, + .membase = (char __iomem *)SCIF_REG, +}; static void scif_sercon_putc(int c) { - while (!(ctrl_inw(SCIF_REG + 0x10) & 0x20)) ; + while (((sci_in(&scif_port, SCFDR) & 0x1f00 >> 8) == 16)) + ; - ctrl_outb(c, SCIF_REG + 12); - ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0x9f), SCIF_REG + 0x10); + sci_out(&scif_port, SCxTDR, c); + sci_in(&scif_port, SCxSR); + sci_out(&scif_port, SCxSR, 0xf3 & ~(0x20 | 0x40)); + + while ((sci_in(&scif_port, SCxSR) & 0x40) == 0); + ; if (c == '\n') scif_sercon_putc('\r'); } -static void scif_sercon_flush(void) -{ - ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0xbf), SCIF_REG + 0x10); - - while (!(ctrl_inw(SCIF_REG + 0x10) & 0x40)) ; - - ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0xbf), SCIF_REG + 0x10); -} - -static void scif_sercon_write(struct console *con, const char *s, unsigned count) +static void scif_sercon_write(struct console *con, const char *s, + unsigned count) { while (count-- > 0) scif_sercon_putc(*s++); - - scif_sercon_flush(); } static int __init scif_sercon_setup(struct console *con, char *options) @@ -96,7 +105,7 @@ static int __init scif_sercon_setup(struct console *con, char *options) return 0; } -static struct console early_console = { +static struct console scif_console = { .name = "sercon", .write = scif_sercon_write, .setup = scif_sercon_setup, @@ -104,7 +113,7 @@ static struct console early_console = { .index = -1, }; -void scif_sercon_init(int baud) +static void scif_sercon_init(int baud) { ctrl_outw(0, SCIF_REG + 8); ctrl_outw(0, SCIF_REG); @@ -122,16 +131,61 @@ void scif_sercon_init(int baud) } #endif -void __init enable_early_printk(void) +/* + * Setup a default console, if more than one is compiled in, rely on the + * earlyprintk= parsing to give priority. + */ +static struct console *early_console = +#ifdef CONFIG_SH_STANDARD_BIOS + &bios_console +#elif defined(CONFIG_EARLY_SCIF_CONSOLE) + &scif_console +#else + NULL +#endif + ; + +static int __initdata keep_early; + +int __init setup_early_printk(char *opt) { -#ifdef CONFIG_EARLY_SCIF_CONSOLE - scif_sercon_init(115200); + char *space; + char buf[256]; + + strlcpy(buf, opt, sizeof(buf)); + space = strchr(buf, ' '); + if (space) + *space = 0; + + if (strstr(buf, "keep")) + keep_early = 1; + +#ifdef CONFIG_SH_STANDARD_BIOS + if (!strncmp(buf, "bios", 4)) + early_console = &bios_console; +#endif +#if defined(CONFIG_EARLY_SCIF_CONSOLE) + if (!strncmp(buf, "serial", 6)) { + early_console = &scif_console; + +#ifdef CONFIG_CPU_SH4 + scif_sercon_init(115200); +#endif + } #endif - register_console(&early_console); + + if (likely(early_console)) + register_console(early_console); + + return 1; } +__setup("earlyprintk=", setup_early_printk); -void disable_early_printk(void) +void __init disable_early_printk(void) { - unregister_console(&early_console); + if (!keep_early) { + printk("disabling early console\n"); + unregister_console(early_console); + } else + printk("keeping early console\n"); } - diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index e75189cb1db7..cff8d36f91b0 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -145,6 +145,24 @@ static inline void parse_cmdline (char ** cmdline_p, char mv_name[MV_NAME_SIZE], memory_end = memory_start + mem_size; } } + +#ifdef CONFIG_EARLY_PRINTK + if (c == ' ' && !memcmp(from, "earlyprintk=", 12)) { + char *ep_end; + + if (to != command_line) + to--; + + from += 12; + ep_end = strchr(from, ' '); + + setup_early_printk(from); + printk("early console enabled\n"); + + from = ep_end; + } +#endif + if (c == ' ' && !memcmp(from, "sh_mv=", 6)) { char* mv_end; char* mv_comma; @@ -245,11 +263,7 @@ void __init setup_arch(char **cmdline_p) unsigned long bootmap_size; unsigned long start_pfn, max_pfn, max_low_pfn; -#ifdef CONFIG_EARLY_PRINTK - extern void enable_early_printk(void); - enable_early_printk(); -#endif #ifdef CONFIG_CMDLINE_BOOL strcpy(COMMAND_LINE, CONFIG_CMDLINE); #endif diff --git a/include/asm-sh/setup.h b/include/asm-sh/setup.h index d19de7c8df4e..34ca8a7f06ba 100644 --- a/include/asm-sh/setup.h +++ b/include/asm-sh/setup.h @@ -4,5 +4,7 @@ #define COMMAND_LINE_SIZE 256 +int setup_early_printk(char *); + #endif /* _SH_SETUP_H */ #endif /* __KERNEL__ */ -- cgit v1.2.3 From 5b19c9081fbd0882c936ec087bf9055a20251dec Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 14:31:40 +0900 Subject: sh: Support for SH7770/SH7780 CPU subtypes. Merge support for SH7770 and SH7780 SH-4A subtypes. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4/ex.S | 164 +++++++++++++++++++++++++++++++++++++++++ arch/sh/kernel/cpu/sh4/probe.c | 15 ++++ arch/sh/kernel/cpu/sh4/sq.c | 2 + arch/sh/mm/tlb-sh4.c | 4 + include/asm-sh/bugs.h | 4 + include/asm-sh/cpu-sh4/cache.h | 2 + 6 files changed, 191 insertions(+) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4/ex.S b/arch/sh/kernel/cpu/sh4/ex.S index 26a27df06505..af5ecbddea55 100644 --- a/arch/sh/kernel/cpu/sh4/ex.S +++ b/arch/sh/kernel/cpu/sh4/ex.S @@ -72,6 +72,7 @@ ENTRY(interrupt_table) .long do_IRQ ! 1110 .long exception_error ! Internal hardware +#ifndef CONFIG_CPU_SUBTYPE_SH7780 .long do_IRQ ! TMU0 tuni0 /* 400 */ .long do_IRQ ! TMU1 tuni1 .long do_IRQ ! TMU2 tuni2 @@ -379,5 +380,168 @@ ENTRY(interrupt_table) .long exception_error ! 141 0x13a0 .long exception_error ! 142 0x13c0 .long exception_error ! 143 0x13e0 +#elif defined(CONFIG_CPU_SUBTYPE_SH7770) + .long do_IRQ ! 50 0x840 + .long do_IRQ ! 51 0x860 + .long do_IRQ ! 52 0x880 + .long do_IRQ ! 53 0x8a0 + .long do_IRQ ! 54 0x8c0 + .long do_IRQ ! 55 0x8e0 + .long do_IRQ ! 56 0x900 + .long do_IRQ ! 57 0x920 + .long do_IRQ ! 58 0x940 + .long do_IRQ ! 59 0x960 + .long do_IRQ ! 60 0x980 + .long do_IRQ ! 61 0x9a0 + .long do_IRQ ! 62 0x9c0 + .long do_IRQ ! 63 0x9e0 + .long do_IRQ ! 64 0xa00 + .long do_IRQ ! 65 0xa20 + .long do_IRQ ! 66 0xa4d + .long do_IRQ ! 67 0xa60 + .long do_IRQ ! 68 0xa80 + .long do_IRQ ! 69 0xaa0 + .long do_IRQ ! 70 0xac0 + .long do_IRQ ! 71 0xae0 + .long do_IRQ ! 72 0xb00 + .long do_IRQ ! 73 0xb20 + .long do_IRQ ! 74 0xb40 + .long do_IRQ ! 75 0xb60 + .long do_IRQ ! 76 0xb80 + .long do_IRQ ! 77 0xba0 + .long do_IRQ ! 78 0xbc0 + .long do_IRQ ! 79 0xbe0 + .long do_IRQ ! 80 0xc00 + .long do_IRQ ! 81 0xc20 + .long do_IRQ ! 82 0xc40 + .long do_IRQ ! 83 0xc60 + .long do_IRQ ! 84 0xc80 + .long do_IRQ ! 85 0xca0 + .long do_IRQ ! 86 0xcc0 + .long do_IRQ ! 87 0xce0 + .long do_IRQ ! 88 0xd00 + .long do_IRQ ! 89 0xd20 + .long do_IRQ ! 90 0xd40 + .long do_IRQ ! 91 0xd60 + .long do_IRQ ! 92 0xd80 + .long do_IRQ ! 93 0xda0 + .long do_IRQ ! 94 0xdc0 + .long do_IRQ ! 95 0xde0 + .long do_IRQ ! 96 0xe00 + .long do_IRQ ! 97 0xe20 + .long do_IRQ ! 98 0xe40 + .long do_IRQ ! 99 0xe60 + .long do_IRQ ! 100 0xe80 + .long do_IRQ ! 101 0xea0 + .long do_IRQ ! 102 0xec0 + .long do_IRQ ! 103 0xee0 + .long do_IRQ ! 104 0xf00 + .long do_IRQ ! 105 0xf20 + .long do_IRQ ! 106 0xf40 + .long do_IRQ ! 107 0xf60 + .long do_IRQ ! 108 0xf80 +#endif +#else + .long exception_error /* 400 */ + .long exception_error + .long exception_error + .long exception_error + .long do_IRQ ! RTC ati + .long do_IRQ ! pri + .long do_IRQ ! cui + .long exception_error + .long exception_error /* 500 */ + .long exception_error + .long exception_error + .long do_IRQ ! WDT iti /* 560 */ + .long do_IRQ ! TMU-ch0 + .long do_IRQ ! TMU-ch1 + .long do_IRQ ! TMU-ch2 + .long do_IRQ ! ticpi2 /* 5E0 */ + .long do_IRQ ! 32 Hitachi UDI /* 600 */ + .long exception_error + .long do_IRQ ! 34 DMAC dmte0 + .long do_IRQ ! 35 dmte1 + .long do_IRQ ! 36 dmte2 + .long do_IRQ ! 37 dmte3 + .long do_IRQ ! 38 dmae + .long exception_error ! 39 /* 6E0 */ + .long do_IRQ ! 40 SCIF-ch0 eri /* 700 */ + .long do_IRQ ! 41 rxi + .long do_IRQ ! 42 bri + .long do_IRQ ! 43 txi + .long do_IRQ ! 44 DMAC dmte4 /* 780 */ + .long do_IRQ ! 45 dmte5 + .long do_IRQ ! 46 dmte6 + .long do_IRQ ! 47 dmte7 /* 7E0 */ +#if defined(CONFIG_SH_FPU) + .long do_fpu_state_restore ! 48 /* 800 */ + .long do_fpu_state_restore ! 49 /* 820 */ +#else + .long exception_error + .long exception_error +#endif + .long exception_error /* 840 */ + .long exception_error + .long exception_error + .long exception_error + .long exception_error + .long exception_error + .long do_IRQ ! 56 CMT /* 900 */ + .long exception_error + .long exception_error + .long exception_error + .long do_IRQ ! 60 HAC + .long exception_error + .long exception_error + .long exception_error + .long do_IRQ ! PCI serr /* A00 */ + .long do_IRQ ! INTA + .long do_IRQ ! INTB + .long do_IRQ ! INTC + .long do_IRQ ! INTD + .long do_IRQ ! err + .long do_IRQ ! pwd3 + .long do_IRQ ! pwd2 + .long do_IRQ ! pwd1 /* B00 */ + .long do_IRQ ! pwd0 + .long exception_error + .long exception_error + .long do_IRQ ! SCIF-ch1 eri /* B80 */ + .long do_IRQ ! rxi + .long do_IRQ ! bri + .long do_IRQ ! txi + .long do_IRQ ! SIOF /* C00 */ + .long exception_error + .long exception_error + .long exception_error + .long do_IRQ ! HSPI /* C80 */ + .long exception_error + .long exception_error + .long exception_error + .long do_IRQ ! MMCIF fatat /* D00 */ + .long do_IRQ ! tran + .long do_IRQ ! err + .long do_IRQ ! frdy + .long do_IRQ ! DMAC dmint8 /* D80 */ + .long do_IRQ ! dmint9 + .long do_IRQ ! dmint10 + .long do_IRQ ! dmint11 + .long do_IRQ ! TMU-ch3 /* E00 */ + .long do_IRQ ! TMU-ch4 + .long do_IRQ ! TMU-ch5 + .long exception_error + .long do_IRQ ! SSI + .long exception_error + .long exception_error + .long exception_error + .long do_IRQ ! FLCTL flste /* F00 */ + .long do_IRQ ! fltend + .long do_IRQ ! fltrq0 + .long do_IRQ ! fltrq1 + .long do_IRQ ! GPIO gpioi0 /* F80 */ + .long do_IRQ ! gpioi1 + .long do_IRQ ! gpioi2 + .long do_IRQ ! gpioi3 #endif diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index 89986e70d041..85ff48c1533a 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c @@ -78,6 +78,21 @@ int __init detect_cpu_and_cache_system(void) cpu_data->dcache.ways = 4; cpu_data->flags &= ~CPU_HAS_FPU; break; + case 0x2001: + case 0x2004: + cpu_data->type = CPU_SH7770; + cpu_data->icache.ways = 4; + cpu_data->dcache.ways = 4; + break; + case 0x2006: + case 0x200A: + if (prr == 0x61) + cpu_data->type = CPU_SH7781; + else + cpu_data->type = CPU_SH7780; + cpu_data->icache.ways = 4; + cpu_data->dcache.ways = 4; + break; case 0x8000: cpu_data->type = CPU_ST40RA; break; diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c index 00f6a3c8c43b..32c93b781b51 100644 --- a/arch/sh/kernel/cpu/sh4/sq.c +++ b/arch/sh/kernel/cpu/sh4/sq.c @@ -166,7 +166,9 @@ static struct sq_mapping *__sq_remap(struct sq_mapping *map) ctrl_outl((pteh & MMU_VPN_MASK) | get_asid(), MMU_PTEH); ptel = map->addr & PAGE_MASK; +#ifndef CONFIG_CPU_SUBTYPE_SH7780 ctrl_outl(((ptel >> 28) & 0xe) | (ptel & 0x1), MMU_PTEA); +#endif pgprot = pgprot_noncached(PAGE_KERNEL); diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c index 115b1b6be40b..96e5fb0ac4fa 100644 --- a/arch/sh/mm/tlb-sh4.c +++ b/arch/sh/mm/tlb-sh4.c @@ -36,7 +36,9 @@ void update_mmu_cache(struct vm_area_struct * vma, unsigned long vpn; struct page *page; unsigned long pfn; +#ifndef CONFIG_CPU_SUBTYPE_SH7780 unsigned long ptea; +#endif /* Ptrace may call this routine. */ if (vma && current->active_mm != vma->vm_mm) @@ -59,10 +61,12 @@ void update_mmu_cache(struct vm_area_struct * vma, ctrl_outl(vpn, MMU_PTEH); pteval = pte_val(pte); +#ifndef CONFIG_CPU_SUBTYPE_SH7780 /* Set PTEA register */ /* TODO: make this look less hacky */ ptea = ((pteval >> 28) & 0xe) | (pteval & 0x1); ctrl_outl(ptea, MMU_PTEA); +#endif /* Set PTEL register */ pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */ diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h index a6de3d06a3d9..b4000c8bf31b 100644 --- a/include/asm-sh/bugs.h +++ b/include/asm-sh/bugs.h @@ -32,6 +32,10 @@ static void __init check_bugs(void) case CPU_SH7750 ... CPU_SH4_501: *p++ = '4'; break; + case CPU_SH7770 ... CPU_SH7781: + *p++ = '4'; + *p++ = 'a'; + break; default: *p++ = '?'; *p++ = '!'; diff --git a/include/asm-sh/cpu-sh4/cache.h b/include/asm-sh/cpu-sh4/cache.h index 1fe20359312c..6e9c7e6ee8e4 100644 --- a/include/asm-sh/cpu-sh4/cache.h +++ b/include/asm-sh/cpu-sh4/cache.h @@ -22,7 +22,9 @@ #define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */ #define CCR_CACHE_ICI 0x0800 /* IC Invalidate */ #define CCR_CACHE_IIX 0x8000 /* IC Index Enable */ +#ifndef CONFIG_CPU_SUBTYPE_SH7780 #define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */ +#endif /* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */ #define CCR_CACHE_ENABLE (CCR_CACHE_OCE|CCR_CACHE_ICE) -- cgit v1.2.3 From 75c92acdd5b19a5e3536ed670e1122d73c635b4a Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 14:36:44 +0900 Subject: sh: Wire up new syscalls. The syscall table has lagged behind a bit, wire up the new ones.. Signed-off-by: Paul Mundt --- arch/sh/kernel/syscalls.S | 28 ++++++++++++++++++++++++++++ include/asm-sh/unistd.h | 26 ++++++++++++++++++++++++-- 2 files changed, 52 insertions(+), 2 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/syscalls.S b/arch/sh/kernel/syscalls.S index f500304cbd69..ada61b0d9a73 100644 --- a/arch/sh/kernel/syscalls.S +++ b/arch/sh/kernel/syscalls.S @@ -322,3 +322,31 @@ ENTRY(sys_call_table) .long sys_add_key /* 285 */ .long sys_request_key .long sys_keyctl + .long sys_ioprio_set + .long sys_ioprio_get + .long sys_inotify_init /* 290 */ + .long sys_inotify_add_watch + .long sys_inotify_rm_watch + .long sys_migrate_pages + .long sys_openat + .long sys_mkdirat /* 295 */ + .long sys_mknodat + .long sys_fchownat + .long sys_futimesat + .long sys_fstatat64 + .long sys_unlinkat /* 300 */ + .long sys_renameat + .long sys_linkat + .long sys_symlinkat + .long sys_readlinkat + .long sys_fchmodat /* 305 */ + .long sys_faccessat + .long sys_ni_syscall /* Reserved for pselect6 */ + .long sys_ni_syscall /* Reserved for ppoll */ + .long sys_unshare + .long sys_set_robust_list /* 310 */ + .long sys_get_robust_list + .long sys_splice + .long sys_sync_file_range + .long sys_tee + .long sys_vmsplice /* 315 */ diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h index 76b5430cb458..49c6a6ee0ab2 100644 --- a/include/asm-sh/unistd.h +++ b/include/asm-sh/unistd.h @@ -300,9 +300,31 @@ #define __NR_inotify_init 290 #define __NR_inotify_add_watch 291 #define __NR_inotify_rm_watch 292 +#define __NR_migrate_pages 293 +#define __NR_openat 294 +#define __NR_mkdirat 295 +#define __NR_mknodat 296 +#define __NR_fchownat 297 +#define __NR_futimesat 298 +#define __NR_fstatat64 299 +#define __NR_unlinkat 300 +#define __NR_renameat 301 +#define __NR_linkat 302 +#define __NR_symlinkat 303 +#define __NR_readlinkat 304 +#define __NR_fchmodat 305 +#define __NR_faccessat 305 +#define __NR_pselect6 307 +#define __NR_ppoll 308 +#define __NR_unshare 309 +#define __NR_set_robust_list 310 +#define __NR_get_robust_list 311 +#define __NR_splice 312 +#define __NR_sync_file_range 313 +#define __NR_tee 314 +#define __NR_vmsplice 315 - -#define NR_syscalls 293 +#define NR_syscalls 316 #ifdef __KERNEL__ -- cgit v1.2.3 From 749cf486920bf53f16e6a6889d9635a91ffb6c82 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 14:55:41 +0900 Subject: sh: Add flag for MMU PTEA capability. Add CPU_HAS_PTEA, refactor some of the cpu flag settings. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4/probe.c | 34 ++++++++++++++++++++++++---------- arch/sh/kernel/cpu/sh4/sq.c | 6 +++--- arch/sh/mm/tlb-sh4.c | 12 ++++-------- 3 files changed, 31 insertions(+), 21 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index 85ff48c1533a..2a7707a81d8f 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c @@ -3,7 +3,7 @@ * * CPU Subtype Probing for SH-4. * - * Copyright (C) 2001, 2002, 2003, 2004 Paul Mundt + * Copyright (C) 2001 - 2005 Paul Mundt * Copyright (C) 2003 Richard Curnow * * This file is subject to the terms and conditions of the GNU General Public @@ -53,9 +53,6 @@ int __init detect_cpu_and_cache_system(void) cpu_data->dcache.ways = 1; cpu_data->dcache.linesz = L1_CACHE_BYTES; - /* Set the FPU flag, virtually all SH-4's have one */ - cpu_data->flags |= CPU_HAS_FPU; - /* * Probe the underlying processor version/revision and * adjust cpu_data setup accordingly. @@ -63,26 +60,37 @@ int __init detect_cpu_and_cache_system(void) switch (pvr) { case 0x205: cpu_data->type = CPU_SH7750; - cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_PERF_COUNTER; + cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU | + CPU_HAS_PERF_COUNTER | CPU_HAS_PTEA; break; case 0x206: cpu_data->type = CPU_SH7750S; - cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_PERF_COUNTER; + cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU | + CPU_HAS_PERF_COUNTER | CPU_HAS_PTEA; break; case 0x1100: cpu_data->type = CPU_SH7751; + cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA; break; case 0x2000: cpu_data->type = CPU_SH73180; cpu_data->icache.ways = 4; cpu_data->dcache.ways = 4; - cpu_data->flags &= ~CPU_HAS_FPU; + + /* + * XXX: Double check this, none of the SH-4A/SH-4AL processors + * should have this, as it's essentially a legacy thing. + */ + cpu_data->flags |= CPU_HAS_PTEA; break; case 0x2001: case 0x2004: cpu_data->type = CPU_SH7770; cpu_data->icache.ways = 4; cpu_data->dcache.ways = 4; + + /* Same note as above applies here for PTEA */ + cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA; break; case 0x2006: case 0x200A: @@ -90,27 +98,31 @@ int __init detect_cpu_and_cache_system(void) cpu_data->type = CPU_SH7781; else cpu_data->type = CPU_SH7780; + cpu_data->icache.ways = 4; cpu_data->dcache.ways = 4; + + cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER; break; case 0x8000: cpu_data->type = CPU_ST40RA; + cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA; break; case 0x8100: cpu_data->type = CPU_ST40GX1; + cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA; break; case 0x700: cpu_data->type = CPU_SH4_501; cpu_data->icache.ways = 2; cpu_data->dcache.ways = 2; - - /* No FPU on the SH4-500 series.. */ - cpu_data->flags &= ~CPU_HAS_FPU; + cpu_data->flags |= CPU_HAS_PTEA; break; case 0x600: cpu_data->type = CPU_SH4_202; cpu_data->icache.ways = 2; cpu_data->dcache.ways = 2; + cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA; break; case 0x500 ... 0x501: switch (prr) { @@ -128,6 +140,8 @@ int __init detect_cpu_and_cache_system(void) cpu_data->icache.ways = 2; cpu_data->dcache.ways = 2; + cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA; + break; default: cpu_data->type = CPU_SH_NONE; diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c index 32c93b781b51..b148966dd7c7 100644 --- a/arch/sh/kernel/cpu/sh4/sq.c +++ b/arch/sh/kernel/cpu/sh4/sq.c @@ -166,9 +166,9 @@ static struct sq_mapping *__sq_remap(struct sq_mapping *map) ctrl_outl((pteh & MMU_VPN_MASK) | get_asid(), MMU_PTEH); ptel = map->addr & PAGE_MASK; -#ifndef CONFIG_CPU_SUBTYPE_SH7780 - ctrl_outl(((ptel >> 28) & 0xe) | (ptel & 0x1), MMU_PTEA); -#endif + + if (cpu_data->flags & CPU_HAS_PTEA) + ctrl_outl(((ptel >> 28) & 0xe) | (ptel & 0x1), MMU_PTEA); pgprot = pgprot_noncached(PAGE_KERNEL); diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c index 96e5fb0ac4fa..812b2d567de2 100644 --- a/arch/sh/mm/tlb-sh4.c +++ b/arch/sh/mm/tlb-sh4.c @@ -36,9 +36,6 @@ void update_mmu_cache(struct vm_area_struct * vma, unsigned long vpn; struct page *page; unsigned long pfn; -#ifndef CONFIG_CPU_SUBTYPE_SH7780 - unsigned long ptea; -#endif /* Ptrace may call this routine. */ if (vma && current->active_mm != vma->vm_mm) @@ -61,12 +58,11 @@ void update_mmu_cache(struct vm_area_struct * vma, ctrl_outl(vpn, MMU_PTEH); pteval = pte_val(pte); -#ifndef CONFIG_CPU_SUBTYPE_SH7780 + /* Set PTEA register */ - /* TODO: make this look less hacky */ - ptea = ((pteval >> 28) & 0xe) | (pteval & 0x1); - ctrl_outl(ptea, MMU_PTEA); -#endif + if (cpu_data->flags & CPU_HAS_PTEA) + /* TODO: make this look less hacky */ + ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA); /* Set PTEL register */ pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */ -- cgit v1.2.3 From b7e108ee63624176af85b97d4d80bef6fe099395 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:00:04 +0900 Subject: sh: BSS init bugfix and barrier in entry point. A synco is needed before we jump to start_kernel(). While we're at it, also move the sh_cpu_init() jump until after we've zeroed BSS, as this has caused some undesirable results in sh_cpu_init(). Signed-off-by: Paul Mundt --- arch/sh/kernel/head.S | 36 +++++++++++++++++++++++++++++++----- 1 file changed, 31 insertions(+), 5 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/head.S b/arch/sh/kernel/head.S index 00cd4708ef46..c5e363872b91 100644 --- a/arch/sh/kernel/head.S +++ b/arch/sh/kernel/head.S @@ -12,6 +12,17 @@ */ #include +#ifdef CONFIG_CPU_SH4A +#define SYNCO() synco + +#define PREFI(label, reg) \ + mov.l label, reg; \ + prefi @reg +#else +#define SYNCO() +#define PREFI(label, reg) +#endif + .section .empty_zero_page, "aw" ENTRY(empty_zero_page) .long 1 /* MOUNT_ROOT_RDONLY */ @@ -42,6 +53,17 @@ ENTRY(_stext) ! Initialize global interrupt mask mov #0, r0 ldc r0, r6_bank + + /* + * Prefetch if possible to reduce cache miss penalty. + * + * We do this early on for SH-4A as a micro-optimization, + * as later on we will have speculative execution enabled + * and this will become less of an issue. + */ + PREFI(5f, r0) + PREFI(6f, r0) + ! mov.l 2f, r0 mov r0, r15 ! Set initial r15 (stack pointer) @@ -49,11 +71,7 @@ ENTRY(_stext) shll8 r1 ! r1 = 8192 sub r1, r0 ! ldc r0, r7_bank ! ... and initial thread_info - ! - ! Additional CPU initialization - mov.l 6f, r0 - jsr @r0 - nop + ! Clear BSS area mov.l 3f, r1 add #4, r1 @@ -62,6 +80,14 @@ ENTRY(_stext) 9: cmp/hs r2, r1 bf/s 9b ! while (r1 < r2) mov.l r0,@-r2 + + ! Additional CPU initialization + mov.l 6f, r0 + jsr @r0 + nop + + SYNCO() ! Wait for pending instructions.. + ! Start kernel mov.l 5f, r0 jmp @r0 -- cgit v1.2.3 From 9359e757709a211040e4b0151eae69248e7c6eca Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:09:48 +0900 Subject: sh: export clear_user_page() for the modules that need it. Some modules seem to need this, so we export it.. Signed-off-by: Paul Mundt --- arch/sh/kernel/sh_ksyms.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms.c index 8cad80cec9a6..8a6dd06fd071 100644 --- a/arch/sh/kernel/sh_ksyms.c +++ b/arch/sh/kernel/sh_ksyms.c @@ -100,6 +100,7 @@ EXPORT_SYMBOL(flush_cache_all); EXPORT_SYMBOL(flush_cache_range); EXPORT_SYMBOL(flush_dcache_page); EXPORT_SYMBOL(__flush_purge_region); +EXPORT_SYMBOL(clear_user_page); #endif #if defined(CONFIG_SH7705_CACHE_32KB) -- cgit v1.2.3 From 26ff6c11ef38e08990c1e417c299246e6ab18ff7 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:13:36 +0900 Subject: sh: page table alloc cleanups and page fault optimizations. Cleanup of page table allocators, using generic folded PMD and PUD helpers. TLB flushing operations are moved to a more sensible spot. The page fault handler is also optimized slightly, we no longer waste cycles on IRQ disabling for flushing of the page from the ITLB, since we're already under CLI protection by the initial exception handler. Signed-off-by: Paul Mundt --- arch/sh/kernel/sys_sh.c | 2 +- arch/sh/mm/Makefile | 2 +- arch/sh/mm/consistent.c | 2 + arch/sh/mm/fault.c | 202 +++++++----------------------------- arch/sh/mm/init.c | 13 ++- arch/sh/mm/tlb-flush.c | 132 +++++++++++++++++++++++ include/asm-sh/cache.h | 8 -- include/asm-sh/cacheflush.h | 1 + include/asm-sh/cpu-sh3/cacheflush.h | 8 +- include/asm-sh/cpu-sh4/cacheflush.h | 29 +++--- include/asm-sh/page.h | 12 +-- include/asm-sh/pgalloc.h | 37 +------ include/asm-sh/pgtable.h | 80 +++++++++----- 13 files changed, 261 insertions(+), 267 deletions(-) create mode 100644 arch/sh/mm/tlb-flush.c (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c index 917b2f32f260..d8bcd8a22327 100644 --- a/arch/sh/kernel/sys_sh.c +++ b/arch/sh/kernel/sys_sh.c @@ -21,7 +21,7 @@ #include #include #include - +#include #include #include diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile index f4e32b3d24dc..d90906367c5f 100644 --- a/arch/sh/mm/Makefile +++ b/arch/sh/mm/Makefile @@ -12,7 +12,7 @@ obj-$(CONFIG_DMA_PAGE_OPS) += pg-dma.o obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o mmu-y := fault-nommu.o tlb-nommu.o pg-nommu.o -mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o +mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o tlb-flush.o obj-y += $(mmu-y) diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c index ee73e30263af..c81e6b67ad30 100644 --- a/arch/sh/mm/consistent.c +++ b/arch/sh/mm/consistent.c @@ -9,6 +9,8 @@ */ #include #include +#include +#include #include void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *handle) diff --git a/arch/sh/mm/fault.c b/arch/sh/mm/fault.c index 364181f27b79..7a03ffe6dadd 100644 --- a/arch/sh/mm/fault.c +++ b/arch/sh/mm/fault.c @@ -1,33 +1,20 @@ -/* $Id: fault.c,v 1.14 2004/01/13 05:52:11 kkojima Exp $ +/* + * Page fault handler for SH with an MMU. * - * linux/arch/sh/mm/fault.c * Copyright (C) 1999 Niibe Yutaka * Copyright (C) 2003 Paul Mundt * * Based on linux/arch/i386/mm/fault.c: * Copyright (C) 1995 Linus Torvalds + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ - -#include -#include #include -#include -#include -#include -#include -#include #include -#include -#include -#include -#include - #include -#include -#include -#include #include -#include #include extern void die(const char *,struct pt_regs *,long); @@ -187,14 +174,25 @@ do_sigbus: goto no_context; } +#ifdef CONFIG_SH_STORE_QUEUES /* - * Called with interrupt disabled. + * This is a special case for the SH-4 store queues, as pages for this + * space still need to be faulted in before it's possible to flush the + * store queue cache for writeout to the remapped region. + */ +#define P3_ADDR_MAX (P4SEG_STORE_QUE + 0x04000000) +#else +#define P3_ADDR_MAX P4SEG +#endif + +/* + * Called with interrupts disabled. */ asmlinkage int __do_page_fault(struct pt_regs *regs, unsigned long writeaccess, unsigned long address) { - unsigned long addrmax = P4SEG; pgd_t *pgd; + pud_t *pud; pmd_t *pmd; pte_t *pte; pte_t entry; @@ -207,31 +205,36 @@ asmlinkage int __do_page_fault(struct pt_regs *regs, unsigned long writeaccess, kgdb_bus_err_hook(); #endif -#ifdef CONFIG_SH_STORE_QUEUES - addrmax = P4SEG_STORE_QUE + 0x04000000; -#endif - - if (address >= P3SEG && address < addrmax) { + /* + * We don't take page faults for P1, P2, and parts of P4, these + * are always mapped, whether it be due to legacy behaviour in + * 29-bit mode, or due to PMB configuration in 32-bit mode. + */ + if (address >= P3SEG && address < P3_ADDR_MAX) pgd = pgd_offset_k(address); - mm = NULL; - } else if (address >= TASK_SIZE) - return 1; - else if (!(mm = current->mm)) - return 1; - else - pgd = pgd_offset(mm, address); + else { + if (unlikely(address >= TASK_SIZE || !current->mm)) + return 1; + + pgd = pgd_offset(current->mm, address); + } - pmd = pmd_offset(pgd, address); + pud = pud_offset(pgd, address); + if (pud_none_or_clear_bad(pud)) + return 1; + pmd = pmd_offset(pud, address); if (pmd_none_or_clear_bad(pmd)) return 1; + if (mm) pte = pte_offset_map_lock(mm, pmd, address, &ptl); else pte = pte_offset_kernel(pmd, address); entry = *pte; - if (pte_none(entry) || pte_not_present(entry) - || (writeaccess && !pte_write(entry))) + if (unlikely(pte_none(entry) || pte_not_present(entry))) + goto unlock; + if (unlikely(writeaccess && !pte_write(entry))) goto unlock; if (writeaccess) @@ -243,13 +246,7 @@ asmlinkage int __do_page_fault(struct pt_regs *regs, unsigned long writeaccess, * ITLB is not affected by "ldtlb" instruction. * So, we need to flush the entry by ourselves. */ - - { - unsigned long flags; - local_irq_save(flags); - __flush_tlb_page(get_asid(), address&PAGE_MASK); - local_irq_restore(flags); - } + __flush_tlb_page(get_asid(), address & PAGE_MASK); #endif set_pte(pte, entry); @@ -260,122 +257,3 @@ unlock: pte_unmap_unlock(pte, ptl); return ret; } - -void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) -{ - if (vma->vm_mm && vma->vm_mm->context != NO_CONTEXT) { - unsigned long flags; - unsigned long asid; - unsigned long saved_asid = MMU_NO_ASID; - - asid = vma->vm_mm->context & MMU_CONTEXT_ASID_MASK; - page &= PAGE_MASK; - - local_irq_save(flags); - if (vma->vm_mm != current->mm) { - saved_asid = get_asid(); - set_asid(asid); - } - __flush_tlb_page(asid, page); - if (saved_asid != MMU_NO_ASID) - set_asid(saved_asid); - local_irq_restore(flags); - } -} - -void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end) -{ - struct mm_struct *mm = vma->vm_mm; - - if (mm->context != NO_CONTEXT) { - unsigned long flags; - int size; - - local_irq_save(flags); - size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; - if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */ - mm->context = NO_CONTEXT; - if (mm == current->mm) - activate_context(mm); - } else { - unsigned long asid = mm->context&MMU_CONTEXT_ASID_MASK; - unsigned long saved_asid = MMU_NO_ASID; - - start &= PAGE_MASK; - end += (PAGE_SIZE - 1); - end &= PAGE_MASK; - if (mm != current->mm) { - saved_asid = get_asid(); - set_asid(asid); - } - while (start < end) { - __flush_tlb_page(asid, start); - start += PAGE_SIZE; - } - if (saved_asid != MMU_NO_ASID) - set_asid(saved_asid); - } - local_irq_restore(flags); - } -} - -void flush_tlb_kernel_range(unsigned long start, unsigned long end) -{ - unsigned long flags; - int size; - - local_irq_save(flags); - size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; - if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */ - flush_tlb_all(); - } else { - unsigned long asid = init_mm.context&MMU_CONTEXT_ASID_MASK; - unsigned long saved_asid = get_asid(); - - start &= PAGE_MASK; - end += (PAGE_SIZE - 1); - end &= PAGE_MASK; - set_asid(asid); - while (start < end) { - __flush_tlb_page(asid, start); - start += PAGE_SIZE; - } - set_asid(saved_asid); - } - local_irq_restore(flags); -} - -void flush_tlb_mm(struct mm_struct *mm) -{ - /* Invalidate all TLB of this process. */ - /* Instead of invalidating each TLB, we get new MMU context. */ - if (mm->context != NO_CONTEXT) { - unsigned long flags; - - local_irq_save(flags); - mm->context = NO_CONTEXT; - if (mm == current->mm) - activate_context(mm); - local_irq_restore(flags); - } -} - -void flush_tlb_all(void) -{ - unsigned long flags, status; - - /* - * Flush all the TLB. - * - * Write to the MMU control register's bit: - * TF-bit for SH-3, TI-bit for SH-4. - * It's same position, bit #2. - */ - local_irq_save(flags); - status = ctrl_inl(MMUCR); - status |= 0x04; - ctrl_outl(status, MMUCR); - ctrl_barrier(); - local_irq_restore(flags); -} diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c index 8ea27ca4b700..d1a979eab656 100644 --- a/arch/sh/mm/init.c +++ b/arch/sh/mm/init.c @@ -80,6 +80,7 @@ void show_mem(void) static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot) { pgd_t *pgd; + pud_t *pud; pmd_t *pmd; pte_t *pte; @@ -89,7 +90,17 @@ static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot) return; } - pmd = pmd_offset(pgd, addr); + pud = pud_offset(pgd, addr); + if (pud_none(*pud)) { + pmd = (pmd_t *)get_zeroed_page(GFP_ATOMIC); + set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE | _PAGE_USER)); + if (pmd != pmd_offset(pud, 0)) { + pud_ERROR(*pud); + return; + } + } + + pmd = pmd_offset(pud, addr); if (pmd_none(*pmd)) { pte = (pte_t *)get_zeroed_page(GFP_ATOMIC); set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE | _PAGE_USER)); diff --git a/arch/sh/mm/tlb-flush.c b/arch/sh/mm/tlb-flush.c new file mode 100644 index 000000000000..fd7e42bcaa40 --- /dev/null +++ b/arch/sh/mm/tlb-flush.c @@ -0,0 +1,132 @@ +/* + * TLB flushing operations for SH with an MMU. + * + * Copyright (C) 1999 Niibe Yutaka + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include + +void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) +{ + if (vma->vm_mm && vma->vm_mm->context != NO_CONTEXT) { + unsigned long flags; + unsigned long asid; + unsigned long saved_asid = MMU_NO_ASID; + + asid = vma->vm_mm->context & MMU_CONTEXT_ASID_MASK; + page &= PAGE_MASK; + + local_irq_save(flags); + if (vma->vm_mm != current->mm) { + saved_asid = get_asid(); + set_asid(asid); + } + __flush_tlb_page(asid, page); + if (saved_asid != MMU_NO_ASID) + set_asid(saved_asid); + local_irq_restore(flags); + } +} + +void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, + unsigned long end) +{ + struct mm_struct *mm = vma->vm_mm; + + if (mm->context != NO_CONTEXT) { + unsigned long flags; + int size; + + local_irq_save(flags); + size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; + if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */ + mm->context = NO_CONTEXT; + if (mm == current->mm) + activate_context(mm); + } else { + unsigned long asid = mm->context&MMU_CONTEXT_ASID_MASK; + unsigned long saved_asid = MMU_NO_ASID; + + start &= PAGE_MASK; + end += (PAGE_SIZE - 1); + end &= PAGE_MASK; + if (mm != current->mm) { + saved_asid = get_asid(); + set_asid(asid); + } + while (start < end) { + __flush_tlb_page(asid, start); + start += PAGE_SIZE; + } + if (saved_asid != MMU_NO_ASID) + set_asid(saved_asid); + } + local_irq_restore(flags); + } +} + +void flush_tlb_kernel_range(unsigned long start, unsigned long end) +{ + unsigned long flags; + int size; + + local_irq_save(flags); + size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; + if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */ + flush_tlb_all(); + } else { + unsigned long asid = init_mm.context&MMU_CONTEXT_ASID_MASK; + unsigned long saved_asid = get_asid(); + + start &= PAGE_MASK; + end += (PAGE_SIZE - 1); + end &= PAGE_MASK; + set_asid(asid); + while (start < end) { + __flush_tlb_page(asid, start); + start += PAGE_SIZE; + } + set_asid(saved_asid); + } + local_irq_restore(flags); +} + +void flush_tlb_mm(struct mm_struct *mm) +{ + /* Invalidate all TLB of this process. */ + /* Instead of invalidating each TLB, we get new MMU context. */ + if (mm->context != NO_CONTEXT) { + unsigned long flags; + + local_irq_save(flags); + mm->context = NO_CONTEXT; + if (mm == current->mm) + activate_context(mm); + local_irq_restore(flags); + } +} + +void flush_tlb_all(void) +{ + unsigned long flags, status; + + /* + * Flush all the TLB. + * + * Write to the MMU control register's bit: + * TF-bit for SH-3, TI-bit for SH-4. + * It's same position, bit #2. + */ + local_irq_save(flags); + status = ctrl_inl(MMUCR); + status |= 0x04; + ctrl_outl(status, MMUCR); + ctrl_barrier(); + local_irq_restore(flags); +} diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h index 33f13367054b..e3a180cf5062 100644 --- a/include/asm-sh/cache.h +++ b/include/asm-sh/cache.h @@ -10,7 +10,6 @@ #ifdef __KERNEL__ #include -#include #define SH_CACHE_VALID 1 #define SH_CACHE_UPDATED 2 @@ -49,12 +48,5 @@ struct cache_info { unsigned long flags; }; -/* Flush (write-back only) a region (smaller than a page) */ -extern void __flush_wback_region(void *start, int size); -/* Flush (write-back & invalidate) a region (smaller than a page) */ -extern void __flush_purge_region(void *start, int size); -/* Flush (invalidate only) a region (smaller than a page) */ -extern void __flush_invalidate_region(void *start, int size); - #endif /* __KERNEL__ */ #endif /* __ASM_SH_CACHE_H */ diff --git a/include/asm-sh/cacheflush.h b/include/asm-sh/cacheflush.h index 9dfb33edb008..92930b4a40d4 100644 --- a/include/asm-sh/cacheflush.h +++ b/include/asm-sh/cacheflush.h @@ -2,6 +2,7 @@ #define __ASM_SH_CACHEFLUSH_H #ifdef __KERNEL__ +#include #include /* Flush (write-back only) a region (smaller than a page) */ diff --git a/include/asm-sh/cpu-sh3/cacheflush.h b/include/asm-sh/cpu-sh3/cacheflush.h index f51aed00c68f..db0cb071ea8e 100644 --- a/include/asm-sh/cpu-sh3/cacheflush.h +++ b/include/asm-sh/cpu-sh3/cacheflush.h @@ -10,7 +10,7 @@ #ifndef __ASM_CPU_SH3_CACHEFLUSH_H #define __ASM_CPU_SH3_CACHEFLUSH_H -/* +/* * Cache flushing: * * - flush_cache_all() flushes entire cache @@ -35,10 +35,6 @@ /* 32KB cache, 4kb PAGE sizes need to check bit 12 */ #define CACHE_ALIAS 0x00001000 -struct page; -struct mm_struct; -struct vm_area_struct; - extern void flush_cache_all(void); extern void flush_cache_mm(struct mm_struct *mm); extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, @@ -79,8 +75,6 @@ extern void flush_icache_page(struct vm_area_struct *vma, struct page *page); #define p3_cache_init() do { } while (0) -#define HAVE_ARCH_UNMAPPED_AREA - #endif #endif /* __ASM_CPU_SH3_CACHEFLUSH_H */ diff --git a/include/asm-sh/cpu-sh4/cacheflush.h b/include/asm-sh/cpu-sh4/cacheflush.h index ea58c4c5944d..a95fc951aff6 100644 --- a/include/asm-sh/cpu-sh4/cacheflush.h +++ b/include/asm-sh/cpu-sh4/cacheflush.h @@ -16,30 +16,26 @@ * caching; in which case they're only semi-broken), * so we need them. */ -struct page; -struct mm_struct; -struct vm_area_struct; - -extern void flush_cache_all(void); -extern void flush_cache_mm(struct mm_struct *mm); -extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end); -extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn); -extern void flush_dcache_page(struct page *pg); +void flush_cache_all(void); +void flush_cache_mm(struct mm_struct *mm); +void flush_cache_range(struct vm_area_struct *vma, unsigned long start, + unsigned long end); +void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, + unsigned long pfn); +void flush_dcache_page(struct page *pg); #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) -extern void flush_icache_range(unsigned long start, unsigned long end); -extern void flush_cache_sigtramp(unsigned long addr); -extern void flush_icache_user_range(struct vm_area_struct *vma, - struct page *page, unsigned long addr, - int len); +void flush_icache_range(unsigned long start, unsigned long end); +void flush_cache_sigtramp(unsigned long addr); +void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, + unsigned long addr, int len); #define flush_icache_page(vma,pg) do { } while (0) /* Initialization of P3 area for copy_user_page */ -extern void p3_cache_init(void); +void p3_cache_init(void); #define PG_mapped PG_arch_1 @@ -57,4 +53,3 @@ static inline int remap_area_pages(unsigned long addr, unsigned long phys_addr, } #endif /* CONFIG_MMU */ #endif /* __ASM_CPU_SH4_CACHEFLUSH_H */ - diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index 4811d410d123..51d7281a546a 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -41,7 +41,8 @@ extern void (*copy_page)(void *to, void *from); extern void clear_page_slow(void *to); extern void copy_page_slow(void *to, void *from); -#if defined(CONFIG_SH7705_CACHE_32KB) && defined(CONFIG_MMU) +#if defined(CONFIG_MMU) && (defined(CONFIG_CPU_SH4) || \ + defined(CONFIG_SH7705_CACHE_32KB)) struct page; extern void clear_user_page(void *to, unsigned long address, struct page *pg); extern void copy_user_page(void *to, void *from, unsigned long address, struct page *pg); @@ -50,29 +51,20 @@ extern void __copy_user_page(void *to, void *from, void *orig_to); #elif defined(CONFIG_CPU_SH2) || defined(CONFIG_CPU_SH3) || !defined(CONFIG_MMU) #define clear_user_page(page, vaddr, pg) clear_page(page) #define copy_user_page(to, from, vaddr, pg) copy_page(to, from) -#elif defined(CONFIG_CPU_SH4) -struct page; -extern void clear_user_page(void *to, unsigned long address, struct page *pg); -extern void copy_user_page(void *to, void *from, unsigned long address, struct page *pg); -extern void __clear_user_page(void *to, void *orig_to); -extern void __copy_user_page(void *to, void *from, void *orig_to); #endif /* * These are used to make use of C type-checking.. */ typedef struct { unsigned long pte; } pte_t; -typedef struct { unsigned long pmd; } pmd_t; typedef struct { unsigned long pgd; } pgd_t; typedef struct { unsigned long pgprot; } pgprot_t; #define pte_val(x) ((x).pte) -#define pmd_val(x) ((x).pmd) #define pgd_val(x) ((x).pgd) #define pgprot_val(x) ((x).pgprot) #define __pte(x) ((pte_t) { (x) } ) -#define __pmd(x) ((pmd_t) { (x) } ) #define __pgd(x) ((pgd_t) { (x) } ) #define __pgprot(x) ((pgprot_t) { (x) } ) diff --git a/include/asm-sh/pgalloc.h b/include/asm-sh/pgalloc.h index f4f233f7a4f5..e841465ab4d2 100644 --- a/include/asm-sh/pgalloc.h +++ b/include/asm-sh/pgalloc.h @@ -1,15 +1,6 @@ #ifndef __ASM_SH_PGALLOC_H #define __ASM_SH_PGALLOC_H -#include -#include -#include - -#define pgd_quicklist ((unsigned long *)0) -#define pmd_quicklist ((unsigned long *)0) -#define pte_quicklist ((unsigned long *)0) -#define pgtable_cache_size 0L - #define pmd_populate_kernel(mm, pmd, pte) \ set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte))) @@ -24,38 +15,24 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, */ static inline pgd_t *pgd_alloc(struct mm_struct *mm) { - unsigned int pgd_size = (USER_PTRS_PER_PGD * sizeof(pgd_t)); - pgd_t *pgd = (pgd_t *)kmalloc(pgd_size, GFP_KERNEL); - - if (pgd) - memset(pgd, 0, pgd_size); - - return pgd; + return (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO); } static inline void pgd_free(pgd_t *pgd) { - kfree(pgd); + free_page((unsigned long)pgd); } static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) { - pte_t *pte; - - pte = (pte_t *) __get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO); - - return pte; + return (pte_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO); } static inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) { - struct page *pte; - - pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0); - - return pte; + return alloc_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO); } static inline void pte_free_kernel(pte_t *pte) @@ -75,14 +52,8 @@ static inline void pte_free(struct page *pte) * inside the pgd, so has no extra memory associated with it. */ -#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); }) #define pmd_free(x) do { } while (0) #define __pmd_free_tlb(tlb,x) do { } while (0) -#define pgd_populate(mm, pmd, pte) BUG() #define check_pgt_cache() do { } while (0) -#ifdef CONFIG_CPU_SH4 -#define PG_mapped PG_arch_1 -#endif - #endif /* __ASM_SH_PGALLOC_H */ diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h index 40d41a78041e..9728b58f7c13 100644 --- a/include/asm-sh/pgtable.h +++ b/include/asm-sh/pgtable.h @@ -1,42 +1,42 @@ -#ifndef __ASM_SH_PGTABLE_H -#define __ASM_SH_PGTABLE_H - -#include - /* + * This file contains the functions and defines necessary to modify and + * use the SuperH page table tree. + * * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2002, 2003, 2004 Paul Mundt + * Copyright (C) 2002 - 2005 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file "COPYING" in the main directory of this + * archive for more details. */ +#ifndef __ASM_SH_PGTABLE_H +#define __ASM_SH_PGTABLE_H -#include +#include +#include + +#define PTRS_PER_PGD 1024 -/* - * This file contains the functions and defines necessary to modify and use - * the SuperH page table tree. - */ #ifndef __ASSEMBLY__ -#include #include #include -#include extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; extern void paging_init(void); -/* - * Basically we have the same two-level (which is the logical three level - * Linux page table layout folded) page tables as the i386. - */ - /* * ZERO_PAGE is a global shared page that is always zero: used * for zero-mapped memory areas etc.. */ -extern unsigned long empty_zero_page[1024]; +extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) #endif /* !__ASSEMBLY__ */ +/* traditional two-level paging structure */ +#define PGDIR_SHIFT 22 +#define PTRS_PER_PMD 1 +#define PTRS_PER_PTE 1024 #define PMD_SIZE (1UL << PMD_SHIFT) #define PMD_MASK (~(PMD_SIZE-1)) #define PGDIR_SIZE (1UL << PGDIR_SHIFT) @@ -47,7 +47,6 @@ extern unsigned long empty_zero_page[1024]; #define PTE_PHYS_MASK 0x1ffff000 -#ifndef __ASSEMBLY__ /* * First 1MB map is used by fixed purpose. * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c) @@ -65,7 +64,7 @@ extern unsigned long empty_zero_page[1024]; #define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */ #define _PAGE_PRESENT 0x100 /* V-bit : page is valid */ #define _PAGE_PROTNONE 0x200 /* software: if not present */ -#define _PAGE_ACCESSED 0x400 /* software: page referenced */ +#define _PAGE_ACCESSED 0x400 /* software: page referenced */ #define _PAGE_U0_SHARED 0x800 /* software: page is shared in user space */ #define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */ @@ -83,7 +82,6 @@ extern unsigned long empty_zero_page[1024]; #define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ #define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ - /* Mask which drop software flags * We also drop WT bit since it is used for _PAGE_FILE * bit in this implementation. @@ -115,6 +113,8 @@ extern unsigned long empty_zero_page[1024]; #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY) #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_SHARED) +#ifndef __ASSEMBLY__ + #ifdef CONFIG_MMU #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD) #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_SHARED | _PAGE_FLAGS_HARD) @@ -137,12 +137,13 @@ extern unsigned long empty_zero_page[1024]; #define PAGE_KERNEL_PCC __pgprot(0) #endif +#endif /* __ASSEMBLY__ */ + /* * As i386 and MIPS, SuperH can't do page protection for execute, and * considers that the same as a read. Also, write permissions imply - * read permissions. This is the closest we can get.. + * read permissions. This is the closest we can get.. */ - #define __P000 PAGE_NONE #define __P001 PAGE_READONLY #define __P010 PAGE_COPY @@ -161,6 +162,26 @@ extern unsigned long empty_zero_page[1024]; #define __S110 PAGE_SHARED #define __S111 PAGE_SHARED +#ifndef __ASSEMBLY__ + +/* + * Certain architectures need to do special things when PTEs + * within a page table are directly modified. Thus, the following + * hook is made available. + */ +#define set_pte(pteptr, pteval) (*(pteptr) = pteval) +#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) + +/* + * (pmds are folded into pgds so this doesn't get actually called, + * but the define is needed for a generic inline function.) + */ +#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) + +#define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT))) +#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) +#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) + #define pte_none(x) (!pte_val(x)) #define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE)) #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) @@ -171,7 +192,7 @@ extern unsigned long empty_zero_page[1024]; #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) -#define pte_page(x) phys_to_page(pte_val(x)&PTE_PHYS_MASK) +#define pte_page(x) phys_to_page(pte_val(x)&PTE_PHYS_MASK) /* * The following only work if pte_present() is true. @@ -248,6 +269,11 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) #define pte_unmap(pte) do { } while (0) #define pte_unmap_nested(pte) do { } while (0) +#define pte_ERROR(e) \ + printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) +#define pgd_ERROR(e) \ + printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) + struct vm_area_struct; extern void update_mmu_cache(struct vm_area_struct * vma, unsigned long address, pte_t pte); @@ -272,8 +298,6 @@ extern void update_mmu_cache(struct vm_area_struct * vma, typedef pte_t *pte_addr_t; -#endif /* !__ASSEMBLY__ */ - #define kern_addr_valid(addr) (1) #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ @@ -301,5 +325,7 @@ extern pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t #include +#endif /* !__ASSEMBLY__ */ + #endif /* __ASM_SH_PAGE_H */ -- cgit v1.2.3 From d7cdc9e8ac82c43fdcd4fde6b5b53d2dcba7f707 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:16:42 +0900 Subject: sh: ioremap() overhaul. ioremap() overhaul. Add support for transparent PMB mapping, get rid of p3_ioremap(), etc. Also drop ioremap() and iounmap() routines from the machvec, as everyone can use the generic ioremap() API instead. For PCI memory apertures and other special cases, use the pci_iomap() API, as boards are already required to get the mapping right there. Signed-off-by: Paul Mundt --- arch/sh/boards/landisk/io.c | 236 ++++++++++++---------------- arch/sh/boards/landisk/setup.c | 237 ++++++++++++----------------- arch/sh/boards/renesas/hs7751rvoip/io.c | 9 -- arch/sh/boards/renesas/hs7751rvoip/setup.c | 1 - arch/sh/boards/renesas/rts7751r2d/io.c | 9 -- arch/sh/boards/renesas/rts7751r2d/mach.c | 2 - arch/sh/boards/titan/io.c | 9 +- arch/sh/boards/titan/setup.c | 1 - arch/sh/drivers/pci/pci.c | 21 ++- arch/sh/kernel/cf-enabler.c | 5 +- arch/sh/kernel/sh_ksyms.c | 1 - arch/sh/mm/Makefile | 7 +- arch/sh/mm/pmb.c | 145 +++++++++++++++++- include/asm-sh/landisk/iodata_landisk.h | 3 + include/asm-sh/mmu.h | 11 +- 15 files changed, 374 insertions(+), 323 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/boards/landisk/io.c b/arch/sh/boards/landisk/io.c index 1f1679af09d0..aa6b145c9e8f 100644 --- a/arch/sh/boards/landisk/io.c +++ b/arch/sh/boards/landisk/io.c @@ -17,9 +17,9 @@ #include #include -#include #include #include +#include #include #include @@ -42,10 +42,6 @@ extern void *area6_io_base; /* Area 6 I/O Base address */ #define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) -#define maybebadio(name,port) \ - printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \ - #name, (port), (__u32) __builtin_return_address(0)) - static inline void delay(void) { ctrl_inw(0xa0000000); @@ -66,7 +62,7 @@ static inline unsigned long port2adr(unsigned int port) return ((unsigned long)area6_io_base + PA_SIDE_OFFSET + ((port - 0x170) << 1)); else - maybebadio(port2adr, (unsigned long)port); + maybebadio((unsigned long)port); return port; } @@ -89,234 +85,200 @@ static inline unsigned long port2adr(unsigned int port) * should be way beyond the window, and is used w/o translation for * compatibility. */ -unsigned char landisk_inb(unsigned long port) +u8 landisk_inb(unsigned long port) { if (PXSEG(port)) - return *(volatile unsigned char *)port; + return ctrl_inb(port); else if (CHECK_SH7751_PCIIO(port)) - return *(volatile unsigned char *)PCI_IOMAP(port); - else - return (*(volatile unsigned short *)port2adr(port) & 0xff); + return ctrl_inb(PCI_IOMAP(port)); + + return ctrl_inw(port2adr(port)) & 0xff; } -unsigned char landisk_inb_p(unsigned long port) +u8 landisk_inb_p(unsigned long port) { - unsigned char v; + u8 v; if (PXSEG(port)) - v = *(volatile unsigned char *)port; + v = ctrl_inb(port); else if (CHECK_SH7751_PCIIO(port)) - v = *(volatile unsigned char *)PCI_IOMAP(port); + v = ctrl_inb(PCI_IOMAP(port)); else - v = (*(volatile unsigned short *)port2adr(port) & 0xff); + v = ctrl_inw(port2adr(port)) & 0xff; + delay(); return v; } -unsigned short landisk_inw(unsigned long port) +u16 landisk_inw(unsigned long port) { if (PXSEG(port)) - return *(volatile unsigned short *)port; + return ctrl_inw(port); else if (CHECK_SH7751_PCIIO(port)) - return *(volatile unsigned short *)PCI_IOMAP(port); + return ctrl_inw(PCI_IOMAP(port)); else - maybebadio(inw, port); + maybebadio(port); return 0; } -unsigned int landisk_inl(unsigned long port) +u32 landisk_inl(unsigned long port) { if (PXSEG(port)) - return *(volatile unsigned long *)port; + return ctrl_inl(port); else if (CHECK_SH7751_PCIIO(port)) - return *(volatile unsigned long *)PCI_IOMAP(port); + return ctrl_inl(PCI_IOMAP(port)); else - maybebadio(inl, port); + maybebadio(port); return 0; } -void landisk_outb(unsigned char value, unsigned long port) +void landisk_outb(u8 value, unsigned long port) { - if (PXSEG(port)) - *(volatile unsigned char *)port = value; + ctrl_outb(value, port); else if (CHECK_SH7751_PCIIO(port)) - *(volatile unsigned char *)PCI_IOMAP(port) = value; + ctrl_outb(value, PCI_IOMAP(port)); else - *(volatile unsigned short *)port2adr(port) = value; + ctrl_outw(value, port2adr(port)); } -void landisk_outb_p(unsigned char value, unsigned long port) +void landisk_outb_p(u8 value, unsigned long port) { if (PXSEG(port)) - *(volatile unsigned char *)port = value; + ctrl_outb(value, port); else if (CHECK_SH7751_PCIIO(port)) - *(volatile unsigned char *)PCI_IOMAP(port) = value; + ctrl_outb(value, PCI_IOMAP(port)); else - *(volatile unsigned short *)port2adr(port) = value; + ctrl_outw(value, port2adr(port)); delay(); } -void landisk_outw(unsigned short value, unsigned long port) +void landisk_outw(u16 value, unsigned long port) { if (PXSEG(port)) - *(volatile unsigned short *)port = value; + ctrl_outw(value, port); else if (CHECK_SH7751_PCIIO(port)) - *(volatile unsigned short *)PCI_IOMAP(port) = value; + ctrl_outw(value, PCI_IOMAP(port)); else - maybebadio(outw, port); + maybebadio(port); } -void landisk_outl(unsigned int value, unsigned long port) +void landisk_outl(u32 value, unsigned long port) { if (PXSEG(port)) - *(volatile unsigned long *)port = value; + ctrl_outl(value, port); else if (CHECK_SH7751_PCIIO(port)) - *(volatile unsigned long *)PCI_IOMAP(port) = value; + ctrl_outl(value, PCI_IOMAP(port)); else - maybebadio(outl, port); + maybebadio(port); } -void landisk_insb(unsigned long port, void *addr, unsigned long count) +void landisk_insb(unsigned long port, void *dst, unsigned long count) { - if (PXSEG(port)) - while (count--) - *((unsigned char *)addr)++ = - *(volatile unsigned char *)port; - else if (CHECK_SH7751_PCIIO(port)) { - volatile __u8 *bp = (__u8 *) PCI_IOMAP(port); + volatile u16 *p; + u8 *buf = dst; - while (count--) - *((volatile unsigned char *)addr)++ = *bp; - } else { - volatile __u16 *p = (volatile unsigned short *)port2adr(port); + if (PXSEG(port)) { + while (count--) + *buf++ = *(volatile u8 *)port; + } else if (CHECK_SH7751_PCIIO(port)) { + volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); - while (count--) - *((unsigned char *)addr)++ = *p; + while (count--) + *buf++ = *bp; + } else { + p = (volatile u16 *)port2adr(port); + while (count--) + *buf++ = *p & 0xff; } } -void landisk_insw(unsigned long port, void *addr, unsigned long count) +void landisk_insw(unsigned long port, void *dst, unsigned long count) { - volatile __u16 *p; + volatile u16 *p; + u16 *buf = dst; if (PXSEG(port)) - p = (volatile unsigned short *)port; + p = (volatile u16 *)port; else if (CHECK_SH7751_PCIIO(port)) - p = (volatile unsigned short *)PCI_IOMAP(port); + p = (volatile u16 *)PCI_IOMAP(port); else - p = (volatile unsigned short *)port2adr(port); + p = (volatile u16 *)port2adr(port); while (count--) - *((__u16 *) addr)++ = *p; + *buf++ = *p; } -void landisk_insl(unsigned long port, void *addr, unsigned long count) +void landisk_insl(unsigned long port, void *dst, unsigned long count) { + u32 *buf = dst; + if (CHECK_SH7751_PCIIO(port)) { - volatile __u32 *p = (__u32 *) PCI_IOMAP(port); + volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); - while (count--) - *((__u32 *) addr)++ = *p; + while (count--) + *buf++ = *p; } else - maybebadio(insl, port); + maybebadio(port); } -void landisk_outsb(unsigned long port, const void *addr, unsigned long count) +void landisk_outsb(unsigned long port, const void *src, unsigned long count) { + volatile u16 *p; + const u8 *buf = src; + if (PXSEG(port)) - while (count--) - *(volatile unsigned char *)port = - *((unsigned char *)addr)++; + while (count--) + ctrl_outb(*buf++, port); else if (CHECK_SH7751_PCIIO(port)) { - volatile __u8 *bp = (__u8 *) PCI_IOMAP(port); + volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); - while (count--) - *bp = *((volatile unsigned char *)addr)++; + while (count--) + *bp = *buf++; } else { - volatile __u16 *p = (volatile unsigned short *)port2adr(port); - - while (count--) - *p = *((unsigned char *)addr)++; + p = (volatile u16 *)port2adr(port); + while (count--) + *p = *buf++; } } -void landisk_outsw(unsigned long port, const void *addr, unsigned long count) +void landisk_outsw(unsigned long port, const void *src, unsigned long count) { - volatile __u16 *p; + volatile u16 *p; + const u16 *buf = src; if (PXSEG(port)) - p = (volatile unsigned short *)port; + p = (volatile u16 *)port; else if (CHECK_SH7751_PCIIO(port)) - p = (volatile unsigned short *)PCI_IOMAP(port); + p = (volatile u16 *)PCI_IOMAP(port); else - p = (volatile unsigned short *)port2adr(port); - while (count--) - *p = *((__u16 *) addr)++; -} + p = (volatile u16 *)port2adr(port); -void landisk_outsl(unsigned long port, const void *addr, unsigned long count) -{ - if (CHECK_SH7751_PCIIO(port)) { - volatile __u32 *p = (__u32 *) PCI_IOMAP(port); - - while (count--) - *p = *((__u32 *) addr)++; - } else - maybebadio(outsl, port); + while (count--) + *p = *buf++; } -/* For read/write calls, just copy generic (pass-thru); PCIMBR is */ -/* already set up. For a larger memory space, these would need to */ -/* reset PCIMBR as needed on a per-call basis... */ - -unsigned char landisk_readb(unsigned long addr) +void landisk_outsl(unsigned long port, const void *src, unsigned long count) { - return *(volatile unsigned char *)addr; -} + const u32 *buf = src; -unsigned short landisk_readw(unsigned long addr) -{ - return *(volatile unsigned short *)addr; -} - -unsigned int landisk_readl(unsigned long addr) -{ - return *(volatile unsigned long *)addr; -} - -void landisk_writeb(unsigned char b, unsigned long addr) -{ - *(volatile unsigned char *)addr = b; -} - -void landisk_writew(unsigned short b, unsigned long addr) -{ - *(volatile unsigned short *)addr = b; -} - -void landisk_writel(unsigned int b, unsigned long addr) -{ - *(volatile unsigned long *)addr = b; -} + if (CHECK_SH7751_PCIIO(port)) { + volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); -void *landisk_ioremap(unsigned long offset, unsigned long size) -{ - if (offset >= 0xfd000000) - return (void *)offset; - else - return (void *)P2SEGADDR(offset); + while (count--) + *p = *buf++; + } else + maybebadio(port); } -void landisk_iounmap(void *addr) +void __iomem *landisk_ioport_map(unsigned long port, unsigned int size) { -} + if (PXSEG(port)) + return (void __iomem *)port; + else if (CHECK_SH7751_PCIIO(port)) + return (void __iomem *)PCI_IOMAP(port); -/* Map ISA bus address to the real address. Only for PCMCIA. */ - -unsigned long landisk_isa_port2addr(unsigned long offset) -{ - return port2adr(offset); + return (void __iomem *)port2adr(port); } diff --git a/arch/sh/boards/landisk/setup.c b/arch/sh/boards/landisk/setup.c index 0c60eaa10ba7..3a795cfb1eda 100644 --- a/arch/sh/boards/landisk/setup.c +++ b/arch/sh/boards/landisk/setup.c @@ -1,157 +1,52 @@ /* * arch/sh/boards/landisk/setup.c * + * Copyright (C) 2000 Kazumoto Kojima * Copyright (C) 2002 Paul Mundt * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Setup code for an unknown machine (internal peripherials only) - */ -/* - * linux/arch/sh/kernel/setup_landisk.c - * - * Copyright (C) 2000 Kazumoto Kojima - * * I-O DATA Device, Inc. LANDISK Support. * * Modified for LANDISK by * Atom Create Engineering Co., Ltd. 2002. - */ -/* + * * modifed by kogiidena * 2005.09.16 + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ - #include #include -#include #include - -#include -#include -#include - +#include #include #include -#include -#include #include -#include - -#include -#include +#include -extern void (*board_time_init) (void); void landisk_time_init(void); -extern void init_landisk_IRQ(void); +void init_landisk_IRQ(void); int landisk_ledparam; int landisk_buzzerparam; int landisk_arch; -/* defined in mm/ioremap.c */ -extern void *p3_ioremap(unsigned long phys_addr, unsigned long size, - unsigned long flags); - -/* - * Initialize the board - */ - -const char *get_system_type(void) -{ - return "LANDISK"; -} - -static void landisk_power_off(void) -{ - ctrl_outb(0x01, PA_SHUTDOWN); -} - -void check_usl5p(void) -{ - volatile unsigned char *p = (volatile unsigned char *)PA_LED; - unsigned char tmp1, tmp2; - tmp1 = *p; - *p = 0x40; - tmp2 = *p; - *p = tmp1; - landisk_arch = (tmp2 == 0x40) ? 1 : 0; - if (landisk_arch == 1) { /* arch == usl-5p */ - landisk_ledparam = 0x00000380; - landisk_ledparam |= (tmp1 & 0x07c); - } else { /* arch == landisk */ - landisk_ledparam = 0x02000180; - landisk_ledparam |= 0x04; - } - return; -} - -void __init platform_setup(void) -{ - - landisk_buzzerparam = 0; - check_usl5p(); - - printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n"); - board_time_init = landisk_time_init; - pm_power_off = landisk_power_off; - -} - -void *area5_io_base; -void *area6_io_base; - -int __init cf_init(void) -{ - pgprot_t prot; - unsigned long paddrbase, psize; - - /* open I/O area window */ - paddrbase = virt_to_phys((void *)PA_AREA5_IO); - psize = PAGE_SIZE; - prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16); - area5_io_base = p3_ioremap(paddrbase, psize, prot.pgprot); - if (!area5_io_base) { - printk("allocate_cf_area : can't open CF I/O window!\n"); - return -ENOMEM; - } - - paddrbase = virt_to_phys((void *)PA_AREA6_IO); - psize = PAGE_SIZE; - prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16); - area6_io_base = p3_ioremap(paddrbase, psize, prot.pgprot); - if (!area6_io_base) { - printk("allocate_cf_area : can't open HDD I/O window!\n"); - return -ENOMEM; - } - - printk(KERN_INFO "Allocate Area5/6 success.\n"); - - /* XXX : do we need attribute and common-memory area also? */ - - return 0; -} - -__initcall(cf_init); - -#include - -/* Cycle the LED's in the clasic knightrider/Sun pattern */ - -void heartbeat_landisk(void) +/* cycle the led's in the clasic knightrider/sun pattern */ +static void heartbeat_landisk(void) { static unsigned int cnt = 0, blink = 0x00, period = 25; - volatile unsigned char *p = (volatile unsigned char *)PA_LED; + volatile u8 *p = (volatile u8 *)PA_LED; char data; - if ((landisk_ledparam & 0x080) == 0) { + if ((landisk_ledparam & 0x080) == 0) return; - } + cnt += 1; - if (cnt < period) { + + if (cnt < period) return; - } + cnt = 0; blink++; @@ -167,17 +62,16 @@ void heartbeat_landisk(void) } *p = data; - if (((landisk_ledparam & 0x007f7f00) == 0) - && (landisk_buzzerparam == 0)) { + if (((landisk_ledparam & 0x007f7f00) == 0) && + (landisk_buzzerparam == 0)) landisk_ledparam &= (~0x0080); - } + landisk_buzzerparam >>= 1; } /* * The Machine Vector */ - struct sh_machine_vector mv_landisk __initmv = { .mv_nr_irqs = 72, .mv_inb = landisk_inb, @@ -198,21 +92,88 @@ struct sh_machine_vector mv_landisk __initmv = { .mv_outsb = landisk_outsb, .mv_outsw = landisk_outsw, .mv_outsl = landisk_outsl, - .mv_readb = landisk_readb, - .mv_readw = landisk_readw, - .mv_readl = landisk_readl, - .mv_writeb = landisk_writeb, - .mv_writew = landisk_writew, - .mv_writel = landisk_writel, - .mv_ioremap = landisk_ioremap, - .mv_iounmap = landisk_iounmap, - .mv_isa_port2addr = landisk_isa_port2addr, + .mv_ioport_map = landisk_ioport_map, .mv_init_irq = init_landisk_IRQ, - #ifdef CONFIG_HEARTBEAT .mv_heartbeat = heartbeat_landisk, #endif - }; - ALIAS_MV(landisk) + +const char *get_system_type(void) +{ + return "LANDISK"; +} + +static void landisk_power_off(void) +{ + ctrl_outb(0x01, PA_SHUTDOWN); +} + +static void check_usl5p(void) +{ + volatile u8 *p = (volatile u8 *)PA_LED; + u8 tmp1, tmp2; + + tmp1 = *p; + *p = 0x40; + tmp2 = *p; + *p = tmp1; + + landisk_arch = (tmp2 == 0x40); + if (landisk_arch == 1) { + /* arch == usl-5p */ + landisk_ledparam = 0x00000380; + landisk_ledparam |= (tmp1 & 0x07c); + } else { + /* arch == landisk */ + landisk_ledparam = 0x02000180; + landisk_ledparam |= 0x04; + } +} + +void __init platform_setup(void) +{ + landisk_buzzerparam = 0; + check_usl5p(); + + printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n"); + board_time_init = landisk_time_init; + pm_power_off = landisk_power_off; +} + +void *area5_io_base; +void *area6_io_base; + +static int __init landisk_cf_init(void) +{ + pgprot_t prot; + unsigned long paddrbase, psize; + + /* open I/O area window */ + paddrbase = virt_to_phys((void *)PA_AREA5_IO); + psize = PAGE_SIZE; + prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16); + area5_io_base = p3_ioremap(paddrbase, psize, prot.pgprot); + if (!area5_io_base) { + printk("allocate_cf_area : can't open CF I/O window!\n"); + return -ENOMEM; + } + + paddrbase = virt_to_phys((void *)PA_AREA6_IO); + psize = PAGE_SIZE; + prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16); + area6_io_base = p3_ioremap(paddrbase, psize, prot.pgprot); + if (!area6_io_base) { + printk("allocate_cf_area : can't open HDD I/O window!\n"); + return -ENOMEM; + } + + printk(KERN_INFO "Allocate Area5/6 success.\n"); + + /* XXX : do we need attribute and common-memory area also? */ + + return 0; +} + +__initcall(landisk_cf_init); diff --git a/arch/sh/boards/renesas/hs7751rvoip/io.c b/arch/sh/boards/renesas/hs7751rvoip/io.c index 09fb77ffb835..edecf107fc13 100644 --- a/arch/sh/boards/renesas/hs7751rvoip/io.c +++ b/arch/sh/boards/renesas/hs7751rvoip/io.c @@ -294,15 +294,6 @@ void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count maybebadio(outsl, port); } -void *hs7751rvoip_ioremap(unsigned long offset, unsigned long size) -{ - if (offset >= 0xfd000000) - return (void *)offset; - else - return (void *)P2SEGADDR(offset); -} -EXPORT_SYMBOL(hs7751rvoip_ioremap); - unsigned long hs7751rvoip_isa_port2addr(unsigned long offset) { return port2adr(offset); diff --git a/arch/sh/boards/renesas/hs7751rvoip/setup.c b/arch/sh/boards/renesas/hs7751rvoip/setup.c index 813fc4d5862a..aa51bda931f6 100644 --- a/arch/sh/boards/renesas/hs7751rvoip/setup.c +++ b/arch/sh/boards/renesas/hs7751rvoip/setup.c @@ -60,7 +60,6 @@ struct sh_machine_vector mv_hs7751rvoip __initmv = { .mv_outsw = hs7751rvoip_outsw, .mv_outsl = hs7751rvoip_outsl, - .mv_ioremap = hs7751rvoip_ioremap, .mv_isa_port2addr = hs7751rvoip_isa_port2addr, .mv_init_irq = hs7751rvoip_init_irq, }; diff --git a/arch/sh/boards/renesas/rts7751r2d/io.c b/arch/sh/boards/renesas/rts7751r2d/io.c index 9e7fa726a86d..8dc2a2e2e5df 100644 --- a/arch/sh/boards/renesas/rts7751r2d/io.c +++ b/arch/sh/boards/renesas/rts7751r2d/io.c @@ -321,15 +321,6 @@ void rts7751r2d_outsl(unsigned long port, const void *addr, unsigned long count) maybebadio(port); } -void *rts7751r2d_ioremap(unsigned long offset, unsigned long size) -{ - if (offset >= 0xfd000000) - return (void *)offset; - else - return (void *)P2SEGADDR(offset); -} -EXPORT_SYMBOL(rts7751r2d_ioremap); - unsigned long rts7751r2d_isa_port2addr(unsigned long offset) { return port2adr(offset); diff --git a/arch/sh/boards/renesas/rts7751r2d/mach.c b/arch/sh/boards/renesas/rts7751r2d/mach.c index 175a93d726e8..fe3e8735e9f8 100644 --- a/arch/sh/boards/renesas/rts7751r2d/mach.c +++ b/arch/sh/boards/renesas/rts7751r2d/mach.c @@ -19,7 +19,6 @@ extern void heartbeat_rts7751r2d(void); extern void init_rts7751r2d_IRQ(void); -extern void *rts7751r2d_ioremap(unsigned long, unsigned long); extern int rts7751r2d_irq_demux(int irq); extern void *voyagergx_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t); @@ -53,7 +52,6 @@ struct sh_machine_vector mv_rts7751r2d __initmv = { .mv_outsw = rts7751r2d_outsw, .mv_outsl = rts7751r2d_outsl, - .mv_ioremap = rts7751r2d_ioremap, .mv_init_irq = init_rts7751r2d_IRQ, #ifdef CONFIG_HEARTBEAT .mv_heartbeat = heartbeat_rts7751r2d, diff --git a/arch/sh/boards/titan/io.c b/arch/sh/boards/titan/io.c index d66900c99a11..b886fd233a66 100644 --- a/arch/sh/boards/titan/io.c +++ b/arch/sh/boards/titan/io.c @@ -138,19 +138,12 @@ void titan_outsl(unsigned long port, const void *src, unsigned long count) maybebadio(port); } -void *titan_ioremap(unsigned long offset, unsigned long size) { - if (CHECK_SH7751_PCIIO(offset) || CHECK_SH7751_PCIMEMIO(offset)) - return (void *)offset; -} - void __iomem *titan_ioport_map(unsigned long port, unsigned int size) { - if (PXSEG(port)) + if (PXSEG(port) || CHECK_SH7751_PCIMEMIO(port)) return (void __iomem *)port; else if (CHECK_SH7751_PCIIO(port)) return (void __iomem *)PCI_IOMAP(port); return (void __iomem *)port2adr(port); } - -EXPORT_SYMBOL(titan_ioremap); diff --git a/arch/sh/boards/titan/setup.c b/arch/sh/boards/titan/setup.c index 6ac5c8d7b3fb..c8b431c1d0fd 100644 --- a/arch/sh/boards/titan/setup.c +++ b/arch/sh/boards/titan/setup.c @@ -51,7 +51,6 @@ struct sh_machine_vector mv_titan __initmv = { .mv_insl = titan_insl, .mv_outsl = titan_outsl, - .mv_ioremap = titan_ioremap, .mv_ioport_map = titan_ioport_map, .mv_init_irq = init_titan_irq, diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c index 1f5e23e8b163..285dffd12bd8 100644 --- a/arch/sh/drivers/pci/pci.c +++ b/arch/sh/drivers/pci/pci.c @@ -2,7 +2,7 @@ * arch/sh/drivers/pci/pci.c * * Copyright (c) 2002 M. R. Brown - * Copyright (c) 2004, 2005 Paul Mundt + * Copyright (c) 2004 - 2006 Paul Mundt * * These functions are collected here to reduce duplication of common * code amongst the many platform-specific PCI support code files. @@ -172,10 +172,23 @@ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) return NULL; if (maxlen && len > maxlen) len = maxlen; - if (flags & IORESOURCE_IO) + + /* + * Presently the IORESOURCE_MEM case is a bit special, most + * SH7751 style PCI controllers have PCI memory at a fixed + * location in the address space where no remapping is desired + * (traditionally at 0xfd000000). Once this changes, the + * IORESOURCE_MEM case will have to switch to using ioremap() and + * more care will have to be taken to inhibit page table mapping + * for legacy cores. + * + * For now everything wraps to ioport_map(), since boards that + * have PCI will be able to check the address range properly on + * their own. + * -- PFM. + */ + if (flags & (IORESOURCE_IO | IORESOURCE_MEM)) return ioport_map(start, len); - if (flags & IORESOURCE_MEM) - return ioremap(start, len); return NULL; } diff --git a/arch/sh/kernel/cf-enabler.c b/arch/sh/kernel/cf-enabler.c index f1f9ab87f0b0..c9b823d1d073 100644 --- a/arch/sh/kernel/cf-enabler.c +++ b/arch/sh/kernel/cf-enabler.c @@ -41,9 +41,6 @@ #define slot_no 1 #endif -/* defined in mm/ioremap.c */ -extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags); - /* use this pointer to access to directly connected compact flash io area*/ void *cf_io_base; @@ -62,7 +59,7 @@ static int __init allocate_cf_area(void) return -ENOMEM; } /* printk("p3_ioremap(paddr=0x%08lx, psize=0x%08lx, prot=0x%08lx)=0x%08lx\n", - paddrbase, psize, prot.pgprot, cf_io_base);*/ + paddrbase, psize, prot.pgprot, cf_io_base);*/ /* XXX : do we need attribute and common-memory area also? */ diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms.c index 8a6dd06fd071..b73feafcd06e 100644 --- a/arch/sh/kernel/sh_ksyms.c +++ b/arch/sh/kernel/sh_ksyms.c @@ -27,7 +27,6 @@ EXPORT_SYMBOL(sh_mv); /* platform dependent support */ EXPORT_SYMBOL(dump_fpu); -EXPORT_SYMBOL(iounmap); EXPORT_SYMBOL(enable_irq); EXPORT_SYMBOL(disable_irq); EXPORT_SYMBOL(probe_irq_mask); diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile index d90906367c5f..87a7c07265c0 100644 --- a/arch/sh/mm/Makefile +++ b/arch/sh/mm/Makefile @@ -12,13 +12,14 @@ obj-$(CONFIG_DMA_PAGE_OPS) += pg-dma.o obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o mmu-y := fault-nommu.o tlb-nommu.o pg-nommu.o -mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o tlb-flush.o +mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o tlb-flush.o \ + ioremap.o obj-y += $(mmu-y) ifdef CONFIG_MMU -obj-$(CONFIG_CPU_SH3) += tlb-sh3.o -obj-$(CONFIG_CPU_SH4) += tlb-sh4.o ioremap.o +obj-$(CONFIG_CPU_SH3) += tlb-sh3.o +obj-$(CONFIG_CPU_SH4) += tlb-sh4.o obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o endif diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c index ff5bde745647..819fd0faf022 100644 --- a/arch/sh/mm/pmb.c +++ b/arch/sh/mm/pmb.c @@ -3,7 +3,7 @@ * * Privileged Space Mapping Buffer (PMB) Support. * - * Copyright (C) 2005 Paul Mundt + * Copyright (C) 2005, 2006 Paul Mundt * * P1/P2 Section mapping definitions from map32.h, which was: * @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -127,11 +128,15 @@ repeat: return 0; } -void set_pmb_entry(struct pmb_entry *pmbe) +int set_pmb_entry(struct pmb_entry *pmbe) { + int ret; + jump_to_P2(); - __set_pmb_entry(pmbe->vpn, pmbe->ppn, pmbe->flags, &pmbe->entry); + ret = __set_pmb_entry(pmbe->vpn, pmbe->ppn, pmbe->flags, &pmbe->entry); back_to_P1(); + + return ret; } void clear_pmb_entry(struct pmb_entry *pmbe) @@ -162,11 +167,141 @@ void clear_pmb_entry(struct pmb_entry *pmbe) clear_bit(entry, &pmb_map); } +static DEFINE_SPINLOCK(pmb_list_lock); +static struct pmb_entry *pmb_list; + +static inline void pmb_list_add(struct pmb_entry *pmbe) +{ + struct pmb_entry **p, *tmp; + + p = &pmb_list; + while ((tmp = *p) != NULL) + p = &tmp->next; + + pmbe->next = tmp; + *p = pmbe; +} + +static inline void pmb_list_del(struct pmb_entry *pmbe) +{ + struct pmb_entry **p, *tmp; + + for (p = &pmb_list; (tmp = *p); p = &tmp->next) + if (tmp == pmbe) { + *p = tmp->next; + return; + } +} + +static struct { + unsigned long size; + int flag; +} pmb_sizes[] = { + { .size = 0x20000000, .flag = PMB_SZ_512M, }, + { .size = 0x08000000, .flag = PMB_SZ_128M, }, + { .size = 0x04000000, .flag = PMB_SZ_64M, }, + { .size = 0x01000000, .flag = PMB_SZ_16M, }, +}; + +long pmb_remap(unsigned long vaddr, unsigned long phys, + unsigned long size, unsigned long flags) +{ + struct pmb_entry *pmbp; + unsigned long wanted; + int pmb_flags, i; + + /* Convert typical pgprot value to the PMB equivalent */ + if (flags & _PAGE_CACHABLE) { + if (flags & _PAGE_WT) + pmb_flags = PMB_WT; + else + pmb_flags = PMB_C; + } else + pmb_flags = PMB_WT | PMB_UB; + + pmbp = NULL; + wanted = size; + +again: + for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++) { + struct pmb_entry *pmbe; + int ret; + + if (size < pmb_sizes[i].size) + continue; + + pmbe = pmb_alloc(vaddr, phys, pmb_flags | pmb_sizes[i].flag); + if (IS_ERR(pmbe)) + return PTR_ERR(pmbe); + + ret = set_pmb_entry(pmbe); + if (ret != 0) { + pmb_free(pmbe); + return -EBUSY; + } + + phys += pmb_sizes[i].size; + vaddr += pmb_sizes[i].size; + size -= pmb_sizes[i].size; + + /* + * Link adjacent entries that span multiple PMB entries + * for easier tear-down. + */ + if (likely(pmbp)) + pmbp->link = pmbe; + + pmbp = pmbe; + } + + if (size >= 0x1000000) + goto again; + + return wanted - size; +} + +void pmb_unmap(unsigned long addr) +{ + struct pmb_entry **p, *pmbe; + + for (p = &pmb_list; (pmbe = *p); p = &pmbe->next) + if (pmbe->vpn == addr) + break; + + if (unlikely(!pmbe)) + return; + + WARN_ON(!test_bit(pmbe->entry, &pmb_map)); + + do { + struct pmb_entry *pmblink = pmbe; + + clear_pmb_entry(pmbe); + pmbe = pmblink->link; + + pmb_free(pmblink); + } while (pmbe); +} + static void pmb_cache_ctor(void *pmb, kmem_cache_t *cachep, unsigned long flags) { + struct pmb_entry *pmbe = pmb; + memset(pmb, 0, sizeof(struct pmb_entry)); - ((struct pmb_entry *)pmb)->entry = PMB_NO_ENTRY; + spin_lock_irq(&pmb_list_lock); + + pmbe->entry = PMB_NO_ENTRY; + pmb_list_add(pmbe); + + spin_unlock_irq(&pmb_list_lock); +} + +static void pmb_cache_dtor(void *pmb, kmem_cache_t *cachep, unsigned long flags) +{ + spin_lock_irq(&pmb_list_lock); + pmb_list_del(pmb); + spin_unlock_irq(&pmb_list_lock); } static int __init pmb_init(void) @@ -177,7 +312,7 @@ static int __init pmb_init(void) BUG_ON(unlikely(nr_entries >= NR_PMB_ENTRIES)); pmb_cache = kmem_cache_create("pmb", sizeof(struct pmb_entry), - 0, 0, pmb_cache_ctor, NULL); + 0, 0, pmb_cache_ctor, pmb_cache_dtor); BUG_ON(!pmb_cache); jump_to_P2(); diff --git a/include/asm-sh/landisk/iodata_landisk.h b/include/asm-sh/landisk/iodata_landisk.h index 7189d3a36384..9db3cdfe6776 100644 --- a/include/asm-sh/landisk/iodata_landisk.h +++ b/include/asm-sh/landisk/iodata_landisk.h @@ -74,5 +74,8 @@ extern int landisk_ledparam; /* from setup.c */ extern int landisk_buzzerparam; /* from setup.c */ extern int landisk_arch; /* from setup.c */ +#define __IO_PREFIX landisk +#include + #endif /* __ASM_SH_IODATA_LANDISK_H */ diff --git a/include/asm-sh/mmu.h b/include/asm-sh/mmu.h index 91c884634276..ec09589fa6ca 100644 --- a/include/asm-sh/mmu.h +++ b/include/asm-sh/mmu.h @@ -50,6 +50,8 @@ typedef unsigned long mm_context_t; #define PMB_NO_ENTRY (-1) +struct pmb_entry; + struct pmb_entry { unsigned long vpn; unsigned long ppn; @@ -60,16 +62,23 @@ struct pmb_entry { * PMB_NO_ENTRY to search for a free one */ int entry; + + struct pmb_entry *next; + /* Adjacent entry link for contiguous multi-entry mappings */ + struct pmb_entry *link; }; /* arch/sh/mm/pmb.c */ int __set_pmb_entry(unsigned long vpn, unsigned long ppn, unsigned long flags, int *entry); -void set_pmb_entry(struct pmb_entry *pmbe); +int set_pmb_entry(struct pmb_entry *pmbe); void clear_pmb_entry(struct pmb_entry *pmbe); struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn, unsigned long flags); void pmb_free(struct pmb_entry *pmbe); +long pmb_remap(unsigned long virt, unsigned long phys, + unsigned long size, unsigned long flags); +void pmb_unmap(unsigned long addr); #endif /* __MMU_H */ -- cgit v1.2.3 From 373e68b5472d421cbd2703e7a77caf053f78c005 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:41:24 +0900 Subject: sh: Board updates for I/O routine rework. This updates the various boards for some of the recent I/O routine updates. Signed-off-by: Paul Mundt --- arch/sh/Makefile | 3 - arch/sh/boards/renesas/hs7751rvoip/io.c | 159 +++++++++++++++++------------ arch/sh/boards/renesas/hs7751rvoip/setup.c | 5 +- arch/sh/boards/renesas/systemh/io.c | 96 ++--------------- arch/sh/boards/renesas/systemh/irq.c | 2 +- arch/sh/boards/renesas/systemh/setup.c | 14 +-- arch/sh/boards/se/7300/io.c | 8 +- arch/sh/boards/se/7300/irq.c | 2 +- arch/sh/boards/se/7300/led.c | 18 +--- arch/sh/boards/se/7300/setup.c | 3 +- arch/sh/boards/se/73180/setup.c | 3 +- arch/sh/boards/se/770x/io.c | 52 ++-------- arch/sh/boards/se/770x/irq.c | 2 +- arch/sh/boards/se/770x/led.c | 2 +- arch/sh/boards/se/770x/mach.c | 7 +- arch/sh/boards/se/770x/setup.c | 2 +- arch/sh/boards/se/7751/io.c | 26 ++--- arch/sh/boards/se/7751/irq.c | 2 +- arch/sh/boards/se/7751/led.c | 3 +- arch/sh/boards/se/7751/mach.c | 8 +- arch/sh/boards/se/7751/setup.c | 6 +- arch/sh/boards/sh03/setup.c | 25 ++--- arch/sh/boards/snapgear/io.c | 63 ++---------- arch/sh/boards/snapgear/rtc.c | 3 - arch/sh/boards/snapgear/setup.c | 97 +----------------- arch/sh/boards/titan/io.c | 4 +- arch/sh/cchips/Kconfig | 6 +- arch/sh/kernel/cf-enabler.c | 7 +- drivers/net/stnic.c | 2 +- include/asm-sh/hs7751rvoip/hs7751rvoip.h | 3 + include/asm-sh/mc146818rtc.h | 2 +- include/asm-sh/se.h | 80 +++++++++++++++ include/asm-sh/se/io.h | 35 ------- include/asm-sh/se/se.h | 77 -------------- include/asm-sh/se7300.h | 64 ++++++++++++ include/asm-sh/se7300/io.h | 29 ------ include/asm-sh/se7300/se7300.h | 61 ----------- include/asm-sh/se73180.h | 65 ++++++++++++ include/asm-sh/se73180/io.h | 32 ------ include/asm-sh/se73180/se73180.h | 62 ----------- include/asm-sh/se7751.h | 71 +++++++++++++ include/asm-sh/se7751/io.h | 42 -------- include/asm-sh/se7751/se7751.h | 68 ------------ include/asm-sh/sh03/io.h | 10 +- include/asm-sh/snapgear.h | 79 ++++++++++++++ include/asm-sh/snapgear/io.h | 92 ----------------- include/asm-sh/systemh/7751systemh.h | 68 ------------ include/asm-sh/systemh/io.h | 43 -------- include/asm-sh/systemh7751.h | 71 +++++++++++++ 49 files changed, 607 insertions(+), 1077 deletions(-) create mode 100644 include/asm-sh/se.h delete mode 100644 include/asm-sh/se/io.h delete mode 100644 include/asm-sh/se/se.h create mode 100644 include/asm-sh/se7300.h delete mode 100644 include/asm-sh/se7300/io.h delete mode 100644 include/asm-sh/se7300/se7300.h create mode 100644 include/asm-sh/se73180.h delete mode 100644 include/asm-sh/se73180/io.h delete mode 100644 include/asm-sh/se73180/se73180.h create mode 100644 include/asm-sh/se7751.h delete mode 100644 include/asm-sh/se7751/io.h delete mode 100644 include/asm-sh/se7751/se7751.h create mode 100644 include/asm-sh/snapgear.h delete mode 100644 include/asm-sh/snapgear/io.h delete mode 100644 include/asm-sh/systemh/7751systemh.h delete mode 100644 include/asm-sh/systemh/io.h create mode 100644 include/asm-sh/systemh7751.h (limited to 'arch/sh/kernel') diff --git a/arch/sh/Makefile b/arch/sh/Makefile index 55dcba2c06fc..65676c33822e 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -111,10 +111,7 @@ machdir-$(CONFIG_SH_UNKNOWN) := unknown incdir-y := $(notdir $(machdir-y)) -incdir-$(CONFIG_SH_SOLUTION_ENGINE) := se incdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se7751 -incdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se7300 -incdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se73180 incdir-$(CONFIG_SH_HP6XX) := hp6xx ifneq ($(machdir-y),) diff --git a/arch/sh/boards/renesas/hs7751rvoip/io.c b/arch/sh/boards/renesas/hs7751rvoip/io.c index edecf107fc13..ecdce7ef6a34 100644 --- a/arch/sh/boards/renesas/hs7751rvoip/io.c +++ b/arch/sh/boards/renesas/hs7751rvoip/io.c @@ -21,10 +21,8 @@ #include #include "../../../drivers/pci/pci-sh7751.h" -extern void *area5_io8_base; /* Area 5 8bit I/O Base address */ extern void *area6_io8_base; /* Area 6 8bit I/O Base address */ extern void *area5_io16_base; /* Area 5 16bit I/O Base address */ -extern void *area6_io16_base; /* Area 6 16bit I/O Base address */ /* * The 7751R HS7751RVoIP uses the built-in PCI controller (PCIC) @@ -37,16 +35,10 @@ extern void *area6_io16_base; /* Area 6 16bit I/O Base address */ #define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) #define PCI_IO_AREA SH7751_PCI_IO_BASE #define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE - #define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) -#if defined(CONFIG_HS7751RVOIP_CODEC) #define CODEC_IO_BASE 0x1000 -#endif - -#define maybebadio(name,port) \ - printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \ - #name, (port), (__u32) __builtin_return_address(0)) +#define CODEC_IOMAP(a) ((unsigned long)area6_io8_base + ((a) - CODEC_IO_BASE)) static inline void delay(void) { @@ -61,7 +53,7 @@ static inline unsigned long port2adr(unsigned int port) else return ((unsigned long)area5_io16_base + 0x800 + ((port-0x1f0) << 1)); else - maybebadio(port2adr, (unsigned long)port); + maybebadio((unsigned long)port); return port; } @@ -109,15 +101,15 @@ codec_port(unsigned long port) unsigned char hs7751rvoip_inb(unsigned long port) { if (PXSEG(port)) - return *(volatile unsigned char *)port; + return ctrl_inb(port); #if defined(CONFIG_HS7751RVOIP_CODEC) else if (codec_port(port)) - return *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)); + return ctrl_inb(CODEC_IOMAP(port)); #endif else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - return *(volatile unsigned char *)PCI_IOMAP(port); + return ctrl_inb(PCI_IOMAP(port)); else - return (*(volatile unsigned short *)port2adr(port) & 0xff); + return ctrl_inw(port2adr(port)) & 0xff; } unsigned char hs7751rvoip_inb_p(unsigned long port) @@ -125,15 +117,15 @@ unsigned char hs7751rvoip_inb_p(unsigned long port) unsigned char v; if (PXSEG(port)) - v = *(volatile unsigned char *)port; + v = ctrl_inb(port); #if defined(CONFIG_HS7751RVOIP_CODEC) else if (codec_port(port)) - v = *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)); + v = ctrl_inb(CODEC_IOMAP(port)); #endif else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - v = *(volatile unsigned char *)PCI_IOMAP(port); + v = ctrl_inb(PCI_IOMAP(port)); else - v = (*(volatile unsigned short *)port2adr(port) & 0xff); + v = ctrl_inw(port2adr(port)) & 0xff; delay(); return v; } @@ -141,22 +133,22 @@ unsigned char hs7751rvoip_inb_p(unsigned long port) unsigned short hs7751rvoip_inw(unsigned long port) { if (PXSEG(port)) - return *(volatile unsigned short *)port; + return ctrl_inw(port); else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - return *(volatile unsigned short *)PCI_IOMAP(port); + return ctrl_inw(PCI_IOMAP(port)); else - maybebadio(inw, port); + maybebadio(port); return 0; } unsigned int hs7751rvoip_inl(unsigned long port) { if (PXSEG(port)) - return *(volatile unsigned long *)port; + return ctrl_inl(port); else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - return *(volatile unsigned long *)PCI_IOMAP(port); + return ctrl_inl(PCI_IOMAP(port)); else - maybebadio(inl, port); + maybebadio(port); return 0; } @@ -164,137 +156,168 @@ void hs7751rvoip_outb(unsigned char value, unsigned long port) { if (PXSEG(port)) - *(volatile unsigned char *)port = value; + ctrl_outb(value, port); #if defined(CONFIG_HS7751RVOIP_CODEC) else if (codec_port(port)) - *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = value; + ctrl_outb(value, CODEC_IOMAP(port)); #endif else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - *(unsigned char *)PCI_IOMAP(port) = value; + ctrl_outb(value, PCI_IOMAP(port)); else - *(volatile unsigned short *)port2adr(port) = value; + ctrl_outb(value, port2adr(port)); } void hs7751rvoip_outb_p(unsigned char value, unsigned long port) { if (PXSEG(port)) - *(volatile unsigned char *)port = value; + ctrl_outb(value, port); #if defined(CONFIG_HS7751RVOIP_CODEC) else if (codec_port(port)) - *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = value; + ctrl_outb(value, CODEC_IOMAP(port)); #endif else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - *(unsigned char *)PCI_IOMAP(port) = value; + ctrl_outb(value, PCI_IOMAP(port)); else - *(volatile unsigned short *)port2adr(port) = value; + ctrl_outw(value, port2adr(port)); + delay(); } void hs7751rvoip_outw(unsigned short value, unsigned long port) { if (PXSEG(port)) - *(volatile unsigned short *)port = value; + ctrl_outw(value, port); else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - *(unsigned short *)PCI_IOMAP(port) = value; + ctrl_outw(value, PCI_IOMAP(port)); else - maybebadio(outw, port); + maybebadio(port); } void hs7751rvoip_outl(unsigned int value, unsigned long port) { if (PXSEG(port)) - *(volatile unsigned long *)port = value; + ctrl_outl(value, port); else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - *((unsigned long *)PCI_IOMAP(port)) = value; + ctrl_outl(value, PCI_IOMAP(port)); else - maybebadio(outl, port); + maybebadio(port); } void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count) { + u8 *buf = addr; + if (PXSEG(port)) - while (count--) *((unsigned char *) addr)++ = *(volatile unsigned char *)port; + while (count--) + *buf++ = ctrl_inb(port); #if defined(CONFIG_HS7751RVOIP_CODEC) else if (codec_port(port)) - while (count--) *((unsigned char *) addr)++ = *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)); + while (count--) + *buf++ = ctrl_inb(CODEC_IOMAP(port)); #endif else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { - volatile __u8 *bp = (__u8 *)PCI_IOMAP(port); + volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); - while (count--) *((volatile unsigned char *) addr)++ = *bp; + while (count--) + *buf++ = *bp; } else { - volatile __u16 *p = (volatile unsigned short *)port2adr(port); + volatile u16 *p = (volatile u16 *)port2adr(port); - while (count--) *((unsigned char *) addr)++ = *p & 0xff; + while (count--) + *buf++ = *p & 0xff; } } void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count) { - volatile __u16 *p; + volatile u16 *p; + u16 *buf = addr; if (PXSEG(port)) - p = (volatile unsigned short *)port; + p = (volatile u16 *)port; else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - p = (volatile unsigned short *)PCI_IOMAP(port); + p = (volatile u16 *)PCI_IOMAP(port); else - p = (volatile unsigned short *)port2adr(port); - while (count--) *((__u16 *) addr)++ = *p; + p = (volatile u16 *)port2adr(port); + while (count--) + *buf++ = *p; } void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count) { + if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { - volatile __u32 *p = (__u32 *)PCI_IOMAP(port); + volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); + u32 *buf = addr; - while (count--) *((__u32 *) addr)++ = *p; + while (count--) + *buf++ = *p; } else - maybebadio(insl, port); + maybebadio(port); } void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count) { + const u8 *buf = addr; + if (PXSEG(port)) - while (count--) *(volatile unsigned char *)port = *((unsigned char *) addr)++; + while (count--) + ctrl_outb(*buf++, port); #if defined(CONFIG_HS7751RVOIP_CODEC) else if (codec_port(port)) - while (count--) *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = *((unsigned char *) addr)++; + while (count--) + ctrl_outb(*buf++, CODEC_IOMAP(port)); #endif else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { - volatile __u8 *bp = (__u8 *)PCI_IOMAP(port); + volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); - while (count--) *bp = *((volatile unsigned char *) addr)++; + while (count--) + *bp = *buf++; } else { - volatile __u16 *p = (volatile unsigned short *)port2adr(port); + volatile u16 *p = (volatile u16 *)port2adr(port); - while (count--) *p = *((unsigned char *) addr)++; + while (count--) + *p = *buf++; } } void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count) { - volatile __u16 *p; + volatile u16 *p; + const u16 *buf = addr; if (PXSEG(port)) - p = (volatile unsigned short *)port; + p = (volatile u16 *)port; else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - p = (volatile unsigned short *)PCI_IOMAP(port); + p = (volatile u16 *)PCI_IOMAP(port); else - p = (volatile unsigned short *)port2adr(port); - while (count--) *p = *((__u16 *) addr)++; + p = (volatile u16 *)port2adr(port); + + while (count--) + *p = *buf++; } void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count) { + const u32 *buf = addr; + if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { - volatile __u32 *p = (__u32 *)PCI_IOMAP(port); + volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); - while (count--) *p = *((__u32 *) addr)++; + while (count--) + *p = *buf++; } else - maybebadio(outsl, port); + maybebadio(port); } -unsigned long hs7751rvoip_isa_port2addr(unsigned long offset) +void __iomem *hs7751rvoip_ioport_map(unsigned long port, unsigned int size) { - return port2adr(offset); + if (PXSEG(port)) + return (void __iomem *)port; + else if (unlikely(codec_port(port) && (size == 1))) + return (void __iomem *)CODEC_IOMAP(port); + else if (CHECK_SH7751_PCIIO(port)) + return (void __iomem *)PCI_IOMAP(port); + + return (void __iomem *)port2adr(port); } diff --git a/arch/sh/boards/renesas/hs7751rvoip/setup.c b/arch/sh/boards/renesas/hs7751rvoip/setup.c index aa51bda931f6..a2cbcc5d530f 100644 --- a/arch/sh/boards/renesas/hs7751rvoip/setup.c +++ b/arch/sh/boards/renesas/hs7751rvoip/setup.c @@ -17,9 +17,8 @@ #include #include #include -#include -#include #include +#include #include #include #include @@ -60,8 +59,8 @@ struct sh_machine_vector mv_hs7751rvoip __initmv = { .mv_outsw = hs7751rvoip_outsw, .mv_outsl = hs7751rvoip_outsl, - .mv_isa_port2addr = hs7751rvoip_isa_port2addr, .mv_init_irq = hs7751rvoip_init_irq, + .mv_ioport_map = hs7751rvoip_ioport_map, }; ALIAS_MV(hs7751rvoip) diff --git a/arch/sh/boards/renesas/systemh/io.c b/arch/sh/boards/renesas/systemh/io.c index 85511576d414..0befd4f9894c 100644 --- a/arch/sh/boards/renesas/systemh/io.c +++ b/arch/sh/boards/renesas/systemh/io.c @@ -10,11 +10,10 @@ #include #include -#include +#include +#include #include #include - -#include #include "../../../drivers/pci/pci-sh7751.h" /* @@ -31,11 +30,6 @@ #define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) #define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area of smc lan chip*/ - -#define maybebadio(name,port) \ - printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \ - #name, (port), (__u32) __builtin_return_address(0)) - static inline void delay(void) { ctrl_inw(0xa0000000); @@ -46,11 +40,7 @@ port2adr(unsigned int port) { if (port >= 0x2000) return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); -#if 0 - else - return (volatile __u16 *) (PA_SUPERIO + (port << 1)); -#endif - maybebadio(name,(unsigned long)port); + maybebadio((unsigned long)port); return (volatile __u16*)port; } @@ -111,7 +101,7 @@ unsigned short sh7751systemh_inw(unsigned long port) else if (port <= 0x3F1) return *(volatile unsigned int *)ETHER_IOMAP(port); else - maybebadio(inw, port); + maybebadio(port); return 0; } @@ -126,7 +116,7 @@ unsigned int sh7751systemh_inl(unsigned long port) else if (port <= 0x3F1) return *(volatile unsigned int *)ETHER_IOMAP(port); else - maybebadio(inl, port); + maybebadio(port); return 0; } @@ -167,7 +157,7 @@ void sh7751systemh_outw(unsigned short value, unsigned long port) else if (port <= 0x3F1) *(volatile unsigned short *)ETHER_IOMAP(port) = value; else - maybebadio(outw, port); + maybebadio(port); } void sh7751systemh_outl(unsigned int value, unsigned long port) @@ -177,7 +167,7 @@ void sh7751systemh_outl(unsigned int value, unsigned long port) else if (CHECK_SH7751_PCIIO(port)) *((unsigned long*)PCI_IOMAP(port)) = value; else - maybebadio(outl, port); + maybebadio(port); } void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count) @@ -194,7 +184,7 @@ void sh7751systemh_insw(unsigned long port, void *addr, unsigned long count) void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count) { - maybebadio(insl, port); + maybebadio(port); } void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count) @@ -211,73 +201,5 @@ void sh7751systemh_outsw(unsigned long port, const void *addr, unsigned long cou void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count) { - maybebadio(outsw, port); -} - -/* For read/write calls, just copy generic (pass-thru); PCIMBR is */ -/* already set up. For a larger memory space, these would need to */ -/* reset PCIMBR as needed on a per-call basis... */ - -unsigned char sh7751systemh_readb(unsigned long addr) -{ - return *(volatile unsigned char*)addr; -} - -unsigned short sh7751systemh_readw(unsigned long addr) -{ - return *(volatile unsigned short*)addr; -} - -unsigned int sh7751systemh_readl(unsigned long addr) -{ - return *(volatile unsigned long*)addr; -} - -void sh7751systemh_writeb(unsigned char b, unsigned long addr) -{ - *(volatile unsigned char*)addr = b; -} - -void sh7751systemh_writew(unsigned short b, unsigned long addr) -{ - *(volatile unsigned short*)addr = b; -} - -void sh7751systemh_writel(unsigned int b, unsigned long addr) -{ - *(volatile unsigned long*)addr = b; -} - - - -/* Map ISA bus address to the real address. Only for PCMCIA. */ - -/* ISA page descriptor. */ -static __u32 sh_isa_memmap[256]; - -#if 0 -static int -sh_isa_mmap(__u32 start, __u32 length, __u32 offset) -{ - int idx; - - if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000)) - return -1; - - idx = start >> 12; - sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff); - printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n", - start, length, offset, idx, sh_isa_memmap[idx]); - return 0; -} -#endif - -unsigned long -sh7751systemh_isa_port2addr(unsigned long offset) -{ - int idx; - - idx = (offset >> 12) & 0xff; - offset &= 0xfff; - return sh_isa_memmap[idx] + offset; + maybebadio(port); } diff --git a/arch/sh/boards/renesas/systemh/irq.c b/arch/sh/boards/renesas/systemh/irq.c index 8372d967f601..53731a0abb8f 100644 --- a/arch/sh/boards/renesas/systemh/irq.c +++ b/arch/sh/boards/renesas/systemh/irq.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include /* address of external interrupt mask register diff --git a/arch/sh/boards/renesas/systemh/setup.c b/arch/sh/boards/renesas/systemh/setup.c index 826fa3d7669c..433c7c3f35e2 100644 --- a/arch/sh/boards/renesas/systemh/setup.c +++ b/arch/sh/boards/renesas/systemh/setup.c @@ -15,9 +15,8 @@ * for more details. */ #include -#include -#include #include +#include extern void make_systemh_irq(unsigned int irq); @@ -31,8 +30,6 @@ const char *get_system_type(void) */ void __init init_7751systemh_IRQ(void) { -/* make_ipr_irq(10, BCR_ILCRD, 1, 0x0f-10); LAN */ -/* make_ipr_irq(14, BCR_ILCRA, 2, 0x0f-4); */ make_systemh_irq(0xb); /* Ethernet interrupt */ } @@ -60,15 +57,6 @@ struct sh_machine_vector mv_7751systemh __initmv = { .mv_outsw = sh7751systemh_outsw, .mv_outsl = sh7751systemh_outsl, - .mv_readb = sh7751systemh_readb, - .mv_readw = sh7751systemh_readw, - .mv_readl = sh7751systemh_readl, - .mv_writeb = sh7751systemh_writeb, - .mv_writew = sh7751systemh_writew, - .mv_writel = sh7751systemh_writel, - - .mv_isa_port2addr = sh7751systemh_isa_port2addr, - .mv_init_irq = init_7751systemh_IRQ, }; ALIAS_MV(7751systemh) diff --git a/arch/sh/boards/se/7300/io.c b/arch/sh/boards/se/7300/io.c index f449a94ddffd..8a03d7a52a7c 100644 --- a/arch/sh/boards/se/7300/io.c +++ b/arch/sh/boards/se/7300/io.c @@ -9,8 +9,8 @@ */ #include -#include #include +#include #define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a) @@ -99,6 +99,7 @@ bad_outb(struct iop *p, unsigned char value, unsigned long port) badio(inw, port); } +#ifdef CONFIG_SMC91X /* MSTLANEX01 LAN at 0xb400:0000 */ static struct iop laniop = { .start = 0x300, @@ -110,6 +111,7 @@ static struct iop laniop = { .outb = simple_outb, .outw = simple_outw, }; +#endif /* NE2000 pc card NIC */ static struct iop neiop = { @@ -123,6 +125,7 @@ static struct iop neiop = { .outw = simple_outw, }; +#ifdef CONFIG_IDE /* CF in CF slot */ static struct iop cfiop = { .base = 0xb0600000, @@ -132,12 +135,13 @@ static struct iop cfiop = { .outb = pcc_outb, .outw = simple_outw, }; +#endif static __inline__ struct iop * port2iop(unsigned long port) { if (0) ; -#if defined(CONFIG_SMC91111) +#if defined(CONFIG_SMC91X) else if (laniop.check(&laniop, port)) return &laniop; #endif diff --git a/arch/sh/boards/se/7300/irq.c b/arch/sh/boards/se/7300/irq.c index 216a78d1a108..ad1034f98a29 100644 --- a/arch/sh/boards/se/7300/irq.c +++ b/arch/sh/boards/se/7300/irq.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include /* * Initialize IRQ setting diff --git a/arch/sh/boards/se/7300/led.c b/arch/sh/boards/se/7300/led.c index ad51f0a9c1e3..4d03bb7774be 100644 --- a/arch/sh/boards/se/7300/led.c +++ b/arch/sh/boards/se/7300/led.c @@ -12,24 +12,10 @@ */ #include -#include - -static void -mach_led(int position, int value) -{ - volatile unsigned short *p = (volatile unsigned short *) PA_LED; - - if (value) { - *p |= (1 << 8); - } else { - *p &= ~(1 << 8); - } -} - +#include /* Cycle the LED's in the clasic Knightrider/Sun pattern */ -void -heartbeat_7300se(void) +void heartbeat_7300se(void) { static unsigned int cnt = 0, period = 0; volatile unsigned short *p = (volatile unsigned short *) PA_LED; diff --git a/arch/sh/boards/se/7300/setup.c b/arch/sh/boards/se/7300/setup.c index ebcd98d4c081..bb7e1a189be8 100644 --- a/arch/sh/boards/se/7300/setup.c +++ b/arch/sh/boards/se/7300/setup.c @@ -9,8 +9,7 @@ #include #include -#include -#include +#include void heartbeat_7300se(void); void init_7300se_IRQ(void); diff --git a/arch/sh/boards/se/73180/setup.c b/arch/sh/boards/se/73180/setup.c index cdb7b5f8d942..cddc7a2b858f 100644 --- a/arch/sh/boards/se/73180/setup.c +++ b/arch/sh/boards/se/73180/setup.c @@ -11,8 +11,7 @@ #include #include -#include -#include +#include void heartbeat_73180se(void); void init_73180se_IRQ(void); diff --git a/arch/sh/boards/se/770x/io.c b/arch/sh/boards/se/770x/io.c index 9a39ee963143..5102201c97ab 100644 --- a/arch/sh/boards/se/770x/io.c +++ b/arch/sh/boards/se/770x/io.c @@ -1,4 +1,4 @@ -/* $Id: io.c,v 1.5 2004/02/22 23:08:43 kkojima Exp $ +/* $Id: io.c,v 1.6 2006/01/04 17:53:54 lethal Exp $ * * linux/arch/sh/kernel/io_se.c * @@ -11,7 +11,7 @@ #include #include #include -#include +#include /* SH pcmcia io window base, start and end. */ int sh_pcic_io_wbase = 0xb8400000; @@ -52,10 +52,6 @@ shifted_port(unsigned long port) return 1; } -#define maybebadio(name,port) \ - printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \ - #name, (port), (__u32) __builtin_return_address(0)) - unsigned char se_inb(unsigned long port) { if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) @@ -86,13 +82,13 @@ unsigned short se_inw(unsigned long port) (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)) return *port2adr(port); else - maybebadio(inw, port); + maybebadio(port); return 0; } unsigned int se_inl(unsigned long port) { - maybebadio(inl, port); + maybebadio(port); return 0; } @@ -123,12 +119,12 @@ void se_outw(unsigned short value, unsigned long port) (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)) *port2adr(port) = value; else - maybebadio(outw, port); + maybebadio(port); } void se_outl(unsigned int value, unsigned long port) { - maybebadio(outl, port); + maybebadio(port); } void se_insb(unsigned long port, void *addr, unsigned long count) @@ -159,7 +155,7 @@ void se_insw(unsigned long port, void *addr, unsigned long count) void se_insl(unsigned long port, void *addr, unsigned long count) { - maybebadio(insl, port); + maybebadio(port); } void se_outsb(unsigned long port, const void *addr, unsigned long count) @@ -190,37 +186,5 @@ void se_outsw(unsigned long port, const void *addr, unsigned long count) void se_outsl(unsigned long port, const void *addr, unsigned long count) { - maybebadio(outsw, port); -} - -/* Map ISA bus address to the real address. Only for PCMCIA. */ - -/* ISA page descriptor. */ -static __u32 sh_isa_memmap[256]; - -static int -sh_isa_mmap(__u32 start, __u32 length, __u32 offset) -{ - int idx; - - if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000)) - return -1; - - idx = start >> 12; - sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff); -#if 0 - printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n", - start, length, offset, idx, sh_isa_memmap[idx]); -#endif - return 0; -} - -unsigned long -se_isa_port2addr(unsigned long offset) -{ - int idx; - - idx = (offset >> 12) & 0xff; - offset &= 0xfff; - return sh_isa_memmap[idx] + offset; + maybebadio(port); } diff --git a/arch/sh/boards/se/770x/irq.c b/arch/sh/boards/se/770x/irq.c index 3e558716ce10..cff6700bbafd 100644 --- a/arch/sh/boards/se/770x/irq.c +++ b/arch/sh/boards/se/770x/irq.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include /* * Initialize IRQ setting diff --git a/arch/sh/boards/se/770x/led.c b/arch/sh/boards/se/770x/led.c index 73e9848387ea..daf7b1ee786a 100644 --- a/arch/sh/boards/se/770x/led.c +++ b/arch/sh/boards/se/770x/led.c @@ -10,7 +10,7 @@ */ #include -#include +#include /* Cycle the LED's in the clasic Knightrider/Sun pattern */ void heartbeat_se(void) diff --git a/arch/sh/boards/se/770x/mach.c b/arch/sh/boards/se/770x/mach.c index 6ec07bd3dcf1..e8968b71c353 100644 --- a/arch/sh/boards/se/770x/mach.c +++ b/arch/sh/boards/se/770x/mach.c @@ -13,12 +13,9 @@ #include #include -#include - -#include +#include void heartbeat_se(void); -void setup_se(void); void init_se_IRQ(void); /* @@ -57,8 +54,6 @@ struct sh_machine_vector mv_se __initmv = { .mv_outsw = se_outsw, .mv_outsl = se_outsl, - .mv_isa_port2addr = se_isa_port2addr, - .mv_init_irq = init_se_IRQ, #ifdef CONFIG_HEARTBEAT .mv_heartbeat = heartbeat_se, diff --git a/arch/sh/boards/se/770x/setup.c b/arch/sh/boards/se/770x/setup.c index b6730ea57502..c9f75272e751 100644 --- a/arch/sh/boards/se/770x/setup.c +++ b/arch/sh/boards/se/770x/setup.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include /* diff --git a/arch/sh/boards/se/7751/io.c b/arch/sh/boards/se/7751/io.c index 99041b269261..0e8a3ba48316 100644 --- a/arch/sh/boards/se/7751/io.c +++ b/arch/sh/boards/se/7751/io.c @@ -1,4 +1,4 @@ -/* +/* * linux/arch/sh/kernel/io_7751se.c * * Copyright (C) 2001 Ian da Silva, Jeremy Siegel @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include @@ -52,10 +52,6 @@ int sh_pcic_io_dummy; #define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) -#define maybebadio(name,port) \ - printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \ - #name, (port), (__u32) __builtin_return_address(0)) - static inline void delay(void) { ctrl_inw(0xa0000000); @@ -66,11 +62,7 @@ port2adr(unsigned int port) { if (port >= 0x2000) return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); -#if 0 - else - return (volatile __u16 *) (PA_SUPERIO + (port << 1)); -#endif - maybebadio(name,(unsigned long)port); + maybebadio((unsigned long)port); return (volatile __u16*)port; } @@ -140,7 +132,7 @@ unsigned short sh7751se_inw(unsigned long port) else if (port >= 0x2000) return *port2adr(port); else - maybebadio(inw, port); + maybebadio(port); return 0; } @@ -153,7 +145,7 @@ unsigned int sh7751se_inl(unsigned long port) else if (port >= 0x2000) return *port2adr(port); else - maybebadio(inl, port); + maybebadio(port); return 0; } @@ -188,7 +180,7 @@ void sh7751se_outw(unsigned short value, unsigned long port) else if (port >= 0x2000) *port2adr(port) = value; else - maybebadio(outw, port); + maybebadio(port); } void sh7751se_outl(unsigned int value, unsigned long port) @@ -198,17 +190,17 @@ void sh7751se_outl(unsigned int value, unsigned long port) else if (CHECK_SH7751_PCIIO(port)) *((unsigned long*)PCI_IOMAP(port)) = value; else - maybebadio(outl, port); + maybebadio(port); } void sh7751se_insl(unsigned long port, void *addr, unsigned long count) { - maybebadio(insl, port); + maybebadio(port); } void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count) { - maybebadio(outsw, port); + maybebadio(port); } /* Map ISA bus address to the real address. Only for PCMCIA. */ diff --git a/arch/sh/boards/se/7751/irq.c b/arch/sh/boards/se/7751/irq.c index bf6c023615df..c607b0a48479 100644 --- a/arch/sh/boards/se/7751/irq.c +++ b/arch/sh/boards/se/7751/irq.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include /* * Initialize IRQ setting diff --git a/arch/sh/boards/se/7751/led.c b/arch/sh/boards/se/7751/led.c index 4405e26cf866..ff0355dea81b 100644 --- a/arch/sh/boards/se/7751/led.c +++ b/arch/sh/boards/se/7751/led.c @@ -8,9 +8,8 @@ * * This file contains Solution Engine specific LED code. */ - -#include #include +#include /* Cycle the LED's in the clasic Knightrider/Sun pattern */ void heartbeat_7751se(void) diff --git a/arch/sh/boards/se/7751/mach.c b/arch/sh/boards/se/7751/mach.c index 62d8d3e62590..1bb9047d863b 100644 --- a/arch/sh/boards/se/7751/mach.c +++ b/arch/sh/boards/se/7751/mach.c @@ -10,12 +10,8 @@ */ #include - #include -#include -#include - -#include +#include void heartbeat_7751se(void); void init_7751se_IRQ(void); @@ -44,8 +40,6 @@ struct sh_machine_vector mv_7751se __initmv = { .mv_insl = sh7751se_insl, .mv_outsl = sh7751se_outsl, - .mv_isa_port2addr = sh7751se_isa_port2addr, - .mv_init_irq = init_7751se_IRQ, #ifdef CONFIG_HEARTBEAT .mv_heartbeat = heartbeat_7751se, diff --git a/arch/sh/boards/se/7751/setup.c b/arch/sh/boards/se/7751/setup.c index 48dc5aee67d4..8b693105893c 100644 --- a/arch/sh/boards/se/7751/setup.c +++ b/arch/sh/boards/se/7751/setup.c @@ -1,4 +1,4 @@ -/* +/* * linux/arch/sh/kernel/setup_7751se.c * * Copyright (C) 2000 Kazumoto Kojima @@ -11,11 +11,9 @@ #include #include - -#include #include #include -#include +#include #ifdef CONFIG_SH_KGDB #include diff --git a/arch/sh/boards/sh03/setup.c b/arch/sh/boards/sh03/setup.c index 60290f8f289c..dab742a00c6f 100644 --- a/arch/sh/boards/sh03/setup.c +++ b/arch/sh/boards/sh03/setup.c @@ -7,22 +7,19 @@ #include #include -#include -#include #include +#include #include #include #include #include "../../drivers/pci/pci-sh7751.h" -extern void (*board_time_init)(void); - const char *get_system_type(void) { return "Interface CTP/PCI-SH03)"; } -void init_sh03_IRQ(void) +static void init_sh03_IRQ(void) { ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); @@ -34,24 +31,20 @@ void init_sh03_IRQ(void) extern void *cf_io_base; -unsigned long sh03_isa_port2addr(unsigned long port) +static void __iomem *sh03_ioport_map(unsigned long port, unsigned int size) { if (PXSEG(port)) - return port; + return (void __iomem *)port; /* CompactFlash (IDE) */ - if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6)) { - return (unsigned long)cf_io_base + port; - } - return port + SH7751_PCI_IO_BASE; -} + if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6)) + return (void __iomem *)((unsigned long)cf_io_base + port); -/* - * The Machine Vector - */ + return (void __iomem *)(port + SH7751_PCI_IO_BASE); +} struct sh_machine_vector mv_sh03 __initmv = { .mv_nr_irqs = 48, - .mv_isa_port2addr = sh03_isa_port2addr, + .mv_ioport_map = sh03_ioport_map, .mv_init_irq = init_sh03_IRQ, #ifdef CONFIG_HEARTBEAT diff --git a/arch/sh/boards/snapgear/io.c b/arch/sh/boards/snapgear/io.c index e2eb78fc381d..9f700b8392bb 100644 --- a/arch/sh/boards/snapgear/io.c +++ b/arch/sh/boards/snapgear/io.c @@ -28,39 +28,26 @@ unsigned short secureedge5410_ioport; /* * The SnapGear uses the built-in PCI controller (PCIC) * of the 7751 processor - */ + */ #define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR) #define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) #define PCI_IO_AREA SH7751_PCI_IO_BASE #define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE - #define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) - -#define maybebadio(name,port) \ - printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \ - #name, (port), (__u32) __builtin_return_address(0)) - - static inline void delay(void) { ctrl_inw(0xa0000000); } - static inline volatile __u16 *port2adr(unsigned int port) { -#if 0 - if (port >= 0x2000) - return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); -#endif - maybebadio(name,(unsigned long)port); + maybebadio((unsigned long)port); return (volatile __u16*)port; } - /* In case someone configures the kernel w/o PCI support: in that */ /* scenario, don't ever bother to check for PCI-window addresses */ @@ -115,7 +102,7 @@ unsigned short snapgear_inw(unsigned long port) else if (port >= 0x2000) return *port2adr(port); else - maybebadio(inw, port); + maybebadio(port); return 0; } @@ -129,7 +116,7 @@ unsigned int snapgear_inl(unsigned long port) else if (port >= 0x2000) return *port2adr(port); else - maybebadio(inl, port); + maybebadio(port); return 0; } @@ -167,7 +154,7 @@ void snapgear_outw(unsigned short value, unsigned long port) else if (port >= 0x2000) *port2adr(port) = value; else - maybebadio(outw, port); + maybebadio(port); } @@ -178,49 +165,15 @@ void snapgear_outl(unsigned int value, unsigned long port) else if (CHECK_SH7751_PCIIO(port)) *((unsigned long*)PCI_IOMAP(port)) = value; else - maybebadio(outl, port); + maybebadio(port); } void snapgear_insl(unsigned long port, void *addr, unsigned long count) { - maybebadio(insl, port); + maybebadio(port); } void snapgear_outsl(unsigned long port, const void *addr, unsigned long count) { - maybebadio(outsw, port); -} - -/* Map ISA bus address to the real address. Only for PCMCIA. */ - - -/* ISA page descriptor. */ -static __u32 sh_isa_memmap[256]; - - -#if 0 -static int sh_isa_mmap(__u32 start, __u32 length, __u32 offset) -{ - int idx; - - if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000)) - return -1; - - idx = start >> 12; - sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff); -#if 0 - printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n", - start, length, offset, idx, sh_isa_memmap[idx]); -#endif - return 0; -} -#endif - -unsigned long snapgear_isa_port2addr(unsigned long offset) -{ - int idx; - - idx = (offset >> 12) & 0xff; - offset &= 0xfff; - return sh_isa_memmap[idx] + offset; + maybebadio(port); } diff --git a/arch/sh/boards/snapgear/rtc.c b/arch/sh/boards/snapgear/rtc.c index b71e009da35c..287bc4ed3ac7 100644 --- a/arch/sh/boards/snapgear/rtc.c +++ b/arch/sh/boards/snapgear/rtc.c @@ -17,10 +17,7 @@ #include #include #include - #include -#include -#include /****************************************************************************/ diff --git a/arch/sh/boards/snapgear/setup.c b/arch/sh/boards/snapgear/setup.c index f1f7c70c9402..66ce32f8b13c 100644 --- a/arch/sh/boards/snapgear/setup.c +++ b/arch/sh/boards/snapgear/setup.c @@ -1,5 +1,4 @@ -/****************************************************************************/ -/* +/* * linux/arch/sh/boards/snapgear/setup.c * * Copyright (C) 2002 David McCullough @@ -12,8 +11,6 @@ * Modified for 7751 Solution Engine by * Ian da Silva and Jeremy Siegel, 2001. */ -/****************************************************************************/ - #include #include #include @@ -21,14 +18,13 @@ #include #include #include - #include -#include +#include #include #include +#include #include -extern void (*board_time_init)(void); extern void secureedge5410_rtc_init(void); extern void pcibios_init(void); @@ -85,91 +81,6 @@ static void __init init_snapgear_IRQ(void) make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY); } -/****************************************************************************/ -/* - * Fast poll interrupt simulator. - */ - -/* - * Leave all of the fast timer/fast poll stuff commented out for now, since - * it's not clear whether it actually works or not. Since it wasn't being used - * at all in 2.4, we'll assume it's not sane for 2.6 either.. -- PFM - */ -#if 0 -#define FAST_POLL 1000 -//#define FAST_POLL_INTR - -#define FASTTIMER_IRQ 17 -#define FASTTIMER_IPR_ADDR INTC_IPRA -#define FASTTIMER_IPR_POS 2 -#define FASTTIMER_PRIORITY 3 - -#ifdef FAST_POLL_INTR -#define TMU1_TCR_INIT 0x0020 -#else -#define TMU1_TCR_INIT 0 -#endif -#define TMU_TSTR_INIT 1 -#define TMU1_TCR_CALIB 0x0000 - - -#ifdef FAST_POLL_INTR -static void fast_timer_irq(int irq, void *dev_instance, struct pt_regs *regs) -{ - unsigned long timer_status; - timer_status = ctrl_inw(TMU1_TCR); - timer_status &= ~0x100; - ctrl_outw(timer_status, TMU1_TCR); -} -#endif - -/* - * return the current ticks on the fast timer - */ - -unsigned long fast_timer_count(void) -{ - return(ctrl_inl(TMU1_TCNT)); -} - -/* - * setup a fast timer for profiling etc etc - */ - -static void setup_fast_timer() -{ - unsigned long interval; - -#ifdef FAST_POLL_INTR - interval = (current_cpu_data.module_clock/4 + FAST_POLL/2) / FAST_POLL; - - make_ipr_irq(FASTTIMER_IRQ, FASTTIMER_IPR_ADDR, FASTTIMER_IPR_POS, - FASTTIMER_PRIORITY); - - printk("SnapGear: %dHz fast timer on IRQ %d\n",FAST_POLL,FASTTIMER_IRQ); - - if (request_irq(FASTTIMER_IRQ, fast_timer_irq, 0, "SnapGear fast timer", - NULL) != 0) - printk("%s(%d): request_irq() failed?\n", __FILE__, __LINE__); -#else - printk("SnapGear: fast timer running\n",FAST_POLL,FASTTIMER_IRQ); - interval = 0xffffffff; -#endif - - ctrl_outb(ctrl_inb(TMU_TSTR) & ~0x2, TMU_TSTR); /* disable timer 1 */ - ctrl_outw(TMU1_TCR_INIT, TMU1_TCR); - ctrl_outl(interval, TMU1_TCOR); - ctrl_outl(interval, TMU1_TCNT); - ctrl_outb(ctrl_inb(TMU_TSTR) | 0x2, TMU_TSTR); /* enable timer 1 */ - - printk("Timer count 1 = 0x%x\n", fast_timer_count()); - udelay(1000); - printk("Timer count 2 = 0x%x\n", fast_timer_count()); -} -#endif - -/****************************************************************************/ - const char *get_system_type(void) { return "SnapGear SecureEdge5410"; @@ -196,8 +107,6 @@ struct sh_machine_vector mv_snapgear __initmv = { .mv_outw_p = snapgear_outw, .mv_outl_p = snapgear_outl, - .mv_isa_port2addr = snapgear_isa_port2addr, - .mv_init_irq = init_snapgear_IRQ, }; ALIAS_MV(snapgear) diff --git a/arch/sh/boards/titan/io.c b/arch/sh/boards/titan/io.c index b886fd233a66..48f3494f55b1 100644 --- a/arch/sh/boards/titan/io.c +++ b/arch/sh/boards/titan/io.c @@ -30,10 +30,10 @@ static inline void delay(void) ctrl_inw(0xa0000000); } -static inline volatile u16 *port2adr(unsigned int port) +static inline unsigned int port2adr(unsigned int port) { maybebadio((unsigned long)port); - return (volatile u16*)port; + return port; } u8 titan_inb(unsigned long port) diff --git a/arch/sh/cchips/Kconfig b/arch/sh/cchips/Kconfig index 155d139884c3..0582ca8346b6 100644 --- a/arch/sh/cchips/Kconfig +++ b/arch/sh/cchips/Kconfig @@ -65,6 +65,11 @@ config HD64461_IRQ Do not change this unless you know what you are doing. +config HD64461_IOBASE + hex "HD64461 start address" + depends on HD64461 + default "0xb0000000" + config HD64461_ENABLER bool "HD64461 PCMCIA enabler" depends on HD64461 @@ -73,7 +78,6 @@ config HD64461_ENABLER via the HD64461 companion chip. Otherwise, say N. - config HD64465_IOBASE hex "HD64465 start address" depends on HD64465 diff --git a/arch/sh/kernel/cf-enabler.c b/arch/sh/kernel/cf-enabler.c index c9b823d1d073..3e5fa1e24df0 100644 --- a/arch/sh/kernel/cf-enabler.c +++ b/arch/sh/kernel/cf-enabler.c @@ -10,7 +10,8 @@ */ #include - +#include +#include #include #include @@ -32,8 +33,6 @@ /* SH4 can't access PCMCIA interface through P2 area. * we must remap it with appropreate attribute bit of the page set. * this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */ -#include -#include #if defined(CONFIG_CF_AREA6) #define slot_no 0 @@ -84,7 +83,7 @@ static int __init cf_init_default(void) } #if defined(CONFIG_SH_SOLUTION_ENGINE) -#include +#include /* * SolutionEngine diff --git a/drivers/net/stnic.c b/drivers/net/stnic.c index 3fd7a4fee665..e6f90427160c 100644 --- a/drivers/net/stnic.c +++ b/drivers/net/stnic.c @@ -19,7 +19,7 @@ #include #include -#include +#include #include #ifdef CONFIG_SH_STANDARD_BIOS #include diff --git a/include/asm-sh/hs7751rvoip/hs7751rvoip.h b/include/asm-sh/hs7751rvoip/hs7751rvoip.h index 857cc2ebbc69..69faf0171473 100644 --- a/include/asm-sh/hs7751rvoip/hs7751rvoip.h +++ b/include/asm-sh/hs7751rvoip/hs7751rvoip.h @@ -44,6 +44,9 @@ #define IRQ_RINGING 4 /* Ringing IRQ */ #define IRQ_CODEC 5 /* CODEC IRQ */ +#define __IO_PREFIX hs7751rvoip +#include + /* arch/sh/boards/renesas/hs7751rvoip/irq.c */ void init_hs7751rvoip_IRQ(void); diff --git a/include/asm-sh/mc146818rtc.h b/include/asm-sh/mc146818rtc.h index 1707cfb2915d..adc6e67c6b75 100644 --- a/include/asm-sh/mc146818rtc.h +++ b/include/asm-sh/mc146818rtc.h @@ -24,7 +24,7 @@ #define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,b) #elif defined(CONFIG_SH_SECUREEDGE5410) -#include +#include #define RTC_PORT(n) SECUREEDGE_IOPORT_ADDR #define CMOS_READ(addr) secureedge5410_cmos_read(addr) diff --git a/include/asm-sh/se.h b/include/asm-sh/se.h new file mode 100644 index 000000000000..a1832154a3aa --- /dev/null +++ b/include/asm-sh/se.h @@ -0,0 +1,80 @@ +#ifndef __ASM_SH_HITACHI_SE_H +#define __ASM_SH_HITACHI_SE_H + +/* + * linux/include/asm-sh/hitachi_se.h + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Hitachi SolutionEngine support + */ + +/* Box specific addresses. */ + +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_FROM 0x01000000 /* EPROM */ +#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 + +#define PA_EXT4 0x12000000 +#define PA_EXT4_SIZE 0x02000000 +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ + +#define PA_83902 0xb0000000 /* DP83902A */ +#define PA_83902_IF 0xb0040000 /* DP83902A remote io port */ +#define PA_83902_RST 0xb0080000 /* DP83902A reset port */ + +#define PA_SUPERIO 0xb0400000 /* SMC37C935A super io chip */ +#define PA_DIPSW0 0xb0800000 /* Dip switch 5,6 */ +#define PA_DIPSW1 0xb0800002 /* Dip switch 7,8 */ +#define PA_LED 0xb0c00000 /* LED */ +#if defined(CONFIG_CPU_SUBTYPE_SH7705) +#define PA_BCR 0xb0e00000 +#else +#define PA_BCR 0xb1400000 /* FPGA */ +#endif + +#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ +#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) + +#define BCR_ILCRA (PA_BCR + 0) +#define BCR_ILCRB (PA_BCR + 2) +#define BCR_ILCRC (PA_BCR + 4) +#define BCR_ILCRD (PA_BCR + 6) +#define BCR_ILCRE (PA_BCR + 8) +#define BCR_ILCRF (PA_BCR + 10) +#define BCR_ILCRG (PA_BCR + 12) + +#if defined(CONFIG_CPU_SUBTYPE_SH7705) +#define IRQ_STNIC 12 +#else +#define IRQ_STNIC 10 +#endif + +#define __IO_PREFIX se +#include + +#endif /* __ASM_SH_HITACHI_SE_H */ diff --git a/include/asm-sh/se/io.h b/include/asm-sh/se/io.h deleted file mode 100644 index 9eeb86cd6cef..000000000000 --- a/include/asm-sh/se/io.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * include/asm-sh/io_se.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an Hitachi SolutionEngine - */ - -#ifndef _ASM_SH_IO_SE_H -#define _ASM_SH_IO_SE_H - -extern unsigned char se_inb(unsigned long port); -extern unsigned short se_inw(unsigned long port); -extern unsigned int se_inl(unsigned long port); - -extern void se_outb(unsigned char value, unsigned long port); -extern void se_outw(unsigned short value, unsigned long port); -extern void se_outl(unsigned int value, unsigned long port); - -extern unsigned char se_inb_p(unsigned long port); -extern void se_outb_p(unsigned char value, unsigned long port); - -extern void se_insb(unsigned long port, void *addr, unsigned long count); -extern void se_insw(unsigned long port, void *addr, unsigned long count); -extern void se_insl(unsigned long port, void *addr, unsigned long count); -extern void se_outsb(unsigned long port, const void *addr, unsigned long count); -extern void se_outsw(unsigned long port, const void *addr, unsigned long count); -extern void se_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned long se_isa_port2addr(unsigned long offset); - -#endif /* _ASM_SH_IO_SE_H */ diff --git a/include/asm-sh/se/se.h b/include/asm-sh/se/se.h deleted file mode 100644 index 791c5da0388a..000000000000 --- a/include/asm-sh/se/se.h +++ /dev/null @@ -1,77 +0,0 @@ -#ifndef __ASM_SH_HITACHI_SE_H -#define __ASM_SH_HITACHI_SE_H - -/* - * linux/include/asm-sh/hitachi_se.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SolutionEngine support - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_83902 0xb0000000 /* DP83902A */ -#define PA_83902_IF 0xb0040000 /* DP83902A remote io port */ -#define PA_83902_RST 0xb0080000 /* DP83902A reset port */ - -#define PA_SUPERIO 0xb0400000 /* SMC37C935A super io chip */ -#define PA_DIPSW0 0xb0800000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb0800002 /* Dip switch 7,8 */ -#define PA_LED 0xb0c00000 /* LED */ -#if defined(CONFIG_CPU_SUBTYPE_SH7705) -#define PA_BCR 0xb0e00000 -#else -#define PA_BCR 0xb1400000 /* FPGA */ -#endif - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#if defined(CONFIG_CPU_SUBTYPE_SH7705) -#define IRQ_STNIC 12 -#else -#define IRQ_STNIC 10 -#endif - -#endif /* __ASM_SH_HITACHI_SE_H */ diff --git a/include/asm-sh/se7300.h b/include/asm-sh/se7300.h new file mode 100644 index 000000000000..4e24edccb30d --- /dev/null +++ b/include/asm-sh/se7300.h @@ -0,0 +1,64 @@ +#ifndef __ASM_SH_HITACHI_SE7300_H +#define __ASM_SH_HITACHI_SE7300_H + +/* + * linux/include/asm-sh/se/se7300.h + * + * Copyright (C) 2003 Takashi Kusuda + * + * SH-Mobile SolutionEngine 7300 support + */ + +/* Box specific addresses. */ + +/* Area 0 */ +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ +#define PA_FROM 0x00400000 /* Flash ROM */ +#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ +#define PA_SRAM 0x00800000 /* SRAM */ +#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ +/* Area 1 */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +/* Area 2 */ +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +/* Area 3 */ +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 +/* Area 4 */ +#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ +#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ +#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) +#define PA_LED 0xb0800000 /* LED */ +#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ +#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */ +#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */ +#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */ +/* Area 5 */ +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +/* Area 6 */ +#define PA_LCD1 0xb8000000 +#define PA_LCD2 0xb8800000 + +#define __IO_PREFIX sh7300se +#include + +#endif /* __ASM_SH_HITACHI_SE7300_H */ diff --git a/include/asm-sh/se7300/io.h b/include/asm-sh/se7300/io.h deleted file mode 100644 index c6af85529714..000000000000 --- a/include/asm-sh/se7300/io.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * include/asm-sh/se7300/io.h - * - * Copyright (C) 2003 Takashi Kusuda - * IO functions for SH-Mobile(SH7300) SolutionEngine - */ - -#ifndef _ASM_SH_IO_7300SE_H -#define _ASM_SH_IO_7300SE_H - -extern unsigned char sh7300se_inb(unsigned long port); -extern unsigned short sh7300se_inw(unsigned long port); -extern unsigned int sh7300se_inl(unsigned long port); - -extern void sh7300se_outb(unsigned char value, unsigned long port); -extern void sh7300se_outw(unsigned short value, unsigned long port); -extern void sh7300se_outl(unsigned int value, unsigned long port); - -extern unsigned char sh7300se_inb_p(unsigned long port); -extern void sh7300se_outb_p(unsigned char value, unsigned long port); - -extern void sh7300se_insb(unsigned long port, void *addr, unsigned long count); -extern void sh7300se_insw(unsigned long port, void *addr, unsigned long count); -extern void sh7300se_insl(unsigned long port, void *addr, unsigned long count); -extern void sh7300se_outsb(unsigned long port, const void *addr, unsigned long count); -extern void sh7300se_outsw(unsigned long port, const void *addr, unsigned long count); -extern void sh7300se_outsl(unsigned long port, const void *addr, unsigned long count); - -#endif /* _ASM_SH_IO_7300SE_H */ diff --git a/include/asm-sh/se7300/se7300.h b/include/asm-sh/se7300/se7300.h deleted file mode 100644 index 3ec1ded86c97..000000000000 --- a/include/asm-sh/se7300/se7300.h +++ /dev/null @@ -1,61 +0,0 @@ -#ifndef __ASM_SH_HITACHI_SE7300_H -#define __ASM_SH_HITACHI_SE7300_H - -/* - * linux/include/asm-sh/se/se7300.h - * - * Copyright (C) 2003 Takashi Kusuda - * - * SH-Mobile SolutionEngine 7300 support - */ - -/* Box specific addresses. */ - -/* Area 0 */ -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ -#define PA_FROM 0x00400000 /* Flash ROM */ -#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ -#define PA_SRAM 0x00800000 /* SRAM */ -#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ -/* Area 1 */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -/* Area 2 */ -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -/* Area 3 */ -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 -/* Area 4 */ -#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ -#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) -#define PA_LED 0xb0800000 /* LED */ -#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ -#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */ -#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */ -#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */ -/* Area 5 */ -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -/* Area 6 */ -#define PA_LCD1 0xb8000000 -#define PA_LCD2 0xb8800000 - -#endif /* __ASM_SH_HITACHI_SE7300_H */ diff --git a/include/asm-sh/se73180.h b/include/asm-sh/se73180.h new file mode 100644 index 000000000000..3a4acb3e38a1 --- /dev/null +++ b/include/asm-sh/se73180.h @@ -0,0 +1,65 @@ +#ifndef __ASM_SH_HITACHI_SE73180_H +#define __ASM_SH_HITACHI_SE73180_H + +/* + * include/asm-sh/se/se73180.h + * + * Copyright (C) 2003 Takashi Kusuda + * + * SH-Mobile SolutionEngine 73180 support + */ + +/* Box specific addresses. */ + +/* Area 0 */ +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ +#define PA_FROM 0x00400000 /* Flash ROM */ +#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ +#define PA_SRAM 0x00800000 /* SRAM */ +#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ +/* Area 1 */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +/* Area 2 */ +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +/* Area 3 */ +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 +/* Area 4 */ +#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ +#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ +#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) +#define PA_LED 0xb0C00000 /* LED */ +#define LED_SHIFT 0 +#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ +#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */ +#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */ +#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */ +/* Area 5 */ +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +/* Area 6 */ +#define PA_LCD1 0xb8000000 +#define PA_LCD2 0xb8800000 + +#define __IO_PREFIX sh73180se +#include + +#endif /* __ASM_SH_HITACHI_SE73180_H */ diff --git a/include/asm-sh/se73180/io.h b/include/asm-sh/se73180/io.h deleted file mode 100644 index c9cb1b9412c6..000000000000 --- a/include/asm-sh/se73180/io.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * include/asm-sh/se73180/io.h - * - * Copyright (C) 2003 Takashi Kusuda - * Based on include/asm-sh/se7300/io.h - * - * IO functions for SH-Mobile3(SH73180) SolutionEngine - * - */ - -#ifndef _ASM_SH_IO_73180SE_H -#define _ASM_SH_IO_73180SE_H - -extern unsigned char sh73180se_inb(unsigned long port); -extern unsigned short sh73180se_inw(unsigned long port); -extern unsigned int sh73180se_inl(unsigned long port); - -extern void sh73180se_outb(unsigned char value, unsigned long port); -extern void sh73180se_outw(unsigned short value, unsigned long port); -extern void sh73180se_outl(unsigned int value, unsigned long port); - -extern unsigned char sh73180se_inb_p(unsigned long port); -extern void sh73180se_outb_p(unsigned char value, unsigned long port); - -extern void sh73180se_insb(unsigned long port, void *addr, unsigned long count); -extern void sh73180se_insw(unsigned long port, void *addr, unsigned long count); -extern void sh73180se_insl(unsigned long port, void *addr, unsigned long count); -extern void sh73180se_outsb(unsigned long port, const void *addr, unsigned long count); -extern void sh73180se_outsw(unsigned long port, const void *addr, unsigned long count); -extern void sh73180se_outsl(unsigned long port, const void *addr, unsigned long count); - -#endif /* _ASM_SH_IO_73180SE_H */ diff --git a/include/asm-sh/se73180/se73180.h b/include/asm-sh/se73180/se73180.h deleted file mode 100644 index f5b93e39e768..000000000000 --- a/include/asm-sh/se73180/se73180.h +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef __ASM_SH_HITACHI_SE73180_H -#define __ASM_SH_HITACHI_SE73180_H - -/* - * include/asm-sh/se/se73180.h - * - * Copyright (C) 2003 Takashi Kusuda - * - * SH-Mobile SolutionEngine 73180 support - */ - -/* Box specific addresses. */ - -/* Area 0 */ -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ -#define PA_FROM 0x00400000 /* Flash ROM */ -#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ -#define PA_SRAM 0x00800000 /* SRAM */ -#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ -/* Area 1 */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -/* Area 2 */ -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -/* Area 3 */ -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 -/* Area 4 */ -#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ -#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) -#define PA_LED 0xb0C00000 /* LED */ -#define LED_SHIFT 0 -#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ -#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */ -#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */ -#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */ -/* Area 5 */ -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -/* Area 6 */ -#define PA_LCD1 0xb8000000 -#define PA_LCD2 0xb8800000 - -#endif /* __ASM_SH_HITACHI_SE73180_H */ diff --git a/include/asm-sh/se7751.h b/include/asm-sh/se7751.h new file mode 100644 index 000000000000..88cd379d9084 --- /dev/null +++ b/include/asm-sh/se7751.h @@ -0,0 +1,71 @@ +#ifndef __ASM_SH_HITACHI_7751SE_H +#define __ASM_SH_HITACHI_7751SE_H + +/* + * linux/include/asm-sh/hitachi_7751se.h + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Hitachi SolutionEngine support + + * Modified for 7751 Solution Engine by + * Ian da Silva and Jeremy Siegel, 2001. + */ + +/* Box specific addresses. */ + +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_FROM 0x01000000 /* EPROM */ +#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 + +#define PA_EXT4 0x12000000 +#define PA_EXT4_SIZE 0x02000000 +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ + +#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ +#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ +#define PA_LED 0xba000000 /* LED */ +#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ + +#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ +#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_MODE (PA_MRSHPC + 4) +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) + +#define BCR_ILCRA (PA_BCR + 0) +#define BCR_ILCRB (PA_BCR + 2) +#define BCR_ILCRC (PA_BCR + 4) +#define BCR_ILCRD (PA_BCR + 6) +#define BCR_ILCRE (PA_BCR + 8) +#define BCR_ILCRF (PA_BCR + 10) +#define BCR_ILCRG (PA_BCR + 12) + +#define IRQ_79C973 13 + +#define __IO_PREFIX sh7751se +#include + +#endif /* __ASM_SH_HITACHI_7751SE_H */ diff --git a/include/asm-sh/se7751/io.h b/include/asm-sh/se7751/io.h deleted file mode 100644 index 78d8f5744bc5..000000000000 --- a/include/asm-sh/se7751/io.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * include/asm-sh/io_7751se.h - * - * Modified version of io_se.h for the 7751se-specific functions. - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an Hitachi SolutionEngine - */ - -#ifndef _ASM_SH_IO_7751SE_H -#define _ASM_SH_IO_7751SE_H - -extern unsigned char sh7751se_inb(unsigned long port); -extern unsigned short sh7751se_inw(unsigned long port); -extern unsigned int sh7751se_inl(unsigned long port); - -extern void sh7751se_outb(unsigned char value, unsigned long port); -extern void sh7751se_outw(unsigned short value, unsigned long port); -extern void sh7751se_outl(unsigned int value, unsigned long port); - -extern unsigned char sh7751se_inb_p(unsigned long port); -extern void sh7751se_outb_p(unsigned char value, unsigned long port); - -extern void sh7751se_insb(unsigned long port, void *addr, unsigned long count); -extern void sh7751se_insw(unsigned long port, void *addr, unsigned long count); -extern void sh7751se_insl(unsigned long port, void *addr, unsigned long count); -extern void sh7751se_outsb(unsigned long port, const void *addr, unsigned long count); -extern void sh7751se_outsw(unsigned long port, const void *addr, unsigned long count); -extern void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char sh7751se_readb(unsigned long addr); -extern unsigned short sh7751se_readw(unsigned long addr); -extern unsigned int sh7751se_readl(unsigned long addr); -extern void sh7751se_writeb(unsigned char b, unsigned long addr); -extern void sh7751se_writew(unsigned short b, unsigned long addr); -extern void sh7751se_writel(unsigned int b, unsigned long addr); - -extern unsigned long sh7751se_isa_port2addr(unsigned long offset); - -#endif /* _ASM_SH_IO_7751SE_H */ diff --git a/include/asm-sh/se7751/se7751.h b/include/asm-sh/se7751/se7751.h deleted file mode 100644 index 738e22bebdfb..000000000000 --- a/include/asm-sh/se7751/se7751.h +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef __ASM_SH_HITACHI_7751SE_H -#define __ASM_SH_HITACHI_7751SE_H - -/* - * linux/include/asm-sh/hitachi_7751se.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SolutionEngine support - - * Modified for 7751 Solution Engine by - * Ian da Silva and Jeremy Siegel, 2001. - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ -#define PA_LED 0xba000000 /* LED */ -#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_MODE (PA_MRSHPC + 4) -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#define IRQ_79C973 13 - -#endif /* __ASM_SH_HITACHI_7751SE_H */ diff --git a/include/asm-sh/sh03/io.h b/include/asm-sh/sh03/io.h index 25792e9831ea..df3b187ef883 100644 --- a/include/asm-sh/sh03/io.h +++ b/include/asm-sh/sh03/io.h @@ -33,14 +33,6 @@ #define IRL3_IPR_POS 0 #define IRL3_PRIORITY 4 - -extern unsigned long sh03_isa_port2addr(unsigned long offset); - -extern void setup_sh03(void); -extern void init_sh03_IRQ(void); -extern void heartbeat_sh03(void); - -extern void sh03_rtc_gettimeofday(struct timeval *tv); -extern int sh03_rtc_settimeofday(const struct timeval *tv); +void heartbeat_sh03(void); #endif /* _ASM_SH_IO_SH03_H */ diff --git a/include/asm-sh/snapgear.h b/include/asm-sh/snapgear.h new file mode 100644 index 000000000000..6b5e4ddc073a --- /dev/null +++ b/include/asm-sh/snapgear.h @@ -0,0 +1,79 @@ +/* + * include/asm-sh/snapgear/io.h + * + * Modified version of io_se.h for the snapgear-specific functions. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * IO functions for a SnapGear + */ + +#ifndef _ASM_SH_IO_SNAPGEAR_H +#define _ASM_SH_IO_SNAPGEAR_H + +#if defined(CONFIG_CPU_SH4) +/* + * The external interrupt lines, these take up ints 0 - 15 inclusive + * depending on the priority for the interrupt. In fact the priority + * is the interrupt :-) + */ + +#define IRL0_IRQ 2 +#define IRL0_IPR_ADDR INTC_IPRD +#define IRL0_IPR_POS 3 +#define IRL0_PRIORITY 13 + +#define IRL1_IRQ 5 +#define IRL1_IPR_ADDR INTC_IPRD +#define IRL1_IPR_POS 2 +#define IRL1_PRIORITY 10 + +#define IRL2_IRQ 8 +#define IRL2_IPR_ADDR INTC_IPRD +#define IRL2_IPR_POS 1 +#define IRL2_PRIORITY 7 + +#define IRL3_IRQ 11 +#define IRL3_IPR_ADDR INTC_IPRD +#define IRL3_IPR_POS 0 +#define IRL3_PRIORITY 4 +#endif + +#define __IO_PREFIX snapgear +#include + +#ifdef CONFIG_SH_SECUREEDGE5410 +/* + * We need to remember what was written to the ioport as some bits + * are shared with other functions and you cannot read back what was + * written :-| + * + * Bit Read Write + * ----------------------------------------------- + * D0 DCD on ttySC1 power + * D1 Reset Switch heatbeat + * D2 ttySC0 CTS (7100) LAN + * D3 - WAN + * D4 ttySC0 DCD (7100) CONSOLE + * D5 - ONLINE + * D6 - VPN + * D7 - DTR on ttySC1 + * D8 - ttySC0 RTS (7100) + * D9 - ttySC0 DTR (7100) + * D10 - RTC SCLK + * D11 RTC DATA RTC DATA + * D12 - RTS RESET + */ + +#define SECUREEDGE_IOPORT_ADDR ((volatile short *) 0xb0000000) +extern unsigned short secureedge5410_ioport; + +#define SECUREEDGE_WRITE_IOPORT(val, mask) (*SECUREEDGE_IOPORT_ADDR = \ + (secureedge5410_ioport = \ + ((secureedge5410_ioport & ~(mask)) | ((val) & (mask))))) +#define SECUREEDGE_READ_IOPORT() \ + ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817)) +#endif + +#endif /* _ASM_SH_IO_SNAPGEAR_H */ diff --git a/include/asm-sh/snapgear/io.h b/include/asm-sh/snapgear/io.h deleted file mode 100644 index bfa97ac06280..000000000000 --- a/include/asm-sh/snapgear/io.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * include/asm-sh/snapgear/io.h - * - * Modified version of io_se.h for the snapgear-specific functions. - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for a SnapGear - */ - -#ifndef _ASM_SH_IO_SNAPGEAR_H -#define _ASM_SH_IO_SNAPGEAR_H - -#if defined(CONFIG_CPU_SH4) -/* - * The external interrupt lines, these take up ints 0 - 15 inclusive - * depending on the priority for the interrupt. In fact the priority - * is the interrupt :-) - */ - -#define IRL0_IRQ 2 -#define IRL0_IPR_ADDR INTC_IPRD -#define IRL0_IPR_POS 3 -#define IRL0_PRIORITY 13 - -#define IRL1_IRQ 5 -#define IRL1_IPR_ADDR INTC_IPRD -#define IRL1_IPR_POS 2 -#define IRL1_PRIORITY 10 - -#define IRL2_IRQ 8 -#define IRL2_IPR_ADDR INTC_IPRD -#define IRL2_IPR_POS 1 -#define IRL2_PRIORITY 7 - -#define IRL3_IRQ 11 -#define IRL3_IPR_ADDR INTC_IPRD -#define IRL3_IPR_POS 0 -#define IRL3_PRIORITY 4 -#endif - -extern unsigned char snapgear_inb(unsigned long port); -extern unsigned short snapgear_inw(unsigned long port); -extern unsigned int snapgear_inl(unsigned long port); - -extern void snapgear_outb(unsigned char value, unsigned long port); -extern void snapgear_outw(unsigned short value, unsigned long port); -extern void snapgear_outl(unsigned int value, unsigned long port); - -extern unsigned char snapgear_inb_p(unsigned long port); -extern void snapgear_outb_p(unsigned char value, unsigned long port); - -extern void snapgear_insl(unsigned long port, void *addr, unsigned long count); -extern void snapgear_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned long snapgear_isa_port2addr(unsigned long offset); - -#ifdef CONFIG_SH_SECUREEDGE5410 -/* - * We need to remember what was written to the ioport as some bits - * are shared with other functions and you cannot read back what was - * written :-| - * - * Bit Read Write - * ----------------------------------------------- - * D0 DCD on ttySC1 power - * D1 Reset Switch heatbeat - * D2 ttySC0 CTS (7100) LAN - * D3 - WAN - * D4 ttySC0 DCD (7100) CONSOLE - * D5 - ONLINE - * D6 - VPN - * D7 - DTR on ttySC1 - * D8 - ttySC0 RTS (7100) - * D9 - ttySC0 DTR (7100) - * D10 - RTC SCLK - * D11 RTC DATA RTC DATA - * D12 - RTS RESET - */ - - #define SECUREEDGE_IOPORT_ADDR ((volatile short *) 0xb0000000) - extern unsigned short secureedge5410_ioport; - - #define SECUREEDGE_WRITE_IOPORT(val, mask) (*SECUREEDGE_IOPORT_ADDR = \ - (secureedge5410_ioport = \ - ((secureedge5410_ioport & ~(mask)) | ((val) & (mask))))) - #define SECUREEDGE_READ_IOPORT() \ - ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817)) -#endif - -#endif /* _ASM_SH_IO_SNAPGEAR_H */ diff --git a/include/asm-sh/systemh/7751systemh.h b/include/asm-sh/systemh/7751systemh.h deleted file mode 100644 index 4170531bdbd9..000000000000 --- a/include/asm-sh/systemh/7751systemh.h +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef __ASM_SH_SYSTEMH_7751SYSTEMH_H -#define __ASM_SH_SYSTEMH_7751SYSTEMH_H - -/* - * linux/include/asm-sh/systemh/7751systemh.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SystemH support - - * Modified for 7751 SystemH by - * Jonathan Short, 2002. - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ -#define PA_LED 0xba000000 /* LED */ -#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_MODE (PA_MRSHPC + 4) -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#define IRQ_79C973 13 - -#endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */ diff --git a/include/asm-sh/systemh/io.h b/include/asm-sh/systemh/io.h deleted file mode 100644 index 327849b49db8..000000000000 --- a/include/asm-sh/systemh/io.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * include/asm-sh/systemh/io.h - * - * Stupid I/O definitions for SystemH, cloned from SE7751. - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_SH_SYSTEMH_IO_H -#define __ASM_SH_SYSTEMH_IO_H - -extern unsigned char sh7751systemh_inb(unsigned long port); -extern unsigned short sh7751systemh_inw(unsigned long port); -extern unsigned int sh7751systemh_inl(unsigned long port); - -extern void sh7751systemh_outb(unsigned char value, unsigned long port); -extern void sh7751systemh_outw(unsigned short value, unsigned long port); -extern void sh7751systemh_outl(unsigned int value, unsigned long port); - -extern unsigned char sh7751systemh_inb_p(unsigned long port); -extern void sh7751systemh_outb_p(unsigned char value, unsigned long port); - -extern void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count); -extern void sh7751systemh_insw(unsigned long port, void *addr, unsigned long count); -extern void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count); -extern void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count); -extern void sh7751systemh_outsw(unsigned long port, const void *addr, unsigned long count); -extern void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char sh7751systemh_readb(unsigned long addr); -extern unsigned short sh7751systemh_readw(unsigned long addr); -extern unsigned int sh7751systemh_readl(unsigned long addr); -extern void sh7751systemh_writeb(unsigned char b, unsigned long addr); -extern void sh7751systemh_writew(unsigned short b, unsigned long addr); -extern void sh7751systemh_writel(unsigned int b, unsigned long addr); - -extern unsigned long sh7751systemh_isa_port2addr(unsigned long offset); - -#endif /* __ASM_SH_SYSTEMH_IO_H */ - diff --git a/include/asm-sh/systemh7751.h b/include/asm-sh/systemh7751.h new file mode 100644 index 000000000000..b143bb2a2ca7 --- /dev/null +++ b/include/asm-sh/systemh7751.h @@ -0,0 +1,71 @@ +#ifndef __ASM_SH_SYSTEMH_7751SYSTEMH_H +#define __ASM_SH_SYSTEMH_7751SYSTEMH_H + +/* + * linux/include/asm-sh/systemh/7751systemh.h + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Hitachi SystemH support + + * Modified for 7751 SystemH by + * Jonathan Short, 2002. + */ + +/* Box specific addresses. */ + +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_FROM 0x01000000 /* EPROM */ +#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 + +#define PA_EXT4 0x12000000 +#define PA_EXT4_SIZE 0x02000000 +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ + +#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ +#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ +#define PA_LED 0xba000000 /* LED */ +#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ + +#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ +#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_MODE (PA_MRSHPC + 4) +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) + +#define BCR_ILCRA (PA_BCR + 0) +#define BCR_ILCRB (PA_BCR + 2) +#define BCR_ILCRC (PA_BCR + 4) +#define BCR_ILCRD (PA_BCR + 6) +#define BCR_ILCRE (PA_BCR + 8) +#define BCR_ILCRF (PA_BCR + 10) +#define BCR_ILCRG (PA_BCR + 12) + +#define IRQ_79C973 13 + +#define __IO_PREFIX sh7751systemh +#include + +#endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */ -- cgit v1.2.3 From d7c30c682a278abe1a52db83f69efec1a9d8f8c2 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:49:57 +0900 Subject: sh: Store Queue API rework. Rewrite the store queue API for a per-cpu interface in the driver model. The old miscdevice is dropped, due to TASK_SIZE limitations, and no one was using it anyways. Carve up and allocate store queue space with a bitmap, back sq mapping objects with a slab cache, and let userspace worry about its own prefetching. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4/sq.c | 542 ++++++++++++++++++++------------------------ include/asm-sh/cpu-sh4/sq.h | 23 +- 2 files changed, 251 insertions(+), 314 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c index b148966dd7c7..7bcc73f9b8df 100644 --- a/arch/sh/kernel/cpu/sh4/sq.c +++ b/arch/sh/kernel/cpu/sh4/sq.c @@ -1,50 +1,52 @@ /* - * arch/sh/kernel/cpu/sq.c + * arch/sh/kernel/cpu/sh4/sq.c * * General management API for SH-4 integrated Store Queues * - * Copyright (C) 2001, 2002, 2003, 2004 Paul Mundt + * Copyright (C) 2001 - 2006 Paul Mundt * Copyright (C) 2001, 2002 M. R. Brown * - * Some of this code has been adopted directly from the old arch/sh/mm/sq.c - * hack that was part of the LinuxDC project. For all intents and purposes, - * this is a completely new interface that really doesn't have much in common - * with the old zone-based approach at all. In fact, it's only listed here for - * general completeness. - * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #include +#include +#include +#include #include #include #include -#include -#include -#include #include #include #include #include #include -#include #include -static LIST_HEAD(sq_mapping_list); +struct sq_mapping; + +struct sq_mapping { + const char *name; + + unsigned long sq_addr; + unsigned long addr; + unsigned int size; + + struct sq_mapping *next; +}; + +static struct sq_mapping *sq_mapping_list; static DEFINE_SPINLOCK(sq_mapping_lock); +static kmem_cache_t *sq_cache; +static unsigned long *sq_bitmap; -/** - * sq_flush - Flush (prefetch) the store queue cache - * @addr: the store queue address to flush - * - * Executes a prefetch instruction on the specified store queue cache, - * so that the cached data is written to physical memory. - */ -inline void sq_flush(void *addr) -{ - __asm__ __volatile__ ("pref @%0" : : "r" (addr) : "memory"); -} +#define store_queue_barrier() \ +do { \ + (void)ctrl_inl(P4SEG_STORE_QUE); \ + ctrl_outl(0, P4SEG_STORE_QUE + 0); \ + ctrl_outl(0, P4SEG_STORE_QUE + 8); \ +} while (0); /** * sq_flush_range - Flush (prefetch) a specific SQ range @@ -57,154 +59,73 @@ inline void sq_flush(void *addr) void sq_flush_range(unsigned long start, unsigned int len) { volatile unsigned long *sq = (unsigned long *)start; - unsigned long dummy; /* Flush the queues */ for (len >>= 5; len--; sq += 8) - sq_flush((void *)sq); + prefetchw((void *)sq); /* Wait for completion */ - dummy = ctrl_inl(P4SEG_STORE_QUE); - - ctrl_outl(0, P4SEG_STORE_QUE + 0); - ctrl_outl(0, P4SEG_STORE_QUE + 8); + store_queue_barrier(); } -static struct sq_mapping *__sq_alloc_mapping(unsigned long virt, unsigned long phys, unsigned long size, const char *name) +static inline void sq_mapping_list_add(struct sq_mapping *map) { - struct sq_mapping *map; - - if (virt + size > SQ_ADDRMAX) - return ERR_PTR(-ENOSPC); + struct sq_mapping **p, *tmp; - map = kmalloc(sizeof(struct sq_mapping), GFP_KERNEL); - if (!map) - return ERR_PTR(-ENOMEM); + spin_lock_irq(&sq_mapping_lock); - INIT_LIST_HEAD(&map->list); + p = &sq_mapping_list; + while ((tmp = *p) != NULL) + p = &tmp->next; - map->sq_addr = virt; - map->addr = phys; - map->size = size + 1; - map->name = name; + map->next = tmp; + *p = map; - list_add(&map->list, &sq_mapping_list); - - return map; + spin_unlock_irq(&sq_mapping_lock); } -static unsigned long __sq_get_next_addr(void) +static inline void sq_mapping_list_del(struct sq_mapping *map) { - if (!list_empty(&sq_mapping_list)) { - struct list_head *pos, *tmp; - - /* - * Read one off the list head, as it will have the highest - * mapped allocation. Set the next one up right above it. - * - * This is somewhat sub-optimal, as we don't look at - * gaps between allocations or anything lower then the - * highest-level allocation. - * - * However, in the interest of performance and the general - * lack of desire to do constant list rebalancing, we don't - * worry about it. - */ - list_for_each_safe(pos, tmp, &sq_mapping_list) { - struct sq_mapping *entry; - - entry = list_entry(pos, typeof(*entry), list); - - return entry->sq_addr + entry->size; + struct sq_mapping **p, *tmp; + + spin_lock_irq(&sq_mapping_lock); + + for (p = &sq_mapping_list; (tmp = *p); p = &tmp->next) + if (tmp == map) { + *p = tmp->next; + break; } - } - return P4SEG_STORE_QUE; + spin_unlock_irq(&sq_mapping_lock); } -/** - * __sq_remap - Perform a translation from the SQ to a phys addr - * @map: sq mapping containing phys and store queue addresses. - * - * Maps the store queue address specified in the mapping to the physical - * address specified in the mapping. - */ -static struct sq_mapping *__sq_remap(struct sq_mapping *map) +static int __sq_remap(struct sq_mapping *map, unsigned long flags) { - unsigned long flags, pteh, ptel; +#if defined(CONFIG_MMU) struct vm_struct *vma; - pgprot_t pgprot; - /* - * Without an MMU (or with it turned off), this is much more - * straightforward, as we can just load up each queue's QACR with - * the physical address appropriately masked. - */ - - ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0); - ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1); - -#ifdef CONFIG_MMU - /* - * With an MMU on the other hand, things are slightly more involved. - * Namely, we have to have a direct mapping between the SQ addr and - * the associated physical address in the UTLB by way of setting up - * a virt<->phys translation by hand. We do this by simply specifying - * the SQ addr in UTLB.VPN and the associated physical address in - * UTLB.PPN. - * - * Notably, even though this is a special case translation, and some - * of the configuration bits are meaningless, we're still required - * to have a valid ASID context in PTEH. - * - * We could also probably get by without explicitly setting PTEA, but - * we do it here just for good measure. - */ - spin_lock_irqsave(&sq_mapping_lock, flags); - - pteh = map->sq_addr; - ctrl_outl((pteh & MMU_VPN_MASK) | get_asid(), MMU_PTEH); - - ptel = map->addr & PAGE_MASK; - - if (cpu_data->flags & CPU_HAS_PTEA) - ctrl_outl(((ptel >> 28) & 0xe) | (ptel & 0x1), MMU_PTEA); - - pgprot = pgprot_noncached(PAGE_KERNEL); - - ptel &= _PAGE_FLAGS_HARDWARE_MASK; - ptel |= pgprot_val(pgprot); - ctrl_outl(ptel, MMU_PTEL); - - __asm__ __volatile__ ("ldtlb" : : : "memory"); - - spin_unlock_irqrestore(&sq_mapping_lock, flags); - - /* - * Next, we need to map ourselves in the kernel page table, so that - * future accesses after a TLB flush will be handled when we take a - * page fault. - * - * Theoretically we could just do this directly and not worry about - * setting up the translation by hand ahead of time, but for the - * cases where we want a one-shot SQ mapping followed by a quick - * writeout before we hit the TLB flush, we do it anyways. This way - * we at least save ourselves the initial page fault overhead. - */ vma = __get_vm_area(map->size, VM_ALLOC, map->sq_addr, SQ_ADDRMAX); if (!vma) - return ERR_PTR(-ENOMEM); + return -ENOMEM; vma->phys_addr = map->addr; if (remap_area_pages((unsigned long)vma->addr, vma->phys_addr, - map->size, pgprot_val(pgprot))) { + map->size, flags)) { vunmap(vma->addr); - return NULL; + return -EAGAIN; } -#endif /* CONFIG_MMU */ +#else + /* + * Without an MMU (or with it turned off), this is much more + * straightforward, as we can just load up each queue's QACR with + * the physical address appropriately masked. + */ + ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0); + ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1); +#endif - return map; + return 0; } /** @@ -212,42 +133,65 @@ static struct sq_mapping *__sq_remap(struct sq_mapping *map) * @phys: Physical address of mapping. * @size: Length of mapping. * @name: User invoking mapping. + * @flags: Protection flags. * * Remaps the physical address @phys through the next available store queue * address of @size length. @name is logged at boot time as well as through - * the procfs interface. - * - * A pre-allocated and filled sq_mapping pointer is returned, and must be - * cleaned up with a call to sq_unmap() when the user is done with the - * mapping. + * the sysfs interface. */ -struct sq_mapping *sq_remap(unsigned long phys, unsigned int size, const char *name) +unsigned long sq_remap(unsigned long phys, unsigned int size, + const char *name, unsigned long flags) { struct sq_mapping *map; - unsigned long virt, end; + unsigned long end; unsigned int psz; + int ret, page; /* Don't allow wraparound or zero size */ end = phys + size - 1; - if (!size || end < phys) - return NULL; + if (unlikely(!size || end < phys)) + return -EINVAL; /* Don't allow anyone to remap normal memory.. */ - if (phys < virt_to_phys(high_memory)) - return NULL; + if (unlikely(phys < virt_to_phys(high_memory))) + return -EINVAL; phys &= PAGE_MASK; + size = PAGE_ALIGN(end + 1) - phys; + + map = kmem_cache_alloc(sq_cache, GFP_KERNEL); + if (unlikely(!map)) + return -ENOMEM; + + map->addr = phys; + map->size = size; + map->name = name; + + page = bitmap_find_free_region(sq_bitmap, 0x04000000, + get_order(map->size)); + if (unlikely(page < 0)) { + ret = -ENOSPC; + goto out; + } + + map->sq_addr = P4SEG_STORE_QUE + (page << PAGE_SHIFT); + + ret = __sq_remap(map, flags); + if (unlikely(ret != 0)) + goto out; + + psz = (size + (PAGE_SIZE - 1)) >> PAGE_SHIFT; + pr_info("sqremap: %15s [%4d page%s] va 0x%08lx pa 0x%08lx\n", + likely(map->name) ? map->name : "???", + psz, psz == 1 ? " " : "s", + map->sq_addr, map->addr); - size = PAGE_ALIGN(end + 1) - phys; - virt = __sq_get_next_addr(); - psz = (size + (PAGE_SIZE - 1)) / PAGE_SIZE; - map = __sq_alloc_mapping(virt, phys, size, name); + sq_mapping_list_add(map); - printk("sqremap: %15s [%4d page%s] va 0x%08lx pa 0x%08lx\n", - map->name ? map->name : "???", - psz, psz == 1 ? " " : "s", - map->sq_addr, map->addr); + return map->sq_addr; - return __sq_remap(map); +out: + kmem_cache_free(sq_cache, map); + return ret; } /** @@ -258,188 +202,198 @@ struct sq_mapping *sq_remap(unsigned long phys, unsigned int size, const char *n * sq_remap(). Also frees up the pte that was previously inserted into * the kernel page table and discards the UTLB translation. */ -void sq_unmap(struct sq_mapping *map) +void sq_unmap(unsigned long vaddr) { - if (map->sq_addr > (unsigned long)high_memory) - vfree((void *)(map->sq_addr & PAGE_MASK)); + struct sq_mapping **p, *map; + struct vm_struct *vma; + int page; - list_del(&map->list); - kfree(map); -} + for (p = &sq_mapping_list; (map = *p); p = &map->next) + if (map->sq_addr == vaddr) + break; -/** - * sq_clear - Clear a store queue range - * @addr: Address to start clearing from. - * @len: Length to clear. - * - * A quick zero-fill implementation for clearing out memory that has been - * remapped through the store queues. - */ -void sq_clear(unsigned long addr, unsigned int len) -{ - int i; + if (unlikely(!map)) { + printk("%s: bad store queue address 0x%08lx\n", + __FUNCTION__, vaddr); + return; + } - /* Clear out both queues linearly */ - for (i = 0; i < 8; i++) { - ctrl_outl(0, addr + i + 0); - ctrl_outl(0, addr + i + 8); + page = (map->sq_addr - P4SEG_STORE_QUE) >> PAGE_SHIFT; + bitmap_release_region(sq_bitmap, page, get_order(map->size)); + +#ifdef CONFIG_MMU + vma = remove_vm_area((void *)(map->sq_addr & PAGE_MASK)); + if (!vma) { + printk(KERN_ERR "%s: bad address 0x%08lx\n", + __FUNCTION__, map->sq_addr); + return; } +#endif + + sq_mapping_list_del(map); - sq_flush_range(addr, len); + kmem_cache_free(sq_cache, map); } -/** - * sq_vma_unmap - Unmap a VMA range - * @area: VMA containing range. - * @addr: Start of range. - * @len: Length of range. +/* + * Needlessly complex sysfs interface. Unfortunately it doesn't seem like + * there is any other easy way to add things on a per-cpu basis without + * putting the directory entries somewhere stupid and having to create + * links in sysfs by hand back in to the per-cpu directories. * - * Searches the sq_mapping_list for a mapping matching the sq addr @addr, - * and subsequently frees up the entry. Further cleanup is done by generic - * code. + * Some day we may want to have an additional abstraction per store + * queue, but considering the kobject hell we already have to deal with, + * it's simply not worth the trouble. */ -static void sq_vma_unmap(struct vm_area_struct *area, - unsigned long addr, size_t len) -{ - struct list_head *pos, *tmp; +static struct kobject *sq_kobject[NR_CPUS]; - list_for_each_safe(pos, tmp, &sq_mapping_list) { - struct sq_mapping *entry; +struct sq_sysfs_attr { + struct attribute attr; + ssize_t (*show)(char *buf); + ssize_t (*store)(const char *buf, size_t count); +}; - entry = list_entry(pos, typeof(*entry), list); +#define to_sq_sysfs_attr(attr) container_of(attr, struct sq_sysfs_attr, attr) - if (entry->sq_addr == addr) { - /* - * We could probably get away without doing the tlb flush - * here, as generic code should take care of most of this - * when unmapping the rest of the VMA range for us. Leave - * it in for added sanity for the time being.. - */ - __flush_tlb_page(get_asid(), entry->sq_addr & PAGE_MASK); +static ssize_t sq_sysfs_show(struct kobject *kobj, struct attribute *attr, + char *buf) +{ + struct sq_sysfs_attr *sattr = to_sq_sysfs_attr(attr); - list_del(&entry->list); - kfree(entry); + if (likely(sattr->show)) + return sattr->show(buf); - return; - } - } + return -EIO; } -/** - * sq_vma_sync - Sync a VMA range - * @area: VMA containing range. - * @start: Start of range. - * @len: Length of range. - * @flags: Additional flags. - * - * Synchronizes an sq mapped range by flushing the store queue cache for - * the duration of the mapping. - * - * Used internally for user mappings, which must use msync() to prefetch - * the store queue cache. - */ -static int sq_vma_sync(struct vm_area_struct *area, - unsigned long start, size_t len, unsigned int flags) +static ssize_t sq_sysfs_store(struct kobject *kobj, struct attribute *attr, + const char *buf, size_t count) { - sq_flush_range(start, len); + struct sq_sysfs_attr *sattr = to_sq_sysfs_attr(attr); - return 0; + if (likely(sattr->store)) + return sattr->store(buf, count); + + return -EIO; } -static struct vm_operations_struct sq_vma_ops = { - .unmap = sq_vma_unmap, - .sync = sq_vma_sync, -}; +static ssize_t mapping_show(char *buf) +{ + struct sq_mapping **list, *entry; + char *p = buf; -/** - * sq_mmap - mmap() for /dev/cpu/sq - * @file: unused. - * @vma: VMA to remap. - * - * Remap the specified vma @vma through the store queues, and setup associated - * information for the new mapping. Also build up the page tables for the new - * area. - */ -static int sq_mmap(struct file *file, struct vm_area_struct *vma) + for (list = &sq_mapping_list; (entry = *list); list = &entry->next) + p += sprintf(p, "%08lx-%08lx [%08lx]: %s\n", + entry->sq_addr, entry->sq_addr + entry->size, + entry->addr, entry->name); + + return p - buf; +} + +static ssize_t mapping_store(const char *buf, size_t count) { - unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; - unsigned long size = vma->vm_end - vma->vm_start; - struct sq_mapping *map; + unsigned long base = 0, len = 0; - /* - * We're not interested in any arbitrary virtual address that has - * been stuck in the VMA, as we already know what addresses we - * want. Save off the size, and reposition the VMA to begin at - * the next available sq address. - */ - vma->vm_start = __sq_get_next_addr(); - vma->vm_end = vma->vm_start + size; + sscanf(buf, "%lx %lx", &base, &len); + if (!base) + return -EIO; - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + if (likely(len)) { + int ret = sq_remap(base, len, "Userspace", + pgprot_val(PAGE_SHARED)); + if (ret < 0) + return ret; + } else + sq_unmap(base); - vma->vm_flags |= VM_IO | VM_RESERVED; + return count; +} - map = __sq_alloc_mapping(vma->vm_start, offset, size, "Userspace"); +static struct sq_sysfs_attr mapping_attr = + __ATTR(mapping, 0644, mapping_show, mapping_store); - if (io_remap_pfn_range(vma, map->sq_addr, map->addr >> PAGE_SHIFT, - size, vma->vm_page_prot)) - return -EAGAIN; +static struct attribute *sq_sysfs_attrs[] = { + &mapping_attr.attr, + NULL, +}; - vma->vm_ops = &sq_vma_ops; +static struct sysfs_ops sq_sysfs_ops = { + .show = sq_sysfs_show, + .store = sq_sysfs_store, +}; - return 0; -} +static struct kobj_type ktype_percpu_entry = { + .sysfs_ops = &sq_sysfs_ops, + .default_attrs = sq_sysfs_attrs, +}; -#ifdef CONFIG_PROC_FS -static int sq_mapping_read_proc(char *buf, char **start, off_t off, - int len, int *eof, void *data) +static int __devinit sq_sysdev_add(struct sys_device *sysdev) { - struct list_head *pos; - char *p = buf; + unsigned int cpu = sysdev->id; + struct kobject *kobj; - list_for_each_prev(pos, &sq_mapping_list) { - struct sq_mapping *entry; + sq_kobject[cpu] = kzalloc(sizeof(struct kobject), GFP_KERNEL); + if (unlikely(!sq_kobject[cpu])) + return -ENOMEM; - entry = list_entry(pos, typeof(*entry), list); + kobj = sq_kobject[cpu]; + kobj->parent = &sysdev->kobj; + kobject_set_name(kobj, "%s", "sq"); + kobj->ktype = &ktype_percpu_entry; - p += sprintf(p, "%08lx-%08lx [%08lx]: %s\n", entry->sq_addr, - entry->sq_addr + entry->size - 1, entry->addr, - entry->name); - } - - return p - buf; + return kobject_register(kobj); } -#endif -static struct file_operations sq_fops = { - .owner = THIS_MODULE, - .mmap = sq_mmap, -}; +static int __devexit sq_sysdev_remove(struct sys_device *sysdev) +{ + unsigned int cpu = sysdev->id; + struct kobject *kobj = sq_kobject[cpu]; -static struct miscdevice sq_dev = { - .minor = STORE_QUEUE_MINOR, - .name = "sq", - .fops = &sq_fops, + kobject_unregister(kobj); + return 0; +} + +static struct sysdev_driver sq_sysdev_driver = { + .add = sq_sysdev_add, + .remove = __devexit_p(sq_sysdev_remove), }; static int __init sq_api_init(void) { - int ret; + unsigned int nr_pages = 0x04000000 >> PAGE_SHIFT; + unsigned int size = (nr_pages + (BITS_PER_LONG - 1)) / BITS_PER_LONG; + int ret = -ENOMEM; + printk(KERN_NOTICE "sq: Registering store queue API.\n"); - create_proc_read_entry("sq_mapping", 0, 0, sq_mapping_read_proc, 0); + sq_cache = kmem_cache_create("store_queue_cache", + sizeof(struct sq_mapping), 0, 0, + NULL, NULL); + if (unlikely(!sq_cache)) + return ret; - ret = misc_register(&sq_dev); - if (ret) - remove_proc_entry("sq_mapping", NULL); + sq_bitmap = kzalloc(size, GFP_KERNEL); + if (unlikely(!sq_bitmap)) + goto out; + + ret = sysdev_driver_register(&cpu_sysdev_class, &sq_sysdev_driver); + if (unlikely(ret != 0)) + goto out; + + return 0; + +out: + kfree(sq_bitmap); + kmem_cache_destroy(sq_cache); return ret; } static void __exit sq_api_exit(void) { - misc_deregister(&sq_dev); - remove_proc_entry("sq_mapping", NULL); + sysdev_driver_unregister(&cpu_sysdev_class, &sq_sysdev_driver); + kfree(sq_bitmap); + kmem_cache_destroy(sq_cache); } module_init(sq_api_init); @@ -448,11 +402,7 @@ module_exit(sq_api_exit); MODULE_AUTHOR("Paul Mundt , M. R. Brown "); MODULE_DESCRIPTION("Simple API for SH-4 integrated Store Queues"); MODULE_LICENSE("GPL"); -MODULE_ALIAS_MISCDEV(STORE_QUEUE_MINOR); EXPORT_SYMBOL(sq_remap); EXPORT_SYMBOL(sq_unmap); -EXPORT_SYMBOL(sq_clear); -EXPORT_SYMBOL(sq_flush); EXPORT_SYMBOL(sq_flush_range); - diff --git a/include/asm-sh/cpu-sh4/sq.h b/include/asm-sh/cpu-sh4/sq.h index 366b09166d3b..586d6491816a 100644 --- a/include/asm-sh/cpu-sh4/sq.h +++ b/include/asm-sh/cpu-sh4/sq.h @@ -17,7 +17,7 @@ * Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be * mapped to any physical address space. Since data is written (and aligned) * to 32-byte boundaries, we need to be sure that all allocations are aligned. - */ + */ #define SQ_SIZE 32 #define SQ_ALIGN_MASK (~(SQ_SIZE - 1)) #define SQ_ALIGN(addr) (((addr)+SQ_SIZE-1) & SQ_ALIGN_MASK) @@ -26,23 +26,10 @@ #define SQ_QACR1 (P4SEG_REG_BASE + 0x3c) #define SQ_ADDRMAX (P4SEG_STORE_QUE + 0x04000000) -struct sq_mapping { - const char *name; - - unsigned long sq_addr; - unsigned long addr; - unsigned int size; - - struct list_head list; -}; - /* arch/sh/kernel/cpu/sh4/sq.c */ -extern struct sq_mapping *sq_remap(unsigned long phys, unsigned int size, const char *name); -extern void sq_unmap(struct sq_mapping *map); - -extern void sq_clear(unsigned long addr, unsigned int len); -extern void sq_flush(void *addr); -extern void sq_flush_range(unsigned long start, unsigned int len); +unsigned long sq_remap(unsigned long phys, unsigned int size, + const char *name, unsigned long flags); +void sq_unmap(unsigned long vaddr); +void sq_flush_range(unsigned long start, unsigned int len); #endif /* __ASM_CPU_SH4_SQ_H */ - -- cgit v1.2.3 From 5283ecb5ccbdb90d49fce6488d3944bba63a591c Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:59:17 +0900 Subject: sh: Add support for R7780RP and R7780MP boards. This adds support for the Renesas SH7780 development boards, R7780RP and R7780MP. Signed-off-by: Paul Mundt --- arch/sh/Kconfig | 2 + arch/sh/Makefile | 1 + arch/sh/boards/renesas/r7780rp/Kconfig | 14 + arch/sh/boards/renesas/r7780rp/Makefile | 6 + arch/sh/boards/renesas/r7780rp/io.c | 338 +++++++++ arch/sh/boards/renesas/r7780rp/irq.c | 123 ++++ arch/sh/boards/renesas/r7780rp/led.c | 45 ++ arch/sh/boards/renesas/r7780rp/setup.c | 164 +++++ arch/sh/configs/r7780rp_defconfig | 1099 ++++++++++++++++++++++++++++++ arch/sh/drivers/dma/Kconfig | 3 +- arch/sh/drivers/dma/dma-sh.c | 4 - arch/sh/drivers/pci/Makefile | 2 + arch/sh/drivers/pci/fixups-r7780rp.c | 39 ++ arch/sh/drivers/pci/ops-r7780rp.c | 77 +++ arch/sh/drivers/pci/pci-auto.c | 44 +- arch/sh/drivers/pci/pci-sh7751.c | 4 +- arch/sh/drivers/pci/pci-sh7780.c | 341 +++++++++ arch/sh/drivers/pci/pci-sh7780.h | 168 +++++ arch/sh/kernel/cpu/irq/intc2.c | 6 +- arch/sh/tools/mach-types | 2 + include/asm-sh/cpu-sh4/addrspace.h | 3 + include/asm-sh/cpu-sh4/dma-sh7780.h | 39 ++ include/asm-sh/cpu-sh4/dma.h | 11 +- include/asm-sh/hs7751rvoip/hs7751rvoip.h | 2 - include/asm-sh/irq-sh7780.h | 5 - include/asm-sh/irq.h | 2 +- include/asm-sh/landisk/iodata_landisk.h | 2 - include/asm-sh/r7780rp/ide.h | 8 + include/asm-sh/r7780rp/r7780rp.h | 177 +++++ include/asm-sh/rts7751r2d/rts7751r2d.h | 2 - 30 files changed, 2684 insertions(+), 49 deletions(-) create mode 100644 arch/sh/boards/renesas/r7780rp/Kconfig create mode 100644 arch/sh/boards/renesas/r7780rp/Makefile create mode 100644 arch/sh/boards/renesas/r7780rp/io.c create mode 100644 arch/sh/boards/renesas/r7780rp/irq.c create mode 100644 arch/sh/boards/renesas/r7780rp/led.c create mode 100644 arch/sh/boards/renesas/r7780rp/setup.c create mode 100644 arch/sh/configs/r7780rp_defconfig create mode 100644 arch/sh/drivers/pci/fixups-r7780rp.c create mode 100644 arch/sh/drivers/pci/ops-r7780rp.c create mode 100644 arch/sh/drivers/pci/pci-sh7780.c create mode 100644 arch/sh/drivers/pci/pci-sh7780.h create mode 100644 include/asm-sh/cpu-sh4/dma-sh7780.h create mode 100644 include/asm-sh/r7780rp/ide.h create mode 100644 include/asm-sh/r7780rp/r7780rp.h (limited to 'arch/sh/kernel') diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index a66b9c44075f..fe982f0eba23 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -404,6 +404,8 @@ source "arch/sh/boards/renesas/hs7751rvoip/Kconfig" source "arch/sh/boards/renesas/rts7751r2d/Kconfig" +source "arch/sh/boards/renesas/r7780rp/Kconfig" + config SH_PCLK_FREQ int "Peripheral clock frequency (in Hz)" default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780 diff --git a/arch/sh/Makefile b/arch/sh/Makefile index 65676c33822e..c143510d71fc 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -104,6 +104,7 @@ machdir-$(CONFIG_SH_HS7751RVOIP) := renesas/hs7751rvoip machdir-$(CONFIG_SH_RTS7751R2D) := renesas/rts7751r2d machdir-$(CONFIG_SH_7751_SYSTEMH) := renesas/systemh machdir-$(CONFIG_SH_EDOSK7705) := renesas/edosk7705 +machdir-$(CONFIG_SH_R7780RP) := renesas/r7780rp machdir-$(CONFIG_SH_SH4202_MICRODEV) := superh/microdev machdir-$(CONFIG_SH_LANDISK) := landisk machdir-$(CONFIG_SH_TITAN) := titan diff --git a/arch/sh/boards/renesas/r7780rp/Kconfig b/arch/sh/boards/renesas/r7780rp/Kconfig new file mode 100644 index 000000000000..c26d9813d239 --- /dev/null +++ b/arch/sh/boards/renesas/r7780rp/Kconfig @@ -0,0 +1,14 @@ +if SH_R7780RP + +menu "R7780RP options" + +config SH_R7780MP + bool "R7780MP board support" + default y + help + Selecting this option will enable support for the mass-production + version of the R7780RP. If in doubt, say Y. + +endmenu + +endif diff --git a/arch/sh/boards/renesas/r7780rp/Makefile b/arch/sh/boards/renesas/r7780rp/Makefile new file mode 100644 index 000000000000..f1776d027978 --- /dev/null +++ b/arch/sh/boards/renesas/r7780rp/Makefile @@ -0,0 +1,6 @@ +# +# Makefile for the R7780RP-1 specific parts of the kernel +# + +obj-y := setup.o io.o irq.o +obj-$(CONFIG_HEARTBEAT) += led.o diff --git a/arch/sh/boards/renesas/r7780rp/io.c b/arch/sh/boards/renesas/r7780rp/io.c new file mode 100644 index 000000000000..f73ca3f0f5a1 --- /dev/null +++ b/arch/sh/boards/renesas/r7780rp/io.c @@ -0,0 +1,338 @@ +/* + * linux/arch/sh/kernel/io_r7780rp.c + * + * Copyright (C) 2001 Ian da Silva, Jeremy Siegel + * Based largely on io_se.c. + * + * I/O routine for Renesas Solutions Highlander R7780RP-1 + * + * Initial version only to support LAN access; some + * placeholder code from io_r7780rp.c left in with the + * expectation of later SuperIO and PCMCIA access. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include "../../../drivers/pci/pci-sh7780.h" + +/* + * The 7780 R7780RP-1 uses the built-in PCI controller (PCIC) + * of the 7780 processor, and has a SuperIO accessible via the PCI. + * The board also includes a PCMCIA controller on its memory bus, + * like the other Solution Engine boards. + */ + +#define SH7780_PCIIOBR_MASK 0xFFFC0000 /* IO Space Mask */ +#define PCIIOBR (volatile long *)PCI_REG(SH7780_PCIIOBR) +#define PCIMBR (volatile long *)PCI_REG(SH7780_PCIMBR) +#define PCI_IO_AREA SH7780_PCI_IO_BASE +#define PCI_MEM_AREA SH7780_PCI_CONFIG_BASE + +#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7780_PCIIOBR_MASK)) + +static inline void delay(void) +{ + ctrl_inw(0xa0000000); +} + +static inline unsigned long port2adr(unsigned int port) +{ + if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) + if (port == 0x3f6) + return (PA_AREA5_IO + 0x80c); + else + return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1)); + else + maybebadio((unsigned long)port); + + return port; +} + +static inline unsigned long port88796l(unsigned int port, int flag) +{ + unsigned long addr; + + if (flag) + addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1); + else + addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1) + 0x1000; + + return addr; +} + +/* The 7780 R7780RP-1 seems to have everything hooked */ +/* up pretty normally (nothing on high-bytes only...) so this */ +/* shouldn't be needed */ +static inline int shifted_port(unsigned long port) +{ + /* For IDE registers, value is not shifted */ + if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) + return 0; + else + return 1; +} + +/* In case someone configures the kernel w/o PCI support: in that */ +/* scenario, don't ever bother to check for PCI-window addresses */ + +/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */ +#if defined(CONFIG_PCI) +#define CHECK_SH7780_PCIIO(port) \ + ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7780_PCI_IO_SIZE))) +#else +#define CHECK_SH7780_PCIIO(port) (0) +#endif + +#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE) +#define CHECK_AX88796L_PORT(port) \ + ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20))) +#else +#define CHECK_AX88796L_PORT(port) (0) +#endif + +/* + * General outline: remap really low stuff [eventually] to SuperIO, + * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) + * is mapped through the PCI IO window. Stuff with high bits (PXSEG) + * should be way beyond the window, and is used w/o translation for + * compatibility. + */ +u8 r7780rp_inb(unsigned long port) +{ + if (CHECK_AX88796L_PORT(port)) + return ctrl_inw(port88796l(port, 0)) & 0xff; + else if (PXSEG(port)) + return ctrl_inb(port); + else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) + return ctrl_inb(PCI_IOMAP(port)); + + return ctrl_inw(port2adr(port)) & 0xff; +} + +u8 r7780rp_inb_p(unsigned long port) +{ + u8 v; + + if (CHECK_AX88796L_PORT(port)) + v = ctrl_inw(port88796l(port, 0)) & 0xff; + else if (PXSEG(port)) + v = ctrl_inb(port); + else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) + v = ctrl_inb(PCI_IOMAP(port)); + else + v = ctrl_inw(port2adr(port)) & 0xff; + + delay(); + + return v; +} + +u16 r7780rp_inw(unsigned long port) +{ + if (CHECK_AX88796L_PORT(port)) + maybebadio(port); + else if (PXSEG(port)) + return ctrl_inw(port); + else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) + return ctrl_inw(PCI_IOMAP(port)); + else + maybebadio(port); + + return 0; +} + +u32 r7780rp_inl(unsigned long port) +{ + if (CHECK_AX88796L_PORT(port)) + maybebadio(port); + else if (PXSEG(port)) + return ctrl_inl(port); + else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) + return ctrl_inl(PCI_IOMAP(port)); + else + maybebadio(port); + + return 0; +} + +void r7780rp_outb(u8 value, unsigned long port) +{ + if (CHECK_AX88796L_PORT(port)) + ctrl_outw(value, port88796l(port, 0)); + else if (PXSEG(port)) + ctrl_outb(value, port); + else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) + ctrl_outb(value, PCI_IOMAP(port)); + else + ctrl_outw(value, port2adr(port)); +} + +void r7780rp_outb_p(u8 value, unsigned long port) +{ + if (CHECK_AX88796L_PORT(port)) + ctrl_outw(value, port88796l(port, 0)); + else if (PXSEG(port)) + ctrl_outb(value, port); + else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) + ctrl_outb(value, PCI_IOMAP(port)); + else + ctrl_outw(value, port2adr(port)); + + delay(); +} + +void r7780rp_outw(u16 value, unsigned long port) +{ + if (CHECK_AX88796L_PORT(port)) + maybebadio(port); + else if (PXSEG(port)) + ctrl_outw(value, port); + else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) + ctrl_outw(value, PCI_IOMAP(port)); + else + maybebadio(port); +} + +void r7780rp_outl(u32 value, unsigned long port) +{ + if (CHECK_AX88796L_PORT(port)) + maybebadio(port); + else if (PXSEG(port)) + ctrl_outl(value, port); + else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) + ctrl_outl(value, PCI_IOMAP(port)); + else + maybebadio(port); +} + +void r7780rp_insb(unsigned long port, void *dst, unsigned long count) +{ + volatile u16 *p; + u8 *buf = dst; + + if (CHECK_AX88796L_PORT(port)) { + p = (volatile u16 *)port88796l(port, 0); + while (count--) + *buf++ = *p & 0xff; + } else if (PXSEG(port)) { + while (count--) + *buf++ = *(volatile u8 *)port; + } else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { + volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); + + while (count--) + *buf++ = *bp; + } else { + p = (volatile u16 *)port2adr(port); + while (count--) + *buf++ = *p & 0xff; + } +} + +void r7780rp_insw(unsigned long port, void *dst, unsigned long count) +{ + volatile u16 *p; + u16 *buf = dst; + + if (CHECK_AX88796L_PORT(port)) + p = (volatile u16 *)port88796l(port, 1); + else if (PXSEG(port)) + p = (volatile u16 *)port; + else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) + p = (volatile u16 *)PCI_IOMAP(port); + else + p = (volatile u16 *)port2adr(port); + + while (count--) + *buf++ = *p; +} + +void r7780rp_insl(unsigned long port, void *dst, unsigned long count) +{ + u32 *buf = dst; + + if (CHECK_AX88796L_PORT(port)) + maybebadio(port); + else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { + volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); + + while (count--) + *buf++ = *p; + } else + maybebadio(port); +} + +void r7780rp_outsb(unsigned long port, const void *src, unsigned long count) +{ + volatile u16 *p; + const u8 *buf = src; + + if (CHECK_AX88796L_PORT(port)) { + p = (volatile u16 *)port88796l(port, 0); + while (count--) + *p = *buf++; + } else if (PXSEG(port)) + while (count--) + ctrl_outb(*buf++, port); + else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { + volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); + + while (count--) + *bp = *buf++; + } else { + p = (volatile u16 *)port2adr(port); + while (count--) + *p = *buf++; + } +} + +void r7780rp_outsw(unsigned long port, const void *src, unsigned long count) +{ + volatile u16 *p; + const u16 *buf = src; + + if (CHECK_AX88796L_PORT(port)) + p = (volatile u16 *)port88796l(port, 1); + else if (PXSEG(port)) + p = (volatile u16 *)port; + else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) + p = (volatile u16 *)PCI_IOMAP(port); + else + p = (volatile u16 *)port2adr(port); + + while (count--) + *p = *buf++; +} + +void r7780rp_outsl(unsigned long port, const void *src, unsigned long count) +{ + const u32 *buf = src; + + if (CHECK_AX88796L_PORT(port)) + maybebadio(port); + else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { + volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); + + while (count--) + *p = *buf++; + } else + maybebadio(port); +} + +void __iomem *r7780rp_ioport_map(unsigned long port, unsigned int size) +{ + if (CHECK_AX88796L_PORT(port)) + return (void __iomem *)port88796l(port, size > 1); + else if (PXSEG(port)) + return (void __iomem *)port; + else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) + return (void __iomem *)PCI_IOMAP(port); + + return (void __iomem *)port2adr(port); +} diff --git a/arch/sh/boards/renesas/r7780rp/irq.c b/arch/sh/boards/renesas/r7780rp/irq.c new file mode 100644 index 000000000000..c7b9fe6e640d --- /dev/null +++ b/arch/sh/boards/renesas/r7780rp/irq.c @@ -0,0 +1,123 @@ +/* + * linux/arch/sh/boards/renesas/r7780rp/irq.c + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Renesas Solutions Highlander R7780RP-1 Support. + * + * Modified for R7780RP-1 by + * Atom Create Engineering Co., Ltd. 2002. + */ + +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_SH_R7780MP +static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0}; +#else +static int mask_pos[] = {15, 14, 13, 12, 11, 10, 9, 8, 7, 5, 6, 4, 0, 1, 2, 0}; +#endif + +static void enable_r7780rp_irq(unsigned int irq); +static void disable_r7780rp_irq(unsigned int irq); + +/* shutdown is same as "disable" */ +#define shutdown_r7780rp_irq disable_r7780rp_irq + +static void ack_r7780rp_irq(unsigned int irq); +static void end_r7780rp_irq(unsigned int irq); + +static unsigned int startup_r7780rp_irq(unsigned int irq) +{ + enable_r7780rp_irq(irq); + return 0; /* never anything pending */ +} + +static void disable_r7780rp_irq(unsigned int irq) +{ + unsigned long flags; + unsigned short val; + unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]); + + /* Set the priority in IPR to 0 */ + local_irq_save(flags); + val = ctrl_inw(IRLCNTR1); + val &= mask; + ctrl_outw(val, IRLCNTR1); + local_irq_restore(flags); +} + +static void enable_r7780rp_irq(unsigned int irq) +{ + unsigned long flags; + unsigned short val; + unsigned short value = (0x0001 << mask_pos[irq]); + + /* Set priority in IPR back to original value */ + local_irq_save(flags); + val = ctrl_inw(IRLCNTR1); + val |= value; + ctrl_outw(val, IRLCNTR1); + local_irq_restore(flags); +} + +static void ack_r7780rp_irq(unsigned int irq) +{ + disable_r7780rp_irq(irq); +} + +static void end_r7780rp_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) + enable_r7780rp_irq(irq); +} + +static struct hw_interrupt_type r7780rp_irq_type = { + .typename = "R7780RP-IRQ", + .startup = startup_r7780rp_irq, + .shutdown = shutdown_r7780rp_irq, + .enable = enable_r7780rp_irq, + .disable = disable_r7780rp_irq, + .ack = ack_r7780rp_irq, + .end = end_r7780rp_irq, +}; + +static void make_r7780rp_irq(unsigned int irq) +{ + disable_irq_nosync(irq); + irq_desc[irq].handler = &r7780rp_irq_type; + disable_r7780rp_irq(irq); +} + +/* + * Initialize IRQ setting + */ +void __init init_r7780rp_IRQ(void) +{ + int i; + + /* IRL0=PCI Slot #A + * IRL1=PCI Slot #B + * IRL2=PCI Slot #C + * IRL3=PCI Slot #D + * IRL4=CF Card + * IRL5=CF Card Insert + * IRL6=M66596 + * IRL7=SD Card + * IRL8=Touch Panel + * IRL9=SCI + * IRL10=Serial + * IRL11=Extention #A + * IRL11=Extention #B + * IRL12=Debug LAN + * IRL13=Push Switch + * IRL14=ZiggBee IO + */ + + for (i=0; i<15; i++) + make_r7780rp_irq(i); +} diff --git a/arch/sh/boards/renesas/r7780rp/led.c b/arch/sh/boards/renesas/r7780rp/led.c new file mode 100644 index 000000000000..9f02766b6f53 --- /dev/null +++ b/arch/sh/boards/renesas/r7780rp/led.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) Atom Create Engineering Co., Ltd. + * + * May be copied or modified under the terms of GNU General Public + * License. See linux/COPYING for more information. + * + * This file contains Renesas Solutions HIGHLANDER R7780RP-1 specific LED code. + */ + +#include +#include +#include +#include + +/* Cycle the LED's in the clasic Knightriger/Sun pattern */ +void heartbeat_r7780rp(void) +{ + static unsigned int cnt = 0, period = 0; + volatile unsigned short *p = (volatile unsigned short *)PA_OBLED; + static unsigned bit = 0, up = 1; + unsigned bit_pos[] = {2, 1, 0, 3, 6, 5, 4, 7}; + + cnt += 1; + if (cnt < period) + return; + + cnt = 0; + + /* Go through the points (roughly!): + * f(0)=10, f(1)=16, f(2)=20, f(5)=35, f(int)->110 + */ + period = 110 - ((300 << FSHIFT)/((avenrun[0]/5) + (3< +#include +#include +#include +#include +#include + +extern void heartbeat_r7780rp(void); +extern void init_r7780rp_IRQ(void); + +/* + * The Machine Vector + */ +struct sh_machine_vector mv_r7780rp __initmv = { + .mv_nr_irqs = 109, + + .mv_inb = r7780rp_inb, + .mv_inw = r7780rp_inw, + .mv_inl = r7780rp_inl, + .mv_outb = r7780rp_outb, + .mv_outw = r7780rp_outw, + .mv_outl = r7780rp_outl, + + .mv_inb_p = r7780rp_inb_p, + .mv_inw_p = r7780rp_inw, + .mv_inl_p = r7780rp_inl, + .mv_outb_p = r7780rp_outb_p, + .mv_outw_p = r7780rp_outw, + .mv_outl_p = r7780rp_outl, + + .mv_insb = r7780rp_insb, + .mv_insw = r7780rp_insw, + .mv_insl = r7780rp_insl, + .mv_outsb = r7780rp_outsb, + .mv_outsw = r7780rp_outsw, + .mv_outsl = r7780rp_outsl, + + .mv_ioport_map = r7780rp_ioport_map, + .mv_init_irq = init_r7780rp_IRQ, +#ifdef CONFIG_HEARTBEAT + .mv_heartbeat = heartbeat_r7780rp, +#endif +}; +ALIAS_MV(r7780rp) + +static struct resource m66596_usb_host_resources[] = { + [0] = { + .start = 0xa4800000, + .end = 0xa4ffffff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 6, /* irq number */ + .end = 6, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device m66596_usb_host_device = { + .name = "m66596-hcd", + .id = 0, + .dev = { + .dma_mask = NULL, /* don't use dma */ + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(m66596_usb_host_resources), + .resource = m66596_usb_host_resources, +}; + +static struct platform_device *r7780rp_devices[] __initdata = { + &m66596_usb_host_device, +}; + +static int __init r7780rp_devices_setup(void) +{ + return platform_add_devices(r7780rp_devices, + ARRAY_SIZE(r7780rp_devices)); +} +__initcall(r7780rp_devices_setup); + +/* + * Platform specific clocks + */ +static void ivdr_clk_enable(struct clk *clk) +{ + ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << 8), PA_IVDRCTL); +} + +static void ivdr_clk_disable(struct clk *clk) +{ + ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << 8), PA_IVDRCTL); +} + +static struct clk_ops ivdr_clk_ops = { + .enable = ivdr_clk_enable, + .disable = ivdr_clk_disable, +}; + +static struct clk ivdr_clk = { + .name = "ivdr_clk", + .ops = &ivdr_clk_ops, +}; + +static struct clk *r7780rp_clocks[] = { + &ivdr_clk, +}; + +const char *get_system_type(void) +{ + return "Highlander R7780RP-1"; +} + +static void r7780rp_power_off(void) +{ +#ifdef CONFIG_SH_R7780MP + ctrl_outw(0x0001, PA_POFF); +#endif +} + +/* + * Initialize the board + */ +void __init platform_setup(void) +{ + u16 ver = ctrl_inw(PA_VERREG); + int i; + + printk(KERN_INFO "Renesas Solutions Highlander R7780RP-1 support.\n"); + + printk(KERN_INFO "Board version: %d (revision %d), " + "FPGA version: %d (revision %d)\n", + (ver >> 12) & 0xf, (ver >> 8) & 0xf, + (ver >> 4) & 0xf, ver & 0xf); + + /* + * Enable the important clocks right away.. + */ + for (i = 0; i < ARRAY_SIZE(r7780rp_clocks); i++) { + struct clk *clk = r7780rp_clocks[i]; + + clk_register(clk); + clk_enable(clk); + } + + ctrl_outw(0x0000, PA_OBLED); /* Clear LED. */ +#ifndef CONFIG_SH_R7780MP + ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */ +#endif + ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x0100, PA_IVDRCTL); /* Si13112 */ + + pm_power_off = r7780rp_power_off; +} diff --git a/arch/sh/configs/r7780rp_defconfig b/arch/sh/configs/r7780rp_defconfig new file mode 100644 index 000000000000..d597fc571549 --- /dev/null +++ b/arch/sh/configs/r7780rp_defconfig @@ -0,0 +1,1099 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.15-sh +# Sat Jan 7 19:47:53 2006 +# +CONFIG_SUPERH=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_CALIBRATE_DELAY=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +CONFIG_HOTPLUG=y +CONFIG_KOBJECT_UEVENT=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_BASE_FULL=y +# CONFIG_FUTEX is not set +# CONFIG_EPOLL is not set +CONFIG_SHMEM=y +CONFIG_CC_ALIGN_FUNCTIONS=0 +CONFIG_CC_ALIGN_LABELS=0 +CONFIG_CC_ALIGN_LOOPS=0 +CONFIG_CC_ALIGN_JUMPS=0 +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +# CONFIG_LBD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +CONFIG_DEFAULT_NOOP=y +CONFIG_DEFAULT_IOSCHED="noop" + +# +# System type +# +# CONFIG_SH_SOLUTION_ENGINE is not set +# CONFIG_SH_7751_SOLUTION_ENGINE is not set +# CONFIG_SH_7300_SOLUTION_ENGINE is not set +# CONFIG_SH_73180_SOLUTION_ENGINE is not set +# CONFIG_SH_7751_SYSTEMH is not set +# CONFIG_SH_STB1_HARP is not set +# CONFIG_SH_STB1_OVERDRIVE is not set +# CONFIG_SH_HP6XX is not set +# CONFIG_SH_CQREEK is not set +# CONFIG_SH_DMIDA is not set +# CONFIG_SH_EC3104 is not set +# CONFIG_SH_SATURN is not set +# CONFIG_SH_DREAMCAST is not set +# CONFIG_SH_CAT68701 is not set +# CONFIG_SH_BIGSUR is not set +# CONFIG_SH_SH2000 is not set +# CONFIG_SH_ADX is not set +# CONFIG_SH_MPC1211 is not set +# CONFIG_SH_SH03 is not set +# CONFIG_SH_SECUREEDGE5410 is not set +# CONFIG_SH_HS7751RVOIP is not set +# CONFIG_SH_RTS7751R2D is not set +# CONFIG_SH_R77703DRP is not set +CONFIG_SH_R7780RP=y +# CONFIG_SH_EDOSK7705 is not set +# CONFIG_SH_SH4202_MICRODEV is not set +# CONFIG_SH_LANDISK is not set +# CONFIG_SH_TITAN is not set +# CONFIG_SH_UNKNOWN is not set + +# +# Processor selection +# +CONFIG_CPU_SH4=y +CONFIG_CPU_SH4A=y + +# +# SH-2 Processor Support +# +# CONFIG_CPU_SUBTYPE_SH7604 is not set + +# +# SH-3 Processor Support +# +# CONFIG_CPU_SUBTYPE_SH7300 is not set +# CONFIG_CPU_SUBTYPE_SH7705 is not set +# CONFIG_CPU_SUBTYPE_SH7707 is not set +# CONFIG_CPU_SUBTYPE_SH7708 is not set +# CONFIG_CPU_SUBTYPE_SH7709 is not set + +# +# SH-4 Processor Support +# +# CONFIG_CPU_SUBTYPE_SH7750 is not set +# CONFIG_CPU_SUBTYPE_SH7091 is not set +# CONFIG_CPU_SUBTYPE_SH7750R is not set +# CONFIG_CPU_SUBTYPE_SH7750S is not set +# CONFIG_CPU_SUBTYPE_SH7751 is not set +# CONFIG_CPU_SUBTYPE_SH7751R is not set +# CONFIG_CPU_SUBTYPE_SH7760 is not set +# CONFIG_CPU_SUBTYPE_SH4_202 is not set + +# +# ST40 Processor Support +# +# CONFIG_CPU_SUBTYPE_ST40STB1 is not set +# CONFIG_CPU_SUBTYPE_ST40GX1 is not set + +# +# SH-4A Processor Support +# +# CONFIG_CPU_SUBTYPE_SH73180 is not set +# CONFIG_CPU_SUBTYPE_SH7770 is not set +CONFIG_CPU_SUBTYPE_SH7780=y + +# +# Memory management options +# +CONFIG_MMU=y +CONFIG_32BIT=y +CONFIG_HUGETLB_PAGE_SIZE_64K=y +# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 + +# +# Cache configuration +# +# CONFIG_SH_DIRECT_MAPPED is not set +# CONFIG_SH_WRITETHROUGH is not set +# CONFIG_SH_OCRAM is not set +CONFIG_MEMORY_START=0x08000000 +CONFIG_MEMORY_SIZE=0x08000000 + +# +# Processor features +# +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SH_FPU=y +CONFIG_SH_STORE_QUEUES=y + +# +# Timer support +# +CONFIG_SH_TMU=y +CONFIG_SH_PCLK_FREQ_BOOL=y +CONFIG_SH_PCLK_FREQ=32000000 + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# DMA support +# +CONFIG_SH_DMA=y +CONFIG_NR_ONCHIP_DMA_CHANNELS=6 +# CONFIG_NR_DMA_CHANNELS_BOOL is not set + +# +# Companion Chips +# +# CONFIG_HD6446X_SERIES is not set + +# +# Kernel features +# +# CONFIG_KEXEC is not set +CONFIG_PREEMPT=y +# CONFIG_SMP is not set +CONFIG_CPU_HAS_INTEVT=y +CONFIG_CPU_HAS_INTC2_IRQ=y + +# +# Boot options +# +CONFIG_ZERO_PAGE_OFFSET=0x00001000 +CONFIG_BOOT_LINK_OFFSET=0x00800000 +# CONFIG_UBC_WAKEUP is not set +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="mem=128M console=ttySC0,115200 root=/dev/hda1" + +# +# Bus options +# +CONFIG_PCI=y +CONFIG_SH_PCIDMA_NONCOHERENT=y +CONFIG_PCI_AUTO=y +CONFIG_PCI_AUTO_UPDATE_RESOURCES=y +CONFIG_PCI_LEGACY_PROC=y +# CONFIG_PCI_DEBUG is not set + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PCI Hotplug Support +# +CONFIG_HOTPLUG_PCI=y +# CONFIG_HOTPLUG_PCI_FAKE is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_FLAT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_MULTIPLE_TABLES is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +CONFIG_BRIDGE=m +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_DEBUG_DRIVER is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +CONFIG_IDE=m +CONFIG_IDE_MAX_HWIFS=4 +CONFIG_BLK_DEV_IDE=m + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +CONFIG_BLK_DEV_IDE_SATA=y +CONFIG_BLK_DEV_IDEDISK=m +CONFIG_IDEDISK_MULTI_MODE=y +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +CONFIG_BLK_DEV_IDESCSI=m +# CONFIG_IDE_TASK_IOCTL is not set + +# +# IDE chipset support/bugfixes +# +CONFIG_IDE_GENERIC=m +CONFIG_BLK_DEV_IDEPCI=y +CONFIG_IDEPCI_SHARE_IRQ=y +# CONFIG_BLK_DEV_OFFBOARD is not set +CONFIG_BLK_DEV_GENERIC=m +# CONFIG_BLK_DEV_OPTI621 is not set +CONFIG_BLK_DEV_IDEDMA_PCI=y +# CONFIG_BLK_DEV_IDEDMA_FORCED is not set +CONFIG_IDEDMA_PCI_AUTO=y +# CONFIG_IDEDMA_ONLYDISK is not set +CONFIG_BLK_DEV_AEC62XX=m +# CONFIG_BLK_DEV_ALI15X3 is not set +# CONFIG_BLK_DEV_AMD74XX is not set +# CONFIG_BLK_DEV_CMD64X is not set +# CONFIG_BLK_DEV_TRIFLEX is not set +# CONFIG_BLK_DEV_CY82C693 is not set +# CONFIG_BLK_DEV_CS5520 is not set +# CONFIG_BLK_DEV_CS5530 is not set +# CONFIG_BLK_DEV_HPT34X is not set +# CONFIG_BLK_DEV_HPT366 is not set +# CONFIG_BLK_DEV_SC1200 is not set +# CONFIG_BLK_DEV_PIIX is not set +# CONFIG_BLK_DEV_IT821X is not set +# CONFIG_BLK_DEV_NS87415 is not set +# CONFIG_BLK_DEV_PDC202XX_OLD is not set +CONFIG_BLK_DEV_PDC202XX_NEW=m +# CONFIG_PDC202XX_FORCE is not set +# CONFIG_BLK_DEV_SVWKS is not set +CONFIG_BLK_DEV_SIIMAGE=m +# CONFIG_BLK_DEV_SLC90E66 is not set +# CONFIG_BLK_DEV_TRM290 is not set +# CONFIG_BLK_DEV_VIA82CXXX is not set +CONFIG_IDE_SH=y +# CONFIG_IDE_ARM is not set +CONFIG_BLK_DEV_IDEDMA=y +# CONFIG_IDEDMA_IVB is not set +CONFIG_IDEDMA_AUTO=y +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=m +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=m +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI Transport Attributes +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set + +# +# SCSI low-level drivers +# +# CONFIG_ISCSI_TCP is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_FC is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +CONFIG_SCSI_QLA2XXX=m +# CONFIG_SCSI_QLA21XX is not set +# CONFIG_SCSI_QLA22XX is not set +# CONFIG_SCSI_QLA2300 is not set +# CONFIG_SCSI_QLA2322 is not set +# CONFIG_SCSI_QLA6312 is not set +# CONFIG_SCSI_QLA24XX is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set +# CONFIG_FUSION_SPI is not set +# CONFIG_FUSION_FC is not set +# CONFIG_FUSION_SAS is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# PHY device support +# +# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_STNIC is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +CONFIG_NE2000=y +CONFIG_NET_PCI=y +CONFIG_PCNET32=m +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_DGRS is not set +# CONFIG_EEPRO100 is not set +# CONFIG_E100 is not set +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +CONFIG_8139CP=m +CONFIG_8139TOO=m +# CONFIG_8139TOO_PIO is not set +# CONFIG_8139TOO_TUNE_TWISTER is not set +CONFIG_8139TOO_8129=y +# CONFIG_8139_OLD_RX_RESET is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +CONFIG_VIA_RHINE=m +CONFIG_VIA_RHINE_MMIO=y + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +CONFIG_E1000=m +# CONFIG_E1000_NAPI is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_R8169=y +# CONFIG_R8169_NAPI is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SK98LIN is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_CHELSIO_T1 is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y + +# +# Obsolete Wireless cards support (pre-802.11) +# +# CONFIG_STRIP is not set + +# +# Wireless 802.11b ISA/PCI cards support +# +CONFIG_HERMES=m +# CONFIG_PLX_HERMES is not set +# CONFIG_TMD_HERMES is not set +# CONFIG_NORTEL_HERMES is not set +# CONFIG_PCI_HERMES is not set +# CONFIG_ATMEL is not set + +# +# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support +# +CONFIG_PRISM54=m +# CONFIG_HOSTAP is not set +CONFIG_NET_WIRELESS=y + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_I8042 is not set +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_SH_SCI_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_RTC is not set +# CONFIG_GEN_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# Multimedia Capabilities Port drivers +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Sound +# +CONFIG_SOUND=m + +# +# Advanced Linux Sound Architecture +# +# CONFIG_SND is not set + +# +# Open Sound System +# +CONFIG_SOUND_PRIME=m +# CONFIG_OBSOLETE_OSS_DRIVER is not set +# CONFIG_SOUND_FUSION is not set +# CONFIG_SOUND_ICH is not set +# CONFIG_SOUND_TRIDENT is not set +# CONFIG_SOUND_MSNDCLAS is not set +# CONFIG_SOUND_MSNDPIN is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# +# SN Devices +# + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +CONFIG_MINIX_FS=y +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_NTFS_FS=y +# CONFIG_NTFS_DEBUG is not set +CONFIG_NTFS_RW=y + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_SYSFS=y +# CONFIG_TMPFS is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_RAMFS=y +# CONFIG_RELAYFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFSD=y +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +CONFIG_NFSD_V4=y +CONFIG_NFSD_TCP=y +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +CONFIG_NLS_CODEPAGE_932=y +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_PREEMPT=y +CONFIG_DEBUG_SPINLOCK=y +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_INFO is not set +CONFIG_DEBUG_FS=y +# CONFIG_DEBUG_VM is not set +CONFIG_FRAME_POINTER=y +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_SH_STANDARD_BIOS is not set +# CONFIG_EARLY_SCIF_CONSOLE is not set +# CONFIG_KGDB is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig index 0f15216cd39d..defc13c37d48 100644 --- a/arch/sh/drivers/dma/Kconfig +++ b/arch/sh/drivers/dma/Kconfig @@ -11,6 +11,8 @@ config SH_DMA config NR_ONCHIP_DMA_CHANNELS depends on SH_DMA int "Number of on-chip DMAC channels" + default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R + default "12" if CPU_SUBTYPE_SH7780 default "4" help This allows you to specify the number of channels that the on-chip @@ -52,4 +54,3 @@ config DMA_PAGE_OPS_CHANNEL are dual-address capable. endmenu - diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c index e028a2d2a4ea..4428ee809651 100644 --- a/arch/sh/drivers/dma/dma-sh.c +++ b/arch/sh/drivers/dma/dma-sh.c @@ -11,14 +11,10 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. */ - #include -#include #include #include #include -#include -#include #include #include #include "dma-sh.h" diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile index 86d6d0660d4c..3d8078f1c05f 100644 --- a/arch/sh/drivers/pci/Makefile +++ b/arch/sh/drivers/pci/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_PCI_AUTO) += pci-auto.o obj-$(CONFIG_CPU_SUBTYPE_ST40STB1) += pci-st40.o obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o +obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ dma-dreamcast.o @@ -14,4 +15,5 @@ obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o obj-$(CONFIG_SH_BIGSUR) += ops-bigsur.o obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o +obj-$(CONFIG_SH_R7780RP) += ops-r7780rp.o fixups-r7780rp.o obj-$(CONFIG_SH_TITAN) += ops-titan.o diff --git a/arch/sh/drivers/pci/fixups-r7780rp.c b/arch/sh/drivers/pci/fixups-r7780rp.c new file mode 100644 index 000000000000..b656b562ec99 --- /dev/null +++ b/arch/sh/drivers/pci/fixups-r7780rp.c @@ -0,0 +1,39 @@ +/* + * arch/sh/drivers/pci/fixups-r7780rp.c + * + * Highlander R7780RP-1 PCI fixups + * + * Copyright (C) 2003 Lineo uSolutions, Inc. + * Copyright (C) 2004 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include "pci-sh7780.h" +#include + +int pci_fixup_pcic(void) +{ + outl(0x000043ff, PCI_REG(SH7780_PCIIMR)); + outl(0x0000380f, PCI_REG(SH7780_PCIAINTM)); + + outl(0xfbb00047, PCI_REG(SH7780_PCICMD)); + outl(0x00000000, PCI_REG(SH7780_PCIIBAR)); + + outl(0x00011912, PCI_REG(SH7780_PCISVID)); + outl(0x08000000, PCI_REG(SH7780_PCICSCR0)); + outl(0x0000001b, PCI_REG(SH7780_PCICSAR0)); + outl(0xfd000000, PCI_REG(SH7780_PCICSCR1)); + outl(0x0000000f, PCI_REG(SH7780_PCICSAR1)); + + outl(0xfd000000, PCI_REG(SH7780_PCIMBR0)); + outl(0x00fc0000, PCI_REG(SH7780_PCIMBMR0)); + + /* Set IOBR for windows containing area specified in pci.h */ + outl((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE-1)), PCI_REG(SH7780_PCIIOBR)); + outl(((SH7780_PCI_IO_SIZE-1) & (7<<18)), PCI_REG(SH7780_PCIIOBMR)); + + return 0; +} + diff --git a/arch/sh/drivers/pci/ops-r7780rp.c b/arch/sh/drivers/pci/ops-r7780rp.c new file mode 100644 index 000000000000..3254c4e917a9 --- /dev/null +++ b/arch/sh/drivers/pci/ops-r7780rp.c @@ -0,0 +1,77 @@ +/* + * Author: Ian DaSilva (idasilva@mvista.com) + * + * Highly leveraged from pci-bigsur.c, written by Dustin McIntire. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * PCI initialization for the Renesas SH7780 Highlander R7780RP-1 board + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include "pci-sh7780.h" +#include + +int __init pcibios_map_platform_irq(u8 slot, u8 pin) +{ + switch (slot) { + case 0: return IRQ_PCISLOT1; /* PCI Interrupt #1 */ + case 1: return IRQ_PCISLOT2; /* PCI Interrupt #2 */ + case 2: return IRQ_PCISLOT3; /* PCI Interrupt #3 */ + case 3: return IRQ_PCISLOT4; /* PCI Interrupt E4 */ + default: + printk("PCI: Bad IRQ mapping request for slot %d, func %d\n", slot, pin-1); + return -1; + } +} + +static struct resource sh7780_io_resource = { + .name = "SH7780_IO", + .start = 0x2000, + .end = 0x2000 + SH7780_PCI_IO_SIZE - 1, + .flags = IORESOURCE_IO +}; + +static struct resource sh7780_mem_resource = { + .name = "SH7780_mem", + .start = SH7780_PCI_MEMORY_BASE, + .end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1, + .flags = IORESOURCE_MEM +}; + +extern struct pci_ops sh7780_pci_ops; + +struct pci_channel board_pci_channels[] = { + { &sh7780_pci_ops, &sh7780_io_resource, &sh7780_mem_resource, 0, 0xff }, + { NULL, NULL, NULL, 0, 0 }, +}; +EXPORT_SYMBOL(board_pci_channels); + +static struct sh7780_pci_address_map sh7780_pci_map = { + .window0 = { + .base = SH7780_CS2_BASE_ADDR, + .size = 0x04000000, + }, + + .window1 = { + .base = SH7780_CS3_BASE_ADDR, + .size = 0x04000000, + }, + + .flags = SH7780_PCIC_NO_RESET, +}; + +int __init pcibios_init_platform(void) +{ + return sh7780_pcic_init(&sh7780_pci_map); +} + diff --git a/arch/sh/drivers/pci/pci-auto.c b/arch/sh/drivers/pci/pci-auto.c index 4cef4d1d8c84..d55e46618549 100644 --- a/arch/sh/drivers/pci/pci-auto.c +++ b/arch/sh/drivers/pci/pci-auto.c @@ -45,11 +45,11 @@ #include #include -#undef DEBUG -#ifdef DEBUG +#define DEBUG +#ifdef DEBUG #define DBG(x...) printk(x) #else -#define DBG(x...) +#define DBG(x...) #endif /* @@ -102,7 +102,7 @@ static u32 pciauto_upper_iospc; static u32 pciauto_lower_memspc; static u32 pciauto_upper_memspc; -static void __init +static void __init pciauto_setup_bars(struct pci_channel *hose, int top_bus, int current_bus, @@ -116,7 +116,6 @@ pciauto_setup_bars(struct pci_channel *hose, int found_mem64 = 0; for (bar = PCI_BASE_ADDRESS_0; bar <= bar_limit; bar+=4) { -#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D) u32 bar_addr; /* Read the old BAR value */ @@ -125,7 +124,6 @@ pciauto_setup_bars(struct pci_channel *hose, pci_devfn, bar, &bar_addr); -#endif /* Tickle the BAR and get the response */ early_write_config_dword(hose, top_bus, @@ -140,8 +138,7 @@ pciauto_setup_bars(struct pci_channel *hose, bar, &bar_response); -#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D) - /* + /* * Write the old BAR value back out, only update the BAR * if we implicitly want resources to be updated, which * is done by the generic code further down. -- PFM. @@ -151,7 +148,6 @@ pciauto_setup_bars(struct pci_channel *hose, pci_devfn, bar, bar_addr); -#endif /* If BAR is not implemented go to the next BAR */ if (!bar_response) @@ -177,7 +173,7 @@ retry: PCI_BASE_ADDRESS_MEM_TYPE_64) found_mem64 = 1; - addr_mask = PCI_BASE_ADDRESS_MEM_MASK; + addr_mask = PCI_BASE_ADDRESS_MEM_MASK; upper_limit = &pciauto_upper_memspc; lower_limit = &pciauto_lower_memspc; DBG(" Mem"); @@ -193,22 +189,22 @@ retry: if ((bar_value + bar_size) > *upper_limit) { if (bar_response & PCI_BASE_ADDRESS_SPACE) { if (io_resource_inuse->child) { - io_resource_inuse = + io_resource_inuse = io_resource_inuse->child; - pciauto_lower_iospc = + pciauto_lower_iospc = io_resource_inuse->start; - pciauto_upper_iospc = + pciauto_upper_iospc = io_resource_inuse->end + 1; goto retry; } } else { if (mem_resource_inuse->child) { - mem_resource_inuse = + mem_resource_inuse = mem_resource_inuse->child; - pciauto_lower_memspc = + pciauto_lower_memspc = mem_resource_inuse->start; - pciauto_upper_memspc = + pciauto_upper_memspc = mem_resource_inuse->end + 1; goto retry; } @@ -230,7 +226,7 @@ retry: * If we are a 64-bit decoder then increment to the * upper 32 bits of the bar and force it to locate * in the lower 4GB of memory. - */ + */ if (found_mem64) { bar += 4; early_write_config_dword(hose, top_bus, @@ -362,7 +358,7 @@ pciauto_postscan_setup_cardbus_bridge(struct pci_channel *hose, { u32 temp; -#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D) +#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D) && !defined(CONFIG_SH_R7780RP) /* * [jsun] we always bump up baselines a little, so that if there * nothing behind P2P bridge, we don't wind up overlapping IO/MEM @@ -396,7 +392,7 @@ pciauto_postscan_setup_cardbus_bridge(struct pci_channel *hose, * configured by this routine to happily live behind a * P2P bridge in a system. */ -#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D) +#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D) || defined(CONFIG_SH_R7780RP) pciauto_lower_memspc += 0x00400000; pciauto_lower_iospc += 0x00004000; #endif @@ -433,12 +429,12 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus) int devfn_stop = 0xff; sub_bus = current_bus; - + if (hose->first_devfn) devfn_start = hose->first_devfn; if (hose->last_devfn) devfn_stop = hose->last_devfn; - + for (pci_devfn=devfn_start; pci_devfn> 16) == PCI_CLASS_BRIDGE_PCI) { DBG(" Bridge: primary=%.2x, secondary=%.2x\n", current_bus, sub_bus + 1); -#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D) +#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D) || defined(CONFIG_SH_R7780RP) pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_1); #endif pciauto_prescan_setup_bridge(hose, top_bus, current_bus, @@ -490,10 +486,10 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus) DBG("PCI Autoconfig: Found CardBus bridge, device %d function %d\n", PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn)); /* Place CardBus Socket/ExCA registers */ pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_0); - + pciauto_prescan_setup_cardbus_bridge(hose, top_bus, current_bus, pci_devfn, sub_bus); - + DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n", sub_bus + 1, pciauto_lower_iospc, pciauto_lower_memspc); diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c index 682f3dae305d..65093ec1b55e 100644 --- a/arch/sh/drivers/pci/pci-sh7751.c +++ b/arch/sh/drivers/pci/pci-sh7751.c @@ -223,7 +223,7 @@ static int __init __area_sdram_check(unsigned int area) word = inl(SH7751_BCR1); /* check BCR for SDRAM in area */ - if(((word >> area) & 1) == 0) { + if (((word >> area) & 1) == 0) { printk("PCI: Area %d is not configured for SDRAM. BCR1=0x%x\n", area, word); return 0; @@ -232,7 +232,7 @@ static int __init __area_sdram_check(unsigned int area) word = (u16)inw(SH7751_BCR2); /* check BCR2 for 32bit SDRAM interface*/ - if(((word >> (area << 1)) & 0x3) != 0x3) { + if (((word >> (area << 1)) & 0x3) != 0x3) { printk("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%x\n", area, word); return 0; diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c new file mode 100644 index 000000000000..e09721330ac2 --- /dev/null +++ b/arch/sh/drivers/pci/pci-sh7780.c @@ -0,0 +1,341 @@ +/* + * Low-Level PCI Support for the SH7780 + * + * Dustin McIntire (dustin@sensoria.com) + * Derived from arch/i386/kernel/pci-*.c which bore the message: + * (c) 1999--2000 Martin Mares + * + * Ported to the new API by Paul Mundt + * With cleanup by Paul van Gool + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + */ + +#undef DEBUG + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include "pci-sh7780.h" + +static unsigned int pci_probe = PCI_PROBE_CONF1; +extern int pci_fixup_pcic(void); + +/* + * Direct access to PCI hardware... + */ + +#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3)) + +/* + * Functions for accessing PCI configuration space with type 1 accesses + */ +static int sh7780_pci_read(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 *val) +{ + unsigned long flags; + u32 data; + + /* + * PCIPDR may only be accessed as 32 bit words, + * so we must do byte alignment by hand + */ + local_irq_save(flags); + outl(CONFIG_CMD(bus, devfn, where), PCI_REG(SH7780_PCIPAR)); + data = inl(PCI_REG(SH7780_PCIPDR)); + local_irq_restore(flags); + + switch (size) { + case 1: + *val = (data >> ((where & 3) << 3)) & 0xff; + break; + case 2: + *val = (data >> ((where & 2) << 3)) & 0xffff; + break; + case 4: + *val = data; + break; + default: + return PCIBIOS_FUNC_NOT_SUPPORTED; + } + + return PCIBIOS_SUCCESSFUL; +} + +/* + * Since SH7780 only does 32bit access we'll have to do a read, + * mask,write operation. + * We'll allow an odd byte offset, though it should be illegal. + */ +static int sh7780_pci_write(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 val) +{ + unsigned long flags; + int shift; + u32 data; + + local_irq_save(flags); + outl(CONFIG_CMD(bus, devfn, where), PCI_REG(SH7780_PCIPAR)); + data = inl(PCI_REG(SH7780_PCIPDR)); + local_irq_restore(flags); + + switch (size) { + case 1: + shift = (where & 3) << 3; + data &= ~(0xff << shift); + data |= ((val & 0xff) << shift); + break; + case 2: + shift = (where & 2) << 3; + data &= ~(0xffff << shift); + data |= ((val & 0xffff) << shift); + break; + case 4: + data = val; + break; + default: + return PCIBIOS_FUNC_NOT_SUPPORTED; + } + + outl(data, PCI_REG(SH7780_PCIPDR)); + + return PCIBIOS_SUCCESSFUL; +} + +#undef CONFIG_CMD + +struct pci_ops sh7780_pci_ops = { + .read = sh7780_pci_read, + .write = sh7780_pci_write, +}; + +static int __init pci_check_direct(void) +{ + unsigned int tmp, id; + + outl(0x00000001, SH7780_PCI_VCR2); /* Enable PCIC */ + + /* check for SH7780/SH7780R hardware */ + id = inl(PCI_REG(SH7780_PCIVID)); + if ((id != ((SH7780_DEVICE_ID << 16) | SH7780_VENDOR_ID)) && + (id != ((SH7781_DEVICE_ID << 16) | SH7780_VENDOR_ID))) { + printk(KERN_ERR "PCI: This is not an SH7780 (%x)\n", id); + return -ENODEV; + } + + /* + * Check if configuration works. + */ + if (pci_probe & PCI_PROBE_CONF1) { + tmp = inl(PCI_REG(SH7780_PCIPAR)); + outl(0x80000000, PCI_REG(SH7780_PCIPAR)); + if (inl(PCI_REG(SH7780_PCIPAR)) == 0x80000000) { + outl(tmp, PCI_REG(SH7780_PCIPAR)); + printk(KERN_INFO "PCI: Using configuration type 1\n"); + request_region(PCI_REG(SH7780_PCIPAR), 8, "PCI conf1"); + return 0; + } + outl(tmp, PCI_REG(SH7780_PCIPAR)); + } + + pr_debug("PCI: pci_check_direct failed\n"); + return -EINVAL; +} + +/***************************************************************************************/ + +/* + * Handle bus scanning and fixups .... + */ + +static void __init pci_fixup_ide_bases(struct pci_dev *d) +{ + int i; + + /* + * PCI IDE controllers use non-standard I/O port decoding, respect it. + */ + if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) + return; + pr_debug("PCI: IDE base address fixup for %s\n", pci_name(d)); + for(i=0; i<4; i++) { + struct resource *r = &d->resource[i]; + if ((r->start & ~0x80) == 0x374) { + r->start |= 2; + r->end = r->start; + } + } +} + +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); + +/* + * Called after each bus is probed, but before its children + * are examined. + */ + +void __init pcibios_fixup_bus(struct pci_bus *b) +{ + pci_read_bridge_bases(b); +} + +/* + * Initialization. Try all known PCI access methods. Note that we support + * using both PCI BIOS and direct access: in such cases, we use I/O ports + * to access config space. + * + * Note that the platform specific initialization (BSC registers, and memory + * space mapping) will be called via the machine vectors (sh_mv.mv_pci_init()) if it + * exists and via the platform defined function pcibios_init_platform(). + * See pci_bigsur.c for implementation; + * + * The BIOS version of the pci functions is not yet implemented but it is left + * in for completeness. Currently an error will be genereated at compile time. + */ + +static int __init sh7780_pci_init(void) +{ + int ret; + + pr_debug("PCI: Starting intialization.\n"); + + /* Setup the INTC */ + ctrl_outl(0x00200000, INTC_ICR0); /* INTC SH-4 Mode */ + ctrl_outl(0x00078000, INTC_INT2MSKCR); /* enable PCIINTA - PCIINTD */ + ctrl_outl(0x40000000, INTC_INTMSK1); /* disable IRL4-7 Interrupt */ + ctrl_outl(0x0000fffe, INTC_INTMSK2); /* disable IRL4-7 Interrupt */ + ctrl_outl(0x80000000, INTC_INTMSKCLR1); /* enable IRL0-3 Interrupt */ + ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); /* enable IRL0-3 Interrupt */ + + if ((ret = pci_check_direct()) != 0) + return ret; + + return pcibios_init_platform(); +} + +core_initcall(sh7780_pci_init); + +int __init sh7780_pcic_init(struct sh7780_pci_address_map *map) +{ + u32 word; + + /* + * This code is unused for some boards as it is done in the + * bootloader and doing it here means the MAC addresses loaded + * by the bootloader get lost. + */ + if (!(map->flags & SH7780_PCIC_NO_RESET)) { + /* toggle PCI reset pin */ + word = SH7780_PCICR_PREFIX | SH7780_PCICR_PRST; + outl(word,PCI_REG(SH7780_PCICR)); + /* Wait for a long time... not 1 sec. but long enough */ + mdelay(100); + word = SH7780_PCICR_PREFIX; + outl(word,PCI_REG(SH7780_PCICR)); + } + + /* set the command/status bits to: + * Wait Cycle Control + Parity Enable + Bus Master + + * Mem space enable + */ + outl(0x00000046, PCI_REG(SH7780_PCICMD)); + + /* define this host as the host bridge */ + word = SH7780_PCI_HOST_BRIDGE << 24; + outl(word, PCI_REG(SH7780_PCIRID)); + + /* Set IO and Mem windows to local address + * Make PCI and local address the same for easy 1 to 1 mapping + * Window0 = map->window0.size @ non-cached area base = SDRAM + * Window1 = map->window1.size @ cached area base = SDRAM + */ + word = ((map->window0.size - 1) & 0x1ff00001) | 0x01; + outl(0x07f00001, PCI_REG(SH7780_PCILSR0)); + word = ((map->window1.size - 1) & 0x1ff00001) | 0x01; + outl(0x00000001, PCI_REG(SH7780_PCILSR1)); + /* Set the values on window 0 PCI config registers */ + word = P2SEGADDR(map->window0.base); + outl(0xa8000000, PCI_REG(SH7780_PCILAR0)); + outl(0x08000000, PCI_REG(SH7780_PCIMBAR0)); + /* Set the values on window 1 PCI config registers */ + word = P2SEGADDR(map->window1.base); + outl(0x00000000, PCI_REG(SH7780_PCILAR1)); + outl(0x00000000, PCI_REG(SH7780_PCIMBAR1)); + + /* Map IO space into PCI IO window + * The IO window is 64K-PCIBIOS_MIN_IO in size + * IO addresses will be translated to the + * PCI IO window base address + */ + PCIDBG(3,"PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n", PCIBIOS_MIN_IO, + (64*1024), SH7780_PCI_IO_BASE+PCIBIOS_MIN_IO); + + /* NOTE: I'm ignoring the PCI error IRQs for now.. + * TODO: add support for the internal error interrupts and + * DMA interrupts... + */ + +#ifdef CONFIG_SH_R7780RP + pci_fixup_pcic(); +#endif + + /* SH7780 init done, set central function init complete */ + /* use round robin mode to stop a device starving/overruning */ + word = SH7780_PCICR_PREFIX | SH7780_PCICR_CFIN | /* SH7780_PCICR_ARBM |*/ SH7780_PCICR_FTO; + outl(word, PCI_REG(SH7780_PCICR)); + + return 1; +} + +char * __init pcibios_setup(char *str) +{ + if (!strcmp(str, "off")) { + pci_probe = 0; + return NULL; + } + + return str; +} + +/* + * IRQ functions + */ +static u8 __init sh7780_no_swizzle(struct pci_dev *dev, u8 *pin) +{ + /* no swizzling */ + return PCI_SLOT(dev->devfn); +} + +static int sh7780_pci_lookup_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + int irq = -1; + + /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */ + irq = pcibios_map_platform_irq(slot,pin); + if( irq < 0 ) { + pr_debug("PCI: Error mapping IRQ on device %s\n", pci_name(dev)); + return irq; + } + + pr_debug("Setting IRQ for slot %s to %d\n", pci_name(dev), irq); + + return irq; +} + +void __init pcibios_fixup_irqs(void) +{ + pci_fixup_irqs(sh7780_no_swizzle, sh7780_pci_lookup_irq); +} + diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h new file mode 100644 index 000000000000..750d5d7753a2 --- /dev/null +++ b/arch/sh/drivers/pci/pci-sh7780.h @@ -0,0 +1,168 @@ +/* + * Low-Level PCI Support for SH7780 targets + * + * Dustin McIntire (dustin@sensoria.com) (c) 2001 + * Paul Mundt (lethal@linux-sh.org) (c) 2003 + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + */ + +#ifndef _PCI_SH7780_H_ +#define _PCI_SH7780_H_ + +#include + +/* set debug level 4=verbose...1=terse */ +//#define DEBUG_PCI 3 +#undef DEBUG_PCI + +#ifdef DEBUG_PCI +#define PCIDBG(n, x...) { if(DEBUG_PCI>=n) printk(x); } +#else +#define PCIDBG(n, x...) +#endif + +/* startup values */ +#define PCI_PROBE_BIOS 1 +#define PCI_PROBE_CONF1 2 +#define PCI_PROBE_CONF2 4 +#define PCI_NO_SORT 0x100 +#define PCI_BIOS_SORT 0x200 +#define PCI_NO_CHECKS 0x400 +#define PCI_ASSIGN_ROMS 0x1000 +#define PCI_BIOS_IRQ_SCAN 0x2000 + +/* Platform Specific Values */ +#define SH7780_VENDOR_ID 0x1912 +#define SH7780_DEVICE_ID 0x0002 +#define SH7781_DEVICE_ID 0x0001 + +/* SH7780 Control Registers */ +#define SH7780_PCI_VCR0 0xFE000000 +#define SH7780_PCI_VCR1 0xFE000004 +#define SH7780_PCI_VCR2 0xFE000008 + +/* SH7780 Specific Values */ +#define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */ +#define SH7780_PCI_CONFIG_SIZE 0x01000000 /* Config space size */ +#define SH7780_PCI_MEMORY_BASE 0xFD000000 /* Memory space base addr */ +#define SH7780_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ +#if 1 +#define SH7780_PCI_IO_BASE 0xFE400000 /* IO space base address */ +#define SH7780_PCI_IO_SIZE 0x00400000 /* Size of IO window */ +#else +#define SH7780_PCI_IO_BASE 0xFE200000 /* IO space base address */ +#define SH7780_PCI_IO_SIZE 0x00200000 /* Size of IO window */ +#endif + +#define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */ +#define PCI_REG(n) (SH7780_PCIREG_BASE+n) + +/* SH7780 PCI Config Registers */ +#define SH7780_PCIVID 0x000 /* Vendor ID */ +#define SH7780_PCIDID 0x002 /* Device ID */ +#define SH7780_PCICMD 0x004 /* Command */ +#define SH7780_PCISTATUS 0x006 /* Status */ +#define SH7780_PCIRID 0x008 /* Revision ID */ +#define SH7780_PCIPIF 0x009 /* Program Interface */ +#define SH7780_PCISUB 0x00a /* Sub class code */ +#define SH7780_PCIBCC 0x00b /* Base class code */ +#define SH7780_PCICLS 0x00c /* Cache line size */ +#define SH7780_PCILTM 0x00d /* latency timer */ +#define SH7780_PCIHDR 0x00e /* Header type */ +#define SH7780_PCIBIST 0x00f /* BIST */ +#define SH7780_PCIIBAR 0x010 /* IO Base address */ +#define SH7780_PCIMBAR0 0x014 /* Memory base address0 */ +#define SH7780_PCIMBAR1 0x018 /* Memory base address1 */ +#define SH7780_PCISVID 0x02c /* Sub system vendor ID */ +#define SH7780_PCISID 0x02e /* Sub system ID */ +#define SH7780_PCICP 0x034 +#define SH7780_PCIINTLINE 0x03c /* Interrupt line */ +#define SH7780_PCIINTPIN 0x03d /* Interrupt pin */ +#define SH7780_PCIMINGNT 0x03e /* Minumum grand */ +#define SH7780_PCIMAXLAT 0x03f /* Maxmum latency */ +#define SH7780_PCICID 0x040 +#define SH7780_PCINIP 0x041 +#define SH7780_PCIPMC 0x042 +#define SH7780_PCIPMCSR 0x044 +#define SH7780_PCIPMCSR_BSE 0x046 +#define SH7780_PCICDD 0x047 + +/* SH7780 PCI Local Registers */ +#define SH7780_PCICR 0x100 /* PCI Control Register */ + #define SH7780_PCICR_PREFIX 0xA5000000 /* CR prefix for write */ + #define SH7780_PCICR_PFCS 0x00000800 /* TRDY/IRDY Enable */ + #define SH7780_PCICR_FTO 0x00000400 /* TRDY/IRDY Enable */ + #define SH7780_PCICR_PFE 0x00000200 /* Target Read Single */ + #define SH7780_PCICR_TBS 0x00000100 /* Target Byte Swap */ + #define SH7780_PCICR_ARBM 0x00000040 /* PCI Arbitration Mode */ + #define SH7780_PCICR_IOCS 0x00000004 /* INTA output assert */ + #define SH7780_PCICR_PRST 0x00000002 /* PCI Reset Assert */ + #define SH7780_PCICR_CFIN 0x00000001 /* Central Fun. Init Done */ +#define SH7780_PCILSR0 0x104 /* PCI Local Space Register0 */ +#define SH7780_PCILSR1 0x108 /* PCI Local Space Register1 */ +#define SH7780_PCILAR0 0x10C /* PCI Local Address Register1 */ +#define SH7780_PCILAR1 0x110 /* PCI Local Address Register1 */ +#define SH7780_PCIIR 0x114 /* PCI Interrupt Register */ +#define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */ +#define SH7780_PCIAIR 0x11C /* Error Address Register */ +#define SH7780_PCICIR 0x120 /* Error Command/Data Register */ +#define SH7780_PCIAINT 0x130 /* Arbiter Interrupt Register */ +#define SH7780_PCIAINTM 0x134 /* Arbiter Int. Mask Register */ +#define SH7780_PCIBMIR 0x138 /* Error Bus Master Register */ +#define SH7780_PCIPAR 0x1C0 /* PIO Address Register */ +#define SH7780_PCIPINT 0x1CC /* Power Management Int. Register */ +#define SH7780_PCIPINTM 0x1D0 /* Power Management Mask Register */ +#define SH7780_PCIMBR0 0x1E0 /* Memory Bank0 Register */ +#define SH7780_PCIMBMR0 0x1E4 /* Memory Bank0 Mask Register */ +#define SH7780_PCIMBR1 0x1E8 /* Memory Bank1 Register */ +#define SH7780_PCIMBMR1 0x1EC /* Memory Bank1 Mask Register */ +#define SH7780_PCIMBR2 0x1F0 /* Memory Bank2 Register */ +#define SH7780_PCIMBMR2 0x1F4 /* Memory Bank2 Mask Register */ +#define SH7780_PCIIOBR 0x1F8 /* Bank Register */ +#define SH7780_PCIIOBMR 0x1FC /* Bank Mask Register */ +#define SH7780_PCICSCR0 0x210 /* Cache Snoop1 Cnt. Register */ +#define SH7780_PCICSCR1 0x214 /* Cache Snoop2 Cnt. Register */ +#define SH7780_PCICSAR0 0x218 /* Cache Snoop1 Addr. Register */ +#define SH7780_PCICSAR1 0x21C /* Cache Snoop2 Addr. Register */ +#define SH7780_PCIPDR 0x220 /* Port IO Data Register */ + +/* General Memory Config Addresses */ +#define SH7780_CS0_BASE_ADDR 0x0 +#define SH7780_MEM_REGION_SIZE 0x04000000 +#define SH7780_CS1_BASE_ADDR (SH7780_CS0_BASE_ADDR + SH7780_MEM_REGION_SIZE) +#define SH7780_CS2_BASE_ADDR (SH7780_CS1_BASE_ADDR + SH7780_MEM_REGION_SIZE) +#define SH7780_CS3_BASE_ADDR (SH7780_CS2_BASE_ADDR + SH7780_MEM_REGION_SIZE) +#define SH7780_CS4_BASE_ADDR (SH7780_CS3_BASE_ADDR + SH7780_MEM_REGION_SIZE) +#define SH7780_CS5_BASE_ADDR (SH7780_CS4_BASE_ADDR + SH7780_MEM_REGION_SIZE) +#define SH7780_CS6_BASE_ADDR (SH7780_CS5_BASE_ADDR + SH7780_MEM_REGION_SIZE) + +/* General PCI values */ +#define SH7780_PCI_HOST_BRIDGE 0x6 + +/* Flags */ +#define SH7780_PCIC_NO_RESET 0x0001 + +/* External functions defined per platform i.e. Big Sur, SE... (these could be routed + * through the machine vectors... */ +extern int pcibios_init_platform(void); +extern int pcibios_map_platform_irq(u8 slot, u8 pin); + +struct sh7780_pci_address_space { + unsigned long base; + unsigned long size; +}; + +struct sh7780_pci_address_map { + struct sh7780_pci_address_space window0; + struct sh7780_pci_address_space window1; + unsigned long flags; +}; + +/* arch/sh/drivers/pci/pci-sh7780.c */ +extern int sh7780_pcic_init(struct sh7780_pci_address_map *map); + +#endif /* _PCI_SH7780_H_ */ + diff --git a/arch/sh/kernel/cpu/irq/intc2.c b/arch/sh/kernel/cpu/irq/intc2.c index 30064bf6e154..e30e4b7aa70e 100644 --- a/arch/sh/kernel/cpu/irq/intc2.c +++ b/arch/sh/kernel/cpu/irq/intc2.c @@ -241,9 +241,9 @@ static struct intc2_init { /* 110-111 reserved/unused */ #elif defined(CONFIG_CPU_SUBTYPE_SH7780) { TIMER_IRQ, 0, 24, 0, INTC_TMU0_MSK, 2}, -#ifdef CONFIG_SH_RTC - { RTC_IRQ, 4, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY }, -#endif + { 21, 1, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY }, + { 22, 1, 1, 0, INTC_RTC_MSK, TIMER_PRIORITY }, + { 23, 1, 2, 0, INTC_RTC_MSK, TIMER_PRIORITY }, { SCIF0_ERI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY }, { SCIF0_RXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY }, { SCIF0_BRI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY }, diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types index 01ae394a6599..1f7f2c255ca2 100644 --- a/arch/sh/tools/mach-types +++ b/arch/sh/tools/mach-types @@ -26,4 +26,6 @@ EDOSK7705 SH_EDOSK7705 SH4202_MICRODEV SH_SH4202_MICRODEV SH03 SH_SH03 LANDISK SH_LANDISK +R7780RP SH_R7780RP +R7780MP SH_R7780MP TITAN SH_TITAN diff --git a/include/asm-sh/cpu-sh4/addrspace.h b/include/asm-sh/cpu-sh4/addrspace.h index 727634d886ce..bb2e1b03060c 100644 --- a/include/asm-sh/cpu-sh4/addrspace.h +++ b/include/asm-sh/cpu-sh4/addrspace.h @@ -22,5 +22,8 @@ #define P4SEG_TLB_DATA 0xf7000000 #define P4SEG_REG_BASE 0xff000000 +#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ +#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ + #endif /* __ASM_CPU_SH4_ADDRSPACE_H */ diff --git a/include/asm-sh/cpu-sh4/dma-sh7780.h b/include/asm-sh/cpu-sh4/dma-sh7780.h new file mode 100644 index 000000000000..6c90d28331b2 --- /dev/null +++ b/include/asm-sh/cpu-sh4/dma-sh7780.h @@ -0,0 +1,39 @@ +#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H +#define __ASM_SH_CPU_SH4_DMA_SH7780_H + +#define REQ_HE 0x000000C0 +#define REQ_H 0x00000080 +#define REQ_LE 0x00000040 +#define TM_BURST 0x0000020 +#define TS_8 0x00000000 +#define TS_16 0x00000008 +#define TS_32 0x00000010 +#define TS_16BLK 0x00000018 +#define TS_32BLK 0x00100000 + +/* + * The SuperH DMAC supports a number of transmit sizes, we list them here, + * with their respective values as they appear in the CHCR registers. + * + * Defaults to a 64-bit transfer size. + */ +enum { + XMIT_SZ_8BIT, + XMIT_SZ_16BIT, + XMIT_SZ_32BIT, + XMIT_SZ_128BIT, + XMIT_SZ_256BIT, +}; + +/* + * The DMA count is defined as the number of bytes to transfer. + */ +static unsigned int __attribute__ ((used)) ts_shift[] = { + [XMIT_SZ_8BIT] = 0, + [XMIT_SZ_16BIT] = 1, + [XMIT_SZ_32BIT] = 2, + [XMIT_SZ_128BIT] = 4, + [XMIT_SZ_256BIT] = 5, +}; + +#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */ diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h index 0dfe61f14802..3e4b3e6d80c0 100644 --- a/include/asm-sh/cpu-sh4/dma.h +++ b/include/asm-sh/cpu-sh4/dma.h @@ -1,11 +1,17 @@ #ifndef __ASM_CPU_SH4_DMA_H #define __ASM_CPU_SH4_DMA_H +#define DMAOR_INIT ( 0x8000 | DMAOR_DME ) + #ifdef CONFIG_CPU_SH4A #define SH_DMAC_BASE 0xfc808020 + +#define CHCR_TS_MASK 0x18 +#define CHCR_TS_SHIFT 3 + +#include #else #define SH_DMAC_BASE 0xffa00000 -#endif /* Definitions for the SuperH DMAC */ #define TM_BURST 0x0000080 @@ -19,8 +25,6 @@ #define DMAOR_COD 0x00000008 -#define DMAOR_INIT ( 0x8000 | DMAOR_DME ) - /* * The SuperH DMAC supports a number of transmit sizes, we list them here, * with their respective values as they appear in the CHCR registers. @@ -45,5 +49,6 @@ static unsigned int ts_shift[] __attribute__ ((used)) = { [XMIT_SZ_32BIT] = 2, [XMIT_SZ_256BIT] = 5, }; +#endif #endif /* __ASM_CPU_SH4_DMA_H */ diff --git a/include/asm-sh/hs7751rvoip/hs7751rvoip.h b/include/asm-sh/hs7751rvoip/hs7751rvoip.h index 69faf0171473..c4cff9d33927 100644 --- a/include/asm-sh/hs7751rvoip/hs7751rvoip.h +++ b/include/asm-sh/hs7751rvoip/hs7751rvoip.h @@ -19,8 +19,6 @@ #define PA_OUTPORTR 0xa400000e /* Output Port Reguster */ #define PA_VERREG 0xa4000014 /* FPGA Version Register */ -#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ -#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ #define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ #define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ diff --git a/include/asm-sh/irq-sh7780.h b/include/asm-sh/irq-sh7780.h index 7f90315cd830..895c5780e454 100644 --- a/include/asm-sh/irq-sh7780.h +++ b/include/asm-sh/irq-sh7780.h @@ -145,11 +145,6 @@ #define TMU_CH5_IPR_POS 1 #define TMU_CH5_PRIORITY 2 -#define RTC_IRQ 22 -#define RTC_IPR_ADDR INTC_INT2PRI1 -#define RTC_IPR_POS 0 -#define RTC_PRIORITY TIMER_PRIORITY - /* SCIF0 */ #define SCIF0_ERI_IRQ 40 #define SCIF0_RXI_IRQ 41 diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index 611e67cd0627..7e8455b1cb44 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -577,7 +577,7 @@ extern int ipr_irq_demux(int irq); #define NR_INTC2_IRQS 64 #elif defined(CONFIG_CPU_SUBTYPE_SH7780) #define INTC2_BASE 0xffd40000 -#define INTC2_FIRST_IRQ 22 +#define INTC2_FIRST_IRQ 21 #define INTC2_INTMSK_OFFSET (0x38) #define INTC2_INTMSKCLR_OFFSET (0x3c) #define NR_INTC2_IRQS 60 diff --git a/include/asm-sh/landisk/iodata_landisk.h b/include/asm-sh/landisk/iodata_landisk.h index 9db3cdfe6776..c74d3c73f377 100644 --- a/include/asm-sh/landisk/iodata_landisk.h +++ b/include/asm-sh/landisk/iodata_landisk.h @@ -22,8 +22,6 @@ /* 2003.10.31 I-O DATA NSD NWG add. for shutdown port clear */ #define PA_PWRINT_CLR 0xb0000006 /* Shutdown Interrupt clear Register */ -#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ -#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ #define PA_LCD_CLRDSP 0x00 /* LCD Clear Display Offset */ #define PA_LCD_RTNHOME 0x00 /* LCD Return Home Offset */ #define PA_LCD_ENTMODE 0x00 /* LCD Entry Mode Offset */ diff --git a/include/asm-sh/r7780rp/ide.h b/include/asm-sh/r7780rp/ide.h new file mode 100644 index 000000000000..a1ed78e0f617 --- /dev/null +++ b/include/asm-sh/r7780rp/ide.h @@ -0,0 +1,8 @@ +#ifndef __ASM_SH_R7780RP_IDE_H +#define __ASM_SH_R7780RP_IDE_H + +/* Nothing to see here.. */ +#include + +#endif /* __ASM_SH_R7780RP_IDE_H */ + diff --git a/include/asm-sh/r7780rp/r7780rp.h b/include/asm-sh/r7780rp/r7780rp.h new file mode 100644 index 000000000000..f95d9dba31a2 --- /dev/null +++ b/include/asm-sh/r7780rp/r7780rp.h @@ -0,0 +1,177 @@ +#ifndef __ASM_SH_RENESAS_R7780RP_H +#define __ASM_SH_RENESAS_R7780RP_H + +/* + * linux/include/asm-sh/r7780rp.h + * + * Copyright (C) 2000 Atom Create Engineering Co., Ltd. + * + * Renesas Solutions Highlander R7780RP support + */ + +/* Box specific addresses. */ +#if defined(CONFIG_SH_R7780MP) +#define PA_BCR 0xa4000000 /* FPGA */ +#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ +#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */ +#define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */ +#define PA_IRLPRI2 (PA_BCR+0x0006) /* Interrupt Priorty 2 */ +#define PA_IRLPRI3 (PA_BCR+0x0008) /* Interrupt Priorty 3 */ +#define PA_IRLPRI4 (PA_BCR+0x000a) /* Interrupt Priorty 4 */ +#define PA_RSTCTL (PA_BCR+0x000c) /* Reset Control */ +#define PA_PCIBD (PA_BCR+0x000e) /* PCI Board detect control */ +#define PA_PCICD (PA_BCR+0x0010) /* PCI Conector detect control */ +#define PA_EXTGIO (PA_BCR+0x0016) /* Extension GPIO Control */ +#define PA_IVDRMON (PA_BCR+0x0018) /* iVDR Moniter control */ +#define PA_IVDRCTL (PA_BCR+0x001a) /* iVDR control */ +#define PA_OBLED (PA_BCR+0x001c) /* On Board LED control */ +#define PA_OBSW (PA_BCR+0x001e) /* On Board Switch control */ +#define PA_AUDIOSEL (PA_BCR+0x0020) /* Sound Interface Select control */ +#define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */ +#define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */ +#define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */ +#define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */ +#define PA_TPXPOS (PA_BCR+0x0106) /* Touch Panel X position control */ +#define PA_TPYPOS (PA_BCR+0x0108) /* Touch Panel Y position control */ +#define PA_DBSW (PA_BCR+0x0200) /* Debug Board Switch control */ +#define PA_CFCTL (PA_BCR+0x0300) /* CF Timing control */ +#define PA_CFPOW (PA_BCR+0x0302) /* CF Power control */ +#define PA_CFCDINTCLR (PA_BCR+0x0304) /* CF Insert Interrupt clear */ +#define PA_SCSMR0 (PA_BCR+0x0400) /* SCIF0 Serial mode control */ +#define PA_SCBRR0 (PA_BCR+0x0404) /* SCIF0 Bit rate control */ +#define PA_SCSCR0 (PA_BCR+0x0408) /* SCIF0 Serial control */ +#define PA_SCFTDR0 (PA_BCR+0x040c) /* SCIF0 Send FIFO control */ +#define PA_SCFSR0 (PA_BCR+0x0410) /* SCIF0 Serial status control */ +#define PA_SCFRDR0 (PA_BCR+0x0414) /* SCIF0 Receive FIFO control */ +#define PA_SCFCR0 (PA_BCR+0x0418) /* SCIF0 FIFO control */ +#define PA_SCTFDR0 (PA_BCR+0x041c) /* SCIF0 Send FIFO data control */ +#define PA_SCRFDR0 (PA_BCR+0x0420) /* SCIF0 Receive FIFO data control */ +#define PA_SCSPTR0 (PA_BCR+0x0424) /* SCIF0 Serial Port control */ +#define PA_SCLSR0 (PA_BCR+0x0428) /* SCIF0 Line Status control */ +#define PA_SCRER0 (PA_BCR+0x042c) /* SCIF0 Serial Error control */ +#define PA_SCSMR1 (PA_BCR+0x0500) /* SCIF1 Serial mode control */ +#define PA_SCBRR1 (PA_BCR+0x0504) /* SCIF1 Bit rate control */ +#define PA_SCSCR1 (PA_BCR+0x0508) /* SCIF1 Serial control */ +#define PA_SCFTDR1 (PA_BCR+0x050c) /* SCIF1 Send FIFO control */ +#define PA_SCFSR1 (PA_BCR+0x0510) /* SCIF1 Serial status control */ +#define PA_SCFRDR1 (PA_BCR+0x0514) /* SCIF1 Receive FIFO control */ +#define PA_SCFCR1 (PA_BCR+0x0518) /* SCIF1 FIFO control */ +#define PA_SCTFDR1 (PA_BCR+0x051c) /* SCIF1 Send FIFO data control */ +#define PA_SCRFDR1 (PA_BCR+0x0520) /* SCIF1 Receive FIFO data control */ +#define PA_SCSPTR1 (PA_BCR+0x0524) /* SCIF1 Serial Port control */ +#define PA_SCLSR1 (PA_BCR+0x0528) /* SCIF1 Line Status control */ +#define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */ +#define PA_ICCR (PA_BCR+0x0600) /* Serial control */ +#define PA_SAR (PA_BCR+0x0602) /* Serial Slave control */ +#define PA_MDR (PA_BCR+0x0604) /* Serial Mode control */ +#define PA_ADR1 (PA_BCR+0x0606) /* Serial Address1 control */ +#define PA_DAR1 (PA_BCR+0x0646) /* Serial Data1 control */ +#define PA_VERREG (PA_BCR+0x0700) /* FPGA Version Register */ +#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */ +#define PA_PMR (PA_BCR+0x0900) /* */ + +#define PA_AX88796L 0xa4100400 /* AX88796L Area */ +#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */ +#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ +#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ +#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ +#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ + +#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ + +#define IRQ_PCISLOT1 65 /* PCI Slot #1 IRQ */ +#define IRQ_PCISLOT2 66 /* PCI Slot #2 IRQ */ +#define IRQ_PCISLOT3 67 /* PCI Slot #3 IRQ */ +#define IRQ_PCISLOT4 68 /* PCI Slot #4 IRQ */ +#define IRQ_CFCARD 1 /* CF Card IRQ */ +// #define IRQ_CFINST 0 /* CF Card Insert IRQ */ +#define IRQ_TP 2 /* Touch Panel IRQ */ +#define IRQ_SCI1 3 /* SCI1 IRQ */ +#define IRQ_SCI0 4 /* SCI0 IRQ */ +#define IRQ_2SERIAL 5 /* Serial IRQ */ +#define IRQ_RTC 6 /* RTC A / B IRQ */ +#define IRQ_EXTENTION6 7 /* EXT6n IRQ */ +#define IRQ_EXTENTION5 8 /* EXT5n IRQ */ +#define IRQ_EXTENTION4 9 /* EXT4n IRQ */ +#define IRQ_EXTENTION2 10 /* EXT2n IRQ */ +#define IRQ_EXTENTION1 11 /* EXT1n IRQ */ +#define IRQ_ONETH 13 /* On board Ethernet IRQ */ +#define IRQ_PSW 14 /* Push Switch IRQ */ + +#else /* R7780RP */ + +#define PA_BCR 0xa5000000 /* FPGA */ +#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ +#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */ +#define PA_SDPOW (PA_BCR+0x0004) /* SD Power control */ +#define PA_RSTCTL (PA_BCR+0x0006) /* Device Reset control */ +#define PA_PCIBD (PA_BCR+0x0008) /* PCI Board detect control */ +#define PA_PCICD (PA_BCR+0x000a) /* PCI Conector detect control */ +#define PA_ZIGIO1 (PA_BCR+0x000c) /* Zigbee IO control 1 */ +#define PA_ZIGIO2 (PA_BCR+0x000e) /* Zigbee IO control 2 */ +#define PA_ZIGIO3 (PA_BCR+0x0010) /* Zigbee IO control 3 */ +#define PA_ZIGIO4 (PA_BCR+0x0012) /* Zigbee IO control 4 */ +#define PA_IVDRMON (PA_BCR+0x0014) /* iVDR Moniter control */ +#define PA_IVDRCTL (PA_BCR+0x0016) /* iVDR control */ +#define PA_OBLED (PA_BCR+0x0018) /* On Board LED control */ +#define PA_OBSW (PA_BCR+0x001a) /* On Board Switch control */ +#define PA_AUDIOSEL (PA_BCR+0x001c) /* Sound Interface Select control */ +#define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */ +#define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */ +#define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */ +#define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */ +#define PA_TPXPOS (PA_BCR+0x0106) /* Touch Panel X position control */ +#define PA_TPYPOS (PA_BCR+0x0108) /* Touch Panel Y position control */ +#define PA_DBDET (PA_BCR+0x0200) /* Debug Board detect control */ +#define PA_DBDISPCTL (PA_BCR+0x0202) /* Debug Board Dot timing control */ +#define PA_DBSW (PA_BCR+0x0204) /* Debug Board Switch control */ +#define PA_CFCTL (PA_BCR+0x0300) /* CF Timing control */ +#define PA_CFPOW (PA_BCR+0x0302) /* CF Power control */ +#define PA_CFCDINTCLR (PA_BCR+0x0304) /* CF Insert Interrupt clear */ +#define PA_SCSMR (PA_BCR+0x0400) /* SCIF Serial mode control */ +#define PA_SCBRR (PA_BCR+0x0402) /* SCIF Bit rate control */ +#define PA_SCSCR (PA_BCR+0x0404) /* SCIF Serial control */ +#define PA_SCFDTR (PA_BCR+0x0406) /* SCIF Send FIFO control */ +#define PA_SCFSR (PA_BCR+0x0408) /* SCIF Serial status control */ +#define PA_SCFRDR (PA_BCR+0x040a) /* SCIF Receive FIFO control */ +#define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */ +#define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */ +#define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */ +#define PA_ICCR (PA_BCR+0x0500) /* Serial control */ +#define PA_SAR (PA_BCR+0x0502) /* Serial Slave control */ +#define PA_MDR (PA_BCR+0x0504) /* Serial Mode control */ +#define PA_ADR1 (PA_BCR+0x0506) /* Serial Address1 control */ +#define PA_DAR1 (PA_BCR+0x0546) /* Serial Data1 control */ +#define PA_VERREG (PA_BCR+0x0600) /* FPGA Version Register */ + +#define PA_AX88796L 0xa5800400 /* AX88796L Area */ +#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */ +#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ +#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ +#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ +#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ + +#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ + +#define IRQ_PCISLOT1 0 /* PCI Slot #1 IRQ */ +#define IRQ_PCISLOT2 1 /* PCI Slot #2 IRQ */ +#define IRQ_PCISLOT3 2 /* PCI Slot #3 IRQ */ +#define IRQ_PCISLOT4 3 /* PCI Slot #4 IRQ */ +#define IRQ_CFCARD 4 /* CF Card IRQ */ +#define IRQ_CFINST 5 /* CF Card Insert IRQ */ +#define IRQ_M66596 6 /* M66596 IRQ */ +#define IRQ_SDCARD 7 /* SD Card IRQ */ +#define IRQ_TUCHPANEL 8 /* Touch Panel IRQ */ +#define IRQ_SCI 9 /* SCI IRQ */ +#define IRQ_2SERIAL 10 /* Serial IRQ */ +#define IRQ_EXTENTION 11 /* EXTn IRQ */ +#define IRQ_ONETH 12 /* On board Ethernet IRQ */ +#define IRQ_PSW 13 /* Push Switch IRQ */ +#define IRQ_ZIGBEE 14 /* Ziggbee IO IRQ */ + +#endif /* CONFIG_SH_R7780MP */ + +#define __IO_PREFIX r7780rp +#include + +#endif /* __ASM_SH_RENESAS_R7780RP */ diff --git a/include/asm-sh/rts7751r2d/rts7751r2d.h b/include/asm-sh/rts7751r2d/rts7751r2d.h index 4e09ba597e9a..b112ae221fd1 100644 --- a/include/asm-sh/rts7751r2d/rts7751r2d.h +++ b/include/asm-sh/rts7751r2d/rts7751r2d.h @@ -41,8 +41,6 @@ #define PA_AX88796L 0xaa000400 /* AX88796L Area */ #define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */ -#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ -#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ #define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ #define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ -- cgit v1.2.3 From 3aa770e7972723f479122cf66b529017d2175289 Mon Sep 17 00:00:00 2001 From: Andriy Skulysh Date: Wed, 27 Sep 2006 16:20:22 +0900 Subject: sh: APM/PM support. This adds some simple PM stubs and the basic APM interfaces, primarily for use by hp6xx, where the existing userland expects it. Signed-off-by: Andriy Skulysh Signed-off-by: Paul Mundt --- arch/sh/Kconfig | 10 + arch/sh/boards/hp6xx/Makefile | 5 +- arch/sh/boards/hp6xx/hp6xx_apm.c | 123 +++++++ arch/sh/boards/hp6xx/pm.c | 88 +++++ arch/sh/boards/hp6xx/pm_wakeup.S | 58 ++++ arch/sh/boards/hp6xx/setup.c | 14 + arch/sh/kernel/Makefile | 2 + arch/sh/kernel/apm.c | 539 +++++++++++++++++++++++++++++ arch/sh/kernel/entry.S | 4 +- arch/sh/kernel/pm.c | 88 +++++ arch/sh/kernel/sh_ksyms.c | 4 + arch/sh/kernel/time.c | 25 ++ arch/sh/kernel/timers/timer-tmu.c | 18 +- drivers/input/touchscreen/hp680_ts_input.c | 14 - include/asm-sh/apm.h | 46 +++ include/asm-sh/cpu-sh3/freq.h | 4 + include/asm-sh/hd64461.h | 7 +- include/asm-sh/hp6xx/hp6xx.h | 53 ++- include/asm-sh/pm.h | 17 + include/asm-sh/system.h | 25 ++ include/asm-sh/timer.h | 2 + 21 files changed, 1124 insertions(+), 22 deletions(-) create mode 100644 arch/sh/boards/hp6xx/hp6xx_apm.c create mode 100644 arch/sh/boards/hp6xx/pm.c create mode 100644 arch/sh/boards/hp6xx/pm_wakeup.S create mode 100644 arch/sh/kernel/apm.c create mode 100644 arch/sh/kernel/pm.c create mode 100644 include/asm-sh/apm.h create mode 100644 include/asm-sh/pm.h (limited to 'arch/sh/kernel') diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index fe982f0eba23..d1d724447826 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -638,6 +638,16 @@ source "fs/Kconfig.binfmt" endmenu +menu "Power management options (EXPERIMENTAL)" +depends on EXPERIMENTAL + +source kernel/power/Kconfig + +config APM + bool "Advanced Power Management Emulation" + depends on PM +endmenu + source "net/Kconfig" source "drivers/Kconfig" diff --git a/arch/sh/boards/hp6xx/Makefile b/arch/sh/boards/hp6xx/Makefile index 927fe0aa5dfa..fdf98ffcf437 100644 --- a/arch/sh/boards/hp6xx/Makefile +++ b/arch/sh/boards/hp6xx/Makefile @@ -2,5 +2,8 @@ # Makefile for the HP6xx specific parts of the kernel # -obj-y := mach.o setup.o +obj-y := mach.o setup.o +obj-$(CONFIG_PM) += pm.o pm_wakeup.o +obj-$(CONFIG_APM) += hp6xx_apm.o + diff --git a/arch/sh/boards/hp6xx/hp6xx_apm.c b/arch/sh/boards/hp6xx/hp6xx_apm.c new file mode 100644 index 000000000000..ad0e712c29f6 --- /dev/null +++ b/arch/sh/boards/hp6xx/hp6xx_apm.c @@ -0,0 +1,123 @@ +/* + * bios-less APM driver for hp680 + * + * Copyright 2005 (c) Andriy Skulysh + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SH7709_PGDR 0xa400012c + +#define APM_CRITICAL 10 +#define APM_LOW 30 + +#define HP680_BATTERY_MAX 875 +#define HP680_BATTERY_MIN 600 +#define HP680_BATTERY_AC_ON 900 + +#define MODNAME "hp6x0_apm" + +static int hp6x0_apm_get_info(char *buf, char **start, off_t fpos, int length) +{ + u8 pgdr; + char *p; + int battery_status; + int battery_flag; + int ac_line_status; + int time_units = APM_BATTERY_LIFE_UNKNOWN; + + int battery = adc_single(ADC_CHANNEL_BATTERY); + int backup = adc_single(ADC_CHANNEL_BACKUP); + int charging = adc_single(ADC_CHANNEL_CHARGE); + int percentage; + + percentage = 100 * (battery - HP680_BATTERY_MIN) / + (HP680_BATTERY_MAX - HP680_BATTERY_MIN); + + ac_line_status = (battery > HP680_BATTERY_AC_ON) ? + APM_AC_ONLINE : APM_AC_OFFLINE; + + p = buf; + + pgdr = ctrl_inb(SH7709_PGDR); + if (pgdr & PGDR_MAIN_BATTERY_OUT) { + battery_status = APM_BATTERY_STATUS_NOT_PRESENT; + battery_flag = 0x80; + percentage = -1; + } else if (charging < 8 ) { + battery_status = APM_BATTERY_STATUS_CHARGING; + battery_flag = 0x08; + ac_line_status = 0xff; + } else if (percentage <= APM_CRITICAL) { + battery_status = APM_BATTERY_STATUS_CRITICAL; + battery_flag = 0x04; + } else if (percentage <= APM_LOW) { + battery_status = APM_BATTERY_STATUS_LOW; + battery_flag = 0x02; + } else { + battery_status = APM_BATTERY_STATUS_HIGH; + battery_flag = 0x01; + } + + p += sprintf(p, "1.0 1.2 0x%02x 0x%02x 0x%02x 0x%02x %d%% %d %s\n", + APM_32_BIT_SUPPORT, + ac_line_status, + battery_status, + battery_flag, + percentage, + time_units, + "min"); + p += sprintf(p, "bat=%d backup=%d charge=%d\n", + battery, backup, charging); + + return p - buf; +} + +static irqreturn_t hp6x0_apm_interrupt(int irq, void *dev, struct pt_regs *regs) +{ + if (!apm_suspended) + apm_queue_event(APM_USER_SUSPEND); + + return IRQ_HANDLED; +} + +static int __init hp6x0_apm_init(void) +{ + int ret; + + ret = request_irq(HP680_BTN_IRQ, hp6x0_apm_interrupt, + SA_INTERRUPT, MODNAME, 0); + if (unlikely(ret < 0)) { + printk(KERN_ERR MODNAME ": IRQ %d request failed\n", + HP680_BTN_IRQ); + return ret; + } + + apm_get_info = hp6x0_apm_get_info; + + return ret; +} + +static void __exit hp6x0_apm_exit(void) +{ + free_irq(HP680_BTN_IRQ, 0); + apm_get_info = 0; +} + +module_init(hp6x0_apm_init); +module_exit(hp6x0_apm_exit); + +MODULE_AUTHOR("Adriy Skulysh"); +MODULE_DESCRIPTION("hp6xx Advanced Power Management"); +MODULE_LICENSE("GPL"); diff --git a/arch/sh/boards/hp6xx/pm.c b/arch/sh/boards/hp6xx/pm.c new file mode 100644 index 000000000000..0e501bcbd7a9 --- /dev/null +++ b/arch/sh/boards/hp6xx/pm.c @@ -0,0 +1,88 @@ +/* + * hp6x0 Power Management Routines + * + * Copyright (c) 2006 Andriy Skulysh + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define STBCR 0xffffff82 +#define STBCR2 0xffffff88 + +static int hp6x0_pm_enter(suspend_state_t state) +{ + u8 stbcr, stbcr2; +#ifdef CONFIG_HD64461_ENABLER + u8 scr; + u16 hd64461_stbcr; +#endif + + if (state != PM_SUSPEND_MEM) + return -EINVAL; + +#ifdef CONFIG_HD64461_ENABLER + outb(0, HD64461_PCC1CSCIER); + + scr = inb(HD64461_PCC1SCR); + scr |= HD64461_PCCSCR_VCC1; + outb(scr, HD64461_PCC1SCR); + + hd64461_stbcr = inw(HD64461_STBCR); + hd64461_stbcr |= HD64461_STBCR_SPC1ST; + outw(hd64461_stbcr, HD64461_STBCR); +#endif + + ctrl_outb(0x1f, DACR); + + stbcr = ctrl_inb(STBCR); + ctrl_outb(0x01, STBCR); + + stbcr2 = ctrl_inb(STBCR2); + ctrl_outb(0x7f , STBCR2); + + outw(0xf07f, HD64461_SCPUCR); + + pm_enter(); + + outw(0, HD64461_SCPUCR); + ctrl_outb(stbcr, STBCR); + ctrl_outb(stbcr2, STBCR2); + +#ifdef CONFIG_HD64461_ENABLER + hd64461_stbcr = inw(HD64461_STBCR); + hd64461_stbcr &= ~HD64461_STBCR_SPC1ST; + outw(hd64461_stbcr, HD64461_STBCR); + + outb(0x4c, HD64461_PCC1CSCIER); + outb(0x00, HD64461_PCC1CSCR); +#endif + + return 0; +} + +/* + * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk. + */ +static struct pm_ops hp6x0_pm_ops = { + .pm_disk_mode = PM_DISK_FIRMWARE, + .enter = hp6x0_pm_enter, +}; + +static int __init hp6x0_pm_init(void) +{ + pm_set_ops(&hp6x0_pm_ops); + return 0; +} + +late_initcall(hp6x0_pm_init); diff --git a/arch/sh/boards/hp6xx/pm_wakeup.S b/arch/sh/boards/hp6xx/pm_wakeup.S new file mode 100644 index 000000000000..45e9bf0b9115 --- /dev/null +++ b/arch/sh/boards/hp6xx/pm_wakeup.S @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2006 Andriy Skulysh + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + */ + +#include +#include + +#define k0 r0 +#define k1 r1 +#define k2 r2 +#define k3 r3 +#define k4 r4 + +/* + * Kernel mode register usage: + * k0 scratch + * k1 scratch + * k2 scratch (Exception code) + * k3 scratch (Return address) + * k4 scratch + * k5 reserved + * k6 Global Interrupt Mask (0--15 << 4) + * k7 CURRENT_THREAD_INFO (pointer to current thread info) + */ + +ENTRY(wakeup_start) +! clear STBY bit + mov #-126, k2 + and #127, k0 + mov.b k0, @k2 +! enable refresh + mov.l 5f, k1 + mov.w 6f, k0 + mov.w k0, @k1 +! jump to handler + mov.l 2f, k2 + mov.l 3f, k3 + mov.l @k2, k2 + + mov.l 4f, k1 + jmp @k1 + nop + + .align 2 +1: .long EXPEVT +2: .long INTEVT +3: .long ret_from_irq +4: .long handle_exception +5: .long 0xffffff68 +6: .word 0x0524 + +ENTRY(wakeup_end) + nop diff --git a/arch/sh/boards/hp6xx/setup.c b/arch/sh/boards/hp6xx/setup.c index 71f315663cc9..5fc00f0727c4 100644 --- a/arch/sh/boards/hp6xx/setup.c +++ b/arch/sh/boards/hp6xx/setup.c @@ -15,6 +15,9 @@ #include #include +#define SCPCR 0xa4000116 +#define SCPDR 0xa4000136 + const char *get_system_type(void) { return "HP6xx"; @@ -24,6 +27,7 @@ int __init platform_setup(void) { u8 v8; u16 v; + v = inw(HD64461_STBCR); v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST | HD64461_STBCR_STM1ST | HD64461_STBCR_STM0ST | @@ -50,5 +54,15 @@ int __init platform_setup(void) v8 &= ~DACR_DAE; ctrl_outb(v8,DACR); + v8 = ctrl_inb(SCPDR); + v8 |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y; + v8 &= ~SCPDR_TS_SCAN_ENABLE; + ctrl_outb(v8, SCPDR); + + v = ctrl_inw(SCPCR); + v &= ~SCPCR_TS_MASK; + v |= SCPCR_TS_ENABLE; + ctrl_outw(v, SCPCR); + return 0; } diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile index 2de82b66af4a..0e2148f63e7e 100644 --- a/arch/sh/kernel/Makefile +++ b/arch/sh/kernel/Makefile @@ -18,3 +18,5 @@ obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o obj-$(CONFIG_MODULES) += module.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o +obj-$(CONFIG_APM) += apm.o +obj-$(CONFIG_PM) += pm.o diff --git a/arch/sh/kernel/apm.c b/arch/sh/kernel/apm.c new file mode 100644 index 000000000000..871e7d640002 --- /dev/null +++ b/arch/sh/kernel/apm.c @@ -0,0 +1,539 @@ +/* + * bios-less APM driver for hp680 + * + * Copyright 2005 (c) Andriy Skulysh + * + * based on ARM APM driver by + * Jamey Hicks + * + * adapted from the APM BIOS driver for Linux by + * Stephen Rothwell (sfr@linuxcare.com) + * + * APM 1.2 Reference: + * Intel Corporation, Microsoft Corporation. Advanced Power Management + * (APM) BIOS Interface Specification, Revision 1.2, February 1996. + * + * [This document is available from Microsoft at: + * http://www.microsoft.com/hwdev/busbios/amp_12.htm] + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MODNAME "apm" + +/* + * The apm_bios device is one of the misc char devices. + * This is its minor number. + */ +#define APM_MINOR_DEV 134 + +/* + * Maximum number of events stored + */ +#define APM_MAX_EVENTS 16 + +struct apm_queue { + unsigned int event_head; + unsigned int event_tail; + apm_event_t events[APM_MAX_EVENTS]; +}; + +/* + * The per-file APM data + */ +struct apm_user { + struct list_head list; + + unsigned int suser: 1; + unsigned int writer: 1; + unsigned int reader: 1; + + int suspend_result; + unsigned int suspend_state; +#define SUSPEND_NONE 0 /* no suspend pending */ +#define SUSPEND_PENDING 1 /* suspend pending read */ +#define SUSPEND_READ 2 /* suspend read, pending ack */ +#define SUSPEND_ACKED 3 /* suspend acked */ +#define SUSPEND_DONE 4 /* suspend completed */ + + struct apm_queue queue; +}; + +/* + * Local variables + */ +static int suspends_pending; + +static DECLARE_WAIT_QUEUE_HEAD(apm_waitqueue); +static DECLARE_WAIT_QUEUE_HEAD(apm_suspend_waitqueue); + +/* + * This is a list of everyone who has opened /dev/apm_bios + */ +static DECLARE_RWSEM(user_list_lock); +static LIST_HEAD(apm_user_list); + +/* + * kapmd info. kapmd provides us a process context to handle + * "APM" events within - specifically necessary if we're going + * to be suspending the system. + */ +static DECLARE_WAIT_QUEUE_HEAD(kapmd_wait); +static DECLARE_COMPLETION(kapmd_exit); +static DEFINE_SPINLOCK(kapmd_queue_lock); +static struct apm_queue kapmd_queue; + +int apm_suspended; +EXPORT_SYMBOL(apm_suspended); + +/* Platform-specific apm_read_proc(). */ +int (*apm_get_info)(char *buf, char **start, off_t fpos, int length); +EXPORT_SYMBOL(apm_get_info); + +/* + * APM event queue management. + */ +static inline int queue_empty(struct apm_queue *q) +{ + return q->event_head == q->event_tail; +} + +static inline apm_event_t queue_get_event(struct apm_queue *q) +{ + q->event_tail = (q->event_tail + 1) % APM_MAX_EVENTS; + return q->events[q->event_tail]; +} + +static void queue_add_event(struct apm_queue *q, apm_event_t event) +{ + q->event_head = (q->event_head + 1) % APM_MAX_EVENTS; + if (q->event_head == q->event_tail) { + static int notified; + + if (notified++ == 0) + printk(KERN_ERR "apm: an event queue overflowed\n"); + + q->event_tail = (q->event_tail + 1) % APM_MAX_EVENTS; + } + q->events[q->event_head] = event; +} + +static void queue_event_one_user(struct apm_user *as, apm_event_t event) +{ + if (as->suser && as->writer) { + switch (event) { + case APM_SYS_SUSPEND: + case APM_USER_SUSPEND: + /* + * If this user already has a suspend pending, + * don't queue another one. + */ + if (as->suspend_state != SUSPEND_NONE) + return; + + as->suspend_state = SUSPEND_PENDING; + suspends_pending++; + break; + } + } + queue_add_event(&as->queue, event); +} + +static void queue_event(apm_event_t event, struct apm_user *sender) +{ + struct apm_user *as; + + down_read(&user_list_lock); + + list_for_each_entry(as, &apm_user_list, list) + if (as != sender && as->reader) + queue_event_one_user(as, event); + + up_read(&user_list_lock); + wake_up_interruptible(&apm_waitqueue); +} + +/** + * apm_queue_event - queue an APM event for kapmd + * @event: APM event + * + * Queue an APM event for kapmd to process and ultimately take the + * appropriate action. Only a subset of events are handled: + * %APM_LOW_BATTERY + * %APM_POWER_STATUS_CHANGE + * %APM_USER_SUSPEND + * %APM_SYS_SUSPEND + * %APM_CRITICAL_SUSPEND + */ +void apm_queue_event(apm_event_t event) +{ + spin_lock_irq(&kapmd_queue_lock); + queue_add_event(&kapmd_queue, event); + spin_unlock_irq(&kapmd_queue_lock); + + wake_up_interruptible(&kapmd_wait); +} +EXPORT_SYMBOL(apm_queue_event); + +static void apm_suspend(void) +{ + struct apm_user *as; + int err; + + apm_suspended = 1; + err = pm_suspend(PM_SUSPEND_MEM); + + /* + * Anyone on the APM queues will think we're still suspended. + * Send a message so everyone knows we're now awake again. + */ + queue_event(APM_NORMAL_RESUME, NULL); + + /* + * Finally, wake up anyone who is sleeping on the suspend. + */ + down_read(&user_list_lock); + list_for_each_entry(as, &apm_user_list, list) { + as->suspend_result = err; + as->suspend_state = SUSPEND_DONE; + } + up_read(&user_list_lock); + + wake_up(&apm_suspend_waitqueue); + apm_suspended = 0; +} + +static ssize_t apm_read(struct file *fp, char __user *buf, + size_t count, loff_t *ppos) +{ + struct apm_user *as = fp->private_data; + apm_event_t event; + int i = count, ret = 0; + + if (count < sizeof(apm_event_t)) + return -EINVAL; + + if (queue_empty(&as->queue) && fp->f_flags & O_NONBLOCK) + return -EAGAIN; + + wait_event_interruptible(apm_waitqueue, !queue_empty(&as->queue)); + + while ((i >= sizeof(event)) && !queue_empty(&as->queue)) { + event = queue_get_event(&as->queue); + + ret = -EFAULT; + if (copy_to_user(buf, &event, sizeof(event))) + break; + + if (event == APM_SYS_SUSPEND || event == APM_USER_SUSPEND) + as->suspend_state = SUSPEND_READ; + + buf += sizeof(event); + i -= sizeof(event); + } + + if (i < count) + ret = count - i; + + return ret; +} + +static unsigned int apm_poll(struct file *fp, poll_table * wait) +{ + struct apm_user *as = fp->private_data; + + poll_wait(fp, &apm_waitqueue, wait); + return queue_empty(&as->queue) ? 0 : POLLIN | POLLRDNORM; +} + +/* + * apm_ioctl - handle APM ioctl + * + * APM_IOC_SUSPEND + * This IOCTL is overloaded, and performs two functions. It is used to: + * - initiate a suspend + * - acknowledge a suspend read from /dev/apm_bios. + * Only when everyone who has opened /dev/apm_bios with write permission + * has acknowledge does the actual suspend happen. + */ +static int +apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg) +{ + struct apm_user *as = filp->private_data; + unsigned long flags; + int err = -EINVAL; + + if (!as->suser || !as->writer) + return -EPERM; + + switch (cmd) { + case APM_IOC_SUSPEND: + as->suspend_result = -EINTR; + + if (as->suspend_state == SUSPEND_READ) { + /* + * If we read a suspend command from /dev/apm_bios, + * then the corresponding APM_IOC_SUSPEND ioctl is + * interpreted as an acknowledge. + */ + as->suspend_state = SUSPEND_ACKED; + suspends_pending--; + } else { + /* + * Otherwise it is a request to suspend the system. + * Queue an event for all readers, and expect an + * acknowledge from all writers who haven't already + * acknowledged. + */ + queue_event(APM_USER_SUSPEND, as); + } + + /* + * If there are no further acknowledges required, suspend + * the system. + */ + if (suspends_pending == 0) + apm_suspend(); + + /* + * Wait for the suspend/resume to complete. If there are + * pending acknowledges, we wait here for them. + * + * Note that we need to ensure that the PM subsystem does + * not kick us out of the wait when it suspends the threads. + */ + flags = current->flags; + current->flags |= PF_NOFREEZE; + + /* + * Note: do not allow a thread which is acking the suspend + * to escape until the resume is complete. + */ + if (as->suspend_state == SUSPEND_ACKED) + wait_event(apm_suspend_waitqueue, + as->suspend_state == SUSPEND_DONE); + else + wait_event_interruptible(apm_suspend_waitqueue, + as->suspend_state == SUSPEND_DONE); + + current->flags = flags; + err = as->suspend_result; + as->suspend_state = SUSPEND_NONE; + break; + } + + return err; +} + +static int apm_release(struct inode * inode, struct file * filp) +{ + struct apm_user *as = filp->private_data; + filp->private_data = NULL; + + down_write(&user_list_lock); + list_del(&as->list); + up_write(&user_list_lock); + + /* + * We are now unhooked from the chain. As far as new + * events are concerned, we no longer exist. However, we + * need to balance suspends_pending, which means the + * possibility of sleeping. + */ + if (as->suspend_state != SUSPEND_NONE) { + suspends_pending -= 1; + if (suspends_pending == 0) + apm_suspend(); + } + + kfree(as); + return 0; +} + +static int apm_open(struct inode * inode, struct file * filp) +{ + struct apm_user *as; + + as = kzalloc(sizeof(*as), GFP_KERNEL); + if (as) { + /* + * XXX - this is a tiny bit broken, when we consider BSD + * process accounting. If the device is opened by root, we + * instantly flag that we used superuser privs. Who knows, + * we might close the device immediately without doing a + * privileged operation -- cevans + */ + as->suser = capable(CAP_SYS_ADMIN); + as->writer = (filp->f_mode & FMODE_WRITE) == FMODE_WRITE; + as->reader = (filp->f_mode & FMODE_READ) == FMODE_READ; + + down_write(&user_list_lock); + list_add(&as->list, &apm_user_list); + up_write(&user_list_lock); + + filp->private_data = as; + } + + return as ? 0 : -ENOMEM; +} + +static struct file_operations apm_bios_fops = { + .owner = THIS_MODULE, + .read = apm_read, + .poll = apm_poll, + .ioctl = apm_ioctl, + .open = apm_open, + .release = apm_release, +}; + +static struct miscdevice apm_device = { + .minor = APM_MINOR_DEV, + .name = "apm_bios", + .fops = &apm_bios_fops +}; + + +#ifdef CONFIG_PROC_FS +/* + * Arguments, with symbols from linux/apm_bios.h. + * + * 0) Linux driver version (this will change if format changes) + * 1) APM BIOS Version. Usually 1.0, 1.1 or 1.2. + * 2) APM flags from APM Installation Check (0x00): + * bit 0: APM_16_BIT_SUPPORT + * bit 1: APM_32_BIT_SUPPORT + * bit 2: APM_IDLE_SLOWS_CLOCK + * bit 3: APM_BIOS_DISABLED + * bit 4: APM_BIOS_DISENGAGED + * 3) AC line status + * 0x00: Off-line + * 0x01: On-line + * 0x02: On backup power (BIOS >= 1.1 only) + * 0xff: Unknown + * 4) Battery status + * 0x00: High + * 0x01: Low + * 0x02: Critical + * 0x03: Charging + * 0x04: Selected battery not present (BIOS >= 1.2 only) + * 0xff: Unknown + * 5) Battery flag + * bit 0: High + * bit 1: Low + * bit 2: Critical + * bit 3: Charging + * bit 7: No system battery + * 0xff: Unknown + * 6) Remaining battery life (percentage of charge): + * 0-100: valid + * -1: Unknown + * 7) Remaining battery life (time units): + * Number of remaining minutes or seconds + * -1: Unknown + * 8) min = minutes; sec = seconds + */ +static int apm_read_proc(char *buf, char **start, off_t fpos, int length) +{ + if (likely(apm_get_info)) + return apm_get_info(buf, start, fpos, length); + + return -EINVAL; +} +#endif + +static int kapmd(void *arg) +{ + daemonize("kapmd"); + current->flags |= PF_NOFREEZE; + + do { + apm_event_t event; + + wait_event_interruptible(kapmd_wait, + !queue_empty(&kapmd_queue) || !pm_active); + + if (!pm_active) + break; + + spin_lock_irq(&kapmd_queue_lock); + event = 0; + if (!queue_empty(&kapmd_queue)) + event = queue_get_event(&kapmd_queue); + spin_unlock_irq(&kapmd_queue_lock); + + switch (event) { + case 0: + break; + + case APM_LOW_BATTERY: + case APM_POWER_STATUS_CHANGE: + queue_event(event, NULL); + break; + + case APM_USER_SUSPEND: + case APM_SYS_SUSPEND: + queue_event(event, NULL); + if (suspends_pending == 0) + apm_suspend(); + break; + + case APM_CRITICAL_SUSPEND: + apm_suspend(); + break; + } + } while (1); + + complete_and_exit(&kapmd_exit, 0); +} + +static int __init apm_init(void) +{ + int ret; + + pm_active = 1; + + ret = kernel_thread(kapmd, NULL, CLONE_KERNEL); + if (unlikely(ret < 0)) { + pm_active = 0; + return ret; + } + + create_proc_info_entry("apm", 0, NULL, apm_read_proc); + + ret = misc_register(&apm_device); + if (unlikely(ret != 0)) { + remove_proc_entry("apm", NULL); + + pm_active = 0; + wake_up(&kapmd_wait); + wait_for_completion(&kapmd_exit); + } + + return ret; +} + +static void __exit apm_exit(void) +{ + misc_deregister(&apm_device); + remove_proc_entry("apm", NULL); + + pm_active = 0; + wake_up(&kapmd_wait); + wait_for_completion(&kapmd_exit); +} + +module_init(apm_init); +module_exit(apm_exit); + +MODULE_AUTHOR("Stephen Rothwell, Andriy Skulysh"); +MODULE_DESCRIPTION("Advanced Power Management"); +MODULE_LICENSE("GPL"); diff --git a/arch/sh/kernel/entry.S b/arch/sh/kernel/entry.S index 306eb8d83de5..b087d34dba35 100644 --- a/arch/sh/kernel/entry.S +++ b/arch/sh/kernel/entry.S @@ -308,7 +308,7 @@ ENTRY(exception_error) .align 2 ret_from_exception: preempt_stop() -ret_from_irq: +ENTRY(ret_from_irq) ! mov #OFF_SR, r0 mov.l @(r0,r15), r0 ! get status register @@ -704,7 +704,7 @@ interrupt: ! ! .align 2 -handle_exception: +ENTRY(handle_exception) ! Using k0, k1 for scratch registers (r0_bank1, r1_bank), ! save all registers onto stack. ! diff --git a/arch/sh/kernel/pm.c b/arch/sh/kernel/pm.c new file mode 100644 index 000000000000..10ab62c9aede --- /dev/null +++ b/arch/sh/kernel/pm.c @@ -0,0 +1,88 @@ +/* + * Generic Power Management Routine + * + * Copyright (c) 2006 Andriy Skulysh + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License. + */ +#include +#include +#include +#include +#include +#include +#include + +#define INTR_OFFSET 0x600 + +#define STBCR 0xffffff82 +#define STBCR2 0xffffff88 + +#define STBCR_STBY 0x80 +#define STBCR_MSTP2 0x04 + +#define MCR 0xffffff68 +#define RTCNT 0xffffff70 + +#define MCR_RMODE 2 +#define MCR_RFSH 4 + +void pm_enter(void) +{ + u8 stbcr, csr; + u16 frqcr, mcr; + u32 vbr_new, vbr_old; + + set_bl_bit(); + + /* set wdt */ + csr = sh_wdt_read_csr(); + csr &= ~WTCSR_TME; + csr |= WTCSR_CKS_4096; + sh_wdt_write_csr(csr); + csr = sh_wdt_read_csr(); + sh_wdt_write_cnt(0); + + /* disable PLL1 */ + frqcr = ctrl_inw(FRQCR); + frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY); + ctrl_outw(frqcr, FRQCR); + + /* enable standby */ + stbcr = ctrl_inb(STBCR); + ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR); + + /* set self-refresh */ + mcr = ctrl_inw(MCR); + ctrl_outw(mcr & ~MCR_RFSH, MCR); + + /* set interrupt handler */ + asm volatile("stc vbr, %0" : "=r" (vbr_old)); + vbr_new = get_zeroed_page(GFP_ATOMIC); + udelay(50); + memcpy((void*)(vbr_new + INTR_OFFSET), + &wakeup_start, &wakeup_end - &wakeup_start); + asm volatile("ldc %0, vbr" : : "r" (vbr_new)); + + ctrl_outw(0, RTCNT); + ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR); + + cpu_sleep(); + + asm volatile("ldc %0, vbr" : : "r" (vbr_old)); + + free_page(vbr_new); + + /* enable PLL1 */ + frqcr = ctrl_inw(FRQCR); + frqcr |= FRQCR_PSTBY; + ctrl_outw(frqcr, FRQCR); + udelay(50); + frqcr |= FRQCR_PLLEN; + ctrl_outw(frqcr, FRQCR); + + ctrl_outb(stbcr, STBCR); + + clear_bl_bit(); +} diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms.c index b73feafcd06e..fd73ab0326e9 100644 --- a/arch/sh/kernel/sh_ksyms.c +++ b/arch/sh/kernel/sh_ksyms.c @@ -116,6 +116,10 @@ EXPORT_SYMBOL(__down_trylock); EXPORT_SYMBOL(synchronize_irq); #endif +#ifdef CONFIG_PM +EXPORT_SYMBOL(pm_suspend); +#endif + EXPORT_SYMBOL(csum_partial); #ifdef CONFIG_IPV6 EXPORT_SYMBOL(csum_ipv6_magic); diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c index a1589f85499d..c8db6ca4f9d1 100644 --- a/arch/sh/kernel/time.c +++ b/arch/sh/kernel/time.c @@ -143,8 +143,33 @@ void handle_timer_tick(struct pt_regs *regs) } } +#ifdef CONFIG_PM +int timer_suspend(struct sys_device *dev, pm_message_t state) +{ + struct sys_timer *sys_timer = container_of(dev, struct sys_timer, dev); + + sys_timer->ops->stop(); + + return 0; +} + +int timer_resume(struct sys_device *dev) +{ + struct sys_timer *sys_timer = container_of(dev, struct sys_timer, dev); + + sys_timer->ops->start(); + + return 0; +} +#else +#define timer_suspend NULL +#define timer_resume NULL +#endif + static struct sysdev_class timer_sysclass = { set_kset_name("timer"), + .suspend = timer_suspend, + .resume = timer_resume, }; static int __init timer_init_sysfs(void) diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c index d4212add53b2..ea4bdf8cdf0d 100644 --- a/arch/sh/kernel/timers/timer-tmu.c +++ b/arch/sh/kernel/timers/timer-tmu.c @@ -188,6 +188,18 @@ static struct clk tmu0_clk = { .ops = &tmu_clk_ops, }; +static int tmu_timer_start(void) +{ + ctrl_outb(TMU_TSTR_INIT, TMU_TSTR); + return 0; +} + +static int tmu_timer_stop(void) +{ + ctrl_outb(0, TMU_TSTR); + return 0; +} + static int tmu_timer_init(void) { unsigned long interval; @@ -197,7 +209,7 @@ static int tmu_timer_init(void) tmu0_clk.parent = clk_get("module_clk"); /* Start TMU0 */ - ctrl_outb(0, TMU_TSTR); + tmu_timer_stop(); #if !defined(CONFIG_CPU_SUBTYPE_SH7300) && !defined(CONFIG_CPU_SUBTYPE_SH7760) ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); #endif @@ -211,13 +223,15 @@ static int tmu_timer_init(void) ctrl_outl(interval, TMU0_TCOR); ctrl_outl(interval, TMU0_TCNT); - ctrl_outb(TMU_TSTR_INIT, TMU_TSTR); + tmu_timer_start(); return 0; } struct sys_timer_ops tmu_timer_ops = { .init = tmu_timer_init, + .start = tmu_timer_start, + .stop = tmu_timer_stop, .get_frequency = tmu_timer_get_frequency, .get_offset = tmu_timer_get_offset, }; diff --git a/drivers/input/touchscreen/hp680_ts_input.c b/drivers/input/touchscreen/hp680_ts_input.c index fa97e0f79e7e..ee6c2f40cdf6 100644 --- a/drivers/input/touchscreen/hp680_ts_input.c +++ b/drivers/input/touchscreen/hp680_ts_input.c @@ -15,7 +15,6 @@ #define HP680_TS_ABS_Y_MIN 80 #define HP680_TS_ABS_Y_MAX 910 -#define SCPCR 0xa4000116 #define PHDR 0xa400012e #define SCPDR 0xa4000136 @@ -77,19 +76,6 @@ static irqreturn_t hp680_ts_interrupt(int irq, void *dev, struct pt_regs *regs) static int __init hp680_ts_init(void) { - u8 scpdr; - u16 scpcr; - - scpdr = ctrl_inb(SCPDR); - scpdr |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y; - scpdr &= ~SCPDR_TS_SCAN_ENABLE; - ctrl_outb(scpdr, SCPDR); - - scpcr = ctrl_inw(SCPCR); - scpcr &= ~SCPCR_TS_MASK; - scpcr |= SCPCR_TS_ENABLE; - ctrl_outw(scpcr, SCPCR); - hp680_ts_dev = input_allocate_device(); if (!hp680_ts_dev) return -ENOMEM; diff --git a/include/asm-sh/apm.h b/include/asm-sh/apm.h new file mode 100644 index 000000000000..8b091e93651f --- /dev/null +++ b/include/asm-sh/apm.h @@ -0,0 +1,46 @@ +/* + * Copyright 2006 (c) Andriy Skulysh + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + */ + +#ifndef __ASM_SH_APM_H +#define __ASM_SH_APM_H + +#define APM_AC_OFFLINE 0 +#define APM_AC_ONLINE 1 +#define APM_AC_BACKUP 2 +#define APM_AC_UNKNOWN 0xff + +#define APM_BATTERY_STATUS_HIGH 0 +#define APM_BATTERY_STATUS_LOW 1 +#define APM_BATTERY_STATUS_CRITICAL 2 +#define APM_BATTERY_STATUS_CHARGING 3 +#define APM_BATTERY_STATUS_NOT_PRESENT 4 +#define APM_BATTERY_STATUS_UNKNOWN 0xff + +#define APM_BATTERY_LIFE_UNKNOWN 0xFFFF +#define APM_BATTERY_LIFE_MINUTES 0x8000 +#define APM_BATTERY_LIFE_VALUE_MASK 0x7FFF + +#define APM_BATTERY_FLAG_HIGH (1 << 0) +#define APM_BATTERY_FLAG_LOW (1 << 1) +#define APM_BATTERY_FLAG_CRITICAL (1 << 2) +#define APM_BATTERY_FLAG_CHARGING (1 << 3) +#define APM_BATTERY_FLAG_NOT_PRESENT (1 << 7) +#define APM_BATTERY_FLAG_UNKNOWN 0xff + +#define APM_UNITS_MINS 0 +#define APM_UNITS_SECS 1 +#define APM_UNITS_UNKNOWN -1 + + +extern int (*apm_get_info)(char *buf, char **start, off_t fpos, int length); +extern int apm_suspended; + +void apm_queue_event(apm_event_t event); + +#endif diff --git a/include/asm-sh/cpu-sh3/freq.h b/include/asm-sh/cpu-sh3/freq.h index b61b6e331df0..273f3229785c 100644 --- a/include/asm-sh/cpu-sh3/freq.h +++ b/include/asm-sh/cpu-sh3/freq.h @@ -18,5 +18,9 @@ #define MIN_DIVISOR_NR 0 #define MAX_DIVISOR_NR 4 +#define FRQCR_CKOEN 0x0100 +#define FRQCR_PLLEN 0x0080 +#define FRQCR_PSTBY 0x0040 + #endif /* __ASM_CPU_SH3_FREQ_H */ diff --git a/include/asm-sh/hd64461.h b/include/asm-sh/hd64461.h index 0f2e2132cc35..27e5c34e2659 100644 --- a/include/asm-sh/hd64461.h +++ b/include/asm-sh/hd64461.h @@ -40,7 +40,12 @@ #define HD64461_LCDCBAR 0x11000 #define HD64461_LCDCLOR 0x11002 #define HD64461_LCDCCR 0x11004 -#define HD64461_LCDCCR_MOFF 0x80 +#define HD64461_LCDCCR_STBACK 0x0400 +#define HD64461_LCDCCR_STREQ 0x0100 +#define HD64461_LCDCCR_MOFF 0x0080 +#define HD64461_LCDCCR_REFSEL 0x0040 +#define HD64461_LCDCCR_EPON 0x0020 +#define HD64461_LCDCCR_SPON 0x0010 #define HD64461_LDR1 0x11010 #define HD64461_LDR1_DON 0x01 diff --git a/include/asm-sh/hp6xx/hp6xx.h b/include/asm-sh/hp6xx/hp6xx.h index a26247fd3d87..f35134c159dd 100644 --- a/include/asm-sh/hp6xx/hp6xx.h +++ b/include/asm-sh/hp6xx/hp6xx.h @@ -2,16 +2,33 @@ #define __ASM_SH_HP6XX_H /* - * Copyright (C) 2003 Andriy Skulysh + * Copyright (C) 2003, 2004, 2005 Andriy Skulysh + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * */ -#define HP680_TS_IRQ IRQ3_IRQ +#define HP680_BTN_IRQ IRQ0_IRQ +#define HP680_TS_IRQ IRQ3_IRQ +#define HP680_HD64461_IRQ IRQ4_IRQ #define DAC_LCD_BRIGHTNESS 0 #define DAC_SPEAKER_VOLUME 1 +#define PGDR_OPENED 0x01 +#define PGDR_MAIN_BATTERY_OUT 0x04 +#define PGDR_PLAY_BUTTON 0x08 +#define PGDR_REWIND_BUTTON 0x10 +#define PGDR_RECORD_BUTTON 0x20 + #define PHDR_TS_PEN_DOWN 0x08 +#define PJDR_LED_BLINK 0x02 + +#define PKDR_LED_GREEN 0x10 + #define SCPDR_TS_SCAN_ENABLE 0x20 #define SCPDR_TS_SCAN_Y 0x02 #define SCPDR_TS_SCAN_X 0x01 @@ -21,11 +38,43 @@ #define ADC_CHANNEL_TS_Y 1 #define ADC_CHANNEL_TS_X 2 +#define ADC_CHANNEL_BATTERY 3 +#define ADC_CHANNEL_BACKUP 4 +#define ADC_CHANNEL_CHARGE 5 #define HD64461_GPADR_SPEAKER 0x01 #define HD64461_GPADR_PCMCIA0 (0x02|0x08) + #define HD64461_GPBDR_LCDOFF 0x01 +#define HD64461_GPBDR_LCD_CONTRAST_MASK 0x78 #define HD64461_GPBDR_LED_RED 0x80 +#include +#include + +#define PJDR 0xa4000130 +#define PKDR 0xa4000132 + +static inline void hp6xx_led_red(int on) +{ + u16 v16; + v16 = ctrl_inw(CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000); + if (on) + ctrl_outw(v16 & (~HD64461_GPBDR_LED_RED), CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000); + else + ctrl_outw(v16 | HD64461_GPBDR_LED_RED, CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000); +} + +static inline void hp6xx_led_green(int on) +{ + u8 v8; + + v8 = ctrl_inb(PKDR); + if (on) + ctrl_outb(v8 & (~PKDR_LED_GREEN), PKDR); + else + ctrl_outb(v8 | PKDR_LED_GREEN, PKDR); +} + #endif /* __ASM_SH_HP6XX_H */ diff --git a/include/asm-sh/pm.h b/include/asm-sh/pm.h new file mode 100644 index 000000000000..56fdbd6b1c94 --- /dev/null +++ b/include/asm-sh/pm.h @@ -0,0 +1,17 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright 2006 (c) Andriy Skulysh + * + */ +#ifndef __ASM_SH_PM_H +#define __ASM_SH_PM_H + +extern u8 wakeup_start; +extern u8 wakeup_end; + +void pm_enter(void); + +#endif diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index bd7dc0554b11..477422afeb0d 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -172,6 +172,31 @@ static __inline__ void local_irq_disable(void) : "memory"); } +static __inline__ void set_bl_bit(void) +{ + unsigned long __dummy0, __dummy1; + + __asm__ __volatile__ ("stc sr, %0\n\t" + "or %2, %0\n\t" + "and %3, %0\n\t" + "ldc %0, sr" + : "=&r" (__dummy0), "=r" (__dummy1) + : "r" (0x10000000), "r" (0xffffff0f) + : "memory"); +} + +static __inline__ void clear_bl_bit(void) +{ + unsigned long __dummy0, __dummy1; + + __asm__ __volatile__ ("stc sr, %0\n\t" + "and %2, %0\n\t" + "ldc %0, sr" + : "=&r" (__dummy0), "=r" (__dummy1) + : "1" (~0x10000000) + : "memory"); +} + #define local_save_flags(x) \ __asm__("stc sr, %0; and #0xf0, %0" : "=&z" (x) :/**/: "memory" ) diff --git a/include/asm-sh/timer.h b/include/asm-sh/timer.h index dd6579c0b04c..c7ab28095ba0 100644 --- a/include/asm-sh/timer.h +++ b/include/asm-sh/timer.h @@ -6,6 +6,8 @@ struct sys_timer_ops { int (*init)(void); + int (*start)(void); + int (*stop)(void); unsigned long (*get_offset)(void); unsigned long (*get_frequency)(void); }; -- cgit v1.2.3 From 56e8d7b5786dc2f7d1f701500f8914fd2c52b111 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 16:24:55 +0900 Subject: sh: kgdb stub cleanups. Some kgdb cleanup. Move hexchars/highhex/lowhex to the header, so it can be reused by sh-sci. Also drop silly ctrl_inl/outl() overloading being done by the kgdb stub. Signed-off-by: Paul Mundt --- arch/sh/kernel/kgdb_stub.c | 33 +++++---------------------------- include/asm-sh/kgdb.h | 15 +++++++++++++++ 2 files changed, 20 insertions(+), 28 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/kgdb_stub.c b/arch/sh/kernel/kgdb_stub.c index 42638b92b51c..9c6315f0335d 100644 --- a/arch/sh/kernel/kgdb_stub.c +++ b/arch/sh/kernel/kgdb_stub.c @@ -101,16 +101,17 @@ #include #include +#ifdef CONFIG_SH_KGDB_CONSOLE +#include +#endif + #include #include #include #include #include #include - -#ifdef CONFIG_SH_KGDB_CONSOLE -#include -#endif +#include /* Function pointers for linkage */ kgdb_debug_hook_t *kgdb_debug_hook; @@ -240,7 +241,6 @@ static jmp_buf rem_com_env; /* Misc static */ static int stepped_address; static short stepped_opcode; -static const char hexchars[] = "0123456789abcdef"; static char in_buffer[BUFMAX]; static char out_buffer[OUTBUFMAX]; @@ -253,29 +253,6 @@ typedef unsigned char threadref[8]; #define BUF_THREAD_ID_SIZE 16 #endif -/* Return addr as a real volatile address */ -static inline unsigned int ctrl_inl(const unsigned long addr) -{ - return *(volatile unsigned long *) addr; -} - -/* Correctly set *addr using volatile */ -static inline void ctrl_outl(const unsigned int b, unsigned long addr) -{ - *(volatile unsigned long *) addr = b; -} - -/* Get high hex bits */ -static char highhex(const int x) -{ - return hexchars[(x >> 4) & 0xf]; -} - -/* Get low hex bits */ -static char lowhex(const int x) -{ - return hexchars[x & 0xf]; -} /* Convert ch to hex */ static int hex(const char ch) diff --git a/include/asm-sh/kgdb.h b/include/asm-sh/kgdb.h index 1653ffb75fbe..7b26f53fe343 100644 --- a/include/asm-sh/kgdb.h +++ b/include/asm-sh/kgdb.h @@ -128,4 +128,19 @@ extern int setjmp(jmp_buf __jmpb); #define KGDB_ASSERT(condition, message) #endif +/* Taken from sh-stub.c of GDB 4.18 */ +static const char hexchars[] = "0123456789abcdef"; + +/* Get high hex bits */ +static inline char highhex(const int x) +{ + return hexchars[(x >> 4) & 0xf]; +} + +/* Get low hex bits */ +static inline char lowhex(const int x) +{ + return hexchars[x & 0xf]; +} + #endif -- cgit v1.2.3 From 959f85f8a3223c116bbe95dd8a9b207790b5d4d3 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 16:43:28 +0900 Subject: sh: Consolidated SH7751/SH7780 PCI support. This cleans up quite a lot of the PCI mess that we currently have, and attempts to consolidate the duplication in the SH7780 and SH7751 PCI controllers. Signed-off-by: Paul Mundt --- arch/sh/boards/landisk/Makefile | 2 - arch/sh/boards/landisk/io.c | 100 ++++------ arch/sh/boards/mpc1211/setup.c | 15 +- arch/sh/boards/renesas/hs7751rvoip/io.c | 116 ++++-------- arch/sh/boards/renesas/r7780rp/io.c | 103 ++++------ arch/sh/boards/renesas/rts7751r2d/io.c | 89 ++++----- arch/sh/boards/renesas/systemh/io.c | 67 ++----- arch/sh/boards/se/770x/io.c | 11 +- arch/sh/boards/se/7751/io.c | 145 +++----------- arch/sh/boards/sh03/setup.c | 6 +- arch/sh/boards/snapgear/io.c | 84 +++------ arch/sh/boards/titan/io.c | 65 +++---- arch/sh/cchips/hd6446x/hd64461/io.c | 9 +- arch/sh/drivers/pci/Makefile | 5 +- arch/sh/drivers/pci/fixups-dreamcast.c | 38 +--- arch/sh/drivers/pci/fixups-r7780rp.c | 38 ++-- arch/sh/drivers/pci/fixups-rts7751r2d.c | 24 +-- arch/sh/drivers/pci/fixups-sh03.c | 38 +--- arch/sh/drivers/pci/ops-bigsur.c | 18 +- arch/sh/drivers/pci/ops-landisk.c | 68 +++++++ arch/sh/drivers/pci/ops-r7780rp.c | 18 +- arch/sh/drivers/pci/ops-rts7751r2d.c | 13 +- arch/sh/drivers/pci/ops-sh4.c | 164 ++++++++++++++++ arch/sh/drivers/pci/ops-snapgear.c | 21 +-- arch/sh/drivers/pci/ops-titan.c | 16 +- arch/sh/drivers/pci/pci-auto.c | 10 - arch/sh/drivers/pci/pci-sh4.h | 180 ++++++++++++++++++ arch/sh/drivers/pci/pci-sh7751.c | 322 ++++++-------------------------- arch/sh/drivers/pci/pci-sh7751.h | 174 +---------------- arch/sh/drivers/pci/pci-sh7780.c | 270 ++++---------------------- arch/sh/drivers/pci/pci-sh7780.h | 94 +--------- arch/sh/drivers/pci/pci-st40.c | 19 -- arch/sh/drivers/pci/pci.c | 40 +++- arch/sh/kernel/cpu/sh4/Makefile | 3 + arch/sh/kernel/cpu/sh4/setup-sh7780.c | 79 ++++++++ include/asm-sh/io.h | 5 + include/asm-sh/pci.h | 35 +++- 37 files changed, 984 insertions(+), 1520 deletions(-) create mode 100644 arch/sh/drivers/pci/ops-landisk.c create mode 100644 arch/sh/drivers/pci/ops-sh4.c create mode 100644 arch/sh/drivers/pci/pci-sh4.h create mode 100644 arch/sh/kernel/cpu/sh4/setup-sh7780.c (limited to 'arch/sh/kernel') diff --git a/arch/sh/boards/landisk/Makefile b/arch/sh/boards/landisk/Makefile index 60e75c6db0eb..89e4beb2ad47 100644 --- a/arch/sh/boards/landisk/Makefile +++ b/arch/sh/boards/landisk/Makefile @@ -3,5 +3,3 @@ # obj-y := setup.o io.o irq.o rtc.o landisk_pwb.o - -obj-$(CONFIG_PCI) += pci.o diff --git a/arch/sh/boards/landisk/io.c b/arch/sh/boards/landisk/io.c index aa6b145c9e8f..92498b4947d5 100644 --- a/arch/sh/boards/landisk/io.c +++ b/arch/sh/boards/landisk/io.c @@ -14,39 +14,16 @@ * modifed by kogiidena * 2005.03.03 */ - #include #include +#include #include #include #include -#include -#include -#include "../../drivers/pci/pci-sh7751.h" - extern void *area5_io_base; /* Area 5 I/O Base address */ extern void *area6_io_base; /* Area 6 I/O Base address */ -/* - * The 7751R LANDISK uses the built-in PCI controller (PCIC) - * of the 7751R processor, and has a SuperIO accessible via the PCI. - * The board also includes a PCMCIA controller on its memory bus, - * like the other Solution Engine boards. - */ - -#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR) -#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) -#define PCI_IO_AREA SH7751_PCI_IO_BASE -#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE - -#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) - -static inline void delay(void) -{ - ctrl_inw(0xa0000000); -} - static inline unsigned long port2adr(unsigned int port) { if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) @@ -67,17 +44,6 @@ static inline unsigned long port2adr(unsigned int port) return port; } -/* In case someone configures the kernel w/o PCI support: in that */ -/* scenario, don't ever bother to check for PCI-window addresses */ - -/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */ -#if defined(CONFIG_PCI) -#define CHECK_SH7751_PCIIO(port) \ - ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE))) -#else -#define CHECK_SH_7751_PCIIO(port) (0) -#endif - /* * General outline: remap really low stuff [eventually] to SuperIO, * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) @@ -89,8 +55,8 @@ u8 landisk_inb(unsigned long port) { if (PXSEG(port)) return ctrl_inb(port); - else if (CHECK_SH7751_PCIIO(port)) - return ctrl_inb(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + return ctrl_inb(pci_ioaddr(port)); return ctrl_inw(port2adr(port)) & 0xff; } @@ -101,12 +67,12 @@ u8 landisk_inb_p(unsigned long port) if (PXSEG(port)) v = ctrl_inb(port); - else if (CHECK_SH7751_PCIIO(port)) - v = ctrl_inb(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + v = ctrl_inb(pci_ioaddr(port)); else v = ctrl_inw(port2adr(port)) & 0xff; - delay(); + ctrl_delay(); return v; } @@ -115,8 +81,8 @@ u16 landisk_inw(unsigned long port) { if (PXSEG(port)) return ctrl_inw(port); - else if (CHECK_SH7751_PCIIO(port)) - return ctrl_inw(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + return ctrl_inw(pci_ioaddr(port)); else maybebadio(port); @@ -127,8 +93,8 @@ u32 landisk_inl(unsigned long port) { if (PXSEG(port)) return ctrl_inl(port); - else if (CHECK_SH7751_PCIIO(port)) - return ctrl_inl(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + return ctrl_inl(pci_ioaddr(port)); else maybebadio(port); @@ -139,8 +105,8 @@ void landisk_outb(u8 value, unsigned long port) { if (PXSEG(port)) ctrl_outb(value, port); - else if (CHECK_SH7751_PCIIO(port)) - ctrl_outb(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + ctrl_outb(value, pci_ioaddr(port)); else ctrl_outw(value, port2adr(port)); } @@ -149,19 +115,19 @@ void landisk_outb_p(u8 value, unsigned long port) { if (PXSEG(port)) ctrl_outb(value, port); - else if (CHECK_SH7751_PCIIO(port)) - ctrl_outb(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + ctrl_outb(value, pci_ioaddr(port)); else ctrl_outw(value, port2adr(port)); - delay(); + ctrl_delay(); } void landisk_outw(u16 value, unsigned long port) { if (PXSEG(port)) ctrl_outw(value, port); - else if (CHECK_SH7751_PCIIO(port)) - ctrl_outw(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + ctrl_outw(value, pci_ioaddr(port)); else maybebadio(port); } @@ -170,8 +136,8 @@ void landisk_outl(u32 value, unsigned long port) { if (PXSEG(port)) ctrl_outl(value, port); - else if (CHECK_SH7751_PCIIO(port)) - ctrl_outl(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + ctrl_outl(value, pci_ioaddr(port)); else maybebadio(port); } @@ -184,8 +150,8 @@ void landisk_insb(unsigned long port, void *dst, unsigned long count) if (PXSEG(port)) { while (count--) *buf++ = *(volatile u8 *)port; - } else if (CHECK_SH7751_PCIIO(port)) { - volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); + } else if (is_pci_ioaddr(port)) { + volatile u8 *bp = (volatile u8 *)pci_ioaddr(port); while (count--) *buf++ = *bp; @@ -203,8 +169,8 @@ void landisk_insw(unsigned long port, void *dst, unsigned long count) if (PXSEG(port)) p = (volatile u16 *)port; - else if (CHECK_SH7751_PCIIO(port)) - p = (volatile u16 *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + p = (volatile u16 *)pci_ioaddr(port); else p = (volatile u16 *)port2adr(port); while (count--) @@ -215,8 +181,8 @@ void landisk_insl(unsigned long port, void *dst, unsigned long count) { u32 *buf = dst; - if (CHECK_SH7751_PCIIO(port)) { - volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); + if (is_pci_ioaddr(port)) { + volatile u32 *p = (volatile u32 *)pci_ioaddr(port); while (count--) *buf++ = *p; @@ -232,8 +198,8 @@ void landisk_outsb(unsigned long port, const void *src, unsigned long count) if (PXSEG(port)) while (count--) ctrl_outb(*buf++, port); - else if (CHECK_SH7751_PCIIO(port)) { - volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) { + volatile u8 *bp = (volatile u8 *)pci_ioaddr(port); while (count--) *bp = *buf++; @@ -251,8 +217,8 @@ void landisk_outsw(unsigned long port, const void *src, unsigned long count) if (PXSEG(port)) p = (volatile u16 *)port; - else if (CHECK_SH7751_PCIIO(port)) - p = (volatile u16 *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + p = (volatile u16 *)pci_ioaddr(port); else p = (volatile u16 *)port2adr(port); @@ -264,8 +230,8 @@ void landisk_outsl(unsigned long port, const void *src, unsigned long count) { const u32 *buf = src; - if (CHECK_SH7751_PCIIO(port)) { - volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); + if (is_pci_ioaddr(port)) { + volatile u32 *p = (volatile u32 *)pci_ioaddr(port); while (count--) *p = *buf++; @@ -277,8 +243,8 @@ void __iomem *landisk_ioport_map(unsigned long port, unsigned int size) { if (PXSEG(port)) return (void __iomem *)port; - else if (CHECK_SH7751_PCIIO(port)) - return (void __iomem *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + return (void __iomem *)pci_ioaddr(port); return (void __iomem *)port2adr(port); } diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c index 2bfb221cc35c..a8c5180ae219 100644 --- a/arch/sh/boards/mpc1211/setup.c +++ b/arch/sh/boards/mpc1211/setup.c @@ -255,23 +255,12 @@ void __init init_mpc1211_IRQ(void) } } -/* - Initialize the board -*/ - - -static void delay (void) -{ - volatile unsigned short tmp; - tmp = *(volatile unsigned short *) 0xa0000000; -} - -static void delay1000 (void) +static void delay1000(void) { int i; for (i=0; i<1000; i++) - delay (); + ctrl_delay(); } static int put_smb_blk(unsigned char *p, int address, int command, int no) diff --git a/arch/sh/boards/renesas/hs7751rvoip/io.c b/arch/sh/boards/renesas/hs7751rvoip/io.c index ecdce7ef6a34..8c26550ca2e4 100644 --- a/arch/sh/boards/renesas/hs7751rvoip/io.c +++ b/arch/sh/boards/renesas/hs7751rvoip/io.c @@ -13,14 +13,11 @@ #include #include +#include #include #include #include -#include -#include -#include "../../../drivers/pci/pci-sh7751.h" - extern void *area6_io8_base; /* Area 6 8bit I/O Base address */ extern void *area5_io16_base; /* Area 5 16bit I/O Base address */ @@ -31,27 +28,17 @@ extern void *area5_io16_base; /* Area 5 16bit I/O Base address */ * like the other Solution Engine boards. */ -#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR) -#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) -#define PCI_IO_AREA SH7751_PCI_IO_BASE -#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE -#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) - #define CODEC_IO_BASE 0x1000 #define CODEC_IOMAP(a) ((unsigned long)area6_io8_base + ((a) - CODEC_IO_BASE)) -static inline void delay(void) -{ - ctrl_inw(0xa0000000); -} - static inline unsigned long port2adr(unsigned int port) { if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) if (port == 0x3f6) return ((unsigned long)area5_io16_base + 0x0c); else - return ((unsigned long)area5_io16_base + 0x800 + ((port-0x1f0) << 1)); + return ((unsigned long)area5_io16_base + 0x800 + + ((port-0x1f0) << 1)); else maybebadio((unsigned long)port); return port; @@ -70,25 +57,10 @@ static inline int shifted_port(unsigned long port) } #if defined(CONFIG_HS7751RVOIP_CODEC) -static inline int -codec_port(unsigned long port) -{ - if (CODEC_IO_BASE <= port && port < (CODEC_IO_BASE+0x20)) - return 1; - else - return 0; -} -#endif - -/* In case someone configures the kernel w/o PCI support: in that */ -/* scenario, don't ever bother to check for PCI-window addresses */ - -/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */ -#if defined(CONFIG_PCI) -#define CHECK_SH7751_PCIIO(port) \ - ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE))) +#define codec_port(port) \ + ((CODEC_IO_BASE <= (port)) && ((port) < (CODEC_IO_BASE + 0x20))) #else -#define CHECK_SH7751_PCIIO(port) (0) +#define codec_port(port) (0) #endif /* @@ -102,12 +74,10 @@ unsigned char hs7751rvoip_inb(unsigned long port) { if (PXSEG(port)) return ctrl_inb(port); -#if defined(CONFIG_HS7751RVOIP_CODEC) else if (codec_port(port)) return ctrl_inb(CODEC_IOMAP(port)); -#endif - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - return ctrl_inb(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + return ctrl_inb(pci_ioaddr(port)); else return ctrl_inw(port2adr(port)) & 0xff; } @@ -118,15 +88,13 @@ unsigned char hs7751rvoip_inb_p(unsigned long port) if (PXSEG(port)) v = ctrl_inb(port); -#if defined(CONFIG_HS7751RVOIP_CODEC) else if (codec_port(port)) v = ctrl_inb(CODEC_IOMAP(port)); -#endif - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - v = ctrl_inb(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + v = ctrl_inb(pci_ioaddr(port)); else v = ctrl_inw(port2adr(port)) & 0xff; - delay(); + ctrl_delay(); return v; } @@ -134,8 +102,8 @@ unsigned short hs7751rvoip_inw(unsigned long port) { if (PXSEG(port)) return ctrl_inw(port); - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - return ctrl_inw(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + return ctrl_inw(pci_ioaddr(port)); else maybebadio(port); return 0; @@ -145,8 +113,8 @@ unsigned int hs7751rvoip_inl(unsigned long port) { if (PXSEG(port)) return ctrl_inl(port); - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - return ctrl_inl(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + return ctrl_inl(pci_ioaddr(port)); else maybebadio(port); return 0; @@ -157,12 +125,10 @@ void hs7751rvoip_outb(unsigned char value, unsigned long port) if (PXSEG(port)) ctrl_outb(value, port); -#if defined(CONFIG_HS7751RVOIP_CODEC) else if (codec_port(port)) ctrl_outb(value, CODEC_IOMAP(port)); -#endif - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - ctrl_outb(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + ctrl_outb(value, pci_ioaddr(port)); else ctrl_outb(value, port2adr(port)); } @@ -171,24 +137,22 @@ void hs7751rvoip_outb_p(unsigned char value, unsigned long port) { if (PXSEG(port)) ctrl_outb(value, port); -#if defined(CONFIG_HS7751RVOIP_CODEC) else if (codec_port(port)) ctrl_outb(value, CODEC_IOMAP(port)); -#endif - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - ctrl_outb(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + ctrl_outb(value, pci_ioaddr(port)); else ctrl_outw(value, port2adr(port)); - delay(); + ctrl_delay(); } void hs7751rvoip_outw(unsigned short value, unsigned long port) { if (PXSEG(port)) ctrl_outw(value, port); - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - ctrl_outw(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + ctrl_outw(value, pci_ioaddr(port)); else maybebadio(port); } @@ -197,8 +161,8 @@ void hs7751rvoip_outl(unsigned int value, unsigned long port) { if (PXSEG(port)) ctrl_outl(value, port); - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - ctrl_outl(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + ctrl_outl(value, pci_ioaddr(port)); else maybebadio(port); } @@ -210,13 +174,11 @@ void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count) if (PXSEG(port)) while (count--) *buf++ = ctrl_inb(port); -#if defined(CONFIG_HS7751RVOIP_CODEC) else if (codec_port(port)) while (count--) *buf++ = ctrl_inb(CODEC_IOMAP(port)); -#endif - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { - volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) { + volatile u8 *bp = (volatile u8 *)pci_ioaddr(port); while (count--) *buf++ = *bp; @@ -235,8 +197,8 @@ void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count) if (PXSEG(port)) p = (volatile u16 *)port; - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - p = (volatile u16 *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) + p = (volatile u16 *)pci_ioaddr(port); else p = (volatile u16 *)port2adr(port); while (count--) @@ -246,8 +208,8 @@ void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count) void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count) { - if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { - volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); + if (is_pci_ioaddr(port) || shifted_port(port)) { + volatile u32 *p = (volatile u32 *)pci_ioaddr(port); u32 *buf = addr; while (count--) @@ -263,13 +225,11 @@ void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count if (PXSEG(port)) while (count--) ctrl_outb(*buf++, port); -#if defined(CONFIG_HS7751RVOIP_CODEC) else if (codec_port(port)) while (count--) ctrl_outb(*buf++, CODEC_IOMAP(port)); -#endif - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { - volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) { + volatile u8 *bp = (volatile u8 *)pci_ioaddr(port); while (count--) *bp = *buf++; @@ -288,8 +248,8 @@ void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count if (PXSEG(port)) p = (volatile u16 *)port; - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - p = (volatile u16 *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) + p = (volatile u16 *)pci_ioaddr(port); else p = (volatile u16 *)port2adr(port); @@ -301,8 +261,8 @@ void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count { const u32 *buf = addr; - if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { - volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); + if (is_pci_ioaddr(port) || shifted_port(port)) { + volatile u32 *p = (volatile u32 *)pci_ioaddr(port); while (count--) *p = *buf++; @@ -316,8 +276,8 @@ void __iomem *hs7751rvoip_ioport_map(unsigned long port, unsigned int size) return (void __iomem *)port; else if (unlikely(codec_port(port) && (size == 1))) return (void __iomem *)CODEC_IOMAP(port); - else if (CHECK_SH7751_PCIIO(port)) - return (void __iomem *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + return (void __iomem *)pci_ioaddr(port); return (void __iomem *)port2adr(port); } diff --git a/arch/sh/boards/renesas/r7780rp/io.c b/arch/sh/boards/renesas/r7780rp/io.c index f73ca3f0f5a1..db92d6e6ae99 100644 --- a/arch/sh/boards/renesas/r7780rp/io.c +++ b/arch/sh/boards/renesas/r7780rp/io.c @@ -1,6 +1,4 @@ /* - * linux/arch/sh/kernel/io_r7780rp.c - * * Copyright (C) 2001 Ian da Silva, Jeremy Siegel * Based largely on io_se.c. * @@ -10,37 +8,13 @@ * placeholder code from io_r7780rp.c left in with the * expectation of later SuperIO and PCMCIA access. */ - +#include #include #include #include #include #include -#include -#include -#include "../../../drivers/pci/pci-sh7780.h" - -/* - * The 7780 R7780RP-1 uses the built-in PCI controller (PCIC) - * of the 7780 processor, and has a SuperIO accessible via the PCI. - * The board also includes a PCMCIA controller on its memory bus, - * like the other Solution Engine boards. - */ - -#define SH7780_PCIIOBR_MASK 0xFFFC0000 /* IO Space Mask */ -#define PCIIOBR (volatile long *)PCI_REG(SH7780_PCIIOBR) -#define PCIMBR (volatile long *)PCI_REG(SH7780_PCIMBR) -#define PCI_IO_AREA SH7780_PCI_IO_BASE -#define PCI_MEM_AREA SH7780_PCI_CONFIG_BASE - -#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7780_PCIIOBR_MASK)) - -static inline void delay(void) -{ - ctrl_inw(0xa0000000); -} - static inline unsigned long port2adr(unsigned int port) { if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) @@ -78,17 +52,6 @@ static inline int shifted_port(unsigned long port) return 1; } -/* In case someone configures the kernel w/o PCI support: in that */ -/* scenario, don't ever bother to check for PCI-window addresses */ - -/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */ -#if defined(CONFIG_PCI) -#define CHECK_SH7780_PCIIO(port) \ - ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7780_PCI_IO_SIZE))) -#else -#define CHECK_SH7780_PCIIO(port) (0) -#endif - #if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE) #define CHECK_AX88796L_PORT(port) \ ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20))) @@ -109,8 +72,8 @@ u8 r7780rp_inb(unsigned long port) return ctrl_inw(port88796l(port, 0)) & 0xff; else if (PXSEG(port)) return ctrl_inb(port); - else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) - return ctrl_inb(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + return ctrl_inb(pci_ioaddr(port)); return ctrl_inw(port2adr(port)) & 0xff; } @@ -123,12 +86,12 @@ u8 r7780rp_inb_p(unsigned long port) v = ctrl_inw(port88796l(port, 0)) & 0xff; else if (PXSEG(port)) v = ctrl_inb(port); - else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) - v = ctrl_inb(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + v = ctrl_inb(pci_ioaddr(port)); else v = ctrl_inw(port2adr(port)) & 0xff; - delay(); + ctrl_delay(); return v; } @@ -139,8 +102,8 @@ u16 r7780rp_inw(unsigned long port) maybebadio(port); else if (PXSEG(port)) return ctrl_inw(port); - else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) - return ctrl_inw(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + return ctrl_inw(pci_ioaddr(port)); else maybebadio(port); @@ -153,8 +116,8 @@ u32 r7780rp_inl(unsigned long port) maybebadio(port); else if (PXSEG(port)) return ctrl_inl(port); - else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) - return ctrl_inl(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + return ctrl_inl(pci_ioaddr(port)); else maybebadio(port); @@ -167,8 +130,8 @@ void r7780rp_outb(u8 value, unsigned long port) ctrl_outw(value, port88796l(port, 0)); else if (PXSEG(port)) ctrl_outb(value, port); - else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) - ctrl_outb(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + ctrl_outb(value, pci_ioaddr(port)); else ctrl_outw(value, port2adr(port)); } @@ -179,12 +142,12 @@ void r7780rp_outb_p(u8 value, unsigned long port) ctrl_outw(value, port88796l(port, 0)); else if (PXSEG(port)) ctrl_outb(value, port); - else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) - ctrl_outb(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + ctrl_outb(value, pci_ioaddr(port)); else ctrl_outw(value, port2adr(port)); - delay(); + ctrl_delay(); } void r7780rp_outw(u16 value, unsigned long port) @@ -193,8 +156,8 @@ void r7780rp_outw(u16 value, unsigned long port) maybebadio(port); else if (PXSEG(port)) ctrl_outw(value, port); - else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) - ctrl_outw(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + ctrl_outw(value, pci_ioaddr(port)); else maybebadio(port); } @@ -205,8 +168,8 @@ void r7780rp_outl(u32 value, unsigned long port) maybebadio(port); else if (PXSEG(port)) ctrl_outl(value, port); - else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) - ctrl_outl(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port) || shifted_port(port)) + ctrl_outl(value, pci_ioaddr(port)); else maybebadio(port); } @@ -223,8 +186,8 @@ void r7780rp_insb(unsigned long port, void *dst, unsigned long count) } else if (PXSEG(port)) { while (count--) *buf++ = *(volatile u8 *)port; - } else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { - volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); + } else if (is_pci_ioaddr(port) || shifted_port(port)) { + volatile u8 *bp = (volatile u8 *)pci_ioaddr(port); while (count--) *buf++ = *bp; @@ -244,8 +207,8 @@ void r7780rp_insw(unsigned long port, void *dst, unsigned long count) p = (volatile u16 *)port88796l(port, 1); else if (PXSEG(port)) p = (volatile u16 *)port; - else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) - p = (volatile u16 *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) + p = (volatile u16 *)pci_ioaddr(port); else p = (volatile u16 *)port2adr(port); @@ -259,8 +222,8 @@ void r7780rp_insl(unsigned long port, void *dst, unsigned long count) if (CHECK_AX88796L_PORT(port)) maybebadio(port); - else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { - volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) { + volatile u32 *p = (volatile u32 *)pci_ioaddr(port); while (count--) *buf++ = *p; @@ -280,8 +243,8 @@ void r7780rp_outsb(unsigned long port, const void *src, unsigned long count) } else if (PXSEG(port)) while (count--) ctrl_outb(*buf++, port); - else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { - volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) { + volatile u8 *bp = (volatile u8 *)pci_ioaddr(port); while (count--) *bp = *buf++; @@ -301,8 +264,8 @@ void r7780rp_outsw(unsigned long port, const void *src, unsigned long count) p = (volatile u16 *)port88796l(port, 1); else if (PXSEG(port)) p = (volatile u16 *)port; - else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) - p = (volatile u16 *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) + p = (volatile u16 *)pci_ioaddr(port); else p = (volatile u16 *)port2adr(port); @@ -316,8 +279,8 @@ void r7780rp_outsl(unsigned long port, const void *src, unsigned long count) if (CHECK_AX88796L_PORT(port)) maybebadio(port); - else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { - volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) { + volatile u32 *p = (volatile u32 *)pci_ioaddr(port); while (count--) *p = *buf++; @@ -331,8 +294,8 @@ void __iomem *r7780rp_ioport_map(unsigned long port, unsigned int size) return (void __iomem *)port88796l(port, size > 1); else if (PXSEG(port)) return (void __iomem *)port; - else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) - return (void __iomem *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) + return (void __iomem *)pci_ioaddr(port); return (void __iomem *)port2adr(port); } diff --git a/arch/sh/boards/renesas/rts7751r2d/io.c b/arch/sh/boards/renesas/rts7751r2d/io.c index 8dc2a2e2e5df..135aa0b5e62d 100644 --- a/arch/sh/boards/renesas/rts7751r2d/io.c +++ b/arch/sh/boards/renesas/rts7751r2d/io.c @@ -1,6 +1,4 @@ /* - * linux/arch/sh/kernel/io_rts7751r2d.c - * * Copyright (C) 2001 Ian da Silva, Jeremy Siegel * Based largely on io_se.c. * @@ -10,11 +8,9 @@ * placeholder code from io_rts7751r2d.c left in with the * expectation of later SuperIO and PCMCIA access. */ - #include #include #include -#include "../../../drivers/pci/pci-sh7751.h" #include #include #include @@ -26,18 +22,6 @@ * like the other Solution Engine boards. */ -#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR) -#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) -#define PCI_IO_AREA SH7751_PCI_IO_BASE -#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE - -#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) - -static inline void delay(void) -{ - ctrl_inw(0xa0000000); -} - static inline unsigned long port2adr(unsigned int port) { if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) @@ -75,17 +59,6 @@ static inline int shifted_port(unsigned long port) return 1; } -/* In case someone configures the kernel w/o PCI support: in that */ -/* scenario, don't ever bother to check for PCI-window addresses */ - -/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */ -#if defined(CONFIG_PCI) -#define CHECK_SH7751_PCIIO(port) \ - ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE))) -#else -#define CHECK_SH7751_PCIIO(port) (0) -#endif - #if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE) #define CHECK_AX88796L_PORT(port) \ ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20))) @@ -106,8 +79,8 @@ unsigned char rts7751r2d_inb(unsigned long port) return (*(volatile unsigned short *)port88796l(port, 0)) & 0xff; else if (PXSEG(port)) return *(volatile unsigned char *)port; - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - return *(volatile unsigned char *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) + return *(volatile unsigned char *)pci_ioaddr(port); else return (*(volatile unsigned short *)port2adr(port) & 0xff); } @@ -120,11 +93,12 @@ unsigned char rts7751r2d_inb_p(unsigned long port) v = (*(volatile unsigned short *)port88796l(port, 0)) & 0xff; else if (PXSEG(port)) v = *(volatile unsigned char *)port; - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - v = *(volatile unsigned char *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) + v = *(volatile unsigned char *)pci_ioaddr(port); else v = (*(volatile unsigned short *)port2adr(port) & 0xff); - delay(); + + ctrl_delay(); return v; } @@ -135,8 +109,8 @@ unsigned short rts7751r2d_inw(unsigned long port) maybebadio(port); else if (PXSEG(port)) return *(volatile unsigned short *)port; - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - return *(volatile unsigned short *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) + return *(volatile unsigned short *)pci_ioaddr(port); else maybebadio(port); @@ -149,8 +123,8 @@ unsigned int rts7751r2d_inl(unsigned long port) maybebadio(port); else if (PXSEG(port)) return *(volatile unsigned long *)port; - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - return *(volatile unsigned long *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) + return *(volatile unsigned long *)pci_ioaddr(port); else maybebadio(port); @@ -163,8 +137,8 @@ void rts7751r2d_outb(unsigned char value, unsigned long port) *((volatile unsigned short *)port88796l(port, 0)) = value; else if (PXSEG(port)) *(volatile unsigned char *)port = value; - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - *(volatile unsigned char *)PCI_IOMAP(port) = value; + else if (is_pci_ioaddr(port) || shifted_port(port)) + *(volatile unsigned char *)pci_ioaddr(port) = value; else *(volatile unsigned short *)port2adr(port) = value; } @@ -175,11 +149,12 @@ void rts7751r2d_outb_p(unsigned char value, unsigned long port) *((volatile unsigned short *)port88796l(port, 0)) = value; else if (PXSEG(port)) *(volatile unsigned char *)port = value; - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - *(volatile unsigned char *)PCI_IOMAP(port) = value; + else if (is_pci_ioaddr(port) || shifted_port(port)) + *(volatile unsigned char *)pci_ioaddr(port) = value; else *(volatile unsigned short *)port2adr(port) = value; - delay(); + + ctrl_delay(); } void rts7751r2d_outw(unsigned short value, unsigned long port) @@ -188,8 +163,8 @@ void rts7751r2d_outw(unsigned short value, unsigned long port) maybebadio(port); else if (PXSEG(port)) *(volatile unsigned short *)port = value; - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - *(volatile unsigned short *)PCI_IOMAP(port) = value; + else if (is_pci_ioaddr(port) || shifted_port(port)) + *(volatile unsigned short *)pci_ioaddr(port) = value; else maybebadio(port); } @@ -200,8 +175,8 @@ void rts7751r2d_outl(unsigned int value, unsigned long port) maybebadio(port); else if (PXSEG(port)) *(volatile unsigned long *)port = value; - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - *(volatile unsigned long *)PCI_IOMAP(port) = value; + else if (is_pci_ioaddr(port) || shifted_port(port)) + *(volatile unsigned long *)pci_ioaddr(port) = value; else maybebadio(port); } @@ -219,8 +194,8 @@ void rts7751r2d_insb(unsigned long port, void *addr, unsigned long count) } else if (PXSEG(port)) while (count--) ctrl_outb(ctrl_inb(port), a++); - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { - bp = (__u8 *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) { + bp = (__u8 *)pci_ioaddr(port); while (count--) ctrl_outb(*bp, a++); } else { @@ -239,8 +214,8 @@ void rts7751r2d_insw(unsigned long port, void *addr, unsigned long count) p = (volatile unsigned short *)port88796l(port, 1); else if (PXSEG(port)) p = (volatile unsigned short *)port; - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - p = (volatile unsigned short *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) + p = (volatile unsigned short *)pci_ioaddr(port); else p = (volatile unsigned short *)port2adr(port); while (count--) @@ -251,11 +226,11 @@ void rts7751r2d_insl(unsigned long port, void *addr, unsigned long count) { if (CHECK_AX88796L_PORT(port)) maybebadio(port); - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { + else if (is_pci_ioaddr(port) || shifted_port(port)) { unsigned long a = (unsigned long)addr; while (count--) { - ctrl_outl(ctrl_inl(PCI_IOMAP(port)), a); + ctrl_outl(ctrl_inl(pci_ioaddr(port)), a); a += 4; } } else @@ -275,8 +250,8 @@ void rts7751r2d_outsb(unsigned long port, const void *addr, unsigned long count) } else if (PXSEG(port)) while (count--) ctrl_outb(a++, port); - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { - bp = (__u8 *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) { + bp = (__u8 *)pci_ioaddr(port); while (count--) *bp = ctrl_inb(a++); } else { @@ -295,8 +270,8 @@ void rts7751r2d_outsw(unsigned long port, const void *addr, unsigned long count) p = (volatile unsigned short *)port88796l(port, 1); else if (PXSEG(port)) p = (volatile unsigned short *)port; - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) - p = (volatile unsigned short *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port) || shifted_port(port)) + p = (volatile unsigned short *)pci_ioaddr(port); else p = (volatile unsigned short *)port2adr(port); @@ -310,11 +285,11 @@ void rts7751r2d_outsl(unsigned long port, const void *addr, unsigned long count) { if (CHECK_AX88796L_PORT(port)) maybebadio(port); - else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { + else if (is_pci_ioaddr(port) || shifted_port(port)) { unsigned long a = (unsigned long)addr; while (count--) { - ctrl_outl(ctrl_inl(a), PCI_IOMAP(port)); + ctrl_outl(ctrl_inl(a), pci_ioaddr(port)); a += 4; } } else diff --git a/arch/sh/boards/renesas/systemh/io.c b/arch/sh/boards/renesas/systemh/io.c index 0befd4f9894c..cde6e5d192c4 100644 --- a/arch/sh/boards/renesas/systemh/io.c +++ b/arch/sh/boards/renesas/systemh/io.c @@ -5,36 +5,16 @@ * Based largely on io_se.c. * * I/O routine for Hitachi 7751 Systemh. - * */ - #include #include #include #include #include #include -#include "../../../drivers/pci/pci-sh7751.h" - -/* - * The 7751 SystemH Engine uses the built-in PCI controller (PCIC) - * of the 7751 processor, and has a SuperIO accessible on its memory - * bus. - */ - -#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR) -#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) -#define PCI_IO_AREA SH7751_PCI_IO_BASE -#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE -#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) #define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area of smc lan chip*/ -static inline void delay(void) -{ - ctrl_inw(0xa0000000); -} - static inline volatile __u16 * port2adr(unsigned int port) { @@ -44,17 +24,6 @@ port2adr(unsigned int port) return (volatile __u16*)port; } -/* In case someone configures the kernel w/o PCI support: in that */ -/* scenario, don't ever bother to check for PCI-window addresses */ - -/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */ -#if defined(CONFIG_PCI) -#define CHECK_SH7751_PCIIO(port) \ - ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE))) -#else -#define CHECK_SH7751_PCIIO(port) (0) -#endif - /* * General outline: remap really low stuff [eventually] to SuperIO, * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) @@ -66,8 +35,8 @@ unsigned char sh7751systemh_inb(unsigned long port) { if (PXSEG(port)) return *(volatile unsigned char *)port; - else if (CHECK_SH7751_PCIIO(port)) - return *(volatile unsigned char *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + return *(volatile unsigned char *)pci_ioaddr(port); else if (port <= 0x3F1) return *(volatile unsigned char *)ETHER_IOMAP(port); else @@ -80,13 +49,13 @@ unsigned char sh7751systemh_inb_p(unsigned long port) if (PXSEG(port)) v = *(volatile unsigned char *)port; - else if (CHECK_SH7751_PCIIO(port)) - v = *(volatile unsigned char *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + v = *(volatile unsigned char *)pci_ioaddr(port); else if (port <= 0x3F1) v = *(volatile unsigned char *)ETHER_IOMAP(port); else v = (*port2adr(port))&0xff; - delay(); + ctrl_delay(); return v; } @@ -94,8 +63,8 @@ unsigned short sh7751systemh_inw(unsigned long port) { if (PXSEG(port)) return *(volatile unsigned short *)port; - else if (CHECK_SH7751_PCIIO(port)) - return *(volatile unsigned short *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + return *(volatile unsigned short *)pci_ioaddr(port); else if (port >= 0x2000) return *port2adr(port); else if (port <= 0x3F1) @@ -109,8 +78,8 @@ unsigned int sh7751systemh_inl(unsigned long port) { if (PXSEG(port)) return *(volatile unsigned long *)port; - else if (CHECK_SH7751_PCIIO(port)) - return *(volatile unsigned int *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + return *(volatile unsigned int *)pci_ioaddr(port); else if (port >= 0x2000) return *port2adr(port); else if (port <= 0x3F1) @@ -125,8 +94,8 @@ void sh7751systemh_outb(unsigned char value, unsigned long port) if (PXSEG(port)) *(volatile unsigned char *)port = value; - else if (CHECK_SH7751_PCIIO(port)) - *((unsigned char*)PCI_IOMAP(port)) = value; + else if (is_pci_ioaddr(port)) + *((unsigned char*)pci_ioaddr(port)) = value; else if (port <= 0x3F1) *(volatile unsigned char *)ETHER_IOMAP(port) = value; else @@ -137,21 +106,21 @@ void sh7751systemh_outb_p(unsigned char value, unsigned long port) { if (PXSEG(port)) *(volatile unsigned char *)port = value; - else if (CHECK_SH7751_PCIIO(port)) - *((unsigned char*)PCI_IOMAP(port)) = value; + else if (is_pci_ioaddr(port)) + *((unsigned char*)pci_ioaddr(port)) = value; else if (port <= 0x3F1) *(volatile unsigned char *)ETHER_IOMAP(port) = value; else *(port2adr(port)) = value; - delay(); + ctrl_delay(); } void sh7751systemh_outw(unsigned short value, unsigned long port) { if (PXSEG(port)) *(volatile unsigned short *)port = value; - else if (CHECK_SH7751_PCIIO(port)) - *((unsigned short *)PCI_IOMAP(port)) = value; + else if (is_pci_ioaddr(port)) + *((unsigned short *)pci_ioaddr(port)) = value; else if (port >= 0x2000) *port2adr(port) = value; else if (port <= 0x3F1) @@ -164,8 +133,8 @@ void sh7751systemh_outl(unsigned int value, unsigned long port) { if (PXSEG(port)) *(volatile unsigned long *)port = value; - else if (CHECK_SH7751_PCIIO(port)) - *((unsigned long*)PCI_IOMAP(port)) = value; + else if (is_pci_ioaddr(port)) + *((unsigned long*)pci_ioaddr(port)) = value; else maybebadio(port); } diff --git a/arch/sh/boards/se/770x/io.c b/arch/sh/boards/se/770x/io.c index 5102201c97ab..9941949331ab 100644 --- a/arch/sh/boards/se/770x/io.c +++ b/arch/sh/boards/se/770x/io.c @@ -1,4 +1,4 @@ -/* $Id: io.c,v 1.6 2006/01/04 17:53:54 lethal Exp $ +/* $Id: io.c,v 1.7 2006/02/05 21:55:29 lethal Exp $ * * linux/arch/sh/kernel/io_se.c * @@ -20,11 +20,6 @@ int sh_pcic_io_stop; int sh_pcic_io_type; int sh_pcic_io_dummy; -static inline void delay(void) -{ - ctrl_inw(0xa0000000); -} - /* MS7750 requires special versions of in*, out* routines, since PC-like io ports are located at upper half byte of 16-bit word which can be accessed only with 16-bit wide. */ @@ -72,7 +67,7 @@ unsigned char se_inb_p(unsigned long port) v = (*port2adr(port) >> 8); else v = (*port2adr(port))&0xff; - delay(); + ctrl_delay(); return v; } @@ -110,7 +105,7 @@ void se_outb_p(unsigned char value, unsigned long port) *(port2adr(port)) = value << 8; else *(port2adr(port)) = value; - delay(); + ctrl_delay(); } void se_outw(unsigned short value, unsigned long port) diff --git a/arch/sh/boards/se/7751/io.c b/arch/sh/boards/se/7751/io.c index 0e8a3ba48316..e8d846cec89d 100644 --- a/arch/sh/boards/se/7751/io.c +++ b/arch/sh/boards/se/7751/io.c @@ -1,6 +1,4 @@ /* - * linux/arch/sh/kernel/io_7751se.c - * * Copyright (C) 2001 Ian da Silva, Jeremy Siegel * Based largely on io_se.c. * @@ -10,55 +8,14 @@ * placeholder code from io_se.c left in with the * expectation of later SuperIO and PCMCIA access. */ - #include #include +#include #include #include #include -#include -#include "../../../drivers/pci/pci-sh7751.h" - -#if 0 -/****************************************************************** - * Variables from io_se.c, related to PCMCIA (not PCI); we're not - * compiling them in, and have removed references from functions - * which follow. [Many checked for IO ports in the range bounded - * by sh_pcic_io_start/stop, and used sh_pcic_io_wbase as offset. - * As start/stop are uninitialized, only port 0x0 would match?] - * When used, remember to adjust names to avoid clash with io_se? - *****************************************************************/ -/* SH pcmcia io window base, start and end. */ -int sh_pcic_io_wbase = 0xb8400000; -int sh_pcic_io_start; -int sh_pcic_io_stop; -int sh_pcic_io_type; -int sh_pcic_io_dummy; -/*************************************************************/ -#endif - -/* - * The 7751 Solution Engine uses the built-in PCI controller (PCIC) - * of the 7751 processor, and has a SuperIO accessible via the PCI. - * The board also includes a PCMCIA controller on its memory bus, - * like the other Solution Engine boards. - */ - -#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR) -#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) -#define PCI_IO_AREA SH7751_PCI_IO_BASE -#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE - -#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) - -static inline void delay(void) -{ - ctrl_inw(0xa0000000); -} - -static inline volatile __u16 * -port2adr(unsigned int port) +static inline volatile u16 *port2adr(unsigned int port) { if (port >= 0x2000) return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); @@ -66,32 +23,6 @@ port2adr(unsigned int port) return (volatile __u16*)port; } -#if 0 -/* The 7751 Solution Engine seems to have everything hooked */ -/* up pretty normally (nothing on high-bytes only...) so this */ -/* shouldn't be needed */ -static inline int -shifted_port(unsigned long port) -{ - /* For IDE registers, value is not shifted */ - if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) - return 0; - else - return 1; -} -#endif - -/* In case someone configures the kernel w/o PCI support: in that */ -/* scenario, don't ever bother to check for PCI-window addresses */ - -/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */ -#if defined(CONFIG_PCI) -#define CHECK_SH7751_PCIIO(port) \ - ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE))) -#else -#define CHECK_SH7751_PCIIO(port) (0) -#endif - /* * General outline: remap really low stuff [eventually] to SuperIO, * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) @@ -103,10 +34,10 @@ unsigned char sh7751se_inb(unsigned long port) { if (PXSEG(port)) return *(volatile unsigned char *)port; - else if (CHECK_SH7751_PCIIO(port)) - return *(volatile unsigned char *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + return *(volatile unsigned char *)pci_ioaddr(port); else - return (*port2adr(port))&0xff; + return (*port2adr(port)) & 0xff; } unsigned char sh7751se_inb_p(unsigned long port) @@ -115,11 +46,11 @@ unsigned char sh7751se_inb_p(unsigned long port) if (PXSEG(port)) v = *(volatile unsigned char *)port; - else if (CHECK_SH7751_PCIIO(port)) - v = *(volatile unsigned char *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + v = *(volatile unsigned char *)pci_ioaddr(port); else - v = (*port2adr(port))&0xff; - delay(); + v = (*port2adr(port)) & 0xff; + ctrl_delay(); return v; } @@ -127,8 +58,8 @@ unsigned short sh7751se_inw(unsigned long port) { if (PXSEG(port)) return *(volatile unsigned short *)port; - else if (CHECK_SH7751_PCIIO(port)) - return *(volatile unsigned short *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + return *(volatile unsigned short *)pci_ioaddr(port); else if (port >= 0x2000) return *port2adr(port); else @@ -140,8 +71,8 @@ unsigned int sh7751se_inl(unsigned long port) { if (PXSEG(port)) return *(volatile unsigned long *)port; - else if (CHECK_SH7751_PCIIO(port)) - return *(volatile unsigned int *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + return *(volatile unsigned int *)pci_ioaddr(port); else if (port >= 0x2000) return *port2adr(port); else @@ -154,8 +85,8 @@ void sh7751se_outb(unsigned char value, unsigned long port) if (PXSEG(port)) *(volatile unsigned char *)port = value; - else if (CHECK_SH7751_PCIIO(port)) - *((unsigned char*)PCI_IOMAP(port)) = value; + else if (is_pci_ioaddr(port)) + *((unsigned char*)pci_ioaddr(port)) = value; else *(port2adr(port)) = value; } @@ -164,19 +95,19 @@ void sh7751se_outb_p(unsigned char value, unsigned long port) { if (PXSEG(port)) *(volatile unsigned char *)port = value; - else if (CHECK_SH7751_PCIIO(port)) - *((unsigned char*)PCI_IOMAP(port)) = value; + else if (is_pci_ioaddr(port)) + *((unsigned char*)pci_ioaddr(port)) = value; else *(port2adr(port)) = value; - delay(); + ctrl_delay(); } void sh7751se_outw(unsigned short value, unsigned long port) { if (PXSEG(port)) *(volatile unsigned short *)port = value; - else if (CHECK_SH7751_PCIIO(port)) - *((unsigned short *)PCI_IOMAP(port)) = value; + else if (is_pci_ioaddr(port)) + *((unsigned short *)pci_ioaddr(port)) = value; else if (port >= 0x2000) *port2adr(port) = value; else @@ -187,8 +118,8 @@ void sh7751se_outl(unsigned int value, unsigned long port) { if (PXSEG(port)) *(volatile unsigned long *)port = value; - else if (CHECK_SH7751_PCIIO(port)) - *((unsigned long*)PCI_IOMAP(port)) = value; + else if (is_pci_ioaddr(port)) + *((unsigned long*)pci_ioaddr(port)) = value; else maybebadio(port); } @@ -202,35 +133,3 @@ void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count) { maybebadio(port); } - -/* Map ISA bus address to the real address. Only for PCMCIA. */ - -/* ISA page descriptor. */ -static __u32 sh_isa_memmap[256]; - -#if 0 -static int -sh_isa_mmap(__u32 start, __u32 length, __u32 offset) -{ - int idx; - - if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000)) - return -1; - - idx = start >> 12; - sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff); - printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n", - start, length, offset, idx, sh_isa_memmap[idx]); - return 0; -} -#endif - -unsigned long -sh7751se_isa_port2addr(unsigned long offset) -{ - int idx; - - idx = (offset >> 12) & 0xff; - offset &= 0xfff; - return sh_isa_memmap[idx] + offset; -} diff --git a/arch/sh/boards/sh03/setup.c b/arch/sh/boards/sh03/setup.c index dab742a00c6f..7d31d6aed8a5 100644 --- a/arch/sh/boards/sh03/setup.c +++ b/arch/sh/boards/sh03/setup.c @@ -12,11 +12,10 @@ #include #include #include -#include "../../drivers/pci/pci-sh7751.h" const char *get_system_type(void) { - return "Interface CTP/PCI-SH03)"; + return "Interface (CTP/PCI-SH03)"; } static void init_sh03_IRQ(void) @@ -39,7 +38,7 @@ static void __iomem *sh03_ioport_map(unsigned long port, unsigned int size) if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6)) return (void __iomem *)((unsigned long)cf_io_base + port); - return (void __iomem *)(port + SH7751_PCI_IO_BASE); + return (void __iomem *)(port + PCI_IO_BASE); } struct sh_machine_vector mv_sh03 __initmv = { @@ -51,7 +50,6 @@ struct sh_machine_vector mv_sh03 __initmv = { .mv_heartbeat = heartbeat_sh03, #endif }; - ALIAS_MV(sh03) /* arch/sh/boards/sh03/rtc.c */ diff --git a/arch/sh/boards/snapgear/io.c b/arch/sh/boards/snapgear/io.c index 9f700b8392bb..0f4824264557 100644 --- a/arch/sh/boards/snapgear/io.c +++ b/arch/sh/boards/snapgear/io.c @@ -1,6 +1,4 @@ -/* - * linux/arch/sh/kernel/io_7751se.c - * +/* * Copyright (C) 2002 David McCullough * Copyright (C) 2001 Ian da Silva, Jeremy Siegel * Based largely on io_se.c. @@ -11,54 +9,22 @@ * placeholder code from io_se.c left in with the * expectation of later SuperIO and PCMCIA access. */ - #include #include #include #include #include -#include -#include "../../drivers/pci/pci-sh7751.h" - #ifdef CONFIG_SH_SECUREEDGE5410 unsigned short secureedge5410_ioport; #endif -/* - * The SnapGear uses the built-in PCI controller (PCIC) - * of the 7751 processor - */ - -#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR) -#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) -#define PCI_IO_AREA SH7751_PCI_IO_BASE -#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE - -#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) - -static inline void delay(void) -{ - ctrl_inw(0xa0000000); -} - static inline volatile __u16 *port2adr(unsigned int port) { maybebadio((unsigned long)port); return (volatile __u16*)port; } -/* In case someone configures the kernel w/o PCI support: in that */ -/* scenario, don't ever bother to check for PCI-window addresses */ - -/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */ -#if defined(CONFIG_PCI) -#define CHECK_SH7751_PCIIO(port) \ - ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE))) -#else -#define CHECK_SH7751_PCIIO(port) (0) -#endif - /* * General outline: remap really low stuff [eventually] to SuperIO, * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) @@ -66,39 +32,36 @@ static inline volatile __u16 *port2adr(unsigned int port) * should be way beyond the window, and is used w/o translation for * compatibility. */ - unsigned char snapgear_inb(unsigned long port) { if (PXSEG(port)) return *(volatile unsigned char *)port; - else if (CHECK_SH7751_PCIIO(port)) - return *(volatile unsigned char *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + return *(volatile unsigned char *)pci_ioaddr(port); else - return (*port2adr(port))&0xff; + return (*port2adr(port)) & 0xff; } - unsigned char snapgear_inb_p(unsigned long port) { unsigned char v; if (PXSEG(port)) v = *(volatile unsigned char *)port; - else if (CHECK_SH7751_PCIIO(port)) - v = *(volatile unsigned char *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + v = *(volatile unsigned char *)pci_ioaddr(port); else - v = (*port2adr(port))&0xff; - delay(); + v = (*port2adr(port))&0xff; + ctrl_delay(); return v; } - unsigned short snapgear_inw(unsigned long port) { if (PXSEG(port)) return *(volatile unsigned short *)port; - else if (CHECK_SH7751_PCIIO(port)) - return *(volatile unsigned short *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + return *(volatile unsigned short *)pci_ioaddr(port); else if (port >= 0x2000) return *port2adr(port); else @@ -106,13 +69,12 @@ unsigned short snapgear_inw(unsigned long port) return 0; } - unsigned int snapgear_inl(unsigned long port) { if (PXSEG(port)) return *(volatile unsigned long *)port; - else if (CHECK_SH7751_PCIIO(port)) - return *(volatile unsigned int *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + return *(volatile unsigned int *)pci_ioaddr(port); else if (port >= 0x2000) return *port2adr(port); else @@ -120,50 +82,46 @@ unsigned int snapgear_inl(unsigned long port) return 0; } - void snapgear_outb(unsigned char value, unsigned long port) { if (PXSEG(port)) *(volatile unsigned char *)port = value; - else if (CHECK_SH7751_PCIIO(port)) - *((unsigned char*)PCI_IOMAP(port)) = value; + else if (is_pci_ioaddr(port)) + *((unsigned char*)pci_ioaddr(port)) = value; else *(port2adr(port)) = value; } - void snapgear_outb_p(unsigned char value, unsigned long port) { if (PXSEG(port)) *(volatile unsigned char *)port = value; - else if (CHECK_SH7751_PCIIO(port)) - *((unsigned char*)PCI_IOMAP(port)) = value; + else if (is_pci_ioaddr(port)) + *((unsigned char*)pci_ioaddr(port)) = value; else *(port2adr(port)) = value; - delay(); + ctrl_delay(); } - void snapgear_outw(unsigned short value, unsigned long port) { if (PXSEG(port)) *(volatile unsigned short *)port = value; - else if (CHECK_SH7751_PCIIO(port)) - *((unsigned short *)PCI_IOMAP(port)) = value; + else if (is_pci_ioaddr(port)) + *((unsigned short *)pci_ioaddr(port)) = value; else if (port >= 0x2000) *port2adr(port) = value; else maybebadio(port); } - void snapgear_outl(unsigned int value, unsigned long port) { if (PXSEG(port)) *(volatile unsigned long *)port = value; - else if (CHECK_SH7751_PCIIO(port)) - *((unsigned long*)PCI_IOMAP(port)) = value; + else if (is_pci_ioaddr(port)) + *((unsigned long*)pci_ioaddr(port)) = value; else maybebadio(port); } diff --git a/arch/sh/boards/titan/io.c b/arch/sh/boards/titan/io.c index 48f3494f55b1..4730c1dd697d 100644 --- a/arch/sh/boards/titan/io.c +++ b/arch/sh/boards/titan/io.c @@ -1,34 +1,11 @@ /* * I/O routines for Titan */ - #include #include #include #include #include -#include "../../drivers/pci/pci-sh7751.h" - -#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR) -#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) -#define PCI_IO_AREA SH7751_PCI_IO_BASE -#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE - -#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) - -#if defined(CONFIG_PCI) -#define CHECK_SH7751_PCIIO(port) \ - ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE))) -#define CHECK_SH7751_PCIMEMIO(port) \ - ((port >= PCIBIOS_MIN_MEM) && (port < (PCIBIOS_MIN_MEM + SH7751_PCI_MEM_SIZE))) -#else -#define CHECK_SH7751_PCIIO(port) (0) -#endif - -static inline void delay(void) -{ - ctrl_inw(0xa0000000); -} static inline unsigned int port2adr(unsigned int port) { @@ -40,8 +17,8 @@ u8 titan_inb(unsigned long port) { if (PXSEG(port)) return ctrl_inb(port); - else if (CHECK_SH7751_PCIIO(port)) - return ctrl_inb(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + return ctrl_inb(pci_ioaddr(port)); return ctrl_inw(port2adr(port)) & 0xff; } @@ -51,11 +28,11 @@ u8 titan_inb_p(unsigned long port) if (PXSEG(port)) v = ctrl_inb(port); - else if (CHECK_SH7751_PCIIO(port)) - v = ctrl_inb(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + v = ctrl_inb(pci_ioaddr(port)); else v = ctrl_inw(port2adr(port)) & 0xff; - delay(); + ctrl_delay(); return v; } @@ -63,8 +40,8 @@ u16 titan_inw(unsigned long port) { if (PXSEG(port)) return ctrl_inw(port); - else if (CHECK_SH7751_PCIIO(port)) - return ctrl_inw(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + return ctrl_inw(pci_ioaddr(port)); else if (port >= 0x2000) return ctrl_inw(port2adr(port)); else @@ -76,8 +53,8 @@ u32 titan_inl(unsigned long port) { if (PXSEG(port)) return ctrl_inl(port); - else if (CHECK_SH7751_PCIIO(port)) - return ctrl_inl(PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + return ctrl_inl(pci_ioaddr(port)); else if (port >= 0x2000) return ctrl_inw(port2adr(port)); else @@ -89,8 +66,8 @@ void titan_outb(u8 value, unsigned long port) { if (PXSEG(port)) ctrl_outb(value, port); - else if (CHECK_SH7751_PCIIO(port)) - ctrl_outb(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + ctrl_outb(value, pci_ioaddr(port)); else ctrl_outw(value, port2adr(port)); } @@ -99,19 +76,19 @@ void titan_outb_p(u8 value, unsigned long port) { if (PXSEG(port)) ctrl_outb(value, port); - else if (CHECK_SH7751_PCIIO(port)) - ctrl_outb(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + ctrl_outb(value, pci_ioaddr(port)); else ctrl_outw(value, port2adr(port)); - delay(); + ctrl_delay(); } void titan_outw(u16 value, unsigned long port) { if (PXSEG(port)) ctrl_outw(value, port); - else if (CHECK_SH7751_PCIIO(port)) - ctrl_outw(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + ctrl_outw(value, pci_ioaddr(port)); else if (port >= 0x2000) ctrl_outw(value, port2adr(port)); else @@ -122,8 +99,8 @@ void titan_outl(u32 value, unsigned long port) { if (PXSEG(port)) ctrl_outl(value, port); - else if (CHECK_SH7751_PCIIO(port)) - ctrl_outl(value, PCI_IOMAP(port)); + else if (is_pci_ioaddr(port)) + ctrl_outl(value, pci_ioaddr(port)); else maybebadio(port); } @@ -140,10 +117,10 @@ void titan_outsl(unsigned long port, const void *src, unsigned long count) void __iomem *titan_ioport_map(unsigned long port, unsigned int size) { - if (PXSEG(port) || CHECK_SH7751_PCIMEMIO(port)) + if (PXSEG(port) || is_pci_memaddr(port)) return (void __iomem *)port; - else if (CHECK_SH7751_PCIIO(port)) - return (void __iomem *)PCI_IOMAP(port); + else if (is_pci_ioaddr(port)) + return (void __iomem *)pci_ioaddr(port); return (void __iomem *)port2adr(port); } diff --git a/arch/sh/cchips/hd6446x/hd64461/io.c b/arch/sh/cchips/hd6446x/hd64461/io.c index f77f18f2ba7f..7909a1b7b512 100644 --- a/arch/sh/cchips/hd6446x/hd64461/io.c +++ b/arch/sh/cchips/hd6446x/hd64461/io.c @@ -53,11 +53,6 @@ static __inline__ unsigned long PORT2ADDR(unsigned long port) return 0xa0000000 + (port & 0x1fffffff); } -static inline void delay(void) -{ - ctrl_inw(0xa0000000); -} - unsigned char hd64461_inb(unsigned long port) { return *(volatile unsigned char*)PORT2ADDR(port); @@ -66,7 +61,7 @@ unsigned char hd64461_inb(unsigned long port) unsigned char hd64461_inb_p(unsigned long port) { unsigned long v = *(volatile unsigned char*)PORT2ADDR(port); - delay(); + ctrl_delay(); return v; } @@ -88,7 +83,7 @@ void hd64461_outb(unsigned char b, unsigned long port) void hd64461_outb_p(unsigned char b, unsigned long port) { *(volatile unsigned char*)PORT2ADDR(port) = b; - delay(); + ctrl_delay(); } void hd64461_outw(unsigned short b, unsigned long port) diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile index 3d8078f1c05f..9e00cb8a39e9 100644 --- a/arch/sh/drivers/pci/Makefile +++ b/arch/sh/drivers/pci/Makefile @@ -6,8 +6,8 @@ obj-y += pci.o obj-$(CONFIG_PCI_AUTO) += pci-auto.o obj-$(CONFIG_CPU_SUBTYPE_ST40STB1) += pci-st40.o -obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o -obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o +obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o +obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ dma-dreamcast.o @@ -17,3 +17,4 @@ obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o obj-$(CONFIG_SH_R7780RP) += ops-r7780rp.o fixups-r7780rp.o obj-$(CONFIG_SH_TITAN) += ops-titan.o +obj-$(CONFIG_SH_LANDISK) += ops-landisk.o diff --git a/arch/sh/drivers/pci/fixups-dreamcast.c b/arch/sh/drivers/pci/fixups-dreamcast.c index 63b1c6f4b8d2..c0af5f7ef414 100644 --- a/arch/sh/drivers/pci/fixups-dreamcast.c +++ b/arch/sh/drivers/pci/fixups-dreamcast.c @@ -4,7 +4,7 @@ * PCI fixups for the Sega Dreamcast * * Copyright (C) 2001, 2002 M. R. Brown - * Copyright (C) 2002, 2003 Paul Mundt + * Copyright (C) 2002, 2003, 2006 Paul Mundt * * This file originally bore the message (with enclosed-$): * Id: pci.c,v 1.3 2003/05/04 19:29:46 lethal Exp @@ -45,36 +45,16 @@ static void __init gapspci_fixup_resources(struct pci_dev *dev) printk("PCI: Failed resource fixup\n"); } } - DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, gapspci_fixup_resources); -void __init pcibios_fixup_bus(struct pci_bus *bus) +int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin) { - /* - * We don't have any sub bus to fix up, and this is a rather - * stupid place to put general device fixups. Don't do it. - * Use the pcibios_fixups table or suffer the consequences. + /* + * The interrupt routing semantics here are quite trivial. + * + * We basically only support one interrupt, so we only bother + * updating a device's interrupt line with this single shared + * interrupt. Keeps routing quite simple, doesn't it? */ + return GAPSPCI_IRQ; } - -void __init pcibios_fixup_irqs(void) -{ - struct pci_dev *dev = 0; - - for_each_pci_dev(dev) { - /* - * The interrupt routing semantics here are quite trivial. - * - * We basically only support one interrupt, so we only bother - * updating a device's interrupt line with this single shared - * interrupt. Keeps routing quite simple, doesn't it? - */ - printk(KERN_NOTICE "PCI: Fixing up IRQ routing for device %s\n", - pci_name(dev)); - - dev->irq = GAPSPCI_IRQ; - - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); - } -} - diff --git a/arch/sh/drivers/pci/fixups-r7780rp.c b/arch/sh/drivers/pci/fixups-r7780rp.c index b656b562ec99..3e321df65d22 100644 --- a/arch/sh/drivers/pci/fixups-r7780rp.c +++ b/arch/sh/drivers/pci/fixups-r7780rp.c @@ -4,36 +4,42 @@ * Highlander R7780RP-1 PCI fixups * * Copyright (C) 2003 Lineo uSolutions, Inc. - * Copyright (C) 2004 Paul Mundt + * Copyright (C) 2004 - 2006 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ -#include "pci-sh7780.h" +#include +#include "pci-sh4.h" #include int pci_fixup_pcic(void) { - outl(0x000043ff, PCI_REG(SH7780_PCIIMR)); - outl(0x0000380f, PCI_REG(SH7780_PCIAINTM)); + pci_write_reg(0x000043ff, SH4_PCIINTM); + pci_write_reg(0x0000380f, SH4_PCIAINTM); - outl(0xfbb00047, PCI_REG(SH7780_PCICMD)); - outl(0x00000000, PCI_REG(SH7780_PCIIBAR)); + pci_write_reg(0xfbb00047, SH7780_PCICMD); + pci_write_reg(0x00000000, SH7780_PCIIBAR); - outl(0x00011912, PCI_REG(SH7780_PCISVID)); - outl(0x08000000, PCI_REG(SH7780_PCICSCR0)); - outl(0x0000001b, PCI_REG(SH7780_PCICSAR0)); - outl(0xfd000000, PCI_REG(SH7780_PCICSCR1)); - outl(0x0000000f, PCI_REG(SH7780_PCICSAR1)); + pci_write_reg(0x00011912, SH7780_PCISVID); + pci_write_reg(0x08000000, SH7780_PCICSCR0); + pci_write_reg(0x0000001b, SH7780_PCICSAR0); + pci_write_reg(0xfd000000, SH7780_PCICSCR1); + pci_write_reg(0x0000000f, SH7780_PCICSAR1); - outl(0xfd000000, PCI_REG(SH7780_PCIMBR0)); - outl(0x00fc0000, PCI_REG(SH7780_PCIMBMR0)); + pci_write_reg(0xfd000000, SH7780_PCIMBR0); + pci_write_reg(0x00fc0000, SH7780_PCIMBMR0); + +#ifdef CONFIG_32BIT + pci_write_reg(0xc0000000, SH7780_PCIMBR2); + pci_write_reg(0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2); +#endif /* Set IOBR for windows containing area specified in pci.h */ - outl((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE-1)), PCI_REG(SH7780_PCIIOBR)); - outl(((SH7780_PCI_IO_SIZE-1) & (7<<18)), PCI_REG(SH7780_PCIIOBMR)); + pci_write_reg((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)), + SH7780_PCIIOBR); + pci_write_reg(((SH7780_PCI_IO_SIZE-1) & (7<<18)), SH7780_PCIIOBMR); return 0; } - diff --git a/arch/sh/drivers/pci/fixups-rts7751r2d.c b/arch/sh/drivers/pci/fixups-rts7751r2d.c index 0c590fc7a081..e72ceb560d5b 100644 --- a/arch/sh/drivers/pci/fixups-rts7751r2d.c +++ b/arch/sh/drivers/pci/fixups-rts7751r2d.c @@ -10,8 +10,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. */ -#include "pci-sh7751.h" -#include +#include "pci-sh4.h" #define PCIMCR_MRSET_OFF 0xBFFFFFFF #define PCIMCR_RFSH_OFF 0xFFFFFFFB @@ -22,22 +21,23 @@ int pci_fixup_pcic(void) bcr1 = inl(SH7751_BCR1); bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ - outl(bcr1, PCI_REG(SH7751_PCIBCR1)); + pci_write_reg(bcr1, SH4_PCIBCR1); /* Enable all interrupts, so we known what to fix */ - outl(0x0000c3ff, PCI_REG(SH7751_PCIINTM)); - outl(0x0000380f, PCI_REG(SH7751_PCIAINTM)); + pci_write_reg(0x0000c3ff, SH4_PCIINTM); + pci_write_reg(0x0000380f, SH4_PCIAINTM); - outl(0xfb900047, PCI_REG(SH7751_PCICONF1)); - outl(0xab000001, PCI_REG(SH7751_PCICONF4)); + pci_write_reg(0xfb900047, SH7751_PCICONF1); + pci_write_reg(0xab000001, SH7751_PCICONF4); mcr = inl(SH7751_MCR); mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF; - outl(mcr, PCI_REG(SH7751_PCIMCR)); + pci_write_reg(mcr, SH4_PCIMCR); + + pci_write_reg(0x0c000000, SH7751_PCICONF5); + pci_write_reg(0xd0000000, SH7751_PCICONF6); + pci_write_reg(0x0c000000, SH4_PCILAR0); + pci_write_reg(0x00000000, SH4_PCILAR1); - outl(0x0c000000, PCI_REG(SH7751_PCICONF5)); - outl(0xd0000000, PCI_REG(SH7751_PCICONF6)); - outl(0x0c000000, PCI_REG(SH7751_PCILAR0)); - outl(0x00000000, PCI_REG(SH7751_PCILAR1)); return 0; } diff --git a/arch/sh/drivers/pci/fixups-sh03.c b/arch/sh/drivers/pci/fixups-sh03.c index 57ac26c2171f..2e8a18b7ee53 100644 --- a/arch/sh/drivers/pci/fixups-sh03.c +++ b/arch/sh/drivers/pci/fixups-sh03.c @@ -3,11 +3,7 @@ #include #include -/* - * IRQ functions - */ - -int __init pcibios_map_platform_irq(u8 slot, u8 pin, struct pci_dev *dev) +int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin) { int irq; @@ -17,8 +13,9 @@ int __init pcibios_map_platform_irq(u8 slot, u8 pin, struct pci_dev *dev) case 8: return 5; /* eth1 */ case 6: return 2; /* PCI bridge */ default: - printk("PCI: Bad IRQ mapping request for slot %d\n", slot); - return 2; + printk(KERN_ERR "PCI: Bad IRQ mapping request " + "for slot %d\n", slot); + return 2; } } else { switch (pin) { @@ -32,30 +29,3 @@ int __init pcibios_map_platform_irq(u8 slot, u8 pin, struct pci_dev *dev) } return irq; } - -static u8 __init sh03_no_swizzle(struct pci_dev *dev, u8 *pin) -{ - /* no swizzling */ - return PCI_SLOT(dev->devfn); -} - -static int sh03_pci_lookup_irq(struct pci_dev *dev, u8 slot, u8 pin) -{ - int irq = -1; - - /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */ - irq = pcibios_map_platform_irq(slot, pin, dev); - if( irq < 0 ) { - pr_debug("PCI: Error mapping IRQ on device %s\n", pci_name(dev)); - return irq; - } - - pr_debug("Setting IRQ for slot %s to %d\n", pci_name(dev), irq); - - return irq; -} - -void __init pcibios_fixup_irqs(void) -{ - pci_fixup_irqs(sh03_no_swizzle, sh03_pci_lookup_irq); -} diff --git a/arch/sh/drivers/pci/ops-bigsur.c b/arch/sh/drivers/pci/ops-bigsur.c index ae82c6ca05e5..5da501bd77b5 100644 --- a/arch/sh/drivers/pci/ops-bigsur.c +++ b/arch/sh/drivers/pci/ops-bigsur.c @@ -10,15 +10,12 @@ * * PCI initialization for the Hitachi Big Sur Evaluation Board */ - #include #include #include -#include #include - #include -#include "pci-sh7751.h" +#include "pci-sh4.h" #include #define BIGSUR_PCI_IO 0x4000 @@ -41,11 +38,11 @@ static struct resource sh7751_mem_resource = { extern struct pci_ops sh7751_pci_ops; struct pci_channel board_pci_channels[] = { - { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, + { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, { 0, } }; -static struct sh7751_pci_address_map sh7751_pci_map = { +static struct sh4_pci_address_map sh7751_pci_map = { .window0 = { .base = SH7751_CS3_BASE_ADDR, .size = BIGSUR_LSR0_SIZE, @@ -58,7 +55,7 @@ static struct sh7751_pci_address_map sh7751_pci_map = { }; /* - * Initialize the Big Sur PCI interface + * Initialize the Big Sur PCI interface * Setup hardware to be Central Funtion * Copy the BSR regs to the PCI interface * Setup PCI windows into local RAM @@ -68,15 +65,15 @@ int __init pcibios_init_platform(void) return sh7751_pcic_init(&sh7751_pci_map); } -int pcibios_map_platform_irq(u8 slot, u8 pin) +int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) { - /* + /* * The Big Sur can be used in a CPCI chassis, but the SH7751 PCI * interface is on the wrong end of the board so that it can also * support a V320 CPI interface chip... Therefor the IRQ mapping is * somewhat use dependent... I'l assume a linear map for now, i.e. * INTA=slot0,pin0... INTD=slot3,pin0... - */ + */ int irq = (slot + pin-1) % 4 + BIGSUR_SH7751_PCI_IRQ_BASE; PCIDBG(2, "PCI: Mapping Big Sur IRQ for slot %d, pin %c to irq %d\n", @@ -84,4 +81,3 @@ int pcibios_map_platform_irq(u8 slot, u8 pin) return irq; } - diff --git a/arch/sh/drivers/pci/ops-landisk.c b/arch/sh/drivers/pci/ops-landisk.c new file mode 100644 index 000000000000..ada301c21fe7 --- /dev/null +++ b/arch/sh/drivers/pci/ops-landisk.c @@ -0,0 +1,68 @@ +/* + * arch/sh/drivers/pci/ops-landisk.c + * + * PCI initialization for the I-O DATA Device, Inc. LANDISK board + * + * Copyright (C) 2006 kogiidena + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + */ +#include +#include +#include +#include +#include +#include +#include "pci-sh4.h" + +static struct resource sh7751_io_resource = { + .name = "SH7751 IO", + .start = 0x4000, + .end = 0x4000 + SH7751_PCI_IO_SIZE - 1, + .flags = IORESOURCE_IO +}; + +static struct resource sh7751_mem_resource = { + .name = "SH7751 mem", + .start = SH7751_PCI_MEMORY_BASE, + .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1, + .flags = IORESOURCE_MEM +}; + +struct pci_channel board_pci_channels[] = { + {&sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0x3ff}, + {NULL, NULL, NULL, 0, 0}, +}; + +static struct sh4_pci_address_map sh7751_pci_map = { + .window0 = { + .base = SH7751_CS3_BASE_ADDR, + .size = (64 << 20), /* 64MB */ + }, + + .flags = SH4_PCIC_NO_RESET, +}; + +int __init pcibios_init_platform(void) +{ + return sh7751_pcic_init(&sh7751_pci_map); +} + +int pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) +{ + /* + * slot0: pin1-4 = irq5,6,7,8 + * slot1: pin1-4 = irq6,7,8,5 + * slot2: pin1-4 = irq7,8,5,6 + * slot3: pin1-4 = irq8,5,6,7 + */ + int irq = ((slot + pin - 1) & 0x3) + 5; + + if ((slot | (pin - 1)) > 0x3) { + printk("PCI: Bad IRQ mapping request for slot %d pin %c\n", + slot, pin - 1 + 'A'); + return -1; + } + return irq; +} diff --git a/arch/sh/drivers/pci/ops-r7780rp.c b/arch/sh/drivers/pci/ops-r7780rp.c index 3254c4e917a9..554d5ed2c586 100644 --- a/arch/sh/drivers/pci/ops-r7780rp.c +++ b/arch/sh/drivers/pci/ops-r7780rp.c @@ -15,13 +15,11 @@ #include #include #include -#include - -#include -#include "pci-sh7780.h" #include +#include +#include "pci-sh4.h" -int __init pcibios_map_platform_irq(u8 slot, u8 pin) +int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) { switch (slot) { case 0: return IRQ_PCISLOT1; /* PCI Interrupt #1 */ @@ -29,7 +27,8 @@ int __init pcibios_map_platform_irq(u8 slot, u8 pin) case 2: return IRQ_PCISLOT3; /* PCI Interrupt #3 */ case 3: return IRQ_PCISLOT4; /* PCI Interrupt E4 */ default: - printk("PCI: Bad IRQ mapping request for slot %d, func %d\n", slot, pin-1); + printk(KERN_ERR "PCI: Bad IRQ mapping " + "request for slot %d, func %d\n", slot, pin-1); return -1; } } @@ -51,12 +50,12 @@ static struct resource sh7780_mem_resource = { extern struct pci_ops sh7780_pci_ops; struct pci_channel board_pci_channels[] = { - { &sh7780_pci_ops, &sh7780_io_resource, &sh7780_mem_resource, 0, 0xff }, + { &sh4_pci_ops, &sh7780_io_resource, &sh7780_mem_resource, 0, 0xff }, { NULL, NULL, NULL, 0, 0 }, }; EXPORT_SYMBOL(board_pci_channels); -static struct sh7780_pci_address_map sh7780_pci_map = { +static struct sh4_pci_address_map sh7780_pci_map = { .window0 = { .base = SH7780_CS2_BASE_ADDR, .size = 0x04000000, @@ -67,11 +66,10 @@ static struct sh7780_pci_address_map sh7780_pci_map = { .size = 0x04000000, }, - .flags = SH7780_PCIC_NO_RESET, + .flags = SH4_PCIC_NO_RESET, }; int __init pcibios_init_platform(void) { return sh7780_pcic_init(&sh7780_pci_map); } - diff --git a/arch/sh/drivers/pci/ops-rts7751r2d.c b/arch/sh/drivers/pci/ops-rts7751r2d.c index 83171d10141a..88f44e245424 100644 --- a/arch/sh/drivers/pci/ops-rts7751r2d.c +++ b/arch/sh/drivers/pci/ops-rts7751r2d.c @@ -17,12 +17,11 @@ #include #include #include - -#include -#include "pci-sh7751.h" #include +#include +#include "pci-sh4.h" -int __init pcibios_map_platform_irq(u8 slot, u8 pin) +int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) { switch (slot) { case 0: return IRQ_PCISLOT1; /* PCI Extend slot #1 */ @@ -52,12 +51,12 @@ static struct resource sh7751_mem_resource = { extern struct pci_ops sh7751_pci_ops; struct pci_channel board_pci_channels[] = { - { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, + { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, { NULL, NULL, NULL, 0, 0 }, }; EXPORT_SYMBOL(board_pci_channels); -static struct sh7751_pci_address_map sh7751_pci_map = { +static struct sh4_pci_address_map sh7751_pci_map = { .window0 = { .base = SH7751_CS3_BASE_ADDR, .size = 0x04000000, @@ -68,7 +67,7 @@ static struct sh7751_pci_address_map sh7751_pci_map = { .size = 0x00000000, /* Unused */ }, - .flags = SH7751_PCIC_NO_RESET, + .flags = SH4_PCIC_NO_RESET, }; int __init pcibios_init_platform(void) diff --git a/arch/sh/drivers/pci/ops-sh4.c b/arch/sh/drivers/pci/ops-sh4.c new file mode 100644 index 000000000000..2d4371009a5e --- /dev/null +++ b/arch/sh/drivers/pci/ops-sh4.c @@ -0,0 +1,164 @@ +/* + * Generic SH-4 / SH-4A PCIC operations (SH7751, SH7780). + * + * Copyright (C) 2002 - 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License v2. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include "pci-sh4.h" + +/* + * Direct access to PCI hardware... + */ +#define CONFIG_CMD(bus, devfn, where) \ + P1SEGADDR((bus->number << 16) | (devfn << 8) | (where & ~3)) + +static DEFINE_SPINLOCK(sh4_pci_lock); + +/* + * Functions for accessing PCI configuration space with type 1 accesses + */ +static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 *val) +{ + unsigned long flags; + u32 data; + + /* + * PCIPDR may only be accessed as 32 bit words, + * so we must do byte alignment by hand + */ + spin_lock_irqsave(&sh4_pci_lock, flags); + pci_write_reg(CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); + data = pci_read_reg(SH4_PCIPDR); + spin_unlock_irqrestore(&sh4_pci_lock, flags); + + switch (size) { + case 1: + *val = (data >> ((where & 3) << 3)) & 0xff; + break; + case 2: + *val = (data >> ((where & 2) << 3)) & 0xffff; + break; + case 4: + *val = data; + break; + default: + return PCIBIOS_FUNC_NOT_SUPPORTED; + } + + return PCIBIOS_SUCCESSFUL; +} + +/* + * Since SH4 only does 32bit access we'll have to do a read, + * mask,write operation. + * We'll allow an odd byte offset, though it should be illegal. + */ +static int sh4_pci_write(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 val) +{ + unsigned long flags; + int shift; + u32 data; + + spin_lock_irqsave(&sh4_pci_lock, flags); + pci_write_reg(CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); + data = pci_read_reg(SH4_PCIPDR); + spin_unlock_irqrestore(&sh4_pci_lock, flags); + + switch (size) { + case 1: + shift = (where & 3) << 3; + data &= ~(0xff << shift); + data |= ((val & 0xff) << shift); + break; + case 2: + shift = (where & 2) << 3; + data &= ~(0xffff << shift); + data |= ((val & 0xffff) << shift); + break; + case 4: + data = val; + break; + default: + return PCIBIOS_FUNC_NOT_SUPPORTED; + } + + pci_write_reg(data, SH4_PCIPDR); + + return PCIBIOS_SUCCESSFUL; +} + +struct pci_ops sh4_pci_ops = { + .read = sh4_pci_read, + .write = sh4_pci_write, +}; + +/* + * Not really related to pci_ops, but it's common and not worth shoving + * somewhere else for now.. + */ +static unsigned int pci_probe = PCI_PROBE_CONF1; + +int __init sh4_pci_check_direct(void) +{ + /* + * Check if configuration works. + */ + if (pci_probe & PCI_PROBE_CONF1) { + unsigned int tmp = pci_read_reg(SH4_PCIPAR); + + pci_write_reg(P1SEG, SH4_PCIPAR); + + if (pci_read_reg(SH4_PCIPAR) == P1SEG) { + pci_write_reg(tmp, SH4_PCIPAR); + printk(KERN_INFO "PCI: Using configuration type 1\n"); + request_region(PCI_REG(SH4_PCIPAR), 8, "PCI conf1"); + + return 0; + } + + pci_write_reg(tmp, SH4_PCIPAR); + } + + pr_debug("PCI: pci_check_direct failed\n"); + return -EINVAL; +} + +/* Handle generic fixups */ +static void __init pci_fixup_ide_bases(struct pci_dev *d) +{ + int i; + + /* + * PCI IDE controllers use non-standard I/O port decoding, respect it. + */ + if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) + return; + pr_debug("PCI: IDE base address fixup for %s\n", pci_name(d)); + for(i = 0; i < 4; i++) { + struct resource *r = &d->resource[i]; + + if ((r->start & ~0x80) == 0x374) { + r->start |= 2; + r->end = r->start; + } + } +} +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); + +char * __init pcibios_setup(char *str) +{ + if (!strcmp(str, "off")) { + pci_probe = 0; + return NULL; + } + + return str; +} diff --git a/arch/sh/drivers/pci/ops-snapgear.c b/arch/sh/drivers/pci/ops-snapgear.c index 3cbd14dd28fe..53dd893d4e54 100644 --- a/arch/sh/drivers/pci/ops-snapgear.c +++ b/arch/sh/drivers/pci/ops-snapgear.c @@ -2,7 +2,7 @@ * arch/sh/drivers/pci/ops-snapgear.c * * Author: David McCullough - * + * * Ported to new API by Paul Mundt * * Highly leveraged from pci-bigsur.c, written by Dustin McIntire. @@ -12,15 +12,11 @@ * * PCI initialization for the SnapGear boards */ - #include #include #include -#include #include - -#include -#include "pci-sh7751.h" +#include "pci-sh4.h" #define SNAPGEAR_PCI_IO 0x4000 #define SNAPGEAR_PCI_MEM 0xfd000000 @@ -43,14 +39,12 @@ static struct resource sh7751_mem_resource = { .flags = IORESOURCE_MEM, }; -extern struct pci_ops sh7751_pci_ops; - struct pci_channel board_pci_channels[] = { - { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, + { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, { 0, } }; -static struct sh7751_pci_address_map sh7751_pci_map = { +static struct sh4_pci_address_map sh7751_pci_map = { .window0 = { .base = SH7751_CS2_BASE_ADDR, .size = SNAPGEAR_LSR0_SIZE, @@ -61,11 +55,11 @@ static struct sh7751_pci_address_map sh7751_pci_map = { .size = SNAPGEAR_LSR1_SIZE, }, - .flags = SH7751_PCIC_NO_RESET, + .flags = SH4_PCIC_NO_RESET, }; /* - * Initialize the SnapGear PCI interface + * Initialize the SnapGear PCI interface * Setup hardware to be Central Funtion * Copy the BSR regs to the PCI interface * Setup PCI windows into local RAM @@ -75,7 +69,7 @@ int __init pcibios_init_platform(void) return sh7751_pcic_init(&sh7751_pci_map); } -int __init pcibios_map_platform_irq(u8 slot, u8 pin) +int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) { int irq = -1; @@ -98,4 +92,3 @@ void __init pcibios_fixup(void) { /* Nothing to fixup .. */ } - diff --git a/arch/sh/drivers/pci/ops-titan.c b/arch/sh/drivers/pci/ops-titan.c index f76e4e963ac1..9c8b2027c35d 100644 --- a/arch/sh/drivers/pci/ops-titan.c +++ b/arch/sh/drivers/pci/ops-titan.c @@ -16,12 +16,11 @@ #include #include #include -#include #include #include -#include "pci-sh7751.h" +#include "pci-sh4.h" -int __init pcibios_map_platform_irq(u8 slot, u8 pin) +int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) { int irq = -1; @@ -32,7 +31,8 @@ int __init pcibios_map_platform_irq(u8 slot, u8 pin) case 3: irq = TITAN_IRQ_MPCIB; break; /* mPCI B */ case 4: irq = TITAN_IRQ_USB; break; /* USB */ default: - printk(KERN_INFO "PCI: Bad IRQ mapping request for slot %d\n", slot); + printk(KERN_INFO "PCI: Bad IRQ mapping " + "request for slot %d\n", slot); return -1; } @@ -56,15 +56,13 @@ static struct resource sh7751_mem_resource = { .flags = IORESOURCE_MEM }; -extern struct pci_ops sh7751_pci_ops; - struct pci_channel board_pci_channels[] = { - { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, + { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, { NULL, NULL, NULL, 0, 0 }, }; EXPORT_SYMBOL(board_pci_channels); -static struct sh7751_pci_address_map sh7751_pci_map = { +static struct sh4_pci_address_map sh7751_pci_map = { .window0 = { .base = SH7751_CS2_BASE_ADDR, .size = SH7751_MEM_REGION_SIZE*2, /* cs2 and cs3 */ @@ -75,7 +73,7 @@ static struct sh7751_pci_address_map sh7751_pci_map = { .size = SH7751_MEM_REGION_SIZE*2, }, - .flags = SH7751_PCIC_NO_RESET, + .flags = SH4_PCIC_NO_RESET, }; int __init pcibios_init_platform(void) diff --git a/arch/sh/drivers/pci/pci-auto.c b/arch/sh/drivers/pci/pci-auto.c index d55e46618549..ecf16344f94a 100644 --- a/arch/sh/drivers/pci/pci-auto.c +++ b/arch/sh/drivers/pci/pci-auto.c @@ -358,7 +358,6 @@ pciauto_postscan_setup_cardbus_bridge(struct pci_channel *hose, { u32 temp; -#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D) && !defined(CONFIG_SH_R7780RP) /* * [jsun] we always bump up baselines a little, so that if there * nothing behind P2P bridge, we don't wind up overlapping IO/MEM @@ -366,7 +365,6 @@ pciauto_postscan_setup_cardbus_bridge(struct pci_channel *hose, */ pciauto_lower_memspc += 1; pciauto_lower_iospc += 1; -#endif /* * Configure subordinate bus number. The PCI subsystem @@ -392,11 +390,6 @@ pciauto_postscan_setup_cardbus_bridge(struct pci_channel *hose, * configured by this routine to happily live behind a * P2P bridge in a system. */ -#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D) || defined(CONFIG_SH_R7780RP) - pciauto_lower_memspc += 0x00400000; - pciauto_lower_iospc += 0x00004000; -#endif - /* Align memory and I/O to 4KB and 4 byte boundaries. */ pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1)) & ~(0x1000 - 1); @@ -467,9 +460,6 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus) if ((pci_class >> 16) == PCI_CLASS_BRIDGE_PCI) { DBG(" Bridge: primary=%.2x, secondary=%.2x\n", current_bus, sub_bus + 1); -#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D) || defined(CONFIG_SH_R7780RP) - pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_1); -#endif pciauto_prescan_setup_bridge(hose, top_bus, current_bus, pci_devfn, sub_bus); DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n", diff --git a/arch/sh/drivers/pci/pci-sh4.h b/arch/sh/drivers/pci/pci-sh4.h new file mode 100644 index 000000000000..5a61d6041f2c --- /dev/null +++ b/arch/sh/drivers/pci/pci-sh4.h @@ -0,0 +1,180 @@ +#ifndef __PCI_SH4_H +#define __PCI_SH4_H + +#ifdef CONFIG_CPU_SUBTYPE_SH7780 +#include "pci-sh7780.h" +#else +#include "pci-sh7751.h" +#endif + +#include + +/* startup values */ +#define PCI_PROBE_BIOS 1 +#define PCI_PROBE_CONF1 2 +#define PCI_PROBE_CONF2 4 +#define PCI_NO_SORT 0x100 +#define PCI_BIOS_SORT 0x200 +#define PCI_NO_CHECKS 0x400 +#define PCI_ASSIGN_ROMS 0x1000 +#define PCI_BIOS_IRQ_SCAN 0x2000 + +#define SH4_PCICR 0x100 /* PCI Control Register */ + #define SH4_PCICR_PREFIX 0xA5000000 /* CR prefix for write */ + #define SH4_PCICR_FTO 0x00000400 /* TRDY/IRDY Enable */ + #define SH4_PCICR_TRSB 0x00000200 /* Target Read Single */ + #define SH4_PCICR_BSWP 0x00000100 /* Target Byte Swap */ + #define SH4_PCICR_PLUP 0x00000080 /* Enable PCI Pullup */ + #define SH4_PCICR_ARBM 0x00000040 /* PCI Arbitration Mode */ + #define SH4_PCICR_MD 0x00000030 /* MD9 and MD10 status */ + #define SH4_PCICR_SERR 0x00000008 /* SERR output assert */ + #define SH4_PCICR_INTA 0x00000004 /* INTA output assert */ + #define SH4_PCICR_PRST 0x00000002 /* PCI Reset Assert */ + #define SH4_PCICR_CFIN 0x00000001 /* Central Fun. Init Done */ +#define SH4_PCILSR0 0x104 /* PCI Local Space Register0 */ +#define SH4_PCILSR1 0x108 /* PCI Local Space Register1 */ +#define SH4_PCILAR0 0x10C /* PCI Local Addr Register1 */ +#define SH4_PCILAR1 0x110 /* PCI Local Addr Register1 */ +#define SH4_PCIINT 0x114 /* PCI Interrupt Register */ + #define SH4_PCIINT_MLCK 0x00008000 /* Master Lock Error */ + #define SH4_PCIINT_TABT 0x00004000 /* Target Abort Error */ + #define SH4_PCIINT_TRET 0x00000200 /* Target Retry Error */ + #define SH4_PCIINT_MFDE 0x00000100 /* Master Func. Disable Error */ + #define SH4_PCIINT_PRTY 0x00000080 /* Address Parity Error */ + #define SH4_PCIINT_SERR 0x00000040 /* SERR Detection Error */ + #define SH4_PCIINT_TWDP 0x00000020 /* Tgt. Write Parity Error */ + #define SH4_PCIINT_TRDP 0x00000010 /* Tgt. Read Parity Err Det. */ + #define SH4_PCIINT_MTABT 0x00000008 /* Master-Tgt. Abort Error */ + #define SH4_PCIINT_MMABT 0x00000004 /* Master-Master Abort Error */ + #define SH4_PCIINT_MWPD 0x00000002 /* Master Write PERR Detect */ + #define SH4_PCIINT_MRPD 0x00000001 /* Master Read PERR Detect */ +#define SH4_PCIINTM 0x118 /* PCI Interrupt Mask */ +#define SH4_PCIALR 0x11C /* Error Address Register */ +#define SH4_PCICLR 0x120 /* Error Command/Data */ + #define SH4_PCICLR_MPIO 0x80000000 + #define SH4_PCICLR_MDMA0 0x40000000 /* DMA0 Transfer Error */ + #define SH4_PCICLR_MDMA1 0x20000000 /* DMA1 Transfer Error */ + #define SH4_PCICLR_MDMA2 0x10000000 /* DMA2 Transfer Error */ + #define SH4_PCICLR_MDMA3 0x08000000 /* DMA3 Transfer Error */ + #define SH4_PCICLR_TGT 0x04000000 /* Target Transfer Error */ + #define SH4_PCICLR_CMDL 0x0000000F /* PCI Command at Error */ +#define SH4_PCIAINT 0x130 /* Arbiter Interrupt Register */ + #define SH4_PCIAINT_MBKN 0x00002000 /* Master Broken Interrupt */ + #define SH4_PCIAINT_TBTO 0x00001000 /* Target Bus Time Out */ + #define SH4_PCIAINT_MBTO 0x00001000 /* Master Bus Time Out */ + #define SH4_PCIAINT_TABT 0x00000008 /* Target Abort */ + #define SH4_PCIAINT_MABT 0x00000004 /* Master Abort */ + #define SH4_PCIAINT_RDPE 0x00000002 /* Read Data Parity Error */ + #define SH4_PCIAINT_WDPE 0x00000001 /* Write Data Parity Error */ +#define SH4_PCIAINTM 0x134 /* Arbiter Int. Mask Register */ +#define SH4_PCIBMLR 0x138 /* Error Bus Master Register */ + #define SH4_PCIBMLR_REQ4 0x00000010 /* REQ4 bus master at error */ + #define SH4_PCIBMLR_REQ3 0x00000008 /* REQ3 bus master at error */ + #define SH4_PCIBMLR_REQ2 0x00000004 /* REQ2 bus master at error */ + #define SH4_PCIBMLR_REQ1 0x00000002 /* REQ1 bus master at error */ + #define SH4_PCIBMLR_REQ0 0x00000001 /* REQ0 bus master at error */ +#define SH4_PCIDMABT 0x140 /* DMA Transfer Arb. Register */ + #define SH4_PCIDMABT_RRBN 0x00000001 /* DMA Arbitor Round-Robin */ +#define SH4_PCIDPA0 0x180 /* DMA0 Transfer Addr. */ +#define SH4_PCIDLA0 0x184 /* DMA0 Local Addr. */ +#define SH4_PCIDTC0 0x188 /* DMA0 Transfer Cnt. */ +#define SH4_PCIDCR0 0x18C /* DMA0 Control Register */ + #define SH4_PCIDCR_ALGN 0x00000600 /* DMA Alignment Mode */ + #define SH4_PCIDCR_MAST 0x00000100 /* DMA Termination Type */ + #define SH4_PCIDCR_INTM 0x00000080 /* DMA Interrupt Done Mask*/ + #define SH4_PCIDCR_INTS 0x00000040 /* DMA Interrupt Done Status */ + #define SH4_PCIDCR_LHLD 0x00000020 /* Local Address Control */ + #define SH4_PCIDCR_PHLD 0x00000010 /* PCI Address Control*/ + #define SH4_PCIDCR_IOSEL 0x00000008 /* PCI Address Space Type */ + #define SH4_PCIDCR_DIR 0x00000004 /* DMA Transfer Direction */ + #define SH4_PCIDCR_STOP 0x00000002 /* Force DMA Stop */ + #define SH4_PCIDCR_STRT 0x00000001 /* DMA Start */ +#define SH4_PCIDPA1 0x190 /* DMA1 Transfer Addr. */ +#define SH4_PCIDLA1 0x194 /* DMA1 Local Addr. */ +#define SH4_PCIDTC1 0x198 /* DMA1 Transfer Cnt. */ +#define SH4_PCIDCR1 0x19C /* DMA1 Control Register */ +#define SH4_PCIDPA2 0x1A0 /* DMA2 Transfer Addr. */ +#define SH4_PCIDLA2 0x1A4 /* DMA2 Local Addr. */ +#define SH4_PCIDTC2 0x1A8 /* DMA2 Transfer Cnt. */ +#define SH4_PCIDCR2 0x1AC /* DMA2 Control Register */ +#define SH4_PCIDPA3 0x1B0 /* DMA3 Transfer Addr. */ +#define SH4_PCIDLA3 0x1B4 /* DMA3 Local Addr. */ +#define SH4_PCIDTC3 0x1B8 /* DMA3 Transfer Cnt. */ +#define SH4_PCIDCR3 0x1BC /* DMA3 Control Register */ +#define SH4_PCIPAR 0x1C0 /* PIO Address Register */ + #define SH4_PCIPAR_CFGEN 0x80000000 /* Configuration Enable */ + #define SH4_PCIPAR_BUSNO 0x00FF0000 /* Config. Bus Number */ + #define SH4_PCIPAR_DEVNO 0x0000FF00 /* Config. Device Number */ + #define SH4_PCIPAR_REGAD 0x000000FC /* Register Address Number */ +#define SH4_PCIMBR 0x1C4 /* Memory Base Address */ + #define SH4_PCIMBR_MASK 0xFF000000 /* Memory Space Mask */ + #define SH4_PCIMBR_LOCK 0x00000001 /* Lock Memory Space */ +#define SH4_PCIIOBR 0x1C8 /* I/O Base Address Register */ + #define SH4_PCIIOBR_MASK 0xFFFC0000 /* IO Space Mask */ + #define SH4_PCIIOBR_LOCK 0x00000001 /* Lock IO Space */ +#define SH4_PCIPINT 0x1CC /* Power Mgmnt Int. Register */ + #define SH4_PCIPINT_D3 0x00000002 /* D3 Pwr Mgmt. Interrupt */ + #define SH4_PCIPINT_D0 0x00000001 /* D0 Pwr Mgmt. Interrupt */ +#define SH4_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */ +#define SH4_PCICLKR 0x1D4 /* Clock Ctrl. Register */ + #define SH4_PCICLKR_PCSTP 0x00000002 /* PCI Clock Stop */ + #define SH4_PCICLKR_BCSTP 0x00000001 /* BCLK Clock Stop */ +/* For definitions of BCR, MCR see ... */ +#define SH4_PCIBCR1 0x1E0 /* Memory BCR1 Register */ + #define SH4_PCIMBR0 SH4_PCIBCR1 +#define SH4_PCIBCR2 0x1E4 /* Memory BCR2 Register */ + #define SH4_PCIMBMR0 SH4_PCIBCR2 +#define SH4_PCIWCR1 0x1E8 /* Wait Control 1 Register */ +#define SH4_PCIWCR2 0x1EC /* Wait Control 2 Register */ +#define SH4_PCIWCR3 0x1F0 /* Wait Control 3 Register */ + #define SH4_PCIMBR2 SH4_PCIWCR3 +#define SH4_PCIMCR 0x1F4 /* Memory Control Register */ +#define SH4_PCIBCR3 0x1f8 /* Memory BCR3 Register */ +#define SH4_PCIPCTR 0x200 /* Port Control Register */ + #define SH4_PCIPCTR_P2EN 0x000400000 /* Port 2 Enable */ + #define SH4_PCIPCTR_P1EN 0x000200000 /* Port 1 Enable */ + #define SH4_PCIPCTR_P0EN 0x000100000 /* Port 0 Enable */ + #define SH4_PCIPCTR_P2UP 0x000000020 /* Port2 Pull Up Enable */ + #define SH4_PCIPCTR_P2IO 0x000000010 /* Port2 Output Enable */ + #define SH4_PCIPCTR_P1UP 0x000000008 /* Port1 Pull Up Enable */ + #define SH4_PCIPCTR_P1IO 0x000000004 /* Port1 Output Enable */ + #define SH4_PCIPCTR_P0UP 0x000000002 /* Port0 Pull Up Enable */ + #define SH4_PCIPCTR_P0IO 0x000000001 /* Port0 Output Enable */ +#define SH4_PCIPDTR 0x204 /* Port Data Register */ + #define SH4_PCIPDTR_PB5 0x000000020 /* Port 5 Enable */ + #define SH4_PCIPDTR_PB4 0x000000010 /* Port 4 Enable */ + #define SH4_PCIPDTR_PB3 0x000000008 /* Port 3 Enable */ + #define SH4_PCIPDTR_PB2 0x000000004 /* Port 2 Enable */ + #define SH4_PCIPDTR_PB1 0x000000002 /* Port 1 Enable */ + #define SH4_PCIPDTR_PB0 0x000000001 /* Port 0 Enable */ +#define SH4_PCIPDR 0x220 /* Port IO Data Register */ + +/* Flags */ +#define SH4_PCIC_NO_RESET 0x0001 + +/* arch/sh/kernel/drivers/pci/ops-sh4.c */ +extern struct pci_ops sh4_pci_ops; +int sh4_pci_check_direct(void); +int pci_fixup_pcic(void); + +struct sh4_pci_address_space { + unsigned long base; + unsigned long size; +}; + +struct sh4_pci_address_map { + struct sh4_pci_address_space window0; + struct sh4_pci_address_space window1; + unsigned long flags; +}; + +static inline void pci_write_reg(unsigned long val, unsigned long reg) +{ + outl(val, PCI_REG(reg)); +} + +static inline unsigned long pci_read_reg(unsigned long reg) +{ + return inl(PCI_REG(reg)); +} +#endif /* __PCI_SH4_H */ diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c index 65093ec1b55e..dbe837884983 100644 --- a/arch/sh/drivers/pci/pci-sh7751.c +++ b/arch/sh/drivers/pci/pci-sh7751.c @@ -15,180 +15,14 @@ #undef DEBUG -#include -#include #include #include -#include -#include +#include #include -#include #include - -#include +#include "pci-sh4.h" +#include #include -#include "pci-sh7751.h" - -static unsigned int pci_probe = PCI_PROBE_CONF1; -extern int pci_fixup_pcic(void); - -void pcibios_fixup_irqs(void) __attribute__ ((weak)); - -/* - * Direct access to PCI hardware... - */ - -#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3)) - -/* - * Functions for accessing PCI configuration space with type 1 accesses - */ -static int sh7751_pci_read(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 *val) -{ - unsigned long flags; - u32 data; - - /* - * PCIPDR may only be accessed as 32 bit words, - * so we must do byte alignment by hand - */ - local_irq_save(flags); - outl(CONFIG_CMD(bus,devfn,where), PCI_REG(SH7751_PCIPAR)); - data = inl(PCI_REG(SH7751_PCIPDR)); - local_irq_restore(flags); - - switch (size) { - case 1: - *val = (data >> ((where & 3) << 3)) & 0xff; - break; - case 2: - *val = (data >> ((where & 2) << 3)) & 0xffff; - break; - case 4: - *val = data; - break; - default: - return PCIBIOS_FUNC_NOT_SUPPORTED; - } - - return PCIBIOS_SUCCESSFUL; -} - -/* - * Since SH7751 only does 32bit access we'll have to do a read, - * mask,write operation. - * We'll allow an odd byte offset, though it should be illegal. - */ -static int sh7751_pci_write(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 val) -{ - unsigned long flags; - int shift; - u32 data; - - local_irq_save(flags); - outl(CONFIG_CMD(bus,devfn,where), PCI_REG(SH7751_PCIPAR)); - data = inl(PCI_REG(SH7751_PCIPDR)); - local_irq_restore(flags); - - switch (size) { - case 1: - shift = (where & 3) << 3; - data &= ~(0xff << shift); - data |= ((val & 0xff) << shift); - break; - case 2: - shift = (where & 2) << 3; - data &= ~(0xffff << shift); - data |= ((val & 0xffff) << shift); - break; - case 4: - data = val; - break; - default: - return PCIBIOS_FUNC_NOT_SUPPORTED; - } - - outl(data, PCI_REG(SH7751_PCIPDR)); - - return PCIBIOS_SUCCESSFUL; -} - -#undef CONFIG_CMD - -struct pci_ops sh7751_pci_ops = { - .read = sh7751_pci_read, - .write = sh7751_pci_write, -}; - -static int __init pci_check_direct(void) -{ - unsigned int tmp, id; - - /* check for SH7751/SH7751R hardware */ - id = inl(SH7751_PCIREG_BASE+SH7751_PCICONF0); - if (id != ((SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID) && - id != ((SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID)) { - pr_debug("PCI: This is not an SH7751(R) (%x)\n", id); - return -ENODEV; - } - - /* - * Check if configuration works. - */ - if (pci_probe & PCI_PROBE_CONF1) { - tmp = inl (PCI_REG(SH7751_PCIPAR)); - outl (0x80000000, PCI_REG(SH7751_PCIPAR)); - if (inl (PCI_REG(SH7751_PCIPAR)) == 0x80000000) { - outl (tmp, PCI_REG(SH7751_PCIPAR)); - printk(KERN_INFO "PCI: Using configuration type 1\n"); - request_region(PCI_REG(SH7751_PCIPAR), 8, "PCI conf1"); - return 0; - } - outl (tmp, PCI_REG(SH7751_PCIPAR)); - } - - pr_debug("PCI: pci_check_direct failed\n"); - return -EINVAL; -} - -/***************************************************************************************/ - -/* - * Handle bus scanning and fixups .... - */ - -static void __init pci_fixup_ide_bases(struct pci_dev *d) -{ - int i; - - /* - * PCI IDE controllers use non-standard I/O port decoding, respect it. - */ - if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) - return; - pr_debug("PCI: IDE base address fixup for %s\n", pci_name(d)); - for(i=0; i<4; i++) { - struct resource *r = &d->resource[i]; - if ((r->start & ~0x80) == 0x374) { - r->start |= 2; - r->end = r->start; - } - } -} - -DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); - -/* - * Called after each bus is probed, but before its children - * are examined. - */ - -void __init pcibios_fixup_bus(struct pci_bus *b) -{ - pci_read_bridge_bases(b); -} /* * Initialization. Try all known PCI access methods. Note that we support @@ -196,25 +30,29 @@ void __init pcibios_fixup_bus(struct pci_bus *b) * to access config space. * * Note that the platform specific initialization (BSC registers, and memory - * space mapping) will be called via the machine vectors (sh_mv.mv_pci_init()) if it - * exitst and via the platform defined function pcibios_init_platform(). - * See pci_bigsur.c for implementation; - * - * The BIOS version of the pci functions is not yet implemented but it is left - * in for completeness. Currently an error will be genereated at compile time. + * space mapping) will be called via the platform defined function + * pcibios_init_platform(). */ - static int __init sh7751_pci_init(void) { + unsigned int id; int ret; pr_debug("PCI: Starting intialization.\n"); - if ((ret = pci_check_direct()) != 0) + + /* check for SH7751/SH7751R hardware */ + id = pci_read_reg(SH7751_PCICONF0); + if (id != ((SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID) && + id != ((SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID)) { + pr_debug("PCI: This is not an SH7751(R) (%x)\n", id); + return -ENODEV; + } + + if ((ret = sh4_pci_check_direct()) != 0) return ret; return pcibios_init_platform(); } - subsys_initcall(sh7751_pci_init); static int __init __area_sdram_check(unsigned int area) @@ -228,7 +66,7 @@ static int __init __area_sdram_check(unsigned int area) area, word); return 0; } - outl(word, PCI_REG(SH7751_PCIBCR1)); + pci_write_reg(word, SH4_PCIBCR1); word = (u16)inw(SH7751_BCR2); /* check BCR2 for 32bit SDRAM interface*/ @@ -237,12 +75,12 @@ static int __init __area_sdram_check(unsigned int area) area, word); return 0; } - outl(word, PCI_REG(SH7751_PCIBCR2)); + pci_write_reg(word, SH4_PCIBCR2); return 1; } -int __init sh7751_pcic_init(struct sh7751_pci_address_map *map) +int __init sh7751_pcic_init(struct sh4_pci_address_map *map) { u32 reg; u32 word; @@ -251,39 +89,39 @@ int __init sh7751_pcic_init(struct sh7751_pci_address_map *map) reg = inl(SH7751_BCR1); reg |= 0x80000; outl(reg, SH7751_BCR1); - + /* Turn the clocks back on (not done in reset)*/ - outl(0, PCI_REG(SH7751_PCICLKR)); + pci_write_reg(0, SH4_PCICLKR); /* Clear Powerdown IRQ's (not done in reset) */ - word = SH7751_PCIPINT_D3 | SH7751_PCIPINT_D0; - outl(word, PCI_REG(SH7751_PCIPINT)); + word = SH4_PCIPINT_D3 | SH4_PCIPINT_D0; + pci_write_reg(word, SH4_PCIPINT); /* * This code is unused for some boards as it is done in the * bootloader and doing it here means the MAC addresses loaded * by the bootloader get lost. */ - if (!(map->flags & SH7751_PCIC_NO_RESET)) { + if (!(map->flags & SH4_PCIC_NO_RESET)) { /* toggle PCI reset pin */ - word = SH7751_PCICR_PREFIX | SH7751_PCICR_PRST; - outl(word,PCI_REG(SH7751_PCICR)); + word = SH4_PCICR_PREFIX | SH4_PCICR_PRST; + pci_write_reg(word, SH4_PCICR); /* Wait for a long time... not 1 sec. but long enough */ mdelay(100); - word = SH7751_PCICR_PREFIX; - outl(word,PCI_REG(SH7751_PCICR)); + word = SH4_PCICR_PREFIX; + pci_write_reg(word, SH4_PCICR); } - + /* set the command/status bits to: * Wait Cycle Control + Parity Enable + Bus Master + * Mem space enable */ word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER | SH7751_PCICONF1_BUM | SH7751_PCICONF1_MES; - outl(word, PCI_REG(SH7751_PCICONF1)); + pci_write_reg(word, SH7751_PCICONF1); /* define this host as the host bridge */ - word = SH7751_PCI_HOST_BRIDGE << 24; - outl(word, PCI_REG(SH7751_PCICONF2)); + word = PCI_BASE_CLASS_BRIDGE << 24; + pci_write_reg(word, SH7751_PCICONF2); /* Set IO and Mem windows to local address * Make PCI and local address the same for easy 1 to 1 mapping @@ -291,46 +129,49 @@ int __init sh7751_pcic_init(struct sh7751_pci_address_map *map) * Window1 = map->window1.size @ cached area base = SDRAM */ word = map->window0.size - 1; - outl(word, PCI_REG(SH7751_PCILSR0)); + pci_write_reg(word, SH4_PCILSR0); word = map->window1.size - 1; - outl(word, PCI_REG(SH7751_PCILSR1)); + pci_write_reg(word, SH4_PCILSR1); /* Set the values on window 0 PCI config registers */ word = P2SEGADDR(map->window0.base); - outl(word, PCI_REG(SH7751_PCILAR0)); - outl(word, PCI_REG(SH7751_PCICONF5)); + pci_write_reg(word, SH4_PCILAR0); + pci_write_reg(word, SH7751_PCICONF5); /* Set the values on window 1 PCI config registers */ word = PHYSADDR(map->window1.base); - outl(word, PCI_REG(SH7751_PCILAR1)); - outl(word, PCI_REG(SH7751_PCICONF6)); + pci_write_reg(word, SH4_PCILAR1); + pci_write_reg(word, SH7751_PCICONF6); - /* Set the local 16MB PCI memory space window to + /* Set the local 16MB PCI memory space window to * the lowest PCI mapped address */ - word = PCIBIOS_MIN_MEM & SH7751_PCIMBR_MASK; - PCIDBG(2,"PCI: Setting upper bits of Memory window to 0x%x\n", word); - outl(word , PCI_REG(SH7751_PCIMBR)); + word = PCIBIOS_MIN_MEM & SH4_PCIMBR_MASK; + pr_debug("PCI: Setting upper bits of Memory window to 0x%x\n", word); + pci_write_reg(word , SH4_PCIMBR); /* Map IO space into PCI IO window * The IO window is 64K-PCIBIOS_MIN_IO in size - * IO addresses will be translated to the + * IO addresses will be translated to the * PCI IO window base address */ - PCIDBG(3,"PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n", PCIBIOS_MIN_IO, - (64*1024), SH7751_PCI_IO_BASE+PCIBIOS_MIN_IO); + pr_debug("PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n", + PCIBIOS_MIN_IO, (64 << 10), + SH4_PCI_IO_BASE + PCIBIOS_MIN_IO); - /* + /* * XXX: For now, leave this board-specific. In the event we have other * boards that need to do similar work, this can be wrapped. */ #ifdef CONFIG_SH_BIGSUR - bigsur_port_map(PCIBIOS_MIN_IO, (64*1024), SH7751_PCI_IO_BASE+PCIBIOS_MIN_IO,0); + bigsur_port_map(PCIBIOS_MIN_IO, (64 << 10), + SH4_PCI_IO_BASE + PCIBIOS_MIN_IO, 0); #endif - /* Make sure the MSB's of IO window are set to access PCI space correctly */ - word = PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK; - PCIDBG(2,"PCI: Setting upper bits of IO window to 0x%x\n", word); - outl(word, PCI_REG(SH7751_PCIIOBR)); - + /* Make sure the MSB's of IO window are set to access PCI space + * correctly */ + word = PCIBIOS_MIN_IO & SH4_PCIIOBR_MASK; + pr_debug("PCI: Setting upper bits of IO window to 0x%x\n", word); + pci_write_reg(word, SH4_PCIIOBR); + /* Set PCI WCRx, BCRx's, copy from BSC locations */ /* check BCR for SDRAM in specified area */ @@ -349,13 +190,13 @@ int __init sh7751_pcic_init(struct sh7751_pci_address_map *map) /* configure the wait control registers */ word = inl(SH7751_WCR1); - outl(word, PCI_REG(SH7751_PCIWCR1)); + pci_write_reg(word, SH4_PCIWCR1); word = inl(SH7751_WCR2); - outl(word, PCI_REG(SH7751_PCIWCR2)); + pci_write_reg(word, SH4_PCIWCR2); word = inl(SH7751_WCR3); - outl(word, PCI_REG(SH7751_PCIWCR3)); + pci_write_reg(word, SH4_PCIWCR3); word = inl(SH7751_MCR); - outl(word, PCI_REG(SH7751_PCIMCR)); + pci_write_reg(word, SH4_PCIMCR); /* NOTE: I'm ignoring the PCI error IRQs for now.. * TODO: add support for the internal error interrupts and @@ -368,49 +209,8 @@ int __init sh7751_pcic_init(struct sh7751_pci_address_map *map) /* SH7751 init done, set central function init complete */ /* use round robin mode to stop a device starving/overruning */ - word = SH7751_PCICR_PREFIX | SH7751_PCICR_CFIN | SH7751_PCICR_ARBM; - outl(word,PCI_REG(SH7751_PCICR)); + word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM; + pci_write_reg(word, SH4_PCICR); return 1; } - -char * __init pcibios_setup(char *str) -{ - if (!strcmp(str, "off")) { - pci_probe = 0; - return NULL; - } - - return str; -} - -/* - * IRQ functions - */ -static u8 __init sh7751_no_swizzle(struct pci_dev *dev, u8 *pin) -{ - /* no swizzling */ - return PCI_SLOT(dev->devfn); -} - -static int sh7751_pci_lookup_irq(struct pci_dev *dev, u8 slot, u8 pin) -{ - int irq = -1; - - /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */ - irq = pcibios_map_platform_irq(slot,pin); - if( irq < 0 ) { - pr_debug("PCI: Error mapping IRQ on device %s\n", pci_name(dev)); - return irq; - } - - pr_debug("Setting IRQ for slot %s to %d\n", pci_name(dev), irq); - - return irq; -} - -void __init pcibios_fixup_irqs(void) -{ - pci_fixup_irqs(sh7751_no_swizzle, sh7751_pci_lookup_irq); -} - diff --git a/arch/sh/drivers/pci/pci-sh7751.h b/arch/sh/drivers/pci/pci-sh7751.h index 1fee5cae10d1..68e3cb5e6bec 100644 --- a/arch/sh/drivers/pci/pci-sh7751.h +++ b/arch/sh/drivers/pci/pci-sh7751.h @@ -3,7 +3,7 @@ * * Dustin McIntire (dustin@sensoria.com) (c) 2001 * Paul Mundt (lethal@linux-sh.org) (c) 2003 - * + * * May be copied or modified under the terms of the GNU General Public * License. See linux/COPYING for more information. * @@ -12,28 +12,6 @@ #ifndef _PCI_SH7751_H_ #define _PCI_SH7751_H_ -#include - -/* set debug level 4=verbose...1=terse */ -//#define DEBUG_PCI 3 -#undef DEBUG_PCI - -#ifdef DEBUG_PCI -#define PCIDBG(n, x...) { if(DEBUG_PCI>=n) printk(x); } -#else -#define PCIDBG(n, x...) -#endif - -/* startup values */ -#define PCI_PROBE_BIOS 1 -#define PCI_PROBE_CONF1 2 -#define PCI_PROBE_CONF2 4 -#define PCI_NO_SORT 0x100 -#define PCI_BIOS_SORT 0x200 -#define PCI_NO_CHECKS 0x400 -#define PCI_ASSIGN_ROMS 0x1000 -#define PCI_BIOS_IRQ_SCAN 0x2000 - /* Platform Specific Values */ #define SH7751_VENDOR_ID 0x1054 #define SH7751_DEVICE_ID 0x3505 @@ -128,131 +106,6 @@ #define SH7751_PCICONF17_PMEN 0x00010000 /* PME Enable */ #define SH7751_PCICONF17_PWST 0x00000003 /* Power State */ /* SH7715 Internal PCI Registers */ -#define SH7751_PCICR 0x100 /* PCI Control Register */ - #define SH7751_PCICR_PREFIX 0xA5000000 /* CR prefix for write */ - #define SH7751_PCICR_TRSB 0x00000200 /* Target Read Single */ - #define SH7751_PCICR_BSWP 0x00000100 /* Target Byte Swap */ - #define SH7751_PCICR_PLUP 0x00000080 /* Enable PCI Pullup */ - #define SH7751_PCICR_ARBM 0x00000040 /* PCI Arbitration Mode */ - #define SH7751_PCICR_MD 0x00000030 /* MD9 and MD10 status */ - #define SH7751_PCICR_SERR 0x00000008 /* SERR output assert */ - #define SH7751_PCICR_INTA 0x00000004 /* INTA output assert */ - #define SH7751_PCICR_PRST 0x00000002 /* PCI Reset Assert */ - #define SH7751_PCICR_CFIN 0x00000001 /* Central Fun. Init Done */ -#define SH7751_PCILSR0 0x104 /* PCI Local Space Register0 */ -#define SH7751_PCILSR1 0x108 /* PCI Local Space Register1 */ -#define SH7751_PCILAR0 0x10C /* PCI Local Address Register1 */ -#define SH7751_PCILAR1 0x110 /* PCI Local Address Register1 */ -#define SH7751_PCIINT 0x114 /* PCI Interrupt Register */ - #define SH7751_PCIINT_MLCK 0x00008000 /* Master Lock Error */ - #define SH7751_PCIINT_TABT 0x00004000 /* Target Abort Error */ - #define SH7751_PCIINT_TRET 0x00000200 /* Target Retry Error */ - #define SH7751_PCIINT_MFDE 0x00000100 /* Master Func. Disable Error */ - #define SH7751_PCIINT_PRTY 0x00000080 /* Address Parity Error */ - #define SH7751_PCIINT_SERR 0x00000040 /* SERR Detection Error */ - #define SH7751_PCIINT_TWDP 0x00000020 /* Tgt. Write Parity Error */ - #define SH7751_PCIINT_TRDP 0x00000010 /* Tgt. Read Parity Error Det. */ - #define SH7751_PCIINT_MTABT 0x00000008 /* Master-Tgt. Abort Error */ - #define SH7751_PCIINT_MMABT 0x00000004 /* Master-Master Abort Error */ - #define SH7751_PCIINT_MWPD 0x00000002 /* Master Write PERR Detect */ - #define SH7751_PCIINT_MRPD 0x00000002 /* Master Read PERR Detect */ -#define SH7751_PCIINTM 0x118 /* PCI Interrupt Mask Register */ -#define SH7751_PCIALR 0x11C /* Error Address Register */ -#define SH7751_PCICLR 0x120 /* Error Command/Data Register */ - #define SH7751_PCICLR_MPIO 0x80000000 /* Error Command/Data Register */ - #define SH7751_PCICLR_MDMA0 0x40000000 /* DMA0 Transfer Error */ - #define SH7751_PCICLR_MDMA1 0x20000000 /* DMA1 Transfer Error */ - #define SH7751_PCICLR_MDMA2 0x10000000 /* DMA2 Transfer Error */ - #define SH7751_PCICLR_MDMA3 0x08000000 /* DMA3 Transfer Error */ - #define SH7751_PCICLR_TGT 0x04000000 /* Target Transfer Error */ - #define SH7751_PCICLR_CMDL 0x0000000F /* PCI Command at Error */ -#define SH7751_PCIAINT 0x130 /* Arbiter Interrupt Register */ - #define SH7751_PCIAINT_MBKN 0x00002000 /* Master Broken Interrupt */ - #define SH7751_PCIAINT_TBTO 0x00001000 /* Target Bus Time Out */ - #define SH7751_PCIAINT_MBTO 0x00001000 /* Master Bus Time Out */ - #define SH7751_PCIAINT_TABT 0x00000008 /* Target Abort */ - #define SH7751_PCIAINT_MABT 0x00000004 /* Master Abort */ - #define SH7751_PCIAINT_RDPE 0x00000002 /* Read Data Parity Error */ - #define SH7751_PCIAINT_WDPE 0x00000002 /* Write Data Parity Error */ -#define SH7751_PCIAINTM 0x134 /* Arbiter Int. Mask Register */ -#define SH7751_PCIBMLR 0x138 /* Error Bus Master Register */ - #define SH7751_PCIBMLR_REQ4 0x00000010 /* REQ4 bus master at error */ - #define SH7751_PCIBMLR_REQ3 0x00000008 /* REQ3 bus master at error */ - #define SH7751_PCIBMLR_REQ2 0x00000004 /* REQ2 bus master at error */ - #define SH7751_PCIBMLR_REQ1 0x00000002 /* REQ1 bus master at error */ - #define SH7751_PCIBMLR_REQ0 0x00000001 /* REQ0 bus master at error */ -#define SH7751_PCIDMABT 0x140 /* DMA Transfer Arb. Register */ - #define SH7751_PCIDMABT_RRBN 0x00000001 /* DMA Arbitor Round-Robin */ -#define SH7751_PCIDPA0 0x180 /* DMA0 Transfer Addr. Register */ -#define SH7751_PCIDLA0 0x184 /* DMA0 Local Addr. Register */ -#define SH7751_PCIDTC0 0x188 /* DMA0 Transfer Cnt. Register */ -#define SH7751_PCIDCR0 0x18C /* DMA0 Control Register */ - #define SH7751_PCIDCR_ALGN 0x00000600 /* DMA Alignment Mode */ - #define SH7751_PCIDCR_MAST 0x00000100 /* DMA Termination Type */ - #define SH7751_PCIDCR_INTM 0x00000080 /* DMA Interrupt Done Mask*/ - #define SH7751_PCIDCR_INTS 0x00000040 /* DMA Interrupt Done Status */ - #define SH7751_PCIDCR_LHLD 0x00000020 /* Local Address Control */ - #define SH7751_PCIDCR_PHLD 0x00000010 /* PCI Address Control*/ - #define SH7751_PCIDCR_IOSEL 0x00000008 /* PCI Address Space Type */ - #define SH7751_PCIDCR_DIR 0x00000004 /* DMA Transfer Direction */ - #define SH7751_PCIDCR_STOP 0x00000002 /* Force DMA Stop */ - #define SH7751_PCIDCR_STRT 0x00000001 /* DMA Start */ -#define SH7751_PCIDPA1 0x190 /* DMA1 Transfer Addr. Register */ -#define SH7751_PCIDLA1 0x194 /* DMA1 Local Addr. Register */ -#define SH7751_PCIDTC1 0x198 /* DMA1 Transfer Cnt. Register */ -#define SH7751_PCIDCR1 0x19C /* DMA1 Control Register */ -#define SH7751_PCIDPA2 0x1A0 /* DMA2 Transfer Addr. Register */ -#define SH7751_PCIDLA2 0x1A4 /* DMA2 Local Addr. Register */ -#define SH7751_PCIDTC2 0x1A8 /* DMA2 Transfer Cnt. Register */ -#define SH7751_PCIDCR2 0x1AC /* DMA2 Control Register */ -#define SH7751_PCIDPA3 0x1B0 /* DMA3 Transfer Addr. Register */ -#define SH7751_PCIDLA3 0x1B4 /* DMA3 Local Addr. Register */ -#define SH7751_PCIDTC3 0x1B8 /* DMA3 Transfer Cnt. Register */ -#define SH7751_PCIDCR3 0x1BC /* DMA3 Control Register */ -#define SH7751_PCIPAR 0x1C0 /* PIO Address Register */ - #define SH7751_PCIPAR_CFGEN 0x80000000 /* Configuration Enable */ - #define SH7751_PCIPAR_BUSNO 0x00FF0000 /* Config. Bus Number */ - #define SH7751_PCIPAR_DEVNO 0x0000FF00 /* Config. Device Number */ - #define SH7751_PCIPAR_REGAD 0x000000FC /* Register Address Number */ -#define SH7751_PCIMBR 0x1C4 /* Memory Base Address Register */ - #define SH7751_PCIMBR_MASK 0xFF000000 /* Memory Space Mask */ - #define SH7751_PCIMBR_LOCK 0x00000001 /* Lock Memory Space */ -#define SH7751_PCIIOBR 0x1C8 /* I/O Base Address Register */ - #define SH7751_PCIIOBR_MASK 0xFFFC0000 /* IO Space Mask */ - #define SH7751_PCIIOBR_LOCK 0x00000001 /* Lock IO Space */ -#define SH7751_PCIPINT 0x1CC /* Power Mgmnt Int. Register */ - #define SH7751_PCIPINT_D3 0x00000002 /* D3 Pwr Mgmt. Interrupt */ - #define SH7751_PCIPINT_D0 0x00000001 /* D0 Pwr Mgmt. Interrupt */ -#define SH7751_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */ -#define SH7751_PCICLKR 0x1D4 /* Clock Ctrl. Register */ - #define SH7751_PCICLKR_PCSTP 0x00000002 /* PCI Clock Stop */ - #define SH7751_PCICLKR_BCSTP 0x00000002 /* BCLK Clock Stop */ -/* For definitions of BCR, MCR see ... */ -#define SH7751_PCIBCR1 0x1E0 /* Memory BCR1 Register */ -#define SH7751_PCIBCR2 0x1E4 /* Memory BCR2 Register */ -#define SH7751_PCIWCR1 0x1E8 /* Wait Control 1 Register */ -#define SH7751_PCIWCR2 0x1EC /* Wait Control 2 Register */ -#define SH7751_PCIWCR3 0x1F0 /* Wait Control 3 Register */ -#define SH7751_PCIMCR 0x1F4 /* Memory Control Register */ -#define SH7751_PCIBCR3 0x1f8 /* Memory BCR3 Register */ -#define SH7751_PCIPCTR 0x200 /* Port Control Register */ - #define SH7751_PCIPCTR_P2EN 0x000400000 /* Port 2 Enable */ - #define SH7751_PCIPCTR_P1EN 0x000200000 /* Port 1 Enable */ - #define SH7751_PCIPCTR_P0EN 0x000100000 /* Port 0 Enable */ - #define SH7751_PCIPCTR_P2UP 0x000000020 /* Port2 Pull Up Enable */ - #define SH7751_PCIPCTR_P2IO 0x000000010 /* Port2 Output Enable */ - #define SH7751_PCIPCTR_P1UP 0x000000008 /* Port1 Pull Up Enable */ - #define SH7751_PCIPCTR_P1IO 0x000000004 /* Port1 Output Enable */ - #define SH7751_PCIPCTR_P0UP 0x000000002 /* Port0 Pull Up Enable */ - #define SH7751_PCIPCTR_P0IO 0x000000001 /* Port0 Output Enable */ -#define SH7751_PCIPDTR 0x204 /* Port Data Register */ - #define SH7751_PCIPDTR_PB5 0x000000020 /* Port 5 Enable */ - #define SH7751_PCIPDTR_PB4 0x000000010 /* Port 4 Enable */ - #define SH7751_PCIPDTR_PB3 0x000000008 /* Port 3 Enable */ - #define SH7751_PCIPDTR_PB2 0x000000004 /* Port 2 Enable */ - #define SH7751_PCIPDTR_PB1 0x000000002 /* Port 1 Enable */ - #define SH7751_PCIPDTR_PB0 0x000000001 /* Port 0 Enable */ -#define SH7751_PCIPDR 0x220 /* Port IO Data Register */ /* Memory Control Registers */ #define SH7751_BCR1 0xFF800000 /* Memory BCR1 Register */ @@ -274,30 +127,9 @@ #define SH7751_CS5_BASE_ADDR (SH7751_CS4_BASE_ADDR + SH7751_MEM_REGION_SIZE) #define SH7751_CS6_BASE_ADDR (SH7751_CS5_BASE_ADDR + SH7751_MEM_REGION_SIZE) -/* General PCI values */ -#define SH7751_PCI_HOST_BRIDGE 0x6 - -/* Flags */ -#define SH7751_PCIC_NO_RESET 0x0001 - -/* External functions defined per platform i.e. Big Sur, SE... (these could be routed - * through the machine vectors... */ -extern int pcibios_init_platform(void); -extern int pcibios_map_platform_irq(u8 slot, u8 pin); - -struct sh7751_pci_address_space { - unsigned long base; - unsigned long size; -}; - -struct sh7751_pci_address_map { - struct sh7751_pci_address_space window0; - struct sh7751_pci_address_space window1; - unsigned long flags; -}; +struct sh4_pci_address_map; /* arch/sh/drivers/pci/pci-sh7751.c */ -extern int sh7751_pcic_init(struct sh7751_pci_address_map *map); +int sh7751_pcic_init(struct sh4_pci_address_map *map); #endif /* _PCI_SH7751_H_ */ - diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c index e09721330ac2..bd3064a82087 100644 --- a/arch/sh/drivers/pci/pci-sh7780.c +++ b/arch/sh/drivers/pci/pci-sh7780.c @@ -20,197 +20,36 @@ #include #include #include -#include -#include #include -#include #include - -#include -#include -#include "pci-sh7780.h" - -static unsigned int pci_probe = PCI_PROBE_CONF1; -extern int pci_fixup_pcic(void); - -/* - * Direct access to PCI hardware... - */ - -#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3)) - -/* - * Functions for accessing PCI configuration space with type 1 accesses - */ -static int sh7780_pci_read(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 *val) -{ - unsigned long flags; - u32 data; - - /* - * PCIPDR may only be accessed as 32 bit words, - * so we must do byte alignment by hand - */ - local_irq_save(flags); - outl(CONFIG_CMD(bus, devfn, where), PCI_REG(SH7780_PCIPAR)); - data = inl(PCI_REG(SH7780_PCIPDR)); - local_irq_restore(flags); - - switch (size) { - case 1: - *val = (data >> ((where & 3) << 3)) & 0xff; - break; - case 2: - *val = (data >> ((where & 2) << 3)) & 0xffff; - break; - case 4: - *val = data; - break; - default: - return PCIBIOS_FUNC_NOT_SUPPORTED; - } - - return PCIBIOS_SUCCESSFUL; -} +#include "pci-sh4.h" /* - * Since SH7780 only does 32bit access we'll have to do a read, - * mask,write operation. - * We'll allow an odd byte offset, though it should be illegal. + * Initialization. Try all known PCI access methods. Note that we support + * using both PCI BIOS and direct access: in such cases, we use I/O ports + * to access config space. + * + * Note that the platform specific initialization (BSC registers, and memory + * space mapping) will be called via the platform defined function + * pcibios_init_platform(). */ -static int sh7780_pci_write(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 val) +static int __init sh7780_pci_init(void) { - unsigned long flags; - int shift; - u32 data; - - local_irq_save(flags); - outl(CONFIG_CMD(bus, devfn, where), PCI_REG(SH7780_PCIPAR)); - data = inl(PCI_REG(SH7780_PCIPDR)); - local_irq_restore(flags); - - switch (size) { - case 1: - shift = (where & 3) << 3; - data &= ~(0xff << shift); - data |= ((val & 0xff) << shift); - break; - case 2: - shift = (where & 2) << 3; - data &= ~(0xffff << shift); - data |= ((val & 0xffff) << shift); - break; - case 4: - data = val; - break; - default: - return PCIBIOS_FUNC_NOT_SUPPORTED; - } - - outl(data, PCI_REG(SH7780_PCIPDR)); - - return PCIBIOS_SUCCESSFUL; -} - -#undef CONFIG_CMD - -struct pci_ops sh7780_pci_ops = { - .read = sh7780_pci_read, - .write = sh7780_pci_write, -}; + unsigned int id; + int ret; -static int __init pci_check_direct(void) -{ - unsigned int tmp, id; + pr_debug("PCI: Starting intialization.\n"); outl(0x00000001, SH7780_PCI_VCR2); /* Enable PCIC */ /* check for SH7780/SH7780R hardware */ - id = inl(PCI_REG(SH7780_PCIVID)); + id = pci_read_reg(SH7780_PCIVID); if ((id != ((SH7780_DEVICE_ID << 16) | SH7780_VENDOR_ID)) && (id != ((SH7781_DEVICE_ID << 16) | SH7780_VENDOR_ID))) { printk(KERN_ERR "PCI: This is not an SH7780 (%x)\n", id); return -ENODEV; } - /* - * Check if configuration works. - */ - if (pci_probe & PCI_PROBE_CONF1) { - tmp = inl(PCI_REG(SH7780_PCIPAR)); - outl(0x80000000, PCI_REG(SH7780_PCIPAR)); - if (inl(PCI_REG(SH7780_PCIPAR)) == 0x80000000) { - outl(tmp, PCI_REG(SH7780_PCIPAR)); - printk(KERN_INFO "PCI: Using configuration type 1\n"); - request_region(PCI_REG(SH7780_PCIPAR), 8, "PCI conf1"); - return 0; - } - outl(tmp, PCI_REG(SH7780_PCIPAR)); - } - - pr_debug("PCI: pci_check_direct failed\n"); - return -EINVAL; -} - -/***************************************************************************************/ - -/* - * Handle bus scanning and fixups .... - */ - -static void __init pci_fixup_ide_bases(struct pci_dev *d) -{ - int i; - - /* - * PCI IDE controllers use non-standard I/O port decoding, respect it. - */ - if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) - return; - pr_debug("PCI: IDE base address fixup for %s\n", pci_name(d)); - for(i=0; i<4; i++) { - struct resource *r = &d->resource[i]; - if ((r->start & ~0x80) == 0x374) { - r->start |= 2; - r->end = r->start; - } - } -} - -DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); - -/* - * Called after each bus is probed, but before its children - * are examined. - */ - -void __init pcibios_fixup_bus(struct pci_bus *b) -{ - pci_read_bridge_bases(b); -} - -/* - * Initialization. Try all known PCI access methods. Note that we support - * using both PCI BIOS and direct access: in such cases, we use I/O ports - * to access config space. - * - * Note that the platform specific initialization (BSC registers, and memory - * space mapping) will be called via the machine vectors (sh_mv.mv_pci_init()) if it - * exists and via the platform defined function pcibios_init_platform(). - * See pci_bigsur.c for implementation; - * - * The BIOS version of the pci functions is not yet implemented but it is left - * in for completeness. Currently an error will be genereated at compile time. - */ - -static int __init sh7780_pci_init(void) -{ - int ret; - - pr_debug("PCI: Starting intialization.\n"); - /* Setup the INTC */ ctrl_outl(0x00200000, INTC_ICR0); /* INTC SH-4 Mode */ ctrl_outl(0x00078000, INTC_INT2MSKCR); /* enable PCIINTA - PCIINTD */ @@ -219,15 +58,14 @@ static int __init sh7780_pci_init(void) ctrl_outl(0x80000000, INTC_INTMSKCLR1); /* enable IRL0-3 Interrupt */ ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); /* enable IRL0-3 Interrupt */ - if ((ret = pci_check_direct()) != 0) + if ((ret = sh4_pci_check_direct()) != 0) return ret; return pcibios_init_platform(); } - core_initcall(sh7780_pci_init); -int __init sh7780_pcic_init(struct sh7780_pci_address_map *map) +int __init sh7780_pcic_init(struct sh4_pci_address_map *map) { u32 word; @@ -236,25 +74,25 @@ int __init sh7780_pcic_init(struct sh7780_pci_address_map *map) * bootloader and doing it here means the MAC addresses loaded * by the bootloader get lost. */ - if (!(map->flags & SH7780_PCIC_NO_RESET)) { + if (!(map->flags & SH4_PCIC_NO_RESET)) { /* toggle PCI reset pin */ - word = SH7780_PCICR_PREFIX | SH7780_PCICR_PRST; - outl(word,PCI_REG(SH7780_PCICR)); + word = SH4_PCICR_PREFIX | SH4_PCICR_PRST; + pci_write_reg(word, SH4_PCICR); /* Wait for a long time... not 1 sec. but long enough */ mdelay(100); - word = SH7780_PCICR_PREFIX; - outl(word,PCI_REG(SH7780_PCICR)); + word = SH4_PCICR_PREFIX; + pci_write_reg(word, SH4_PCICR); } /* set the command/status bits to: * Wait Cycle Control + Parity Enable + Bus Master + * Mem space enable */ - outl(0x00000046, PCI_REG(SH7780_PCICMD)); + pci_write_reg(0x00000046, SH7780_PCICMD); /* define this host as the host bridge */ - word = SH7780_PCI_HOST_BRIDGE << 24; - outl(word, PCI_REG(SH7780_PCIRID)); + word = PCI_BASE_CLASS_BRIDGE << 24; + pci_write_reg(word, SH7780_PCIRID); /* Set IO and Mem windows to local address * Make PCI and local address the same for easy 1 to 1 mapping @@ -262,25 +100,26 @@ int __init sh7780_pcic_init(struct sh7780_pci_address_map *map) * Window1 = map->window1.size @ cached area base = SDRAM */ word = ((map->window0.size - 1) & 0x1ff00001) | 0x01; - outl(0x07f00001, PCI_REG(SH7780_PCILSR0)); + pci_write_reg(0x07f00001, SH4_PCILSR0); word = ((map->window1.size - 1) & 0x1ff00001) | 0x01; - outl(0x00000001, PCI_REG(SH7780_PCILSR1)); + pci_write_reg(0x00000001, SH4_PCILSR1); /* Set the values on window 0 PCI config registers */ word = P2SEGADDR(map->window0.base); - outl(0xa8000000, PCI_REG(SH7780_PCILAR0)); - outl(0x08000000, PCI_REG(SH7780_PCIMBAR0)); + pci_write_reg(0xa8000000, SH4_PCILAR0); + pci_write_reg(0x08000000, SH7780_PCIMBAR0); /* Set the values on window 1 PCI config registers */ word = P2SEGADDR(map->window1.base); - outl(0x00000000, PCI_REG(SH7780_PCILAR1)); - outl(0x00000000, PCI_REG(SH7780_PCIMBAR1)); + pci_write_reg(0x00000000, SH4_PCILAR1); + pci_write_reg(0x00000000, SH7780_PCIMBAR1); /* Map IO space into PCI IO window * The IO window is 64K-PCIBIOS_MIN_IO in size * IO addresses will be translated to the * PCI IO window base address */ - PCIDBG(3,"PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n", PCIBIOS_MIN_IO, - (64*1024), SH7780_PCI_IO_BASE+PCIBIOS_MIN_IO); + pr_debug("PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n", + PCIBIOS_MIN_IO, (64 << 10), + SH7780_PCI_IO_BASE + PCIBIOS_MIN_IO); /* NOTE: I'm ignoring the PCI error IRQs for now.. * TODO: add support for the internal error interrupts and @@ -293,49 +132,8 @@ int __init sh7780_pcic_init(struct sh7780_pci_address_map *map) /* SH7780 init done, set central function init complete */ /* use round robin mode to stop a device starving/overruning */ - word = SH7780_PCICR_PREFIX | SH7780_PCICR_CFIN | /* SH7780_PCICR_ARBM |*/ SH7780_PCICR_FTO; - outl(word, PCI_REG(SH7780_PCICR)); + word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO; + pci_write_reg(word, SH4_PCICR); return 1; } - -char * __init pcibios_setup(char *str) -{ - if (!strcmp(str, "off")) { - pci_probe = 0; - return NULL; - } - - return str; -} - -/* - * IRQ functions - */ -static u8 __init sh7780_no_swizzle(struct pci_dev *dev, u8 *pin) -{ - /* no swizzling */ - return PCI_SLOT(dev->devfn); -} - -static int sh7780_pci_lookup_irq(struct pci_dev *dev, u8 slot, u8 pin) -{ - int irq = -1; - - /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */ - irq = pcibios_map_platform_irq(slot,pin); - if( irq < 0 ) { - pr_debug("PCI: Error mapping IRQ on device %s\n", pci_name(dev)); - return irq; - } - - pr_debug("Setting IRQ for slot %s to %d\n", pci_name(dev), irq); - - return irq; -} - -void __init pcibios_fixup_irqs(void) -{ - pci_fixup_irqs(sh7780_no_swizzle, sh7780_pci_lookup_irq); -} - diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h index 750d5d7753a2..f02d2180a4bc 100644 --- a/arch/sh/drivers/pci/pci-sh7780.h +++ b/arch/sh/drivers/pci/pci-sh7780.h @@ -12,28 +12,6 @@ #ifndef _PCI_SH7780_H_ #define _PCI_SH7780_H_ -#include - -/* set debug level 4=verbose...1=terse */ -//#define DEBUG_PCI 3 -#undef DEBUG_PCI - -#ifdef DEBUG_PCI -#define PCIDBG(n, x...) { if(DEBUG_PCI>=n) printk(x); } -#else -#define PCIDBG(n, x...) -#endif - -/* startup values */ -#define PCI_PROBE_BIOS 1 -#define PCI_PROBE_CONF1 2 -#define PCI_PROBE_CONF2 4 -#define PCI_NO_SORT 0x100 -#define PCI_BIOS_SORT 0x200 -#define PCI_NO_CHECKS 0x400 -#define PCI_ASSIGN_ROMS 0x1000 -#define PCI_BIOS_IRQ_SCAN 0x2000 - /* Platform Specific Values */ #define SH7780_VENDOR_ID 0x1912 #define SH7780_DEVICE_ID 0x0002 @@ -47,15 +25,12 @@ /* SH7780 Specific Values */ #define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */ #define SH7780_PCI_CONFIG_SIZE 0x01000000 /* Config space size */ + #define SH7780_PCI_MEMORY_BASE 0xFD000000 /* Memory space base addr */ #define SH7780_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ -#if 1 + #define SH7780_PCI_IO_BASE 0xFE400000 /* IO space base address */ #define SH7780_PCI_IO_SIZE 0x00400000 /* Size of IO window */ -#else -#define SH7780_PCI_IO_BASE 0xFE200000 /* IO space base address */ -#define SH7780_PCI_IO_SIZE 0x00200000 /* Size of IO window */ -#endif #define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */ #define PCI_REG(n) (SH7780_PCIREG_BASE+n) @@ -90,44 +65,16 @@ #define SH7780_PCIPMCSR_BSE 0x046 #define SH7780_PCICDD 0x047 -/* SH7780 PCI Local Registers */ -#define SH7780_PCICR 0x100 /* PCI Control Register */ - #define SH7780_PCICR_PREFIX 0xA5000000 /* CR prefix for write */ - #define SH7780_PCICR_PFCS 0x00000800 /* TRDY/IRDY Enable */ - #define SH7780_PCICR_FTO 0x00000400 /* TRDY/IRDY Enable */ - #define SH7780_PCICR_PFE 0x00000200 /* Target Read Single */ - #define SH7780_PCICR_TBS 0x00000100 /* Target Byte Swap */ - #define SH7780_PCICR_ARBM 0x00000040 /* PCI Arbitration Mode */ - #define SH7780_PCICR_IOCS 0x00000004 /* INTA output assert */ - #define SH7780_PCICR_PRST 0x00000002 /* PCI Reset Assert */ - #define SH7780_PCICR_CFIN 0x00000001 /* Central Fun. Init Done */ -#define SH7780_PCILSR0 0x104 /* PCI Local Space Register0 */ -#define SH7780_PCILSR1 0x108 /* PCI Local Space Register1 */ -#define SH7780_PCILAR0 0x10C /* PCI Local Address Register1 */ -#define SH7780_PCILAR1 0x110 /* PCI Local Address Register1 */ -#define SH7780_PCIIR 0x114 /* PCI Interrupt Register */ -#define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */ -#define SH7780_PCIAIR 0x11C /* Error Address Register */ -#define SH7780_PCICIR 0x120 /* Error Command/Data Register */ -#define SH7780_PCIAINT 0x130 /* Arbiter Interrupt Register */ -#define SH7780_PCIAINTM 0x134 /* Arbiter Int. Mask Register */ -#define SH7780_PCIBMIR 0x138 /* Error Bus Master Register */ -#define SH7780_PCIPAR 0x1C0 /* PIO Address Register */ -#define SH7780_PCIPINT 0x1CC /* Power Management Int. Register */ -#define SH7780_PCIPINTM 0x1D0 /* Power Management Mask Register */ -#define SH7780_PCIMBR0 0x1E0 /* Memory Bank0 Register */ -#define SH7780_PCIMBMR0 0x1E4 /* Memory Bank0 Mask Register */ -#define SH7780_PCIMBR1 0x1E8 /* Memory Bank1 Register */ -#define SH7780_PCIMBMR1 0x1EC /* Memory Bank1 Mask Register */ -#define SH7780_PCIMBR2 0x1F0 /* Memory Bank2 Register */ -#define SH7780_PCIMBMR2 0x1F4 /* Memory Bank2 Mask Register */ -#define SH7780_PCIIOBR 0x1F8 /* Bank Register */ -#define SH7780_PCIIOBMR 0x1FC /* Bank Mask Register */ +#define SH7780_PCIMBR0 0x1E0 +#define SH7780_PCIMBMR0 0x1E4 +#define SH7780_PCIMBR2 0x1F0 +#define SH7780_PCIMBMR2 0x1F4 +#define SH7780_PCIIOBR 0x1F8 +#define SH7780_PCIIOBMR 0x1FC #define SH7780_PCICSCR0 0x210 /* Cache Snoop1 Cnt. Register */ #define SH7780_PCICSCR1 0x214 /* Cache Snoop2 Cnt. Register */ #define SH7780_PCICSAR0 0x218 /* Cache Snoop1 Addr. Register */ #define SH7780_PCICSAR1 0x21C /* Cache Snoop2 Addr. Register */ -#define SH7780_PCIPDR 0x220 /* Port IO Data Register */ /* General Memory Config Addresses */ #define SH7780_CS0_BASE_ADDR 0x0 @@ -139,30 +86,9 @@ #define SH7780_CS5_BASE_ADDR (SH7780_CS4_BASE_ADDR + SH7780_MEM_REGION_SIZE) #define SH7780_CS6_BASE_ADDR (SH7780_CS5_BASE_ADDR + SH7780_MEM_REGION_SIZE) -/* General PCI values */ -#define SH7780_PCI_HOST_BRIDGE 0x6 - -/* Flags */ -#define SH7780_PCIC_NO_RESET 0x0001 - -/* External functions defined per platform i.e. Big Sur, SE... (these could be routed - * through the machine vectors... */ -extern int pcibios_init_platform(void); -extern int pcibios_map_platform_irq(u8 slot, u8 pin); - -struct sh7780_pci_address_space { - unsigned long base; - unsigned long size; -}; - -struct sh7780_pci_address_map { - struct sh7780_pci_address_space window0; - struct sh7780_pci_address_space window1; - unsigned long flags; -}; +struct sh4_pci_address_map; /* arch/sh/drivers/pci/pci-sh7780.c */ -extern int sh7780_pcic_init(struct sh7780_pci_address_map *map); +int sh7780_pcic_init(struct sh4_pci_address_map *map); #endif /* _PCI_SH7780_H_ */ - diff --git a/arch/sh/drivers/pci/pci-st40.c b/arch/sh/drivers/pci/pci-st40.c index 7c81b8b65bb5..4ab5ea6b35fb 100644 --- a/arch/sh/drivers/pci/pci-st40.c +++ b/arch/sh/drivers/pci/pci-st40.c @@ -70,12 +70,6 @@ static void pci_set_rbar_region(unsigned int region, unsigned long localAddr, unsigned long pciOffset, unsigned long regionSize); -/* - * The pcibios_map_platform_irq function is defined in the appropriate - * board specific code and referenced here - */ -extern int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); - static __init void SetPCIPLL(void) { { @@ -422,13 +416,6 @@ struct pci_ops st40pci_config_ops = { /* Everything hangs off this */ static struct pci_bus *pci_root_bus; - -static u8 __init no_swizzle(struct pci_dev *dev, u8 * pin) -{ - return PCI_SLOT(dev->devfn); -} - - static int __init pcibios_init(void) { extern unsigned long memory_start, memory_end; @@ -465,17 +452,11 @@ static int __init pcibios_init(void) /* ok, do the scan man */ pci_root_bus = pci_scan_bus(0, &st40pci_config_ops, NULL); pci_assign_unassigned_resources(); - pci_fixup_irqs(no_swizzle, pcibios_map_platform_irq); return 0; } - subsys_initcall(pcibios_init); -void __init pcibios_fixup_bus(struct pci_bus *bus) -{ -} - /* * Publish a region of local address space over the PCI bus * to other devices. diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c index 285dffd12bd8..7377a8a8e161 100644 --- a/arch/sh/drivers/pci/pci.c +++ b/arch/sh/drivers/pci/pci.c @@ -21,6 +21,26 @@ #include #include +static inline u8 bridge_swizzle(u8 pin, u8 slot) +{ + return (((pin - 1) + slot) % 4) + 1; +} + +static u8 __init simple_swizzle(struct pci_dev *dev, u8 *pinp) +{ + u8 pin = *pinp; + + while (dev->bus->parent) { + pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn)); + /* Move up the chain of bridges. */ + dev = dev->bus->self; + } + *pinp = pin; + + /* The slot is the slot of the last bridge. */ + return PCI_SLOT(dev->devfn); +} + static int __init pcibios_init(void) { struct pci_channel *p; @@ -36,19 +56,26 @@ static int __init pcibios_init(void) /* scan the buses */ busno = 0; - for (p= board_pci_channels; p->pci_ops != NULL; p++) { + for (p = board_pci_channels; p->pci_ops != NULL; p++) { bus = pci_scan_bus(busno, p->pci_ops, p); - busno = bus->subordinate+1; + busno = bus->subordinate + 1; } - /* board-specific fixups */ - pcibios_fixup_irqs(); + pci_fixup_irqs(simple_swizzle, pcibios_map_platform_irq); return 0; } - subsys_initcall(pcibios_init); +/* + * Called after each bus is probed, but before its children + * are examined. + */ +void __init pcibios_fixup_bus(struct pci_bus *bus) +{ + pci_read_bridge_bases(bus); +} + void pcibios_update_resource(struct pci_dev *dev, struct resource *root, struct resource *res, int resource) @@ -192,11 +219,10 @@ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) return NULL; } +EXPORT_SYMBOL(pci_iomap); void pci_iounmap(struct pci_dev *dev, void __iomem *addr) { iounmap(addr); } - -EXPORT_SYMBOL(pci_iomap); EXPORT_SYMBOL(pci_iounmap); diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile index 3d5cafc71ae3..9611fab03b55 100644 --- a/arch/sh/kernel/cpu/sh4/Makefile +++ b/arch/sh/kernel/cpu/sh4/Makefile @@ -7,6 +7,9 @@ obj-y := ex.o probe.o obj-$(CONFIG_SH_FPU) += fpu.o obj-$(CONFIG_SH_STORE_QUEUES) += sq.o +# CPU subtype setup +obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o + # Primary on-chip clocks (common) clock-$(CONFIG_CPU_SH4) := clock-sh4.o clock-$(CONFIG_CPU_SUBTYPE_SH73180) := clock-sh73180.o diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7780.c b/arch/sh/kernel/cpu/sh4/setup-sh7780.c new file mode 100644 index 000000000000..72493f259edc --- /dev/null +++ b/arch/sh/kernel/cpu/sh4/setup-sh7780.c @@ -0,0 +1,79 @@ +/* + * SH7780 Setup + * + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +static struct resource rtc_resources[] = { + [0] = { + .start = 0xffe80000, + .end = 0xffe80000 + 0x58 - 1, + .flags = IORESOURCE_IO, + }, + [1] = { + /* Period IRQ */ + .start = 21, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* Carry IRQ */ + .start = 22, + .flags = IORESOURCE_IRQ, + }, + [3] = { + /* Alarm IRQ */ + .start = 23, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device rtc_device = { + .name = "sh-rtc", + .id = -1, + .num_resources = ARRAY_SIZE(rtc_resources), + .resource = rtc_resources, +}; + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xffe00000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 40, 41, 43, 42 }, + }, { + .mapbase = 0xffe10000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 76, 77, 79, 78 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct platform_device *sh7780_devices[] __initdata = { + &rtc_device, + &sci_device, +}; + +static int __init sh7780_devices_setup(void) +{ + return platform_add_devices(sh7780_devices, + ARRAY_SIZE(sh7780_devices)); +} +__initcall(sh7780_devices_setup); diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h index 894e64b2d5f0..27dba653cbe7 100644 --- a/include/asm-sh/io.h +++ b/include/asm-sh/io.h @@ -209,6 +209,11 @@ static inline void ctrl_outl(unsigned int b, unsigned long addr) *(volatile unsigned long*)addr = b; } +static inline void ctrl_delay(void) +{ + ctrl_inw(P2SEG); +} + #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h index 18a109de0f2e..6ccc948fe216 100644 --- a/include/asm-sh/pci.h +++ b/include/asm-sh/pci.h @@ -32,6 +32,34 @@ extern struct pci_channel board_pci_channels[]; #define PCIBIOS_MIN_IO board_pci_channels->io_resource->start #define PCIBIOS_MIN_MEM board_pci_channels->mem_resource->start +/* + * I/O routine helpers + */ +#ifdef CONFIG_CPU_SUBTYPE_SH7780 +#define PCI_IO_AREA 0xFE400000 +#define PCI_IO_SIZE 0x00400000 +#else +#define PCI_IO_AREA 0xFE240000 +#define PCI_IO_SIZE 0X00040000 +#endif + +#define PCI_MEM_SIZE 0x01000000 + +#define SH4_PCIIOBR_MASK 0xFFFC0000 +#define pci_ioaddr(addr) (PCI_IO_AREA + (addr & ~SH4_PCIIOBR_MASK)) + +#if defined(CONFIG_PCI) +#define is_pci_ioaddr(port) \ + (((port) >= PCIBIOS_MIN_IO) && \ + ((port) < (PCIBIOS_MIN_IO + PCI_IO_SIZE))) +#define is_pci_memaddr(port) \ + (((port) >= PCIBIOS_MIN_MEM) && \ + ((port) < (PCIBIOS_MIN_MEM + PCI_MEM_SIZE))) +#else +#define is_pci_ioaddr(port) (0) +#define is_pci_memaddr(port) (0) +#endif + struct pci_dev; extern void pcibios_set_master(struct pci_dev *dev); @@ -98,11 +126,12 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, #endif /* Board-specific fixup routines. */ -extern void pcibios_fixup(void); -extern void pcibios_fixup_irqs(void); +void pcibios_fixup(void); +int pcibios_init_platform(void); +int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); #ifdef CONFIG_PCI_AUTO -extern int pciauto_assign_resources(int busno, struct pci_channel *hose); +int pciauto_assign_resources(int busno, struct pci_channel *hose); #endif static inline void pcibios_add_platform_entries(struct pci_dev *dev) -- cgit v1.2.3 From 0f08f338083cc1d68788ccbccc44bd0502fc57ae Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:03:56 +0900 Subject: sh: More cosmetic cleanups and trivial fixes. Nothing exciting here, just trivial fixes.. Signed-off-by: Paul Mundt --- arch/sh/drivers/dma/dma-sh.c | 10 ++++++---- arch/sh/drivers/pci/ops-titan.c | 1 + arch/sh/kernel/setup.c | 2 +- arch/sh/kernel/sh_ksyms.c | 15 --------------- arch/sh/mm/cache-sh7705.c | 19 ++++++------------- arch/sh/mm/fault.c | 13 ++++++++----- arch/sh/mm/pmb.c | 4 ---- include/asm-sh/dma.h | 1 + include/asm-sh/irq.h | 5 +++++ include/asm-sh/kexec.h | 2 ++ include/asm-sh/system.h | 36 +++++------------------------------- 11 files changed, 35 insertions(+), 73 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c index 40a480d20aaf..cbbe8bce3d67 100644 --- a/arch/sh/drivers/dma/dma-sh.c +++ b/arch/sh/drivers/dma/dma-sh.c @@ -80,21 +80,23 @@ static irqreturn_t dma_tei(int irq, void *dev_id, struct pt_regs *regs) static int sh_dmac_request_dma(struct dma_channel *chan) { - char name[32]; - if (unlikely(!chan->flags & DMA_TEI_CAPABLE)) return 0; - snprintf(name, sizeof(name), "DMAC Transfer End (Channel %d)", + chan->name = kzalloc(32, GFP_KERNEL); + if (unlikely(chan->name == NULL)) + return -ENOMEM; + snprintf(chan->name, 32, "DMAC Transfer End (Channel %d)", chan->chan); return request_irq(get_dmte_irq(chan->chan), dma_tei, - IRQF_DISABLED, name, chan); + IRQF_DISABLED, chan->name, chan); } static void sh_dmac_free_dma(struct dma_channel *chan) { free_irq(get_dmte_irq(chan->chan), chan); + kfree(chan->name); } static void diff --git a/arch/sh/drivers/pci/ops-titan.c b/arch/sh/drivers/pci/ops-titan.c index 9c8b2027c35d..c6097bcd97fd 100644 --- a/arch/sh/drivers/pci/ops-titan.c +++ b/arch/sh/drivers/pci/ops-titan.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include "pci-sh4.h" diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index cff8d36f91b0..4afdec071700 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -507,7 +507,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) * unified cache on the SH-2 and SH-3, as well as the harvard * style cache on the SH-4. */ - if (test_bit(SH_CACHE_COMBINED, &(boot_cpu_data.icache.flags))) { + if (boot_cpu_data.icache.flags & SH_CACHE_COMBINED) { seq_printf(m, "unified\n"); show_cacheinfo(m, "cache", boot_cpu_data.icache); } else { diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms.c index fd73ab0326e9..7f3a42244cab 100644 --- a/arch/sh/kernel/sh_ksyms.c +++ b/arch/sh/kernel/sh_ksyms.c @@ -27,20 +27,11 @@ EXPORT_SYMBOL(sh_mv); /* platform dependent support */ EXPORT_SYMBOL(dump_fpu); -EXPORT_SYMBOL(enable_irq); -EXPORT_SYMBOL(disable_irq); -EXPORT_SYMBOL(probe_irq_mask); EXPORT_SYMBOL(kernel_thread); -EXPORT_SYMBOL(disable_irq_nosync); EXPORT_SYMBOL(irq_desc); EXPORT_SYMBOL(no_irq_type); -EXPORT_SYMBOL(strstr); EXPORT_SYMBOL(strlen); -EXPORT_SYMBOL(strnlen); -EXPORT_SYMBOL(strchr); -EXPORT_SYMBOL(strcat); -EXPORT_SYMBOL(strncat); /* PCI exports */ #ifdef CONFIG_PCI @@ -51,13 +42,8 @@ EXPORT_SYMBOL(pci_free_consistent); /* mem exports */ EXPORT_SYMBOL(memchr); EXPORT_SYMBOL(memcpy); -EXPORT_SYMBOL(memcpy_fromio); -EXPORT_SYMBOL(memcpy_toio); EXPORT_SYMBOL(memset); -EXPORT_SYMBOL(memset_io); EXPORT_SYMBOL(memmove); -EXPORT_SYMBOL(memcmp); -EXPORT_SYMBOL(memscan); EXPORT_SYMBOL(__copy_user); EXPORT_SYMBOL(boot_cpu_data); @@ -124,5 +110,4 @@ EXPORT_SYMBOL(csum_partial); #ifdef CONFIG_IPV6 EXPORT_SYMBOL(csum_ipv6_magic); #endif -EXPORT_SYMBOL(consistent_sync); EXPORT_SYMBOL(clear_page); diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c index bf94eedb0a8e..045abdf078f5 100644 --- a/arch/sh/mm/cache-sh7705.c +++ b/arch/sh/mm/cache-sh7705.c @@ -9,7 +9,6 @@ * for more details. * */ - #include #include #include @@ -25,14 +24,10 @@ #include #include -/* The 32KB cache on the SH7705 suffers from the same synonym problem - * as SH4 CPUs */ - -#define __pte_offset(address) \ - ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) -#define pte_offset(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \ - __pte_offset(address)) - +/* + * The 32KB cache on the SH7705 suffers from the same synonym problem + * as SH4 CPUs + */ static inline void cache_wback_all(void) { unsigned long ways, waysize, addrstart; @@ -73,7 +68,6 @@ void flush_icache_range(unsigned long start, unsigned long end) __flush_wback_region((void *)start, end - start); } - /* * Writeback&Invalidate the D-cache of the page */ @@ -128,7 +122,6 @@ static void __flush_dcache_page(unsigned long phys) local_irq_restore(flags); } - /* * Write back & invalidate the D-cache of the page. * (To avoid "alias" issues) @@ -186,7 +179,8 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, * * ADDRESS: Virtual Address (U0 address) */ -void flush_cache_page(struct vm_area_struct *vma, unsigned long address, unsigned long pfn) +void flush_cache_page(struct vm_area_struct *vma, unsigned long address, + unsigned long pfn) { __flush_dcache_page(pfn << PAGE_SHIFT); } @@ -203,4 +197,3 @@ void flush_icache_page(struct vm_area_struct *vma, struct page *page) { __flush_purge_region(page_address(page), PAGE_SIZE); } - diff --git a/arch/sh/mm/fault.c b/arch/sh/mm/fault.c index dc461d2bc183..c69fd603226a 100644 --- a/arch/sh/mm/fault.c +++ b/arch/sh/mm/fault.c @@ -13,6 +13,8 @@ */ #include #include +#include +#include #include #include #include @@ -188,15 +190,16 @@ do_sigbus: /* * Called with interrupts disabled. */ -asmlinkage int __do_page_fault(struct pt_regs *regs, unsigned long writeaccess, - unsigned long address) +asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs, + unsigned long writeaccess, + unsigned long address) { pgd_t *pgd; pud_t *pud; pmd_t *pmd; pte_t *pte; pte_t entry; - struct mm_struct *mm; + struct mm_struct *mm = current->mm; spinlock_t *ptl; int ret = 1; @@ -214,10 +217,10 @@ asmlinkage int __do_page_fault(struct pt_regs *regs, unsigned long writeaccess, pgd = pgd_offset_k(address); mm = NULL; } else { - if (unlikely(address >= TASK_SIZE || !(mm = current->mm))) + if (unlikely(address >= TASK_SIZE || !mm)) return 1; - pgd = pgd_offset(current->mm, address); + pgd = pgd_offset(mm, address); } pud = pud_offset(pgd, address); diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c index 819fd0faf022..92e745341e4d 100644 --- a/arch/sh/mm/pmb.c +++ b/arch/sh/mm/pmb.c @@ -337,10 +337,8 @@ static int __init pmb_init(void) return 0; } - arch_initcall(pmb_init); -#ifdef CONFIG_DEBUG_FS static int pmb_seq_show(struct seq_file *file, void *iter) { int i; @@ -399,6 +397,4 @@ static int __init pmb_debugfs_init(void) return 0; } - postcore_initcall(pmb_debugfs_init); -#endif diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h index e62a6d0ed932..d9daa028689f 100644 --- a/include/asm-sh/dma.h +++ b/include/asm-sh/dma.h @@ -89,6 +89,7 @@ struct dma_channel { wait_queue_head_t wait_queue; struct sys_device dev; + char *name; }; struct dma_info { diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index 7e8455b1cb44..648102e9236f 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -334,6 +334,11 @@ extern void enable_irq(unsigned int); extern void make_maskreg_irq(unsigned int irq); extern unsigned short *irq_mask_register; +/* + * PINT IRQs + */ +void init_IRQ_pint(void); + /* * Function for "on chip support modules". */ diff --git a/include/asm-sh/kexec.h b/include/asm-sh/kexec.h index 9dfe59f6fcb5..a5f85e9e428d 100644 --- a/include/asm-sh/kexec.h +++ b/include/asm-sh/kexec.h @@ -23,6 +23,8 @@ /* The native architecture */ #define KEXEC_ARCH KEXEC_ARCH_SH +#define MAX_NOTE_BYTES 1024 + #ifndef __ASSEMBLY__ extern void machine_shutdown(void); diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index 477422afeb0d..6c1f8fde5ac4 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -79,7 +79,7 @@ static inline void sched_cacheflush(void) } #endif -static __inline__ unsigned long tas(volatile int *m) +static inline unsigned long tas(volatile int *m) { unsigned long retval; @@ -161,7 +161,7 @@ static inline void local_irq_enable(void) } #endif -static __inline__ void local_irq_disable(void) +static inline void local_irq_disable(void) { unsigned long __dummy; __asm__ __volatile__("stc sr, %0\n\t" @@ -172,7 +172,7 @@ static __inline__ void local_irq_disable(void) : "memory"); } -static __inline__ void set_bl_bit(void) +static inline void set_bl_bit(void) { unsigned long __dummy0, __dummy1; @@ -185,7 +185,7 @@ static __inline__ void set_bl_bit(void) : "memory"); } -static __inline__ void clear_bl_bit(void) +static inline void clear_bl_bit(void) { unsigned long __dummy0, __dummy1; @@ -207,7 +207,7 @@ static __inline__ void clear_bl_bit(void) (flags != 0); \ }) -static __inline__ unsigned long local_irq_save(void) +static inline unsigned long local_irq_save(void) { unsigned long flags, __dummy; @@ -223,36 +223,10 @@ static __inline__ unsigned long local_irq_save(void) return flags; } -#ifdef DEBUG_CLI_STI -static __inline__ void local_irq_restore(unsigned long x) -{ - if ((x & 0x000000f0) != 0x000000f0) - local_irq_enable(); - else { - unsigned long flags; - local_save_flags(flags); - - if (flags == 0) { - extern void dump_stack(void); - printk(KERN_ERR "BUG!\n"); - dump_stack(); - local_irq_disable(); - } - } -} -#else #define local_irq_restore(x) do { \ if ((x & 0x000000f0) != 0x000000f0) \ local_irq_enable(); \ } while (0) -#endif - -#define really_restore_flags(x) do { \ - if ((x & 0x000000f0) != 0x000000f0) \ - local_irq_enable(); \ - else \ - local_irq_disable(); \ -} while (0) /* * Jump to P2 area. -- cgit v1.2.3 From 2991be725260d6fec11691a6138b9d71de949956 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:07:07 +0900 Subject: sh: Fixup __strnlen_user() behaviour. Drop TIF_USERSPACE and add addr_limit to the thread_info struct. Subsequently, use that for address checking in strnlen_user() to ward off bogus -EFAULTs. Make __strnlen_user() return 0 on exception, rather than -EFAULT. Signed-off-by: Paul Mundt --- arch/sh/kernel/process.c | 3 ++ include/asm-sh/processor.h | 4 +++ include/asm-sh/thread_info.h | 4 +-- include/asm-sh/uaccess.h | 65 +++++++++----------------------------------- 4 files changed, 22 insertions(+), 54 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c index f2031314cb2b..4a32550fd7c6 100644 --- a/arch/sh/kernel/process.c +++ b/arch/sh/kernel/process.c @@ -263,6 +263,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp, unsigned long unused, struct task_struct *p, struct pt_regs *regs) { + struct thread_info *ti = task_thread_info(p); struct pt_regs *childregs; #if defined(CONFIG_SH_FPU) struct task_struct *tsk = current; @@ -277,8 +278,10 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp, if (user_mode(regs)) { childregs->regs[15] = usp; + ti->addr_limit = USER_DS; } else { childregs->regs[15] = (unsigned long)task_stack_page(p) + THREAD_SIZE; + ti->addr_limit = KERNEL_DS; } if (clone_flags & CLONE_SETTLS) { childregs->gbr = childregs->regs[0]; diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index e99aff706cf7..a22732007dd4 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -149,6 +149,10 @@ struct thread_struct { union sh_fpu_union fpu; }; +typedef struct { + unsigned long seg; +} mm_segment_t; + /* Count of active tasks with UBC settings */ extern int ubc_usercnt; diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h index f64dd803a014..b986a1914472 100644 --- a/include/asm-sh/thread_info.h +++ b/include/asm-sh/thread_info.h @@ -21,6 +21,7 @@ struct thread_info { unsigned long flags; /* low level flags */ __u32 cpu; int preempt_count; /* 0 => preemptable, <0 => BUG */ + mm_segment_t addr_limit; /* thread address space */ struct restart_block restart_block; __u8 supervisor_stack[0]; }; @@ -40,6 +41,7 @@ struct thread_info { .flags = 0, \ .cpu = 0, \ .preempt_count = 1, \ + .addr_limit = KERNEL_DS, \ .restart_block = { \ .fn = do_no_restart_syscall, \ }, \ @@ -95,7 +97,6 @@ static inline struct thread_info *current_thread_info(void) #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ #define TIF_MEMDIE 18 -#define TIF_USERSPACE 31 /* true if FS sets userspace */ #define _TIF_SYSCALL_TRACE (1< #include -/* - * NOTE: Macro/functions in this file depends on threads_info.h implementation. - * Assumes: - * TI_FLAGS == 8 - * TIF_USERSPACE == 31 - * USER_ADDR_LIMIT == 0x80000000 - */ - #define VERIFY_READ 0 #define VERIFY_WRITE 1 -typedef struct { - unsigned int is_user_space; -} mm_segment_t; - /* * The fs value determines whether argument validity checking should be * performed or not. If get_fs() == USER_DS, checking is performed, with @@ -40,12 +28,14 @@ typedef struct { */ #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) -#define segment_eq(a,b) ((a).is_user_space == (b).is_user_space) -#define USER_ADDR_LIMIT 0x80000000 +#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFFUL) +#define USER_DS MAKE_MM_SEG(PAGE_OFFSET) + +#define segment_eq(a,b) ((a).seg == (b).seg) -#define KERNEL_DS MAKE_MM_SEG(0) -#define USER_DS MAKE_MM_SEG(1) +#define __addr_ok(addr) \ + ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg)) #define get_ds() (KERNEL_DS) @@ -76,31 +66,8 @@ static inline int __access_ok(unsigned long addr, unsigned long size) return ((addr >= memory_start) && ((addr + size) < memory_end)); } #else /* CONFIG_MMU */ -static inline mm_segment_t get_fs(void) -{ - return MAKE_MM_SEG(test_thread_flag(TIF_USERSPACE)); -} - -static inline void set_fs(mm_segment_t s) -{ - unsigned long ti, flag; - __asm__ __volatile__( - "stc r7_bank, %0\n\t" - "mov.l @(8,%0), %1\n\t" - "shal %1\n\t" - "cmp/pl %2\n\t" - "rotcr %1\n\t" - "mov.l %1, @(8,%0)" - : "=&r" (ti), "=&r" (flag) - : "r" (s.is_user_space) - : "t"); -/**** - if (s.is_user_space) - set_thread_flag(TIF_USERSPACE); - else - clear_thread_flag(TIF_USERSPACE); -****/ -} +#define get_fs() (current_thread_info()->addr_limit) +#define set_fs(x) (current_thread_info()->addr_limit = (x)) /* * __access_ok: Check if address with size is OK or not. @@ -108,7 +75,7 @@ static inline void set_fs(mm_segment_t s) * We do three checks: * (1) is it user space? * (2) addr + size --> carry? - * (3) addr + size >= 0x80000000 (USER_ADDR_LIMIT) + * (3) addr + size >= 0x80000000 (PAGE_OFFSET) * * (1) (2) (3) | RESULT * 0 0 0 | ok @@ -541,7 +508,7 @@ static __inline__ long __strnlen_user(const char __user *__s, long __n) "3:\n\t" "mov.l 4f, %1\n\t" "jmp @%1\n\t" - " mov %5, %0\n" + " mov #0, %0\n" ".balign 4\n" "4: .long 2b\n" ".previous\n" @@ -550,26 +517,20 @@ static __inline__ long __strnlen_user(const char __user *__s, long __n) " .long 1b,3b\n" ".previous" : "=z" (res), "=&r" (__dummy) - : "0" (0), "r" (__s), "r" (__n), "i" (-EFAULT) + : "0" (0), "r" (__s), "r" (__n) : "t"); return res; } static __inline__ long strnlen_user(const char __user *s, long n) { - if (!access_ok(VERIFY_READ, s, n)) + if (!__addr_ok(s)) return 0; else return __strnlen_user(s, n); } -static __inline__ long strlen_user(const char __user *s) -{ - if (!access_ok(VERIFY_READ, s, 0)) - return 0; - else - return __strnlen_user(s, ~0UL >> 1); -} +#define strlen_user(str) strnlen_user(str, ~0UL >> 1) /* * The exception table consists of pairs of addresses: the first is the -- cgit v1.2.3 From af514ca7d27b31e3c278e1331f0ebdb3ad385a90 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:11:32 +0900 Subject: sh: Rename rtc_get/set_time() to avoid RTC_CLASS conflict. We have a clash with RTC_CLASS over these names, so we change them.. Signed-off-by: Paul Mundt --- arch/sh/boards/dreamcast/rtc.c | 4 ++-- arch/sh/boards/landisk/rtc.c | 17 ++++------------- arch/sh/boards/mpc1211/rtc.c | 4 ++-- arch/sh/boards/sh03/rtc.c | 9 ++++----- arch/sh/boards/snapgear/rtc.c | 8 ++++---- arch/sh/kernel/time.c | 14 +++++++------- arch/sh/kernel/timers/timer-tmu.c | 6 +++--- include/asm-sh/rtc.h | 4 ++-- 8 files changed, 28 insertions(+), 38 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/boards/dreamcast/rtc.c b/arch/sh/boards/dreamcast/rtc.c index 44420494dc22..b3a876a3b859 100644 --- a/arch/sh/boards/dreamcast/rtc.c +++ b/arch/sh/boards/dreamcast/rtc.c @@ -75,7 +75,7 @@ int aica_rtc_settimeofday(const time_t secs) void aica_time_init(void) { - rtc_get_time = aica_rtc_gettimeofday; - rtc_set_time = aica_rtc_settimeofday; + rtc_sh_get_time = aica_rtc_gettimeofday; + rtc_sh_set_time = aica_rtc_settimeofday; } diff --git a/arch/sh/boards/landisk/rtc.c b/arch/sh/boards/landisk/rtc.c index d666aa63303f..35ba726a0979 100644 --- a/arch/sh/boards/landisk/rtc.c +++ b/arch/sh/boards/landisk/rtc.c @@ -16,17 +16,9 @@ #include #include #include +#include +#include -#ifndef BCD_TO_BIN -#define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10) -#endif - -#ifndef BIN_TO_BCD -#define BIN_TO_BCD(val) ((val)=(((val)/10)<<4) + (val)%10) -#endif - -extern void (*rtc_get_time) (struct timespec *); -extern int (*rtc_set_time) (const time_t); extern spinlock_t rtc_lock; extern void @@ -94,9 +86,8 @@ int landisk_rtc_settimeofday(const time_t secs) return retval; } - void landisk_time_init(void) { - rtc_get_time = landisk_rtc_gettimeofday; - rtc_set_time = landisk_rtc_settimeofday; + rtc_sh_get_time = landisk_rtc_gettimeofday; + rtc_sh_set_time = landisk_rtc_settimeofday; } diff --git a/arch/sh/boards/mpc1211/rtc.c b/arch/sh/boards/mpc1211/rtc.c index a76c655dceee..03b123a4bba4 100644 --- a/arch/sh/boards/mpc1211/rtc.c +++ b/arch/sh/boards/mpc1211/rtc.c @@ -130,7 +130,7 @@ int mpc1211_rtc_settimeofday(const struct timeval *tv) void mpc1211_time_init(void) { - rtc_get_time = mpc1211_rtc_gettimeofday; - rtc_set_time = mpc1211_rtc_settimeofday; + rtc_sh_get_time = mpc1211_rtc_gettimeofday; + rtc_sh_set_time = mpc1211_rtc_settimeofday; } diff --git a/arch/sh/boards/sh03/rtc.c b/arch/sh/boards/sh03/rtc.c index d609863cfe53..0a9266bb51c5 100644 --- a/arch/sh/boards/sh03/rtc.c +++ b/arch/sh/boards/sh03/rtc.c @@ -10,9 +10,10 @@ #include #include #include -#include #include #include +#include +#include #define RTC_BASE 0xb0000000 #define RTC_SEC1 (RTC_BASE + 0) @@ -34,8 +35,6 @@ #define RTC_BUSY 1 #define RTC_STOP 2 -extern void (*rtc_get_time)(struct timespec *); -extern int (*rtc_set_time)(const time_t); extern spinlock_t rtc_lock; unsigned long get_cmos_time(void) @@ -128,6 +127,6 @@ int sh03_rtc_settimeofday(const time_t secs) void sh03_time_init(void) { - rtc_get_time = sh03_rtc_gettimeofday; - rtc_set_time = sh03_rtc_settimeofday; + rtc_sh_get_time = sh03_rtc_gettimeofday; + rtc_sh_set_time = sh03_rtc_settimeofday; } diff --git a/arch/sh/boards/snapgear/rtc.c b/arch/sh/boards/snapgear/rtc.c index 287bc4ed3ac7..722479deb55a 100644 --- a/arch/sh/boards/snapgear/rtc.c +++ b/arch/sh/boards/snapgear/rtc.c @@ -165,11 +165,11 @@ void __init secureedge5410_rtc_init(void) } if (use_ds1302) { - rtc_get_time = snapgear_rtc_gettimeofday; - rtc_set_time = snapgear_rtc_settimeofday; + rtc_sh_get_time = snapgear_rtc_gettimeofday; + rtc_sh_set_time = snapgear_rtc_settimeofday; } else { - rtc_get_time = sh_rtc_gettimeofday; - rtc_set_time = sh_rtc_settimeofday; + rtc_sh_get_time = sh_rtc_gettimeofday; + rtc_sh_set_time = sh_rtc_settimeofday; } printk("SnapGear RTC: using %s rtc.\n", use_ds1302 ? "ds1302" : "internal"); diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c index c8db6ca4f9d1..8acd70bffe76 100644 --- a/arch/sh/kernel/time.c +++ b/arch/sh/kernel/time.c @@ -29,11 +29,11 @@ EXPORT_SYMBOL(rtc_lock); /* XXX: Can we initialize this in a routine somewhere? Dreamcast doesn't want * these routines anywhere... */ #ifdef CONFIG_SH_RTC -void (*rtc_get_time)(struct timespec *) = sh_rtc_gettimeofday; -int (*rtc_set_time)(const time_t) = sh_rtc_settimeofday; +void (*rtc_sh_get_time)(struct timespec *) = sh_rtc_gettimeofday; +int (*rtc_sh_set_time)(const time_t) = sh_rtc_settimeofday; #else -void (*rtc_get_time)(struct timespec *); -int (*rtc_set_time)(const time_t); +void (*rtc_sh_get_time)(struct timespec *); +int (*rtc_sh_set_time)(const time_t); #endif /* @@ -135,7 +135,7 @@ void handle_timer_tick(struct pt_regs *regs) xtime.tv_sec > last_rtc_update + 660 && (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) { - if (rtc_set_time(xtime.tv_sec) == 0) + if (rtc_sh_set_time(xtime.tv_sec) == 0) last_rtc_update = xtime.tv_sec; else /* do it again in 60s */ @@ -193,8 +193,8 @@ void __init time_init(void) clk_init(); - if (rtc_get_time) { - rtc_get_time(&xtime); + if (rtc_sh_get_time) { + rtc_sh_get_time(&xtime); } else { xtime.tv_sec = mktime(2000, 1, 1, 0, 0, 0); xtime.tv_nsec = 0; diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c index ea4bdf8cdf0d..205816fcf0da 100644 --- a/arch/sh/kernel/timers/timer-tmu.c +++ b/arch/sh/kernel/timers/timer-tmu.c @@ -132,17 +132,17 @@ static unsigned long tmu_timer_get_frequency(void) ctrl_outl(0xffffffff, TMU0_TCOR); ctrl_outl(0xffffffff, TMU0_TCNT); - rtc_get_time(&ts2); + rtc_sh_get_time(&ts2); do { - rtc_get_time(&ts1); + rtc_sh_get_time(&ts1); } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec); /* actually start the timer */ ctrl_outb(TMU_TSTR_INIT, TMU_TSTR); do { - rtc_get_time(&ts2); + rtc_sh_get_time(&ts2); } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec); freq = 0xffffffff - ctrl_inl(TMU0_TCNT); diff --git a/include/asm-sh/rtc.h b/include/asm-sh/rtc.h index cea9cdf9b925..4c7be859c9c0 100644 --- a/include/asm-sh/rtc.h +++ b/include/asm-sh/rtc.h @@ -8,8 +8,8 @@ extern void sh_rtc_gettimeofday(struct timespec *ts); extern int sh_rtc_settimeofday(const time_t secs); extern void (*board_time_init)(void); -extern void (*rtc_get_time)(struct timespec *); -extern int (*rtc_set_time)(const time_t); +extern void (*rtc_sh_get_time)(struct timespec *); +extern int (*rtc_sh_set_time)(const time_t); /* RCR1 Bits */ #define RCR1_CF 0x80 /* Carry Flag */ -- cgit v1.2.3 From 4b565680d16300acab0ff167e24f0ea289a6bd5d Mon Sep 17 00:00:00 2001 From: Takashi YOSHII Date: Wed, 27 Sep 2006 17:15:32 +0900 Subject: sh: math-emu support This implements initial math-emu support, aimed primarily at SH-3. Signed-off-by: Takashi YOSHII Signed-off-by: Paul Mundt --- arch/sh/Kconfig | 9 + arch/sh/Makefile | 1 + arch/sh/kernel/traps.c | 164 +++++++++--- arch/sh/math-emu/Makefile | 1 + arch/sh/math-emu/math.c | 624 +++++++++++++++++++++++++++++++++++++++++++ arch/sh/math-emu/sfp-util.h | 72 +++++ include/asm-sh/sfp-machine.h | 86 ++++++ 7 files changed, 918 insertions(+), 39 deletions(-) create mode 100644 arch/sh/math-emu/Makefile create mode 100644 arch/sh/math-emu/math.c create mode 100644 arch/sh/math-emu/sfp-util.h create mode 100644 include/asm-sh/sfp-machine.h (limited to 'arch/sh/kernel') diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index d1d724447826..07d6d699e9c2 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -339,6 +339,15 @@ config SH_FPU This option must be set in order to enable the FPU. +config SH_FPU_EMU + bool "FPU emulation support" + depends on !SH_FPU && EXPERIMENTAL + default n + help + Selecting this option will enable support for software FPU emulation. + Most SH-3 users will want to say Y here, whereas most SH-4 users will + want to say N. + config SH_DSP bool "DSP support" depends on !CPU_SH4 diff --git a/arch/sh/Makefile b/arch/sh/Makefile index 859285d47a29..13b688b13e1c 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -79,6 +79,7 @@ head-y := arch/sh/kernel/head.o arch/sh/kernel/init_task.o LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) core-y += arch/sh/kernel/ arch/sh/mm/ +core-$(CONFIG_SH_FPU_EMU) += arch/sh/math-emu/ # Boards machdir-$(CONFIG_SH_SOLUTION_ENGINE) := se/770x diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c index 21bef1b5f991..95c810b3c97e 100644 --- a/arch/sh/kernel/traps.c +++ b/arch/sh/kernel/traps.c @@ -36,40 +36,15 @@ #ifdef CONFIG_SH_KGDB #include -#define CHK_REMOTE_DEBUG(regs) \ -{ \ - if ((kgdb_debug_hook != (kgdb_debug_hook_t *) NULL) && (!user_mode(regs))) \ - { \ - (*kgdb_debug_hook)(regs); \ - } \ +#define CHK_REMOTE_DEBUG(regs) \ +{ \ + if (kgdb_debug_hook && !user_mode(regs))\ + (*kgdb_debug_hook)(regs); \ } #else #define CHK_REMOTE_DEBUG(regs) #endif -#define DO_ERROR(trapnr, signr, str, name, tsk) \ -asmlinkage void do_##name(unsigned long r4, unsigned long r5, \ - unsigned long r6, unsigned long r7, \ - struct pt_regs regs) \ -{ \ - unsigned long error_code; \ - \ - /* Check if it's a DSP instruction */ \ - if (is_dsp_inst(®s)) { \ - /* Enable DSP mode, and restart instruction. */ \ - regs.sr |= SR_DSP; \ - return; \ - } \ - \ - asm volatile("stc r2_bank, %0": "=r" (error_code)); \ - local_irq_enable(); \ - tsk->thread.error_code = error_code; \ - tsk->thread.trap_no = trapnr; \ - CHK_REMOTE_DEBUG(®s); \ - force_sig(signr, tsk); \ - die_if_no_fixup(str,®s,error_code); \ -} - #ifdef CONFIG_CPU_SH2 #define TRAP_RESERVED_INST 4 #define TRAP_ILLEGAL_SLOT_INST 6 @@ -575,8 +550,117 @@ int is_dsp_inst(struct pt_regs *regs) #define is_dsp_inst(regs) (0) #endif /* CONFIG_SH_DSP */ -DO_ERROR(TRAP_RESERVED_INST, SIGILL, "reserved instruction", reserved_inst, current) -DO_ERROR(TRAP_ILLEGAL_SLOT_INST, SIGILL, "illegal slot instruction", illegal_slot_inst, current) +extern int do_fpu_inst(unsigned short, struct pt_regs*); + +asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs regs) +{ + unsigned long error_code; + struct task_struct *tsk = current; + +#ifdef CONFIG_SH_FPU_EMU + unsigned short inst; + int err; + + get_user(inst, (unsigned short*)regs.pc); + + err = do_fpu_inst(inst, ®s); + if (!err) { + regs.pc += 2; + return; + } + /* not a FPU inst. */ +#endif + +#ifdef CONFIG_SH_DSP + /* Check if it's a DSP instruction */ + if (is_dsp_inst(®s)) { + /* Enable DSP mode, and restart instruction. */ + regs.sr |= SR_DSP; + return; + } +#endif + + asm volatile("stc r2_bank, %0": "=r" (error_code)); + local_irq_enable(); + tsk->thread.error_code = error_code; + tsk->thread.trap_no = TRAP_RESERVED_INST; + CHK_REMOTE_DEBUG(®s); + force_sig(SIGILL, tsk); + die_if_no_fixup("reserved instruction", ®s, error_code); +} + +#ifdef CONFIG_SH_FPU_EMU +static int emulate_branch(unsigned short inst, struct pt_regs* regs) +{ + /* + * bfs: 8fxx: PC+=d*2+4; + * bts: 8dxx: PC+=d*2+4; + * bra: axxx: PC+=D*2+4; + * bsr: bxxx: PC+=D*2+4 after PR=PC+4; + * braf:0x23: PC+=Rn*2+4; + * bsrf:0x03: PC+=Rn*2+4 after PR=PC+4; + * jmp: 4x2b: PC=Rn; + * jsr: 4x0b: PC=Rn after PR=PC+4; + * rts: 000b: PC=PR; + */ + if ((inst & 0xfd00) == 0x8d00) { + regs->pc += SH_PC_8BIT_OFFSET(inst); + return 0; + } + + if ((inst & 0xe000) == 0xa000) { + regs->pc += SH_PC_12BIT_OFFSET(inst); + return 0; + } + + if ((inst & 0xf0df) == 0x0003) { + regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4; + return 0; + } + + if ((inst & 0xf0df) == 0x400b) { + regs->pc = regs->regs[(inst & 0x0f00) >> 8]; + return 0; + } + + if ((inst & 0xffff) == 0x000b) { + regs->pc = regs->pr; + return 0; + } + + return 1; +} +#endif + +asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs regs) +{ + unsigned long error_code; + struct task_struct *tsk = current; +#ifdef CONFIG_SH_FPU_EMU + unsigned short inst; + + get_user(inst, (unsigned short *)regs.pc + 1); + if (!do_fpu_inst(inst, ®s)) { + get_user(inst, (unsigned short *)regs.pc); + if (!emulate_branch(inst, ®s)) + return; + /* fault in branch.*/ + } + /* not a FPU inst. */ +#endif + + asm volatile("stc r2_bank, %0": "=r" (error_code)); + local_irq_enable(); + tsk->thread.error_code = error_code; + tsk->thread.trap_no = TRAP_RESERVED_INST; + CHK_REMOTE_DEBUG(®s); + force_sig(SIGILL, tsk); + die_if_no_fixup("illegal slot instruction", ®s, error_code); +} asmlinkage void do_exception_error(unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7, @@ -634,14 +718,16 @@ void __init trap_init(void) exception_handling_table[TRAP_ILLEGAL_SLOT_INST] = (void *)do_illegal_slot_inst; -#ifdef CONFIG_CPU_SH4 - if (!(cpu_data->flags & CPU_HAS_FPU)) { - /* For SH-4 lacking an FPU, treat floating point instructions - as reserved. */ - /* entry 64 corresponds to EXPEVT=0x800 */ - exception_handling_table[64] = (void *)do_reserved_inst; - exception_handling_table[65] = (void *)do_illegal_slot_inst; - } +#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_FPU) || \ + defined(CONFIG_SH_FPU_EMU) + /* + * For SH-4 lacking an FPU, treat floating point instructions as + * reserved. They'll be handled in the math-emu case, or faulted on + * otherwise. + */ + /* entry 64 corresponds to EXPEVT=0x800 */ + exception_handling_table[64] = (void *)do_reserved_inst; + exception_handling_table[65] = (void *)do_illegal_slot_inst; #endif /* Setup VBR for boot cpu */ diff --git a/arch/sh/math-emu/Makefile b/arch/sh/math-emu/Makefile new file mode 100644 index 000000000000..638b342c781a --- /dev/null +++ b/arch/sh/math-emu/Makefile @@ -0,0 +1 @@ +obj-y := math.o diff --git a/arch/sh/math-emu/math.c b/arch/sh/math-emu/math.c new file mode 100644 index 000000000000..26b6046814fd --- /dev/null +++ b/arch/sh/math-emu/math.c @@ -0,0 +1,624 @@ +/* + * arch/sh/math-emu/math.c + * + * Copyright (C) 2006 Takashi YOSHII + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "sfp-util.h" +#include +#include +#include + +#define FPUL (fregs->fpul) +#define FPSCR (fregs->fpscr) +#define FPSCR_RM (FPSCR&3) +#define FPSCR_DN ((FPSCR>>18)&1) +#define FPSCR_PR ((FPSCR>>19)&1) +#define FPSCR_SZ ((FPSCR>>20)&1) +#define FPSCR_FR ((FPSCR>>21)&1) +#define FPSCR_MASK 0x003fffffUL + +#define BANK(n) (n^(FPSCR_FR?16:0)) +#define FR ((unsigned long*)(fregs->fp_regs)) +#define FR0 (FR[BANK(0)]) +#define FRn (FR[BANK(n)]) +#define FRm (FR[BANK(m)]) +#define DR ((unsigned long long*)(fregs->fp_regs)) +#define DRn (DR[BANK(n)/2]) +#define DRm (DR[BANK(m)/2]) + +#define XREG(n) (n^16) +#define XFn (FR[BANK(XREG(n))]) +#define XFm (FR[BANK(XREG(m))]) +#define XDn (DR[BANK(XREG(n))/2]) +#define XDm (DR[BANK(XREG(m))/2]) + +#define R0 (regs->regs[0]) +#define Rn (regs->regs[n]) +#define Rm (regs->regs[m]) + +#define WRITE(d,a) ({if(put_user(d, (typeof (d)*)a)) return -EFAULT;}) +#define READ(d,a) ({if(get_user(d, (typeof (d)*)a)) return -EFAULT;}) + +#define PACK_S(r,f) FP_PACK_SP(&r,f) +#define UNPACK_S(f,r) FP_UNPACK_SP(f,&r) +#define PACK_D(r,f) \ + {u32 t[2]; FP_PACK_DP(t,f); ((u32*)&r)[0]=t[1]; ((u32*)&r)[1]=t[0];} +#define UNPACK_D(f,r) \ + {u32 t[2]; t[0]=((u32*)&r)[1]; t[1]=((u32*)&r)[0]; FP_UNPACK_DP(f,t);} + +// 2 args instructions. +#define BOTH_PRmn(op,x) \ + FP_DECL_EX; if(FPSCR_PR) op(D,x,DRm,DRn); else op(S,x,FRm,FRn); + +#define CMP_X(SZ,R,M,N) do{ \ + FP_DECL_##SZ(Fm); FP_DECL_##SZ(Fn); \ + UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \ + FP_CMP_##SZ(R, Fn, Fm, 2); }while(0) +#define EQ_X(SZ,R,M,N) do{ \ + FP_DECL_##SZ(Fm); FP_DECL_##SZ(Fn); \ + UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \ + FP_CMP_EQ_##SZ(R, Fn, Fm); }while(0) +#define CMP(OP) ({ int r; BOTH_PRmn(OP##_X,r); r; }) + +static int +fcmp_gt(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) +{ + if (CMP(CMP) > 0) + regs->sr |= 1; + else + regs->sr &= ~1; + + return 0; +} + +static int +fcmp_eq(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) +{ + if (CMP(CMP /*EQ*/) == 0) + regs->sr |= 1; + else + regs->sr &= ~1; + return 0; +} + +#define ARITH_X(SZ,OP,M,N) do{ \ + FP_DECL_##SZ(Fm); FP_DECL_##SZ(Fn); FP_DECL_##SZ(Fr); \ + UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \ + FP_##OP##_##SZ(Fr, Fn, Fm); \ + PACK_##SZ(N, Fr); }while(0) + +static int +fadd(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) +{ + BOTH_PRmn(ARITH_X, ADD); + return 0; +} + +static int +fsub(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) +{ + BOTH_PRmn(ARITH_X, SUB); + return 0; +} + +static int +fmul(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) +{ + BOTH_PRmn(ARITH_X, MUL); + return 0; +} + +static int +fdiv(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) +{ + BOTH_PRmn(ARITH_X, DIV); + return 0; +} + +static int +fmac(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) +{ + FP_DECL_EX; + FP_DECL_S(Fr); + FP_DECL_S(Ft); + FP_DECL_S(F0); + FP_DECL_S(Fm); + FP_DECL_S(Fn); + UNPACK_S(F0, FR0); + UNPACK_S(Fm, FRm); + UNPACK_S(Fn, FRn); + FP_MUL_S(Ft, Fm, F0); + FP_ADD_S(Fr, Fn, Ft); + PACK_S(FRn, Fr); + return 0; +} + +// to process fmov's extention (odd n for DR access XD). +#define FMOV_EXT(x) if(x&1) x+=16-1 + +static int +fmov_idx_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, + int n) +{ + if (FPSCR_SZ) { + FMOV_EXT(n); + READ(FRn, Rm + R0 + 4); + n++; + READ(FRn, Rm + R0); + } else { + READ(FRn, Rm + R0); + } + + return 0; +} + +static int +fmov_mem_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, + int n) +{ + if (FPSCR_SZ) { + FMOV_EXT(n); + READ(FRn, Rm + 4); + n++; + READ(FRn, Rm); + } else { + READ(FRn, Rm); + } + + return 0; +} + +static int +fmov_inc_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, + int n) +{ + if (FPSCR_SZ) { + FMOV_EXT(n); + READ(FRn, Rm + 4); + n++; + READ(FRn, Rm); + Rm += 8; + } else { + READ(FRn, Rm); + Rm += 4; + } + + return 0; +} + +static int +fmov_reg_idx(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, + int n) +{ + if (FPSCR_SZ) { + FMOV_EXT(m); + WRITE(FRm, Rn + R0 + 4); + m++; + WRITE(FRm, Rn + R0); + } else { + WRITE(FRm, Rn + R0); + } + + return 0; +} + +static int +fmov_reg_mem(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, + int n) +{ + if (FPSCR_SZ) { + FMOV_EXT(m); + WRITE(FRm, Rn + 4); + m++; + WRITE(FRm, Rn); + } else { + WRITE(FRm, Rn); + } + + return 0; +} + +static int +fmov_reg_dec(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, + int n) +{ + if (FPSCR_SZ) { + FMOV_EXT(m); + Rn -= 8; + WRITE(FRm, Rn + 4); + m++; + WRITE(FRm, Rn); + } else { + Rn -= 4; + WRITE(FRm, Rn); + } + + return 0; +} + +static int +fmov_reg_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, + int n) +{ + if (FPSCR_SZ) { + FMOV_EXT(m); + FMOV_EXT(n); + DRn = DRm; + } else { + FRn = FRm; + } + + return 0; +} + +static int +fnop_mn(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) +{ + return -EINVAL; +} + +// 1 arg instructions. +#define NOTYETn(i) static int i(struct sh_fpu_soft_struct *fregs, int n) \ + { printk( #i " not yet done.\n"); return 0; } + +NOTYETn(ftrv) +NOTYETn(fsqrt) +NOTYETn(fipr) +NOTYETn(fsca) +NOTYETn(fsrra) + +#define EMU_FLOAT_X(SZ,N) do { \ + FP_DECL_##SZ(Fn); \ + FP_FROM_INT_##SZ(Fn, FPUL, 32, int); \ + PACK_##SZ(N, Fn); }while(0) +static int ffloat(struct sh_fpu_soft_struct *fregs, int n) +{ + FP_DECL_EX; + + if (FPSCR_PR) + EMU_FLOAT_X(D, DRn); + else + EMU_FLOAT_X(S, FRn); + + return 0; +} + +#define EMU_FTRC_X(SZ,N) do { \ + FP_DECL_##SZ(Fn); \ + UNPACK_##SZ(Fn, N); \ + FP_TO_INT_##SZ(FPUL, Fn, 32, 1); }while(0) +static int ftrc(struct sh_fpu_soft_struct *fregs, int n) +{ + FP_DECL_EX; + + if (FPSCR_PR) + EMU_FTRC_X(D, DRn); + else + EMU_FTRC_X(S, FRn); + + return 0; +} + +static int fcnvsd(struct sh_fpu_soft_struct *fregs, int n) +{ + FP_DECL_EX; + FP_DECL_S(Fn); + FP_DECL_D(Fr); + UNPACK_S(Fn, FPUL); + FP_CONV(D, S, 2, 1, Fr, Fn); + PACK_D(DRn, Fr); + return 0; +} + +static int fcnvds(struct sh_fpu_soft_struct *fregs, int n) +{ + FP_DECL_EX; + FP_DECL_D(Fn); + FP_DECL_S(Fr); + UNPACK_D(Fn, DRn); + FP_CONV(S, D, 1, 2, Fr, Fn); + PACK_S(FPUL, Fr); + return 0; +} + +static int fxchg(struct sh_fpu_soft_struct *fregs, int flag) +{ + FPSCR ^= flag; + return 0; +} + +static int fsts(struct sh_fpu_soft_struct *fregs, int n) +{ + FRn = FPUL; + return 0; +} + +static int flds(struct sh_fpu_soft_struct *fregs, int n) +{ + FPUL = FRn; + return 0; +} + +static int fneg(struct sh_fpu_soft_struct *fregs, int n) +{ + FRn ^= (1 << (_FP_W_TYPE_SIZE - 1)); + return 0; +} + +static int fabs(struct sh_fpu_soft_struct *fregs, int n) +{ + FRn &= ~(1 << (_FP_W_TYPE_SIZE - 1)); + return 0; +} + +static int fld0(struct sh_fpu_soft_struct *fregs, int n) +{ + FRn = 0; + return 0; +} + +static int fld1(struct sh_fpu_soft_struct *fregs, int n) +{ + FRn = (_FP_EXPBIAS_S << (_FP_FRACBITS_S - 1)); + return 0; +} + +static int fnop_n(struct sh_fpu_soft_struct *fregs, int n) +{ + return -EINVAL; +} + +/// Instruction decoders. + +static int id_fxfd(struct sh_fpu_soft_struct *, int); +static int id_fnxd(struct sh_fpu_soft_struct *, struct pt_regs *, int, int); + +static int (*fnxd[])(struct sh_fpu_soft_struct *, int) = { + fsts, flds, ffloat, ftrc, fneg, fabs, fsqrt, fsrra, + fld0, fld1, fcnvsd, fcnvds, fnop_n, fnop_n, fipr, id_fxfd +}; + +static int (*fnmx[])(struct sh_fpu_soft_struct *, struct pt_regs *, int, int) = { + fadd, fsub, fmul, fdiv, fcmp_eq, fcmp_gt, fmov_idx_reg, fmov_reg_idx, + fmov_mem_reg, fmov_inc_reg, fmov_reg_mem, fmov_reg_dec, + fmov_reg_reg, id_fnxd, fmac, fnop_mn}; + +static int id_fxfd(struct sh_fpu_soft_struct *fregs, int x) +{ + const int flag[] = { FPSCR_SZ, FPSCR_PR, FPSCR_FR, 0 }; + switch (x & 3) { + case 3: + fxchg(fregs, flag[x >> 2]); + break; + case 1: + ftrv(fregs, x - 1); + break; + default: + fsca(fregs, x); + } + return 0; +} + +static int +id_fnxd(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int x, int n) +{ + return (fnxd[x])(fregs, n); +} + +static int +id_fnmx(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, u16 code) +{ + int n = (code >> 8) & 0xf, m = (code >> 4) & 0xf, x = code & 0xf; + return (fnmx[x])(fregs, regs, m, n); +} + +static int +id_sys(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, u16 code) +{ + int n = ((code >> 8) & 0xf); + unsigned long *reg = (code & 0x0010) ? &FPUL : &FPSCR; + + switch (code & 0xf0ff) { + case 0x005a: + case 0x006a: + Rn = *reg; + break; + case 0x405a: + case 0x406a: + *reg = Rn; + break; + case 0x4052: + case 0x4062: + Rn -= 4; + WRITE(*reg, Rn); + break; + case 0x4056: + case 0x4066: + READ(*reg, Rn); + Rn += 4; + break; + default: + return -EINVAL; + } + + return 0; +} + +static int fpu_emulate(u16 code, struct sh_fpu_soft_struct *fregs, struct pt_regs *regs) +{ + if ((code & 0xf000) == 0xf000) + return id_fnmx(fregs, regs, code); + else + return id_sys(fregs, regs, code); +} + +/** + * denormal_to_double - Given denormalized float number, + * store double float + * + * @fpu: Pointer to sh_fpu_hard structure + * @n: Index to FP register + */ +static void denormal_to_double(struct sh_fpu_hard_struct *fpu, int n) +{ + unsigned long du, dl; + unsigned long x = fpu->fpul; + int exp = 1023 - 126; + + if (x != 0 && (x & 0x7f800000) == 0) { + du = (x & 0x80000000); + while ((x & 0x00800000) == 0) { + x <<= 1; + exp--; + } + x &= 0x007fffff; + du |= (exp << 20) | (x >> 3); + dl = x << 29; + + fpu->fp_regs[n] = du; + fpu->fp_regs[n+1] = dl; + } +} + +/** + * ieee_fpe_handler - Handle denormalized number exception + * + * @regs: Pointer to register structure + * + * Returns 1 when it's handled (should not cause exception). + */ +static int ieee_fpe_handler(struct pt_regs *regs) +{ + unsigned short insn = *(unsigned short *)regs->pc; + unsigned short finsn; + unsigned long nextpc; + int nib[4] = { + (insn >> 12) & 0xf, + (insn >> 8) & 0xf, + (insn >> 4) & 0xf, + insn & 0xf}; + + if (nib[0] == 0xb || + (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */ + regs->pr = regs->pc + 4; + + if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */ + nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3); + finsn = *(unsigned short *) (regs->pc + 2); + } else if (nib[0] == 0x8 && nib[1] == 0xd) { /* bt/s */ + if (regs->sr & 1) + nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1); + else + nextpc = regs->pc + 4; + finsn = *(unsigned short *) (regs->pc + 2); + } else if (nib[0] == 0x8 && nib[1] == 0xf) { /* bf/s */ + if (regs->sr & 1) + nextpc = regs->pc + 4; + else + nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1); + finsn = *(unsigned short *) (regs->pc + 2); + } else if (nib[0] == 0x4 && nib[3] == 0xb && + (nib[2] == 0x0 || nib[2] == 0x2)) { /* jmp & jsr */ + nextpc = regs->regs[nib[1]]; + finsn = *(unsigned short *) (regs->pc + 2); + } else if (nib[0] == 0x0 && nib[3] == 0x3 && + (nib[2] == 0x0 || nib[2] == 0x2)) { /* braf & bsrf */ + nextpc = regs->pc + 4 + regs->regs[nib[1]]; + finsn = *(unsigned short *) (regs->pc + 2); + } else if (insn == 0x000b) { /* rts */ + nextpc = regs->pr; + finsn = *(unsigned short *) (regs->pc + 2); + } else { + nextpc = regs->pc + 2; + finsn = insn; + } + + if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ + struct task_struct *tsk = current; + + if ((tsk->thread.fpu.hard.fpscr & (1 << 17))) { + /* FPU error */ + denormal_to_double (&tsk->thread.fpu.hard, + (finsn >> 8) & 0xf); + tsk->thread.fpu.hard.fpscr &= + ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); + set_tsk_thread_flag(tsk, TIF_USEDFPU); + } else { + tsk->thread.trap_no = 11; + tsk->thread.error_code = 0; + force_sig(SIGFPE, tsk); + } + + regs->pc = nextpc; + return 1; + } + + return 0; +} + +asmlinkage void do_fpu_error(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs regs) +{ + struct task_struct *tsk = current; + + if (ieee_fpe_handler (®s)) + return; + + regs.pc += 2; + tsk->thread.trap_no = 11; + tsk->thread.error_code = 0; + force_sig(SIGFPE, tsk); +} + +/** + * fpu_init - Initialize FPU registers + * @fpu: Pointer to software emulated FPU registers. + */ +static void fpu_init(struct sh_fpu_soft_struct *fpu) +{ + int i; + + fpu->fpscr = FPSCR_INIT; + fpu->fpul = 0; + + for (i = 0; i < 16; i++) { + fpu->fp_regs[i] = 0; + fpu->xfp_regs[i]= 0; + } +} + +/** + * do_fpu_inst - Handle reserved instructions for FPU emulation + * @inst: instruction code. + * @regs: registers on stack. + */ +int do_fpu_inst(unsigned short inst, struct pt_regs *regs) +{ + struct task_struct *tsk = current; + struct sh_fpu_soft_struct *fpu = &(tsk->thread.fpu.soft); + + if (!test_tsk_thread_flag(tsk, TIF_USEDFPU)) { + /* initialize once. */ + fpu_init(fpu); + set_tsk_thread_flag(tsk, TIF_USEDFPU); + } + + return fpu_emulate(inst, fpu, regs); +} diff --git a/arch/sh/math-emu/sfp-util.h b/arch/sh/math-emu/sfp-util.h new file mode 100644 index 000000000000..8ae1bd310ad0 --- /dev/null +++ b/arch/sh/math-emu/sfp-util.h @@ -0,0 +1,72 @@ +/* + * These are copied from glibc/stdlib/longlong.h + */ + +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + do { \ + UWtype __x; \ + __x = (al) + (bl); \ + (sh) = (ah) + (bh) + (__x < (al)); \ + (sl) = __x; \ + } while (0) + +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + do { \ + UWtype __x; \ + __x = (al) - (bl); \ + (sh) = (ah) - (bh) - (__x > (al)); \ + (sl) = __x; \ + } while (0) + +#define umul_ppmm(w1, w0, u, v) \ + __asm__ ("dmulu.l %2,%3\n\tsts macl,%1\n\tsts mach,%0" \ + : "=r" ((u32)(w1)), "=r" ((u32)(w0)) \ + : "r" ((u32)(u)), "r" ((u32)(v)) \ + : "macl", "mach") + +#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2)) +#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1)) +#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2)) + +#define udiv_qrnnd(q, r, n1, n0, d) \ + do { \ + UWtype __d1, __d0, __q1, __q0; \ + UWtype __r1, __r0, __m; \ + __d1 = __ll_highpart (d); \ + __d0 = __ll_lowpart (d); \ + \ + __r1 = (n1) % __d1; \ + __q1 = (n1) / __d1; \ + __m = (UWtype) __q1 * __d0; \ + __r1 = __r1 * __ll_B | __ll_highpart (n0); \ + if (__r1 < __m) \ + { \ + __q1--, __r1 += (d); \ + if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\ + if (__r1 < __m) \ + __q1--, __r1 += (d); \ + } \ + __r1 -= __m; \ + \ + __r0 = __r1 % __d1; \ + __q0 = __r1 / __d1; \ + __m = (UWtype) __q0 * __d0; \ + __r0 = __r0 * __ll_B | __ll_lowpart (n0); \ + if (__r0 < __m) \ + { \ + __q0--, __r0 += (d); \ + if (__r0 >= (d)) \ + if (__r0 < __m) \ + __q0--, __r0 += (d); \ + } \ + __r0 -= __m; \ + \ + (q) = (UWtype) __q1 * __ll_B | __q0; \ + (r) = __r0; \ + } while (0) + +#define abort() return 0 + +#define __BYTE_ORDER __LITTLE_ENDIAN + + diff --git a/include/asm-sh/sfp-machine.h b/include/asm-sh/sfp-machine.h new file mode 100644 index 000000000000..8a6399a8cfe0 --- /dev/null +++ b/include/asm-sh/sfp-machine.h @@ -0,0 +1,86 @@ +/* Machine-dependent software floating-point definitions. + SuperH kernel version. + Copyright (C) 1997,1998,1999 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Richard Henderson (rth@cygnus.com), + Jakub Jelinek (jj@ultra.linux.cz), + David S. Miller (davem@redhat.com) and + Peter Maydell (pmaydell@chiark.greenend.org.uk). + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public License as + published by the Free Software Foundation; either version 2 of the + License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with the GNU C Library; see the file COPYING.LIB. If + not, write to the Free Software Foundation, Inc., + 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef _SFP_MACHINE_H +#define _SFP_MACHINE_H + +#include + +#define _FP_W_TYPE_SIZE 32 +#define _FP_W_TYPE unsigned long +#define _FP_WS_TYPE signed long +#define _FP_I_TYPE long + +#define _FP_MUL_MEAT_S(R,X,Y) \ + _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) +#define _FP_MUL_MEAT_D(R,X,Y) \ + _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) +#define _FP_MUL_MEAT_Q(R,X,Y) \ + _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) + +#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y) +#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) +#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) + +#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) +#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1 +#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1 +#define _FP_NANSIGN_S 0 +#define _FP_NANSIGN_D 0 +#define _FP_NANSIGN_Q 0 + +#define _FP_KEEPNANFRACP 1 + +/* + * If one NaN is signaling and the other is not, + * we choose that one, otherwise we choose X. + */ +#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ + do { \ + if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \ + && !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \ + { \ + R##_s = Y##_s; \ + _FP_FRAC_COPY_##wc(R,Y); \ + } \ + else \ + { \ + R##_s = X##_s; \ + _FP_FRAC_COPY_##wc(R,X); \ + } \ + R##_c = FP_CLS_NAN; \ + } while (0) + +//#define FP_ROUNDMODE FPSCR_RM +#define FP_DENORM_ZERO 1/*FPSCR_DN*/ + +/* Exception flags. */ +#define FP_EX_INVALID (1<<4) +#define FP_EX_DIVZERO (1<<3) +#define FP_EX_OVERFLOW (1<<2) +#define FP_EX_UNDERFLOW (1<<1) +#define FP_EX_INEXACT (1<<0) + +#endif + -- cgit v1.2.3 From e7f93a355c7e32c26eab8910cf53b7506bb046c5 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:19:13 +0900 Subject: sh: Make PAGE_OFFSET configurable. nommu needs to be able to shift PAGE_OFFSET, so we switch it to a non-user-visible CONFIG_PAGE_OFFSET and use that in the few places where it matters. Signed-off-by: Paul Mundt --- arch/sh/Kconfig | 26 -------------------------- arch/sh/boot/compressed/Makefile | 3 ++- arch/sh/kernel/vmlinux.lds.S | 2 +- arch/sh/mm/Kconfig | 31 +++++++++++++++++++++++++++++++ include/asm-sh/page.h | 2 +- 5 files changed, 35 insertions(+), 29 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 07d6d699e9c2..035df7fb2237 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -238,32 +238,6 @@ endchoice source "arch/sh/mm/Kconfig" -config MEMORY_START - hex "Physical memory start address" - default "0x08000000" - ---help--- - Computers built with Hitachi SuperH processors always - map the ROM starting at address zero. But the processor - does not specify the range that RAM takes. - - The physical memory (RAM) start address will be automatically - set to 08000000. Other platforms, such as the Solution Engine - boards typically map RAM at 0C000000. - - Tweak this only when porting to a new machine which does not - already have a defconfig. Changing it from the known correct - value on any of the known systems will only lead to disaster. - -config MEMORY_SIZE - hex "Physical memory size" - default "0x00400000" - help - This sets the default memory size assumed by your SH kernel. It can - be overridden as normal by the 'mem=' argument on the kernel command - line. If unsure, consult your board specifications or just leave it - as 0x00400000 which was the default value before this became - configurable. - config CF_ENABLER bool "Compact Flash Enabler support" depends on SH_ADX || SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_CAT68701 || SH_SH03 diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile index 75a6876bf6c6..7074267c01b7 100644 --- a/arch/sh/boot/compressed/Makefile +++ b/arch/sh/boot/compressed/Makefile @@ -18,9 +18,10 @@ endif # Assign dummy values if these 2 variables are not defined, # in order to suppress error message. # +CONFIG_PAGE_OFFSET ?= 0x80000000 CONFIG_MEMORY_START ?= 0x0c000000 CONFIG_BOOT_LINK_OFFSET ?= 0x00800000 -IMAGE_OFFSET := $(shell printf "0x%8x" $$[0x80000000+$(CONFIG_MEMORY_START)+$(CONFIG_BOOT_LINK_OFFSET)]) +IMAGE_OFFSET := $(shell printf "0x%8x" $$[$(CONFIG_PAGE_OFFSET)+$(CONFIG_MEMORY_START)+$(CONFIG_BOOT_LINK_OFFSET)]) LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../kernel/vmlinux.lds diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S index 3f3e1e0735f5..eb860c51c697 100644 --- a/arch/sh/kernel/vmlinux.lds.S +++ b/arch/sh/kernel/vmlinux.lds.S @@ -13,7 +13,7 @@ OUTPUT_ARCH(sh) ENTRY(_start) SECTIONS { - . = 0x80000000 + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET; + . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET; _text = .; /* Text and read-only data */ text = .; /* Text and read-only data */ .empty_zero_page : { diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig index 9064dfc91e6d..f25903aa607b 100644 --- a/arch/sh/mm/Kconfig +++ b/arch/sh/mm/Kconfig @@ -161,6 +161,37 @@ config MMU turning this off will boot the kernel on these machines with the MMU implicitly switched off. +config PAGE_OFFSET + hex + default "0x80000000" if MMU + default "0x00000000" + +config MEMORY_START + hex "Physical memory start address" + default "0x08000000" + ---help--- + Computers built with Hitachi SuperH processors always + map the ROM starting at address zero. But the processor + does not specify the range that RAM takes. + + The physical memory (RAM) start address will be automatically + set to 08000000. Other platforms, such as the Solution Engine + boards typically map RAM at 0C000000. + + Tweak this only when porting to a new machine which does not + already have a defconfig. Changing it from the known correct + value on any of the known systems will only lead to disaster. + +config MEMORY_SIZE + hex "Physical memory size" + default "0x00400000" + help + This sets the default memory size assumed by your SH kernel. It can + be overridden as normal by the 'mem=' argument on the kernel command + line. If unsure, consult your board specifications or just leave it + as 0x00400000 which was the default value before this became + configurable. + config 32BIT bool "Support 32-bit physical addressing through PMB" depends on CPU_SH4A diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index 51d7281a546a..1b3cfd165a66 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -84,7 +84,7 @@ typedef struct { unsigned long pgprot; } pgprot_t; #define __MEMORY_START CONFIG_MEMORY_START #define __MEMORY_SIZE CONFIG_MEMORY_SIZE -#define PAGE_OFFSET (0x80000000UL) +#define PAGE_OFFSET CONFIG_PAGE_OFFSET #define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) #define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) -- cgit v1.2.3 From 0b8929354cdeddb17e81bfda903812c9adfd0b67 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:22:49 +0900 Subject: sh: __NR_restart_syscall support. This implements support for __NR_restart_syscall. Signed-off-by: Paul Mundt --- arch/sh/kernel/entry.S | 2 ++ arch/sh/kernel/signal.c | 16 ++++++++++------ arch/sh/kernel/syscalls.S | 2 +- 3 files changed, 13 insertions(+), 7 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/entry.S b/arch/sh/kernel/entry.S index b087d34dba35..fcbf50d4ee10 100644 --- a/arch/sh/kernel/entry.S +++ b/arch/sh/kernel/entry.S @@ -376,6 +376,7 @@ work_notifysig: bt/s restore_all mov r15, r4 mov #0, r5 + mov r12, r6 ! set arg2(save_r0) mov.l 2f, r1 mova restore_all, r0 jmp @r1 @@ -534,6 +535,7 @@ syscall_call: mov.l @r9, r8 jsr @r8 ! jump to specific syscall handler nop + mov.l @(OFF_R0,r15), r12 ! save r0 mov.l r0, @(OFF_R0,r15) ! save the return value ! syscall_exit: diff --git a/arch/sh/kernel/signal.c b/arch/sh/kernel/signal.c index b475c4d2405f..eb6a3b97e46c 100644 --- a/arch/sh/kernel/signal.c +++ b/arch/sh/kernel/signal.c @@ -33,7 +33,8 @@ #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) -asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset); +asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset, + unsigned int save_r0); /* * Atomically swap in the new signal mask, and wait for a signal. @@ -56,7 +57,7 @@ sys_sigsuspend(old_sigset_t mask, while (1) { current->state = TASK_INTERRUPTIBLE; schedule(); - if (do_signal(®s, &saveset)) + if (do_signal(®s, &saveset, regs.regs[0])) return -EINTR; } } @@ -85,7 +86,7 @@ sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize, while (1) { current->state = TASK_INTERRUPTIBLE; schedule(); - if (do_signal(®s, &saveset)) + if (do_signal(®s, &saveset, regs.regs[0])) return -EINTR; } } @@ -563,7 +564,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, * the kernel can handle, and then we build all the user-level signal handling * stack-frames in one go after that. */ -int do_signal(struct pt_regs *regs, sigset_t *oldset) +int do_signal(struct pt_regs *regs, sigset_t *oldset, unsigned int save_r0) { siginfo_t info; int signr; @@ -597,9 +598,12 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset) /* Restart the system call - no handlers present */ if (regs->regs[0] == -ERESTARTNOHAND || regs->regs[0] == -ERESTARTSYS || - regs->regs[0] == -ERESTARTNOINTR || - regs->regs[0] == -ERESTART_RESTARTBLOCK) { + regs->regs[0] == -ERESTARTNOINTR) { + regs->regs[0] = save_r0; regs->pc -= 2; + } else if (regs->regs[0] == -ERESTART_RESTARTBLOCK) { + regs->pc -= 2; + regs->regs[3] = __NR_restart_syscall; } } return 0; diff --git a/arch/sh/kernel/syscalls.S b/arch/sh/kernel/syscalls.S index ada61b0d9a73..ea23b213c77f 100644 --- a/arch/sh/kernel/syscalls.S +++ b/arch/sh/kernel/syscalls.S @@ -34,7 +34,7 @@ .data ENTRY(sys_call_table) - .long sys_ni_syscall /* 0 - old "setup()" system call*/ + .long sys_restart_syscall /* 0 - old "setup()" system call*/ .long sys_exit .long sys_fork .long sys_read -- cgit v1.2.3 From a2d1a5fae6296c2a3ac1aaa982c95464c46c0585 Mon Sep 17 00:00:00 2001 From: Yoshinori Sato Date: Wed, 27 Sep 2006 17:25:07 +0900 Subject: sh: __addr_ok() and other misc nommu fixups. A few more outstanding nommu fixups.. Signed-off-by: Yoshinori Sato Signed-off-by: Paul Mundt --- arch/sh/boot/compressed/Makefile | 6 +++--- arch/sh/kernel/process.c | 13 +++++++++---- arch/sh/kernel/sh_ksyms.c | 10 ++++------ arch/sh/kernel/sys_sh.c | 2 +- arch/sh/mm/Kconfig | 2 +- arch/sh/mm/Makefile | 4 ++-- include/asm-sh/addrspace.h | 4 ++-- include/asm-sh/io.h | 5 +++++ include/asm-sh/uaccess.h | 9 ++++++--- 9 files changed, 33 insertions(+), 22 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile index 903470429cb4..e5f443790079 100644 --- a/arch/sh/boot/compressed/Makefile +++ b/arch/sh/boot/compressed/Makefile @@ -22,9 +22,9 @@ CONFIG_PAGE_OFFSET ?= 0x80000000 CONFIG_MEMORY_START ?= 0x0c000000 CONFIG_BOOT_LINK_OFFSET ?= 0x00800000 -IMAGE_OFFSET := $(shell printf "0x%8x" $$[$(CONFIG_PAGE_OFFSET) + \ - $(CONFIG_MEMORY_START) + \ - $(CONFIG_BOOT_LINK_OFFSET)]) +IMAGE_OFFSET := $(shell printf "0x%08x" $$[$(CONFIG_PAGE_OFFSET) + \ + $(CONFIG_MEMORY_START) + \ + $(CONFIG_BOOT_LINK_OFFSET)]) LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c index 4a32550fd7c6..c4aa687ba26a 100644 --- a/arch/sh/kernel/process.c +++ b/arch/sh/kernel/process.c @@ -302,9 +302,11 @@ ubc_set_tracing(int asid, unsigned long pc) { ctrl_outl(pc, UBC_BARA); +#ifdef CONFIG_MMU /* We don't have any ASID settings for the SH-2! */ if (cpu_data->type != CPU_SH7604) ctrl_outb(asid, UBC_BASRA); +#endif ctrl_outl(0, UBC_BAMRA); @@ -347,6 +349,7 @@ struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *ne } #endif +#ifdef CONFIG_MMU /* * Restore the kernel mode register * k7 (r7_bank1) @@ -354,19 +357,21 @@ struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *ne asm volatile("ldc %0, r7_bank" : /* no output */ : "r" (task_thread_info(next))); +#endif -#ifdef CONFIG_MMU /* If no tasks are using the UBC, we're done */ if (ubc_usercnt == 0) /* If no tasks are using the UBC, we're done */; else if (next->thread.ubc_pc && next->mm) { - ubc_set_tracing(next->mm->context & MMU_CONTEXT_ASID_MASK, - next->thread.ubc_pc); + int asid = 0; +#ifdef CONFIG_MMU + asid |= next->mm->context & MMU_CONTEXT_ASID_MASK; +#endif + ubc_set_tracing(asid, next->thread.ubc_pc); } else { ctrl_outw(0, UBC_BBRA); ctrl_outw(0, UBC_BBRB); } -#endif return prev; } diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms.c index 7f3a42244cab..bf59d73415d7 100644 --- a/arch/sh/kernel/sh_ksyms.c +++ b/arch/sh/kernel/sh_ksyms.c @@ -79,20 +79,18 @@ EXPORT_SYMBOL(strcpy); DECLARE_EXPORT(__movstr_i4_even); DECLARE_EXPORT(__movstr_i4_odd); DECLARE_EXPORT(__movstrSI12_i4); +#endif +#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB) /* needed by some modules */ EXPORT_SYMBOL(flush_cache_all); EXPORT_SYMBOL(flush_cache_range); EXPORT_SYMBOL(flush_dcache_page); EXPORT_SYMBOL(__flush_purge_region); -EXPORT_SYMBOL(clear_user_page); #endif -#if defined(CONFIG_SH7705_CACHE_32KB) -EXPORT_SYMBOL(flush_cache_all); -EXPORT_SYMBOL(flush_cache_range); -EXPORT_SYMBOL(flush_dcache_page); -EXPORT_SYMBOL(__flush_purge_region); +#ifdef CONFIG_MMU +EXPORT_SYMBOL(clear_user_page); #endif EXPORT_SYMBOL(flush_tlb_page); diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c index d8bcd8a22327..0ee7bf4cb238 100644 --- a/arch/sh/kernel/sys_sh.c +++ b/arch/sh/kernel/sys_sh.c @@ -44,7 +44,7 @@ asmlinkage int sys_pipe(unsigned long r4, unsigned long r5, return error; } -#if defined(HAVE_ARCH_UNMAPPED_AREA) +#if defined(HAVE_ARCH_UNMAPPED_AREA) && defined(CONFIG_MMU) /* * To avoid cache alias, we map the shard page with same color. */ diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig index f25903aa607b..bed697c0dc19 100644 --- a/arch/sh/mm/Kconfig +++ b/arch/sh/mm/Kconfig @@ -194,7 +194,7 @@ config MEMORY_SIZE config 32BIT bool "Support 32-bit physical addressing through PMB" - depends on CPU_SH4A + depends on CPU_SH4A && MMU default y help If you say Y here, physical addressing will be extended to diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile index 87a7c07265c0..da37d86e65eb 100644 --- a/arch/sh/mm/Makefile +++ b/arch/sh/mm/Makefile @@ -6,7 +6,7 @@ obj-y := init.o extable.o consistent.o obj-$(CONFIG_CPU_SH2) += cache-sh2.o obj-$(CONFIG_CPU_SH3) += cache-sh3.o -obj-$(CONFIG_CPU_SH4) += cache-sh4.o pg-sh4.o +obj-$(CONFIG_CPU_SH4) += cache-sh4.o obj-$(CONFIG_DMA_PAGE_OPS) += pg-dma.o obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o @@ -19,7 +19,7 @@ obj-y += $(mmu-y) ifdef CONFIG_MMU obj-$(CONFIG_CPU_SH3) += tlb-sh3.o -obj-$(CONFIG_CPU_SH4) += tlb-sh4.o +obj-$(CONFIG_CPU_SH4) += tlb-sh4.o pg-sh4.o obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o endif diff --git a/include/asm-sh/addrspace.h b/include/asm-sh/addrspace.h index 4207368267b1..b860218e402e 100644 --- a/include/asm-sh/addrspace.h +++ b/include/asm-sh/addrspace.h @@ -14,7 +14,7 @@ #include /* Memory segments (32bit Privileged mode addresses) */ -#ifdef CONFIG_MMU +#ifndef CONFIG_CPU_SH2A #define P0SEG 0x00000000 #define P1SEG 0x80000000 #define P2SEG 0xa0000000 @@ -24,7 +24,7 @@ #define P0SEG 0x00000000 #define P1SEG 0x00000000 #define P2SEG 0x20000000 -#define P3SEG 0x40000000 +#define P3SEG 0x00000000 #define P4SEG 0x80000000 #endif diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h index 27dba653cbe7..377160b86295 100644 --- a/include/asm-sh/io.h +++ b/include/asm-sh/io.h @@ -216,6 +216,7 @@ static inline void ctrl_delay(void) #define IO_SPACE_LIMIT 0xffffffff +#ifdef CONFIG_MMU /* * Change virtual addresses to physical addresses and vv. * These are trivial on the 1:1 Linux/SuperH mapping @@ -229,6 +230,10 @@ static inline void *phys_to_virt(unsigned long address) { return (void *)P1SEGADDR(address); } +#else +#define phys_to_virt(address) ((void *)(address)) +#define virt_to_phys(address) ((unsigned long)(address)) +#endif #define virt_to_bus virt_to_phys #define bus_to_virt phys_to_virt diff --git a/include/asm-sh/uaccess.h b/include/asm-sh/uaccess.h index 5c3b00c2f107..5c49ed6715f2 100644 --- a/include/asm-sh/uaccess.h +++ b/include/asm-sh/uaccess.h @@ -34,12 +34,12 @@ #define segment_eq(a,b) ((a).seg == (b).seg) -#define __addr_ok(addr) \ - ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg)) - #define get_ds() (KERNEL_DS) #if !defined(CONFIG_MMU) +/* NOMMU is always true */ +#define __addr_ok(addr) (1) + static inline mm_segment_t get_fs(void) { return USER_DS; @@ -66,6 +66,9 @@ static inline int __access_ok(unsigned long addr, unsigned long size) return ((addr >= memory_start) && ((addr + size) < memory_end)); } #else /* CONFIG_MMU */ +#define __addr_ok(addr) \ + ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg)) + #define get_fs() (current_thread_info()->addr_limit) #define set_fs(x) (current_thread_info()->addr_limit = (x)) -- cgit v1.2.3 From 9f23e7e94f7083d9705b595cbd6b30972be6fbbb Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:27:00 +0900 Subject: sh: pselect6 and ppoll, along with signal trampoline rework. This implements support for ppoll() and pselect6().. Signed-off-by: Paul Mundt --- arch/sh/kernel/entry.S | 8 +-- arch/sh/kernel/signal.c | 137 ++++++++++++++++++++----------------------- arch/sh/kernel/syscalls.S | 31 +++++----- include/asm-sh/thread_info.h | 2 + include/asm-sh/unistd.h | 66 +++++++++++---------- 5 files changed, 121 insertions(+), 123 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/entry.S b/arch/sh/kernel/entry.S index fcbf50d4ee10..fd5fe2349f20 100644 --- a/arch/sh/kernel/entry.S +++ b/arch/sh/kernel/entry.S @@ -371,12 +371,12 @@ work_pending: ! r8: current_thread_info ! t: result of "tst #_TIF_NEED_RESCHED, r0" bf/s work_resched - tst #_TIF_SIGPENDING, r0 + tst #(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), r0 work_notifysig: bt/s restore_all mov r15, r4 - mov #0, r5 - mov r12, r6 ! set arg2(save_r0) + mov r12, r5 ! set arg1(save_r0) + mov r0, r6 mov.l 2f, r1 mova restore_all, r0 jmp @r1 @@ -414,7 +414,7 @@ work_resched: .align 2 1: .long schedule -2: .long do_signal +2: .long do_notify_resume .align 2 syscall_exit_work: diff --git a/arch/sh/kernel/signal.c b/arch/sh/kernel/signal.c index eb6a3b97e46c..2f1c9545b49f 100644 --- a/arch/sh/kernel/signal.c +++ b/arch/sh/kernel/signal.c @@ -29,13 +29,10 @@ #include #include -#define DEBUG_SIG 0 +#undef DEBUG #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) -asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset, - unsigned int save_r0); - /* * Atomically swap in the new signal mask, and wait for a signal. */ @@ -44,51 +41,17 @@ sys_sigsuspend(old_sigset_t mask, unsigned long r5, unsigned long r6, unsigned long r7, struct pt_regs regs) { - sigset_t saveset; - mask &= _BLOCKABLE; spin_lock_irq(¤t->sighand->siglock); - saveset = current->blocked; + current->saved_sigmask = current->blocked; siginitset(¤t->blocked, mask); recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); - regs.regs[0] = -EINTR; - while (1) { - current->state = TASK_INTERRUPTIBLE; - schedule(); - if (do_signal(®s, &saveset, regs.regs[0])) - return -EINTR; - } -} - -asmlinkage int -sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize, - unsigned long r6, unsigned long r7, - struct pt_regs regs) -{ - sigset_t saveset, newset; - - /* XXX: Don't preclude handling different sized sigset_t's. */ - if (sigsetsize != sizeof(sigset_t)) - return -EINVAL; - - if (copy_from_user(&newset, unewset, sizeof(newset))) - return -EFAULT; - sigdelsetmask(&newset, ~_BLOCKABLE); - spin_lock_irq(¤t->sighand->siglock); - saveset = current->blocked; - current->blocked = newset; - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); - - regs.regs[0] = -EINTR; - while (1) { - current->state = TASK_INTERRUPTIBLE; - schedule(); - if (do_signal(®s, &saveset, regs.regs[0])) - return -EINTR; - } + current->state = TASK_INTERRUPTIBLE; + schedule(); + set_thread_flag(TIF_RESTORE_SIGMASK); + return -ERESTARTNOHAND; } asmlinkage int @@ -349,7 +312,7 @@ get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size) return (void __user *)((sp - frame_size) & -8ul); } -static void setup_frame(int sig, struct k_sigaction *ka, +static int setup_frame(int sig, struct k_sigaction *ka, sigset_t *set, struct pt_regs *regs) { struct sigframe __user *frame; @@ -369,10 +332,9 @@ static void setup_frame(int sig, struct k_sigaction *ka, err |= setup_sigcontext(&frame->sc, regs, set->sig[0]); - if (_NSIG_WORDS > 1) { + if (_NSIG_WORDS > 1) err |= __copy_to_user(frame->extramask, &set->sig[1], sizeof(frame->extramask)); - } /* Set up to return from userspace. If provided, use a stub already in userspace. */ @@ -403,21 +365,22 @@ static void setup_frame(int sig, struct k_sigaction *ka, set_fs(USER_DS); -#if DEBUG_SIG - printk("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", - current->comm, current->pid, frame, regs->pc, regs->pr); -#endif + pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", + current->comm, current->pid, frame, regs->pc, regs->pr); flush_cache_sigtramp(regs->pr); + if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode)) flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES); - return; + + return 0; give_sigsegv: force_sigsegv(sig, current); + return -EFAULT; } -static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, +static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *set, struct pt_regs *regs) { struct rt_sigframe __user *frame; @@ -478,28 +441,31 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, set_fs(USER_DS); -#if DEBUG_SIG - printk("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", - current->comm, current->pid, frame, regs->pc, regs->pr); -#endif + pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", + current->comm, current->pid, frame, regs->pc, regs->pr); flush_cache_sigtramp(regs->pr); + if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode)) flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES); - return; + + return 0; give_sigsegv: force_sigsegv(sig, current); + return -EFAULT; } /* * OK, we're invoking a handler */ -static void +static int handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *oldset, struct pt_regs *regs) { + int ret; + /* Are we from a system call? */ if (regs->tra >= 0) { /* If so, check system call restarting.. */ @@ -540,19 +506,23 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, /* Set up the stack frame */ if (ka->sa.sa_flags & SA_SIGINFO) - setup_rt_frame(sig, ka, info, oldset, regs); + ret = setup_rt_frame(sig, ka, info, oldset, regs); else - setup_frame(sig, ka, oldset, regs); + ret = setup_frame(sig, ka, oldset, regs); if (ka->sa.sa_flags & SA_ONESHOT) ka->sa.sa_handler = SIG_DFL; - spin_lock_irq(¤t->sighand->siglock); - sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); - if (!(ka->sa.sa_flags & SA_NODEFER)) - sigaddset(¤t->blocked,sig); - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); + if (ret == 0) { + spin_lock_irq(¤t->sighand->siglock); + sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); + if (!(ka->sa.sa_flags & SA_NODEFER)) + sigaddset(¤t->blocked,sig); + recalc_sigpending(); + spin_unlock_irq(¤t->sighand->siglock); + } + + return ret; } /* @@ -564,11 +534,12 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, * the kernel can handle, and then we build all the user-level signal handling * stack-frames in one go after that. */ -int do_signal(struct pt_regs *regs, sigset_t *oldset, unsigned int save_r0) +static void do_signal(struct pt_regs *regs, unsigned int save_r0) { siginfo_t info; int signr; struct k_sigaction ka; + sigset_t *oldset; /* * We want the common case to go fast, which @@ -577,19 +548,27 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset, unsigned int save_r0) * if so. */ if (!user_mode(regs)) - return 1; + return; if (try_to_freeze()) goto no_signal; - if (!oldset) + if (test_thread_flag(TIF_RESTORE_SIGMASK)) + oldset = ¤t->saved_sigmask; + else oldset = ¤t->blocked; signr = get_signal_to_deliver(&info, &ka, regs, NULL); if (signr > 0) { /* Whee! Actually deliver the signal. */ - handle_signal(signr, &ka, &info, oldset, regs); - return 1; + if (handle_signal(signr, &ka, &info, oldset, regs) == 0) { + /* a signal was successfully delivered; the saved + * sigmask will have been stored in the signal frame, + * and will be restored by sigreturn, so we can simply + * clear the TIF_RESTORE_SIGMASK flag */ + if (test_thread_flag(TIF_RESTORE_SIGMASK)) + clear_thread_flag(TIF_RESTORE_SIGMASK); + } } no_signal: @@ -606,5 +585,19 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset, unsigned int save_r0) regs->regs[3] = __NR_restart_syscall; } } - return 0; + + /* if there's no signal to deliver, we just put the saved sigmask + * back */ + if (test_thread_flag(TIF_RESTORE_SIGMASK)) { + clear_thread_flag(TIF_RESTORE_SIGMASK); + sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL); + } +} + +asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned int save_r0, + __u32 thread_info_flags) +{ + /* deal with pending signal delivery */ + if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)) + do_signal(regs, save_r0); } diff --git a/arch/sh/kernel/syscalls.S b/arch/sh/kernel/syscalls.S index ea23b213c77f..768334e95075 100644 --- a/arch/sh/kernel/syscalls.S +++ b/arch/sh/kernel/syscalls.S @@ -319,34 +319,35 @@ ENTRY(sys_call_table) .long sys_mq_getsetattr .long sys_kexec_load .long sys_waitid - .long sys_add_key /* 285 */ + .long sys_ni_syscall /* 285 */ + .long sys_add_key .long sys_request_key .long sys_keyctl .long sys_ioprio_set - .long sys_ioprio_get - .long sys_inotify_init /* 290 */ + .long sys_ioprio_get /* 290 */ + .long sys_inotify_init .long sys_inotify_add_watch .long sys_inotify_rm_watch .long sys_migrate_pages - .long sys_openat - .long sys_mkdirat /* 295 */ + .long sys_openat /* 295 */ + .long sys_mkdirat .long sys_mknodat .long sys_fchownat .long sys_futimesat - .long sys_fstatat64 - .long sys_unlinkat /* 300 */ + .long sys_fstatat64 /* 300 */ + .long sys_unlinkat .long sys_renameat .long sys_linkat .long sys_symlinkat - .long sys_readlinkat - .long sys_fchmodat /* 305 */ + .long sys_readlinkat /* 305 */ + .long sys_fchmodat .long sys_faccessat - .long sys_ni_syscall /* Reserved for pselect6 */ - .long sys_ni_syscall /* Reserved for ppoll */ - .long sys_unshare - .long sys_set_robust_list /* 310 */ + .long sys_pselect6 + .long sys_ppoll + .long sys_unshare /* 310 */ + .long sys_set_robust_list .long sys_get_robust_list .long sys_splice .long sys_sync_file_range - .long sys_tee - .long sys_vmsplice /* 315 */ + .long sys_tee /* 315 */ + .long sys_vmsplice diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h index b986a1914472..5eb874b065a6 100644 --- a/include/asm-sh/thread_info.h +++ b/include/asm-sh/thread_info.h @@ -94,6 +94,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_NOTIFY_RESUME 1 /* resumption notification requested */ #define TIF_SIGPENDING 2 /* signal pending */ #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ +#define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */ #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ #define TIF_MEMDIE 18 @@ -102,6 +103,7 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_NOTIFY_RESUME (1< Date: Wed, 27 Sep 2006 17:28:20 +0900 Subject: sh: sem2mutex conversion for clock framework. Simple sem2mutex conversion. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/clock.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c index e7eef07536f5..51ec64cdf348 100644 --- a/arch/sh/kernel/cpu/clock.c +++ b/arch/sh/kernel/cpu/clock.c @@ -1,7 +1,7 @@ /* * arch/sh/kernel/cpu/clock.c - SuperH clock framework * - * Copyright (C) 2005 Paul Mundt + * Copyright (C) 2005, 2006 Paul Mundt * * This clock framework is derived from the OMAP version by: * @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -24,7 +25,7 @@ static LIST_HEAD(clock_list); static DEFINE_SPINLOCK(clock_lock); -static DECLARE_MUTEX(clock_list_sem); +static DEFINE_MUTEX(clock_list_sem); /* * Each subtype is expected to define the init routines for these clocks, @@ -140,21 +141,21 @@ void clk_disable(struct clk *clk) int clk_register(struct clk *clk) { - down(&clock_list_sem); + mutex_lock(&clock_list_sem); list_add(&clk->node, &clock_list); kref_init(&clk->kref); - up(&clock_list_sem); + mutex_unlock(&clock_list_sem); return 0; } void clk_unregister(struct clk *clk) { - down(&clock_list_sem); + mutex_lock(&clock_list_sem); list_del(&clk->node); - up(&clock_list_sem); + mutex_unlock(&clock_list_sem); } inline unsigned long clk_get_rate(struct clk *clk) @@ -198,14 +199,14 @@ struct clk *clk_get(const char *id) { struct clk *p, *clk = ERR_PTR(-ENOENT); - down(&clock_list_sem); + mutex_lock(&clock_list_sem); list_for_each_entry(p, &clock_list, node) { if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) { clk = p; break; } } - up(&clock_list_sem); + mutex_unlock(&clock_list_sem); return clk; } -- cgit v1.2.3 From 7dec62e96b38e6c62490ea5dc6939dd8d680a8b8 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:30:35 +0900 Subject: sh: Add setup code for various CPU subtypes. This adds some simple setup code for most of the CPU subtypes, primarily simple platform device registration. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh3/Makefile | 8 +++++ arch/sh/kernel/cpu/sh3/setup-sh7300.c | 43 +++++++++++++++++++++++++++ arch/sh/kernel/cpu/sh3/setup-sh7705.c | 48 ++++++++++++++++++++++++++++++ arch/sh/kernel/cpu/sh3/setup-sh7708.c | 43 +++++++++++++++++++++++++++ arch/sh/kernel/cpu/sh3/setup-sh7709.c | 53 ++++++++++++++++++++++++++++++++++ arch/sh/kernel/cpu/sh4/Makefile | 6 ++++ arch/sh/kernel/cpu/sh4/setup-sh4-202.c | 43 +++++++++++++++++++++++++++ arch/sh/kernel/cpu/sh4/setup-sh73180.c | 43 +++++++++++++++++++++++++++ arch/sh/kernel/cpu/sh4/setup-sh7750.c | 48 ++++++++++++++++++++++++++++++ arch/sh/kernel/cpu/sh4/setup-sh7760.c | 53 ++++++++++++++++++++++++++++++++++ arch/sh/kernel/cpu/sh4/setup-sh7770.c | 53 ++++++++++++++++++++++++++++++++++ 11 files changed, 441 insertions(+) create mode 100644 arch/sh/kernel/cpu/sh3/setup-sh7300.c create mode 100644 arch/sh/kernel/cpu/sh3/setup-sh7705.c create mode 100644 arch/sh/kernel/cpu/sh3/setup-sh7708.c create mode 100644 arch/sh/kernel/cpu/sh3/setup-sh7709.c create mode 100644 arch/sh/kernel/cpu/sh4/setup-sh4-202.c create mode 100644 arch/sh/kernel/cpu/sh4/setup-sh73180.c create mode 100644 arch/sh/kernel/cpu/sh4/setup-sh7750.c create mode 100644 arch/sh/kernel/cpu/sh4/setup-sh7760.c create mode 100644 arch/sh/kernel/cpu/sh4/setup-sh7770.c (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile index b54dbb9a0c86..1b292ae16f07 100644 --- a/arch/sh/kernel/cpu/sh3/Makefile +++ b/arch/sh/kernel/cpu/sh3/Makefile @@ -4,6 +4,14 @@ obj-y := ex.o probe.o +# CPU subtype setup +obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o +obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh7709.o +obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh7708.o +obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh7709.o +obj-$(CONFIG_CPU_SUBTYPE_SH7300) += setup-sh7300.o + +# Primary on-chip clocks (common) clock-$(CONFIG_CPU_SH3) := clock-sh3.o clock-$(CONFIG_CPU_SUBTYPE_SH7300) := clock-sh7300.o clock-$(CONFIG_CPU_SUBTYPE_SH7705) := clock-sh7705.o diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7300.c b/arch/sh/kernel/cpu/sh3/setup-sh7300.c new file mode 100644 index 000000000000..ab4d204bfba5 --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/setup-sh7300.c @@ -0,0 +1,43 @@ +/* + * SH7300 Setup + * + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xa4430000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCI, + .irqs = { 80, 80, 80, 80 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct platform_device *sh7300_devices[] __initdata = { + &sci_device, +}; + +static int __init sh7300_devices_setup(void) +{ + return platform_add_devices(sh7300_devices, + ARRAY_SIZE(sh7300_devices)); +} +__initcall(sh7300_devices_setup); diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c new file mode 100644 index 000000000000..a8e41c5241fa --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c @@ -0,0 +1,48 @@ +/* + * SH7705 Setup + * + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xa4400000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 52, 53, 55, 54 }, + }, { + .mapbase = 0xa4410000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 56, 57, 59, 58 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct platform_device *sh7705_devices[] __initdata = { + &sci_device, +}; + +static int __init sh7705_devices_setup(void) +{ + return platform_add_devices(sh7705_devices, + ARRAY_SIZE(sh7705_devices)); +} +__initcall(sh7705_devices_setup); diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7708.c b/arch/sh/kernel/cpu/sh3/setup-sh7708.c new file mode 100644 index 000000000000..f933723911ca --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/setup-sh7708.c @@ -0,0 +1,43 @@ +/* + * SH7708 Setup + * + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xfffffe80, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCI, + .irqs = { 23, 24, 25, 0 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct platform_device *sh7708_devices[] __initdata = { + &sci_device, +}; + +static int __init sh7708_devices_setup(void) +{ + return platform_add_devices(sh7708_devices, + ARRAY_SIZE(sh7708_devices)); +} +__initcall(sh7708_devices_setup); diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7709.c b/arch/sh/kernel/cpu/sh3/setup-sh7709.c new file mode 100644 index 000000000000..ff43ef2a1f0c --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/setup-sh7709.c @@ -0,0 +1,53 @@ +/* + * SH7707/SH7709 Setup + * + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xfffffe80, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCI, + .irqs = { 23, 24, 25, 0 }, + }, { + .mapbase = 0xa4000150, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 56, 57, 59, 58 }, + }, { + .mapbase = 0xa4000140, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_IRDA, + .irqs = { 52, 53, 55, 54 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct platform_device *sh7709_devices[] __initdata = { + &sci_device, +}; + +static int __init sh7709_devices_setup(void) +{ + return platform_add_devices(sh7709_devices, + ARRAY_SIZE(sh7709_devices)); +} +__initcall(sh7709_devices_setup); diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile index 9611fab03b55..48946d54a2cd 100644 --- a/arch/sh/kernel/cpu/sh4/Makefile +++ b/arch/sh/kernel/cpu/sh4/Makefile @@ -8,7 +8,13 @@ obj-$(CONFIG_SH_FPU) += fpu.o obj-$(CONFIG_SH_STORE_QUEUES) += sq.o # CPU subtype setup +obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o +obj-$(CONFIG_CPU_SUBTYPE_SH7751) += setup-sh7750.o +obj-$(CONFIG_CPU_SUBTYPE_SH7760) += setup-sh7760.o +obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o +obj-$(CONFIG_CPU_SUBTYPE_SH73180) += setup-sh73180.o +obj-$(CONFIG_CPU_SUBTYPE_SH4_202) += setup-sh4-202.o # Primary on-chip clocks (common) clock-$(CONFIG_CPU_SH4) := clock-sh4.o diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c new file mode 100644 index 000000000000..6e4e96541358 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c @@ -0,0 +1,43 @@ +/* + * SH4-202 Setup + * + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xffe80000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 40, 41, 43, 42 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct platform_device *sh4202_devices[] __initdata = { + &sci_device, +}; + +static int __init sh4202_devices_setup(void) +{ + return platform_add_devices(sh4202_devices, + ARRAY_SIZE(sh4202_devices)); +} +__initcall(sh4202_devices_setup); diff --git a/arch/sh/kernel/cpu/sh4/setup-sh73180.c b/arch/sh/kernel/cpu/sh4/setup-sh73180.c new file mode 100644 index 000000000000..cc9ea1e2e5df --- /dev/null +++ b/arch/sh/kernel/cpu/sh4/setup-sh73180.c @@ -0,0 +1,43 @@ +/* + * SH73180 Setup + * + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xffe80000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 80, 81, 83, 82 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct platform_device *sh73180_devices[] __initdata = { + &sci_device, +}; + +static int __init sh73180_devices_setup(void) +{ + return platform_add_devices(sh73180_devices, + ARRAY_SIZE(sh73180_devices)); +} +__initcall(sh73180_devices_setup); diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c new file mode 100644 index 000000000000..50812d57c1c1 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c @@ -0,0 +1,48 @@ +/* + * SH7750/SH7751 Setup + * + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xffe00000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCI, + .irqs = { 23, 24, 25, 0 }, + }, { + .mapbase = 0xffe80000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 40, 41, 43, 42 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct platform_device *sh7750_devices[] __initdata = { + &sci_device, +}; + +static int __init sh7750_devices_setup(void) +{ + return platform_add_devices(sh7750_devices, + ARRAY_SIZE(sh7750_devices)); +} +__initcall(sh7750_devices_setup); diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c new file mode 100644 index 000000000000..97f1c9af35d6 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c @@ -0,0 +1,53 @@ +/* + * SH7760 Setup + * + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xfe600000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 52, 53, 55, 54 }, + }, { + .mapbase = 0xfe610000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 72, 73, 75, 74 }, + }, { + .mapbase = 0xfe620000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 76, 77, 79, 78 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct platform_device *sh7760_devices[] __initdata = { + &sci_device, +}; + +static int __init sh7760_devices_setup(void) +{ + return platform_add_devices(sh7760_devices, + ARRAY_SIZE(sh7760_devices)); +} +__initcall(sh7760_devices_setup); diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7770.c b/arch/sh/kernel/cpu/sh4/setup-sh7770.c new file mode 100644 index 000000000000..6a04cc5f5aca --- /dev/null +++ b/arch/sh/kernel/cpu/sh4/setup-sh7770.c @@ -0,0 +1,53 @@ +/* + * SH7770 Setup + * + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xff923000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 61, 61, 61, 61 }, + }, { + .mapbase = 0xff924000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 62, 62, 62, 62 }, + }, { + .mapbase = 0xff925000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 63, 63, 63, 63 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct platform_device *sh7770_devices[] __initdata = { + &sci_device, +}; + +static int __init sh7770_devices_setup(void) +{ + return platform_add_devices(sh7770_devices, + ARRAY_SIZE(sh7770_devices)); +} +__initcall(sh7770_devices_setup); -- cgit v1.2.3 From e5723e0eeb2dc16629e86d66785024ead9169000 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:38:11 +0900 Subject: sh: Add support for SH7706/SH7710/SH7343 CPUs. This adds support for the aforementioned CPU subtypes, and cleans up some build issues encountered as a result. Signed-off-by: Paul Mundt --- arch/sh/Kconfig | 12 +- arch/sh/Makefile | 7 +- arch/sh/boards/hp6xx/setup.c | 5 +- arch/sh/boards/renesas/hs7751rvoip/io.c | 2 +- arch/sh/kernel/cpu/irq/ipr.c | 2 + arch/sh/kernel/cpu/sh3/Makefile | 5 +- arch/sh/kernel/cpu/sh3/clock-sh7706.c | 84 +++++++++ arch/sh/kernel/cpu/sh3/ex.S | 54 +++++- arch/sh/kernel/cpu/sh3/probe.c | 6 + arch/sh/kernel/cpu/sh3/setup-sh7710.c | 43 +++++ arch/sh/kernel/cpu/sh4/Makefile | 1 + arch/sh/kernel/cpu/sh4/ex.S | 12 +- arch/sh/kernel/cpu/sh4/probe.c | 17 +- arch/sh/kernel/cpu/sh4/setup-sh7343.c | 43 +++++ arch/sh/kernel/process.c | 2 +- arch/sh/kernel/setup.c | 31 ++-- arch/sh/kernel/sh_ksyms.c | 3 +- arch/sh/mm/Kconfig | 30 ++- include/asm-sh/cpu-sh3/cache.h | 4 +- include/asm-sh/cpu-sh3/mmu_context.h | 8 +- include/asm-sh/cpu-sh3/timer.h | 1 + include/asm-sh/cpu-sh3/ubc.h | 15 +- include/asm-sh/irq-sh73180.h | 2 - include/asm-sh/irq-sh7343.h | 317 ++++++++++++++++++++++++++++++++ include/asm-sh/irq.h | 119 +++++++++++- include/asm-sh/processor.h | 8 +- 26 files changed, 767 insertions(+), 66 deletions(-) create mode 100644 arch/sh/kernel/cpu/sh3/clock-sh7706.c create mode 100644 arch/sh/kernel/cpu/sh3/setup-sh7710.c create mode 100644 arch/sh/kernel/cpu/sh4/setup-sh7343.c create mode 100644 include/asm-sh/irq-sh7343.h (limited to 'arch/sh/kernel') diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 035df7fb2237..557e7232141c 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -324,12 +324,11 @@ config SH_FPU_EMU config SH_DSP bool "DSP support" - depends on !CPU_SH4 - default y + default y if SH4AL_DSP || !CPU_SH4 + default n help Selecting this option will enable support for SH processors that - have DSP units (ie, SH2-DSP and SH3-DSP). It is safe to say Y here - by default, as the existance of the DSP will be probed at runtime. + have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP). This option must be set in order to enable the DSP. @@ -393,8 +392,9 @@ config SH_PCLK_FREQ int "Peripheral clock frequency (in Hz)" default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780 default "60000000" if CPU_SUBTYPE_SH7751 - default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7760 - default "27000000" if CPU_SUBTYPE_SH73180 + default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || \ + CPU_SUBTYPE_SH7760 + default "27000000" if CPU_SUBTYPE_SH73180 || CPU_SUBTYPE_SH7343 default "66000000" if CPU_SUBTYPE_SH4_202 help This option is used to specify the peripheral clock frequency. diff --git a/arch/sh/Makefile b/arch/sh/Makefile index 13b688b13e1c..d118e48ea1ba 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -18,11 +18,13 @@ cflags-y := -mb cflags-$(CONFIG_CPU_LITTLE_ENDIAN) := -ml isa-y := any +isa-$(CONFIG_SH_DSP) := sh isa-$(CONFIG_CPU_SH2) := sh2 +isa-$(CONFIG_CPU_SH2A) := sh2a isa-$(CONFIG_CPU_SH3) := sh3 isa-$(CONFIG_CPU_SH4) := sh4 isa-$(CONFIG_CPU_SH4A) := sh4a -isa-$(CONFIG_CPU_SH2A) := sh2a +isa-$(CONFIG_CPU_SH4AL_DSP) := sh4al isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp @@ -30,9 +32,11 @@ ifndef CONFIG_MMU isa-y := $(isa-y)-nommu endif +ifndef CONFIG_SH_DSP ifndef CONFIG_SH_FPU isa-y := $(isa-y)-nofpu endif +endif cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),) @@ -188,4 +192,3 @@ CLEAN_FILES += include/asm-sh/machtypes.h define archhelp @echo ' zImage - Compressed kernel image (arch/sh/boot/zImage)' endef - diff --git a/arch/sh/boards/hp6xx/setup.c b/arch/sh/boards/hp6xx/setup.c index 5fc00f0727c4..629016bec809 100644 --- a/arch/sh/boards/hp6xx/setup.c +++ b/arch/sh/boards/hp6xx/setup.c @@ -8,10 +8,11 @@ * * Setup code for an HP680 (internal peripherials only) */ - +#include #include -#include #include +#include +#include #include #include diff --git a/arch/sh/boards/renesas/hs7751rvoip/io.c b/arch/sh/boards/renesas/hs7751rvoip/io.c index 8c26550ca2e4..9ea1136b219b 100644 --- a/arch/sh/boards/renesas/hs7751rvoip/io.c +++ b/arch/sh/boards/renesas/hs7751rvoip/io.c @@ -10,10 +10,10 @@ * placeholder code from io_hs7751rvoip.c left in with the * expectation of later SuperIO and PCMCIA access. */ - #include #include #include +#include #include #include #include diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c index 0f545941fb4f..d2b715a04c7e 100644 --- a/arch/sh/kernel/cpu/irq/ipr.c +++ b/arch/sh/kernel/cpu/irq/ipr.c @@ -89,6 +89,7 @@ static void mask_and_ack_ipr(unsigned int irq) disable_ipr_irq(irq); #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) /* This is needed when we use edge triggered setting */ /* XXX: Is it really needed? */ @@ -162,6 +163,7 @@ void __init init_IRQ(void) #endif #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) /* * Initialize the Interrupt Controller (INTC) diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile index 1b292ae16f07..58d3815695ff 100644 --- a/arch/sh/kernel/cpu/sh3/Makefile +++ b/arch/sh/kernel/cpu/sh3/Makefile @@ -6,16 +6,19 @@ obj-y := ex.o probe.o # CPU subtype setup obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o +obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh7709.o obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh7709.o obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh7708.o obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh7709.o obj-$(CONFIG_CPU_SUBTYPE_SH7300) += setup-sh7300.o +obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o # Primary on-chip clocks (common) clock-$(CONFIG_CPU_SH3) := clock-sh3.o clock-$(CONFIG_CPU_SUBTYPE_SH7300) := clock-sh7300.o clock-$(CONFIG_CPU_SUBTYPE_SH7705) := clock-sh7705.o +clock-$(CONFIG_CPU_SUBTYPE_SH7706) := clock-sh7706.o clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o +clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7300.o obj-y += $(clock-y) - diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7706.c b/arch/sh/kernel/cpu/sh3/clock-sh7706.c new file mode 100644 index 000000000000..0cf96f9833bc --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/clock-sh7706.c @@ -0,0 +1,84 @@ +/* + * arch/sh/kernel/cpu/sh3/clock-sh7706.c + * + * SH7706 support for the clock framework + * + * Copyright (C) 2006 Takashi YOSHII + * + * Based on arch/sh/kernel/cpu/sh3/clock-sh7709.c + * Copyright (C) 2005 Andriy Skulysh + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include + +static int stc_multipliers[] = { 1, 2, 4, 1, 3, 6, 1, 1 }; +static int ifc_divisors[] = { 1, 2, 4, 1, 3, 1, 1, 1 }; +static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 }; + +static void master_clk_init(struct clk *clk) +{ + int frqcr = ctrl_inw(FRQCR); + int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); + + clk->rate *= pfc_divisors[idx]; +} + +static struct clk_ops sh7706_master_clk_ops = { + .init = master_clk_init, +}; + +static void module_clk_recalc(struct clk *clk) +{ + int frqcr = ctrl_inw(FRQCR); + int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); + + clk->rate = clk->parent->rate / pfc_divisors[idx]; +} + +static struct clk_ops sh7706_module_clk_ops = { + .recalc = module_clk_recalc, +}; + +static void bus_clk_recalc(struct clk *clk) +{ + int frqcr = ctrl_inw(FRQCR); + int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); + + clk->rate = clk->parent->rate / stc_multipliers[idx]; +} + +static struct clk_ops sh7706_bus_clk_ops = { + .recalc = bus_clk_recalc, +}; + +static void cpu_clk_recalc(struct clk *clk) +{ + int frqcr = ctrl_inw(FRQCR); + int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); + + clk->rate = clk->parent->rate / ifc_divisors[idx]; +} + +static struct clk_ops sh7706_cpu_clk_ops = { + .recalc = cpu_clk_recalc, +}; + +static struct clk_ops *sh7706_clk_ops[] = { + &sh7706_master_clk_ops, + &sh7706_module_clk_ops, + &sh7706_bus_clk_ops, + &sh7706_cpu_clk_ops, +}; + +void __init arch_init_clk_ops(struct clk_ops **ops, int idx) +{ + if (idx < ARRAY_SIZE(sh7706_clk_ops)) + *ops = sh7706_clk_ops[idx]; +} diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S index cc04e9e239ff..44daf44833f9 100644 --- a/arch/sh/kernel/cpu/sh3/ex.S +++ b/arch/sh/kernel/cpu/sh3/ex.S @@ -84,8 +84,12 @@ ENTRY(interrupt_table) .long do_IRQ ! rovi .long do_IRQ .long do_IRQ /* 5E0 */ -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ - defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ + defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7706) || \ + defined(CONFIG_CPU_SUBTYPE_SH7300) || \ + defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7710) .long do_IRQ ! 32 IRQ irq0 /* 600 */ .long do_IRQ ! 33 irq1 .long do_IRQ ! 34 irq2 @@ -147,6 +151,51 @@ ENTRY(interrupt_table) .long do_IRQ ! 62 PCC pcc0i .long do_IRQ ! 63 pcc1i /* 9E0 */ #endif +#if defined(CONFIG_CPU_SUBTYPE_SH7710) + .long exception_none ! 61 /* 9A0 */ + .long exception_none ! 62 + .long exception_none ! 63 + .long exception_none ! 64 /* A00 */ + .long exception_none ! 65 + .long exception_none ! 66 + .long exception_none ! 67 + .long exception_none ! 68 + .long exception_none ! 69 + .long exception_none ! 70 + .long exception_none ! 71 + .long exception_none ! 72 /* B00 */ + .long exception_none ! 73 + .long exception_none ! 74 + .long exception_none ! 75 + .long do_IRQ ! 76 DMAC2 dei4 /* B80 */ + .long do_IRQ ! 77 DMAC2 dei5 + .long exception_none ! 78 + .long do_IRQ ! 79 IPSEC ipseci /* BE0 */ + .long do_IRQ ! 80 EDMAC eint0 /* C00 */ + .long do_IRQ ! 81 EDMAC eint1 + .long do_IRQ ! 82 EDMAC eint2 + .long exception_none ! 83 /* C60 */ + .long exception_none ! 84 + .long exception_none ! 85 + .long exception_none ! 86 + .long exception_none ! 87 + .long exception_none ! 88 /* D00 */ + .long exception_none ! 89 + .long exception_none ! 90 + .long exception_none ! 91 + .long exception_none ! 92 + .long exception_none ! 93 + .long exception_none ! 94 + .long exception_none ! 95 + .long do_IRQ ! 96 SIOF eri0 /* E00 */ + .long do_IRQ ! 97 txi0 + .long do_IRQ ! 98 rxi0 + .long do_IRQ ! 99 cci0 + .long do_IRQ ! 100 eri1 /* E80 */ + .long do_IRQ ! 101 txi1 + .long do_IRQ ! 102 rxi2 + .long do_IRQ ! 103 cci3 +#endif #if defined(CONFIG_CPU_SUBTYPE_SH7300) .long do_IRQ ! 64 .long do_IRQ ! 65 @@ -195,4 +244,3 @@ ENTRY(interrupt_table) .long do_IRQ ! 108 #endif #endif - diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c index 5cdc88638601..e67098836290 100644 --- a/arch/sh/kernel/cpu/sh3/probe.c +++ b/arch/sh/kernel/cpu/sh3/probe.c @@ -72,6 +72,12 @@ int __init detect_cpu_and_cache_system(void) cpu_data->dcache.sets = 256; cpu_data->type = CPU_SH7729; +#if defined(CONFIG_CPU_SUBTYPE_SH7706) + cpu_data->type = CPU_SH7706; +#endif +#if defined(CONFIG_CPU_SUBTYPE_SH7710) + cpu_data->type = CPU_SH7710; +#endif #if defined(CONFIG_CPU_SUBTYPE_SH7705) cpu_data->type = CPU_SH7705; diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c new file mode 100644 index 000000000000..895f99ee6a95 --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c @@ -0,0 +1,43 @@ +/* + * SH7710 Setup + * + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xa4400000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 52, 53, 55, 54 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct platform_device *sh7710_devices[] __initdata = { + &sci_device, +}; + +static int __init sh7710_devices_setup(void) +{ + return platform_add_devices(sh7710_devices, + ARRAY_SIZE(sh7710_devices)); +} +__initcall(sh7710_devices_setup); diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile index 48946d54a2cd..8dbf3895ece7 100644 --- a/arch/sh/kernel/cpu/sh4/Makefile +++ b/arch/sh/kernel/cpu/sh4/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7760) += setup-sh7760.o obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o obj-$(CONFIG_CPU_SUBTYPE_SH73180) += setup-sh73180.o +obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o obj-$(CONFIG_CPU_SUBTYPE_SH4_202) += setup-sh4-202.o # Primary on-chip clocks (common) diff --git a/arch/sh/kernel/cpu/sh4/ex.S b/arch/sh/kernel/cpu/sh4/ex.S index af5ecbddea55..7146893a6cca 100644 --- a/arch/sh/kernel/cpu/sh4/ex.S +++ b/arch/sh/kernel/cpu/sh4/ex.S @@ -123,6 +123,13 @@ ENTRY(interrupt_table) .long do_IRQ ! 45 dmte5 .long do_IRQ ! 46 dmte6 .long do_IRQ ! 47 dmte7 /* 7E0 */ +#elif defined(CONFIG_CPU_SUBTYPE_SH7343) + .long do_IRQ ! 44 IIC1 ali /* 780 */ + .long do_IRQ ! 45 tacki + .long do_IRQ ! 46 waiti + .long do_IRQ ! 47 dtei /* 7E0 */ + .long do_IRQ ! 48 DMAC dei0 /* 800 */ + .long do_IRQ ! 49 dei1 /* 820 */ #else .long exception_error ! 44 /* 780 */ .long exception_error ! 45 @@ -132,7 +139,8 @@ ENTRY(interrupt_table) #if defined(CONFIG_SH_FPU) .long do_fpu_state_restore ! 48 /* 800 */ .long do_fpu_state_restore ! 49 /* 820 */ -#else +#elif !defined(CONFIG_CPU_SUBTYPE_SH7343) && \ + !defined(CONFIG_CPU_SUBTYPE_SH73180) .long exception_error .long exception_error #endif @@ -225,7 +233,7 @@ ENTRY(interrupt_table) .long exception_error .long do_IRQ ! ADC adi .long do_IRQ ! CMT cmti /* FA0 */ -#elif defined(CONFIG_CPU_SUBTYPE_SH73180) +#elif defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7343) .long do_IRQ ! 50 0x840 .long do_IRQ ! 51 0x860 .long do_IRQ ! 52 0x880 diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index 2a7707a81d8f..6e8a2b5268e8 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c @@ -3,7 +3,7 @@ * * CPU Subtype Probing for SH-4. * - * Copyright (C) 2001 - 2005 Paul Mundt + * Copyright (C) 2001 - 2006 Paul Mundt * Copyright (C) 2003 Richard Curnow * * This file is subject to the terms and conditions of the GNU General Public @@ -76,12 +76,6 @@ int __init detect_cpu_and_cache_system(void) cpu_data->type = CPU_SH73180; cpu_data->icache.ways = 4; cpu_data->dcache.ways = 4; - - /* - * XXX: Double check this, none of the SH-4A/SH-4AL processors - * should have this, as it's essentially a legacy thing. - */ - cpu_data->flags |= CPU_HAS_PTEA; break; case 0x2001: case 0x2004: @@ -89,8 +83,7 @@ int __init detect_cpu_and_cache_system(void) cpu_data->icache.ways = 4; cpu_data->dcache.ways = 4; - /* Same note as above applies here for PTEA */ - cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA; + cpu_data->flags |= CPU_HAS_FPU; break; case 0x2006: case 0x200A: @@ -104,6 +97,12 @@ int __init detect_cpu_and_cache_system(void) cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER; break; + case 0x3000: + case 0x3003: + cpu_data->type = CPU_SH7343; + cpu_data->icache.ways = 4; + cpu_data->dcache.ways = 4; + break; case 0x8000: cpu_data->type = CPU_ST40RA; cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA; diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7343.c b/arch/sh/kernel/cpu/sh4/setup-sh7343.c new file mode 100644 index 000000000000..91d61cf91ba1 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4/setup-sh7343.c @@ -0,0 +1,43 @@ +/* + * SH7343 Setup + * + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xffe00000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 80, 81, 83, 82 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct platform_device *sh7343_devices[] __initdata = { + &sci_device, +}; + +static int __init sh7343_devices_setup(void) +{ + return platform_add_devices(sh7343_devices, + ARRAY_SIZE(sh7343_devices)); +} +__initcall(sh7343_devices_setup); diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c index c4aa687ba26a..2167746e88f1 100644 --- a/arch/sh/kernel/process.c +++ b/arch/sh/kernel/process.c @@ -310,7 +310,7 @@ ubc_set_tracing(int asid, unsigned long pc) ctrl_outl(0, UBC_BAMRA); - if (cpu_data->type == CPU_SH7729) { + if (cpu_data->type == CPU_SH7729 || cpu_data->type == CPU_SH7710) { ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA); ctrl_outl(BRCR_PCBA | BRCR_PCTE, UBC_BRCR); } else { diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index 4afdec071700..86ef17fe48b5 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -424,25 +424,18 @@ static int __init topology_init(void) subsys_initcall(topology_init); static const char *cpu_name[] = { - [CPU_SH7604] = "SH7604", - [CPU_SH7705] = "SH7705", - [CPU_SH7708] = "SH7708", - [CPU_SH7729] = "SH7729", - [CPU_SH7300] = "SH7300", - [CPU_SH7750] = "SH7750", - [CPU_SH7750S] = "SH7750S", - [CPU_SH7750R] = "SH7750R", - [CPU_SH7751] = "SH7751", - [CPU_SH7751R] = "SH7751R", - [CPU_SH7760] = "SH7760", - [CPU_SH73180] = "SH73180", - [CPU_ST40RA] = "ST40RA", - [CPU_ST40GX1] = "ST40GX1", - [CPU_SH4_202] = "SH4-202", - [CPU_SH4_501] = "SH4-501", - [CPU_SH7770] = "SH7770", - [CPU_SH7780] = "SH7780", - [CPU_SH7781] = "SH7781", + [CPU_SH7604] = "SH7604", [CPU_SH7300] = "SH7300", + [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", + [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", + [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710", + [CPU_SH7729] = "SH7729", [CPU_SH7750] = "SH7750", + [CPU_SH7750S] = "SH7750S", [CPU_SH7750R] = "SH7750R", + [CPU_SH7751] = "SH7751", [CPU_SH7751R] = "SH7751R", + [CPU_SH7760] = "SH7760", [CPU_SH73180] = "SH73180", + [CPU_ST40RA] = "ST40RA", [CPU_ST40GX1] = "ST40GX1", + [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501", + [CPU_SH7770] = "SH7770", [CPU_SH7780] = "SH7780", + [CPU_SH7781] = "SH7781", [CPU_SH7343] = "SH7343", [CPU_SH_NONE] = "Unknown" }; diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms.c index bf59d73415d7..d3cbfa2ad4a7 100644 --- a/arch/sh/kernel/sh_ksyms.c +++ b/arch/sh/kernel/sh_ksyms.c @@ -89,7 +89,8 @@ EXPORT_SYMBOL(flush_dcache_page); EXPORT_SYMBOL(__flush_purge_region); #endif -#ifdef CONFIG_MMU +#if defined(CONFIG_MMU) && (defined(CONFIG_CPU_SH4) || \ + defined(CONFIG_SH7705_CACHE_32KB)) EXPORT_SYMBOL(clear_user_page); #endif diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig index bed697c0dc19..b445d02075e8 100644 --- a/arch/sh/mm/Kconfig +++ b/arch/sh/mm/Kconfig @@ -21,6 +21,10 @@ config CPU_SH4A bool select CPU_SH4 +config CPU_SH4AL_DSP + bool + select CPU_SH4A + config CPU_SUBTYPE_ST40 bool select CPU_SH4 @@ -47,6 +51,12 @@ config CPU_SUBTYPE_SH7705 select CPU_SH3 select CPU_HAS_PINT_IRQ +config CPU_SUBTYPE_SH7706 + bool "Support SH7706 processor" + select CPU_SH3 + help + Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. + config CPU_SUBTYPE_SH7707 bool "Support SH7707 processor" select CPU_SH3 @@ -68,6 +78,12 @@ config CPU_SUBTYPE_SH7709 help Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. +config CPU_SUBTYPE_SH7710 + bool "Support SH7710 processor" + select CPU_SH3 + help + Select SH7710 if you have a SH3-DSP SH7710 CPU. + comment "SH-4 Processor Support" config CPU_SUBTYPE_SH7750 @@ -132,10 +148,6 @@ config CPU_SUBTYPE_ST40GX1 comment "SH-4A Processor Support" -config CPU_SUBTYPE_SH73180 - bool "Support SH73180 processor" - select CPU_SH4A - config CPU_SUBTYPE_SH7770 bool "Support SH7770 processor" select CPU_SH4A @@ -145,6 +157,16 @@ config CPU_SUBTYPE_SH7780 select CPU_SH4A select CPU_HAS_INTC2_IRQ +comment "SH4AL-DSP Processor Support" + +config CPU_SUBTYPE_SH73180 + bool "Support SH73180 processor" + select CPU_SH4AL_DSP + +config CPU_SUBTYPE_SH7343 + bool "Support SH7343 processor" + select CPU_SH4AL_DSP + endmenu menu "Memory management options" diff --git a/include/asm-sh/cpu-sh3/cache.h b/include/asm-sh/cpu-sh3/cache.h index 406aa8d9b947..ffe08d2813f9 100644 --- a/include/asm-sh/cpu-sh3/cache.h +++ b/include/asm-sh/cpu-sh3/cache.h @@ -26,12 +26,10 @@ #define CCR_CACHE_ENABLE CCR_CACHE_CE #define CCR_CACHE_INVALIDATE CCR_CACHE_CF -#if defined(CONFIG_CPU_SUBTYPE_SH7705) +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7710) #define CCR3 0xa40000b4 #define CCR_CACHE_16KB 0x00010000 #define CCR_CACHE_32KB 0x00020000 #endif - #endif /* __ASM_CPU_SH3_CACHE_H */ - diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h index a844ea0965b6..bccb7ddb438b 100644 --- a/include/asm-sh/cpu-sh3/mmu_context.h +++ b/include/asm-sh/cpu-sh3/mmu_context.h @@ -27,8 +27,12 @@ #define TRA 0xffffffd0 #define EXPEVT 0xffffffd4 -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ - defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ + defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7706) || \ + defined(CONFIG_CPU_SUBTYPE_SH7300) || \ + defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7710) #define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */ #else #define INTEVT 0xffffffd8 diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h index 2082ad956f21..b2394cf76f49 100644 --- a/include/asm-sh/cpu-sh3/timer.h +++ b/include/asm-sh/cpu-sh3/timer.h @@ -20,6 +20,7 @@ * SH7710 * SH7720 * SH7300 + * SH7710 * --------------------------------------------------------------------------- */ diff --git a/include/asm-sh/cpu-sh3/ubc.h b/include/asm-sh/cpu-sh3/ubc.h index 0f809dec4e17..9d308cbe9b29 100644 --- a/include/asm-sh/cpu-sh3/ubc.h +++ b/include/asm-sh/cpu-sh3/ubc.h @@ -11,6 +11,19 @@ #ifndef __ASM_CPU_SH3_UBC_H #define __ASM_CPU_SH3_UBC_H +#if defined(CONFIG_CPU_SUBTYPE_SH7710) +#define UBC_BARA 0xa4ffffb0 +#define UBC_BAMRA 0xa4ffffb4 +#define UBC_BBRA 0xa4ffffb8 +#define UBC_BASRA 0xffffffe4 +#define UBC_BARB 0xa4ffffa0 +#define UBC_BAMRB 0xa4ffffa4 +#define UBC_BBRB 0xa4ffffa8 +#define UBC_BASRB 0xffffffe8 +#define UBC_BDRB 0xa4ffff90 +#define UBC_BDMRB 0xa4ffff94 +#define UBC_BRCR 0xa4ffff98 +#else #define UBC_BARA 0xffffffb0 #define UBC_BAMRA 0xffffffb4 #define UBC_BBRA 0xffffffb8 @@ -22,6 +35,6 @@ #define UBC_BDRB 0xffffff90 #define UBC_BDMRB 0xffffff94 #define UBC_BRCR 0xffffff98 +#endif #endif /* __ASM_CPU_SH3_UBC_H */ - diff --git a/include/asm-sh/irq-sh73180.h b/include/asm-sh/irq-sh73180.h index d705252be260..b28af9a69d72 100644 --- a/include/asm-sh/irq-sh73180.h +++ b/include/asm-sh/irq-sh73180.h @@ -311,6 +311,4 @@ #define IRQ6_PRIORITY 1 #define IRQ7_PRIORITY 1 -int shmse_irq_demux(int irq); - #endif /* __ASM_SH_IRQ_SH73180_H */ diff --git a/include/asm-sh/irq-sh7343.h b/include/asm-sh/irq-sh7343.h new file mode 100644 index 000000000000..5d15419b53b0 --- /dev/null +++ b/include/asm-sh/irq-sh7343.h @@ -0,0 +1,317 @@ +#ifndef __ASM_SH_IRQ_SH7343_H +#define __ASM_SH_IRQ_SH7343_H + +/* + * linux/include/asm-sh/irq-sh7343.h + * + * Copyright (C) 2006 Kenati Technologies Inc. + * Andre Mccurdy + * Ranjit Deshpande + */ + +#undef INTC_IPRA +#undef INTC_IPRB +#undef INTC_IPRC +#undef INTC_IPRD + +#undef DMTE0_IRQ +#undef DMTE1_IRQ +#undef DMTE2_IRQ +#undef DMTE3_IRQ +#undef DMTE4_IRQ +#undef DMTE5_IRQ +#undef DMTE6_IRQ +#undef DMTE7_IRQ +#undef DMAE_IRQ +#undef DMA_IPR_ADDR +#undef DMA_IPR_POS +#undef DMA_PRIORITY + +#undef INTC_IMCR0 +#undef INTC_IMCR1 +#undef INTC_IMCR2 +#undef INTC_IMCR3 +#undef INTC_IMCR4 +#undef INTC_IMCR5 +#undef INTC_IMCR6 +#undef INTC_IMCR7 +#undef INTC_IMCR8 +#undef INTC_IMCR9 +#undef INTC_IMCR10 + + +#define INTC_IPRA 0xA4080000UL +#define INTC_IPRB 0xA4080004UL +#define INTC_IPRC 0xA4080008UL +#define INTC_IPRD 0xA408000CUL +#define INTC_IPRE 0xA4080010UL +#define INTC_IPRF 0xA4080014UL +#define INTC_IPRG 0xA4080018UL +#define INTC_IPRH 0xA408001CUL +#define INTC_IPRI 0xA4080020UL +#define INTC_IPRJ 0xA4080024UL +#define INTC_IPRK 0xA4080028UL +#define INTC_IPRL 0xA408002CUL + +#define INTC_IMR0 0xA4080080UL +#define INTC_IMR1 0xA4080084UL +#define INTC_IMR2 0xA4080088UL +#define INTC_IMR3 0xA408008CUL +#define INTC_IMR4 0xA4080090UL +#define INTC_IMR5 0xA4080094UL +#define INTC_IMR6 0xA4080098UL +#define INTC_IMR7 0xA408009CUL +#define INTC_IMR8 0xA40800A0UL +#define INTC_IMR9 0xA40800A4UL +#define INTC_IMR10 0xA40800A8UL +#define INTC_IMR11 0xA40800ACUL + +#define INTC_IMCR0 0xA40800C0UL +#define INTC_IMCR1 0xA40800C4UL +#define INTC_IMCR2 0xA40800C8UL +#define INTC_IMCR3 0xA40800CCUL +#define INTC_IMCR4 0xA40800D0UL +#define INTC_IMCR5 0xA40800D4UL +#define INTC_IMCR6 0xA40800D8UL +#define INTC_IMCR7 0xA40800DCUL +#define INTC_IMCR8 0xA40800E0UL +#define INTC_IMCR9 0xA40800E4UL +#define INTC_IMCR10 0xA40800E8UL +#define INTC_IMCR11 0xA40800ECUL + +#define INTC_ICR0 0xA4140000UL +#define INTC_ICR1 0xA414001CUL + +#define INTMSK0 0xa4140044 +#define INTMSKCLR0 0xa4140064 +#define INTC_INTPRI0 0xa4140010 + +/* + NOTE: + + *_IRQ = (INTEVT2 - 0x200)/0x20 +*/ + +/* TMU0 */ +#define TMU0_IRQ 16 +#define TMU0_IPR_ADDR INTC_IPRA +#define TMU0_IPR_POS 3 +#define TMU0_PRIORITY 2 + +#define TIMER_IRQ 16 +#define TIMER_IPR_ADDR INTC_IPRA +#define TIMER_IPR_POS 3 +#define TIMER_PRIORITY 2 + +/* TMU1 */ +#define TMU1_IRQ 17 +#define TMU1_IPR_ADDR INTC_IPRA +#define TMU1_IPR_POS 2 +#define TMU1_PRIORITY 2 + +/* TMU2 */ +#define TMU2_IRQ 18 +#define TMU2_IPR_ADDR INTC_IPRA +#define TMU2_IPR_POS 1 +#define TMU2_PRIORITY 2 + +/* LCDC */ +#define LCDC_IRQ 28 +#define LCDC_IPR_ADDR INTC_IPRB +#define LCDC_IPR_POS 2 +#define LCDC_PRIORITY 2 + +/* VIO (Video I/O) */ +#define CEU_IRQ 52 +#define BEU_IRQ 53 +#define VEU_IRQ 54 +#define VOU_IRQ 55 +#define VIO_IPR_ADDR INTC_IPRE +#define VIO_IPR_POS 2 +#define VIO_PRIORITY 2 + +/* MFI (Multi Functional Interface) */ +#define MFI_IRQ 56 +#define MFI_IPR_ADDR INTC_IPRE +#define MFI_IPR_POS 1 +#define MFI_PRIORITY 2 + +/* VPU (Video Processing Unit) */ +#define VPU_IRQ 60 +#define VPU_IPR_ADDR INTC_IPRE +#define VPU_IPR_POS 0 +#define VPU_PRIORITY 2 + +/* 3DG */ +#define TDG_IRQ 63 +#define TDG_IPR_ADDR INTC_IPRJ +#define TDG_IPR_POS 2 +#define TDG_PRIORITY 2 + +/* DMAC(1) */ +#define DMTE0_IRQ 48 +#define DMTE1_IRQ 49 +#define DMTE2_IRQ 50 +#define DMTE3_IRQ 51 +#define DMA1_IPR_ADDR INTC_IPRE +#define DMA1_IPR_POS 3 +#define DMA1_PRIORITY 7 + +/* DMAC(2) */ +#define DMTE4_IRQ 76 +#define DMTE5_IRQ 77 +#define DMA2_IPR_ADDR INTC_IPRF +#define DMA2_IPR_POS 2 +#define DMA2_PRIORITY 7 + +/* SCIF0 */ +#define SCIF_ERI_IRQ 80 +#define SCIF_RXI_IRQ 81 +#define SCIF_BRI_IRQ 82 +#define SCIF_TXI_IRQ 83 +#define SCIF_IPR_ADDR INTC_IPRG +#define SCIF_IPR_POS 3 +#define SCIF_PRIORITY 3 + +/* SIOF0 */ +#define SIOF0_IRQ 84 +#define SIOF0_IPR_ADDR INTC_IPRH +#define SIOF0_IPR_POS 3 +#define SIOF0_PRIORITY 3 + +/* FLCTL (Flash Memory Controller) */ +#define FLSTE_IRQ 92 +#define FLTEND_IRQ 93 +#define FLTRQ0_IRQ 94 +#define FLTRQ1_IRQ 95 +#define FLCTL_IPR_ADDR INTC_IPRH +#define FLCTL_IPR_POS 1 +#define FLCTL_PRIORITY 3 + +/* IIC(0) (IIC Bus Interface) */ +#define IIC0_ALI_IRQ 96 +#define IIC0_TACKI_IRQ 97 +#define IIC0_WAITI_IRQ 98 +#define IIC0_DTEI_IRQ 99 +#define IIC0_IPR_ADDR INTC_IPRH +#define IIC0_IPR_POS 0 +#define IIC0_PRIORITY 3 + +/* IIC(1) (IIC Bus Interface) */ +#define IIC1_ALI_IRQ 44 +#define IIC1_TACKI_IRQ 45 +#define IIC1_WAITI_IRQ 46 +#define IIC1_DTEI_IRQ 47 +#define IIC1_IPR_ADDR INTC_IPRI +#define IIC1_IPR_POS 0 +#define IIC1_PRIORITY 3 + +/* SIO0 */ +#define SIO0_IRQ 88 +#define SIO0_IPR_ADDR INTC_IPRI +#define SIO0_IPR_POS 3 +#define SIO0_PRIORITY 3 + +/* SDHI */ +#define SDHI_SDHII0_IRQ 100 +#define SDHI_SDHII1_IRQ 101 +#define SDHI_SDHII2_IRQ 102 +#define SDHI_SDHII3_IRQ 103 +#define SDHI_IPR_ADDR INTC_IPRK +#define SDHI_IPR_POS 0 +#define SDHI_PRIORITY 3 + +/* SIU (Sound Interface Unit) */ +#define SIU_IRQ 108 +#define SIU_IPR_ADDR INTC_IPRJ +#define SIU_IPR_POS 1 +#define SIU_PRIORITY 3 + +#define PORT_PACR 0xA4050100UL +#define PORT_PBCR 0xA4050102UL +#define PORT_PCCR 0xA4050104UL +#define PORT_PDCR 0xA4050106UL +#define PORT_PECR 0xA4050108UL +#define PORT_PFCR 0xA405010AUL +#define PORT_PGCR 0xA405010CUL +#define PORT_PHCR 0xA405010EUL +#define PORT_PJCR 0xA4050110UL +#define PORT_PKCR 0xA4050112UL +#define PORT_PLCR 0xA4050114UL +#define PORT_SCPCR 0xA4050116UL +#define PORT_PMCR 0xA4050118UL +#define PORT_PNCR 0xA405011AUL +#define PORT_PQCR 0xA405011CUL +#define PORT_PRCR 0xA405011EUL +#define PORT_PTCR 0xA405014CUL +#define PORT_PUCR 0xA405014EUL +#define PORT_PVCR 0xA4050150UL + +#define PORT_PSELA 0xA4050140UL +#define PORT_PSELB 0xA4050142UL +#define PORT_PSELC 0xA4050144UL +#define PORT_PSELE 0xA4050158UL + +#define PORT_HIZCRA 0xA4050146UL +#define PORT_HIZCRB 0xA4050148UL +#define PORT_DRVCR 0xA405014AUL + +#define PORT_PADR 0xA4050120UL +#define PORT_PBDR 0xA4050122UL +#define PORT_PCDR 0xA4050124UL +#define PORT_PDDR 0xA4050126UL +#define PORT_PEDR 0xA4050128UL +#define PORT_PFDR 0xA405012AUL +#define PORT_PGDR 0xA405012CUL +#define PORT_PHDR 0xA405012EUL +#define PORT_PJDR 0xA4050130UL +#define PORT_PKDR 0xA4050132UL +#define PORT_PLDR 0xA4050134UL +#define PORT_SCPDR 0xA4050136UL +#define PORT_PMDR 0xA4050138UL +#define PORT_PNDR 0xA405013AUL +#define PORT_PQDR 0xA405013CUL +#define PORT_PRDR 0xA405013EUL +#define PORT_PTDR 0xA405016CUL +#define PORT_PUDR 0xA405016EUL +#define PORT_PVDR 0xA4050170UL + +#define IRQ0_IRQ 32 +#define IRQ1_IRQ 33 +#define IRQ2_IRQ 34 +#define IRQ3_IRQ 35 +#define IRQ4_IRQ 36 +#define IRQ5_IRQ 37 +#define IRQ6_IRQ 38 +#define IRQ7_IRQ 39 + +#define INTPRI00 0xA4140010UL + +#define IRQ0_IPR_ADDR INTPRI00 +#define IRQ1_IPR_ADDR INTPRI00 +#define IRQ2_IPR_ADDR INTPRI00 +#define IRQ3_IPR_ADDR INTPRI00 +#define IRQ4_IPR_ADDR INTPRI00 +#define IRQ5_IPR_ADDR INTPRI00 +#define IRQ6_IPR_ADDR INTPRI00 +#define IRQ7_IPR_ADDR INTPRI00 + +#define IRQ0_IPR_POS 7 +#define IRQ1_IPR_POS 6 +#define IRQ2_IPR_POS 5 +#define IRQ3_IPR_POS 4 +#define IRQ4_IPR_POS 3 +#define IRQ5_IPR_POS 2 +#define IRQ6_IPR_POS 1 +#define IRQ7_IPR_POS 0 + +#define IRQ0_PRIORITY 1 +#define IRQ1_PRIORITY 1 +#define IRQ2_PRIORITY 1 +#define IRQ3_PRIORITY 1 +#define IRQ4_PRIORITY 1 +#define IRQ5_PRIORITY 1 +#define IRQ6_PRIORITY 1 +#define IRQ7_PRIORITY 1 + +#endif /* __ASM_SH_IRQ_SH7343_H */ diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index 648102e9236f..00886f9adb4d 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -192,7 +192,7 @@ #if defined (CONFIG_CPU_SUBTYPE_SH7707) || defined (CONFIG_CPU_SUBTYPE_SH7708) || \ defined (CONFIG_CPU_SUBTYPE_SH7709) || defined (CONFIG_CPU_SUBTYPE_SH7750) || \ - defined (CONFIG_CPU_SUBTYPE_SH7751) + defined (CONFIG_CPU_SUBTYPE_SH7751) || defined (CONFIG_CPU_SUBTYPE_SH7706) #define SCI_ERI_IRQ 23 #define SCI_RXI_IRQ 24 #define SCI_TXI_IRQ 25 @@ -207,6 +207,7 @@ #define SCIF0_IPR_POS 3 #define SCIF0_PRIORITY 3 #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7707) || \ defined(CONFIG_CPU_SUBTYPE_SH7709) #define SCIF_ERI_IRQ 56 @@ -261,9 +262,12 @@ #elif defined(CONFIG_CPU_SUBTYPE_SH7708) # define ONCHIP_NR_IRQS 32 #elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7705) # define ONCHIP_NR_IRQS 64 // Actually 61 # define PINT_NR_IRQS 16 +#elif defined(CONFIG_CPU_SUBTYPE_SH7710) +# define ONCHIP_NR_IRQS 104 #elif defined(CONFIG_CPU_SUBTYPE_SH7750) # define ONCHIP_NR_IRQS 48 // Actually 44 #elif defined(CONFIG_CPU_SUBTYPE_SH7751) @@ -275,7 +279,8 @@ #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) # define ONCHIP_NR_IRQS 144 #elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \ - defined(CONFIG_CPU_SUBTYPE_SH73180) + defined(CONFIG_CPU_SUBTYPE_SH73180) || \ + defined(CONFIG_CPU_SUBTYPE_SH7343) # define ONCHIP_NR_IRQS 109 #elif defined(CONFIG_CPU_SUBTYPE_SH7780) # define ONCHIP_NR_IRQS 111 @@ -476,8 +481,10 @@ extern int ipr_irq_demux(int irq); #define INTC_ICR 0xfffffee0UL #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7707) || \ - defined(CONFIG_CPU_SUBTYPE_SH7709) + defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7710) #define INTC_IRR0 0xa4000004UL #define INTC_IRR1 0xa4000006UL #define INTC_IRR2 0xa4000008UL @@ -496,8 +503,105 @@ extern int ipr_irq_demux(int irq); #define INTC_IPRF 0xa4080000UL #define INTC_IPRG 0xa4080002UL #define INTC_IPRH 0xa4080004UL -#endif +#elif defined(CONFIG_CPU_SUBTYPE_SH7710) +/* Interrupt Controller Registers */ +#undef INTC_IPRA +#undef INTC_IPRB +#define INTC_IPRA 0xA414FEE2UL +#define INTC_IPRB 0xA414FEE4UL +#define INTC_IPRF 0xA4080000UL +#define INTC_IPRG 0xA4080002UL +#define INTC_IPRH 0xA4080004UL +#define INTC_IPRI 0xA4080006UL + +#undef INTC_ICR0 +#undef INTC_ICR1 +#define INTC_ICR0 0xA414FEE0UL +#define INTC_ICR1 0xA4140010UL + +#define INTC_IRR0 0xa4000004UL +#define INTC_IRR1 0xa4000006UL +#define INTC_IRR2 0xa4000008UL +#define INTC_IRR3 0xa400000AUL +#define INTC_IRR4 0xa400000CUL +#define INTC_IRR5 0xa4080020UL +#define INTC_IRR7 0xa4080024UL +#define INTC_IRR8 0xa4080026UL + +/* Interrupt numbers */ +#define TIMER2_IRQ 18 +#define TIMER2_IPR_ADDR INTC_IPRA +#define TIMER2_IPR_POS 1 +#define TIMER2_PRIORITY 2 +/* WDT */ +#define WDT_IRQ 27 +#define WDT_IPR_ADDR INTC_IPRB +#define WDT_IPR_POS 3 +#define WDT_PRIORITY 2 + +#define SCIF0_ERI_IRQ 52 +#define SCIF0_RXI_IRQ 53 +#define SCIF0_BRI_IRQ 54 +#define SCIF0_TXI_IRQ 55 +#define SCIF0_IPR_ADDR INTC_IPRE +#define SCIF0_IPR_POS 2 +#define SCIF0_PRIORITY 3 + +#define DMTE4_IRQ 76 +#define DMTE5_IRQ 77 +#define DMA2_IPR_ADDR INTC_IPRF +#define DMA2_IPR_POS 2 +#define DMA2_PRIORITY 7 + +#define IPSEC_IRQ 79 +#define IPSEC_IPR_ADDR INTC_IPRF +#define IPSEC_IPR_POS 3 +#define IPSEC_PRIORITY 3 + +/* EDMAC */ +#define EDMAC0_IRQ 80 +#define EDMAC0_IPR_ADDR INTC_IPRG +#define EDMAC0_IPR_POS 3 +#define EDMAC0_PRIORITY 3 + +#define EDMAC1_IRQ 81 +#define EDMAC1_IPR_ADDR INTC_IPRG +#define EDMAC1_IPR_POS 2 +#define EDMAC1_PRIORITY 3 + +#define EDMAC2_IRQ 82 +#define EDMAC2_IPR_ADDR INTC_IPRG +#define EDMAC2_IPR_POS 1 +#define EDMAC2_PRIORITY 3 + +/* SIOF */ +#define SIOF0_ERI_IRQ 96 +#define SIOF0_TXI_IRQ 97 +#define SIOF0_RXI_IRQ 98 +#define SIOF0_CCI_IRQ 99 +#define SIOF0_IPR_ADDR INTC_IPRH +#define SIOF0_IPR_POS 0 +#define SIOF0_PRIORITY 7 + +#define SIOF1_ERI_IRQ 100 +#define SIOF1_TXI_IRQ 101 +#define SIOF1_RXI_IRQ 102 +#define SIOF1_CCI_IRQ 103 +#define SIOF1_IPR_ADDR INTC_IPRI +#define SIOF1_IPR_POS 1 +#define SIOF1_PRIORITY 7 +#endif /* CONFIG_CPU_SUBTYPE_SH7710 */ + +#if defined(CONFIG_CPU_SUBTYPE_SH7710) +#define PORT_PACR 0xa4050100UL +#define PORT_PBCR 0xa4050102UL +#define PORT_PCCR 0xa4050104UL +#define PORT_PETCR 0xa4050106UL +#define PORT_PADR 0xa4050120UL +#define PORT_PBDR 0xa4050122UL +#define PORT_PCDR 0xa4050124UL +#else #define PORT_PACR 0xa4000100UL #define PORT_PBCR 0xa4000102UL #define PORT_PCCR 0xa4000104UL @@ -506,6 +610,7 @@ extern int ipr_irq_demux(int irq); #define PORT_PBDR 0xa4000122UL #define PORT_PCDR 0xa4000124UL #define PORT_PFDR 0xa400012aUL +#endif #define IRQ0_IRQ 32 #define IRQ1_IRQ 33 @@ -599,6 +704,8 @@ void intc2_add_clear_irq(int irq, int (*fn)(int)); #endif +extern int shmse_irq_demux(int irq); + static inline int generic_irq_demux(int irq) { return irq; @@ -614,4 +721,8 @@ static inline int generic_irq_demux(int irq) #include #endif +#if defined(CONFIG_CPU_SUBTYPE_SH7343) +#include +#endif + #endif /* __ASM_SH_IRQ_H */ diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index a22732007dd4..3b3ef4f2bf31 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -38,13 +38,15 @@ enum cpu_type { CPU_SH7604, /* SH-3 types */ - CPU_SH7705, CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R, - CPU_SH7709, CPU_SH7709A, CPU_SH7729, CPU_SH7300, + CPU_SH7705, CPU_SH7706, CPU_SH7707, + CPU_SH7708, CPU_SH7708S, CPU_SH7708R, + CPU_SH7709, CPU_SH7709A, CPU_SH7710, + CPU_SH7729, CPU_SH7300, /* SH-4 types */ CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501, - CPU_SH73180, CPU_SH7770, CPU_SH7780, CPU_SH7781, + CPU_SH73180, CPU_SH7343, CPU_SH7770, CPU_SH7780, CPU_SH7781, /* Unknown subtype */ CPU_SH_NONE -- cgit v1.2.3 From 91550f715b7f7707b5ab5b9b0cd455bda8505954 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:45:01 +0900 Subject: sh: Kill off the rest of the legacy rtc mess. With the new RTC class driver, we can get rid of most of the old left over cruft. Signed-off-by: Paul Mundt --- arch/sh/Kconfig | 13 ---- arch/sh/boards/snapgear/rtc.c | 27 +------ arch/sh/kernel/cpu/Makefile | 1 - arch/sh/kernel/cpu/irq/ipr.c | 2 +- arch/sh/kernel/cpu/rtc.c | 128 -------------------------------- arch/sh/kernel/time.c | 41 +++++----- drivers/char/Kconfig | 2 +- include/asm-sh/mc146818rtc.h | 169 ------------------------------------------ include/asm-sh/rtc.h | 21 ------ 9 files changed, 23 insertions(+), 381 deletions(-) delete mode 100644 arch/sh/kernel/cpu/rtc.c (limited to 'arch/sh/kernel') diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 5bec3af164e5..c7e3596dcde1 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -296,19 +296,6 @@ config CPU_LITTLE_ENDIAN endian byte order. These modes require different kernels. Say Y if your machine is little endian, N if it's a big endian machine. -# The SH7750 RTC module is disabled in the Dreamcast -config SH_RTC - bool - depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE && \ - !SH_73180_SOLUTION_ENGINE && !SH_LANDISK && \ - !SH_R7780RP && !SH_SHMIN - default y - help - Selecting this option will allow the Linux kernel to emulate - PC's RTC. - - If unsure, say N. - config SH_FPU bool "FPU support" depends on !CPU_SH3 diff --git a/arch/sh/boards/snapgear/rtc.c b/arch/sh/boards/snapgear/rtc.c index 722479deb55a..1659fdd6695a 100644 --- a/arch/sh/boards/snapgear/rtc.c +++ b/arch/sh/boards/snapgear/rtc.c @@ -19,9 +19,7 @@ #include #include -/****************************************************************************/ - -static int use_ds1302 = 0; +static int use_ds1302; /****************************************************************************/ /* @@ -79,10 +77,6 @@ static unsigned int ds1302_readbyte(unsigned int addr) unsigned int val; unsigned long flags; -#if 0 - printk("SnapGear RTC: ds1302_readbyte(addr=%x)\n", addr); -#endif - local_irq_save(flags); set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK); set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); @@ -101,10 +95,6 @@ static void ds1302_writebyte(unsigned int addr, unsigned int val) { unsigned long flags; -#if 0 - printk("SnapGear RTC: ds1302_writebyte(addr=%x)\n", addr); -#endif - local_irq_save(flags); set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK); set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); @@ -167,9 +157,6 @@ void __init secureedge5410_rtc_init(void) if (use_ds1302) { rtc_sh_get_time = snapgear_rtc_gettimeofday; rtc_sh_set_time = snapgear_rtc_settimeofday; - } else { - rtc_sh_get_time = sh_rtc_gettimeofday; - rtc_sh_set_time = sh_rtc_settimeofday; } printk("SnapGear RTC: using %s rtc.\n", use_ds1302 ? "ds1302" : "internal"); @@ -184,10 +171,8 @@ void snapgear_rtc_gettimeofday(struct timespec *ts) { unsigned int sec, min, hr, day, mon, yr; - if (!use_ds1302) { - sh_rtc_gettimeofday(ts); + if (!use_ds1302) return; - } sec = bcd2int(ds1302_readbyte(RTC_ADDR_SEC)); min = bcd2int(ds1302_readbyte(RTC_ADDR_MIN)); @@ -228,7 +213,7 @@ int snapgear_rtc_settimeofday(const time_t secs) unsigned long nowtime; if (!use_ds1302) - return sh_rtc_settimeofday(secs); + return 0; /* * This is called direct from the kernel timer handling code. @@ -237,10 +222,6 @@ int snapgear_rtc_settimeofday(const time_t secs) nowtime = secs; -#if 1 - printk("SnapGear RTC: snapgear_rtc_settimeofday(nowtime=%ld)\n", nowtime); -#endif - /* STOP RTC */ ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80); @@ -326,5 +307,3 @@ void secureedge5410_cmos_write(unsigned char val, int addr) default: break; } } - -/****************************************************************************/ diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile index 59d5b748752f..fb5dac069382 100644 --- a/arch/sh/kernel/cpu/Makefile +++ b/arch/sh/kernel/cpu/Makefile @@ -8,6 +8,5 @@ obj-$(CONFIG_CPU_SH2) += sh2/ obj-$(CONFIG_CPU_SH3) += sh3/ obj-$(CONFIG_CPU_SH4) += sh4/ -obj-$(CONFIG_SH_RTC) += rtc.o obj-$(CONFIG_UBC_WAKEUP) += ubc.o obj-$(CONFIG_SH_ADC) += adc.o diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c index d2b715a04c7e..00edee971bcb 100644 --- a/arch/sh/kernel/cpu/irq/ipr.c +++ b/arch/sh/kernel/cpu/irq/ipr.c @@ -124,7 +124,7 @@ void __init init_IRQ(void) #ifndef CONFIG_CPU_SUBTYPE_SH7780 make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY); make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY); -#if defined(CONFIG_SH_RTC) +#ifdef RTC_IRQ make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY); #endif diff --git a/arch/sh/kernel/cpu/rtc.c b/arch/sh/kernel/cpu/rtc.c deleted file mode 100644 index 4304cf75cfa2..000000000000 --- a/arch/sh/kernel/cpu/rtc.c +++ /dev/null @@ -1,128 +0,0 @@ -/* - * linux/arch/sh/kernel/rtc.c -- SH3 / SH4 on-chip RTC support - * - * Copyright (C) 2000 Philipp Rumpf - * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka - */ - -#include -#include -#include -#include -#include -#include -#include - -void sh_rtc_gettimeofday(struct timespec *ts) -{ - unsigned int sec128, sec, sec2, min, hr, wk, day, mon, yr, yr100, cf_bit; - unsigned long flags; - - again: - do { - local_irq_save(flags); - ctrl_outb(0, RCR1); /* Clear CF-bit */ - sec128 = ctrl_inb(R64CNT); - sec = ctrl_inb(RSECCNT); - min = ctrl_inb(RMINCNT); - hr = ctrl_inb(RHRCNT); - wk = ctrl_inb(RWKCNT); - day = ctrl_inb(RDAYCNT); - mon = ctrl_inb(RMONCNT); -#if defined(CONFIG_CPU_SH4) - yr = ctrl_inw(RYRCNT); - yr100 = (yr >> 8); - yr &= 0xff; -#else - yr = ctrl_inb(RYRCNT); - yr100 = (yr == 0x99) ? 0x19 : 0x20; -#endif - sec2 = ctrl_inb(R64CNT); - cf_bit = ctrl_inb(RCR1) & RCR1_CF; - local_irq_restore(flags); - } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0); - - BCD_TO_BIN(yr100); - BCD_TO_BIN(yr); - BCD_TO_BIN(mon); - BCD_TO_BIN(day); - BCD_TO_BIN(hr); - BCD_TO_BIN(min); - BCD_TO_BIN(sec); - - if (yr > 99 || mon < 1 || mon > 12 || day > 31 || day < 1 || - hr > 23 || min > 59 || sec > 59) { - printk(KERN_ERR - "SH RTC: invalid value, resetting to 1 Jan 2000\n"); - local_irq_save(flags); - ctrl_outb(RCR2_RESET, RCR2); /* Reset & Stop */ - ctrl_outb(0, RSECCNT); - ctrl_outb(0, RMINCNT); - ctrl_outb(0, RHRCNT); - ctrl_outb(6, RWKCNT); - ctrl_outb(1, RDAYCNT); - ctrl_outb(1, RMONCNT); -#if defined(CONFIG_CPU_SH4) - ctrl_outw(0x2000, RYRCNT); -#else - ctrl_outb(0, RYRCNT); -#endif - ctrl_outb(RCR2_RTCEN|RCR2_START, RCR2); /* Start */ - goto again; - } - -#if RTC_BIT_INVERTED != 0 - if ((sec128 & RTC_BIT_INVERTED)) - sec--; -#endif - - ts->tv_sec = mktime(yr100 * 100 + yr, mon, day, hr, min, sec); - ts->tv_nsec = ((sec128 * 1000000) / 128) * 1000; -} - -/* - * Changed to only care about tv_sec, and not the full timespec struct - * (i.e. tv_nsec). It can easily be switched to timespec for future cpus - * that support setting usec or nsec RTC values. - */ -int sh_rtc_settimeofday(const time_t secs) -{ - int retval = 0; - int real_seconds, real_minutes, cmos_minutes; - unsigned long flags; - - local_irq_save(flags); - ctrl_outb(RCR2_RESET, RCR2); /* Reset pre-scaler & stop RTC */ - - cmos_minutes = ctrl_inb(RMINCNT); - BCD_TO_BIN(cmos_minutes); - - /* - * since we're only adjusting minutes and seconds, - * don't interfere with hour overflow. This avoids - * messing with unknown time zones but requires your - * RTC not to be off by more than 15 minutes - */ - real_seconds = secs % 60; - real_minutes = secs / 60; - if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) - real_minutes += 30; /* correct for half hour time zone */ - real_minutes %= 60; - - if (abs(real_minutes - cmos_minutes) < 30) { - BIN_TO_BCD(real_seconds); - BIN_TO_BCD(real_minutes); - ctrl_outb(real_seconds, RSECCNT); - ctrl_outb(real_minutes, RMINCNT); - } else { - printk(KERN_WARNING - "set_rtc_time: can't update from %d to %d\n", - cmos_minutes, real_minutes); - retval = -1; - } - - ctrl_outb(RCR2_RTCEN|RCR2_START, RCR2); /* Start RTC */ - local_irq_restore(flags); - - return retval; -} diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c index 8acd70bffe76..149d9713eddf 100644 --- a/arch/sh/kernel/time.c +++ b/arch/sh/kernel/time.c @@ -3,13 +3,12 @@ * * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka * Copyright (C) 2000 Philipp Rumpf - * Copyright (C) 2002, 2003, 2004, 2005 Paul Mundt + * Copyright (C) 2002 - 2006 Paul Mundt * Copyright (C) 2002 M. R. Brown * * Some code taken from i386 version. * Copyright (C) 1991, 1992, 1995 Linus Torvalds */ - #include #include #include @@ -26,15 +25,20 @@ struct sys_timer *sys_timer; DEFINE_SPINLOCK(rtc_lock); EXPORT_SYMBOL(rtc_lock); -/* XXX: Can we initialize this in a routine somewhere? Dreamcast doesn't want - * these routines anywhere... */ -#ifdef CONFIG_SH_RTC -void (*rtc_sh_get_time)(struct timespec *) = sh_rtc_gettimeofday; -int (*rtc_sh_set_time)(const time_t) = sh_rtc_settimeofday; -#else -void (*rtc_sh_get_time)(struct timespec *); -int (*rtc_sh_set_time)(const time_t); -#endif +/* Dummy RTC ops */ +static void null_rtc_get_time(struct timespec *tv) +{ + tv->tv_sec = mktime(2000, 1, 1, 0, 0, 0); + tv->tv_nsec = 0; +} + +static int null_rtc_set_time(const time_t secs) +{ + return 0; +} + +void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time; +int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time; /* * Scheduler clock - returns current time in nanosec units. @@ -70,7 +74,6 @@ void do_gettimeofday(struct timeval *tv) tv->tv_sec = sec; tv->tv_usec = usec; } - EXPORT_SYMBOL(do_gettimeofday); int do_settimeofday(struct timespec *tv) @@ -103,7 +106,6 @@ int do_settimeofday(struct timespec *tv) return 0; } - EXPORT_SYMBOL(do_settimeofday); /* last time the RTC clock got updated */ @@ -181,7 +183,6 @@ static int __init timer_init_sysfs(void) sys_timer->dev.cls = &timer_sysclass; return sysdev_register(&sys_timer->dev); } - device_initcall(timer_init_sysfs); void (*board_time_init)(void); @@ -193,15 +194,9 @@ void __init time_init(void) clk_init(); - if (rtc_sh_get_time) { - rtc_sh_get_time(&xtime); - } else { - xtime.tv_sec = mktime(2000, 1, 1, 0, 0, 0); - xtime.tv_nsec = 0; - } - - set_normalized_timespec(&wall_to_monotonic, - -xtime.tv_sec, -xtime.tv_nsec); + rtc_sh_get_time(&xtime); + set_normalized_timespec(&wall_to_monotonic, + -xtime.tv_sec, -xtime.tv_nsec); /* * Find the timer to use as the system timer, it will be diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig index 52ea94b891f5..7f0d323b4725 100644 --- a/drivers/char/Kconfig +++ b/drivers/char/Kconfig @@ -739,7 +739,7 @@ config NVRAM config RTC tristate "Enhanced Real Time Clock Support" - depends on !PPC && !PARISC && !IA64 && !M68K && (!SPARC || PCI) && !FRV && !ARM + depends on !PPC && !PARISC && !IA64 && !M68K && (!SPARC || PCI) && !FRV && !ARM && !SUPERH ---help--- If you say Y here and create a character special file /dev/rtc with major number 10 and minor number 135 using mknod ("man mknod"), you diff --git a/include/asm-sh/mc146818rtc.h b/include/asm-sh/mc146818rtc.h index adc6e67c6b75..0aee96a97330 100644 --- a/include/asm-sh/mc146818rtc.h +++ b/include/asm-sh/mc146818rtc.h @@ -4,173 +4,4 @@ #ifndef _ASM_MC146818RTC_H #define _ASM_MC146818RTC_H -#ifdef CONFIG_SH_MPC1211 -#undef _ASM_MC146818RTC_H -#undef RTC_IRQ -#include -#else - -#include - -#define RTC_ALWAYS_BCD 1 - -/* FIXME:RTC Interrupt feature is not implemented yet. */ -#undef RTC_IRQ -#define RTC_IRQ 0 - -#if defined(CONFIG_CPU_SH3) -#define RTC_PORT(n) (R64CNT+(n)*2) -#define CMOS_READ(addr) __CMOS_READ(addr,b) -#define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,b) - -#elif defined(CONFIG_SH_SECUREEDGE5410) -#include - -#define RTC_PORT(n) SECUREEDGE_IOPORT_ADDR -#define CMOS_READ(addr) secureedge5410_cmos_read(addr) -#define CMOS_WRITE(val,addr) secureedge5410_cmos_write(val,addr) -extern unsigned char secureedge5410_cmos_read(int addr); -extern void secureedge5410_cmos_write(unsigned char val, int addr); - -#elif defined(CONFIG_CPU_SH4) -#define RTC_PORT(n) (R64CNT+(n)*4) -#define CMOS_READ(addr) __CMOS_READ(addr,w) -#define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,w) -#endif - -#define __CMOS_READ(addr, s) ({ \ - unsigned char val=0, rcr1, rcr2, r64cnt, retry; \ - switch(addr) { \ - case RTC_SECONDS: \ - val = ctrl_inb(RSECCNT); \ - break; \ - case RTC_SECONDS_ALARM: \ - val = ctrl_inb(RSECAR); \ - break; \ - case RTC_MINUTES: \ - val = ctrl_inb(RMINCNT); \ - break; \ - case RTC_MINUTES_ALARM: \ - val = ctrl_inb(RMINAR); \ - break; \ - case RTC_HOURS: \ - val = ctrl_inb(RHRCNT); \ - break; \ - case RTC_HOURS_ALARM: \ - val = ctrl_inb(RHRAR); \ - break; \ - case RTC_DAY_OF_WEEK: \ - val = ctrl_inb(RWKCNT); \ - break; \ - case RTC_DAY_OF_MONTH: \ - val = ctrl_inb(RDAYCNT); \ - break; \ - case RTC_MONTH: \ - val = ctrl_inb(RMONCNT); \ - break; \ - case RTC_YEAR: \ - val = ctrl_in##s(RYRCNT); \ - break; \ - case RTC_REG_A: /* RTC_FREQ_SELECT */ \ - rcr2 = ctrl_inb(RCR2); \ - val = (rcr2 & RCR2_PESMASK) >> 4; \ - rcr1 = ctrl_inb(RCR1); \ - rcr1 = (rcr1 & (RCR1_CIE | RCR1_AIE)) | RCR1_AF;\ - retry = 0; \ - do { \ - ctrl_outb(rcr1, RCR1); /* clear CF */ \ - r64cnt = ctrl_inb(R64CNT); \ - } while((ctrl_inb(RCR1) & RCR1_CF) && retry++ < 1000);\ - r64cnt ^= RTC_BIT_INVERTED; \ - if(r64cnt == 0x7f || r64cnt == 0) \ - val |= RTC_UIP; \ - break; \ - case RTC_REG_B: /* RTC_CONTROL */ \ - rcr1 = ctrl_inb(RCR1); \ - rcr2 = ctrl_inb(RCR2); \ - if(rcr1 & RCR1_CIE) val |= RTC_UIE; \ - if(rcr1 & RCR1_AIE) val |= RTC_AIE; \ - if(rcr2 & RCR2_PESMASK) val |= RTC_PIE; \ - if(!(rcr2 & RCR2_START))val |= RTC_SET; \ - val |= RTC_24H; \ - break; \ - case RTC_REG_C: /* RTC_INTR_FLAGS */ \ - rcr1 = ctrl_inb(RCR1); \ - rcr1 &= ~(RCR1_CF | RCR1_AF); \ - ctrl_outb(rcr1, RCR1); \ - rcr2 = ctrl_inb(RCR2); \ - rcr2 &= ~RCR2_PEF; \ - ctrl_outb(rcr2, RCR2); \ - break; \ - case RTC_REG_D: /* RTC_VALID */ \ - /* Always valid ... */ \ - val = RTC_VRT; \ - break; \ - default: \ - break; \ - } \ - val; \ -}) - -#define __CMOS_WRITE(val, addr, s) ({ \ - unsigned char rcr1,rcr2; \ - switch(addr) { \ - case RTC_SECONDS: \ - ctrl_outb(val, RSECCNT); \ - break; \ - case RTC_SECONDS_ALARM: \ - ctrl_outb(val, RSECAR); \ - break; \ - case RTC_MINUTES: \ - ctrl_outb(val, RMINCNT); \ - break; \ - case RTC_MINUTES_ALARM: \ - ctrl_outb(val, RMINAR); \ - break; \ - case RTC_HOURS: \ - ctrl_outb(val, RHRCNT); \ - break; \ - case RTC_HOURS_ALARM: \ - ctrl_outb(val, RHRAR); \ - break; \ - case RTC_DAY_OF_WEEK: \ - ctrl_outb(val, RWKCNT); \ - break; \ - case RTC_DAY_OF_MONTH: \ - ctrl_outb(val, RDAYCNT); \ - break; \ - case RTC_MONTH: \ - ctrl_outb(val, RMONCNT); \ - break; \ - case RTC_YEAR: \ - ctrl_out##s((ctrl_in##s(RYRCNT) & 0xff00) | (val & 0xff), RYRCNT);\ - break; \ - case RTC_REG_A: /* RTC_FREQ_SELECT */ \ - rcr2 = ctrl_inb(RCR2); \ - if((val & RTC_DIV_CTL) == RTC_DIV_RESET2) \ - rcr2 |= RCR2_RESET; \ - ctrl_outb(rcr2, RCR2); \ - break; \ - case RTC_REG_B: /* RTC_CONTROL */ \ - rcr1 = (ctrl_inb(RCR1) & 0x99) | RCR1_AF; \ - if(val & RTC_AIE) rcr1 |= RCR1_AIE; \ - else rcr1 &= ~RCR1_AIE; \ - if(val & RTC_UIE) rcr1 |= RCR1_CIE; \ - else rcr1 &= ~RCR1_CIE; \ - ctrl_outb(rcr1, RCR1); \ - rcr2 = ctrl_inb(RCR2); \ - if(val & RTC_SET) rcr2 &= ~RCR2_START; \ - else rcr2 |= RCR2_START; \ - ctrl_outb(rcr2, RCR2); \ - break; \ - case RTC_REG_C: /* RTC_INTR_FLAGS */ \ - break; \ - case RTC_REG_D: /* RTC_VALID */ \ - break; \ - default: \ - break; \ - } \ -}) - -#endif /* CONFIG_SH_MPC1211 */ #endif /* _ASM_MC146818RTC_H */ diff --git a/include/asm-sh/rtc.h b/include/asm-sh/rtc.h index 4c7be859c9c0..91aacc96151b 100644 --- a/include/asm-sh/rtc.h +++ b/include/asm-sh/rtc.h @@ -1,29 +1,8 @@ #ifndef _ASM_RTC_H #define _ASM_RTC_H -#ifdef __KERNEL__ -#include -#include - -extern void sh_rtc_gettimeofday(struct timespec *ts); -extern int sh_rtc_settimeofday(const time_t secs); extern void (*board_time_init)(void); extern void (*rtc_sh_get_time)(struct timespec *); extern int (*rtc_sh_set_time)(const time_t); -/* RCR1 Bits */ -#define RCR1_CF 0x80 /* Carry Flag */ -#define RCR1_CIE 0x10 /* Carry Interrupt Enable */ -#define RCR1_AIE 0x08 /* Alarm Interrupt Enable */ -#define RCR1_AF 0x01 /* Alarm Flag */ - -/* RCR2 Bits */ -#define RCR2_PEF 0x80 /* PEriodic interrupt Flag */ -#define RCR2_PESMASK 0x70 /* Periodic interrupt Set */ -#define RCR2_RTCEN 0x08 /* ENable RTC */ -#define RCR2_ADJ 0x04 /* ADJustment (30-second) */ -#define RCR2_RESET 0x02 /* Reset bit */ -#define RCR2_START 0x01 /* Start bit */ - -#endif /* __KERNEL__ */ #endif /* _ASM_RTC_H */ -- cgit v1.2.3 From ba463937ef75bceaf3943edf01f849257c68623a Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:01:16 +0900 Subject: sh: maskreg IRQ support. Formerly implemented by ADX, we can use this generically, so move it over. Signed-off-by: Paul Mundt --- arch/sh/Kconfig | 3 ++ arch/sh/kernel/cpu/irq/Makefile | 5 +- arch/sh/kernel/cpu/irq/maskreg.c | 99 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 105 insertions(+), 2 deletions(-) create mode 100644 arch/sh/kernel/cpu/irq/maskreg.c (limited to 'arch/sh/kernel') diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index ddf2cc56868c..d90fb893bea9 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -313,6 +313,9 @@ config CPU_HAS_INTEVT config CPU_HAS_PINT_IRQ bool +config CPU_HAS_MASKREG_IRQ + bool + config CPU_HAS_INTC2_IRQ bool diff --git a/arch/sh/kernel/cpu/irq/Makefile b/arch/sh/kernel/cpu/irq/Makefile index e3cccea15e1d..1c034c283f59 100644 --- a/arch/sh/kernel/cpu/irq/Makefile +++ b/arch/sh/kernel/cpu/irq/Makefile @@ -3,5 +3,6 @@ # obj-y += ipr.o imask.o -obj-$(CONFIG_CPU_HAS_PINT_IRQ) += pint.o -obj-$(CONFIG_CPU_HAS_INTC2_IRQ) += intc2.o +obj-$(CONFIG_CPU_HAS_PINT_IRQ) += pint.o +obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o +obj-$(CONFIG_CPU_HAS_INTC2_IRQ) += intc2.o diff --git a/arch/sh/kernel/cpu/irq/maskreg.c b/arch/sh/kernel/cpu/irq/maskreg.c new file mode 100644 index 000000000000..1cc0de15e4a6 --- /dev/null +++ b/arch/sh/kernel/cpu/irq/maskreg.c @@ -0,0 +1,99 @@ +/* + * Interrupt handling for Simple external interrupt mask register + * + * Copyright (C) 2001 A&D Co., Ltd. + * + * This is for the machine which have single 16 bit register + * for masking external IRQ individually. + * Each bit of the register is for masking each interrupt. + * + * This file may be copied or modified under the terms of the GNU + * General Public License. See linux/COPYING for more information. + */ +#include +#include +#include +#include +#include + +/* address of external interrupt mask register */ +unsigned long irq_mask_register; + +/* forward declaration */ +static unsigned int startup_maskreg_irq(unsigned int irq); +static void shutdown_maskreg_irq(unsigned int irq); +static void enable_maskreg_irq(unsigned int irq); +static void disable_maskreg_irq(unsigned int irq); +static void mask_and_ack_maskreg(unsigned int); +static void end_maskreg_irq(unsigned int irq); + +/* hw_interrupt_type */ +static struct hw_interrupt_type maskreg_irq_type = { + .typename = "Mask Register", + .startup = startup_maskreg_irq, + .shutdown = shutdown_maskreg_irq, + .enable = enable_maskreg_irq, + .disable = disable_maskreg_irq, + .ack = mask_and_ack_maskreg, + .end = end_maskreg_irq +}; + +/* actual implementatin */ +static unsigned int startup_maskreg_irq(unsigned int irq) +{ + enable_maskreg_irq(irq); + return 0; /* never anything pending */ +} + +static void shutdown_maskreg_irq(unsigned int irq) +{ + disable_maskreg_irq(irq); +} + +static void disable_maskreg_irq(unsigned int irq) +{ + unsigned long flags; + unsigned short val, mask = 0x01 << irq; + + BUG_ON(!irq_mask_register); + + /* Set "irq"th bit */ + local_irq_save(flags); + val = ctrl_inw(irq_mask_register); + val |= mask; + ctrl_outw(val, irq_mask_register); + local_irq_restore(flags); +} + +static void enable_maskreg_irq(unsigned int irq) +{ + unsigned long flags; + unsigned short val, mask = ~(0x01 << irq); + + BUG_ON(!irq_mask_register); + + /* Clear "irq"th bit */ + local_irq_save(flags); + val = ctrl_inw(irq_mask_register); + val &= mask; + ctrl_outw(val, irq_mask_register); + local_irq_restore(flags); +} + +static void mask_and_ack_maskreg(unsigned int irq) +{ + disable_maskreg_irq(irq); +} + +static void end_maskreg_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) + enable_maskreg_irq(irq); +} + +void make_maskreg_irq(unsigned int irq) +{ + disable_irq_nosync(irq); + irq_desc[irq].handler = &maskreg_irq_type; + disable_maskreg_irq(irq); +} -- cgit v1.2.3 From 8599cf059209de22dd3be16816b90f1aad10c74a Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:03:34 +0900 Subject: sh: Cleanup IRQ disabling for hardirq handlers. The generic hardirq layer already takes care of a lot of the appropriate locking and disabling for us, no need to duplicate it in the handlers.. Signed-off-by: Paul Mundt --- arch/sh/boards/bigsur/irq.c | 47 ++++++++++++-------------------- arch/sh/boards/dreamcast/irq.c | 7 ----- arch/sh/boards/landisk/irq.c | 6 ---- arch/sh/boards/mpc1211/setup.c | 14 ---------- arch/sh/boards/renesas/hs7751rvoip/irq.c | 6 ---- arch/sh/boards/renesas/r7780rp/irq.c | 6 ---- arch/sh/boards/renesas/rts7751r2d/irq.c | 6 ---- arch/sh/boards/renesas/systemh/irq.c | 8 ------ arch/sh/boards/superh/microdev/irq.c | 39 ++++++++------------------ arch/sh/cchips/hd6446x/hd64461/setup.c | 7 ----- arch/sh/cchips/hd6446x/hd64465/setup.c | 6 ---- arch/sh/cchips/voyagergx/irq.c | 20 ++++---------- arch/sh/kernel/cpu/irq/ipr.c | 8 ++---- arch/sh/kernel/cpu/irq/maskreg.c | 6 ---- arch/sh/kernel/cpu/irq/pint.c | 8 ++---- 15 files changed, 38 insertions(+), 156 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/boards/bigsur/irq.c b/arch/sh/boards/bigsur/irq.c index ac946a2201c7..1ab04da36382 100644 --- a/arch/sh/boards/bigsur/irq.c +++ b/arch/sh/boards/bigsur/irq.c @@ -19,6 +19,7 @@ * IRQ functions for a Hitachi Big Sur Evaluation Board. * */ +#undef DEBUG #include #include @@ -41,10 +42,8 @@ #undef BIGSUR_DEBUG #ifdef BIGSUR_DEBUG -#define DPRINTK(args...) printk(args) #define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args) #else -#define DPRINTK(args...) #define DIPRINTK(n, args...) #endif /* BIGSUR_DEBUG */ @@ -60,45 +59,39 @@ extern int hd64465_irq_demux(int irq); /* Level 1 IRQ routines */ static void disable_bigsur_l1irq(unsigned int irq) { - unsigned long flags; unsigned char mask; unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0; unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) ); if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { - DPRINTK("Disable L1 IRQ %d\n", irq); + pr_debug("Disable L1 IRQ %d\n", irq); DIPRINTK(2,"disable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n", mask_port, bit); - local_irq_save(flags); /* Disable IRQ - set mask bit */ mask = inb(mask_port) | bit; outb(mask, mask_port); - local_irq_restore(flags); return; } - DPRINTK("disable_bigsur_l1irq: Invalid IRQ %d\n", irq); + pr_debug("disable_bigsur_l1irq: Invalid IRQ %d\n", irq); } static void enable_bigsur_l1irq(unsigned int irq) { - unsigned long flags; unsigned char mask; unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0; unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) ); if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { - DPRINTK("Enable L1 IRQ %d\n", irq); + pr_debug("Enable L1 IRQ %d\n", irq); DIPRINTK(2,"enable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n", mask_port, bit); - local_irq_save(flags); /* Enable L1 IRQ - clear mask bit */ mask = inb(mask_port) & ~bit; outb(mask, mask_port); - local_irq_restore(flags); return; } - DPRINTK("enable_bigsur_l1irq: Invalid IRQ %d\n", irq); + pr_debug("enable_bigsur_l1irq: Invalid IRQ %d\n", irq); } @@ -126,51 +119,45 @@ static const u32 imr_offset = BIGSUR_IMR0 - BIGSUR_IMR1; /* Level 2 IRQ routines */ static void disable_bigsur_l2irq(unsigned int irq) { - unsigned long flags; unsigned char mask; unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8); unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset; - if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { - DPRINTK("Disable L2 IRQ %d\n", irq); + if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { + pr_debug("Disable L2 IRQ %d\n", irq); DIPRINTK(2,"disable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n", mask_port, bit); - local_irq_save(flags); /* Disable L2 IRQ - set mask bit */ mask = inb(mask_port) | bit; outb(mask, mask_port); - local_irq_restore(flags); return; } - DPRINTK("disable_bigsur_l2irq: Invalid IRQ %d\n", irq); + pr_debug("disable_bigsur_l2irq: Invalid IRQ %d\n", irq); } static void enable_bigsur_l2irq(unsigned int irq) { - unsigned long flags; unsigned char mask; unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8); unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset; - if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { - DPRINTK("Enable L2 IRQ %d\n", irq); + if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { + pr_debug("Enable L2 IRQ %d\n", irq); DIPRINTK(2,"enable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n", mask_port, bit); - local_irq_save(flags); /* Enable L2 IRQ - clear mask bit */ mask = inb(mask_port) & ~bit; outb(mask, mask_port); - local_irq_restore(flags); return; } - DPRINTK("enable_bigsur_l2irq: Invalid IRQ %d\n", irq); + pr_debug("enable_bigsur_l2irq: Invalid IRQ %d\n", irq); } static void mask_and_ack_bigsur(unsigned int irq) { - DPRINTK("mask_and_ack_bigsur IRQ %d\n", irq); + pr_debug("mask_and_ack_bigsur IRQ %d\n", irq); if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) disable_bigsur_l1irq(irq); else @@ -179,7 +166,7 @@ static void mask_and_ack_bigsur(unsigned int irq) static void end_bigsur_irq(unsigned int irq) { - DPRINTK("end_bigsur_irq IRQ %d\n", irq); + pr_debug("end_bigsur_irq IRQ %d\n", irq); if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) { if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) enable_bigsur_l1irq(irq); @@ -193,7 +180,7 @@ static unsigned int startup_bigsur_irq(unsigned int irq) u8 mask; u32 reg; - DPRINTK("startup_bigsur_irq IRQ %d\n", irq); + pr_debug("startup_bigsur_irq IRQ %d\n", irq); if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { /* Enable the L1 IRQ */ @@ -218,7 +205,7 @@ static unsigned int startup_bigsur_irq(unsigned int irq) static void shutdown_bigsur_irq(unsigned int irq) { - DPRINTK("shutdown_bigsur_irq IRQ %d\n", irq); + pr_debug("shutdown_bigsur_irq IRQ %d\n", irq); if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) disable_bigsur_l1irq(irq); else @@ -260,7 +247,7 @@ static void make_bigsur_l1isr(unsigned int irq) { disable_bigsur_l1irq(irq); return; } - DPRINTK("make_bigsur_l1isr: bad irq, %d\n", irq); + pr_debug("make_bigsur_l1isr: bad irq, %d\n", irq); return; } @@ -277,7 +264,7 @@ static void make_bigsur_l2isr(unsigned int irq) { disable_bigsur_l2irq(irq); return; } - DPRINTK("make_bigsur_l2isr: bad irq, %d\n", irq); + pr_debug("make_bigsur_l2isr: bad irq, %d\n", irq); return; } diff --git a/arch/sh/boards/dreamcast/irq.c b/arch/sh/boards/dreamcast/irq.c index 373a22e48ac4..5bf01f86c20c 100644 --- a/arch/sh/boards/dreamcast/irq.c +++ b/arch/sh/boards/dreamcast/irq.c @@ -10,7 +10,6 @@ */ #include - #include #include #include @@ -57,29 +56,23 @@ /* Disable the hardware event by masking its bit in its EMR */ static inline void disable_systemasic_irq(unsigned int irq) { - unsigned long flags; __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); __u32 mask; - local_irq_save(flags); mask = inl(emr); mask &= ~(1 << EVENT_BIT(irq)); outl(mask, emr); - local_irq_restore(flags); } /* Enable the hardware event by setting its bit in its EMR */ static inline void enable_systemasic_irq(unsigned int irq) { - unsigned long flags; __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); __u32 mask; - local_irq_save(flags); mask = inl(emr); mask |= (1 << EVENT_BIT(irq)); outl(mask, emr); - local_irq_restore(flags); } /* Acknowledge a hardware event by writing its bit back to its ESR */ diff --git a/arch/sh/boards/landisk/irq.c b/arch/sh/boards/landisk/irq.c index 1dcc3feb7a44..a006d6443225 100644 --- a/arch/sh/boards/landisk/irq.c +++ b/arch/sh/boards/landisk/irq.c @@ -39,30 +39,24 @@ static unsigned int startup_landisk_irq(unsigned int irq) static void disable_landisk_irq(unsigned int irq) { - unsigned long flags; unsigned char val; unsigned char mask = 0xff ^ (0x01 << (irq - 5)); /* Set the priority in IPR to 0 */ - local_irq_save(flags); val = ctrl_inb(PA_IMASK); val &= mask; ctrl_outb(val, PA_IMASK); - local_irq_restore(flags); } static void enable_landisk_irq(unsigned int irq) { - unsigned long flags; unsigned char val; unsigned char value = (0x01 << (irq - 5)); /* Set priority in IPR back to original value */ - local_irq_save(flags); val = ctrl_inb(PA_IMASK); val |= value; ctrl_outb(val, PA_IMASK); - local_irq_restore(flags); } static void ack_landisk_irq(unsigned int irq) diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c index a8c5180ae219..e9c8ff221dda 100644 --- a/arch/sh/boards/mpc1211/setup.c +++ b/arch/sh/boards/mpc1211/setup.c @@ -80,9 +80,6 @@ volatile unsigned long irq_err_count; static void disable_mpc1211_irq(unsigned int irq) { - unsigned long flags; - - save_and_cli(flags); if( irq < 8) { m_irq_mask |= (1 << irq); outb(m_irq_mask,I8259_M_MR); @@ -90,16 +87,11 @@ static void disable_mpc1211_irq(unsigned int irq) s_irq_mask |= (1 << (irq - 8)); outb(s_irq_mask,I8259_S_MR); } - restore_flags(flags); } static void enable_mpc1211_irq(unsigned int irq) { - unsigned long flags; - - save_and_cli(flags); - if( irq < 8) { m_irq_mask &= ~(1 << irq); outb(m_irq_mask,I8259_M_MR); @@ -107,7 +99,6 @@ static void enable_mpc1211_irq(unsigned int irq) s_irq_mask &= ~(1 << (irq - 8)); outb(s_irq_mask,I8259_S_MR); } - restore_flags(flags); } static inline int mpc1211_irq_real(unsigned int irq) @@ -131,10 +122,6 @@ static inline int mpc1211_irq_real(unsigned int irq) static void mask_and_ack_mpc1211(unsigned int irq) { - unsigned long flags; - - save_and_cli(flags); - if(irq < 8) { if(m_irq_mask & (1< #include - #include #include #include #define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */ - static const struct { unsigned char fpgaIrq; unsigned char mapped; @@ -93,53 +91,42 @@ static struct hw_interrupt_type microdev_irq_type = { static void disable_microdev_irq(unsigned int irq) { - unsigned int flags; unsigned int fpgaIrq; - if (irq >= NUM_EXTERNAL_IRQS) return; - if (!fpgaIrqTable[irq].mapped) return; + if (irq >= NUM_EXTERNAL_IRQS) + return; + if (!fpgaIrqTable[irq].mapped) + return; fpgaIrq = fpgaIrqTable[irq].fpgaIrq; - /* disable interrupts */ - local_irq_save(flags); - - /* disable interupts on the FPGA INTC register */ + /* disable interupts on the FPGA INTC register */ ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG); - - /* restore interrupts */ - local_irq_restore(flags); } static void enable_microdev_irq(unsigned int irq) { unsigned long priorityReg, priorities, pri; - unsigned int flags; unsigned int fpgaIrq; - - if (irq >= NUM_EXTERNAL_IRQS) return; - if (!fpgaIrqTable[irq].mapped) return; + if (unlikely(irq >= NUM_EXTERNAL_IRQS)) + return; + if (unlikely(!fpgaIrqTable[irq].mapped)) + return; pri = 15 - irq; fpgaIrq = fpgaIrqTable[irq].fpgaIrq; priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq); - /* disable interrupts */ - local_irq_save(flags); - - /* set priority for the interrupt */ + /* set priority for the interrupt */ priorities = ctrl_inl(priorityReg); priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq); priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri); ctrl_outl(priorities, priorityReg); - /* enable interupts on the FPGA INTC register */ + /* enable interupts on the FPGA INTC register */ ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); - - /* restore interrupts */ - local_irq_restore(flags); } /* This functions sets the desired irq handler to be a MicroDev type */ @@ -158,9 +145,7 @@ static void mask_and_ack_microdev(unsigned int irq) static void end_microdev_irq(unsigned int irq) { if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - { enable_microdev_irq(irq); - } } extern void __init init_microdev_irq(void) @@ -171,9 +156,7 @@ extern void __init init_microdev_irq(void) ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG); for (i = 0; i < NUM_EXTERNAL_IRQS; i++) - { make_microdev_irq(i); - } } extern void microdev_print_fpga_intc_status(void) diff --git a/arch/sh/cchips/hd6446x/hd64461/setup.c b/arch/sh/cchips/hd6446x/hd64461/setup.c index 6c961273a23a..38f1e8171a3a 100644 --- a/arch/sh/cchips/hd6446x/hd64461/setup.c +++ b/arch/sh/cchips/hd6446x/hd64461/setup.c @@ -11,35 +11,28 @@ #include #include #include - #include #include #include static void disable_hd64461_irq(unsigned int irq) { - unsigned long flags; unsigned short nimr; unsigned short mask = 1 << (irq - HD64461_IRQBASE); - local_irq_save(flags); nimr = inw(HD64461_NIMR); nimr |= mask; outw(nimr, HD64461_NIMR); - local_irq_restore(flags); } static void enable_hd64461_irq(unsigned int irq) { - unsigned long flags; unsigned short nimr; unsigned short mask = 1 << (irq - HD64461_IRQBASE); - local_irq_save(flags); nimr = inw(HD64461_NIMR); nimr &= ~mask; outw(nimr, HD64461_NIMR); - local_irq_restore(flags); } static void mask_and_ack_hd64461(unsigned int irq) diff --git a/arch/sh/cchips/hd6446x/hd64465/setup.c b/arch/sh/cchips/hd6446x/hd64465/setup.c index d2b2851bc44b..30573d3e1966 100644 --- a/arch/sh/cchips/hd6446x/hd64465/setup.c +++ b/arch/sh/cchips/hd6446x/hd64465/setup.c @@ -25,31 +25,25 @@ static void disable_hd64465_irq(unsigned int irq) { - unsigned long flags; unsigned short nimr; unsigned short mask = 1 << (irq - HD64465_IRQ_BASE); pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask); - local_irq_save(flags); nimr = inw(HD64465_REG_NIMR); nimr |= mask; outw(nimr, HD64465_REG_NIMR); - local_irq_restore(flags); } static void enable_hd64465_irq(unsigned int irq) { - unsigned long flags; unsigned short nimr; unsigned short mask = 1 << (irq - HD64465_IRQ_BASE); pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask); - local_irq_save(flags); nimr = inw(HD64465_REG_NIMR); nimr &= ~mask; outw(nimr, HD64465_REG_NIMR); - local_irq_restore(flags); } diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c index 4cfa7c990553..392c8b12ce36 100644 --- a/arch/sh/cchips/voyagergx/irq.c +++ b/arch/sh/cchips/voyagergx/irq.c @@ -36,32 +36,26 @@ static void disable_voyagergx_irq(unsigned int irq) { - unsigned long flags, val; - unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE); + unsigned long val; + unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE); pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask); - local_irq_save(flags); val = inl(VOYAGER_INT_MASK); val &= ~mask; outl(val, VOYAGER_INT_MASK); - local_irq_restore(flags); } - static void enable_voyagergx_irq(unsigned int irq) { - unsigned long flags, val; - unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE); + unsigned long val; + unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE); pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask); - local_irq_save(flags); val = inl(VOYAGER_INT_MASK); val |= mask; outl(val, VOYAGER_INT_MASK); - local_irq_restore(flags); } - static void mask_and_ack_voyagergx(unsigned int irq) { disable_voyagergx_irq(irq); @@ -94,7 +88,8 @@ static struct hw_interrupt_type voyagergx_irq_type = { .end = end_voyagergx_irq, }; -static irqreturn_t voyagergx_interrupt(int irq, void *dev_id, struct pt_regs *regs) +static irqreturn_t voyagergx_interrupt(int irq, void *dev_id, + struct pt_regs *regs) { printk(KERN_INFO "VoyagerGX: spurious interrupt, status: 0x%x\n", @@ -102,9 +97,6 @@ static irqreturn_t voyagergx_interrupt(int irq, void *dev_id, struct pt_regs *re return IRQ_HANDLED; } - -/*====================================================*/ - static struct { int (*func)(int, void *); void *dev; diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c index 00edee971bcb..4c4fd4118d1a 100644 --- a/arch/sh/kernel/cpu/irq/ipr.c +++ b/arch/sh/kernel/cpu/irq/ipr.c @@ -57,31 +57,27 @@ static struct hw_interrupt_type ipr_irq_type = { static void disable_ipr_irq(unsigned int irq) { - unsigned long val, flags; + unsigned long val; unsigned int addr = ipr_data[irq].addr; unsigned short mask = 0xffff ^ (0x0f << ipr_data[irq].shift); /* Set the priority in IPR to 0 */ - local_irq_save(flags); val = ctrl_inw(addr); val &= mask; ctrl_outw(val, addr); - local_irq_restore(flags); } static void enable_ipr_irq(unsigned int irq) { - unsigned long val, flags; + unsigned long val; unsigned int addr = ipr_data[irq].addr; int priority = ipr_data[irq].priority; unsigned short value = (priority << ipr_data[irq].shift); /* Set priority in IPR back to original value */ - local_irq_save(flags); val = ctrl_inw(addr); val |= value; ctrl_outw(val, addr); - local_irq_restore(flags); } static void mask_and_ack_ipr(unsigned int irq) diff --git a/arch/sh/kernel/cpu/irq/maskreg.c b/arch/sh/kernel/cpu/irq/maskreg.c index 1cc0de15e4a6..492db31b3cab 100644 --- a/arch/sh/kernel/cpu/irq/maskreg.c +++ b/arch/sh/kernel/cpu/irq/maskreg.c @@ -52,32 +52,26 @@ static void shutdown_maskreg_irq(unsigned int irq) static void disable_maskreg_irq(unsigned int irq) { - unsigned long flags; unsigned short val, mask = 0x01 << irq; BUG_ON(!irq_mask_register); /* Set "irq"th bit */ - local_irq_save(flags); val = ctrl_inw(irq_mask_register); val |= mask; ctrl_outw(val, irq_mask_register); - local_irq_restore(flags); } static void enable_maskreg_irq(unsigned int irq) { - unsigned long flags; unsigned short val, mask = ~(0x01 << irq); BUG_ON(!irq_mask_register); /* Clear "irq"th bit */ - local_irq_save(flags); val = ctrl_inw(irq_mask_register); val &= mask; ctrl_outw(val, irq_mask_register); - local_irq_restore(flags); } static void mask_and_ack_maskreg(unsigned int irq) diff --git a/arch/sh/kernel/cpu/irq/pint.c b/arch/sh/kernel/cpu/irq/pint.c index 80cd8108d36a..17f47b373d6e 100644 --- a/arch/sh/kernel/cpu/irq/pint.c +++ b/arch/sh/kernel/cpu/irq/pint.c @@ -48,26 +48,22 @@ static struct hw_interrupt_type pint_irq_type = { static void disable_pint_irq(unsigned int irq) { - unsigned long val, flags; + unsigned long val; - local_irq_save(flags); val = ctrl_inw(INTC_INTER); val &= ~(1 << (irq - PINT_IRQ_BASE)); ctrl_outw(val, INTC_INTER); /* disable PINTn */ portcr_mask &= ~(3 << (irq - PINT_IRQ_BASE)*2); - local_irq_restore(flags); } static void enable_pint_irq(unsigned int irq) { - unsigned long val, flags; + unsigned long val; - local_irq_save(flags); val = ctrl_inw(INTC_INTER); val |= 1 << (irq - PINT_IRQ_BASE); ctrl_outw(val, INTC_INTER); /* enable PINTn */ portcr_mask |= 3 << (irq - PINT_IRQ_BASE)*2; - local_irq_restore(flags); } static void mask_and_ack_pint(unsigned int irq) -- cgit v1.2.3 From 2c7834a6f15fe6c50ed4766f1bb6f9183b9e2740 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:17:31 +0900 Subject: sh: machvec rework. Some more machvec overhauling and setup code cleanup. Kill off get_system_type() and platform_setup(), we can do these both through the machvec. While we're add it, kill off more useless mach.c's and drop some legacy cruft from setup.c. Signed-off-by: Paul Mundt --- arch/sh/boards/bigsur/setup.c | 47 +++++------- arch/sh/boards/dreamcast/setup.c | 34 ++++----- arch/sh/boards/ec3104/setup.c | 49 +++++-------- arch/sh/boards/hp6xx/Makefile | 4 +- arch/sh/boards/hp6xx/setup.c | 47 ++++++++++-- arch/sh/boards/landisk/setup.c | 92 ++++++++++++----------- arch/sh/boards/mpc1211/setup.c | 42 +++++------ arch/sh/boards/renesas/edosk7705/setup.c | 29 ++------ arch/sh/boards/renesas/hs7751rvoip/setup.c | 96 +++++++++++------------- arch/sh/boards/renesas/r7780rp/setup.c | 83 +++++++++++---------- arch/sh/boards/renesas/rts7751r2d/Makefile | 4 +- arch/sh/boards/renesas/rts7751r2d/mach.c | 66 ----------------- arch/sh/boards/renesas/rts7751r2d/setup.c | 62 ++++++++++++++-- arch/sh/boards/renesas/systemh/setup.c | 16 +--- arch/sh/boards/saturn/setup.c | 14 +--- arch/sh/boards/se/7300/setup.c | 17 +---- arch/sh/boards/se/73180/setup.c | 17 +---- arch/sh/boards/se/770x/Makefile | 3 +- arch/sh/boards/se/770x/mach.c | 62 ---------------- arch/sh/boards/se/770x/setup.c | 61 ++++++++++++---- arch/sh/boards/se/7751/Makefile | 3 +- arch/sh/boards/se/7751/mach.c | 48 ------------ arch/sh/boards/se/7751/setup.c | 103 ++++++++++---------------- arch/sh/boards/sh03/setup.c | 26 +++---- arch/sh/boards/shmin/setup.c | 10 +-- arch/sh/boards/snapgear/setup.c | 22 ++---- arch/sh/boards/superh/microdev/setup.c | 113 +++++++++++++---------------- arch/sh/boards/titan/setup.c | 13 +--- arch/sh/boards/unknown/setup.c | 13 +--- arch/sh/kernel/setup.c | 54 +++----------- include/asm-sh/machvec.h | 7 +- 31 files changed, 481 insertions(+), 776 deletions(-) delete mode 100644 arch/sh/boards/renesas/rts7751r2d/mach.c delete mode 100644 arch/sh/boards/se/770x/mach.c delete mode 100644 arch/sh/boards/se/7751/mach.c (limited to 'arch/sh/kernel') diff --git a/arch/sh/boards/bigsur/setup.c b/arch/sh/boards/bigsur/setup.c index dfeede9da50f..9711c20fc9e4 100644 --- a/arch/sh/boards/bigsur/setup.c +++ b/arch/sh/boards/bigsur/setup.c @@ -41,31 +41,7 @@ // Big Sur Init Routines /*===========================================================*/ -const char *get_system_type(void) -{ - return "Big Sur"; -} - -/* - * The Machine Vector - */ -extern void heartbeat_bigsur(void); -extern void init_bigsur_IRQ(void); - -struct sh_machine_vector mv_bigsur __initmv = { - .mv_nr_irqs = NR_IRQS, // Defined in - - .mv_isa_port2addr = bigsur_isa_port2addr, - .mv_irq_demux = bigsur_irq_demux, - - .mv_init_irq = init_bigsur_IRQ, -#ifdef CONFIG_HEARTBEAT - .mv_heartbeat = heartbeat_bigsur, -#endif -}; -ALIAS_MV(bigsur) - -int __init platform_setup(void) +static void __init bigsur_setup(char **cmdline_p) { /* Mask all 2nd level IRQ's */ outb(-1,BIGSUR_IMR0); @@ -89,7 +65,24 @@ int __init platform_setup(void) outw(1, BIGSUR_ETHR+0xe); /* set the IO port to BIGSUR_ETHER_IOPORT */ outw(BIGSUR_ETHER_IOPORT<<3, BIGSUR_ETHR+0x2); - - return 0; } +/* + * The Machine Vector + */ +extern void heartbeat_bigsur(void); +extern void init_bigsur_IRQ(void); + +struct sh_machine_vector mv_bigsur __initmv = { + .mv_name = "Big Sur", + .mv_setup = bigsur_setup, + + .mv_isa_port2addr = bigsur_isa_port2addr, + .mv_irq_demux = bigsur_irq_demux, + + .mv_init_irq = init_bigsur_IRQ, +#ifdef CONFIG_HEARTBEAT + .mv_heartbeat = heartbeat_bigsur, +#endif +}; +ALIAS_MV(bigsur) diff --git a/arch/sh/boards/dreamcast/setup.c b/arch/sh/boards/dreamcast/setup.c index a00ac94beb05..f13017eeeb27 100644 --- a/arch/sh/boards/dreamcast/setup.c +++ b/arch/sh/boards/dreamcast/setup.c @@ -22,7 +22,6 @@ #include #include #include - #include #include #include @@ -37,24 +36,7 @@ extern int systemasic_irq_demux(int); void *dreamcast_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t); int dreamcast_consistent_free(struct device *, size_t, void *, dma_addr_t); -const char *get_system_type(void) -{ - return "Sega Dreamcast"; -} - -struct sh_machine_vector mv_dreamcast __initmv = { - .mv_nr_irqs = NR_IRQS, - - .mv_irq_demux = systemasic_irq_demux, - -#ifdef CONFIG_PCI - .mv_consistent_alloc = dreamcast_consistent_alloc, - .mv_consistent_free = dreamcast_consistent_free, -#endif -}; -ALIAS_MV(dreamcast) - -int __init platform_setup(void) +static void __init dreamcast_setup(char **cmdline_p) { int i; @@ -76,6 +58,16 @@ int __init platform_setup(void) if (gapspci_init() < 0) printk(KERN_WARNING "GAPSPCI was not detected.\n"); #endif - - return 0; } + +struct sh_machine_vector mv_dreamcast __initmv = { + .mv_name = "Sega Dreamcast", + .mv_setup = dreamcast_setup, + .mv_irq_demux = systemasic_irq_demux, + +#ifdef CONFIG_PCI + .mv_consistent_alloc = dreamcast_consistent_alloc, + .mv_consistent_free = dreamcast_consistent_free, +#endif +}; +ALIAS_MV(dreamcast) diff --git a/arch/sh/boards/ec3104/setup.c b/arch/sh/boards/ec3104/setup.c index 4b3ef16a0e96..902bc975a13e 100644 --- a/arch/sh/boards/ec3104/setup.c +++ b/arch/sh/boards/ec3104/setup.c @@ -21,22 +21,36 @@ #include #include #include - #include #include #include #include -const char *get_system_type(void) +static void __init ec3104_setup(char **cmdline_p) { - return "EC3104"; + char str[8]; + int i; + + for (i=0; i<8; i++) + str[i] = ctrl_readb(EC3104_BASE + i); + + for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++) + irq_desc[i].handler = &ec3104_int; + + printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n", + str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE); + + /* mask all interrupts. this should have been done by the boot + * loader for us but we want to be sure ... */ + ctrl_writel(0xffffffff, EC3104_IMR); } /* * The Machine Vector */ - struct sh_machine_vector mv_ec3104 __initmv = { + .mv_name = "EC3104", + .mv_setup = ec3104_setup, .mv_nr_irqs = 96, .mv_inb = ec3104_inb, @@ -48,31 +62,4 @@ struct sh_machine_vector mv_ec3104 __initmv = { .mv_irq_demux = ec3104_irq_demux, }; - ALIAS_MV(ec3104) - -int __init platform_setup(void) -{ - char str[8]; - int i; - - if (0) - return 0; - - for (i=0; i<8; i++) - str[i] = ctrl_readb(EC3104_BASE + i); - - for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++) - irq_desc[i].chip = &ec3104_int; - - printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n", - str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE); - - - /* mask all interrupts. this should have been done by the boot - * loader for us but we want to be sure ... */ - ctrl_writel(0xffffffff, EC3104_IMR); - - return 0; -} - diff --git a/arch/sh/boards/hp6xx/Makefile b/arch/sh/boards/hp6xx/Makefile index fdf98ffcf437..ff1b7f5b4e91 100644 --- a/arch/sh/boards/hp6xx/Makefile +++ b/arch/sh/boards/hp6xx/Makefile @@ -2,8 +2,6 @@ # Makefile for the HP6xx specific parts of the kernel # -obj-y := mach.o setup.o +obj-y := setup.o obj-$(CONFIG_PM) += pm.o pm_wakeup.o obj-$(CONFIG_APM) += hp6xx_apm.o - - diff --git a/arch/sh/boards/hp6xx/setup.c b/arch/sh/boards/hp6xx/setup.c index 629016bec809..60ab17ad6054 100644 --- a/arch/sh/boards/hp6xx/setup.c +++ b/arch/sh/boards/hp6xx/setup.c @@ -19,12 +19,7 @@ #define SCPCR 0xa4000116 #define SCPDR 0xa4000136 -const char *get_system_type(void) -{ - return "HP6xx"; -} - -int __init platform_setup(void) +static void __init hp6xx_setup(char **cmdline_p) { u8 v8; u16 v; @@ -64,6 +59,42 @@ int __init platform_setup(void) v &= ~SCPCR_TS_MASK; v |= SCPCR_TS_ENABLE; ctrl_outw(v, SCPCR); - - return 0; } + +/* + * XXX: This is stupid, we should have a generic machine vector for the cchips + * and just wrap the platform setup code in to this, as it's the only thing + * that ends up being different. + */ +struct sh_machine_vector mv_hp6xx __initmv = { + .mv_name = "hp6xx", + .mv_setup = hp6xx_setup, + .mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM, + + .mv_inb = hd64461_inb, + .mv_inw = hd64461_inw, + .mv_inl = hd64461_inl, + .mv_outb = hd64461_outb, + .mv_outw = hd64461_outw, + .mv_outl = hd64461_outl, + + .mv_inb_p = hd64461_inb_p, + .mv_inw_p = hd64461_inw, + .mv_inl_p = hd64461_inl, + .mv_outb_p = hd64461_outb_p, + .mv_outw_p = hd64461_outw, + .mv_outl_p = hd64461_outl, + + .mv_insb = hd64461_insb, + .mv_insw = hd64461_insw, + .mv_insl = hd64461_insl, + .mv_outsb = hd64461_outsb, + .mv_outsw = hd64461_outsw, + .mv_outsl = hd64461_outsl, + + .mv_readw = hd64461_readw, + .mv_writew = hd64461_writew, + + .mv_irq_demux = hd64461_irq_demux, +}; +ALIAS_MV(hp6xx) diff --git a/arch/sh/boards/landisk/setup.c b/arch/sh/boards/landisk/setup.c index 3a795cfb1eda..127b9e020e00 100644 --- a/arch/sh/boards/landisk/setup.c +++ b/arch/sh/boards/landisk/setup.c @@ -69,42 +69,6 @@ static void heartbeat_landisk(void) landisk_buzzerparam >>= 1; } -/* - * The Machine Vector - */ -struct sh_machine_vector mv_landisk __initmv = { - .mv_nr_irqs = 72, - .mv_inb = landisk_inb, - .mv_inw = landisk_inw, - .mv_inl = landisk_inl, - .mv_outb = landisk_outb, - .mv_outw = landisk_outw, - .mv_outl = landisk_outl, - .mv_inb_p = landisk_inb_p, - .mv_inw_p = landisk_inw, - .mv_inl_p = landisk_inl, - .mv_outb_p = landisk_outb_p, - .mv_outw_p = landisk_outw, - .mv_outl_p = landisk_outl, - .mv_insb = landisk_insb, - .mv_insw = landisk_insw, - .mv_insl = landisk_insl, - .mv_outsb = landisk_outsb, - .mv_outsw = landisk_outsw, - .mv_outsl = landisk_outsl, - .mv_ioport_map = landisk_ioport_map, - .mv_init_irq = init_landisk_IRQ, -#ifdef CONFIG_HEARTBEAT - .mv_heartbeat = heartbeat_landisk, -#endif -}; -ALIAS_MV(landisk) - -const char *get_system_type(void) -{ - return "LANDISK"; -} - static void landisk_power_off(void) { ctrl_outb(0x01, PA_SHUTDOWN); @@ -132,16 +96,6 @@ static void check_usl5p(void) } } -void __init platform_setup(void) -{ - landisk_buzzerparam = 0; - check_usl5p(); - - printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n"); - board_time_init = landisk_time_init; - pm_power_off = landisk_power_off; -} - void *area5_io_base; void *area6_io_base; @@ -176,4 +130,48 @@ static int __init landisk_cf_init(void) return 0; } -__initcall(landisk_cf_init); +static void __init landisk_setup(char **cmdline_p) +{ + device_initcall(landisk_cf_init); + + landisk_buzzerparam = 0; + check_usl5p(); + + printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n"); + + board_time_init = landisk_time_init; + pm_power_off = landisk_power_off; +} + +/* + * The Machine Vector + */ +struct sh_machine_vector mv_landisk __initmv = { + .mv_name = "LANDISK", + .mv_setup = landisk_setup, + .mv_nr_irqs = 72, + .mv_inb = landisk_inb, + .mv_inw = landisk_inw, + .mv_inl = landisk_inl, + .mv_outb = landisk_outb, + .mv_outw = landisk_outw, + .mv_outl = landisk_outl, + .mv_inb_p = landisk_inb_p, + .mv_inw_p = landisk_inw, + .mv_inl_p = landisk_inl, + .mv_outb_p = landisk_outb_p, + .mv_outw_p = landisk_outw, + .mv_outl_p = landisk_outl, + .mv_insb = landisk_insb, + .mv_insw = landisk_insw, + .mv_insl = landisk_insl, + .mv_outsb = landisk_outsb, + .mv_outsw = landisk_outsw, + .mv_outsl = landisk_outsl, + .mv_ioport_map = landisk_ioport_map, + .mv_init_irq = init_landisk_IRQ, +#ifdef CONFIG_HEARTBEAT + .mv_heartbeat = heartbeat_landisk, +#endif +}; +ALIAS_MV(landisk) diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c index e9c8ff221dda..8eb5d4303972 100644 --- a/arch/sh/boards/mpc1211/setup.c +++ b/arch/sh/boards/mpc1211/setup.c @@ -10,14 +10,12 @@ #include #include #include - #include #include #include #include #include - /* ALI15X3 SMBus address offsets */ #define SMBHSTSTS (0 + 0x3100) #define SMBHSTCNT (1 + 0x3100) @@ -50,11 +48,6 @@ #define ALI15X3_STS_TERM 0x80 /* terminated by abort */ #define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */ -const char *get_system_type(void) -{ - return "Interface MPC-1211(CTP/PCI/MPC-SH02)"; -} - static void __init pci_write_config(unsigned long busNo, unsigned long devNo, unsigned long fncNo, @@ -205,7 +198,7 @@ int mpc1211_irq_demux(int irq) return irq; } -void __init init_mpc1211_IRQ(void) +static void __init init_mpc1211_IRQ(void) { int i; /* @@ -289,26 +282,10 @@ static int put_smb_blk(unsigned char *p, int address, int command, int no) return 0; } -/* - * The Machine Vector - */ - -struct sh_machine_vector mv_mpc1211 __initmv = { - .mv_nr_irqs = 48, - .mv_irq_demux = mpc1211_irq_demux, - .mv_init_irq = init_mpc1211_IRQ, - -#ifdef CONFIG_HEARTBEAT - .mv_heartbeat = heartbeat_mpc1211, -#endif -}; - -ALIAS_MV(mpc1211) - /* arch/sh/boards/mpc1211/rtc.c */ void mpc1211_time_init(void); -int __init platform_setup(void) +static void __init mpc1211_setup(char **cmdline_p) { unsigned char spd_buf[128]; @@ -332,3 +309,18 @@ int __init platform_setup(void) return 0; } +/* + * The Machine Vector + */ +struct sh_machine_vector mv_mpc1211 __initmv = { + .mv_name = "Interface MPC-1211(CTP/PCI/MPC-SH02)", + .mv_setup = mpc1211_setup, + .mv_nr_irqs = 48, + .mv_irq_demux = mpc1211_irq_demux, + .mv_init_irq = init_mpc1211_IRQ, + +#ifdef CONFIG_HEARTBEAT + .mv_heartbeat = heartbeat_mpc1211, +#endif +}; +ALIAS_MV(mpc1211) diff --git a/arch/sh/boards/renesas/edosk7705/setup.c b/arch/sh/boards/renesas/edosk7705/setup.c index ba143fa4afaa..ec5be0107719 100644 --- a/arch/sh/boards/renesas/edosk7705/setup.c +++ b/arch/sh/boards/renesas/edosk7705/setup.c @@ -8,19 +8,21 @@ * Modified for edosk7705 development * board by S. Dunn, 2003. */ - #include #include -#include #include -static void init_edosk7705(void); +static void __init sh_edosk7705_init_irq(void) +{ + /* This is the Ethernet interrupt */ + make_imask_irq(0x09); +} /* * The Machine Vector */ - struct sh_machine_vector mv_edosk7705 __initmv = { + .mv_name = "EDOSK7705", .mv_nr_irqs = 80, .mv_inb = sh_edosk7705_inb, @@ -37,23 +39,6 @@ struct sh_machine_vector mv_edosk7705 __initmv = { .mv_outsl = sh_edosk7705_outsl, .mv_isa_port2addr = sh_edosk7705_isa_port2addr, - .mv_init_irq = init_edosk7705, + .mv_init_irq = sh_edosk7705_init_irq, }; ALIAS_MV(edosk7705) - -static void __init init_edosk7705(void) -{ - /* This is the Ethernet interrupt */ - make_imask_irq(0x09); -} - -const char *get_system_type(void) -{ - return "EDOSK7705"; -} - -void __init platform_setup(void) -{ - /* Nothing .. */ -} - diff --git a/arch/sh/boards/renesas/hs7751rvoip/setup.c b/arch/sh/boards/renesas/hs7751rvoip/setup.c index a2cbcc5d530f..0414c15c3458 100644 --- a/arch/sh/boards/renesas/hs7751rvoip/setup.c +++ b/arch/sh/boards/renesas/hs7751rvoip/setup.c @@ -1,15 +1,12 @@ /* - * linux/arch/sh/kernel/setup_hs7751rvoip.c + * Renesas Technology Sales HS7751RVoIP Support. * * Copyright (C) 2000 Kazumoto Kojima * - * Renesas Technology Sales HS7751RVoIP Support. - * * Modified for HS7751RVoIP by * Atom Create Engineering Co., Ltd. 2002. * Lineo uSolutions, Inc. 2003. */ - #include #include #include @@ -23,8 +20,6 @@ #include #include -unsigned int debug_counter; - static void __init hs7751rvoip_init_irq(void) { #if defined(CONFIG_HS7751RVOIP_CODEC) @@ -35,56 +30,11 @@ static void __init hs7751rvoip_init_irq(void) init_hs7751rvoip_IRQ(); } -struct sh_machine_vector mv_hs7751rvoip __initmv = { - .mv_nr_irqs = 72, - - .mv_inb = hs7751rvoip_inb, - .mv_inw = hs7751rvoip_inw, - .mv_inl = hs7751rvoip_inl, - .mv_outb = hs7751rvoip_outb, - .mv_outw = hs7751rvoip_outw, - .mv_outl = hs7751rvoip_outl, - - .mv_inb_p = hs7751rvoip_inb_p, - .mv_inw_p = hs7751rvoip_inw, - .mv_inl_p = hs7751rvoip_inl, - .mv_outb_p = hs7751rvoip_outb_p, - .mv_outw_p = hs7751rvoip_outw, - .mv_outl_p = hs7751rvoip_outl, - - .mv_insb = hs7751rvoip_insb, - .mv_insw = hs7751rvoip_insw, - .mv_insl = hs7751rvoip_insl, - .mv_outsb = hs7751rvoip_outsb, - .mv_outsw = hs7751rvoip_outsw, - .mv_outsl = hs7751rvoip_outsl, - - .mv_init_irq = hs7751rvoip_init_irq, - .mv_ioport_map = hs7751rvoip_ioport_map, -}; -ALIAS_MV(hs7751rvoip) - -const char *get_system_type(void) -{ - return "HS7751RVoIP"; -} - static void hs7751rvoip_power_off(void) { ctrl_outw(ctrl_inw(PA_OUTPORTR) & 0xffdf, PA_OUTPORTR); } -/* - * Initialize the board - */ -void __init platform_setup(void) -{ - printk(KERN_INFO "Renesas Technology Sales HS7751RVoIP-2 support.\n"); - ctrl_outb(0xf0, PA_OUTPORTR); - pm_power_off = hs7751rvoip_power_off; - debug_counter = 0; -} - void *area5_io8_base; void *area6_io8_base; void *area5_io16_base; @@ -127,4 +77,46 @@ static int __init hs7751rvoip_cf_init(void) return 0; } -__initcall(hs7751rvoip_cf_init); +/* + * Initialize the board + */ +static void __init hs7751rvoip_setup(char **cmdline_p) +{ + device_initcall(hs7751rvoip_cf_init); + + ctrl_outb(0xf0, PA_OUTPORTR); + pm_power_off = hs7751rvoip_power_off; + + printk(KERN_INFO "Renesas Technology Sales HS7751RVoIP-2 support.\n"); +} + +struct sh_machine_vector mv_hs7751rvoip __initmv = { + .mv_name = "HS7751RVoIP", + .mv_setup = hs7751rvoip_setup, + .mv_nr_irqs = 72, + + .mv_inb = hs7751rvoip_inb, + .mv_inw = hs7751rvoip_inw, + .mv_inl = hs7751rvoip_inl, + .mv_outb = hs7751rvoip_outb, + .mv_outw = hs7751rvoip_outw, + .mv_outl = hs7751rvoip_outl, + + .mv_inb_p = hs7751rvoip_inb_p, + .mv_inw_p = hs7751rvoip_inw, + .mv_inl_p = hs7751rvoip_inl, + .mv_outb_p = hs7751rvoip_outb_p, + .mv_outw_p = hs7751rvoip_outw, + .mv_outl_p = hs7751rvoip_outl, + + .mv_insb = hs7751rvoip_insb, + .mv_insw = hs7751rvoip_insw, + .mv_insl = hs7751rvoip_insl, + .mv_outsb = hs7751rvoip_outsb, + .mv_outsw = hs7751rvoip_outsw, + .mv_outsl = hs7751rvoip_outsl, + + .mv_init_irq = hs7751rvoip_init_irq, + .mv_ioport_map = hs7751rvoip_ioport_map, +}; +ALIAS_MV(hs7751rvoip) diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c index 0e4d5e1b541c..b941aa0aa34e 100644 --- a/arch/sh/boards/renesas/r7780rp/setup.c +++ b/arch/sh/boards/renesas/r7780rp/setup.c @@ -20,41 +20,6 @@ extern void heartbeat_r7780rp(void); extern void init_r7780rp_IRQ(void); -/* - * The Machine Vector - */ -struct sh_machine_vector mv_r7780rp __initmv = { - .mv_nr_irqs = 109, - - .mv_inb = r7780rp_inb, - .mv_inw = r7780rp_inw, - .mv_inl = r7780rp_inl, - .mv_outb = r7780rp_outb, - .mv_outw = r7780rp_outw, - .mv_outl = r7780rp_outl, - - .mv_inb_p = r7780rp_inb_p, - .mv_inw_p = r7780rp_inw, - .mv_inl_p = r7780rp_inl, - .mv_outb_p = r7780rp_outb_p, - .mv_outw_p = r7780rp_outw, - .mv_outl_p = r7780rp_outl, - - .mv_insb = r7780rp_insb, - .mv_insw = r7780rp_insw, - .mv_insl = r7780rp_insl, - .mv_outsb = r7780rp_outsb, - .mv_outsw = r7780rp_outsw, - .mv_outsl = r7780rp_outsl, - - .mv_ioport_map = r7780rp_ioport_map, - .mv_init_irq = init_r7780rp_IRQ, -#ifdef CONFIG_HEARTBEAT - .mv_heartbeat = heartbeat_r7780rp, -#endif -}; -ALIAS_MV(r7780rp) - static struct resource m66596_usb_host_resources[] = { [0] = { .start = 0xa4800000, @@ -88,7 +53,6 @@ static int __init r7780rp_devices_setup(void) return platform_add_devices(r7780rp_devices, ARRAY_SIZE(r7780rp_devices)); } -__initcall(r7780rp_devices_setup); /* * Platform specific clocks @@ -117,11 +81,6 @@ static struct clk *r7780rp_clocks[] = { &ivdr_clk, }; -const char *get_system_type(void) -{ - return "Highlander R7780RP-1"; -} - static void r7780rp_power_off(void) { #ifdef CONFIG_SH_R7780MP @@ -132,11 +91,13 @@ static void r7780rp_power_off(void) /* * Initialize the board */ -void __init platform_setup(void) +static void __init r7780rp_setup(char **cmdline_p) { u16 ver = ctrl_inw(PA_VERREG); int i; + device_initcall(r7780rp_devices_setup); + printk(KERN_INFO "Renesas Solutions Highlander R7780RP-1 support.\n"); printk(KERN_INFO "Board version: %d (revision %d), " @@ -162,3 +123,41 @@ void __init platform_setup(void) pm_power_off = r7780rp_power_off; } + +/* + * The Machine Vector + */ +struct sh_machine_vector mv_r7780rp __initmv = { + .mv_name = "Highlander R7780RP-1", + .mv_setup = r7780rp_setup, + + .mv_nr_irqs = 109, + + .mv_inb = r7780rp_inb, + .mv_inw = r7780rp_inw, + .mv_inl = r7780rp_inl, + .mv_outb = r7780rp_outb, + .mv_outw = r7780rp_outw, + .mv_outl = r7780rp_outl, + + .mv_inb_p = r7780rp_inb_p, + .mv_inw_p = r7780rp_inw, + .mv_inl_p = r7780rp_inl, + .mv_outb_p = r7780rp_outb_p, + .mv_outw_p = r7780rp_outw, + .mv_outl_p = r7780rp_outl, + + .mv_insb = r7780rp_insb, + .mv_insw = r7780rp_insw, + .mv_insl = r7780rp_insl, + .mv_outsb = r7780rp_outsb, + .mv_outsw = r7780rp_outsw, + .mv_outsl = r7780rp_outsl, + + .mv_ioport_map = r7780rp_ioport_map, + .mv_init_irq = init_r7780rp_IRQ, +#ifdef CONFIG_HEARTBEAT + .mv_heartbeat = heartbeat_r7780rp, +#endif +}; +ALIAS_MV(r7780rp) diff --git a/arch/sh/boards/renesas/rts7751r2d/Makefile b/arch/sh/boards/renesas/rts7751r2d/Makefile index eee1ed6f5727..686fc9ea5989 100644 --- a/arch/sh/boards/renesas/rts7751r2d/Makefile +++ b/arch/sh/boards/renesas/rts7751r2d/Makefile @@ -2,5 +2,5 @@ # Makefile for the RTS7751R2D specific parts of the kernel # -obj-y := mach.o setup.o io.o irq.o led.o - +obj-y := setup.o io.o irq.o +obj-$(CONFIG_HEARTBEAT) += led.o diff --git a/arch/sh/boards/renesas/rts7751r2d/mach.c b/arch/sh/boards/renesas/rts7751r2d/mach.c deleted file mode 100644 index fe3e8735e9f8..000000000000 --- a/arch/sh/boards/renesas/rts7751r2d/mach.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * linux/arch/sh/kernel/mach_rts7751r2d.c - * - * Minor tweak of mach_se.c file to reference rts7751r2d-specific items. - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Machine vector for the Renesas Technology sales RTS7751R2D - */ - -#include -#include - -#include -#include -#include -#include - -extern void heartbeat_rts7751r2d(void); -extern void init_rts7751r2d_IRQ(void); -extern int rts7751r2d_irq_demux(int irq); - -extern void *voyagergx_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t); -extern int voyagergx_consistent_free(struct device *, size_t, void *, dma_addr_t); - -/* - * The Machine Vector - */ - -struct sh_machine_vector mv_rts7751r2d __initmv = { - .mv_nr_irqs = 72, - - .mv_inb = rts7751r2d_inb, - .mv_inw = rts7751r2d_inw, - .mv_inl = rts7751r2d_inl, - .mv_outb = rts7751r2d_outb, - .mv_outw = rts7751r2d_outw, - .mv_outl = rts7751r2d_outl, - - .mv_inb_p = rts7751r2d_inb_p, - .mv_inw_p = rts7751r2d_inw, - .mv_inl_p = rts7751r2d_inl, - .mv_outb_p = rts7751r2d_outb_p, - .mv_outw_p = rts7751r2d_outw, - .mv_outl_p = rts7751r2d_outl, - - .mv_insb = rts7751r2d_insb, - .mv_insw = rts7751r2d_insw, - .mv_insl = rts7751r2d_insl, - .mv_outsb = rts7751r2d_outsb, - .mv_outsw = rts7751r2d_outsw, - .mv_outsl = rts7751r2d_outsl, - - .mv_init_irq = init_rts7751r2d_IRQ, -#ifdef CONFIG_HEARTBEAT - .mv_heartbeat = heartbeat_rts7751r2d, -#endif - .mv_irq_demux = rts7751r2d_irq_demux, - -#ifdef CONFIG_USB_OHCI_HCD - .mv_consistent_alloc = voyagergx_consistent_alloc, - .mv_consistent_free = voyagergx_consistent_free, -#endif -}; -ALIAS_MV(rts7751r2d) diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c index bb56c018f2ee..20597a6e6702 100644 --- a/arch/sh/boards/renesas/rts7751r2d/setup.c +++ b/arch/sh/boards/renesas/rts7751r2d/setup.c @@ -13,9 +13,17 @@ #include #include #include +#include #include #include +extern void heartbeat_rts7751r2d(void); +extern void init_rts7751r2d_IRQ(void); +extern int rts7751r2d_irq_demux(int irq); + +extern void *voyagergx_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t); +extern int voyagergx_consistent_free(struct device *, size_t, void *, dma_addr_t); + static struct plat_serial8250_port uart_platform_data[] = { { .membase = (void *)VOYAGER_UART_BASE, @@ -70,12 +78,6 @@ static int __init rts7751r2d_devices_setup(void) return platform_add_devices(rts7751r2d_devices, ARRAY_SIZE(rts7751r2d_devices)); } -__initcall(rts7751r2d_devices_setup); - -const char *get_system_type(void) -{ - return "RTS7751R2D"; -} static void rts7751r2d_power_off(void) { @@ -85,12 +87,56 @@ static void rts7751r2d_power_off(void) /* * Initialize the board */ -void __init platform_setup(void) +static void __init rts7751r2d_setup(char **cmdline_p) { - printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); + device_initcall(rts7751r2d_devices_setup); + ctrl_outw(0x0000, PA_OUTPORT); pm_power_off = rts7751r2d_power_off; voyagergx_serial_init(); + printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); } + +/* + * The Machine Vector + */ +struct sh_machine_vector mv_rts7751r2d __initmv = { + .mv_name = "RTS7751R2D", + .mv_setup = rts7751r2d_setup, + .mv_nr_irqs = 72, + + .mv_inb = rts7751r2d_inb, + .mv_inw = rts7751r2d_inw, + .mv_inl = rts7751r2d_inl, + .mv_outb = rts7751r2d_outb, + .mv_outw = rts7751r2d_outw, + .mv_outl = rts7751r2d_outl, + + .mv_inb_p = rts7751r2d_inb_p, + .mv_inw_p = rts7751r2d_inw, + .mv_inl_p = rts7751r2d_inl, + .mv_outb_p = rts7751r2d_outb_p, + .mv_outw_p = rts7751r2d_outw, + .mv_outl_p = rts7751r2d_outl, + + .mv_insb = rts7751r2d_insb, + .mv_insw = rts7751r2d_insw, + .mv_insl = rts7751r2d_insl, + .mv_outsb = rts7751r2d_outsb, + .mv_outsw = rts7751r2d_outsw, + .mv_outsl = rts7751r2d_outsl, + + .mv_init_irq = init_rts7751r2d_IRQ, +#ifdef CONFIG_HEARTBEAT + .mv_heartbeat = heartbeat_rts7751r2d, +#endif + .mv_irq_demux = rts7751r2d_irq_demux, + +#ifdef CONFIG_USB_SM501 + .mv_consistent_alloc = voyagergx_consistent_alloc, + .mv_consistent_free = voyagergx_consistent_free, +#endif +}; +ALIAS_MV(rts7751r2d) diff --git a/arch/sh/boards/renesas/systemh/setup.c b/arch/sh/boards/renesas/systemh/setup.c index 433c7c3f35e2..a8467bf90c25 100644 --- a/arch/sh/boards/renesas/systemh/setup.c +++ b/arch/sh/boards/renesas/systemh/setup.c @@ -20,20 +20,16 @@ extern void make_systemh_irq(unsigned int irq); -const char *get_system_type(void) -{ - return "7751 SystemH"; -} - /* * Initialize IRQ setting */ -void __init init_7751systemh_IRQ(void) +static void __init sh7751systemh_init_irq(void) { make_systemh_irq(0xb); /* Ethernet interrupt */ } struct sh_machine_vector mv_7751systemh __initmv = { + .mv_name = "7751 SystemH", .mv_nr_irqs = 72, .mv_inb = sh7751systemh_inb, @@ -57,12 +53,6 @@ struct sh_machine_vector mv_7751systemh __initmv = { .mv_outsw = sh7751systemh_outsw, .mv_outsl = sh7751systemh_outsl, - .mv_init_irq = init_7751systemh_IRQ, + .mv_init_irq = sh7751system_init_irq, }; ALIAS_MV(7751systemh) - -int __init platform_setup(void) -{ - return 0; -} - diff --git a/arch/sh/boards/saturn/setup.c b/arch/sh/boards/saturn/setup.c index bea6c572ad82..a3a37c9aad2e 100644 --- a/arch/sh/boards/saturn/setup.c +++ b/arch/sh/boards/saturn/setup.c @@ -9,22 +9,17 @@ */ #include #include - #include #include #include extern int saturn_irq_demux(int irq_nr); -const char *get_system_type(void) -{ - return "Sega Saturn"; -} - /* * The Machine Vector */ struct sh_machine_vector mv_saturn __initmv = { + .mv_name = "Sega Saturn", .mv_nr_irqs = 80, /* Fix this later */ .mv_isa_port2addr = saturn_isa_port2addr, @@ -33,11 +28,4 @@ struct sh_machine_vector mv_saturn __initmv = { .mv_ioremap = saturn_ioremap, .mv_iounmap = saturn_iounmap, }; - ALIAS_MV(saturn) - -int __init platform_setup(void) -{ - return 0; -} - diff --git a/arch/sh/boards/se/7300/setup.c b/arch/sh/boards/se/7300/setup.c index bb7e1a189be8..6f082a722d42 100644 --- a/arch/sh/boards/se/7300/setup.c +++ b/arch/sh/boards/se/7300/setup.c @@ -14,17 +14,11 @@ void heartbeat_7300se(void); void init_7300se_IRQ(void); -const char * -get_system_type(void) -{ - return "SolutionEngine 7300"; -} - /* * The Machine Vector */ - struct sh_machine_vector mv_7300se __initmv = { + .mv_name = "SolutionEngine 7300", .mv_nr_irqs = 109, .mv_inb = sh7300se_inb, .mv_inw = sh7300se_inw, @@ -52,13 +46,4 @@ struct sh_machine_vector mv_7300se __initmv = { .mv_heartbeat = heartbeat_7300se, #endif }; - ALIAS_MV(7300se) -/* - * Initialize the board - */ -void __init -platform_setup(void) -{ - -} diff --git a/arch/sh/boards/se/73180/setup.c b/arch/sh/boards/se/73180/setup.c index 4daf53b1457f..b38ef50a160a 100644 --- a/arch/sh/boards/se/73180/setup.c +++ b/arch/sh/boards/se/73180/setup.c @@ -17,17 +17,11 @@ void heartbeat_73180se(void); void init_73180se_IRQ(void); -const char * -get_system_type(void) -{ - return "SolutionEngine 73180"; -} - /* * The Machine Vector */ - struct sh_machine_vector mv_73180se __initmv = { + .mv_name = "SolutionEngine 73180", .mv_nr_irqs = 108, .mv_inb = sh73180se_inb, .mv_inw = sh73180se_inw, @@ -56,13 +50,4 @@ struct sh_machine_vector mv_73180se __initmv = { .mv_heartbeat = heartbeat_73180se, #endif }; - ALIAS_MV(73180se) -/* - * Initialize the board - */ -void __init -platform_setup(void) -{ - -} diff --git a/arch/sh/boards/se/770x/Makefile b/arch/sh/boards/se/770x/Makefile index c96ed6933fe1..9a5035f80ec0 100644 --- a/arch/sh/boards/se/770x/Makefile +++ b/arch/sh/boards/se/770x/Makefile @@ -2,6 +2,5 @@ # Makefile for the 770x SolutionEngine specific parts of the kernel # -obj-y := mach.o setup.o io.o irq.o - +obj-y := setup.o io.o irq.o obj-$(CONFIG_HEARTBEAT) += led.o diff --git a/arch/sh/boards/se/770x/mach.c b/arch/sh/boards/se/770x/mach.c deleted file mode 100644 index e8968b71c353..000000000000 --- a/arch/sh/boards/se/770x/mach.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * linux/arch/sh/kernel/mach_se.c - * - * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Machine vector for the Hitachi SolutionEngine - */ - -#include - -#include -#include -#include - -void heartbeat_se(void); -void init_se_IRQ(void); - -/* - * The Machine Vector - */ - -struct sh_machine_vector mv_se __initmv = { -#if defined(CONFIG_CPU_SH4) - .mv_nr_irqs = 48, -#elif defined(CONFIG_CPU_SUBTYPE_SH7708) - .mv_nr_irqs = 32, -#elif defined(CONFIG_CPU_SUBTYPE_SH7709) - .mv_nr_irqs = 61, -#elif defined(CONFIG_CPU_SUBTYPE_SH7705) - .mv_nr_irqs = 86, -#endif - - .mv_inb = se_inb, - .mv_inw = se_inw, - .mv_inl = se_inl, - .mv_outb = se_outb, - .mv_outw = se_outw, - .mv_outl = se_outl, - - .mv_inb_p = se_inb_p, - .mv_inw_p = se_inw, - .mv_inl_p = se_inl, - .mv_outb_p = se_outb_p, - .mv_outw_p = se_outw, - .mv_outl_p = se_outl, - - .mv_insb = se_insb, - .mv_insw = se_insw, - .mv_insl = se_insl, - .mv_outsb = se_outsb, - .mv_outsw = se_outsw, - .mv_outsl = se_outsl, - - .mv_init_irq = init_se_IRQ, -#ifdef CONFIG_HEARTBEAT - .mv_heartbeat = heartbeat_se, -#endif -}; -ALIAS_MV(se) diff --git a/arch/sh/boards/se/770x/setup.c b/arch/sh/boards/se/770x/setup.c index c9f75272e751..f3f82b7c8217 100644 --- a/arch/sh/boards/se/770x/setup.c +++ b/arch/sh/boards/se/770x/setup.c @@ -7,15 +7,17 @@ * Hitachi SolutionEngine Support. * */ - #include #include - #include #include #include #include #include +#include + +void heartbeat_se(void); +void init_se_IRQ(void); /* * Configure the Super I/O chip @@ -26,7 +28,8 @@ static void __init smsc_config(int index, int data) outb_p(data, DATA_PORT); } -static void __init init_smsc(void) +/* XXX: Another candidate for a more generic cchip machine vector */ +static void __init smsc_setup(char **cmdline_p) { outb_p(CONFIG_ENTER, CONFIG_PORT); outb_p(CONFIG_ENTER, CONFIG_PORT); @@ -69,16 +72,46 @@ static void __init init_smsc(void) outb_p(CONFIG_EXIT, CONFIG_PORT); } -const char *get_system_type(void) -{ - return "SolutionEngine"; -} - /* - * Initialize the board + * The Machine Vector */ -void __init platform_setup(void) -{ - init_smsc(); - /* XXX: RTC setting comes here */ -} +struct sh_machine_vector mv_se __initmv = { + .mv_name = "SolutionEngine", + .mv_setup = smsc_setup, +#if defined(CONFIG_CPU_SH4) + .mv_nr_irqs = 48, +#elif defined(CONFIG_CPU_SUBTYPE_SH7708) + .mv_nr_irqs = 32, +#elif defined(CONFIG_CPU_SUBTYPE_SH7709) + .mv_nr_irqs = 61, +#elif defined(CONFIG_CPU_SUBTYPE_SH7705) + .mv_nr_irqs = 86, +#endif + + .mv_inb = se_inb, + .mv_inw = se_inw, + .mv_inl = se_inl, + .mv_outb = se_outb, + .mv_outw = se_outw, + .mv_outl = se_outl, + + .mv_inb_p = se_inb_p, + .mv_inw_p = se_inw, + .mv_inl_p = se_inl, + .mv_outb_p = se_outb_p, + .mv_outw_p = se_outw, + .mv_outl_p = se_outl, + + .mv_insb = se_insb, + .mv_insw = se_insw, + .mv_insl = se_insl, + .mv_outsb = se_outsb, + .mv_outsw = se_outsw, + .mv_outsl = se_outsl, + + .mv_init_irq = init_se_IRQ, +#ifdef CONFIG_HEARTBEAT + .mv_heartbeat = heartbeat_se, +#endif +}; +ALIAS_MV(se) diff --git a/arch/sh/boards/se/7751/Makefile b/arch/sh/boards/se/7751/Makefile index 07bf17a4a19b..188900c48321 100644 --- a/arch/sh/boards/se/7751/Makefile +++ b/arch/sh/boards/se/7751/Makefile @@ -2,8 +2,7 @@ # Makefile for the 7751 SolutionEngine specific parts of the kernel # -obj-y := mach.o setup.o io.o irq.o +obj-y := setup.o io.o irq.o obj-$(CONFIG_PCI) += pci.o obj-$(CONFIG_HEARTBEAT) += led.o - diff --git a/arch/sh/boards/se/7751/mach.c b/arch/sh/boards/se/7751/mach.c deleted file mode 100644 index 1bb9047d863b..000000000000 --- a/arch/sh/boards/se/7751/mach.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * linux/arch/sh/kernel/mach_7751se.c - * - * Minor tweak of mach_se.c file to reference 7751se-specific items. - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Machine vector for the Hitachi 7751 SolutionEngine - */ - -#include -#include -#include - -void heartbeat_7751se(void); -void init_7751se_IRQ(void); - -/* - * The Machine Vector - */ - -struct sh_machine_vector mv_7751se __initmv = { - .mv_nr_irqs = 72, - - .mv_inb = sh7751se_inb, - .mv_inw = sh7751se_inw, - .mv_inl = sh7751se_inl, - .mv_outb = sh7751se_outb, - .mv_outw = sh7751se_outw, - .mv_outl = sh7751se_outl, - - .mv_inb_p = sh7751se_inb_p, - .mv_inw_p = sh7751se_inw, - .mv_inl_p = sh7751se_inl, - .mv_outb_p = sh7751se_outb_p, - .mv_outw_p = sh7751se_outw, - .mv_outl_p = sh7751se_outl, - - .mv_insl = sh7751se_insl, - .mv_outsl = sh7751se_outsl, - - .mv_init_irq = init_7751se_IRQ, -#ifdef CONFIG_HEARTBEAT - .mv_heartbeat = heartbeat_7751se, -#endif -}; -ALIAS_MV(7751se) diff --git a/arch/sh/boards/se/7751/setup.c b/arch/sh/boards/se/7751/setup.c index 8b693105893c..73e826310ba8 100644 --- a/arch/sh/boards/se/7751/setup.c +++ b/arch/sh/boards/se/7751/setup.c @@ -15,72 +15,11 @@ #include #include -#ifdef CONFIG_SH_KGDB -#include -#endif - -/* - * Configure the Super I/O chip - */ -#if 0 -/* Leftover code from regular Solution Engine, for reference. */ -/* The SH7751 Solution Engine has a different SuperIO. */ -static void __init smsc_config(int index, int data) -{ - outb_p(index, INDEX_PORT); - outb_p(data, DATA_PORT); -} - -static void __init init_smsc(void) -{ - outb_p(CONFIG_ENTER, CONFIG_PORT); - outb_p(CONFIG_ENTER, CONFIG_PORT); - - /* FDC */ - smsc_config(CURRENT_LDN_INDEX, LDN_FDC); - smsc_config(ACTIVATE_INDEX, 0x01); - smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */ - - /* IDE1 */ - smsc_config(CURRENT_LDN_INDEX, LDN_IDE1); - smsc_config(ACTIVATE_INDEX, 0x01); - smsc_config(IRQ_SELECT_INDEX, 14); /* IRQ14 */ - - /* AUXIO (GPIO): to use IDE1 */ - smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO); - smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */ - smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */ - - /* COM1 */ - smsc_config(CURRENT_LDN_INDEX, LDN_COM1); - smsc_config(ACTIVATE_INDEX, 0x01); - smsc_config(IO_BASE_HI_INDEX, 0x03); - smsc_config(IO_BASE_LO_INDEX, 0xf8); - smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */ - - /* COM2 */ - smsc_config(CURRENT_LDN_INDEX, LDN_COM2); - smsc_config(ACTIVATE_INDEX, 0x01); - smsc_config(IO_BASE_HI_INDEX, 0x02); - smsc_config(IO_BASE_LO_INDEX, 0xf8); - smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */ - - /* RTC */ - smsc_config(CURRENT_LDN_INDEX, LDN_RTC); - smsc_config(ACTIVATE_INDEX, 0x01); - smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */ - - /* XXX: PARPORT, KBD, and MOUSE will come here... */ - outb_p(CONFIG_EXIT, CONFIG_PORT); -} -#endif - -const char *get_system_type(void) -{ - return "7751 SolutionEngine"; -} +void heartbeat_7751se(void); +void init_7751se_IRQ(void); #ifdef CONFIG_SH_KGDB +#include static int kgdb_uart_setup(void); static struct kgdb_sermap kgdb_uart_sermap = { "ttyS", 0, kgdb_uart_setup, NULL }; @@ -89,7 +28,7 @@ static struct kgdb_sermap kgdb_uart_sermap = /* * Initialize the board */ -void __init platform_setup(void) +static void __init sh7751se_setup(char **cmdline_p) { /* Call init_smsc() replacement to set up SuperIO. */ /* XXX: RTC setting comes here */ @@ -223,3 +162,37 @@ static int kgdb_uart_setup(void) return 0; } #endif /* CONFIG_SH_KGDB */ + + +/* + * The Machine Vector + */ + +struct sh_machine_vector mv_7751se __initmv = { + .mv_name = "7751 SolutionEngine", + .mv_setup = sh7751se_setup, + .mv_nr_irqs = 72, + + .mv_inb = sh7751se_inb, + .mv_inw = sh7751se_inw, + .mv_inl = sh7751se_inl, + .mv_outb = sh7751se_outb, + .mv_outw = sh7751se_outw, + .mv_outl = sh7751se_outl, + + .mv_inb_p = sh7751se_inb_p, + .mv_inw_p = sh7751se_inw, + .mv_inl_p = sh7751se_inl, + .mv_outb_p = sh7751se_outb_p, + .mv_outw_p = sh7751se_outw, + .mv_outl_p = sh7751se_outl, + + .mv_insl = sh7751se_insl, + .mv_outsl = sh7751se_outsl, + + .mv_init_irq = init_7751se_IRQ, +#ifdef CONFIG_HEARTBEAT + .mv_heartbeat = heartbeat_7751se, +#endif +}; +ALIAS_MV(7751se) diff --git a/arch/sh/boards/sh03/setup.c b/arch/sh/boards/sh03/setup.c index 7d31d6aed8a5..6c310587ddfe 100644 --- a/arch/sh/boards/sh03/setup.c +++ b/arch/sh/boards/sh03/setup.c @@ -13,12 +13,7 @@ #include #include -const char *get_system_type(void) -{ - return "Interface (CTP/PCI-SH03)"; -} - -static void init_sh03_IRQ(void) +static void __init init_sh03_IRQ(void) { ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); @@ -41,7 +36,17 @@ static void __iomem *sh03_ioport_map(unsigned long port, unsigned int size) return (void __iomem *)(port + PCI_IO_BASE); } +/* arch/sh/boards/sh03/rtc.c */ +void sh03_time_init(void); + +static void __init sh03_setup(char **cmdline_p) +{ + board_time_init = sh03_time_init; +} + struct sh_machine_vector mv_sh03 __initmv = { + .mv_name = "Interface (CTP/PCI-SH03)", + .mv_setup = sh03_setup, .mv_nr_irqs = 48, .mv_ioport_map = sh03_ioport_map, .mv_init_irq = init_sh03_IRQ, @@ -51,12 +56,3 @@ struct sh_machine_vector mv_sh03 __initmv = { #endif }; ALIAS_MV(sh03) - -/* arch/sh/boards/sh03/rtc.c */ -void sh03_time_init(void); - -int __init platform_setup(void) -{ - board_time_init = sh03_time_init; - return 0; -} diff --git a/arch/sh/boards/shmin/setup.c b/arch/sh/boards/shmin/setup.c index a950ec4d765d..2f0c19706cf9 100644 --- a/arch/sh/boards/shmin/setup.c +++ b/arch/sh/boards/shmin/setup.c @@ -14,21 +14,12 @@ #define PFC_PHCR 0xa400010e -const char *get_system_type(void) -{ - return "SHMIN"; -} - static void __init init_shmin_irq(void) { ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. } -void __init platform_setup(void) -{ -} - static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size) { static int dummy; @@ -43,6 +34,7 @@ static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size) } struct sh_machine_vector mv_shmin __initmv = { + .mv_name = "SHMIN", .mv_init_irq = init_shmin_irq, .mv_ioport_map = shmin_ioport_map, }; diff --git a/arch/sh/boards/snapgear/setup.c b/arch/sh/boards/snapgear/setup.c index 66ce32f8b13c..f5e98c56b530 100644 --- a/arch/sh/boards/snapgear/setup.c +++ b/arch/sh/boards/snapgear/setup.c @@ -81,16 +81,20 @@ static void __init init_snapgear_IRQ(void) make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY); } -const char *get_system_type(void) +/* + * Initialize the board + */ +static void __init snapgear_setup(char **cmdline_p) { - return "SnapGear SecureEdge5410"; + board_time_init = secureedge5410_rtc_init; } /* * The Machine Vector */ - struct sh_machine_vector mv_snapgear __initmv = { + .mv_name = "SnapGear SecureEdge5410", + .mv_setup = snapgear_setup, .mv_nr_irqs = 72, .mv_inb = snapgear_inb, @@ -110,15 +114,3 @@ struct sh_machine_vector mv_snapgear __initmv = { .mv_init_irq = init_snapgear_IRQ, }; ALIAS_MV(snapgear) - -/* - * Initialize the board - */ - -int __init platform_setup(void) -{ - board_time_init = secureedge5410_rtc_init; - - return 0; -} - diff --git a/arch/sh/boards/superh/microdev/setup.c b/arch/sh/boards/superh/microdev/setup.c index 61b402a3f5d7..031c814e6e76 100644 --- a/arch/sh/boards/superh/microdev/setup.c +++ b/arch/sh/boards/superh/microdev/setup.c @@ -10,7 +10,6 @@ * May be copied or modified under the terms of the GNU General Public * License. See linux/COPYING for more information. */ - #include #include #include @@ -21,41 +20,6 @@ extern void microdev_heartbeat(void); -/* - * The Machine Vector - */ - -struct sh_machine_vector mv_sh4202_microdev __initmv = { - .mv_nr_irqs = 72, /* QQQ need to check this - use the MACRO */ - - .mv_inb = microdev_inb, - .mv_inw = microdev_inw, - .mv_inl = microdev_inl, - .mv_outb = microdev_outb, - .mv_outw = microdev_outw, - .mv_outl = microdev_outl, - - .mv_inb_p = microdev_inb_p, - .mv_inw_p = microdev_inw_p, - .mv_inl_p = microdev_inl_p, - .mv_outb_p = microdev_outb_p, - .mv_outw_p = microdev_outw_p, - .mv_outl_p = microdev_outl_p, - - .mv_insb = microdev_insb, - .mv_insw = microdev_insw, - .mv_insl = microdev_insl, - .mv_outsb = microdev_outsb, - .mv_outsw = microdev_outsw, - .mv_outsl = microdev_outsl, - - .mv_init_irq = init_microdev_irq, - -#ifdef CONFIG_HEARTBEAT - .mv_heartbeat = microdev_heartbeat, -#endif -}; -ALIAS_MV(sh4202_microdev) /****************************************************************************/ @@ -113,11 +77,6 @@ ALIAS_MV(sh4202_microdev) /* assume a Keyboard Controller is present */ int microdev_kbd_controller_present = 1; -const char *get_system_type(void) -{ - return "SH4-202 MicroDev"; -} - static struct resource smc91x_resources[] = { [0] = { .start = 0x300, @@ -291,25 +250,9 @@ static int __init microdev_devices_setup(void) return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices)); } -__initcall(microdev_devices_setup); - -void __init platform_setup(void) -{ - int * const fpgaRevisionRegister = (int*)(MICRODEV_FPGA_GP_BASE + 0x8ul); - const int fpgaRevision = *fpgaRevisionRegister; - int * const CacheControlRegister = (int*)CCR; - - printk("SuperH %s board (FPGA rev: 0x%0x, CCR: 0x%0x)\n", - get_system_type(), fpgaRevision, *CacheControlRegister); -} - - -/****************************************************************************/ - - - /* - * Setup for the SMSC FDC37C93xAPM - */ +/* + * Setup for the SMSC FDC37C93xAPM + */ static int __init smsc_superio_setup(void) { @@ -412,8 +355,52 @@ static int __init smsc_superio_setup(void) return 0; } +static void __init microdev_setup(char **cmdline_p) +{ + int * const fpgaRevisionRegister = (int*)(MICRODEV_FPGA_GP_BASE + 0x8ul); + const int fpgaRevision = *fpgaRevisionRegister; + int * const CacheControlRegister = (int*)CCR; + + device_initcall(microdev_devices_setup); + device_initcall(smsc_superio_setup); -/* This is grotty, but, because kernel is always referenced on the link line - * before any devices, this is safe. + printk("SuperH %s board (FPGA rev: 0x%0x, CCR: 0x%0x)\n", + get_system_type(), fpgaRevision, *CacheControlRegister); +} + +/* + * The Machine Vector */ -__initcall(smsc_superio_setup); +struct sh_machine_vector mv_sh4202_microdev __initmv = { + .mv_name = "SH4-202 MicroDev", + .mv_setup = microdev_setup, + .mv_nr_irqs = 72, /* QQQ need to check this - use the MACRO */ + + .mv_inb = microdev_inb, + .mv_inw = microdev_inw, + .mv_inl = microdev_inl, + .mv_outb = microdev_outb, + .mv_outw = microdev_outw, + .mv_outl = microdev_outl, + + .mv_inb_p = microdev_inb_p, + .mv_inw_p = microdev_inw_p, + .mv_inl_p = microdev_inl_p, + .mv_outb_p = microdev_outb_p, + .mv_outw_p = microdev_outw_p, + .mv_outl_p = microdev_outl_p, + + .mv_insb = microdev_insb, + .mv_insw = microdev_insw, + .mv_insl = microdev_insl, + .mv_outsb = microdev_outsb, + .mv_outsw = microdev_outsw, + .mv_outsl = microdev_outsl, + + .mv_init_irq = init_microdev_irq, + +#ifdef CONFIG_HEARTBEAT + .mv_heartbeat = microdev_heartbeat, +#endif +}; +ALIAS_MV(sh4202_microdev) diff --git a/arch/sh/boards/titan/setup.c b/arch/sh/boards/titan/setup.c index c8b431c1d0fd..52b66d8b8d2a 100644 --- a/arch/sh/boards/titan/setup.c +++ b/arch/sh/boards/titan/setup.c @@ -20,19 +20,8 @@ static void __init init_titan_irq(void) make_ipr_irq( TITAN_IRQ_USB, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY); /* PCIRQ3 */ } -const char *get_system_type(void) -{ - return "Titan"; -} - -int __init platform_setup(void) -{ - printk("%s Platform Setup\n", get_system_type()); - return 0; -} - struct sh_machine_vector mv_titan __initmv = { - .mv_nr_irqs = NR_IRQS, + .mv_name = "Titan", .mv_inb = titan_inb, .mv_inw = titan_inw, diff --git a/arch/sh/boards/unknown/setup.c b/arch/sh/boards/unknown/setup.c index c5e4ed10876b..1c941370a2e3 100644 --- a/arch/sh/boards/unknown/setup.c +++ b/arch/sh/boards/unknown/setup.c @@ -14,19 +14,8 @@ */ #include #include -#include struct sh_machine_vector mv_unknown __initmv = { - .mv_nr_irqs = NR_IRQS, + .mv_name = "Unknown", }; ALIAS_MV(unknown) - -const char *get_system_type(void) -{ - return "Unknown"; -} - -void __init platform_setup(void) -{ -} - diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index 86ef17fe48b5..de8df969d6af 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -43,27 +43,14 @@ extern void * __rd_start, * __rd_end; * The bigger value means no problem. */ struct sh_cpuinfo boot_cpu_data = { CPU_SH_NONE, 10000000, }; +#ifdef CONFIG_VT struct screen_info screen_info; +#endif #if defined(CONFIG_SH_UNKNOWN) struct sh_machine_vector sh_mv; #endif -/* We need this to satisfy some external references. */ -struct screen_info screen_info = { - 0, 25, /* orig-x, orig-y */ - 0, /* unused */ - 0, /* orig-video-page */ - 0, /* orig-video-mode */ - 80, /* orig-video-cols */ - 0,0,0, /* ega_ax, ega_bx, ega_cx */ - 25, /* orig-video-lines */ - 0, /* orig-video-isVGA */ - 16 /* orig-video-points */ -}; - -extern void platform_setup(void); -extern char *get_system_type(void); extern int root_mountflags; #define MV_NAME_SIZE 32 @@ -90,29 +77,8 @@ static struct sh_machine_vector* __init get_mv_byname(const char* name); static char command_line[COMMAND_LINE_SIZE] = { 0, }; -struct resource standard_io_resources[] = { - { "dma1", 0x00, 0x1f }, - { "pic1", 0x20, 0x3f }, - { "timer", 0x40, 0x5f }, - { "keyboard", 0x60, 0x6f }, - { "dma page reg", 0x80, 0x8f }, - { "pic2", 0xa0, 0xbf }, - { "dma2", 0xc0, 0xdf }, - { "fpu", 0xf0, 0xff } -}; - -#define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource)) - -/* System RAM - interrupted by the 640kB-1M hole */ -#define code_resource (ram_resources[3]) -#define data_resource (ram_resources[4]) -static struct resource ram_resources[] = { - { "System RAM", 0x000000, 0x09ffff, IORESOURCE_BUSY }, - { "System RAM", 0x100000, 0x100000, IORESOURCE_BUSY }, - { "Video RAM area", 0x0a0000, 0x0bffff }, - { "Kernel code", 0x100000, 0 }, - { "Kernel data", 0, 0 } -}; +static struct resource code_resource = { .name = "Kernel code", }; +static struct resource data_resource = { .name = "Kernel data", }; unsigned long memory_start, memory_end; @@ -255,6 +221,9 @@ static int __init sh_mv_setup(char **cmdline_p) __set_io_port_base(mv_io_base); #endif + if (!sh_mv.mv_nr_irqs) + sh_mv.mv_nr_irqs = NR_IRQS; + return 0; } @@ -263,7 +232,6 @@ void __init setup_arch(char **cmdline_p) unsigned long bootmap_size; unsigned long start_pfn, max_pfn, max_low_pfn; - #ifdef CONFIG_CMDLINE_BOOL strcpy(COMMAND_LINE, CONFIG_CMDLINE); #endif @@ -382,14 +350,14 @@ void __init setup_arch(char **cmdline_p) #endif /* Perform the machine specific initialisation */ - platform_setup(); + if (likely(sh_mv.mv_setup)) + sh_mv.mv_setup(cmdline_p); paging_init(); } struct sh_machine_vector* __init get_mv_byname(const char* name) { - extern int strcasecmp(const char *, const char *); extern long __machvec_start, __machvec_end; struct sh_machine_vector *all_vecs = (struct sh_machine_vector *)&__machvec_start; @@ -467,7 +435,8 @@ static void show_cpuflags(struct seq_file *m) seq_printf(m, "\n"); } -static void show_cacheinfo(struct seq_file *m, const char *type, struct cache_info info) +static void show_cacheinfo(struct seq_file *m, const char *type, + struct cache_info info) { unsigned int cache_size; @@ -624,4 +593,3 @@ static int __init kgdb_parse_options(char *options) } __setup("kgdb=", kgdb_parse_options); #endif /* CONFIG_SH_KGDB */ - diff --git a/include/asm-sh/machvec.h b/include/asm-sh/machvec.h index 550501fa4fed..70389b72ffef 100644 --- a/include/asm-sh/machvec.h +++ b/include/asm-sh/machvec.h @@ -8,17 +8,18 @@ */ #ifndef _ASM_SH_MACHVEC_H -#define _ASM_SH_MACHVEC_H 1 +#define _ASM_SH_MACHVEC_H #include #include - #include #include struct device; struct sh_machine_vector { + void (*mv_setup)(char **cmdline_p); + const char *mv_name; int mv_nr_irqs; u8 (*mv_inb)(unsigned long); @@ -65,4 +66,6 @@ struct sh_machine_vector { extern struct sh_machine_vector sh_mv; +#define get_system_type() sh_mv.mv_name + #endif /* _ASM_SH_MACHVEC_H */ -- cgit v1.2.3 From d153ea88dccf003173315b5d21acabebb897fb4a Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:20:16 +0900 Subject: sh: stack debugging support. This adds a DEBUG_STACK_USAGE and DEBUG_STACKOVERFLOW for SH. Signed-off-by: Paul Mundt --- arch/sh/Kconfig.debug | 16 ++++++++++++++++ arch/sh/kernel/head.S | 4 +++- arch/sh/kernel/irq.c | 17 ++++++++++++++++- arch/sh/kernel/vmlinux.lds.S | 14 ++++++++------ include/asm-sh/page.h | 2 +- include/asm-sh/thread_info.h | 12 ++++++++---- 6 files changed, 52 insertions(+), 13 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index 75ed1be8a49e..f0188e626be0 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug @@ -30,6 +30,22 @@ config EARLY_PRINTK when the kernel may crash or hang before the serial console is initialised. If unsure, say N. +config DEBUG_STACKOVERFLOW + bool "Check for stack overflows" + depends on DEBUG_KERNEL + help + This option will cause messages to be printed if free stack space + drops below a certain limit. + +config DEBUG_STACK_USAGE + bool "Stack utilization instrumentation" + depends on DEBUG_KERNEL + help + Enables the display of the minimum amount of free stack which each + task has ever had available in the sysrq-T and sysrq-P debug output. + + This option will slow down process creation somewhat. + config KGDB bool "Include KGDB kernel debugger" select FRAME_POINTER diff --git a/arch/sh/kernel/head.S b/arch/sh/kernel/head.S index c5e363872b91..3e7d00b7985a 100644 --- a/arch/sh/kernel/head.S +++ b/arch/sh/kernel/head.S @@ -11,6 +11,8 @@ * Head.S contains the SH exception handlers and startup code. */ #include +#include +#include #ifdef CONFIG_CPU_SH4A #define SYNCO() synco @@ -95,7 +97,7 @@ ENTRY(_stext) .balign 4 1: .long 0x400080F0 ! MD=1, RB=0, BL=0, FD=1, IMASK=0xF -2: .long init_thread_union+8192 +2: .long init_thread_union+THREAD_SIZE 3: .long __bss_start 4: .long _end 5: .long start_kernel diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c index c2e07f7f3496..7066611aeb72 100644 --- a/arch/sh/kernel/irq.c +++ b/arch/sh/kernel/irq.c @@ -60,7 +60,6 @@ unlock: } #endif - asmlinkage int do_IRQ(unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7, struct pt_regs regs) @@ -69,6 +68,22 @@ asmlinkage int do_IRQ(unsigned long r4, unsigned long r5, irq_enter(); +#ifdef CONFIG_DEBUG_STACKOVERFLOW + /* Debugging check for stack overflow: is there less than 1KB free? */ + { + long sp; + + __asm__ __volatile__ ("and r15, %0" : + "=r" (sp) : "0" (THREAD_SIZE - 1)); + + if (unlikely(sp < (sizeof(struct thread_info) + STACK_WARN))) { + printk("do_IRQ: stack overflow: %ld\n", + sp - sizeof(struct thread_info)); + dump_stack(); + } + } +#endif + #ifdef CONFIG_CPU_HAS_INTEVT __asm__ __volatile__ ( #ifdef CONFIG_CPU_HAS_SR_RB diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S index eb860c51c697..0220d8a838a7 100644 --- a/arch/sh/kernel/vmlinux.lds.S +++ b/arch/sh/kernel/vmlinux.lds.S @@ -2,6 +2,8 @@ * ld script to make SuperH Linux kernel * Written by Niibe Yutaka */ +#include +#include #include #ifdef CONFIG_CPU_LITTLE_ENDIAN @@ -40,16 +42,16 @@ SECTIONS *(.data) /* Align the initial ramdisk image (INITRD) on page boundaries. */ - . = ALIGN(4096); + . = ALIGN(PAGE_SIZE); __rd_start = .; *(.initrd) - . = ALIGN(4096); + . = ALIGN(PAGE_SIZE); __rd_end = .; CONSTRUCTORS } - . = ALIGN(4096); + . = ALIGN(PAGE_SIZE); .data.page_aligned : { *(.data.idt) } . = ALIGN(32); @@ -60,10 +62,10 @@ SECTIONS _edata = .; /* End of data section */ - . = ALIGN(8192); /* init_task */ + . = ALIGN(THREAD_SIZE); /* init_task */ .data.init_task : { *(.data.init_task) } - . = ALIGN(4096); /* Init code and data */ + . = ALIGN(PAGE_SIZE); /* Init code and data */ __init_begin = .; _sinittext = .; .init.text : { *(.init.text) } @@ -94,7 +96,7 @@ SECTIONS __machvec_start = .; .init.machvec : { *(.init.machvec) } __machvec_end = .; - . = ALIGN(4096); + . = ALIGN(PAGE_SIZE); __init_end = .; . = ALIGN(4); diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index e9135532d00c..888d6fe0030e 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -16,7 +16,7 @@ /* PAGE_SHIFT determines the page size */ #define PAGE_SHIFT 12 -#define PAGE_SIZE (1UL << PAGE_SHIFT) +#define PAGE_SIZE (1 << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) #define PTE_MASK PAGE_MASK diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h index 5eb874b065a6..605259f88113 100644 --- a/include/asm-sh/thread_info.h +++ b/include/asm-sh/thread_info.h @@ -29,6 +29,8 @@ struct thread_info { #endif #define PREEMPT_ACTIVE 0x10000000 +#define THREAD_SIZE (PAGE_SIZE * 2) +#define STACK_WARN (THREAD_SIZE / 8) /* * macros/functions for gaining access to the thread information structure @@ -50,8 +52,6 @@ struct thread_info { #define init_thread_info (init_thread_union.thread_info) #define init_stack (init_thread_union.stack) -#define THREAD_SIZE (2*PAGE_SIZE) - /* how to get the thread information struct from C */ static inline struct thread_info *current_thread_info(void) { @@ -73,8 +73,12 @@ static inline struct thread_info *current_thread_info(void) } /* thread information allocation */ -#define alloc_thread_info(ti) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1)) -#define free_thread_info(ti) free_pages((unsigned long) (ti), 1) +#ifdef CONFIG_DEBUG_STACK_USAGE +#define alloc_thread_info(ti) kzalloc(THREAD_SIZE, GFP_KERNEL) +#else +#define alloc_thread_info(ti) kmalloc(THREAD_SIZE, GFP_KERNEL) +#endif +#define free_thread_info(ti) kfree(ti) #else /* !__ASSEMBLY__ */ -- cgit v1.2.3 From a6a31139897a5e539efe7ad3b7bd351fa9673ce8 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:22:14 +0900 Subject: sh: Add support for 4K stacks. This enables support for 4K stacks on SH. Currently this depends on DEBUG_KERNEL, but likely all boards will switch to this as the default in the future. Signed-off-by: Paul Mundt --- arch/sh/Kconfig.debug | 10 +++ arch/sh/kernel/cpu/irq/ipr.c | 2 + arch/sh/kernel/entry.S | 4 +- arch/sh/kernel/head.S | 5 +- arch/sh/kernel/irq.c | 153 +++++++++++++++++++++++++++++++++++++++++-- arch/sh/kernel/traps.c | 18 ++--- arch/sh/kernel/vmlinux.lds.S | 1 - include/asm-sh/irq.h | 9 +++ include/asm-sh/thread_info.h | 12 +++- 9 files changed, 190 insertions(+), 24 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index f0188e626be0..48479e014dac 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug @@ -46,6 +46,16 @@ config DEBUG_STACK_USAGE This option will slow down process creation somewhat. +config 4KSTACKS + bool "Use 4Kb for kernel stacks instead of 8Kb" + depends on DEBUG_KERNEL + help + If you say Y here the kernel will use a 4Kb stacksize for the + kernel stack attached to each process/thread. This facilitates + running more threads on a system and also reduces the pressure + on the VM subsystem for higher order allocations. This option + will also use IRQ stacks to compensate for the reduced stackspace. + config KGDB bool "Include KGDB kernel debugger" select FRAME_POINTER diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c index 4c4fd4118d1a..f785822cd5de 100644 --- a/arch/sh/kernel/cpu/irq/ipr.c +++ b/arch/sh/kernel/cpu/irq/ipr.c @@ -190,6 +190,8 @@ void __init init_IRQ(void) /* Perform the machine specific initialisation */ if (sh_mv.mv_init_irq != NULL) sh_mv.mv_init_irq(); + + irq_ctx_init(smp_processor_id()); } #if !defined(CONFIG_CPU_HAS_PINT_IRQ) diff --git a/arch/sh/kernel/entry.S b/arch/sh/kernel/entry.S index fd5fe2349f20..fe8221855b28 100644 --- a/arch/sh/kernel/entry.S +++ b/arch/sh/kernel/entry.S @@ -716,8 +716,8 @@ ENTRY(handle_exception) bt/s 1f ! It's a kernel to kernel transition. mov r15, k0 ! save original stack to k0 /* User space to kernel */ - mov #0x20, k1 - shll8 k1 ! k1 := 8192 (== THREAD_SIZE) + mov #(THREAD_SIZE >> 8), k1 + shll8 k1 ! k1 := THREAD_SIZE add current, k1 mov k1, r15 ! change to kernel stack ! diff --git a/arch/sh/kernel/head.S b/arch/sh/kernel/head.S index 3e7d00b7985a..f5f53d14f245 100644 --- a/arch/sh/kernel/head.S +++ b/arch/sh/kernel/head.S @@ -12,7 +12,6 @@ */ #include #include -#include #ifdef CONFIG_CPU_SH4A #define SYNCO() synco @@ -69,8 +68,8 @@ ENTRY(_stext) ! mov.l 2f, r0 mov r0, r15 ! Set initial r15 (stack pointer) - mov #0x20, r1 ! - shll8 r1 ! r1 = 8192 + mov #(THREAD_SIZE >> 8), r1 + shll8 r1 ! r1 = THREAD_SIZE sub r1, r0 ! ldc r0, r7_bank ! ... and initial thread_info diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c index 7066611aeb72..c7ebd6aec951 100644 --- a/arch/sh/kernel/irq.c +++ b/arch/sh/kernel/irq.c @@ -1,5 +1,4 @@ -/* $Id: irq.c,v 1.20 2004/01/13 05:52:11 kkojima Exp $ - * +/* * linux/arch/sh/kernel/irq.c * * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar @@ -7,13 +6,15 @@ * * SuperH version: Copyright (C) 1999 Niibe Yutaka */ - #include #include +#include #include #include #include #include +#include +#include #include /* @@ -60,11 +61,27 @@ unlock: } #endif +#ifdef CONFIG_4KSTACKS +/* + * per-CPU IRQ handling contexts (thread information and stack) + */ +union irq_ctx { + struct thread_info tinfo; + u32 stack[THREAD_SIZE/sizeof(u32)]; +}; + +static union irq_ctx *hardirq_ctx[NR_CPUS]; +static union irq_ctx *softirq_ctx[NR_CPUS]; +#endif + asmlinkage int do_IRQ(unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7, struct pt_regs regs) { int irq = r4; +#ifdef CONFIG_4KSTACKS + union irq_ctx *curctx, *irqctx; +#endif irq_enter(); @@ -102,7 +119,135 @@ asmlinkage int do_IRQ(unsigned long r4, unsigned long r5, #endif irq = irq_demux(irq); - __do_IRQ(irq, ®s); + +#ifdef CONFIG_4KSTACKS + curctx = (union irq_ctx *)current_thread_info(); + irqctx = hardirq_ctx[smp_processor_id()]; + + /* + * this is where we switch to the IRQ stack. However, if we are + * already using the IRQ stack (because we interrupted a hardirq + * handler) we can't do that and just have to keep using the + * current stack (which is the irq stack already after all) + */ + if (curctx != irqctx) { + u32 *isp; + + isp = (u32 *)((char *)irqctx + sizeof(*irqctx)); + irqctx->tinfo.task = curctx->tinfo.task; + irqctx->tinfo.previous_sp = current_stack_pointer; + + __asm__ __volatile__ ( + "mov %0, r4 \n" + "mov %1, r5 \n" + "mov r15, r9 \n" + "jsr @%2 \n" + /* swith to the irq stack */ + " mov %3, r15 \n" + /* restore the stack (ring zero) */ + "mov r9, r15 \n" + : /* no outputs */ + : "r" (irq), "r" (®s), "r" (__do_IRQ), "r" (isp) + /* XXX: A somewhat excessive clobber list? -PFM */ + : "memory", "r0", "r1", "r2", "r3", "r4", + "r5", "r6", "r7", "r8", "t", "pr" + ); + } else +#endif + __do_IRQ(irq, ®s); + irq_exit(); + return 1; } + +#ifdef CONFIG_4KSTACKS +/* + * These should really be __section__(".bss.page_aligned") as well, but + * gcc's 3.0 and earlier don't handle that correctly. + */ +static char softirq_stack[NR_CPUS * THREAD_SIZE] + __attribute__((__aligned__(THREAD_SIZE))); + +static char hardirq_stack[NR_CPUS * THREAD_SIZE] + __attribute__((__aligned__(THREAD_SIZE))); + +/* + * allocate per-cpu stacks for hardirq and for softirq processing + */ +void irq_ctx_init(int cpu) +{ + union irq_ctx *irqctx; + + if (hardirq_ctx[cpu]) + return; + + irqctx = (union irq_ctx *)&hardirq_stack[cpu * THREAD_SIZE]; + irqctx->tinfo.task = NULL; + irqctx->tinfo.exec_domain = NULL; + irqctx->tinfo.cpu = cpu; + irqctx->tinfo.preempt_count = HARDIRQ_OFFSET; + irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); + + hardirq_ctx[cpu] = irqctx; + + irqctx = (union irq_ctx *)&softirq_stack[cpu * THREAD_SIZE]; + irqctx->tinfo.task = NULL; + irqctx->tinfo.exec_domain = NULL; + irqctx->tinfo.cpu = cpu; + irqctx->tinfo.preempt_count = SOFTIRQ_OFFSET; + irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); + + softirq_ctx[cpu] = irqctx; + + printk("CPU %u irqstacks, hard=%p soft=%p\n", + cpu, hardirq_ctx[cpu], softirq_ctx[cpu]); +} + +void irq_ctx_exit(int cpu) +{ + hardirq_ctx[cpu] = NULL; +} + +extern asmlinkage void __do_softirq(void); + +asmlinkage void do_softirq(void) +{ + unsigned long flags; + struct thread_info *curctx; + union irq_ctx *irqctx; + u32 *isp; + + if (in_interrupt()) + return; + + local_irq_save(flags); + + if (local_softirq_pending()) { + curctx = current_thread_info(); + irqctx = softirq_ctx[smp_processor_id()]; + irqctx->tinfo.task = curctx->task; + irqctx->tinfo.previous_sp = current_stack_pointer; + + /* build the stack frame on the softirq stack */ + isp = (u32 *)((char *)irqctx + sizeof(*irqctx)); + + __asm__ __volatile__ ( + "mov r15, r9 \n" + "jsr @%0 \n" + /* switch to the softirq stack */ + " mov %1, r15 \n" + /* restore the thread stack */ + "mov r9, r15 \n" + : /* no outputs */ + : "r" (__do_softirq), "r" (isp) + /* XXX: A somewhat excessive clobber list? -PFM */ + : "memory", "r0", "r1", "r2", "r3", "r4", + "r5", "r6", "r7", "r8", "r9", "r15", "t", "pr" + ); + } + + local_irq_restore(flags); +} +EXPORT_SYMBOL(do_softirq); +#endif diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c index 95c810b3c97e..c2c597e09482 100644 --- a/arch/sh/kernel/traps.c +++ b/arch/sh/kernel/traps.c @@ -741,20 +741,12 @@ void show_stack(struct task_struct *tsk, unsigned long *sp) unsigned long module_end = VMALLOC_END; int i = 1; - if (tsk && !sp) { + if (!tsk) + tsk = current; + if (tsk == current) + sp = (unsigned long *)current_stack_pointer; + else sp = (unsigned long *)tsk->thread.sp; - } - - if (!sp) { - __asm__ __volatile__ ( - "mov r15, %0\n\t" - "stc r7_bank, %1\n\t" - : "=r" (module_start), - "=r" (module_end) - ); - - sp = (unsigned long *)module_start; - } stack = sp; diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S index 0220d8a838a7..5eb930918186 100644 --- a/arch/sh/kernel/vmlinux.lds.S +++ b/arch/sh/kernel/vmlinux.lds.S @@ -3,7 +3,6 @@ * Written by Niibe Yutaka */ #include -#include #include #ifdef CONFIG_CPU_LITTLE_ENDIAN diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index dd05e102fc0e..0e5f365aff70 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -719,6 +719,15 @@ static inline int generic_irq_demux(int irq) #define irq_canonicalize(irq) (irq) #define irq_demux(irq) __irq_demux(sh_mv.mv_irq_demux(irq)) +#ifdef CONFIG_4KSTACKS +extern void irq_ctx_init(int cpu); +extern void irq_ctx_exit(int cpu); +# define __ARCH_HAS_DO_SOFTIRQ +#else +# define irq_ctx_init(cpu) do { } while (0) +# define irq_ctx_exit(cpu) do { } while (0) +#endif + #if defined(CONFIG_CPU_SUBTYPE_SH73180) #include #endif diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h index 605259f88113..3ebc3f9039eb 100644 --- a/include/asm-sh/thread_info.h +++ b/include/asm-sh/thread_info.h @@ -9,8 +9,8 @@ * Copyright (C) 2002 David Howells (dhowells@redhat.com) * - Incorporating suggestions made by Linus Torvalds and Dave Miller */ - #ifdef __KERNEL__ +#include #ifndef __ASSEMBLY__ #include @@ -23,13 +23,20 @@ struct thread_info { int preempt_count; /* 0 => preemptable, <0 => BUG */ mm_segment_t addr_limit; /* thread address space */ struct restart_block restart_block; + unsigned long previous_sp; /* sp of previous stack in case + of nested IRQ stacks */ __u8 supervisor_stack[0]; }; #endif #define PREEMPT_ACTIVE 0x10000000 + +#ifdef CONFIG_4KSTACKS +#define THREAD_SIZE (PAGE_SIZE) +#else #define THREAD_SIZE (PAGE_SIZE * 2) +#endif #define STACK_WARN (THREAD_SIZE / 8) /* @@ -52,6 +59,9 @@ struct thread_info { #define init_thread_info (init_thread_union.thread_info) #define init_stack (init_thread_union.stack) +/* how to get the current stack pointer from C */ +register unsigned long current_stack_pointer asm("r15") __attribute_used__; + /* how to get the thread information struct from C */ static inline struct thread_info *current_thread_info(void) { -- cgit v1.2.3 From 315bb96824149614efe4844ded077a13fc908880 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:22:53 +0900 Subject: sh: CPU flags in AT_HWCAP in ELF auxvt. Encode processor flags in AT_HWCAP in the ELF auxiliary vector. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4/probe.c | 8 +++++--- include/asm-sh/cpu-features.h | 15 +++++++++++++++ include/asm-sh/elf.h | 10 ++++++---- include/asm-sh/processor.h | 12 +----------- 4 files changed, 27 insertions(+), 18 deletions(-) create mode 100644 include/asm-sh/cpu-features.h (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index 6e8a2b5268e8..0e65aa6ddcaa 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c @@ -76,6 +76,7 @@ int __init detect_cpu_and_cache_system(void) cpu_data->type = CPU_SH73180; cpu_data->icache.ways = 4; cpu_data->dcache.ways = 4; + cpu_data->flags |= CPU_HAS_LLSC; break; case 0x2001: case 0x2004: @@ -83,7 +84,7 @@ int __init detect_cpu_and_cache_system(void) cpu_data->icache.ways = 4; cpu_data->dcache.ways = 4; - cpu_data->flags |= CPU_HAS_FPU; + cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_LLSC; break; case 0x2006: case 0x200A: @@ -95,13 +96,15 @@ int __init detect_cpu_and_cache_system(void) cpu_data->icache.ways = 4; cpu_data->dcache.ways = 4; - cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER; + cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER | + CPU_HAS_LLSC; break; case 0x3000: case 0x3003: cpu_data->type = CPU_SH7343; cpu_data->icache.ways = 4; cpu_data->dcache.ways = 4; + cpu_data->flags |= CPU_HAS_LLSC; break; case 0x8000: cpu_data->type = CPU_ST40RA; @@ -180,4 +183,3 @@ int __init detect_cpu_and_cache_system(void) return 0; } - diff --git a/include/asm-sh/cpu-features.h b/include/asm-sh/cpu-features.h new file mode 100644 index 000000000000..e398947ec01d --- /dev/null +++ b/include/asm-sh/cpu-features.h @@ -0,0 +1,15 @@ +#ifndef __ASM_SH_CPU_FEATURES_H +#define __ASM_SH_CPU_FEATURES_H + +/* + * Processor flags + */ +#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ +#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ +#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ +#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ +#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ +#define CPU_HAS_PTEA 0x0020 /* PTEA register */ +#define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */ + +#endif /* __ASM_SH_CPU_FEATURES_H */ diff --git a/include/asm-sh/elf.h b/include/asm-sh/elf.h index 1b63dfeea4f2..cc8e5e767345 100644 --- a/include/asm-sh/elf.h +++ b/include/asm-sh/elf.h @@ -1,6 +1,11 @@ #ifndef __ASM_SH_ELF_H #define __ASM_SH_ELF_H +#include +#include +#include +#include + /* SH relocation types */ #define R_SH_NONE 0 #define R_SH_DIR32 1 @@ -46,9 +51,6 @@ * ELF register definitions.. */ -#include -#include - typedef unsigned long elf_greg_t; #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) @@ -91,7 +93,7 @@ typedef struct user_fpu_struct elf_fpregset_t; instruction set this CPU supports. This could be done in user space, but it's not easy, and we've already done it here. */ -#define ELF_HWCAP (0) +#define ELF_HWCAP (boot_cpu_data.flags) /* This yields a string that ld.so will use to load implementation specific libraries for optimization. This is more specific in diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index 3b3ef4f2bf31..bdd472705546 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -14,6 +14,7 @@ #include #include #include +#include /* * Default implementation of macro that returns current @@ -127,17 +128,6 @@ union sh_fpu_union { struct sh_fpu_soft_struct soft; }; -/* - * Processor flags - */ - -#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ -#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ -#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ -#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ -#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ -#define CPU_HAS_PTEA 0x0020 /* PTEA register */ - struct thread_struct { unsigned long sp; unsigned long pc; -- cgit v1.2.3 From 2220d164933a8776d1336c814e3c2e5573256d34 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:24:28 +0900 Subject: sh: Report movli.l/movco.l capabilities. Add llsc to cpu_flags[] and comment cpu-features.h. Signed-off-by: Jamie Lenehan Signed-off-by: Paul Mundt --- arch/sh/kernel/setup.c | 4 +++- include/asm-sh/cpu-features.h | 8 ++++++++ 2 files changed, 11 insertions(+), 1 deletion(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index de8df969d6af..6810de3f8ed2 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -413,8 +413,10 @@ const char *get_cpu_subtype(void) } #ifdef CONFIG_PROC_FS +/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */ static const char *cpu_flags[] = { - "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr", "ptea", NULL + "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr", + "ptea", "llsc", NULL }; static void show_cpuflags(struct seq_file *m) diff --git a/include/asm-sh/cpu-features.h b/include/asm-sh/cpu-features.h index e398947ec01d..e1260aae3ee3 100644 --- a/include/asm-sh/cpu-features.h +++ b/include/asm-sh/cpu-features.h @@ -3,6 +3,14 @@ /* * Processor flags + * + * Note: When adding a new flag, keep cpu_flags[] in + * arch/sh/kernel/setup.c in sync so symbolic name + * mapping of the processor flags has a chance of being + * reasonably accurate. + * + * These flags are also available through the ELF + * auxiliary vector as AT_HWCAP. */ #define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ #define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ -- cgit v1.2.3 From 05ae91585167410dadd1bc8f2e207a062e638a16 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:25:24 +0900 Subject: sh: Optimized readsl()/writesl() support. Implement optimized copies of readsl()/writesl(). Signed-off-by: Paul Mundt --- arch/sh/kernel/io.c | 67 +++++++++++++++++++++++++++++++++++++++++++++++++++++ include/asm-sh/io.h | 6 +++++ 2 files changed, 73 insertions(+) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/io.c b/arch/sh/kernel/io.c index 71c9fde2fd90..501fe03e3715 100644 --- a/arch/sh/kernel/io.c +++ b/arch/sh/kernel/io.c @@ -61,6 +61,73 @@ void memset_io(volatile void __iomem *dst, int c, unsigned long count) } EXPORT_SYMBOL(memset_io); +void __raw_readsl(unsigned long addr, void *datap, int len) +{ + u32 *data; + + for (data = datap; (len != 0) && (((u32)data & 0x1f) != 0); len--) + *data++ = ctrl_inl(addr); + + if (likely(len >= (0x20 >> 2))) { + int tmp2, tmp3, tmp4, tmp5, tmp6; + + __asm__ __volatile__( + "1: \n\t" + "mov.l @%7, r0 \n\t" + "mov.l @%7, %2 \n\t" +#ifdef CONFIG_CPU_SH4 + "movca.l r0, @%0 \n\t" +#else + "mov.l r0, @%0 \n\t" +#endif + "mov.l @%7, %3 \n\t" + "mov.l @%7, %4 \n\t" + "mov.l @%7, %5 \n\t" + "mov.l @%7, %6 \n\t" + "mov.l @%7, r7 \n\t" + "mov.l @%7, r0 \n\t" + "mov.l %2, @(0x04,%0) \n\t" + "mov #0x20>>2, %2 \n\t" + "mov.l %3, @(0x08,%0) \n\t" + "sub %2, %1 \n\t" + "mov.l %4, @(0x0c,%0) \n\t" + "cmp/hi %1, %2 ! T if 32 > len \n\t" + "mov.l %5, @(0x10,%0) \n\t" + "mov.l %6, @(0x14,%0) \n\t" + "mov.l r7, @(0x18,%0) \n\t" + "mov.l r0, @(0x1c,%0) \n\t" + "bf.s 1b \n\t" + " add #0x20, %0 \n\t" + : "=&r" (data), "=&r" (len), + "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4), + "=&r" (tmp5), "=&r" (tmp6) + : "r"(addr), "0" (data), "1" (len) + : "r0", "r7", "t", "memory"); + } + + for (; len != 0; len--) + *data++ = ctrl_inl(addr); +} +EXPORT_SYMBOL(__raw_readsl); + +void __raw_writesl(unsigned long addr, const void *data, int len) +{ + if (likely(len != 0)) { + int tmp1; + + __asm__ __volatile__ ( + "1: \n\t" + "mov.l @%0+, %1 \n\t" + "dt %3 \n\t" + "bf.s 1b \n\t" + " mov.l %1, @%4 \n\t" + : "=&r" (data), "=&r" (tmp1) + : "0" (data), "r" (len), "r"(addr) + : "t", "memory"); + } +} +EXPORT_SYMBOL(__raw_writesl); + void __iomem *ioport_map(unsigned long port, unsigned int nr) { return sh_mv.mv_ioport_map(port, nr); diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h index 377160b86295..ed12d38e8c00 100644 --- a/include/asm-sh/io.h +++ b/include/asm-sh/io.h @@ -107,6 +107,9 @@ #define __raw_writew(v, a) __writew(v, (void __iomem *)(a)) #define __raw_writel(v, a) __writel(v, (void __iomem *)(a)) +void __raw_writesl(unsigned long addr, const void *data, int longlen); +void __raw_readsl(unsigned long addr, void *data, int longlen); + /* * The platform header files may define some of these macros to use * the inlined versions where appropriate. These macros may also be @@ -132,6 +135,9 @@ # define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) #endif +#define writesl __raw_writesl +#define readsl __raw_readsl + #define readb_relaxed(a) readb(a) #define readw_relaxed(a) readw(a) #define readl_relaxed(a) readl(a) -- cgit v1.2.3 From 9d549a7d8ef71f684a35cf1e438543957cf81d12 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:26:05 +0900 Subject: sh: Update kexec support for API changes. This was falling a bit behind.. Signed-off-by: Paul Mundt --- arch/sh/kernel/machine_kexec.c | 6 ------ arch/sh/kernel/process.c | 10 ---------- include/asm-sh/kexec.h | 9 +++------ 3 files changed, 3 insertions(+), 22 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c index 6bcd8d92399f..08587cdb64d6 100644 --- a/arch/sh/kernel/machine_kexec.c +++ b/arch/sh/kernel/machine_kexec.c @@ -29,12 +29,6 @@ extern const unsigned char relocate_new_kernel[]; extern const unsigned int relocate_new_kernel_size; extern void *gdb_vbr_vector; -/* - * Provide a dummy crash_notes definition while crash dump arrives to ppc. - * This prevents breakage of crash_notes attribute in kernel/ksysfs.c. - */ -void *crash_notes = NULL; - void machine_shutdown(void) { } diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c index 2167746e88f1..630ec1af2483 100644 --- a/arch/sh/kernel/process.c +++ b/arch/sh/kernel/process.c @@ -81,16 +81,6 @@ void cpu_idle(void) void machine_restart(char * __unused) { - -#ifdef CONFIG_KEXEC - struct kimage *image; - image = xchg(&kexec_image, 0); - if (image) { - machine_shutdown(); - machine_kexec(image); - } -#endif - /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */ asm volatile("ldc %0, sr\n\t" "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001)); diff --git a/include/asm-sh/kexec.h b/include/asm-sh/kexec.h index a5f85e9e428d..9d235af20cdd 100644 --- a/include/asm-sh/kexec.h +++ b/include/asm-sh/kexec.h @@ -25,11 +25,8 @@ #define MAX_NOTE_BYTES 1024 -#ifndef __ASSEMBLY__ - -extern void machine_shutdown(void); -extern void *crash_notes; - -#endif /* __ASSEMBLY__ */ +/* Provide a dummy definition to avoid build failures. */ +static inline void crash_setup_regs(struct pt_regs *newregs, + struct pt_regs *oldregs) { } #endif /* _SH_KEXEC_H */ -- cgit v1.2.3 From 72c35543f8cf1316773ffbd9619575bb84ac44fb Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:27:43 +0900 Subject: sh: Support for L2 cache on newer SH-4A CPUs. This implements preliminary support for the L2 caches found on newer SH-4A CPUs. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4/probe.c | 47 +++++++++++++++++++++++++++++++++++++++++- arch/sh/kernel/setup.c | 6 +++++- include/asm-sh/cpu-features.h | 1 + include/asm-sh/processor.h | 9 ++++---- 4 files changed, 57 insertions(+), 6 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index 0e65aa6ddcaa..bee00cac0b16 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c @@ -29,7 +29,7 @@ int __init detect_cpu_and_cache_system(void) [9] = (1 << 16) }; - pvr = (ctrl_inl(CCN_PVR) >> 8) & 0xffff; + pvr = (ctrl_inl(CCN_PVR) >> 8) & 0xffffff; prr = (ctrl_inl(CCN_PRR) >> 4) & 0xff; cvr = (ctrl_inl(CCN_CVR)); @@ -53,6 +53,26 @@ int __init detect_cpu_and_cache_system(void) cpu_data->dcache.ways = 1; cpu_data->dcache.linesz = L1_CACHE_BYTES; + /* + * Setup some generic flags we can probe + * (L2 and DSP detection only work on SH-4A) + */ + if (((pvr >> 16) & 0xff) == 0x10) { + if ((cvr & 0x02000000) == 0) + cpu_data->flags |= CPU_HAS_L2_CACHE; + if ((cvr & 0x10000000) == 0) + cpu_data->flags |= CPU_HAS_DSP; + + cpu_data->flags |= CPU_HAS_LLSC; + } + + /* FPU detection works for everyone */ + if ((cvr & 0x20000000) == 1) + cpu_data->flags |= CPU_HAS_FPU; + + /* Mask off the upper chip ID */ + pvr &= 0xffff; + /* * Probe the underlying processor version/revision and * adjust cpu_data setup accordingly. @@ -181,5 +201,30 @@ int __init detect_cpu_and_cache_system(void) cpu_data->dcache.way_size = cpu_data->dcache.sets * cpu_data->dcache.linesz; + /* + * Setup the L2 cache desc + * + * SH-4A's have an optional PIPT L2. + */ + if (cpu_data->flags & CPU_HAS_L2_CACHE) { + /* + * Size calculation is much more sensible + * than it is for the L1. + * + * Sizes are 128KB, 258KB, 512KB, and 1MB. + */ + size = (cvr & 0xf) << 17; + + BUG_ON(!size); + + cpu_data->scache.way_incr = (1 << 16); + cpu_data->scache.entry_shift = 5; + cpu_data->scache.entry_mask = 0xffe0; + cpu_data->scache.ways = 4; + cpu_data->scache.linesz = L1_CACHE_BYTES; + cpu_data->scache.sets = size / + (cpu_data->scache.linesz * cpu_data->scache.ways); + } + return 0; } diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index 6810de3f8ed2..5f587332234a 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -416,7 +416,7 @@ const char *get_cpu_subtype(void) /* Symbolic CPU flags, keep in sync with asm/cpu-features.h */ static const char *cpu_flags[] = { "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr", - "ptea", "llsc", NULL + "ptea", "llsc", "l2", NULL }; static void show_cpuflags(struct seq_file *m) @@ -480,6 +480,10 @@ static int show_cpuinfo(struct seq_file *m, void *v) show_cacheinfo(m, "dcache", boot_cpu_data.dcache); } + /* Optional secondary cache */ + if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) + show_cacheinfo(m, "scache", boot_cpu_data.scache); + seq_printf(m, "bogomips\t: %lu.%02lu\n", boot_cpu_data.loops_per_jiffy/(500000/HZ), (boot_cpu_data.loops_per_jiffy/(5000/HZ)) % 100); diff --git a/include/asm-sh/cpu-features.h b/include/asm-sh/cpu-features.h index e1260aae3ee3..4bccd7c032f9 100644 --- a/include/asm-sh/cpu-features.h +++ b/include/asm-sh/cpu-features.h @@ -19,5 +19,6 @@ #define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ #define CPU_HAS_PTEA 0x0020 /* PTEA register */ #define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */ +#define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */ #endif /* __ASM_SH_CPU_FEATURES_H */ diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index bdd472705546..b7cba4e91a72 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -54,14 +54,15 @@ enum cpu_type { }; struct sh_cpuinfo { - enum cpu_type type; + unsigned int type; unsigned long loops_per_jiffy; - struct cache_info icache; - struct cache_info dcache; + struct cache_info icache; /* Primary I-cache */ + struct cache_info dcache; /* Primary D-cache */ + struct cache_info scache; /* Secondary cache */ unsigned long flags; -}; +} __attribute__ ((aligned(SMP_CACHE_BYTES))); extern struct sh_cpuinfo boot_cpu_data; -- cgit v1.2.3 From d15f456043175bdf3464514b92a825b88d0546ae Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:28:34 +0900 Subject: sh: More intelligent entry_mask/way_size calculation. Figure out the cache desc entry_mask at runtime, and remove hard-coded assumption about the cacheline size. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4/probe.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index bee00cac0b16..c294de1e14a3 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c @@ -38,7 +38,6 @@ int __init detect_cpu_and_cache_system(void) */ cpu_data->icache.way_incr = (1 << 13); cpu_data->icache.entry_shift = 5; - cpu_data->icache.entry_mask = 0x1fe0; cpu_data->icache.sets = 256; cpu_data->icache.ways = 1; cpu_data->icache.linesz = L1_CACHE_BYTES; @@ -48,7 +47,6 @@ int __init detect_cpu_and_cache_system(void) */ cpu_data->dcache.way_incr = (1 << 14); cpu_data->dcache.entry_shift = 5; - cpu_data->dcache.entry_mask = 0x3fe0; cpu_data->dcache.sets = 512; cpu_data->dcache.ways = 1; cpu_data->dcache.linesz = L1_CACHE_BYTES; @@ -183,21 +181,26 @@ int __init detect_cpu_and_cache_system(void) size = sizes[(cvr >> 20) & 0xf]; cpu_data->icache.way_incr = (size >> 1); cpu_data->icache.sets = (size >> 6); - cpu_data->icache.entry_mask = - (cpu_data->icache.way_incr - (1 << 5)); + } + /* Setup the rest of the I-cache info */ + cpu_data->icache.entry_mask = cpu_data->icache.way_incr - + cpu_data->icache.linesz; + cpu_data->icache.way_size = cpu_data->icache.sets * cpu_data->icache.linesz; + /* And the rest of the D-cache */ if (cpu_data->dcache.ways > 1) { size = sizes[(cvr >> 16) & 0xf]; cpu_data->dcache.way_incr = (size >> 1); cpu_data->dcache.sets = (size >> 6); - cpu_data->dcache.entry_mask = - (cpu_data->dcache.way_incr - (1 << 5)); } + cpu_data->dcache.entry_mask = cpu_data->dcache.way_incr - + cpu_data->dcache.linesz; + cpu_data->dcache.way_size = cpu_data->dcache.sets * cpu_data->dcache.linesz; @@ -219,11 +222,14 @@ int __init detect_cpu_and_cache_system(void) cpu_data->scache.way_incr = (1 << 16); cpu_data->scache.entry_shift = 5; - cpu_data->scache.entry_mask = 0xffe0; cpu_data->scache.ways = 4; cpu_data->scache.linesz = L1_CACHE_BYTES; + cpu_data->scache.entry_mask = + (cpu_data->scache.way_incr - cpu_data->scache.linesz); cpu_data->scache.sets = size / (cpu_data->scache.linesz * cpu_data->scache.ways); + cpu_data->scache.way_size = + (cpu_data->scache.sets * cpu_data->scache.linesz); } return 0; -- cgit v1.2.3 From 19f9a34f87c48bbd270d617d1c986d0c23866a1a Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:33:49 +0900 Subject: sh: Initial vsyscall page support. This implements initial support for the vsyscall page on SH. At the moment we leave it configurable due to having nommu to support from the same code base. We hook it up for the signal trampoline return at present, with more to be added later, once uClibc catches up. Signed-off-by: Paul Mundt --- arch/sh/kernel/Makefile | 1 + arch/sh/kernel/process.c | 2 +- arch/sh/kernel/signal.c | 17 ++- arch/sh/kernel/vsyscall/Makefile | 36 +++++++ arch/sh/kernel/vsyscall/vsyscall-note.S | 25 +++++ arch/sh/kernel/vsyscall/vsyscall-sigreturn.S | 39 +++++++ arch/sh/kernel/vsyscall/vsyscall-syscall.S | 10 ++ arch/sh/kernel/vsyscall/vsyscall-trapa.S | 42 ++++++++ arch/sh/kernel/vsyscall/vsyscall.c | 150 +++++++++++++++++++++++++++ arch/sh/kernel/vsyscall/vsyscall.lds.S | 74 +++++++++++++ arch/sh/mm/Kconfig | 13 +++ arch/sh/mm/init.c | 3 + arch/sh/mm/tlb-flush.c | 18 ++-- include/asm-sh/auxvec.h | 14 +++ include/asm-sh/elf.h | 20 ++++ include/asm-sh/mmu.h | 7 +- include/asm-sh/mmu_context.h | 8 +- include/asm-sh/page.h | 5 + include/asm-sh/processor.h | 6 ++ 19 files changed, 473 insertions(+), 17 deletions(-) create mode 100644 arch/sh/kernel/vsyscall/Makefile create mode 100644 arch/sh/kernel/vsyscall/vsyscall-note.S create mode 100644 arch/sh/kernel/vsyscall/vsyscall-sigreturn.S create mode 100644 arch/sh/kernel/vsyscall/vsyscall-syscall.S create mode 100644 arch/sh/kernel/vsyscall/vsyscall-trapa.S create mode 100644 arch/sh/kernel/vsyscall/vsyscall.c create mode 100644 arch/sh/kernel/vsyscall/vsyscall.lds.S (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile index 0e2148f63e7e..5da88a43d350 100644 --- a/arch/sh/kernel/Makefile +++ b/arch/sh/kernel/Makefile @@ -9,6 +9,7 @@ obj-y := process.o signal.o entry.o traps.o irq.o \ io.o io_generic.o sh_ksyms.o syscalls.o obj-y += cpu/ timers/ +obj-$(CONFIG_VSYSCALL) += vsyscall/ obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_CF_ENABLER) += cf-enabler.o diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c index 630ec1af2483..0b1d5dd7a93b 100644 --- a/arch/sh/kernel/process.c +++ b/arch/sh/kernel/process.c @@ -355,7 +355,7 @@ struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *ne else if (next->thread.ubc_pc && next->mm) { int asid = 0; #ifdef CONFIG_MMU - asid |= next->mm->context & MMU_CONTEXT_ASID_MASK; + asid |= next->mm->context.id & MMU_CONTEXT_ASID_MASK; #endif ubc_set_tracing(asid, next->thread.ubc_pc); } else { diff --git a/arch/sh/kernel/signal.c b/arch/sh/kernel/signal.c index 2f1c9545b49f..5213f5bc6ce0 100644 --- a/arch/sh/kernel/signal.c +++ b/arch/sh/kernel/signal.c @@ -8,7 +8,6 @@ * SuperH version: Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima * */ - #include #include #include @@ -21,6 +20,7 @@ #include #include #include +#include #include #include @@ -29,8 +29,6 @@ #include #include -#undef DEBUG - #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) /* @@ -312,6 +310,11 @@ get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size) return (void __user *)((sp - frame_size) & -8ul); } +/* These symbols are defined with the addresses in the vsyscall page. + See vsyscall-trapa.S. */ +extern void __user __kernel_sigreturn; +extern void __user __kernel_rt_sigreturn; + static int setup_frame(int sig, struct k_sigaction *ka, sigset_t *set, struct pt_regs *regs) { @@ -340,6 +343,10 @@ static int setup_frame(int sig, struct k_sigaction *ka, already in userspace. */ if (ka->sa.sa_flags & SA_RESTORER) { regs->pr = (unsigned long) ka->sa.sa_restorer; +#ifdef CONFIG_VSYSCALL + } else if (likely(current->mm->context.vdso)) { + regs->pr = VDSO_SYM(&__kernel_sigreturn); +#endif } else { /* Generate return code (system call to sigreturn) */ err |= __put_user(MOVW(7), &frame->retcode[0]); @@ -416,6 +423,10 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, already in userspace. */ if (ka->sa.sa_flags & SA_RESTORER) { regs->pr = (unsigned long) ka->sa.sa_restorer; +#ifdef CONFIG_VSYSCALL + } else if (likely(current->mm->context.vdso)) { + regs->pr = VDSO_SYM(&__kernel_rt_sigreturn); +#endif } else { /* Generate return code (system call to rt_sigreturn) */ err |= __put_user(MOVW(7), &frame->retcode[0]); diff --git a/arch/sh/kernel/vsyscall/Makefile b/arch/sh/kernel/vsyscall/Makefile new file mode 100644 index 000000000000..4bbce1cfa359 --- /dev/null +++ b/arch/sh/kernel/vsyscall/Makefile @@ -0,0 +1,36 @@ +obj-y += vsyscall.o vsyscall-syscall.o + +$(obj)/vsyscall-syscall.o: \ + $(foreach F,trapa,$(obj)/vsyscall-$F.so) + +# Teach kbuild about targets +targets += $(foreach F,trapa,vsyscall-$F.o vsyscall-$F.so) +targets += vsyscall-note.o vsyscall.lds + +# The DSO images are built using a special linker script +quiet_cmd_syscall = SYSCALL $@ + cmd_syscall = $(CC) -nostdlib $(SYSCFLAGS_$(@F)) \ + -Wl,-T,$(filter-out FORCE,$^) -o $@ + +export CPPFLAGS_vsyscall.lds += -P -C -Ush + +vsyscall-flags = -shared -s -Wl,-soname=linux-gate.so.1 \ + $(call ld-option, -Wl$(comma)--hash-style=sysv) + +SYSCFLAGS_vsyscall-trapa.so = $(vsyscall-flags) + +$(obj)/vsyscall-trapa.so: \ +$(obj)/vsyscall-%.so: $(src)/vsyscall.lds $(obj)/vsyscall-%.o FORCE + $(call if_changed,syscall) + +# We also create a special relocatable object that should mirror the symbol +# table and layout of the linked DSO. With ld -R we can then refer to +# these symbols in the kernel code rather than hand-coded addresses. +extra-y += vsyscall-syms.o +$(obj)/built-in.o: $(obj)/vsyscall-syms.o +$(obj)/built-in.o: ld_flags += -R $(obj)/vsyscall-syms.o + +SYSCFLAGS_vsyscall-syms.o = -r +$(obj)/vsyscall-syms.o: $(src)/vsyscall.lds \ + $(obj)/vsyscall-trapa.o $(obj)/vsyscall-note.o FORCE + $(call if_changed,syscall) diff --git a/arch/sh/kernel/vsyscall/vsyscall-note.S b/arch/sh/kernel/vsyscall/vsyscall-note.S new file mode 100644 index 000000000000..d4b5be4f3d5f --- /dev/null +++ b/arch/sh/kernel/vsyscall/vsyscall-note.S @@ -0,0 +1,25 @@ +/* + * This supplies .note.* sections to go into the PT_NOTE inside the vDSO text. + * Here we can supply some information useful to userland. + */ + +#include +#include + +#define ASM_ELF_NOTE_BEGIN(name, flags, vendor, type) \ + .section name, flags; \ + .balign 4; \ + .long 1f - 0f; /* name length */ \ + .long 3f - 2f; /* data length */ \ + .long type; /* note type */ \ +0: .asciz vendor; /* vendor name */ \ +1: .balign 4; \ +2: + +#define ASM_ELF_NOTE_END \ +3: .balign 4; /* pad out section */ \ + .previous + + ASM_ELF_NOTE_BEGIN(".note.kernel-version", "a", UTS_SYSNAME, 0) + .long LINUX_VERSION_CODE + ASM_ELF_NOTE_END diff --git a/arch/sh/kernel/vsyscall/vsyscall-sigreturn.S b/arch/sh/kernel/vsyscall/vsyscall-sigreturn.S new file mode 100644 index 000000000000..555a64f124ca --- /dev/null +++ b/arch/sh/kernel/vsyscall/vsyscall-sigreturn.S @@ -0,0 +1,39 @@ +#include + + .text + .balign 32 + .globl __kernel_sigreturn + .type __kernel_sigreturn,@function +__kernel_sigreturn: +.LSTART_sigreturn: + mov.w 1f, r3 + trapa #0x10 + or r0, r0 + or r0, r0 + or r0, r0 + or r0, r0 + or r0, r0 + +1: .short __NR_sigreturn +.LEND_sigreturn: + .size __kernel_sigreturn,.-.LSTART_sigreturn + + .balign 32 + .globl __kernel_rt_sigreturn + .type __kernel_rt_sigreturn,@function +__kernel_rt_sigreturn: +.LSTART_rt_sigreturn: + mov.w 1f, r3 + trapa #0x10 + or r0, r0 + or r0, r0 + or r0, r0 + or r0, r0 + or r0, r0 + +1: .short __NR_rt_sigreturn +.LEND_rt_sigreturn: + .size __kernel_rt_sigreturn,.-.LSTART_rt_sigreturn + + .section .eh_frame,"a",@progbits + .previous diff --git a/arch/sh/kernel/vsyscall/vsyscall-syscall.S b/arch/sh/kernel/vsyscall/vsyscall-syscall.S new file mode 100644 index 000000000000..c2ac7f0282b3 --- /dev/null +++ b/arch/sh/kernel/vsyscall/vsyscall-syscall.S @@ -0,0 +1,10 @@ +#include + +__INITDATA + + .globl vsyscall_trapa_start, vsyscall_trapa_end +vsyscall_trapa_start: + .incbin "arch/sh/kernel/vsyscall/vsyscall-trapa.so" +vsyscall_trapa_end: + +__FINIT diff --git a/arch/sh/kernel/vsyscall/vsyscall-trapa.S b/arch/sh/kernel/vsyscall/vsyscall-trapa.S new file mode 100644 index 000000000000..3b6eb34c43fa --- /dev/null +++ b/arch/sh/kernel/vsyscall/vsyscall-trapa.S @@ -0,0 +1,42 @@ + .text + .globl __kernel_vsyscall + .type __kernel_vsyscall,@function +__kernel_vsyscall: +.LSTART_vsyscall: + /* XXX: We'll have to do something here once we opt to use the vDSO + * page for something other than the signal trampoline.. as well as + * fill out .eh_frame -- PFM. */ +.LEND_vsyscall: + .size __kernel_vsyscall,.-.LSTART_vsyscall + .previous + + .section .eh_frame,"a",@progbits +.LCIE: + .ualong .LCIE_end - .LCIE_start +.LCIE_start: + .ualong 0 /* CIE ID */ + .byte 0x1 /* Version number */ + .string "zRS" /* NUL-terminated augmentation string */ + .uleb128 0x1 /* Code alignment factor */ + .sleb128 -4 /* Data alignment factor */ + .byte 0x11 /* Return address register column */ + /* Augmentation length and data (none) */ + .byte 0xc /* DW_CFA_def_cfa */ + .uleb128 0xf /* r15 */ + .uleb128 0x0 /* offset 0 */ + + .align 2 +.LCIE_end: + + .ualong .LFDE_end-.LFDE_start /* Length FDE */ +.LFDE_start: + .ualong .LCIE /* CIE pointer */ + .ualong .LSTART_vsyscall-. /* start address */ + .ualong .LEND_vsyscall-.LSTART_vsyscall + .uleb128 0 + .align 2 +.LFDE_end: + .previous + +/* Get the common code for the sigreturn entry points */ +#include "vsyscall-sigreturn.S" diff --git a/arch/sh/kernel/vsyscall/vsyscall.c b/arch/sh/kernel/vsyscall/vsyscall.c new file mode 100644 index 000000000000..075d6cc1a2d7 --- /dev/null +++ b/arch/sh/kernel/vsyscall/vsyscall.c @@ -0,0 +1,150 @@ +/* + * arch/sh/kernel/vsyscall.c + * + * Copyright (C) 2006 Paul Mundt + * + * vDSO randomization + * Copyright(C) 2005-2006, Red Hat, Inc., Ingo Molnar + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include +#include + +/* + * Should the kernel map a VDSO page into processes and pass its + * address down to glibc upon exec()? + */ +unsigned int __read_mostly vdso_enabled = 1; +EXPORT_SYMBOL_GPL(vdso_enabled); + +static int __init vdso_setup(char *s) +{ + vdso_enabled = simple_strtoul(s, NULL, 0); + return 1; +} +__setup("vdso=", vdso_setup); + +/* + * These symbols are defined by vsyscall.o to mark the bounds + * of the ELF DSO images included therein. + */ +extern const char vsyscall_trapa_start, vsyscall_trapa_end; +static void *syscall_page; + +int __init vsyscall_init(void) +{ + syscall_page = (void *)get_zeroed_page(GFP_ATOMIC); + + /* + * XXX: Map this page to a fixmap entry if we get around + * to adding the page to ELF core dumps + */ + + memcpy(syscall_page, + &vsyscall_trapa_start, + &vsyscall_trapa_end - &vsyscall_trapa_start); + + return 0; +} + +static struct page *syscall_vma_nopage(struct vm_area_struct *vma, + unsigned long address, int *type) +{ + unsigned long offset = address - vma->vm_start; + struct page *page; + + if (address < vma->vm_start || address > vma->vm_end) + return NOPAGE_SIGBUS; + + page = virt_to_page(syscall_page + offset); + + get_page(page); + + return page; +} + +/* Prevent VMA merging */ +static void syscall_vma_close(struct vm_area_struct *vma) +{ +} + +static struct vm_operations_struct syscall_vm_ops = { + .nopage = syscall_vma_nopage, + .close = syscall_vma_close, +}; + +/* Setup a VMA at program startup for the vsyscall page */ +int arch_setup_additional_pages(struct linux_binprm *bprm, + int executable_stack) +{ + struct vm_area_struct *vma; + struct mm_struct *mm = current->mm; + unsigned long addr; + int ret; + + down_write(&mm->mmap_sem); + addr = get_unmapped_area(NULL, 0, PAGE_SIZE, 0, 0); + if (IS_ERR_VALUE(addr)) { + ret = addr; + goto up_fail; + } + + vma = kmem_cache_zalloc(vm_area_cachep, SLAB_KERNEL); + if (!vma) { + ret = -ENOMEM; + goto up_fail; + } + + vma->vm_start = addr; + vma->vm_end = addr + PAGE_SIZE; + /* MAYWRITE to allow gdb to COW and set breakpoints */ + vma->vm_flags = VM_READ|VM_EXEC|VM_MAYREAD|VM_MAYEXEC|VM_MAYWRITE; + vma->vm_flags |= mm->def_flags; + vma->vm_page_prot = protection_map[vma->vm_flags & 7]; + vma->vm_ops = &syscall_vm_ops; + vma->vm_mm = mm; + + ret = insert_vm_struct(mm, vma); + if (unlikely(ret)) { + kmem_cache_free(vm_area_cachep, vma); + goto up_fail; + } + + current->mm->context.vdso = (void *)addr; + + mm->total_vm++; +up_fail: + up_write(&mm->mmap_sem); + return ret; +} + +const char *arch_vma_name(struct vm_area_struct *vma) +{ + if (vma->vm_mm && vma->vm_start == (long)vma->vm_mm->context.vdso) + return "[vdso]"; + + return NULL; +} + +struct vm_area_struct *get_gate_vma(struct task_struct *task) +{ + return NULL; +} + +int in_gate_area(struct task_struct *task, unsigned long address) +{ + return 0; +} + +int in_gate_area_no_task(unsigned long address) +{ + return 0; +} diff --git a/arch/sh/kernel/vsyscall/vsyscall.lds.S b/arch/sh/kernel/vsyscall/vsyscall.lds.S new file mode 100644 index 000000000000..b13c3d439fee --- /dev/null +++ b/arch/sh/kernel/vsyscall/vsyscall.lds.S @@ -0,0 +1,74 @@ +/* + * Linker script for vsyscall DSO. The vsyscall page is an ELF shared + * object prelinked to its virtual address, and with only one read-only + * segment (that fits in one page). This script controls its layout. + */ +#include + +#ifdef CONFIG_CPU_LITTLE_ENDIAN +OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") +#else +OUTPUT_FORMAT("elf32-shbig-linux", "elf32-shbig-linux", "elf32-shbig-linux") +#endif +OUTPUT_ARCH(sh) + +/* The ELF entry point can be used to set the AT_SYSINFO value. */ +ENTRY(__kernel_vsyscall); + +SECTIONS +{ + . = SIZEOF_HEADERS; + + .hash : { *(.hash) } :text + .gnu.hash : { *(.gnu.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + + /* This linker script is used both with -r and with -shared. + For the layouts to match, we need to skip more than enough + space for the dynamic symbol table et al. If this amount + is insufficient, ld -shared will barf. Just increase it here. */ + . = 0x400; + + .text : { *(.text) } :text =0x90909090 + .note : { *(.note.*) } :text :note + .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr + .eh_frame : { KEEP (*(.eh_frame)) } :text + .dynamic : { *(.dynamic) } :text :dynamic + .useless : { + *(.got.plt) *(.got) + *(.data .data.* .gnu.linkonce.d.*) + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + } :text +} + +/* + * We must supply the ELF program headers explicitly to get just one + * PT_LOAD segment, and set the flags explicitly to make segments read-only. + */ +PHDRS +{ + text PT_LOAD FILEHDR PHDRS FLAGS(5); /* PF_R|PF_X */ + dynamic PT_DYNAMIC FLAGS(4); /* PF_R */ + note PT_NOTE FLAGS(4); /* PF_R */ + eh_frame_hdr 0x6474e550; /* PT_GNU_EH_FRAME, but ld doesn't match the name */ +} + +/* + * This controls what symbols we export from the DSO. + */ +VERSION +{ + LINUX_2.6 { + global: + __kernel_vsyscall; + __kernel_sigreturn; + __kernel_rt_sigreturn; + + local: *; + }; +} diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig index b445d02075e8..9dd606464d23 100644 --- a/arch/sh/mm/Kconfig +++ b/arch/sh/mm/Kconfig @@ -223,6 +223,19 @@ config 32BIT 32-bits through the SH-4A PMB. If this is not set, legacy 29-bit physical addressing will be used. +config VSYSCALL + bool "Support vsyscall page" + depends on MMU + default y + help + This will enable support for the kernel mapping a vDSO page + in process space, and subsequently handing down the entry point + to the libc through the ELF auxiliary vector. + + From the kernel side this is used for the signal trampoline. + For systems with an MMU that can afford to give up a page, + (the default value) say Y. + choice prompt "HugeTLB page size" depends on HUGETLB_PAGE && CPU_SH4 && MMU diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c index ad182b31d846..7154d1ce9785 100644 --- a/arch/sh/mm/init.c +++ b/arch/sh/mm/init.c @@ -286,6 +286,9 @@ void __init mem_init(void) initsize >> 10); p3_cache_init(); + + /* Initialize the vDSO */ + vsyscall_init(); } void free_initmem(void) diff --git a/arch/sh/mm/tlb-flush.c b/arch/sh/mm/tlb-flush.c index fd7e42bcaa40..73ec7f6084fa 100644 --- a/arch/sh/mm/tlb-flush.c +++ b/arch/sh/mm/tlb-flush.c @@ -14,12 +14,12 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { - if (vma->vm_mm && vma->vm_mm->context != NO_CONTEXT) { + if (vma->vm_mm && vma->vm_mm->context.id != NO_CONTEXT) { unsigned long flags; unsigned long asid; unsigned long saved_asid = MMU_NO_ASID; - asid = vma->vm_mm->context & MMU_CONTEXT_ASID_MASK; + asid = vma->vm_mm->context.id & MMU_CONTEXT_ASID_MASK; page &= PAGE_MASK; local_irq_save(flags); @@ -39,20 +39,21 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, { struct mm_struct *mm = vma->vm_mm; - if (mm->context != NO_CONTEXT) { + if (mm->context.id != NO_CONTEXT) { unsigned long flags; int size; local_irq_save(flags); size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */ - mm->context = NO_CONTEXT; + mm->context.id = NO_CONTEXT; if (mm == current->mm) activate_context(mm); } else { - unsigned long asid = mm->context&MMU_CONTEXT_ASID_MASK; + unsigned long asid; unsigned long saved_asid = MMU_NO_ASID; + asid = mm->context.id & MMU_CONTEXT_ASID_MASK; start &= PAGE_MASK; end += (PAGE_SIZE - 1); end &= PAGE_MASK; @@ -81,9 +82,10 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end) if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */ flush_tlb_all(); } else { - unsigned long asid = init_mm.context&MMU_CONTEXT_ASID_MASK; + unsigned long asid; unsigned long saved_asid = get_asid(); + asid = init_mm.context.id & MMU_CONTEXT_ASID_MASK; start &= PAGE_MASK; end += (PAGE_SIZE - 1); end &= PAGE_MASK; @@ -101,11 +103,11 @@ void flush_tlb_mm(struct mm_struct *mm) { /* Invalidate all TLB of this process. */ /* Instead of invalidating each TLB, we get new MMU context. */ - if (mm->context != NO_CONTEXT) { + if (mm->context.id != NO_CONTEXT) { unsigned long flags; local_irq_save(flags); - mm->context = NO_CONTEXT; + mm->context.id = NO_CONTEXT; if (mm == current->mm) activate_context(mm); local_irq_restore(flags); diff --git a/include/asm-sh/auxvec.h b/include/asm-sh/auxvec.h index fc21e4db5881..1b6916e63e90 100644 --- a/include/asm-sh/auxvec.h +++ b/include/asm-sh/auxvec.h @@ -1,4 +1,18 @@ #ifndef __ASM_SH_AUXVEC_H #define __ASM_SH_AUXVEC_H +/* + * Architecture-neutral AT_ values in 0-17, leave some room + * for more of them. + */ + +#ifdef CONFIG_VSYSCALL +/* + * Only define this in the vsyscall case, the entry point to + * the vsyscall page gets placed here. The kernel will attempt + * to build a gate VMA we don't care about otherwise.. + */ +#define AT_SYSINFO_EHDR 33 +#endif + #endif /* __ASM_SH_AUXVEC_H */ diff --git a/include/asm-sh/elf.h b/include/asm-sh/elf.h index cc8e5e767345..3a07ab40ac4d 100644 --- a/include/asm-sh/elf.h +++ b/include/asm-sh/elf.h @@ -121,4 +121,24 @@ extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *); #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs) #endif +#ifdef CONFIG_VSYSCALL +/* vDSO has arch_setup_additional_pages */ +#define ARCH_HAS_SETUP_ADDITIONAL_PAGES +struct linux_binprm; +extern int arch_setup_additional_pages(struct linux_binprm *bprm, + int executable_stack); + +extern unsigned int vdso_enabled; +extern void __kernel_vsyscall; + +#define VDSO_BASE ((unsigned long)current->mm->context.vdso) +#define VDSO_SYM(x) (VDSO_BASE + (unsigned long)(x)) + +#define ARCH_DLINFO \ +do { \ + if (vdso_enabled) \ + NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); \ +} while (0) +#endif /* CONFIG_VSYSCALL */ + #endif /* __ASM_SH_ELF_H */ diff --git a/include/asm-sh/mmu.h b/include/asm-sh/mmu.h index 6383dc84501e..cf47df79bb94 100644 --- a/include/asm-sh/mmu.h +++ b/include/asm-sh/mmu.h @@ -11,7 +11,12 @@ typedef struct { #else /* Default "unsigned long" context */ -typedef unsigned long mm_context_t; +typedef unsigned long mm_context_id_t; + +typedef struct { + mm_context_id_t id; + void *vdso; +} mm_context_t; #endif /* CONFIG_MMU */ diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h index 87678ba8d6b6..c7088efe579a 100644 --- a/include/asm-sh/mmu_context.h +++ b/include/asm-sh/mmu_context.h @@ -49,7 +49,7 @@ get_mmu_context(struct mm_struct *mm) unsigned long mc = mmu_context_cache; /* Check if we have old version of context. */ - if (((mm->context ^ mc) & MMU_CONTEXT_VERSION_MASK) == 0) + if (((mm->context.id ^ mc) & MMU_CONTEXT_VERSION_MASK) == 0) /* It's up to date, do nothing */ return; @@ -68,7 +68,7 @@ get_mmu_context(struct mm_struct *mm) if (!mc) mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION; } - mm->context = mc; + mm->context.id = mc; } /* @@ -78,7 +78,7 @@ get_mmu_context(struct mm_struct *mm) static __inline__ int init_new_context(struct task_struct *tsk, struct mm_struct *mm) { - mm->context = NO_CONTEXT; + mm->context.id = NO_CONTEXT; return 0; } @@ -123,7 +123,7 @@ static __inline__ unsigned long get_asid(void) static __inline__ void activate_context(struct mm_struct *mm) { get_mmu_context(mm); - set_asid(mm->context & MMU_CONTEXT_ASID_MASK); + set_asid(mm->context.id & MMU_CONTEXT_ASID_MASK); } /* MMU_TTB can be used for optimizing the fault handling. diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index acf6977b4042..3d8dae31a6f6 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -117,5 +117,10 @@ typedef struct { unsigned long pgprot; } pgprot_t; #include #include +/* vDSO support */ +#ifdef CONFIG_VSYSCALL +#define __HAVE_ARCH_GATE_AREA +#endif + #endif /* __KERNEL__ */ #endif /* __ASM_SH_PAGE_H */ diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index b7cba4e91a72..474773853cd1 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -276,5 +276,11 @@ static inline void prefetch(void *x) #define prefetchw(x) prefetch(x) #endif +#ifdef CONFIG_VSYSCALL +extern int vsyscall_init(void); +#else +#define vsyscall_init() do { } while (0) +#endif + #endif /* __KERNEL__ */ #endif /* __ASM_SH_PROCESSOR_H */ -- cgit v1.2.3 From f3c2575818fab45f8609e4aef2e43ab02b3a142e Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:36:17 +0900 Subject: sh: Calculate shm alignment at runtime. Set the SHM alignment at runtime, based off of probed cache desc. Optimize get_unmapped_area() to only colour align shared mappings. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/init.c | 5 ++++ arch/sh/kernel/sys_sh.c | 54 +++++++++++++++++++++++-------------- include/asm-sh/cacheflush.h | 2 ++ include/asm-sh/cpu-sh3/cacheflush.h | 8 ------ include/asm-sh/cpu-sh4/cacheflush.h | 3 --- include/asm-sh/page.h | 2 ++ include/asm-sh/pgtable.h | 2 -- 7 files changed, 43 insertions(+), 33 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c index 731dd61419dd..bfb90eb0b7a6 100644 --- a/arch/sh/kernel/cpu/init.c +++ b/arch/sh/kernel/cpu/init.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -198,6 +199,10 @@ asmlinkage void __init sh_cpu_init(void) /* Init the cache */ cache_init(); + shm_align_mask = max_t(unsigned long, + cpu_data->dcache.way_size - 1, + PAGE_SIZE - 1); + /* Disable the FPU */ if (fpu_disabled) { printk("FPU Disabled\n"); diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c index 0ee7bf4cb238..b68ff705f067 100644 --- a/arch/sh/kernel/sys_sh.c +++ b/arch/sh/kernel/sys_sh.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -44,11 +45,16 @@ asmlinkage int sys_pipe(unsigned long r4, unsigned long r5, return error; } -#if defined(HAVE_ARCH_UNMAPPED_AREA) && defined(CONFIG_MMU) +unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */ + +EXPORT_SYMBOL(shm_align_mask); + /* - * To avoid cache alias, we map the shard page with same color. + * To avoid cache aliases, we map the shared page with same color. */ -#define COLOUR_ALIGN(addr) (((addr)+SHMLBA-1)&~(SHMLBA-1)) +#define COLOUR_ALIGN(addr, pgoff) \ + ((((addr) + shm_align_mask) & ~shm_align_mask) + \ + (((pgoff) << PAGE_SHIFT) & shm_align_mask)) unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags) @@ -56,43 +62,52 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, struct mm_struct *mm = current->mm; struct vm_area_struct *vma; unsigned long start_addr; + int do_colour_align; if (flags & MAP_FIXED) { /* We do not accept a shared mapping if it would violate * cache aliasing constraints. */ - if ((flags & MAP_SHARED) && (addr & (SHMLBA - 1))) + if ((flags & MAP_SHARED) && (addr & shm_align_mask)) return -EINVAL; return addr; } - if (len > TASK_SIZE) + if (unlikely(len > TASK_SIZE)) return -ENOMEM; + do_colour_align = 0; + if (filp || (flags & MAP_SHARED)) + do_colour_align = 1; + if (addr) { - if (flags & MAP_PRIVATE) - addr = PAGE_ALIGN(addr); + if (do_colour_align) + addr = COLOUR_ALIGN(addr, pgoff); else - addr = COLOUR_ALIGN(addr); + addr = PAGE_ALIGN(addr); + vma = find_vma(mm, addr); if (TASK_SIZE - len >= addr && (!vma || addr + len <= vma->vm_start)) return addr; } - if (len <= mm->cached_hole_size) { + + if (len > mm->cached_hole_size) { + start_addr = addr = mm->free_area_cache; + } else { mm->cached_hole_size = 0; - mm->free_area_cache = TASK_UNMAPPED_BASE; + start_addr = addr = TASK_UNMAPPED_BASE; } - if (flags & MAP_PRIVATE) - addr = PAGE_ALIGN(mm->free_area_cache); - else - addr = COLOUR_ALIGN(mm->free_area_cache); - start_addr = addr; full_search: + if (do_colour_align) + addr = COLOUR_ALIGN(addr, pgoff); + else + addr = PAGE_ALIGN(mm->free_area_cache); + for (vma = find_vma(mm, addr); ; vma = vma->vm_next) { /* At this point: (!vma || addr < vma->vm_end). */ - if (TASK_SIZE - len < addr) { + if (unlikely(TASK_SIZE - len < addr)) { /* * Start a new search - just in case we missed * some holes. @@ -104,7 +119,7 @@ full_search: } return -ENOMEM; } - if (!vma || addr + len <= vma->vm_start) { + if (likely(!vma || addr + len <= vma->vm_start)) { /* * Remember the place where we stopped the search: */ @@ -115,11 +130,10 @@ full_search: mm->cached_hole_size = vma->vm_start - addr; addr = vma->vm_end; - if (!(flags & MAP_PRIVATE)) - addr = COLOUR_ALIGN(addr); + if (do_colour_align) + addr = COLOUR_ALIGN(addr, pgoff); } } -#endif static inline long do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, diff --git a/include/asm-sh/cacheflush.h b/include/asm-sh/cacheflush.h index 92930b4a40d4..07f62ec9ff0c 100644 --- a/include/asm-sh/cacheflush.h +++ b/include/asm-sh/cacheflush.h @@ -28,5 +28,7 @@ extern void __flush_invalidate_region(void *start, int size); memcpy(dst, src, len); \ } while (0) +#define HAVE_ARCH_UNMAPPED_AREA + #endif /* __KERNEL__ */ #endif /* __ASM_SH_CACHEFLUSH_H */ diff --git a/include/asm-sh/cpu-sh3/cacheflush.h b/include/asm-sh/cpu-sh3/cacheflush.h index 97f5a64c2ab8..03fde97a7fd0 100644 --- a/include/asm-sh/cpu-sh3/cacheflush.h +++ b/include/asm-sh/cpu-sh3/cacheflush.h @@ -64,12 +64,4 @@ void flush_icache_page(struct vm_area_struct *vma, struct page *page); #define p3_cache_init() do { } while (0) -/* - * We provide our own get_unmapped_area to avoid cache aliasing issues - * on SH7705 with a 32KB cache, and to page align addresses in the - * non-aliasing case. - */ -#define HAVE_ARCH_UNMAPPED_AREA - #endif /* __ASM_CPU_SH3_CACHEFLUSH_H */ - diff --git a/include/asm-sh/cpu-sh4/cacheflush.h b/include/asm-sh/cpu-sh4/cacheflush.h index a95fc951aff6..515fd574267c 100644 --- a/include/asm-sh/cpu-sh4/cacheflush.h +++ b/include/asm-sh/cpu-sh4/cacheflush.h @@ -39,9 +39,6 @@ void p3_cache_init(void); #define PG_mapped PG_arch_1 -/* We provide our own get_unmapped_area to avoid cache alias issue */ -#define HAVE_ARCH_UNMAPPED_AREA - #ifdef CONFIG_MMU extern int remap_area_pages(unsigned long addr, unsigned long phys_addr, unsigned long size, unsigned long flags); diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index 3d8dae31a6f6..ca8b26d90475 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -44,6 +44,8 @@ extern void (*clear_page)(void *to); extern void (*copy_page)(void *to, void *from); +extern unsigned long shm_align_mask; + #ifdef CONFIG_MMU extern void clear_page_slow(void *to); extern void copy_page_slow(void *to, void *from); diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h index 41c559d8ba87..2c8682ad1012 100644 --- a/include/asm-sh/pgtable.h +++ b/include/asm-sh/pgtable.h @@ -340,6 +340,4 @@ extern pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t #include #endif /* !__ASSEMBLY__ */ - #endif /* __ASM_SH_PAGE_H */ - -- cgit v1.2.3