From 1d0095feea591bbd94f35d8a98aed746319783e1 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sat, 19 Nov 2016 13:47:37 +0000 Subject: x86/tsc: Verify TSC_ADJUST from idle When entering idle, it's a good oportunity to verify that the TSC_ADJUST MSR has not been tampered with (BIOS hiding SMM cycles). If tampering is detected, emit a warning and restore it to the previous value. This is especially important for machines, which mark the TSC reliable because there is no watchdog clocksource available (SoCs). This is not sufficient for HPC (NOHZ_FULL) situations where a CPU never goes idle, but adding a timer to do the check periodically is not an option either. On a machine, which has this issue, the check triggeres right during boot, so there is a decent chance that the sysadmin will notice. Rate limit the check to once per second and warn only once per cpu. Signed-off-by: Thomas Gleixner Reviewed-by: Ingo Molnar Cc: Peter Zijlstra Cc: Yinghai Lu Cc: Borislav Petkov Link: http://lkml.kernel.org/r/20161119134017.732180441@linutronix.de Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/tsc.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/x86/include/asm/tsc.h') diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index 1ec0595867d9..b896e9ee65bc 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h @@ -50,8 +50,10 @@ extern void check_tsc_sync_target(void); #ifdef CONFIG_X86_TSC extern void tsc_store_and_check_tsc_adjust(void); +extern void tsc_verify_tsc_adjust(void); #else static inline void tsc_store_and_check_tsc_adjust(void) { } +static inline void tsc_verify_tsc_adjust(void) { } #endif extern int notsc_setup(char *); -- cgit v1.2.3