From 7b2fa5702059a03c11f934224724b2f712a749ce Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Mon, 6 Jun 2011 09:37:58 -0600 Subject: gpio/mxs: Move Freescale mxs gpio driver to drivers/gpio GPIO drivers are getting moved to drivers/gpio for cleanup and consolidation. This patch moves the mxs driver. Follow up patches will clean it up and make it a fine upstanding example of a gpio driver. v2: Removed header file entirely and put struct definition directly into driver. The struct isn't used anywhere else in the kernel. Signed-off-by: Grant Likely Tested-by: Shawn Guo Acked-by: Sascha Hauer --- arch/arm/mach-mxs/Makefile | 2 +- arch/arm/mach-mxs/gpio.c | 331 --------------------------------------- arch/arm/mach-mxs/gpio.h | 34 ---- arch/arm/mach-mxs/mach-mx28evk.c | 1 - 4 files changed, 1 insertion(+), 367 deletions(-) delete mode 100644 arch/arm/mach-mxs/gpio.c delete mode 100644 arch/arm/mach-mxs/gpio.h (limited to 'arch') diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile index 58e892376bf2..6c38262a3aaa 100644 --- a/arch/arm/mach-mxs/Makefile +++ b/arch/arm/mach-mxs/Makefile @@ -1,5 +1,5 @@ # Common support -obj-y := clock.o devices.o gpio.o icoll.o iomux.o system.o timer.o +obj-y := clock.o devices.o icoll.o iomux.o system.o timer.o obj-$(CONFIG_MXS_OCOTP) += ocotp.o obj-$(CONFIG_PM) += pm.o diff --git a/arch/arm/mach-mxs/gpio.c b/arch/arm/mach-mxs/gpio.c deleted file mode 100644 index 2c950fef71a8..000000000000 --- a/arch/arm/mach-mxs/gpio.c +++ /dev/null @@ -1,331 +0,0 @@ -/* - * MXC GPIO support. (c) 2008 Daniel Mack - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * - * Based on code from Freescale, - * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "gpio.h" - -static struct mxs_gpio_port *mxs_gpio_ports; -static int gpio_table_size; - -#define PINCTRL_DOUT(n) ((cpu_is_mx23() ? 0x0500 : 0x0700) + (n) * 0x10) -#define PINCTRL_DIN(n) ((cpu_is_mx23() ? 0x0600 : 0x0900) + (n) * 0x10) -#define PINCTRL_DOE(n) ((cpu_is_mx23() ? 0x0700 : 0x0b00) + (n) * 0x10) -#define PINCTRL_PIN2IRQ(n) ((cpu_is_mx23() ? 0x0800 : 0x1000) + (n) * 0x10) -#define PINCTRL_IRQEN(n) ((cpu_is_mx23() ? 0x0900 : 0x1100) + (n) * 0x10) -#define PINCTRL_IRQLEV(n) ((cpu_is_mx23() ? 0x0a00 : 0x1200) + (n) * 0x10) -#define PINCTRL_IRQPOL(n) ((cpu_is_mx23() ? 0x0b00 : 0x1300) + (n) * 0x10) -#define PINCTRL_IRQSTAT(n) ((cpu_is_mx23() ? 0x0c00 : 0x1400) + (n) * 0x10) - -#define GPIO_INT_FALL_EDGE 0x0 -#define GPIO_INT_LOW_LEV 0x1 -#define GPIO_INT_RISE_EDGE 0x2 -#define GPIO_INT_HIGH_LEV 0x3 -#define GPIO_INT_LEV_MASK (1 << 0) -#define GPIO_INT_POL_MASK (1 << 1) - -/* Note: This driver assumes 32 GPIOs are handled in one register */ - -static void clear_gpio_irqstatus(struct mxs_gpio_port *port, u32 index) -{ - __mxs_clrl(1 << index, port->base + PINCTRL_IRQSTAT(port->id)); -} - -static void set_gpio_irqenable(struct mxs_gpio_port *port, u32 index, - int enable) -{ - if (enable) { - __mxs_setl(1 << index, port->base + PINCTRL_IRQEN(port->id)); - __mxs_setl(1 << index, port->base + PINCTRL_PIN2IRQ(port->id)); - } else { - __mxs_clrl(1 << index, port->base + PINCTRL_IRQEN(port->id)); - } -} - -static void mxs_gpio_ack_irq(struct irq_data *d) -{ - u32 gpio = irq_to_gpio(d->irq); - clear_gpio_irqstatus(&mxs_gpio_ports[gpio / 32], gpio & 0x1f); -} - -static void mxs_gpio_mask_irq(struct irq_data *d) -{ - u32 gpio = irq_to_gpio(d->irq); - set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 0); -} - -static void mxs_gpio_unmask_irq(struct irq_data *d) -{ - u32 gpio = irq_to_gpio(d->irq); - set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 1); -} - -static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset); - -static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) -{ - u32 gpio = irq_to_gpio(d->irq); - u32 pin_mask = 1 << (gpio & 31); - struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32]; - void __iomem *pin_addr; - int edge; - - switch (type) { - case IRQ_TYPE_EDGE_RISING: - edge = GPIO_INT_RISE_EDGE; - break; - case IRQ_TYPE_EDGE_FALLING: - edge = GPIO_INT_FALL_EDGE; - break; - case IRQ_TYPE_LEVEL_LOW: - edge = GPIO_INT_LOW_LEV; - break; - case IRQ_TYPE_LEVEL_HIGH: - edge = GPIO_INT_HIGH_LEV; - break; - default: - return -EINVAL; - } - - /* set level or edge */ - pin_addr = port->base + PINCTRL_IRQLEV(port->id); - if (edge & GPIO_INT_LEV_MASK) - __mxs_setl(pin_mask, pin_addr); - else - __mxs_clrl(pin_mask, pin_addr); - - /* set polarity */ - pin_addr = port->base + PINCTRL_IRQPOL(port->id); - if (edge & GPIO_INT_POL_MASK) - __mxs_setl(pin_mask, pin_addr); - else - __mxs_clrl(pin_mask, pin_addr); - - clear_gpio_irqstatus(port, gpio & 0x1f); - - return 0; -} - -/* MXS has one interrupt *per* gpio port */ -static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) -{ - u32 irq_stat; - struct mxs_gpio_port *port = (struct mxs_gpio_port *)irq_get_handler_data(irq); - u32 gpio_irq_no_base = port->virtual_irq_start; - - desc->irq_data.chip->irq_ack(&desc->irq_data); - - irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) & - __raw_readl(port->base + PINCTRL_IRQEN(port->id)); - - while (irq_stat != 0) { - int irqoffset = fls(irq_stat) - 1; - generic_handle_irq(gpio_irq_no_base + irqoffset); - irq_stat &= ~(1 << irqoffset); - } -} - -/* - * Set interrupt number "irq" in the GPIO as a wake-up source. - * While system is running, all registered GPIO interrupts need to have - * wake-up enabled. When system is suspended, only selected GPIO interrupts - * need to have wake-up enabled. - * @param irq interrupt source number - * @param enable enable as wake-up if equal to non-zero - * @return This function returns 0 on success. - */ -static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable) -{ - u32 gpio = irq_to_gpio(d->irq); - u32 gpio_idx = gpio & 0x1f; - struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32]; - - if (enable) { - if (port->irq_high && (gpio_idx >= 16)) - enable_irq_wake(port->irq_high); - else - enable_irq_wake(port->irq); - } else { - if (port->irq_high && (gpio_idx >= 16)) - disable_irq_wake(port->irq_high); - else - disable_irq_wake(port->irq); - } - - return 0; -} - -static struct irq_chip gpio_irq_chip = { - .name = "mxs gpio", - .irq_ack = mxs_gpio_ack_irq, - .irq_mask = mxs_gpio_mask_irq, - .irq_unmask = mxs_gpio_unmask_irq, - .irq_set_type = mxs_gpio_set_irq_type, - .irq_set_wake = mxs_gpio_set_wake_irq, -}; - -static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset, - int dir) -{ - struct mxs_gpio_port *port = - container_of(chip, struct mxs_gpio_port, chip); - void __iomem *pin_addr = port->base + PINCTRL_DOE(port->id); - - if (dir) - __mxs_setl(1 << offset, pin_addr); - else - __mxs_clrl(1 << offset, pin_addr); -} - -static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset) -{ - struct mxs_gpio_port *port = - container_of(chip, struct mxs_gpio_port, chip); - - return (__raw_readl(port->base + PINCTRL_DIN(port->id)) >> offset) & 1; -} - -static void mxs_gpio_set(struct gpio_chip *chip, unsigned offset, int value) -{ - struct mxs_gpio_port *port = - container_of(chip, struct mxs_gpio_port, chip); - void __iomem *pin_addr = port->base + PINCTRL_DOUT(port->id); - - if (value) - __mxs_setl(1 << offset, pin_addr); - else - __mxs_clrl(1 << offset, pin_addr); -} - -static int mxs_gpio_to_irq(struct gpio_chip *chip, unsigned offset) -{ - struct mxs_gpio_port *port = - container_of(chip, struct mxs_gpio_port, chip); - - return port->virtual_irq_start + offset; -} - -static int mxs_gpio_direction_input(struct gpio_chip *chip, unsigned offset) -{ - mxs_set_gpio_direction(chip, offset, 0); - return 0; -} - -static int mxs_gpio_direction_output(struct gpio_chip *chip, - unsigned offset, int value) -{ - mxs_gpio_set(chip, offset, value); - mxs_set_gpio_direction(chip, offset, 1); - return 0; -} - -int __init mxs_gpio_init(struct mxs_gpio_port *port, int cnt) -{ - int i, j; - - /* save for local usage */ - mxs_gpio_ports = port; - gpio_table_size = cnt; - - pr_info("MXS GPIO hardware\n"); - - for (i = 0; i < cnt; i++) { - /* disable the interrupt and clear the status */ - __raw_writel(0, port[i].base + PINCTRL_PIN2IRQ(i)); - __raw_writel(0, port[i].base + PINCTRL_IRQEN(i)); - - /* clear address has to be used to clear IRQSTAT bits */ - __mxs_clrl(~0U, port[i].base + PINCTRL_IRQSTAT(i)); - - for (j = port[i].virtual_irq_start; - j < port[i].virtual_irq_start + 32; j++) { - irq_set_chip_and_handler(j, &gpio_irq_chip, - handle_level_irq); - set_irq_flags(j, IRQF_VALID); - } - - /* setup one handler for each entry */ - irq_set_chained_handler(port[i].irq, mxs_gpio_irq_handler); - irq_set_handler_data(port[i].irq, &port[i]); - - /* register gpio chip */ - port[i].chip.direction_input = mxs_gpio_direction_input; - port[i].chip.direction_output = mxs_gpio_direction_output; - port[i].chip.get = mxs_gpio_get; - port[i].chip.set = mxs_gpio_set; - port[i].chip.to_irq = mxs_gpio_to_irq; - port[i].chip.base = i * 32; - port[i].chip.ngpio = 32; - - /* its a serious configuration bug when it fails */ - BUG_ON(gpiochip_add(&port[i].chip) < 0); - } - - return 0; -} - -#define MX23_GPIO_BASE MX23_IO_ADDRESS(MX23_PINCTRL_BASE_ADDR) -#define MX28_GPIO_BASE MX28_IO_ADDRESS(MX28_PINCTRL_BASE_ADDR) - -#define DEFINE_MXS_GPIO_PORT(_base, _irq, _id) \ - { \ - .chip.label = "gpio-" #_id, \ - .id = _id, \ - .irq = _irq, \ - .base = _base, \ - .virtual_irq_start = MXS_GPIO_IRQ_START + (_id) * 32, \ - } - -#ifdef CONFIG_SOC_IMX23 -static struct mxs_gpio_port mx23_gpio_ports[] = { - DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO0, 0), - DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO1, 1), - DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO2, 2), -}; - -int __init mx23_register_gpios(void) -{ - return mxs_gpio_init(mx23_gpio_ports, ARRAY_SIZE(mx23_gpio_ports)); -} -#endif - -#ifdef CONFIG_SOC_IMX28 -static struct mxs_gpio_port mx28_gpio_ports[] = { - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO0, 0), - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO1, 1), - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO2, 2), - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO3, 3), - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO4, 4), -}; - -int __init mx28_register_gpios(void) -{ - return mxs_gpio_init(mx28_gpio_ports, ARRAY_SIZE(mx28_gpio_ports)); -} -#endif diff --git a/arch/arm/mach-mxs/gpio.h b/arch/arm/mach-mxs/gpio.h deleted file mode 100644 index 005bb06630b1..000000000000 --- a/arch/arm/mach-mxs/gpio.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __MXS_GPIO_H__ -#define __MXS_GPIO_H__ - -struct mxs_gpio_port { - void __iomem *base; - int id; - int irq; - int irq_high; - int virtual_irq_start; - struct gpio_chip chip; -}; - -int mxs_gpio_init(struct mxs_gpio_port*, int); - -#endif /* __MXS_GPIO_H__ */ diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c index eacdc6b0e70a..56767a5cce0e 100644 --- a/arch/arm/mach-mxs/mach-mx28evk.c +++ b/arch/arm/mach-mxs/mach-mx28evk.c @@ -26,7 +26,6 @@ #include #include "devices-mx28.h" -#include "gpio.h" #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13) #define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15) -- cgit v1.2.3 From 8d7cf8370d5fb75a3265408dceb1d6173eebfafd Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 6 Jun 2011 09:37:58 -0600 Subject: gpio/mxs: Change gpio-mxs into an upstanding gpio driver The patch makes necessary changes on gpio-mxs as below to turn it into an upstanding gpio driver. * Clean up the gpio port definition stuff * Use readl/writel to replace mach-specific accessors __raw_readl/__raw_writel * Change mxs_gpio_init into mxs_gpio_probe function And it then migrates mach-mxs to the updated driver by adding corresponding platform devices. Signed-off-by: Shawn Guo Acked-by: Arnd Bergmann Acked-by: Sascha Hauer Signed-off-by: Grant Likely --- arch/arm/mach-mxs/devices.c | 11 ++ arch/arm/mach-mxs/devices/Makefile | 1 + arch/arm/mach-mxs/devices/platform-gpio-mxs.c | 53 ++++++ arch/arm/mach-mxs/include/mach/devices-common.h | 2 + arch/arm/mach-mxs/mm-mx23.c | 1 - arch/arm/mach-mxs/mm-mx28.c | 1 - drivers/gpio/gpio-mxs.c | 216 ++++++++++++++---------- 7 files changed, 191 insertions(+), 94 deletions(-) create mode 100644 arch/arm/mach-mxs/devices/platform-gpio-mxs.c (limited to 'arch') diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c index cfdb6b284702..fe3e847930c9 100644 --- a/arch/arm/mach-mxs/devices.c +++ b/arch/arm/mach-mxs/devices.c @@ -88,3 +88,14 @@ int __init mxs_add_amba_device(const struct amba_device *dev) return amba_device_register(adev, &iomem_resource); } + +struct device mxs_apbh_bus = { + .init_name = "mxs_apbh", + .parent = &platform_bus, +}; + +static int __init mxs_device_init(void) +{ + return device_register(&mxs_apbh_bus); +} +core_initcall(mxs_device_init); diff --git a/arch/arm/mach-mxs/devices/Makefile b/arch/arm/mach-mxs/devices/Makefile index 324f2824d38d..351915c683ff 100644 --- a/arch/arm/mach-mxs/devices/Makefile +++ b/arch/arm/mach-mxs/devices/Makefile @@ -6,4 +6,5 @@ obj-$(CONFIG_MXS_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_I2C) += platform-mxs-i2c.o obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_MMC) += platform-mxs-mmc.o obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o +obj-y += platform-gpio-mxs.o obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o diff --git a/arch/arm/mach-mxs/devices/platform-gpio-mxs.c b/arch/arm/mach-mxs/devices/platform-gpio-mxs.c new file mode 100644 index 000000000000..ed0885e414e0 --- /dev/null +++ b/arch/arm/mach-mxs/devices/platform-gpio-mxs.c @@ -0,0 +1,53 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include +#include + +#include +#include +#include + +struct platform_device *__init mxs_add_gpio( + int id, resource_size_t iobase, int irq) +{ + struct resource res[] = { + { + .start = iobase, + .end = iobase + SZ_8K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = irq, + .end = irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return platform_device_register_resndata(&mxs_apbh_bus, + "gpio-mxs", id, res, ARRAY_SIZE(res), NULL, 0); +} + +static int __init mxs_add_mxs_gpio(void) +{ + if (cpu_is_mx23()) { + mxs_add_gpio(0, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO0); + mxs_add_gpio(1, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO1); + mxs_add_gpio(2, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO2); + } + + if (cpu_is_mx28()) { + mxs_add_gpio(0, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO0); + mxs_add_gpio(1, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO1); + mxs_add_gpio(2, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO2); + mxs_add_gpio(3, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO3); + mxs_add_gpio(4, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO4); + } + + return 0; +} +postcore_initcall(mxs_add_mxs_gpio); diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h index 7a37469ed5bf..812d7a813a78 100644 --- a/arch/arm/mach-mxs/include/mach/devices-common.h +++ b/arch/arm/mach-mxs/include/mach/devices-common.h @@ -11,6 +11,8 @@ #include #include +extern struct device mxs_apbh_bus; + struct platform_device *mxs_add_platform_device_dmamask( const char *name, int id, const struct resource *res, unsigned int num_resources, diff --git a/arch/arm/mach-mxs/mm-mx23.c b/arch/arm/mach-mxs/mm-mx23.c index 5148cd64a6b7..1b2345ac1a87 100644 --- a/arch/arm/mach-mxs/mm-mx23.c +++ b/arch/arm/mach-mxs/mm-mx23.c @@ -41,5 +41,4 @@ void __init mx23_map_io(void) void __init mx23_init_irq(void) { icoll_init_irq(); - mx23_register_gpios(); } diff --git a/arch/arm/mach-mxs/mm-mx28.c b/arch/arm/mach-mxs/mm-mx28.c index 7e4cea32ebc6..b6e18ddb92c0 100644 --- a/arch/arm/mach-mxs/mm-mx28.c +++ b/arch/arm/mach-mxs/mm-mx28.c @@ -41,5 +41,4 @@ void __init mx28_map_io(void) void __init mx28_init_irq(void) { icoll_init_irq(); - mx28_register_gpios(); } diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c index e26bf309b214..a28761428bb0 100644 --- a/drivers/gpio/gpio-mxs.c +++ b/drivers/gpio/gpio-mxs.c @@ -25,12 +25,12 @@ #include #include #include -#include -#include -#include +#include +#include +#include -static struct mxs_gpio_port *mxs_gpio_ports; -static int gpio_table_size; +#define MXS_SET 0x4 +#define MXS_CLR 0x8 #define PINCTRL_DOUT(n) ((cpu_is_mx23() ? 0x0500 : 0x0700) + (n) * 0x10) #define PINCTRL_DIN(n) ((cpu_is_mx23() ? 0x0600 : 0x0900) + (n) * 0x10) @@ -61,36 +61,42 @@ struct mxs_gpio_port { static void clear_gpio_irqstatus(struct mxs_gpio_port *port, u32 index) { - __mxs_clrl(1 << index, port->base + PINCTRL_IRQSTAT(port->id)); + writel(1 << index, port->base + PINCTRL_IRQSTAT(port->id) + MXS_CLR); } static void set_gpio_irqenable(struct mxs_gpio_port *port, u32 index, int enable) { if (enable) { - __mxs_setl(1 << index, port->base + PINCTRL_IRQEN(port->id)); - __mxs_setl(1 << index, port->base + PINCTRL_PIN2IRQ(port->id)); + writel(1 << index, + port->base + PINCTRL_IRQEN(port->id) + MXS_SET); + writel(1 << index, + port->base + PINCTRL_PIN2IRQ(port->id) + MXS_SET); } else { - __mxs_clrl(1 << index, port->base + PINCTRL_IRQEN(port->id)); + writel(1 << index, + port->base + PINCTRL_IRQEN(port->id) + MXS_CLR); } } static void mxs_gpio_ack_irq(struct irq_data *d) { + struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d); u32 gpio = irq_to_gpio(d->irq); - clear_gpio_irqstatus(&mxs_gpio_ports[gpio / 32], gpio & 0x1f); + clear_gpio_irqstatus(port, gpio & 0x1f); } static void mxs_gpio_mask_irq(struct irq_data *d) { + struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d); u32 gpio = irq_to_gpio(d->irq); - set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 0); + set_gpio_irqenable(port, gpio & 0x1f, 0); } static void mxs_gpio_unmask_irq(struct irq_data *d) { + struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d); u32 gpio = irq_to_gpio(d->irq); - set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 1); + set_gpio_irqenable(port, gpio & 0x1f, 1); } static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset); @@ -99,7 +105,7 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) { u32 gpio = irq_to_gpio(d->irq); u32 pin_mask = 1 << (gpio & 31); - struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32]; + struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d); void __iomem *pin_addr; int edge; @@ -123,16 +129,16 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) /* set level or edge */ pin_addr = port->base + PINCTRL_IRQLEV(port->id); if (edge & GPIO_INT_LEV_MASK) - __mxs_setl(pin_mask, pin_addr); + writel(pin_mask, pin_addr + MXS_SET); else - __mxs_clrl(pin_mask, pin_addr); + writel(pin_mask, pin_addr + MXS_CLR); /* set polarity */ pin_addr = port->base + PINCTRL_IRQPOL(port->id); if (edge & GPIO_INT_POL_MASK) - __mxs_setl(pin_mask, pin_addr); + writel(pin_mask, pin_addr + MXS_SET); else - __mxs_clrl(pin_mask, pin_addr); + writel(pin_mask, pin_addr + MXS_CLR); clear_gpio_irqstatus(port, gpio & 0x1f); @@ -143,13 +149,13 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) { u32 irq_stat; - struct mxs_gpio_port *port = (struct mxs_gpio_port *)irq_get_handler_data(irq); + struct mxs_gpio_port *port = irq_get_handler_data(irq); u32 gpio_irq_no_base = port->virtual_irq_start; desc->irq_data.chip->irq_ack(&desc->irq_data); - irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) & - __raw_readl(port->base + PINCTRL_IRQEN(port->id)); + irq_stat = readl(port->base + PINCTRL_IRQSTAT(port->id)) & + readl(port->base + PINCTRL_IRQEN(port->id)); while (irq_stat != 0) { int irqoffset = fls(irq_stat) - 1; @@ -171,7 +177,7 @@ static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable) { u32 gpio = irq_to_gpio(d->irq); u32 gpio_idx = gpio & 0x1f; - struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32]; + struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d); if (enable) { if (port->irq_high && (gpio_idx >= 16)) @@ -205,9 +211,9 @@ static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset, void __iomem *pin_addr = port->base + PINCTRL_DOE(port->id); if (dir) - __mxs_setl(1 << offset, pin_addr); + writel(1 << offset, pin_addr + MXS_SET); else - __mxs_clrl(1 << offset, pin_addr); + writel(1 << offset, pin_addr + MXS_CLR); } static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset) @@ -215,7 +221,7 @@ static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset) struct mxs_gpio_port *port = container_of(chip, struct mxs_gpio_port, chip); - return (__raw_readl(port->base + PINCTRL_DIN(port->id)) >> offset) & 1; + return (readl(port->base + PINCTRL_DIN(port->id)) >> offset) & 1; } static void mxs_gpio_set(struct gpio_chip *chip, unsigned offset, int value) @@ -225,9 +231,9 @@ static void mxs_gpio_set(struct gpio_chip *chip, unsigned offset, int value) void __iomem *pin_addr = port->base + PINCTRL_DOUT(port->id); if (value) - __mxs_setl(1 << offset, pin_addr); + writel(1 << offset, pin_addr + MXS_SET); else - __mxs_clrl(1 << offset, pin_addr); + writel(1 << offset, pin_addr + MXS_CLR); } static int mxs_gpio_to_irq(struct gpio_chip *chip, unsigned offset) @@ -252,87 +258,113 @@ static int mxs_gpio_direction_output(struct gpio_chip *chip, return 0; } -int __init mxs_gpio_init(struct mxs_gpio_port *port, int cnt) +static int __devinit mxs_gpio_probe(struct platform_device *pdev) { - int i, j; + static void __iomem *base; + struct mxs_gpio_port *port; + struct resource *iores = NULL; + int err, i; + + port = kzalloc(sizeof(struct mxs_gpio_port), GFP_KERNEL); + if (!port) + return -ENOMEM; + + port->id = pdev->id; + port->virtual_irq_start = MXS_GPIO_IRQ_START + port->id * 32; + + /* + * map memory region only once, as all the gpio ports + * share the same one + */ + if (!base) { + iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!iores) { + err = -ENODEV; + goto out_kfree; + } - /* save for local usage */ - mxs_gpio_ports = port; - gpio_table_size = cnt; + if (!request_mem_region(iores->start, resource_size(iores), + pdev->name)) { + err = -EBUSY; + goto out_kfree; + } - pr_info("MXS GPIO hardware\n"); + base = ioremap(iores->start, resource_size(iores)); + if (!base) { + err = -ENOMEM; + goto out_release_mem; + } + } + port->base = base; - for (i = 0; i < cnt; i++) { - /* disable the interrupt and clear the status */ - __raw_writel(0, port[i].base + PINCTRL_PIN2IRQ(i)); - __raw_writel(0, port[i].base + PINCTRL_IRQEN(i)); + port->irq = platform_get_irq(pdev, 0); + if (port->irq < 0) { + err = -EINVAL; + goto out_iounmap; + } - /* clear address has to be used to clear IRQSTAT bits */ - __mxs_clrl(~0U, port[i].base + PINCTRL_IRQSTAT(i)); + /* disable the interrupt and clear the status */ + writel(0, port->base + PINCTRL_PIN2IRQ(port->id)); + writel(0, port->base + PINCTRL_IRQEN(port->id)); - for (j = port[i].virtual_irq_start; - j < port[i].virtual_irq_start + 32; j++) { - irq_set_chip_and_handler(j, &gpio_irq_chip, - handle_level_irq); - set_irq_flags(j, IRQF_VALID); - } + /* clear address has to be used to clear IRQSTAT bits */ + writel(~0U, port->base + PINCTRL_IRQSTAT(port->id) + MXS_CLR); - /* setup one handler for each entry */ - irq_set_chained_handler(port[i].irq, mxs_gpio_irq_handler); - irq_set_handler_data(port[i].irq, &port[i]); - - /* register gpio chip */ - port[i].chip.direction_input = mxs_gpio_direction_input; - port[i].chip.direction_output = mxs_gpio_direction_output; - port[i].chip.get = mxs_gpio_get; - port[i].chip.set = mxs_gpio_set; - port[i].chip.to_irq = mxs_gpio_to_irq; - port[i].chip.base = i * 32; - port[i].chip.ngpio = 32; - - /* its a serious configuration bug when it fails */ - BUG_ON(gpiochip_add(&port[i].chip) < 0); + for (i = port->virtual_irq_start; + i < port->virtual_irq_start + 32; i++) { + irq_set_chip_and_handler(i, &gpio_irq_chip, + handle_level_irq); + set_irq_flags(i, IRQF_VALID); + irq_set_chip_data(i, port); } - return 0; -} + /* setup one handler for each entry */ + irq_set_chained_handler(port->irq, mxs_gpio_irq_handler); + irq_set_handler_data(port->irq, port); -#define MX23_GPIO_BASE MX23_IO_ADDRESS(MX23_PINCTRL_BASE_ADDR) -#define MX28_GPIO_BASE MX28_IO_ADDRESS(MX28_PINCTRL_BASE_ADDR) + /* register gpio chip */ + port->chip.direction_input = mxs_gpio_direction_input; + port->chip.direction_output = mxs_gpio_direction_output; + port->chip.get = mxs_gpio_get; + port->chip.set = mxs_gpio_set; + port->chip.to_irq = mxs_gpio_to_irq; + port->chip.base = port->id * 32; + port->chip.ngpio = 32; -#define DEFINE_MXS_GPIO_PORT(_base, _irq, _id) \ - { \ - .chip.label = "gpio-" #_id, \ - .id = _id, \ - .irq = _irq, \ - .base = _base, \ - .virtual_irq_start = MXS_GPIO_IRQ_START + (_id) * 32, \ - } + err = gpiochip_add(&port->chip); + if (err) + goto out_iounmap; -#ifdef CONFIG_SOC_IMX23 -static struct mxs_gpio_port mx23_gpio_ports[] = { - DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO0, 0), - DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO1, 1), - DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO2, 2), -}; + return 0; -int __init mx23_register_gpios(void) -{ - return mxs_gpio_init(mx23_gpio_ports, ARRAY_SIZE(mx23_gpio_ports)); +out_iounmap: + if (iores) + iounmap(port->base); +out_release_mem: + if (iores) + release_mem_region(iores->start, resource_size(iores)); +out_kfree: + kfree(port); + dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err); + return err; } -#endif - -#ifdef CONFIG_SOC_IMX28 -static struct mxs_gpio_port mx28_gpio_ports[] = { - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO0, 0), - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO1, 1), - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO2, 2), - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO3, 3), - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO4, 4), + +static struct platform_driver mxs_gpio_driver = { + .driver = { + .name = "gpio-mxs", + .owner = THIS_MODULE, + }, + .probe = mxs_gpio_probe, }; -int __init mx28_register_gpios(void) +static int __init mxs_gpio_init(void) { - return mxs_gpio_init(mx28_gpio_ports, ARRAY_SIZE(mx28_gpio_ports)); + return platform_driver_register(&mxs_gpio_driver); } -#endif +postcore_initcall(mxs_gpio_init); + +MODULE_AUTHOR("Freescale Semiconductor, " + "Daniel Mack , " + "Juergen Beisert "); +MODULE_DESCRIPTION("Freescale MXS GPIO"); +MODULE_LICENSE("GPL"); -- cgit v1.2.3 From d37a65bb4663bde7cf3dbc51aec7f264fa4d0ebf Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 6 Jun 2011 00:07:54 +0800 Subject: gpio/mxc: Move Freescale MXC gpio driver to drivers/gpio GPIO drivers are getting moved to drivers/gpio for cleanup and consolidation. This patch moves the plat-mxc driver. Follow up patches will clean it up and make it a fine upstanding gpio driver. Signed-off-by: Shawn Guo Acked-by: Sascha Hauer Signed-off-by: Grant Likely --- arch/arm/plat-mxc/Makefile | 2 +- arch/arm/plat-mxc/gpio.c | 361 --------------------------------------------- drivers/gpio/Kconfig | 4 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-mxc.c | 361 +++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 367 insertions(+), 362 deletions(-) delete mode 100644 arch/arm/plat-mxc/gpio.c create mode 100644 drivers/gpio/gpio-mxc.c (limited to 'arch') diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index a1387875a491..d53c35fe2ea7 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile @@ -3,7 +3,7 @@ # # Common support -obj-y := clock.o gpio.o time.o devices.o cpu.o system.o irq-common.o +obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o # MX51 uses the TZIC interrupt controller, older platforms use AVIC obj-$(CONFIG_MXC_TZIC) += tzic.o diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c deleted file mode 100644 index 6cd6d7f686f6..000000000000 --- a/arch/arm/plat-mxc/gpio.c +++ /dev/null @@ -1,361 +0,0 @@ -/* - * MXC GPIO support. (c) 2008 Daniel Mack - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * - * Based on code from Freescale, - * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include - -static struct mxc_gpio_port *mxc_gpio_ports; -static int gpio_table_size; - -#define cpu_is_mx1_mx2() (cpu_is_mx1() || cpu_is_mx2()) - -#define GPIO_DR (cpu_is_mx1_mx2() ? 0x1c : 0x00) -#define GPIO_GDIR (cpu_is_mx1_mx2() ? 0x00 : 0x04) -#define GPIO_PSR (cpu_is_mx1_mx2() ? 0x24 : 0x08) -#define GPIO_ICR1 (cpu_is_mx1_mx2() ? 0x28 : 0x0C) -#define GPIO_ICR2 (cpu_is_mx1_mx2() ? 0x2C : 0x10) -#define GPIO_IMR (cpu_is_mx1_mx2() ? 0x30 : 0x14) -#define GPIO_ISR (cpu_is_mx1_mx2() ? 0x34 : 0x18) - -#define GPIO_INT_LOW_LEV (cpu_is_mx1_mx2() ? 0x3 : 0x0) -#define GPIO_INT_HIGH_LEV (cpu_is_mx1_mx2() ? 0x2 : 0x1) -#define GPIO_INT_RISE_EDGE (cpu_is_mx1_mx2() ? 0x0 : 0x2) -#define GPIO_INT_FALL_EDGE (cpu_is_mx1_mx2() ? 0x1 : 0x3) -#define GPIO_INT_NONE 0x4 - -/* Note: This driver assumes 32 GPIOs are handled in one register */ - -static void _clear_gpio_irqstatus(struct mxc_gpio_port *port, u32 index) -{ - __raw_writel(1 << index, port->base + GPIO_ISR); -} - -static void _set_gpio_irqenable(struct mxc_gpio_port *port, u32 index, - int enable) -{ - u32 l; - - l = __raw_readl(port->base + GPIO_IMR); - l = (l & (~(1 << index))) | (!!enable << index); - __raw_writel(l, port->base + GPIO_IMR); -} - -static void gpio_ack_irq(struct irq_data *d) -{ - u32 gpio = irq_to_gpio(d->irq); - _clear_gpio_irqstatus(&mxc_gpio_ports[gpio / 32], gpio & 0x1f); -} - -static void gpio_mask_irq(struct irq_data *d) -{ - u32 gpio = irq_to_gpio(d->irq); - _set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 0); -} - -static void gpio_unmask_irq(struct irq_data *d) -{ - u32 gpio = irq_to_gpio(d->irq); - _set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 1); -} - -static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset); - -static int gpio_set_irq_type(struct irq_data *d, u32 type) -{ - u32 gpio = irq_to_gpio(d->irq); - struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32]; - u32 bit, val; - int edge; - void __iomem *reg = port->base; - - port->both_edges &= ~(1 << (gpio & 31)); - switch (type) { - case IRQ_TYPE_EDGE_RISING: - edge = GPIO_INT_RISE_EDGE; - break; - case IRQ_TYPE_EDGE_FALLING: - edge = GPIO_INT_FALL_EDGE; - break; - case IRQ_TYPE_EDGE_BOTH: - val = mxc_gpio_get(&port->chip, gpio & 31); - if (val) { - edge = GPIO_INT_LOW_LEV; - pr_debug("mxc: set GPIO %d to low trigger\n", gpio); - } else { - edge = GPIO_INT_HIGH_LEV; - pr_debug("mxc: set GPIO %d to high trigger\n", gpio); - } - port->both_edges |= 1 << (gpio & 31); - break; - case IRQ_TYPE_LEVEL_LOW: - edge = GPIO_INT_LOW_LEV; - break; - case IRQ_TYPE_LEVEL_HIGH: - edge = GPIO_INT_HIGH_LEV; - break; - default: - return -EINVAL; - } - - reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ - bit = gpio & 0xf; - val = __raw_readl(reg) & ~(0x3 << (bit << 1)); - __raw_writel(val | (edge << (bit << 1)), reg); - _clear_gpio_irqstatus(port, gpio & 0x1f); - - return 0; -} - -static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) -{ - void __iomem *reg = port->base; - u32 bit, val; - int edge; - - reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ - bit = gpio & 0xf; - val = __raw_readl(reg); - edge = (val >> (bit << 1)) & 3; - val &= ~(0x3 << (bit << 1)); - if (edge == GPIO_INT_HIGH_LEV) { - edge = GPIO_INT_LOW_LEV; - pr_debug("mxc: switch GPIO %d to low trigger\n", gpio); - } else if (edge == GPIO_INT_LOW_LEV) { - edge = GPIO_INT_HIGH_LEV; - pr_debug("mxc: switch GPIO %d to high trigger\n", gpio); - } else { - pr_err("mxc: invalid configuration for GPIO %d: %x\n", - gpio, edge); - return; - } - __raw_writel(val | (edge << (bit << 1)), reg); -} - -/* handle 32 interrupts in one status register */ -static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) -{ - u32 gpio_irq_no_base = port->virtual_irq_start; - - while (irq_stat != 0) { - int irqoffset = fls(irq_stat) - 1; - - if (port->both_edges & (1 << irqoffset)) - mxc_flip_edge(port, irqoffset); - - generic_handle_irq(gpio_irq_no_base + irqoffset); - - irq_stat &= ~(1 << irqoffset); - } -} - -/* MX1 and MX3 has one interrupt *per* gpio port */ -static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) -{ - u32 irq_stat; - struct mxc_gpio_port *port = irq_get_handler_data(irq); - - irq_stat = __raw_readl(port->base + GPIO_ISR) & - __raw_readl(port->base + GPIO_IMR); - - mxc_gpio_irq_handler(port, irq_stat); -} - -/* MX2 has one interrupt *for all* gpio ports */ -static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc) -{ - int i; - u32 irq_msk, irq_stat; - struct mxc_gpio_port *port = irq_get_handler_data(irq); - - /* walk through all interrupt status registers */ - for (i = 0; i < gpio_table_size; i++) { - irq_msk = __raw_readl(port[i].base + GPIO_IMR); - if (!irq_msk) - continue; - - irq_stat = __raw_readl(port[i].base + GPIO_ISR) & irq_msk; - if (irq_stat) - mxc_gpio_irq_handler(&port[i], irq_stat); - } -} - -/* - * Set interrupt number "irq" in the GPIO as a wake-up source. - * While system is running, all registered GPIO interrupts need to have - * wake-up enabled. When system is suspended, only selected GPIO interrupts - * need to have wake-up enabled. - * @param irq interrupt source number - * @param enable enable as wake-up if equal to non-zero - * @return This function returns 0 on success. - */ -static int gpio_set_wake_irq(struct irq_data *d, u32 enable) -{ - u32 gpio = irq_to_gpio(d->irq); - u32 gpio_idx = gpio & 0x1F; - struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32]; - - if (enable) { - if (port->irq_high && (gpio_idx >= 16)) - enable_irq_wake(port->irq_high); - else - enable_irq_wake(port->irq); - } else { - if (port->irq_high && (gpio_idx >= 16)) - disable_irq_wake(port->irq_high); - else - disable_irq_wake(port->irq); - } - - return 0; -} - -static struct irq_chip gpio_irq_chip = { - .name = "GPIO", - .irq_ack = gpio_ack_irq, - .irq_mask = gpio_mask_irq, - .irq_unmask = gpio_unmask_irq, - .irq_set_type = gpio_set_irq_type, - .irq_set_wake = gpio_set_wake_irq, -}; - -static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, - int dir) -{ - struct mxc_gpio_port *port = - container_of(chip, struct mxc_gpio_port, chip); - u32 l; - unsigned long flags; - - spin_lock_irqsave(&port->lock, flags); - l = __raw_readl(port->base + GPIO_GDIR); - if (dir) - l |= 1 << offset; - else - l &= ~(1 << offset); - __raw_writel(l, port->base + GPIO_GDIR); - spin_unlock_irqrestore(&port->lock, flags); -} - -static void mxc_gpio_set(struct gpio_chip *chip, unsigned offset, int value) -{ - struct mxc_gpio_port *port = - container_of(chip, struct mxc_gpio_port, chip); - void __iomem *reg = port->base + GPIO_DR; - u32 l; - unsigned long flags; - - spin_lock_irqsave(&port->lock, flags); - l = (__raw_readl(reg) & (~(1 << offset))) | (!!value << offset); - __raw_writel(l, reg); - spin_unlock_irqrestore(&port->lock, flags); -} - -static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset) -{ - struct mxc_gpio_port *port = - container_of(chip, struct mxc_gpio_port, chip); - - return (__raw_readl(port->base + GPIO_PSR) >> offset) & 1; -} - -static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset) -{ - _set_gpio_direction(chip, offset, 0); - return 0; -} - -static int mxc_gpio_direction_output(struct gpio_chip *chip, - unsigned offset, int value) -{ - mxc_gpio_set(chip, offset, value); - _set_gpio_direction(chip, offset, 1); - return 0; -} - -/* - * This lock class tells lockdep that GPIO irqs are in a different - * category than their parents, so it won't report false recursion. - */ -static struct lock_class_key gpio_lock_class; - -int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) -{ - int i, j; - - /* save for local usage */ - mxc_gpio_ports = port; - gpio_table_size = cnt; - - printk(KERN_INFO "MXC GPIO hardware\n"); - - for (i = 0; i < cnt; i++) { - /* disable the interrupt and clear the status */ - __raw_writel(0, port[i].base + GPIO_IMR); - __raw_writel(~0, port[i].base + GPIO_ISR); - for (j = port[i].virtual_irq_start; - j < port[i].virtual_irq_start + 32; j++) { - irq_set_lockdep_class(j, &gpio_lock_class); - irq_set_chip_and_handler(j, &gpio_irq_chip, - handle_level_irq); - set_irq_flags(j, IRQF_VALID); - } - - /* register gpio chip */ - port[i].chip.direction_input = mxc_gpio_direction_input; - port[i].chip.direction_output = mxc_gpio_direction_output; - port[i].chip.get = mxc_gpio_get; - port[i].chip.set = mxc_gpio_set; - port[i].chip.base = i * 32; - port[i].chip.ngpio = 32; - - spin_lock_init(&port[i].lock); - - /* its a serious configuration bug when it fails */ - BUG_ON( gpiochip_add(&port[i].chip) < 0 ); - - if (cpu_is_mx1() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) { - /* setup one handler for each entry */ - irq_set_chained_handler(port[i].irq, - mx3_gpio_irq_handler); - irq_set_handler_data(port[i].irq, &port[i]); - if (port[i].irq_high) { - /* setup handler for GPIO 16 to 31 */ - irq_set_chained_handler(port[i].irq_high, - mx3_gpio_irq_handler); - irq_set_handler_data(port[i].irq_high, - &port[i]); - } - } - } - - if (cpu_is_mx2()) { - /* setup one handler for all GPIO interrupts */ - irq_set_chained_handler(port[0].irq, mx2_gpio_irq_handler); - irq_set_handler_data(port[0].irq, port); - } - - return 0; -} diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 48711749ffcf..1ee725aa021d 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -97,6 +97,10 @@ config GPIO_MXS def_bool y depends on ARCH_MXS +config GPIO_MXC + def_bool y + depends on ARCH_MXC + config GPIO_PLAT_SAMSUNG bool "Samsung SoCs GPIO library support" default y if SAMSUNG_GPIOLIB_4BIT diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index f879cbe493d5..9c37339a57a7 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_GPIO_ADP5588) += adp5588-gpio.o obj-$(CONFIG_GPIO_BASIC_MMIO_CORE) += basic_mmio_gpio.o obj-$(CONFIG_GPIO_BASIC_MMIO) += basic_mmio_gpio.o obj-$(CONFIG_GPIO_EXYNOS4) += gpio-exynos4.o +obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o obj-$(CONFIG_GPIO_PLAT_SAMSUNG) += gpio-plat-samsung.o obj-$(CONFIG_GPIO_S5PC100) += gpio-s5pc100.o diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c new file mode 100644 index 000000000000..6cd6d7f686f6 --- /dev/null +++ b/drivers/gpio/gpio-mxc.c @@ -0,0 +1,361 @@ +/* + * MXC GPIO support. (c) 2008 Daniel Mack + * Copyright 2008 Juergen Beisert, kernel@pengutronix.de + * + * Based on code from Freescale, + * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#include +#include +#include +#include +#include +#include +#include + +static struct mxc_gpio_port *mxc_gpio_ports; +static int gpio_table_size; + +#define cpu_is_mx1_mx2() (cpu_is_mx1() || cpu_is_mx2()) + +#define GPIO_DR (cpu_is_mx1_mx2() ? 0x1c : 0x00) +#define GPIO_GDIR (cpu_is_mx1_mx2() ? 0x00 : 0x04) +#define GPIO_PSR (cpu_is_mx1_mx2() ? 0x24 : 0x08) +#define GPIO_ICR1 (cpu_is_mx1_mx2() ? 0x28 : 0x0C) +#define GPIO_ICR2 (cpu_is_mx1_mx2() ? 0x2C : 0x10) +#define GPIO_IMR (cpu_is_mx1_mx2() ? 0x30 : 0x14) +#define GPIO_ISR (cpu_is_mx1_mx2() ? 0x34 : 0x18) + +#define GPIO_INT_LOW_LEV (cpu_is_mx1_mx2() ? 0x3 : 0x0) +#define GPIO_INT_HIGH_LEV (cpu_is_mx1_mx2() ? 0x2 : 0x1) +#define GPIO_INT_RISE_EDGE (cpu_is_mx1_mx2() ? 0x0 : 0x2) +#define GPIO_INT_FALL_EDGE (cpu_is_mx1_mx2() ? 0x1 : 0x3) +#define GPIO_INT_NONE 0x4 + +/* Note: This driver assumes 32 GPIOs are handled in one register */ + +static void _clear_gpio_irqstatus(struct mxc_gpio_port *port, u32 index) +{ + __raw_writel(1 << index, port->base + GPIO_ISR); +} + +static void _set_gpio_irqenable(struct mxc_gpio_port *port, u32 index, + int enable) +{ + u32 l; + + l = __raw_readl(port->base + GPIO_IMR); + l = (l & (~(1 << index))) | (!!enable << index); + __raw_writel(l, port->base + GPIO_IMR); +} + +static void gpio_ack_irq(struct irq_data *d) +{ + u32 gpio = irq_to_gpio(d->irq); + _clear_gpio_irqstatus(&mxc_gpio_ports[gpio / 32], gpio & 0x1f); +} + +static void gpio_mask_irq(struct irq_data *d) +{ + u32 gpio = irq_to_gpio(d->irq); + _set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 0); +} + +static void gpio_unmask_irq(struct irq_data *d) +{ + u32 gpio = irq_to_gpio(d->irq); + _set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 1); +} + +static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset); + +static int gpio_set_irq_type(struct irq_data *d, u32 type) +{ + u32 gpio = irq_to_gpio(d->irq); + struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32]; + u32 bit, val; + int edge; + void __iomem *reg = port->base; + + port->both_edges &= ~(1 << (gpio & 31)); + switch (type) { + case IRQ_TYPE_EDGE_RISING: + edge = GPIO_INT_RISE_EDGE; + break; + case IRQ_TYPE_EDGE_FALLING: + edge = GPIO_INT_FALL_EDGE; + break; + case IRQ_TYPE_EDGE_BOTH: + val = mxc_gpio_get(&port->chip, gpio & 31); + if (val) { + edge = GPIO_INT_LOW_LEV; + pr_debug("mxc: set GPIO %d to low trigger\n", gpio); + } else { + edge = GPIO_INT_HIGH_LEV; + pr_debug("mxc: set GPIO %d to high trigger\n", gpio); + } + port->both_edges |= 1 << (gpio & 31); + break; + case IRQ_TYPE_LEVEL_LOW: + edge = GPIO_INT_LOW_LEV; + break; + case IRQ_TYPE_LEVEL_HIGH: + edge = GPIO_INT_HIGH_LEV; + break; + default: + return -EINVAL; + } + + reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ + bit = gpio & 0xf; + val = __raw_readl(reg) & ~(0x3 << (bit << 1)); + __raw_writel(val | (edge << (bit << 1)), reg); + _clear_gpio_irqstatus(port, gpio & 0x1f); + + return 0; +} + +static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) +{ + void __iomem *reg = port->base; + u32 bit, val; + int edge; + + reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ + bit = gpio & 0xf; + val = __raw_readl(reg); + edge = (val >> (bit << 1)) & 3; + val &= ~(0x3 << (bit << 1)); + if (edge == GPIO_INT_HIGH_LEV) { + edge = GPIO_INT_LOW_LEV; + pr_debug("mxc: switch GPIO %d to low trigger\n", gpio); + } else if (edge == GPIO_INT_LOW_LEV) { + edge = GPIO_INT_HIGH_LEV; + pr_debug("mxc: switch GPIO %d to high trigger\n", gpio); + } else { + pr_err("mxc: invalid configuration for GPIO %d: %x\n", + gpio, edge); + return; + } + __raw_writel(val | (edge << (bit << 1)), reg); +} + +/* handle 32 interrupts in one status register */ +static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) +{ + u32 gpio_irq_no_base = port->virtual_irq_start; + + while (irq_stat != 0) { + int irqoffset = fls(irq_stat) - 1; + + if (port->both_edges & (1 << irqoffset)) + mxc_flip_edge(port, irqoffset); + + generic_handle_irq(gpio_irq_no_base + irqoffset); + + irq_stat &= ~(1 << irqoffset); + } +} + +/* MX1 and MX3 has one interrupt *per* gpio port */ +static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) +{ + u32 irq_stat; + struct mxc_gpio_port *port = irq_get_handler_data(irq); + + irq_stat = __raw_readl(port->base + GPIO_ISR) & + __raw_readl(port->base + GPIO_IMR); + + mxc_gpio_irq_handler(port, irq_stat); +} + +/* MX2 has one interrupt *for all* gpio ports */ +static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc) +{ + int i; + u32 irq_msk, irq_stat; + struct mxc_gpio_port *port = irq_get_handler_data(irq); + + /* walk through all interrupt status registers */ + for (i = 0; i < gpio_table_size; i++) { + irq_msk = __raw_readl(port[i].base + GPIO_IMR); + if (!irq_msk) + continue; + + irq_stat = __raw_readl(port[i].base + GPIO_ISR) & irq_msk; + if (irq_stat) + mxc_gpio_irq_handler(&port[i], irq_stat); + } +} + +/* + * Set interrupt number "irq" in the GPIO as a wake-up source. + * While system is running, all registered GPIO interrupts need to have + * wake-up enabled. When system is suspended, only selected GPIO interrupts + * need to have wake-up enabled. + * @param irq interrupt source number + * @param enable enable as wake-up if equal to non-zero + * @return This function returns 0 on success. + */ +static int gpio_set_wake_irq(struct irq_data *d, u32 enable) +{ + u32 gpio = irq_to_gpio(d->irq); + u32 gpio_idx = gpio & 0x1F; + struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32]; + + if (enable) { + if (port->irq_high && (gpio_idx >= 16)) + enable_irq_wake(port->irq_high); + else + enable_irq_wake(port->irq); + } else { + if (port->irq_high && (gpio_idx >= 16)) + disable_irq_wake(port->irq_high); + else + disable_irq_wake(port->irq); + } + + return 0; +} + +static struct irq_chip gpio_irq_chip = { + .name = "GPIO", + .irq_ack = gpio_ack_irq, + .irq_mask = gpio_mask_irq, + .irq_unmask = gpio_unmask_irq, + .irq_set_type = gpio_set_irq_type, + .irq_set_wake = gpio_set_wake_irq, +}; + +static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, + int dir) +{ + struct mxc_gpio_port *port = + container_of(chip, struct mxc_gpio_port, chip); + u32 l; + unsigned long flags; + + spin_lock_irqsave(&port->lock, flags); + l = __raw_readl(port->base + GPIO_GDIR); + if (dir) + l |= 1 << offset; + else + l &= ~(1 << offset); + __raw_writel(l, port->base + GPIO_GDIR); + spin_unlock_irqrestore(&port->lock, flags); +} + +static void mxc_gpio_set(struct gpio_chip *chip, unsigned offset, int value) +{ + struct mxc_gpio_port *port = + container_of(chip, struct mxc_gpio_port, chip); + void __iomem *reg = port->base + GPIO_DR; + u32 l; + unsigned long flags; + + spin_lock_irqsave(&port->lock, flags); + l = (__raw_readl(reg) & (~(1 << offset))) | (!!value << offset); + __raw_writel(l, reg); + spin_unlock_irqrestore(&port->lock, flags); +} + +static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset) +{ + struct mxc_gpio_port *port = + container_of(chip, struct mxc_gpio_port, chip); + + return (__raw_readl(port->base + GPIO_PSR) >> offset) & 1; +} + +static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset) +{ + _set_gpio_direction(chip, offset, 0); + return 0; +} + +static int mxc_gpio_direction_output(struct gpio_chip *chip, + unsigned offset, int value) +{ + mxc_gpio_set(chip, offset, value); + _set_gpio_direction(chip, offset, 1); + return 0; +} + +/* + * This lock class tells lockdep that GPIO irqs are in a different + * category than their parents, so it won't report false recursion. + */ +static struct lock_class_key gpio_lock_class; + +int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) +{ + int i, j; + + /* save for local usage */ + mxc_gpio_ports = port; + gpio_table_size = cnt; + + printk(KERN_INFO "MXC GPIO hardware\n"); + + for (i = 0; i < cnt; i++) { + /* disable the interrupt and clear the status */ + __raw_writel(0, port[i].base + GPIO_IMR); + __raw_writel(~0, port[i].base + GPIO_ISR); + for (j = port[i].virtual_irq_start; + j < port[i].virtual_irq_start + 32; j++) { + irq_set_lockdep_class(j, &gpio_lock_class); + irq_set_chip_and_handler(j, &gpio_irq_chip, + handle_level_irq); + set_irq_flags(j, IRQF_VALID); + } + + /* register gpio chip */ + port[i].chip.direction_input = mxc_gpio_direction_input; + port[i].chip.direction_output = mxc_gpio_direction_output; + port[i].chip.get = mxc_gpio_get; + port[i].chip.set = mxc_gpio_set; + port[i].chip.base = i * 32; + port[i].chip.ngpio = 32; + + spin_lock_init(&port[i].lock); + + /* its a serious configuration bug when it fails */ + BUG_ON( gpiochip_add(&port[i].chip) < 0 ); + + if (cpu_is_mx1() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) { + /* setup one handler for each entry */ + irq_set_chained_handler(port[i].irq, + mx3_gpio_irq_handler); + irq_set_handler_data(port[i].irq, &port[i]); + if (port[i].irq_high) { + /* setup handler for GPIO 16 to 31 */ + irq_set_chained_handler(port[i].irq_high, + mx3_gpio_irq_handler); + irq_set_handler_data(port[i].irq_high, + &port[i]); + } + } + } + + if (cpu_is_mx2()) { + /* setup one handler for all GPIO interrupts */ + irq_set_chained_handler(port[0].irq, mx2_gpio_irq_handler); + irq_set_handler_data(port[0].irq, port); + } + + return 0; +} -- cgit v1.2.3 From b78d8e59a6f611e229fab8ec3014c58eba975000 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 6 Jun 2011 00:07:55 +0800 Subject: gpio/mxc: Change gpio-mxc into an upstanding gpio driver The patch makes necessary changes on gpio-mxc as below to turn it into an upstanding gpio driver. * Add a list to save all mx2 ports references, so that mx2_gpio_irq_handler can walk through all interrupt status registers * Use readl/writel to replace mach-specific accessors __raw_readl/__raw_writel * Change mxc_gpio_init into mxc_gpio_probe function * Move "struct mxc_gpio_port" into gpio-mxc.c, as it needs not to be public at all, and also make some other cleanup on plat-mxc/include/mach/gpio.h at the same time And the patch then migrates mach-imx and mach-mx5 to the updated driver by adding corresponding platform devices. Signed-off-by: Shawn Guo Acked-by: Olof Johansson Acked-by: Sascha Hauer Signed-off-by: Grant Likely --- arch/arm/mach-imx/mach-apf9328.c | 2 + arch/arm/mach-imx/mach-armadillo5x0.c | 2 + arch/arm/mach-imx/mach-bug.c | 2 + arch/arm/mach-imx/mach-cpuimx27.c | 2 + arch/arm/mach-imx/mach-cpuimx35.c | 2 + arch/arm/mach-imx/mach-eukrea_cpuimx25.c | 2 + arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 2 + arch/arm/mach-imx/mach-imx27ipcam.c | 2 + arch/arm/mach-imx/mach-imx27lite.c | 2 + arch/arm/mach-imx/mach-kzm_arm11_01.c | 2 + arch/arm/mach-imx/mach-mx1ads.c | 2 + arch/arm/mach-imx/mach-mx21ads.c | 2 + arch/arm/mach-imx/mach-mx25_3ds.c | 2 + arch/arm/mach-imx/mach-mx27_3ds.c | 2 + arch/arm/mach-imx/mach-mx27ads.c | 2 + arch/arm/mach-imx/mach-mx31_3ds.c | 2 + arch/arm/mach-imx/mach-mx31ads.c | 2 + arch/arm/mach-imx/mach-mx31lilly.c | 2 + arch/arm/mach-imx/mach-mx31lite.c | 2 + arch/arm/mach-imx/mach-mx31moboard.c | 2 + arch/arm/mach-imx/mach-mx35_3ds.c | 2 + arch/arm/mach-imx/mach-mxt_td60.c | 2 + arch/arm/mach-imx/mach-pca100.c | 2 + arch/arm/mach-imx/mach-pcm037.c | 2 + arch/arm/mach-imx/mach-pcm038.c | 2 + arch/arm/mach-imx/mach-pcm043.c | 2 + arch/arm/mach-imx/mach-qong.c | 2 + arch/arm/mach-imx/mach-scb9328.c | 2 + arch/arm/mach-imx/mach-vpr200.c | 2 + arch/arm/mach-imx/mm-imx1.c | 17 +- arch/arm/mach-imx/mm-imx21.c | 21 ++- arch/arm/mach-imx/mm-imx25.c | 16 +- arch/arm/mach-imx/mm-imx27.c | 21 ++- arch/arm/mach-imx/mm-imx31.c | 15 +- arch/arm/mach-imx/mm-imx35.c | 15 +- arch/arm/mach-mx5/board-cpuimx51.c | 2 + arch/arm/mach-mx5/board-cpuimx51sd.c | 2 + arch/arm/mach-mx5/board-mx50_rdp.c | 2 + arch/arm/mach-mx5/board-mx51_3ds.c | 2 + arch/arm/mach-mx5/board-mx51_babbage.c | 2 + arch/arm/mach-mx5/board-mx51_efikamx.c | 2 + arch/arm/mach-mx5/board-mx51_efikasb.c | 2 + arch/arm/mach-mx5/board-mx53_evk.c | 2 + arch/arm/mach-mx5/board-mx53_loco.c | 2 + arch/arm/mach-mx5/board-mx53_smd.c | 2 + arch/arm/mach-mx5/devices.c | 64 ------- arch/arm/mach-mx5/mm-mx50.c | 21 ++- arch/arm/mach-mx5/mm.c | 25 ++- arch/arm/plat-mxc/devices.c | 11 ++ arch/arm/plat-mxc/devices/Makefile | 1 + arch/arm/plat-mxc/devices/platform-gpio-mxc.c | 32 ++++ arch/arm/plat-mxc/include/mach/common.h | 12 +- arch/arm/plat-mxc/include/mach/devices-common.h | 2 + arch/arm/plat-mxc/include/mach/gpio.h | 27 --- drivers/gpio/gpio-mxc.c | 217 ++++++++++++++++-------- 55 files changed, 358 insertions(+), 237 deletions(-) create mode 100644 arch/arm/plat-mxc/devices/platform-gpio-mxc.c (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c index 15e45c84e371..59d2a3b137d9 100644 --- a/arch/arm/mach-imx/mach-apf9328.c +++ b/arch/arm/mach-imx/mach-apf9328.c @@ -115,6 +115,8 @@ static struct platform_device *devices[] __initdata = { static void __init apf9328_init(void) { + imx1_soc_init(); + mxc_gpio_setup_multiple_pins(apf9328_pins, ARRAY_SIZE(apf9328_pins), "APF9328"); diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c index ffb40ff619b1..ede2710f8b76 100644 --- a/arch/arm/mach-imx/mach-armadillo5x0.c +++ b/arch/arm/mach-imx/mach-armadillo5x0.c @@ -490,6 +490,8 @@ static struct platform_device *devices[] __initdata = { */ static void __init armadillo5x0_init(void) { + imx31_soc_init(); + mxc_iomux_setup_multiple_pins(armadillo5x0_pins, ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0"); diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c index 42e4f078a19c..f49470553bdf 100644 --- a/arch/arm/mach-imx/mach-bug.c +++ b/arch/arm/mach-imx/mach-bug.c @@ -42,6 +42,8 @@ static const unsigned int bug_pins[] __initconst = { static void __init bug_board_init(void) { + imx31_soc_init(); + mxc_iomux_setup_multiple_pins(bug_pins, ARRAY_SIZE(bug_pins), "uart-4"); imx31_add_imx_uart4(&uart_pdata); diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index 46a2e41d43d2..87887ac5806b 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c @@ -250,6 +250,8 @@ __setup("otg_mode=", eukrea_cpuimx27_otg_mode); static void __init eukrea_cpuimx27_init(void) { + imx27_soc_init(); + mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins, ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27"); diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c index 3f8ef825fa6f..f39a478ba1a6 100644 --- a/arch/arm/mach-imx/mach-cpuimx35.c +++ b/arch/arm/mach-imx/mach-cpuimx35.c @@ -156,6 +156,8 @@ __setup("otg_mode=", eukrea_cpuimx35_otg_mode); */ static void __init eukrea_cpuimx35_init(void) { + imx35_soc_init(); + mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx35_pads, ARRAY_SIZE(eukrea_cpuimx35_pads)); diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c index 148cff2819b9..da36da52969d 100644 --- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c +++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c @@ -125,6 +125,8 @@ __setup("otg_mode=", eukrea_cpuimx25_otg_mode); static void __init eukrea_cpuimx25_init(void) { + imx25_soc_init(); + if (mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx25_pads, ARRAY_SIZE(eukrea_cpuimx25_pads))) printk(KERN_ERR "error setting cpuimx25 pads !\n"); diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 7ae43b1ec517..c6269d60ddbc 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -231,6 +231,8 @@ static void __init visstrim_m10_board_init(void) { int ret; + imx27_soc_init(); + ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins, ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10"); if (ret) diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c index 9be6cd6fbf8c..272f793e9247 100644 --- a/arch/arm/mach-imx/mach-imx27ipcam.c +++ b/arch/arm/mach-imx/mach-imx27ipcam.c @@ -50,6 +50,8 @@ static const int mx27ipcam_pins[] __initconst = { static void __init mx27ipcam_init(void) { + imx27_soc_init(); + mxc_gpio_setup_multiple_pins(mx27ipcam_pins, ARRAY_SIZE(mx27ipcam_pins), "mx27ipcam"); diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c index 841140516ede..d81a769fe895 100644 --- a/arch/arm/mach-imx/mach-imx27lite.c +++ b/arch/arm/mach-imx/mach-imx27lite.c @@ -59,6 +59,8 @@ static const struct imxuart_platform_data uart_pdata __initconst = { static void __init mx27lite_init(void) { + imx27_soc_init(); + mxc_gpio_setup_multiple_pins(mx27lite_pins, ARRAY_SIZE(mx27lite_pins), "imx27lite"); imx27_add_imx_uart0(&uart_pdata); diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c index 1ecae20cf4e3..e472a1d88058 100644 --- a/arch/arm/mach-imx/mach-kzm_arm11_01.c +++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c @@ -223,6 +223,8 @@ static int kzm_pins[] __initdata = { */ static void __init kzm_board_init(void) { + imx31_soc_init(); + mxc_iomux_setup_multiple_pins(kzm_pins, ARRAY_SIZE(kzm_pins), "kzm"); kzm_init_ext_uart(); diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c index 38ec5cbbda9b..5cd8bee46960 100644 --- a/arch/arm/mach-imx/mach-mx1ads.c +++ b/arch/arm/mach-imx/mach-mx1ads.c @@ -115,6 +115,8 @@ static struct i2c_board_info mx1ads_i2c_devices[] = { */ static void __init mx1ads_init(void) { + imx1_soc_init(); + mxc_gpio_setup_multiple_pins(mx1ads_pins, ARRAY_SIZE(mx1ads_pins), "mx1ads"); diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c index 74ac88978ddd..d389ecf9b5a8 100644 --- a/arch/arm/mach-imx/mach-mx21ads.c +++ b/arch/arm/mach-imx/mach-mx21ads.c @@ -279,6 +279,8 @@ static struct platform_device *platform_devices[] __initdata = { static void __init mx21ads_board_init(void) { + imx21_soc_init(); + mxc_gpio_setup_multiple_pins(mx21ads_pins, ARRAY_SIZE(mx21ads_pins), "mx21ads"); diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c index 58ea3fdf0911..01534bb61305 100644 --- a/arch/arm/mach-imx/mach-mx25_3ds.c +++ b/arch/arm/mach-imx/mach-mx25_3ds.c @@ -219,6 +219,8 @@ static const struct esdhc_platform_data mx25pdk_esdhc_pdata __initconst = { static void __init mx25pdk_init(void) { + imx25_soc_init(); + mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads, ARRAY_SIZE(mx25pdk_pads)); diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 6e1accf93f81..117ce0a50f4e 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -267,6 +267,8 @@ static const struct imxi2c_platform_data mx27_3ds_i2c0_data __initconst = { static void __init mx27pdk_init(void) { + imx27_soc_init(); + mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins), "mx27pdk"); mx27_3ds_sdhc1_enable_level_translator(); diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index 1db79506f5e4..fc26ed71b9ed 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c @@ -288,6 +288,8 @@ static const struct imxuart_platform_data uart_pdata __initconst = { static void __init mx27ads_board_init(void) { + imx27_soc_init(); + mxc_gpio_setup_multiple_pins(mx27ads_pins, ARRAY_SIZE(mx27ads_pins), "mx27ads"); diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 9b982449cb52..ab2a6268b50b 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c @@ -689,6 +689,8 @@ static void __init mx31_3ds_init(void) { int ret; + imx31_soc_init(); + mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins), "mx31_3ds"); diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c index f4dee0254634..0ce49478a479 100644 --- a/arch/arm/mach-imx/mach-mx31ads.c +++ b/arch/arm/mach-imx/mach-mx31ads.c @@ -516,6 +516,8 @@ static void __init mx31ads_init_irq(void) static void __init mx31ads_init(void) { + imx31_soc_init(); + mxc_init_extuart(); mxc_init_imx_uart(); mxc_init_i2c(); diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c index 410e676ae087..750368ddf0f9 100644 --- a/arch/arm/mach-imx/mach-mx31lilly.c +++ b/arch/arm/mach-imx/mach-mx31lilly.c @@ -243,6 +243,8 @@ core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444); static void __init mx31lilly_board_init(void) { + imx31_soc_init(); + switch (mx31lilly_baseboard) { case MX31LILLY_NOBOARD: break; diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c index ac9b4cad320e..4b47fd9fdd89 100644 --- a/arch/arm/mach-imx/mach-mx31lite.c +++ b/arch/arm/mach-imx/mach-mx31lite.c @@ -230,6 +230,8 @@ static void __init mx31lite_init(void) { int ret; + imx31_soc_init(); + switch (mx31lite_baseboard) { case MX31LITE_NOBOARD: break; diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index eaa51e49ca95..a52fd36e2b52 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c @@ -507,6 +507,8 @@ core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); */ static void __init mx31moboard_init(void) { + imx31_soc_init(); + mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins), "moboard"); diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c index 882880ac1bbc..48b3c6fd5cf0 100644 --- a/arch/arm/mach-imx/mach-mx35_3ds.c +++ b/arch/arm/mach-imx/mach-mx35_3ds.c @@ -179,6 +179,8 @@ static const struct imxi2c_platform_data mx35_3ds_i2c0_data __initconst = { */ static void __init mx35_3ds_init(void) { + imx35_soc_init(); + mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads)); imx35_add_fec(NULL); diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c index 2774541511e7..c85876fed663 100644 --- a/arch/arm/mach-imx/mach-mxt_td60.c +++ b/arch/arm/mach-imx/mach-mxt_td60.c @@ -233,6 +233,8 @@ static const struct imxuart_platform_data uart_pdata __initconst = { static void __init mxt_td60_board_init(void) { + imx27_soc_init(); + mxc_gpio_setup_multiple_pins(mxt_td60_pins, ARRAY_SIZE(mxt_td60_pins), "MXT_TD60"); diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index bbddc5a11c43..71083aa16038 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -357,6 +357,8 @@ static void __init pca100_init(void) { int ret; + imx27_soc_init(); + /* SSI unit */ mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0, MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */ diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c index 89c213b81295..f45b7cd72c8a 100644 --- a/arch/arm/mach-imx/mach-pcm037.c +++ b/arch/arm/mach-imx/mach-pcm037.c @@ -576,6 +576,8 @@ static void __init pcm037_init(void) { int ret; + imx31_soc_init(); + mxc_iomux_set_gpr(MUX_PGP_UH2, 1); mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins), diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index 853bb871c7ed..2d6a64bbac44 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c @@ -295,6 +295,8 @@ static const struct mxc_usbh_platform_data usbh2_pdata __initconst = { static void __init pcm038_init(void) { + imx27_soc_init(); + mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins), "PCM038"); diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c index 026441628dfa..163cc318cafb 100644 --- a/arch/arm/mach-imx/mach-pcm043.c +++ b/arch/arm/mach-imx/mach-pcm043.c @@ -356,6 +356,8 @@ static struct esdhc_platform_data sd1_pdata = { */ static void __init pcm043_init(void) { + imx35_soc_init(); + mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads)); mxc_audmux_v2_configure_port(3, diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c index c16328715939..3626f486498a 100644 --- a/arch/arm/mach-imx/mach-qong.c +++ b/arch/arm/mach-imx/mach-qong.c @@ -244,6 +244,8 @@ static void __init qong_init_fpga(void) */ static void __init qong_init(void) { + imx31_soc_init(); + mxc_init_imx_uart(); qong_init_nor_mtd(); qong_init_fpga(); diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c index dcaee043628e..82805260e19c 100644 --- a/arch/arm/mach-imx/mach-scb9328.c +++ b/arch/arm/mach-imx/mach-scb9328.c @@ -129,6 +129,8 @@ static struct platform_device *devices[] __initdata = { */ static void __init scb9328_init(void) { + imx1_soc_init(); + imx1_add_imx_uart0(&uart_pdata); printk(KERN_INFO"Scb9328: Adding devices\n"); diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c index d74e3473d236..7d8e012a6335 100644 --- a/arch/arm/mach-imx/mach-vpr200.c +++ b/arch/arm/mach-imx/mach-vpr200.c @@ -267,6 +267,8 @@ static struct platform_device *devices[] __initdata = { */ static void __init vpr200_board_init(void) { + imx35_soc_init(); + mxc_iomux_v3_setup_multiple_pads(vpr200_pads, ARRAY_SIZE(vpr200_pads)); imx35_add_fec(NULL); diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c index 2e482ba5a0e7..b486595701b7 100644 --- a/arch/arm/mach-imx/mm-imx1.c +++ b/arch/arm/mach-imx/mm-imx1.c @@ -23,7 +23,6 @@ #include #include -#include #include #include @@ -44,15 +43,15 @@ void __init imx1_init_early(void) MX1_NUM_GPIO_PORT); } -static struct mxc_gpio_port imx1_gpio_ports[] = { - DEFINE_IMX_GPIO_PORT_IRQ(MX1, 0, 1, MX1_GPIO_INT_PORTA), - DEFINE_IMX_GPIO_PORT_IRQ(MX1, 1, 2, MX1_GPIO_INT_PORTB), - DEFINE_IMX_GPIO_PORT_IRQ(MX1, 2, 3, MX1_GPIO_INT_PORTC), - DEFINE_IMX_GPIO_PORT_IRQ(MX1, 3, 4, MX1_GPIO_INT_PORTD), -}; - void __init mx1_init_irq(void) { mxc_init_irq(MX1_IO_ADDRESS(MX1_AVIC_BASE_ADDR)); - mxc_gpio_init(imx1_gpio_ports, ARRAY_SIZE(imx1_gpio_ports)); +} + +void __init imx1_soc_init(void) +{ + mxc_register_gpio(0, MX1_GPIO1_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTA, 0); + mxc_register_gpio(1, MX1_GPIO2_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTB, 0); + mxc_register_gpio(2, MX1_GPIO3_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTC, 0); + mxc_register_gpio(3, MX1_GPIO4_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTD, 0); } diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index 7a0c500ac2c8..f0fb8bcce6f9 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include @@ -70,17 +69,17 @@ void __init imx21_init_early(void) MX21_NUM_GPIO_PORT); } -static struct mxc_gpio_port imx21_gpio_ports[] = { - DEFINE_IMX_GPIO_PORT_IRQ(MX21, 0, 1, MX21_INT_GPIO), - DEFINE_IMX_GPIO_PORT(MX21, 1, 2), - DEFINE_IMX_GPIO_PORT(MX21, 2, 3), - DEFINE_IMX_GPIO_PORT(MX21, 3, 4), - DEFINE_IMX_GPIO_PORT(MX21, 4, 5), - DEFINE_IMX_GPIO_PORT(MX21, 5, 6), -}; - void __init mx21_init_irq(void) { mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR)); - mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports)); +} + +void __init imx21_soc_init(void) +{ + mxc_register_gpio(0, MX21_GPIO1_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); + mxc_register_gpio(1, MX21_GPIO2_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); + mxc_register_gpio(2, MX21_GPIO3_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); + mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); + mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); + mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); } diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index 02f7b5c7fa8e..1b6d583f750a 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c @@ -27,7 +27,6 @@ #include #include #include -#include #include /* @@ -57,16 +56,15 @@ void __init imx25_init_early(void) mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR)); } -static struct mxc_gpio_port imx25_gpio_ports[] = { - DEFINE_IMX_GPIO_PORT_IRQ(MX25, 0, 1, MX25_INT_GPIO1), - DEFINE_IMX_GPIO_PORT_IRQ(MX25, 1, 2, MX25_INT_GPIO2), - DEFINE_IMX_GPIO_PORT_IRQ(MX25, 2, 3, MX25_INT_GPIO3), - DEFINE_IMX_GPIO_PORT_IRQ(MX25, 3, 4, MX25_INT_GPIO4), -}; - void __init mx25_init_irq(void) { mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR)); - mxc_gpio_init(imx25_gpio_ports, ARRAY_SIZE(imx25_gpio_ports)); } +void __init imx25_soc_init(void) +{ + mxc_register_gpio(0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); + mxc_register_gpio(1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); + mxc_register_gpio(2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); + mxc_register_gpio(3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); +} diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index a6761a39f08c..d3700cec8ec5 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include @@ -70,17 +69,17 @@ void __init imx27_init_early(void) MX27_NUM_GPIO_PORT); } -static struct mxc_gpio_port imx27_gpio_ports[] = { - DEFINE_IMX_GPIO_PORT_IRQ(MX27, 0, 1, MX27_INT_GPIO), - DEFINE_IMX_GPIO_PORT(MX27, 1, 2), - DEFINE_IMX_GPIO_PORT(MX27, 2, 3), - DEFINE_IMX_GPIO_PORT(MX27, 3, 4), - DEFINE_IMX_GPIO_PORT(MX27, 4, 5), - DEFINE_IMX_GPIO_PORT(MX27, 5, 6), -}; - void __init mx27_init_irq(void) { mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR)); - mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports)); +} + +void __init imx27_soc_init(void) +{ + mxc_register_gpio(0, MX27_GPIO1_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); + mxc_register_gpio(1, MX27_GPIO2_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); + mxc_register_gpio(2, MX27_GPIO3_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); + mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); + mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); + mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); } diff --git a/arch/arm/mach-imx/mm-imx31.c b/arch/arm/mach-imx/mm-imx31.c index 86b9b45864d2..cb16ac661776 100644 --- a/arch/arm/mach-imx/mm-imx31.c +++ b/arch/arm/mach-imx/mm-imx31.c @@ -26,7 +26,6 @@ #include #include #include -#include #include static struct map_desc mx31_io_desc[] __initdata = { @@ -53,14 +52,14 @@ void __init imx31_init_early(void) mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); } -static struct mxc_gpio_port imx31_gpio_ports[] = { - DEFINE_IMX_GPIO_PORT_IRQ(MX31, 0, 1, MX31_INT_GPIO1), - DEFINE_IMX_GPIO_PORT_IRQ(MX31, 1, 2, MX31_INT_GPIO2), - DEFINE_IMX_GPIO_PORT_IRQ(MX31, 2, 3, MX31_INT_GPIO3), -}; - void __init mx31_init_irq(void) { mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); - mxc_gpio_init(imx31_gpio_ports, ARRAY_SIZE(imx31_gpio_ports)); +} + +void __init imx31_soc_init(void) +{ + mxc_register_gpio(0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); + mxc_register_gpio(1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); + mxc_register_gpio(2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); } diff --git a/arch/arm/mach-imx/mm-imx35.c b/arch/arm/mach-imx/mm-imx35.c index c880e6d1ae55..648bfca0163e 100644 --- a/arch/arm/mach-imx/mm-imx35.c +++ b/arch/arm/mach-imx/mm-imx35.c @@ -27,7 +27,6 @@ #include #include #include -#include #include static struct map_desc mx35_io_desc[] __initdata = { @@ -50,14 +49,14 @@ void __init imx35_init_early(void) mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); } -static struct mxc_gpio_port imx35_gpio_ports[] = { - DEFINE_IMX_GPIO_PORT_IRQ(MX35, 0, 1, MX35_INT_GPIO1), - DEFINE_IMX_GPIO_PORT_IRQ(MX35, 1, 2, MX35_INT_GPIO2), - DEFINE_IMX_GPIO_PORT_IRQ(MX35, 2, 3, MX35_INT_GPIO3), -}; - void __init mx35_init_irq(void) { mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); - mxc_gpio_init(imx35_gpio_ports, ARRAY_SIZE(imx35_gpio_ports)); +} + +void __init imx35_soc_init(void) +{ + mxc_register_gpio(0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); + mxc_register_gpio(1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); + mxc_register_gpio(2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); } diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c index 4efa02ee1639..add0d42de7af 100644 --- a/arch/arm/mach-mx5/board-cpuimx51.c +++ b/arch/arm/mach-mx5/board-cpuimx51.c @@ -245,6 +245,8 @@ __setup("otg_mode=", eukrea_cpuimx51_otg_mode); */ static void __init eukrea_cpuimx51_init(void) { + imx51_soc_init(); + mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51_pads, ARRAY_SIZE(eukrea_cpuimx51_pads)); diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c index 5ef25a596143..ff096d587299 100644 --- a/arch/arm/mach-mx5/board-cpuimx51sd.c +++ b/arch/arm/mach-mx5/board-cpuimx51sd.c @@ -264,6 +264,8 @@ static struct platform_device *platform_devices[] __initdata = { static void __init eukrea_cpuimx51sd_init(void) { + imx51_soc_init(); + mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51sd_pads, ARRAY_SIZE(eukrea_cpuimx51sd_pads)); diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c index 11210e1ae42a..7de25c6712eb 100644 --- a/arch/arm/mach-mx5/board-mx50_rdp.c +++ b/arch/arm/mach-mx5/board-mx50_rdp.c @@ -192,6 +192,8 @@ static const struct imxi2c_platform_data i2c_data __initconst = { */ static void __init mx50_rdp_board_init(void) { + imx50_soc_init(); + mxc_iomux_v3_setup_multiple_pads(mx50_rdp_pads, ARRAY_SIZE(mx50_rdp_pads)); diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c index 63dfbeafbc1e..3112d15feebc 100644 --- a/arch/arm/mach-mx5/board-mx51_3ds.c +++ b/arch/arm/mach-mx5/board-mx51_3ds.c @@ -135,6 +135,8 @@ static struct spi_board_info mx51_3ds_spi_nor_device[] = { */ static void __init mx51_3ds_init(void) { + imx51_soc_init(); + mxc_iomux_v3_setup_multiple_pads(mx51_3ds_pads, ARRAY_SIZE(mx51_3ds_pads)); diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index c7b3fabf50f9..6021dd00ec75 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -340,6 +340,8 @@ static void __init mx51_babbage_init(void) iomux_v3_cfg_t power_key = _MX51_PAD_EIM_A27__GPIO2_21 | MUX_PAD_CTRL(PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP); + imx51_soc_init(); + #if defined(CONFIG_CPU_FREQ_IMX) get_cpu_op = mx51_get_cpu_op; #endif diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c index 6e362315291b..3be603b9075a 100644 --- a/arch/arm/mach-mx5/board-mx51_efikamx.c +++ b/arch/arm/mach-mx5/board-mx51_efikamx.c @@ -236,6 +236,8 @@ late_initcall(mx51_efikamx_power_init); static void __init mx51_efikamx_init(void) { + imx51_soc_init(); + mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads, ARRAY_SIZE(mx51efikamx_pads)); efika_board_common_init(); diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c index 474fc6e4c6df..4b2e522de0f8 100644 --- a/arch/arm/mach-mx5/board-mx51_efikasb.c +++ b/arch/arm/mach-mx5/board-mx51_efikasb.c @@ -248,6 +248,8 @@ static void __init mx51_efikasb_board_id(void) static void __init efikasb_board_init(void) { + imx51_soc_init(); + mxc_iomux_v3_setup_multiple_pads(mx51efikasb_pads, ARRAY_SIZE(mx51efikasb_pads)); efika_board_common_init(); diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c index f87d571882c6..0d9218a6e2d2 100644 --- a/arch/arm/mach-mx5/board-mx53_evk.c +++ b/arch/arm/mach-mx5/board-mx53_evk.c @@ -117,6 +117,8 @@ static const struct spi_imx_master mx53_evk_spi_data __initconst = { static void __init mx53_evk_board_init(void) { + imx53_soc_init(); + mxc_iomux_v3_setup_multiple_pads(mx53_evk_pads, ARRAY_SIZE(mx53_evk_pads)); mx53_evk_init_uart(); diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c index 1b947e8c9c0c..359c3e248add 100644 --- a/arch/arm/mach-mx5/board-mx53_loco.c +++ b/arch/arm/mach-mx5/board-mx53_loco.c @@ -227,6 +227,8 @@ static const struct imxi2c_platform_data mx53_loco_i2c_data __initconst = { static void __init mx53_loco_board_init(void) { + imx53_soc_init(); + mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads, ARRAY_SIZE(mx53_loco_pads)); imx53_add_imx_uart(0, NULL); diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c index 817c08938f55..bc02894eafef 100644 --- a/arch/arm/mach-mx5/board-mx53_smd.c +++ b/arch/arm/mach-mx5/board-mx53_smd.c @@ -113,6 +113,8 @@ static const struct imxi2c_platform_data mx53_smd_i2c_data __initconst = { static void __init mx53_smd_board_init(void) { + imx53_soc_init(); + mxc_iomux_v3_setup_multiple_pads(mx53_smd_pads, ARRAY_SIZE(mx53_smd_pads)); mx53_smd_init_uart(); diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c index 153ada53e575..371ca8c8414c 100644 --- a/arch/arm/mach-mx5/devices.c +++ b/arch/arm/mach-mx5/devices.c @@ -12,7 +12,6 @@ #include #include -#include #include #include #include @@ -119,66 +118,3 @@ struct platform_device mxc_usbh2_device = { .coherent_dma_mask = DMA_BIT_MASK(32), }, }; - -static struct mxc_gpio_port mxc_gpio_ports[] = { - { - .chip.label = "gpio-0", - .base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR), - .irq = MX51_MXC_INT_GPIO1_LOW, - .irq_high = MX51_MXC_INT_GPIO1_HIGH, - .virtual_irq_start = MXC_GPIO_IRQ_START - }, - { - .chip.label = "gpio-1", - .base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR), - .irq = MX51_MXC_INT_GPIO2_LOW, - .irq_high = MX51_MXC_INT_GPIO2_HIGH, - .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1 - }, - { - .chip.label = "gpio-2", - .base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR), - .irq = MX51_MXC_INT_GPIO3_LOW, - .irq_high = MX51_MXC_INT_GPIO3_HIGH, - .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2 - }, - { - .chip.label = "gpio-3", - .base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR), - .irq = MX51_MXC_INT_GPIO4_LOW, - .irq_high = MX51_MXC_INT_GPIO4_HIGH, - .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3 - }, - { - .chip.label = "gpio-4", - .base = MX53_IO_ADDRESS(MX53_GPIO5_BASE_ADDR), - .irq = MX53_INT_GPIO5_LOW, - .irq_high = MX53_INT_GPIO5_HIGH, - .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 4 - }, - { - .chip.label = "gpio-5", - .base = MX53_IO_ADDRESS(MX53_GPIO6_BASE_ADDR), - .irq = MX53_INT_GPIO6_LOW, - .irq_high = MX53_INT_GPIO6_HIGH, - .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 5 - }, - { - .chip.label = "gpio-6", - .base = MX53_IO_ADDRESS(MX53_GPIO7_BASE_ADDR), - .irq = MX53_INT_GPIO7_LOW, - .irq_high = MX53_INT_GPIO7_HIGH, - .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 6 - }, -}; - -int __init imx51_register_gpios(void) -{ - return mxc_gpio_init(mxc_gpio_ports, 4); -} - -int __init imx53_register_gpios(void) -{ - return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports)); -} - diff --git a/arch/arm/mach-mx5/mm-mx50.c b/arch/arm/mach-mx5/mm-mx50.c index b9c363b514a9..28c3f60f734f 100644 --- a/arch/arm/mach-mx5/mm-mx50.c +++ b/arch/arm/mach-mx5/mm-mx50.c @@ -26,7 +26,6 @@ #include #include #include -#include #include /* @@ -56,17 +55,17 @@ void __init imx50_init_early(void) mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR)); } -static struct mxc_gpio_port imx50_gpio_ports[] = { - DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 0, 1, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH), - DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 1, 2, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH), - DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 2, 3, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), - DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 3, 4, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), - DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 4, 5, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), - DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 5, 6, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), -}; - void __init mx50_init_irq(void) { tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR)); - mxc_gpio_init(imx50_gpio_ports, ARRAY_SIZE(imx50_gpio_ports)); +} + +void __init imx50_soc_init(void) +{ + mxc_register_gpio(0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); + mxc_register_gpio(1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); + mxc_register_gpio(2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH); + mxc_register_gpio(3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH); + mxc_register_gpio(4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH); + mxc_register_gpio(5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH); } diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c index ff557301b42b..800bb8b21081 100644 --- a/arch/arm/mach-mx5/mm.c +++ b/arch/arm/mach-mx5/mm.c @@ -69,8 +69,6 @@ void __init imx53_init_early(void) mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR)); } -int imx51_register_gpios(void); - void __init mx51_init_irq(void) { unsigned long tzic_addr; @@ -86,11 +84,8 @@ void __init mx51_init_irq(void) panic("unable to map TZIC interrupt controller\n"); tzic_init_irq(tzic_virt); - imx51_register_gpios(); } -int imx53_register_gpios(void); - void __init mx53_init_irq(void) { unsigned long tzic_addr; @@ -103,5 +98,23 @@ void __init mx53_init_irq(void) panic("unable to map TZIC interrupt controller\n"); tzic_init_irq(tzic_virt); - imx53_register_gpios(); +} + +void __init imx51_soc_init(void) +{ + mxc_register_gpio(0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH); + mxc_register_gpio(1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH); + mxc_register_gpio(2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH); + mxc_register_gpio(3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH); +} + +void __init imx53_soc_init(void) +{ + mxc_register_gpio(0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH); + mxc_register_gpio(1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH); + mxc_register_gpio(2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH); + mxc_register_gpio(3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH); + mxc_register_gpio(4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH); + mxc_register_gpio(5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH); + mxc_register_gpio(6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH); } diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/plat-mxc/devices.c index eee1b6096a08..fb166b20f60f 100644 --- a/arch/arm/plat-mxc/devices.c +++ b/arch/arm/plat-mxc/devices.c @@ -89,3 +89,14 @@ err: return pdev; } + +struct device mxc_aips_bus = { + .init_name = "mxc_aips", + .parent = &platform_bus, +}; + +static int __init mxc_device_init(void) +{ + return device_register(&mxc_aips_bus); +} +core_initcall(mxc_device_init); diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index ad2922acf480..b41bf972b54b 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS) += platform-gpio_keys.o +obj-y += platform-gpio-mxc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX21_HCD) += platform-imx21-hcd.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT) += platform-imx2-wdt.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMXDI_RTC) += platform-imxdi_rtc.o diff --git a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c b/arch/arm/plat-mxc/devices/platform-gpio-mxc.c new file mode 100644 index 000000000000..cf1b7fdfa20d --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-gpio-mxc.c @@ -0,0 +1,32 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2011 Linaro Limited + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include + +struct platform_device *__init mxc_register_gpio(int id, + resource_size_t iobase, resource_size_t iosize, int irq, int irq_high) +{ + struct resource res[] = { + { + .start = iobase, + .end = iobase + iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = irq, + .end = irq, + .flags = IORESOURCE_IRQ, + }, { + .start = irq_high, + .end = irq_high, + .flags = IORESOURCE_IRQ, + }, + }; + + return platform_device_register_resndata(&mxc_aips_bus, + "gpio-mxc", id, res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index da7991832af6..91fa2632aa5e 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -43,6 +43,15 @@ extern void mx35_init_irq(void); extern void mx50_init_irq(void); extern void mx51_init_irq(void); extern void mx53_init_irq(void); +extern void imx1_soc_init(void); +extern void imx21_soc_init(void); +extern void imx25_soc_init(void); +extern void imx27_soc_init(void); +extern void imx31_soc_init(void); +extern void imx35_soc_init(void); +extern void imx50_soc_init(void); +extern void imx51_soc_init(void); +extern void imx53_soc_init(void); extern void epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq); extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int); extern int mx1_clocks_init(unsigned long fref); @@ -55,7 +64,8 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc, unsigned long ckih1, unsigned long ckih2); extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, unsigned long ckih1, unsigned long ckih2); -extern int mxc_register_gpios(void); +extern struct platform_device *mxc_register_gpio(int id, + resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); extern int mxc_register_device(struct platform_device *pdev, void *data); extern void mxc_set_cpu_type(unsigned int type); extern void mxc_arch_reset_init(void __iomem *); diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index fa8477337f91..03f626645374 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -10,6 +10,8 @@ #include #include +extern struct device mxc_aips_bus; + struct platform_device *imx_add_platform_device_dmamask( const char *name, int id, const struct resource *res, unsigned int num_resources, diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h index a2747f12813e..31c820c1b796 100644 --- a/arch/arm/plat-mxc/include/mach/gpio.h +++ b/arch/arm/plat-mxc/include/mach/gpio.h @@ -36,31 +36,4 @@ #define gpio_to_irq(gpio) (MXC_GPIO_IRQ_START + (gpio)) #define irq_to_gpio(irq) ((irq) - MXC_GPIO_IRQ_START) -struct mxc_gpio_port { - void __iomem *base; - int irq; - int irq_high; - int virtual_irq_start; - struct gpio_chip chip; - u32 both_edges; - spinlock_t lock; -}; - -#define DEFINE_IMX_GPIO_PORT_IRQ_HIGH(soc, _id, _hwid, _irq, _irq_high) \ - { \ - .chip.label = "gpio-" #_id, \ - .irq = _irq, \ - .irq_high = _irq_high, \ - .base = soc ## _IO_ADDRESS( \ - soc ## _GPIO ## _hwid ## _BASE_ADDR), \ - .virtual_irq_start = MXC_GPIO_IRQ_START + (_id) * 32, \ - } - -#define DEFINE_IMX_GPIO_PORT_IRQ(soc, _id, _hwid, _irq) \ - DEFINE_IMX_GPIO_PORT_IRQ_HIGH(soc, _id, _hwid, _irq, 0) -#define DEFINE_IMX_GPIO_PORT(soc, _id, _hwid) \ - DEFINE_IMX_GPIO_PORT_IRQ(soc, _id, _hwid, 0) - -int mxc_gpio_init(struct mxc_gpio_port*, int); - #endif diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 6cd6d7f686f6..844079a83f25 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -24,11 +24,28 @@ #include #include #include +#include +#include #include #include -static struct mxc_gpio_port *mxc_gpio_ports; -static int gpio_table_size; +struct mxc_gpio_port { + struct list_head node; + void __iomem *base; + int irq; + int irq_high; + int virtual_irq_start; + struct gpio_chip chip; + u32 both_edges; + spinlock_t lock; +}; + +/* + * MX2 has one interrupt *for all* gpio ports. The list is used + * to save the references to all ports, so that mx2_gpio_irq_handler + * can walk through all interrupt status registers. + */ +static LIST_HEAD(mxc_gpio_ports); #define cpu_is_mx1_mx2() (cpu_is_mx1() || cpu_is_mx2()) @@ -50,7 +67,7 @@ static int gpio_table_size; static void _clear_gpio_irqstatus(struct mxc_gpio_port *port, u32 index) { - __raw_writel(1 << index, port->base + GPIO_ISR); + writel(1 << index, port->base + GPIO_ISR); } static void _set_gpio_irqenable(struct mxc_gpio_port *port, u32 index, @@ -58,27 +75,30 @@ static void _set_gpio_irqenable(struct mxc_gpio_port *port, u32 index, { u32 l; - l = __raw_readl(port->base + GPIO_IMR); + l = readl(port->base + GPIO_IMR); l = (l & (~(1 << index))) | (!!enable << index); - __raw_writel(l, port->base + GPIO_IMR); + writel(l, port->base + GPIO_IMR); } static void gpio_ack_irq(struct irq_data *d) { + struct mxc_gpio_port *port = irq_data_get_irq_chip_data(d); u32 gpio = irq_to_gpio(d->irq); - _clear_gpio_irqstatus(&mxc_gpio_ports[gpio / 32], gpio & 0x1f); + _clear_gpio_irqstatus(port, gpio & 0x1f); } static void gpio_mask_irq(struct irq_data *d) { + struct mxc_gpio_port *port = irq_data_get_irq_chip_data(d); u32 gpio = irq_to_gpio(d->irq); - _set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 0); + _set_gpio_irqenable(port, gpio & 0x1f, 0); } static void gpio_unmask_irq(struct irq_data *d) { + struct mxc_gpio_port *port = irq_data_get_irq_chip_data(d); u32 gpio = irq_to_gpio(d->irq); - _set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 1); + _set_gpio_irqenable(port, gpio & 0x1f, 1); } static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset); @@ -86,7 +106,7 @@ static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset); static int gpio_set_irq_type(struct irq_data *d, u32 type) { u32 gpio = irq_to_gpio(d->irq); - struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32]; + struct mxc_gpio_port *port = irq_data_get_irq_chip_data(d); u32 bit, val; int edge; void __iomem *reg = port->base; @@ -122,8 +142,8 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ bit = gpio & 0xf; - val = __raw_readl(reg) & ~(0x3 << (bit << 1)); - __raw_writel(val | (edge << (bit << 1)), reg); + val = readl(reg) & ~(0x3 << (bit << 1)); + writel(val | (edge << (bit << 1)), reg); _clear_gpio_irqstatus(port, gpio & 0x1f); return 0; @@ -137,7 +157,7 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ bit = gpio & 0xf; - val = __raw_readl(reg); + val = readl(reg); edge = (val >> (bit << 1)) & 3; val &= ~(0x3 << (bit << 1)); if (edge == GPIO_INT_HIGH_LEV) { @@ -151,7 +171,7 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) gpio, edge); return; } - __raw_writel(val | (edge << (bit << 1)), reg); + writel(val | (edge << (bit << 1)), reg); } /* handle 32 interrupts in one status register */ @@ -177,8 +197,7 @@ static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) u32 irq_stat; struct mxc_gpio_port *port = irq_get_handler_data(irq); - irq_stat = __raw_readl(port->base + GPIO_ISR) & - __raw_readl(port->base + GPIO_IMR); + irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR); mxc_gpio_irq_handler(port, irq_stat); } @@ -186,19 +205,18 @@ static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) /* MX2 has one interrupt *for all* gpio ports */ static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc) { - int i; u32 irq_msk, irq_stat; - struct mxc_gpio_port *port = irq_get_handler_data(irq); + struct mxc_gpio_port *port; /* walk through all interrupt status registers */ - for (i = 0; i < gpio_table_size; i++) { - irq_msk = __raw_readl(port[i].base + GPIO_IMR); + list_for_each_entry(port, &mxc_gpio_ports, node) { + irq_msk = readl(port->base + GPIO_IMR); if (!irq_msk) continue; - irq_stat = __raw_readl(port[i].base + GPIO_ISR) & irq_msk; + irq_stat = readl(port->base + GPIO_ISR) & irq_msk; if (irq_stat) - mxc_gpio_irq_handler(&port[i], irq_stat); + mxc_gpio_irq_handler(port, irq_stat); } } @@ -215,7 +233,7 @@ static int gpio_set_wake_irq(struct irq_data *d, u32 enable) { u32 gpio = irq_to_gpio(d->irq); u32 gpio_idx = gpio & 0x1F; - struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32]; + struct mxc_gpio_port *port = irq_data_get_irq_chip_data(d); if (enable) { if (port->irq_high && (gpio_idx >= 16)) @@ -250,12 +268,12 @@ static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, unsigned long flags; spin_lock_irqsave(&port->lock, flags); - l = __raw_readl(port->base + GPIO_GDIR); + l = readl(port->base + GPIO_GDIR); if (dir) l |= 1 << offset; else l &= ~(1 << offset); - __raw_writel(l, port->base + GPIO_GDIR); + writel(l, port->base + GPIO_GDIR); spin_unlock_irqrestore(&port->lock, flags); } @@ -268,8 +286,8 @@ static void mxc_gpio_set(struct gpio_chip *chip, unsigned offset, int value) unsigned long flags; spin_lock_irqsave(&port->lock, flags); - l = (__raw_readl(reg) & (~(1 << offset))) | (!!value << offset); - __raw_writel(l, reg); + l = (readl(reg) & (~(1 << offset))) | (!!value << offset); + writel(l, reg); spin_unlock_irqrestore(&port->lock, flags); } @@ -278,7 +296,7 @@ static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset) struct mxc_gpio_port *port = container_of(chip, struct mxc_gpio_port, chip); - return (__raw_readl(port->base + GPIO_PSR) >> offset) & 1; + return (readl(port->base + GPIO_PSR) >> offset) & 1; } static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset) @@ -301,61 +319,116 @@ static int mxc_gpio_direction_output(struct gpio_chip *chip, */ static struct lock_class_key gpio_lock_class; -int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) +static int __devinit mxc_gpio_probe(struct platform_device *pdev) { - int i, j; - - /* save for local usage */ - mxc_gpio_ports = port; - gpio_table_size = cnt; - - printk(KERN_INFO "MXC GPIO hardware\n"); - - for (i = 0; i < cnt; i++) { - /* disable the interrupt and clear the status */ - __raw_writel(0, port[i].base + GPIO_IMR); - __raw_writel(~0, port[i].base + GPIO_ISR); - for (j = port[i].virtual_irq_start; - j < port[i].virtual_irq_start + 32; j++) { - irq_set_lockdep_class(j, &gpio_lock_class); - irq_set_chip_and_handler(j, &gpio_irq_chip, - handle_level_irq); - set_irq_flags(j, IRQF_VALID); - } + struct mxc_gpio_port *port; + struct resource *iores; + int err, i; + + port = kzalloc(sizeof(struct mxc_gpio_port), GFP_KERNEL); + if (!port) + return -ENOMEM; - /* register gpio chip */ - port[i].chip.direction_input = mxc_gpio_direction_input; - port[i].chip.direction_output = mxc_gpio_direction_output; - port[i].chip.get = mxc_gpio_get; - port[i].chip.set = mxc_gpio_set; - port[i].chip.base = i * 32; - port[i].chip.ngpio = 32; + port->virtual_irq_start = MXC_GPIO_IRQ_START + pdev->id * 32; - spin_lock_init(&port[i].lock); + iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!iores) { + err = -ENODEV; + goto out_kfree; + } - /* its a serious configuration bug when it fails */ - BUG_ON( gpiochip_add(&port[i].chip) < 0 ); + if (!request_mem_region(iores->start, resource_size(iores), + pdev->name)) { + err = -EBUSY; + goto out_kfree; + } - if (cpu_is_mx1() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) { - /* setup one handler for each entry */ - irq_set_chained_handler(port[i].irq, - mx3_gpio_irq_handler); - irq_set_handler_data(port[i].irq, &port[i]); - if (port[i].irq_high) { - /* setup handler for GPIO 16 to 31 */ - irq_set_chained_handler(port[i].irq_high, - mx3_gpio_irq_handler); - irq_set_handler_data(port[i].irq_high, - &port[i]); - } - } + port->base = ioremap(iores->start, resource_size(iores)); + if (!port->base) { + err = -ENOMEM; + goto out_release_mem; + } + + port->irq_high = platform_get_irq(pdev, 1); + port->irq = platform_get_irq(pdev, 0); + if (port->irq < 0) { + err = -EINVAL; + goto out_iounmap; + } + + /* disable the interrupt and clear the status */ + writel(0, port->base + GPIO_IMR); + writel(~0, port->base + GPIO_ISR); + + for (i = port->virtual_irq_start; + i < port->virtual_irq_start + 32; i++) { + irq_set_lockdep_class(i, &gpio_lock_class); + irq_set_chip_and_handler(i, &gpio_irq_chip, handle_level_irq); + set_irq_flags(i, IRQF_VALID); + irq_set_chip_data(i, port); } if (cpu_is_mx2()) { /* setup one handler for all GPIO interrupts */ - irq_set_chained_handler(port[0].irq, mx2_gpio_irq_handler); - irq_set_handler_data(port[0].irq, port); + if (pdev->id == 0) + irq_set_chained_handler(port->irq, + mx2_gpio_irq_handler); + } else { + /* setup one handler for each entry */ + irq_set_chained_handler(port->irq, mx3_gpio_irq_handler); + irq_set_handler_data(port->irq, port); + if (port->irq_high > 0) { + /* setup handler for GPIO 16 to 31 */ + irq_set_chained_handler(port->irq_high, + mx3_gpio_irq_handler); + irq_set_handler_data(port->irq_high, port); + } } + /* register gpio chip */ + port->chip.direction_input = mxc_gpio_direction_input; + port->chip.direction_output = mxc_gpio_direction_output; + port->chip.get = mxc_gpio_get; + port->chip.set = mxc_gpio_set; + port->chip.base = pdev->id * 32; + port->chip.ngpio = 32; + + spin_lock_init(&port->lock); + + err = gpiochip_add(&port->chip); + if (err) + goto out_iounmap; + + list_add_tail(&port->node, &mxc_gpio_ports); + return 0; + +out_iounmap: + iounmap(port->base); +out_release_mem: + release_mem_region(iores->start, resource_size(iores)); +out_kfree: + kfree(port); + dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err); + return err; } + +static struct platform_driver mxc_gpio_driver = { + .driver = { + .name = "gpio-mxc", + .owner = THIS_MODULE, + }, + .probe = mxc_gpio_probe, +}; + +static int __init gpio_mxc_init(void) +{ + return platform_driver_register(&mxc_gpio_driver); +} +postcore_initcall(gpio_mxc_init); + +MODULE_AUTHOR("Freescale Semiconductor, " + "Daniel Mack , " + "Juergen Beisert "); +MODULE_DESCRIPTION("Freescale MXC GPIO"); +MODULE_LICENSE("GPL"); -- cgit v1.2.3 From 8fe7e94eb71430cf63a742f3c19739d82a662758 Mon Sep 17 00:00:00 2001 From: Robert Richter Date: Wed, 1 Jun 2011 15:31:44 +0200 Subject: oprofile, x86: Fix race in nmi handler while starting counters In some rare cases, nmis are generated immediately after the nmi handler of the cpu was started. This causes the counter not to be enabled. Before enabling the nmi handlers we need to set variable ctr_running first and make sure its value is written to memory. Also, the patch makes all existing barriers a memory barrier instead of a compiler barrier only. Reported-by: Suravee Suthikulpanit Cc: # .35+ Signed-off-by: Robert Richter --- arch/x86/oprofile/nmi_int.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c index cf9750004a08..68894fdc034b 100644 --- a/arch/x86/oprofile/nmi_int.c +++ b/arch/x86/oprofile/nmi_int.c @@ -112,8 +112,10 @@ static void nmi_cpu_start(void *dummy) static int nmi_start(void) { get_online_cpus(); - on_each_cpu(nmi_cpu_start, NULL, 1); ctr_running = 1; + /* make ctr_running visible to the nmi handler: */ + smp_mb(); + on_each_cpu(nmi_cpu_start, NULL, 1); put_online_cpus(); return 0; } @@ -504,15 +506,18 @@ static int nmi_setup(void) nmi_enabled = 0; ctr_running = 0; - barrier(); + /* make variables visible to the nmi handler: */ + smp_mb(); err = register_die_notifier(&profile_exceptions_nb); if (err) goto fail; get_online_cpus(); register_cpu_notifier(&oprofile_cpu_nb); - on_each_cpu(nmi_cpu_setup, NULL, 1); nmi_enabled = 1; + /* make nmi_enabled visible to the nmi handler: */ + smp_mb(); + on_each_cpu(nmi_cpu_setup, NULL, 1); put_online_cpus(); return 0; @@ -531,7 +536,8 @@ static void nmi_shutdown(void) nmi_enabled = 0; ctr_running = 0; put_online_cpus(); - barrier(); + /* make variables visible to the nmi handler: */ + smp_mb(); unregister_die_notifier(&profile_exceptions_nb); msrs = &get_cpu_var(cpu_msrs); model->shutdown(msrs); -- cgit v1.2.3 From 9372da5073705fe991f0254baf47f82d491c83ff Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 31 Mar 2011 09:07:20 +0200 Subject: mach-ux500: add HREFv60 Kconfig option This is necessary to have any use of the HREFv60 code. Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/Kconfig | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig index f8b9392ee347..96d546cef062 100644 --- a/arch/arm/mach-ux500/Kconfig +++ b/arch/arm/mach-ux500/Kconfig @@ -20,7 +20,7 @@ config UX500_SOC_DB8500 endmenu -menu "Ux500 target platform" +menu "Ux500 target platform (boards)" config MACH_U8500 bool "U8500 Development platform" @@ -29,6 +29,12 @@ config MACH_U8500 help Include support for the mop500 development platform. +config MACH_HREFV60 + bool "U85000 Development platform, HREFv60 version" + depends on UX500_SOC_DB8500 + help + Include support for the HREFv60 new development platform. + config MACH_U5500 bool "U5500 Development platform" depends on UX500_SOC_DB5500 -- cgit v1.2.3 From f727a05a2c90cfe44749004718bc5a4ef3569b34 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 27 Apr 2011 12:55:37 +0200 Subject: mach-ux500: fix HREFv60 regression This fixes a regression on the HREFv60 ux500 hardware: the wrong level shifter was addressed in the MMCI vdd handler, trying to reconfigure an unclaimed GPIO pin. Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/board-mop500-sdi.c | 32 ++++++++++++++++++++++++-------- 1 file changed, 24 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c index 7c6cb4fa47a9..f8b195063b62 100644 --- a/arch/arm/mach-ux500/board-mop500-sdi.c +++ b/arch/arm/mach-ux500/board-mop500-sdi.c @@ -32,13 +32,32 @@ #define MCI_DATA31DIREN (1 << 5) #define MCI_FBCLKEN (1 << 7) +/* GPIO pins used by the sdi0 level shifter */ +static int sdi0_en = -1; +static int sdi0_vsel = -1; + static u32 mop500_sdi0_vdd_handler(struct device *dev, unsigned int vdd, unsigned char power_mode) { - if (power_mode == MMC_POWER_UP) - gpio_set_value_cansleep(GPIO_SDMMC_EN, 1); - else if (power_mode == MMC_POWER_OFF) - gpio_set_value_cansleep(GPIO_SDMMC_EN, 0); + switch (power_mode) { + case MMC_POWER_UP: + case MMC_POWER_ON: + /* + * Level shifter voltage should depend on vdd to when deciding + * on either 1.8V or 2.9V. Once the decision has been made the + * level shifter must be disabled and re-enabled with a changed + * select signal in order to switch the voltage. Since there is + * no framework support yet for indicating 1.8V in vdd, use the + * default 2.9V. + */ + gpio_direction_output(sdi0_vsel, 0); + gpio_direction_output(sdi0_en, 1); + break; + case MMC_POWER_OFF: + gpio_direction_output(sdi0_vsel, 0); + gpio_direction_output(sdi0_en, 0); + break; + } return MCI_FBCLKEN | MCI_CMDDIREN | MCI_DATA0DIREN | MCI_DATA2DIREN | MCI_DATA31DIREN; @@ -77,10 +96,6 @@ static struct mmci_platform_data mop500_sdi0_data = { #endif }; -/* GPIO pins used by the sdi0 level shifter */ -static int sdi0_en = -1; -static int sdi0_vsel = -1; - static void sdi0_configure(void) { int ret; @@ -210,6 +225,7 @@ void __init mop500_sdi_init(void) sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO; sdi0_configure(); } + /* * On boards with the TC35892 GPIO expander, sdi0 will finally * be added when the TC35892 initializes and calls -- cgit v1.2.3 From 02a734373b998efdcb9d28d8c3aa77e549bb38c0 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 30 Mar 2011 16:00:39 +0200 Subject: mach-ux500: correct MMC/SDI parameters We cannot clock the MMCI blocks more than 50 MHz. A bug prevented us from seeing the effect of actually driving them to 100 MHz, which indeed resulted failure, on the external SD card. Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/board-mop500-sdi.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c index f8b195063b62..5fbd6bc63cb1 100644 --- a/arch/arm/mach-ux500/board-mop500-sdi.c +++ b/arch/arm/mach-ux500/board-mop500-sdi.c @@ -86,8 +86,10 @@ static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = { static struct mmci_platform_data mop500_sdi0_data = { .vdd_handler = mop500_sdi0_vdd_handler, .ocr_mask = MMC_VDD_29_30, - .f_max = 100000000, - .capabilities = MMC_CAP_4_BIT_DATA, + .f_max = 50000000, + .capabilities = MMC_CAP_4_BIT_DATA | + MMC_CAP_SD_HIGHSPEED | + MMC_CAP_MMC_HIGHSPEED, .gpio_wp = -1, #ifdef CONFIG_STE_DMA40 .dma_filter = stedma40_filter, @@ -155,7 +157,7 @@ static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = { static struct mmci_platform_data mop500_sdi2_data = { .ocr_mask = MMC_VDD_165_195, - .f_max = 100000000, + .f_max = 50000000, .capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, .gpio_cd = -1, .gpio_wp = -1, @@ -192,7 +194,7 @@ static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = { static struct mmci_platform_data mop500_sdi4_data = { .ocr_mask = MMC_VDD_29_30, - .f_max = 100000000, + .f_max = 50000000, .capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA | MMC_CAP_MMC_HIGHSPEED, .gpio_cd = -1, -- cgit v1.2.3 From 451a5edf0ed33f8ca9468ed89dc2a068d09e97be Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 1 Mar 2011 16:09:52 +0100 Subject: mach-ux500: activate USB in the U8500 defconfig Activate the new USB stuff so we atleast get some compile coverage for this stuff. Signed-off-by: Linus Walleij --- arch/arm/configs/u8500_defconfig | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig index a5cce242a775..e1d602029a4d 100644 --- a/arch/arm/configs/u8500_defconfig +++ b/arch/arm/configs/u8500_defconfig @@ -67,7 +67,11 @@ CONFIG_AB8500_CORE=y CONFIG_REGULATOR=y CONFIG_REGULATOR_AB8500=y # CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_GADGET_MUSB_HDRC=y +CONFIG_MUSB_PIO_ONLY=y +CONFIG_USB_GADGET=y +CONFIG_AB8500_USB=y CONFIG_MMC=y CONFIG_MMC_ARMMMCI=y CONFIG_NEW_LEDS=y -- cgit v1.2.3 From db24520f905430bd15eb49b5d9810ed445efe73a Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 4 Apr 2011 10:44:51 +0200 Subject: mach-ux500: complete regulator constraints for MOP500 board This board now has complete regulation constraints and can turn off unused regulators. For the moment we need to wire VAUX1 (V-DISPLAY rail) always on since it somehow affects the external MMC. Cc: Liam Girdwood Cc: Mark Brown Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/board-mop500-regulators.c | 9 ++++++++- arch/arm/mach-ux500/board-mop500.c | 3 +++ 2 files changed, 11 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-ux500/board-mop500-regulators.c b/arch/arm/mach-ux500/board-mop500-regulators.c index 9ed0f90cfe23..c0bc833df903 100644 --- a/arch/arm/mach-ux500/board-mop500-regulators.c +++ b/arch/arm/mach-ux500/board-mop500-regulators.c @@ -272,7 +272,14 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = { .max_uV = 2900000, .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, - .boot_on = 1, /* must be on for display */ + .boot_on = 1, /* display is on at boot */ + /* + * This voltage cannot be disabled right now because + * it is somehow affecting the external MMC + * functionality, though that typically will use + * AUX3. + */ + .always_on = 1, }, .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers), .consumer_supplies = ab8500_vaux1_consumers, diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index bb26f40493e6..c64d6aa1355c 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c @@ -458,6 +458,9 @@ static void __init mop500_init_machine(void) i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); i2c_register_board_info(2, mop500_i2c2_devices, ARRAY_SIZE(mop500_i2c2_devices)); + + /* This board has full regulator constraints */ + regulator_has_full_constraints(); } MACHINE_START(U8500, "ST-Ericsson MOP500 platform") -- cgit v1.2.3 From dd367e9d06d672a549526f2d3b69a36a120b1563 Mon Sep 17 00:00:00 2001 From: Mattias Wallin Date: Thu, 9 Jun 2011 11:50:35 +0200 Subject: mach-ux500: iomap PRCMU TCDM memory The PRCMU TCDM memory needs to be iomapped for the PRCMU to work properly. Signed-off-by: Mattias Wallin Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/cpu-db5500.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/mach-ux500/cpu-db5500.c b/arch/arm/mach-ux500/cpu-db5500.c index c01bc19e3c5e..22705d246fc7 100644 --- a/arch/arm/mach-ux500/cpu-db5500.c +++ b/arch/arm/mach-ux500/cpu-db5500.c @@ -44,6 +44,7 @@ static struct map_desc u5500_io_desc[] __initdata = { __IO_DEV_DESC(U5500_GPIO3_BASE, SZ_4K), __IO_DEV_DESC(U5500_GPIO4_BASE, SZ_4K), __IO_DEV_DESC(U5500_PRCMU_BASE, SZ_4K), + __IO_DEV_DESC(U5500_PRCMU_TCDM_BASE, SZ_4K), }; static struct resource db5500_pmu_resources[] = { -- cgit v1.2.3 From 58402b6e397555884d926fd22fb40ccf6fe68b46 Mon Sep 17 00:00:00 2001 From: Robert Marklund Date: Mon, 20 Jun 2011 13:30:35 +0200 Subject: mach-x500: fix SECTION warnings in uib Fix some simple section warning noise. Signed-off-by: Robert Marklund --- arch/arm/mach-ux500/board-mop500-uib.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-ux500/board-mop500-uib.c b/arch/arm/mach-ux500/board-mop500-uib.c index 69cce41f602a..5af36aa56c08 100644 --- a/arch/arm/mach-ux500/board-mop500-uib.c +++ b/arch/arm/mach-ux500/board-mop500-uib.c @@ -25,7 +25,7 @@ struct uib { void (*init)(void); }; -static struct __initdata uib mop500_uibs[] = { +static struct uib __initdata mop500_uibs[] = { [STUIB] = { .name = "ST-UIB", .option = "stuib", -- cgit v1.2.3 From 350abe0379f8106319f73cbcce37bfa2f0bfa05a Mon Sep 17 00:00:00 2001 From: Robert Marklund Date: Mon, 20 Jun 2011 15:55:46 +0200 Subject: mach-ux500: add basic support for snowball board Based on work from Mathieu J. Poirier For more information on snowball please visit http://www.igloocommunity.org Signed-off-by: Robert Marklund --- arch/arm/mach-ux500/board-mop500.c | 154 ++++++++++++++++++++++++++++++++++--- 1 file changed, 145 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index c64d6aa1355c..e3bbb5506dd1 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c @@ -26,8 +26,10 @@ #include #include #include +#include #include +#include #include #include @@ -44,6 +46,26 @@ #include "board-mop500.h" #include "board-mop500-regulators.h" +static struct gpio_led snowball_led_array[] = { + { + .name = "user_led", + .default_trigger = "none", + .gpio = 142, + }, +}; + +static struct gpio_led_platform_data snowball_led_data = { + .leds = snowball_led_array, + .num_leds = ARRAY_SIZE(snowball_led_array), +}; + +static struct platform_device snowball_led_dev = { + .name = "leds-gpio", + .dev = { + .platform_data = &snowball_led_data, + }, +}; + static struct ab8500_gpio_platform_data ab8500_gpio_pdata = { .gpio_base = MOP500_AB8500_GPIO(0), .irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE, @@ -66,6 +88,97 @@ static struct ab8500_gpio_platform_data ab8500_gpio_pdata = { 0x7A, 0x00, 0x00}, }; +static struct gpio_keys_button snowball_key_array[] = { + { + .gpio = 32, + .type = EV_KEY, + .code = KEY_1, + .desc = "userpb", + .active_low = 1, + .debounce_interval = 50, + .wakeup = 1, + }, + { + .gpio = 151, + .type = EV_KEY, + .code = KEY_2, + .desc = "extkb1", + .active_low = 1, + .debounce_interval = 50, + .wakeup = 1, + }, + { + .gpio = 152, + .type = EV_KEY, + .code = KEY_3, + .desc = "extkb2", + .active_low = 1, + .debounce_interval = 50, + .wakeup = 1, + }, + { + .gpio = 161, + .type = EV_KEY, + .code = KEY_4, + .desc = "extkb3", + .active_low = 1, + .debounce_interval = 50, + .wakeup = 1, + }, + { + .gpio = 162, + .type = EV_KEY, + .code = KEY_5, + .desc = "extkb4", + .active_low = 1, + .debounce_interval = 50, + .wakeup = 1, + }, +}; + +static struct gpio_keys_platform_data snowball_key_data = { + .buttons = snowball_key_array, + .nbuttons = ARRAY_SIZE(snowball_key_array), +}; + +static struct platform_device snowball_key_dev = { + .name = "gpio-keys", + .id = -1, + .dev = { + .platform_data = &snowball_key_data, + } +}; + +static struct smsc911x_platform_config snowball_sbnet_cfg = { + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, + .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, + .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, + .shift = 1, +}; + +static struct resource sbnet_res[] = { + { + .name = "smsc911x-memory", + .start = (0x5000 << 16), + .end = (0x5000 << 16) + 0xffff, + .flags = IORESOURCE_MEM, + }, + { + .start = NOMADIK_GPIO_TO_IRQ(140), + .end = NOMADIK_GPIO_TO_IRQ(140), + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, + }, +}; + +static struct platform_device snowball_sbnet_dev = { + .name = "smsc911x", + .num_resources = ARRAY_SIZE(sbnet_res), + .resource = sbnet_res, + .dev = { + .platform_data = &snowball_sbnet_cfg, + }, +}; + static struct ab8500_platform_data ab8500_platdata = { .irq_base = MOP500_AB8500_IRQ_BASE, .regulator_reg_init = ab8500_regulator_reg_init, @@ -292,8 +405,9 @@ static void mop500_prox_deactivate(struct device *dev) } /* add any platform devices here - TODO */ -static struct platform_device *platform_devs[] __initdata = { +static struct platform_device *mop500_platform_devs[] __initdata = { &mop500_gpio_keys_device, + &ab8500_device, }; #ifdef CONFIG_STE_DMA40 @@ -424,6 +538,13 @@ static void __init mop500_uart_init(void) db8500_add_uart2(&uart2_plat); } +static struct platform_device *snowball_platform_devs[] __initdata = { + &snowball_led_dev, + &snowball_key_dev, + &snowball_sbnet_dev, + &ab8500_device, +}; + static void __init mop500_init_machine(void) { int i2c0_devs; @@ -433,24 +554,30 @@ static void __init mop500_init_machine(void) * all these GPIO pins to the internal GPIO controller * instead. */ - if (machine_is_hrefv60()) - mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO; - else - mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR; + if (!machine_is_snowball()) { + if (machine_is_hrefv60()) + mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO; + else + mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR; + } u8500_init_devices(); mop500_pins_init(); - platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); + if (machine_is_snowball()) + platform_add_devices(snowball_platform_devs, + ARRAY_SIZE(snowball_platform_devs)); + else + platform_add_devices(mop500_platform_devs, + ARRAY_SIZE(mop500_platform_devs)); mop500_i2c_init(); - mop500_sdi_init(); + if (!machine_is_snowball()) + mop500_sdi_init(); mop500_spi_init(); mop500_uart_init(); - platform_device_register(&ab8500_device); - i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); if (machine_is_hrefv60()) i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES; @@ -480,3 +607,12 @@ MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+") .timer = &ux500_timer, .init_machine = mop500_init_machine, MACHINE_END + +MACHINE_START(SNOWBALL, "Calao Systems Snowball platform") + .boot_params = 0x100, + .map_io = u8500_map_io, + .init_irq = ux500_init_irq, + /* we re-use nomadik timer here */ + .timer = &ux500_timer, + .init_machine = mop500_init_machine, +MACHINE_END -- cgit v1.2.3 From d769d05498f78efdc1adff2075b3a58af40dbb76 Mon Sep 17 00:00:00 2001 From: "Mathieu J. Poirier" Date: Fri, 25 Mar 2011 09:28:56 -0600 Subject: mach-ux500: setting proper uart for snowball The UART setting in uncompress.h changes on the Snowball board. Signed-off-by: Mathieu Poirier Signed-off-by: Linus Walleij Signed-off-by: Robert Marklund --- arch/arm/mach-ux500/include/mach/uncompress.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-ux500/include/mach/uncompress.h b/arch/arm/mach-ux500/include/mach/uncompress.h index 088b550c40df..7dd08074c37b 100644 --- a/arch/arm/mach-ux500/include/mach/uncompress.h +++ b/arch/arm/mach-ux500/include/mach/uncompress.h @@ -54,7 +54,8 @@ static inline void arch_decomp_setup(void) if (machine_is_u8500() || machine_is_svp8500v1() || machine_is_svp8500v2() || - machine_is_hrefv60()) + machine_is_hrefv60() || + machine_is_snowball()) ux500_uart_base = U8500_UART2_BASE; else if (machine_is_u5500()) ux500_uart_base = U5500_UART0_BASE; -- cgit v1.2.3 From 885d0fe40fb97d7f394c24ac9c88721015f852b3 Mon Sep 17 00:00:00 2001 From: "Mathieu J. Poirier" Date: Fri, 25 Mar 2011 09:28:58 -0600 Subject: mach-ux500: Add SDI support for snowball board With SDI support for the Snowball we can boot from the SD card. Signed-off-by: Mathieu Poirier Signed-off-by: Linus Walleij Signed-off-by: Robert Marklund --- arch/arm/mach-ux500/board-mop500-sdi.c | 19 ++++++++++++++----- arch/arm/mach-ux500/board-mop500.c | 3 +-- arch/arm/mach-ux500/board-mop500.h | 5 +++++ 3 files changed, 20 insertions(+), 7 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c index 5fbd6bc63cb1..d0cb9e5eb87c 100644 --- a/arch/arm/mach-ux500/board-mop500-sdi.c +++ b/arch/arm/mach-ux500/board-mop500-sdi.c @@ -216,15 +216,24 @@ void __init mop500_sdi_init(void) /* PoP:ed eMMC on top of DB8500 v1.0 has problems with high speed */ if (!cpu_is_u8500v10()) mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED; - db8500_add_sdi2(&mop500_sdi2_data, periphid); + /* sdi2 on snowball is in ATL_B mode for FSMC (LAN) */ + if (!machine_is_snowball()) + db8500_add_sdi2(&mop500_sdi2_data, periphid); /* On-board eMMC */ db8500_add_sdi4(&mop500_sdi4_data, periphid); - if (machine_is_hrefv60()) { - mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO; - sdi0_en = HREFV60_SDMMC_EN_GPIO; - sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO; + if (machine_is_hrefv60() || machine_is_snowball()) { + if (machine_is_hrefv60()) { + mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO; + sdi0_en = HREFV60_SDMMC_EN_GPIO; + sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO; + } else if (machine_is_snowball()) { + mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO; + mop500_sdi0_data.cd_invert = true; + sdi0_en = SNOWBALL_SDMMC_EN_GPIO; + sdi0_vsel = SNOWBALL_SDMMC_1V8_3V_GPIO; + } sdi0_configure(); } diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index e3bbb5506dd1..4eead1a0786b 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c @@ -573,8 +573,7 @@ static void __init mop500_init_machine(void) ARRAY_SIZE(mop500_platform_devs)); mop500_i2c_init(); - if (!machine_is_snowball()) - mop500_sdi_init(); + mop500_sdi_init(); mop500_spi_init(); mop500_uart_init(); diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h index 03a31cc9b084..ee77a8970c33 100644 --- a/arch/arm/mach-ux500/board-mop500.h +++ b/arch/arm/mach-ux500/board-mop500.h @@ -7,6 +7,11 @@ #ifndef __BOARD_MOP500_H #define __BOARD_MOP500_H +/* snowball GPIO for MMC card */ +#define SNOWBALL_SDMMC_EN_GPIO 217 +#define SNOWBALL_SDMMC_1V8_3V_GPIO 228 +#define SNOWBALL_SDMMC_CD_GPIO 218 + /* HREFv60-specific GPIO assignments, this board has no GPIO expander */ #define HREFV60_TOUCH_RST_GPIO 143 #define HREFV60_PROX_SENSE_GPIO 217 -- cgit v1.2.3 From c41fac8aa9cb9ca31a5b3d9ce1f3b0026b83c16d Mon Sep 17 00:00:00 2001 From: Robert Marklund Date: Tue, 21 Jun 2011 09:39:13 +0200 Subject: mach-ux500: Add pin configuration for snowball board This sets up a few GPIO pins and some pinmuxing on platform boot for the Snowball board. Based on work from Mathieu J. Poirier . Signed-off-by: Robert Marklund --- arch/arm/mach-ux500/board-mop500-pins.c | 43 +++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c index fd4cf1ca5efd..7013d003b8fd 100644 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ b/arch/arm/mach-ux500/board-mop500-pins.c @@ -228,6 +228,46 @@ static pin_cfg_t mop500_pins_hrefv60[] = { }; +static pin_cfg_t snowball_pins[] = { + /* SSP0, to AB8500 */ + GPIO143_SSP0_CLK, + GPIO144_SSP0_FRM, + GPIO145_SSP0_RXD | PIN_PULL_DOWN, + GPIO146_SSP0_TXD, + + /* MMC0: MicroSD card */ + GPIO21_MC0_DAT31DIR | PIN_OUTPUT_HIGH, + + /* MMC2: LAN */ + GPIO86_SM_ADQ0, + GPIO87_SM_ADQ1, + GPIO88_SM_ADQ2, + GPIO89_SM_ADQ3, + GPIO90_SM_ADQ4, + GPIO91_SM_ADQ5, + GPIO92_SM_ADQ6, + GPIO93_SM_ADQ7, + + GPIO94_SM_ADVn, + GPIO95_SM_CS0n, + GPIO96_SM_OEn, + GPIO97_SM_WEn, + + GPIO128_SM_CKO, + GPIO130_SM_FBCLK, + GPIO131_SM_ADQ8, + GPIO132_SM_ADQ9, + GPIO133_SM_ADQ10, + GPIO134_SM_ADQ11, + GPIO135_SM_ADQ12, + GPIO136_SM_ADQ13, + GPIO137_SM_ADQ14, + GPIO138_SM_ADQ15, + + /* RSTn_LAN */ + GPIO141_GPIO | PIN_OUTPUT_HIGH, +}; + void __init mop500_pins_init(void) { nmk_config_pins(mop500_pins_common, @@ -235,6 +275,9 @@ void __init mop500_pins_init(void) if (machine_is_hrefv60()) nmk_config_pins(mop500_pins_hrefv60, ARRAY_SIZE(mop500_pins_hrefv60)); + else if (machine_is_snowball()) + nmk_config_pins(snowball_pins, + ARRAY_SIZE(snowball_pins)); else nmk_config_pins(mop500_pins_default, ARRAY_SIZE(mop500_pins_default)); -- cgit v1.2.3 From 11ab32a734f5ee5d4f4f27f3488b0099447a2dbf Mon Sep 17 00:00:00 2001 From: "Mathieu J. Poirier" Date: Fri, 25 Mar 2011 09:29:01 -0600 Subject: mach-ux500: Kconfig for snowball board This adds the necessary Kconfig entry for a Snowball board. Signed-off-by: Mathieu Poirier Signed-off-by: Robert Marklund --- arch/arm/mach-ux500/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig index 96d546cef062..4210cb434dbc 100644 --- a/arch/arm/mach-ux500/Kconfig +++ b/arch/arm/mach-ux500/Kconfig @@ -35,6 +35,13 @@ config MACH_HREFV60 help Include support for the HREFv60 new development platform. +config MACH_SNOWBALL + bool "U8500 Snowball platform" + depends on UX500_SOC_DB8500 + select MACH_U8500 + help + Include support for the snowball development platform. + config MACH_U5500 bool "U5500 Development platform" depends on UX500_SOC_DB5500 -- cgit v1.2.3 From c5314877edd2ea9cccca0ca87c9a439a8d356c14 Mon Sep 17 00:00:00 2001 From: Robert Marklund Date: Tue, 21 Jun 2011 14:01:02 +0200 Subject: mach-ux500: add configs for snowball board Adds defconfig entries needed to boot a single ux500 kernel on the Snowball board. Signed-off-by: Robert Marklund --- arch/arm/configs/u8500_defconfig | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-) (limited to 'arch') diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig index e1d602029a4d..97d31a4663da 100644 --- a/arch/arm/configs/u8500_defconfig +++ b/arch/arm/configs/u8500_defconfig @@ -11,12 +11,12 @@ CONFIG_ARCH_U8500=y CONFIG_UX500_SOC_DB5500=y CONFIG_UX500_SOC_DB8500=y CONFIG_MACH_U8500=y +CONFIG_MACH_SNOWBALL=y CONFIG_MACH_U5500=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_SMP=y CONFIG_NR_CPUS=2 -CONFIG_HOTPLUG_CPU=y CONFIG_PREEMPT=y CONFIG_AEABI=y CONFIG_CMDLINE="root=/dev/ram0 console=ttyAMA2,115200n8" @@ -25,8 +25,13 @@ CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y CONFIG_VFP=y CONFIG_NEON=y CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_NETFILTER=y CONFIG_PHONET=y -CONFIG_PHONET_PIPECTRLR=y # CONFIG_WIRELESS is not set CONFIG_CAIF=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" @@ -35,6 +40,13 @@ CONFIG_BLK_DEV_RAM_SIZE=65536 CONFIG_MISC_DEVICES=y CONFIG_AB8500_PWM=y CONFIG_SENSORS_BH1780=y +CONFIG_NETDEVICES=y +CONFIG_SMSC_PHY=y +CONFIG_NET_ETHERNET=y +CONFIG_SMSC911X=y +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_WLAN is not set # CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_EVDEV=y # CONFIG_KEYBOARD_ATKBD is not set @@ -49,9 +61,9 @@ CONFIG_INPUT_MISC=y CONFIG_INPUT_AB8500_PONKEY=y # CONFIG_SERIO is not set CONFIG_VT_HW_CONSOLE_BINDING=y +# CONFIG_LEGACY_PTYS is not set CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_NOMADIK=y CONFIG_I2C=y @@ -64,7 +76,6 @@ CONFIG_GPIO_TC3589X=y CONFIG_MFD_STMPE=y CONFIG_MFD_TC3589X=y CONFIG_AB8500_CORE=y -CONFIG_REGULATOR=y CONFIG_REGULATOR_AB8500=y # CONFIG_HID_SUPPORT is not set CONFIG_USB_MUSB_HDRC=y @@ -73,9 +84,11 @@ CONFIG_MUSB_PIO_ONLY=y CONFIG_USB_GADGET=y CONFIG_AB8500_USB=y CONFIG_MMC=y +CONFIG_MMC_CLKGATE=y CONFIG_MMC_ARMMMCI=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y +CONFIG_LEDS_LM3530=y CONFIG_LEDS_LP5521=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_AB8500=y @@ -83,7 +96,6 @@ CONFIG_RTC_DRV_PL031=y CONFIG_DMADEVICES=y CONFIG_STE_DMA40=y CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y CONFIG_EXT2_FS=y CONFIG_EXT2_FS_XATTR=y @@ -95,6 +107,8 @@ CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_CONFIGFS_FS=m # CONFIG_MISC_FILESYSTEMS is not set +CONFIG_NFS_FS=y +CONFIG_ROOT_NFS=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ISO8859_1=y CONFIG_MAGIC_SYSRQ=y @@ -103,7 +117,5 @@ CONFIG_DEBUG_KERNEL=y # CONFIG_SCHED_DEBUG is not set # CONFIG_DEBUG_PREEMPT is not set CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_FTRACE is not set CONFIG_DEBUG_USER=y -CONFIG_DEBUG_ERRORS=y -- cgit v1.2.3 From cde21de148a5bf474bbde59ebf046992fab3c77b Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 30 May 2011 15:51:47 +0200 Subject: mach-u300: cleanup clockevent code Use the new clockevents_config_and_register() function to register the U300 clockevent, since that code requires ->cpumask to be set we set this even on this UP system to please the framework. Cc: Thomas Gleixner Signed-off-by: Linus Walleij --- arch/arm/mach-u300/timer.c | 33 ++++++++++++--------------------- 1 file changed, 12 insertions(+), 21 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c index 18d7fa0603c2..5f51bdeef0ef 100644 --- a/arch/arm/mach-u300/timer.c +++ b/arch/arm/mach-u300/timer.c @@ -27,9 +27,6 @@ #include #include -/* Be able to sleep for atleast 4 seconds (usually more) */ -#define APPTIMER_MIN_RANGE 4 - /* * APP side special timer registers * This timer contains four timers which can fire an interrupt each. @@ -309,11 +306,11 @@ static int u300_set_next_event(unsigned long cycles, /* Use general purpose timer 1 as clock event */ static struct clock_event_device clockevent_u300_1mhz = { - .name = "GPT1", - .rating = 300, /* Reasonably fast and accurate clock event */ - .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, - .set_next_event = u300_set_next_event, - .set_mode = u300_set_mode, + .name = "GPT1", + .rating = 300, /* Reasonably fast and accurate clock event */ + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, + .set_next_event = u300_set_next_event, + .set_mode = u300_set_mode, }; /* Clock event timer interrupt handler */ @@ -328,9 +325,9 @@ static irqreturn_t u300_timer_interrupt(int irq, void *dev_id) } static struct irqaction u300_timer_irq = { - .name = "U300 Timer Tick", - .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, - .handler = u300_timer_interrupt, + .name = "U300 Timer Tick", + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, + .handler = u300_timer_interrupt, }; /* @@ -413,16 +410,10 @@ static void __init u300_timer_init(void) "GPT2", rate, 300, 32, clocksource_mmio_readl_up)) pr_err("timer: failed to initialize U300 clock source\n"); - clockevents_calc_mult_shift(&clockevent_u300_1mhz, - rate, APPTIMER_MIN_RANGE); - /* 32bit counter, so 32bits delta is max */ - clockevent_u300_1mhz.max_delta_ns = - clockevent_delta2ns(0xffffffff, &clockevent_u300_1mhz); - /* This timer is slow enough to set for 1 cycle == 1 MHz */ - clockevent_u300_1mhz.min_delta_ns = - clockevent_delta2ns(1, &clockevent_u300_1mhz); - clockevent_u300_1mhz.cpumask = cpumask_of(0); - clockevents_register_device(&clockevent_u300_1mhz); + /* Configure and register the clockevent */ + clockevents_config_and_register(&clockevent_u300_1mhz, rate, + 1, 0xffffffff); + /* * TODO: init and register the rest of the timers too, they can be * used by hrtimers! -- cgit v1.2.3 From 32d55ff91635c22dc853c532ec85dc16663d251f Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 16 Jun 2011 09:28:28 +0200 Subject: mach-u300: set apropriate FIFO trigger levels The U300 just defined the fill level limits for the FIFOs to 1 item out of habit. It can easily handle four. Signed-off-by: Linus Walleij --- arch/arm/mach-u300/spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-u300/spi.c b/arch/arm/mach-u300/spi.c index 5767208f1c1d..7b597e2b19e2 100644 --- a/arch/arm/mach-u300/spi.c +++ b/arch/arm/mach-u300/spi.c @@ -40,8 +40,8 @@ struct pl022_config_chip dummy_chip_info = { .hierarchy = SSP_MASTER, /* 0 = drive TX even as slave, 1 = do not drive TX as slave */ .slave_tx_disable = 0, - .rx_lev_trig = SSP_RX_1_OR_MORE_ELEM, - .tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC, + .rx_lev_trig = SSP_RX_4_OR_MORE_ELEM, + .tx_lev_trig = SSP_TX_4_OR_MORE_EMPTY_LOC, .ctrl_len = SSP_BITS_12, .wait_state = SSP_MWIRE_WAIT_ZERO, .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX, -- cgit v1.2.3 From ef7a474cef00594ccef432ce0840464e51ea4ac0 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 1 Jun 2011 14:44:16 +0200 Subject: mach-ux500: register a clock for the SMP TWD The SMP TWD on the ux500 will change frequency at the same time as the CPU. Loop back the frequency presented from the CPU into a clock that is looked up by the SMP TWD driver with the new cpufreq notifier hook. Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/clock.c | 48 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c index 32ce90840ee1..b4e786a0fa4f 100644 --- a/arch/arm/mach-ux500/clock.c +++ b/arch/arm/mach-ux500/clock.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -759,6 +760,51 @@ err_out: late_initcall(clk_debugfs_init); #endif /* defined(CONFIG_DEBUG_FS) */ +unsigned long clk_smp_twd_rate = 400000000; + +unsigned long clk_smp_twd_get_rate(struct clk *clk) +{ + return clk_smp_twd_rate; +} + +static struct clk clk_smp_twd = { + .get_rate = clk_smp_twd_get_rate, + .name = "smp_twd", +}; + +static struct clk_lookup clk_smp_twd_lookup = { + .dev_id = "smp_twd", + .clk = &clk_smp_twd, +}; + +#ifdef CONFIG_CPU_FREQ + +static int clk_twd_cpufreq_transition(struct notifier_block *nb, + unsigned long state, void *data) +{ + struct cpufreq_freqs *f = data; + + if (state == CPUFREQ_PRECHANGE) { + /* Save frequency in simple Hz */ + clk_smp_twd_rate = f->new * 1000; + } + + return NOTIFY_OK; +} + +static struct notifier_block clk_twd_cpufreq_nb = { + .notifier_call = clk_twd_cpufreq_transition, +}; + +static int clk_init_smp_twd_cpufreq(void) +{ + return cpufreq_register_notifier(&clk_twd_cpufreq_nb, + CPUFREQ_TRANSITION_NOTIFIER); +} +late_initcall(clk_init_smp_twd_cpufreq); + +#endif + int __init clk_init(void) { if (cpu_is_u8500ed()) { @@ -779,6 +825,8 @@ int __init clk_init(void) else clkdev_add_table(u8500_v1_clks, ARRAY_SIZE(u8500_v1_clks)); + clkdev_add(&clk_smp_twd_lookup); + #ifdef CONFIG_DEBUG_FS clk_debugfs_add_table(u8500_common_clks, ARRAY_SIZE(u8500_common_clks)); if (cpu_is_u8500ed()) -- cgit v1.2.3 From fc5070b527b8243e9f4369e4e79ab431a5a1cb79 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 27 Jun 2011 18:19:30 +0200 Subject: mach-ux500: fix USB build error The mach-ux500/usb.c was referencing DMA macros, but not including so it didn't compile. Fixed by a proper #include. Cc: Arnd Bergmann Cc: Mian Yousaf Kaukab Signed-off-by: Linus Walleij Signed-off-by: Arnd Bergmann --- arch/arm/mach-ux500/usb.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/mach-ux500/usb.c b/arch/arm/mach-ux500/usb.c index 82e535953fd9..0a01cbdfe063 100644 --- a/arch/arm/mach-ux500/usb.c +++ b/arch/arm/mach-ux500/usb.c @@ -6,6 +6,7 @@ */ #include #include +#include #include #include #include -- cgit v1.2.3 From a26474e8649643e82d71e3a386d5c4bcc0b207ef Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Tue, 28 Jun 2011 11:41:07 +0200 Subject: x86-32, NUMA: Fix boot regression caused by NUMA init unification on highmem machines During 32/64 NUMA init unification, commit 797390d855 ("x86-32, NUMA: use sparse_memory_present_with_active_regions()") made 32bit mm init call memory_present() automatically from active_regions instead of leaving it to each NUMA init path. This commit description is inaccurate - memory_present() calls aren't the same for flat and numaq. After the commit, memory_present() is only called for the intersection of e820 and NUMA layout. Before, on flatmem, memory_present() would be called from 0 to max_pfn. After, it would be called only on the areas that e820 indicates to be populated. This is how x86_64 works and should be okay as memmap is allowed to contain holes; however, x86_32 DISCONTIGMEM is missing early_pfn_valid(), which makes memmap_init_zone() assume that memmap doesn't contain any hole. This leads to the following oops if e820 map contains holes as it often does on machine with near or more 4GiB of memory by calling pfn_to_page() on a pfn which isn't mapped to a NUMA node, a reported by Conny Seidel: BUG: unable to handle kernel paging request at 000012b0 IP: [] memmap_init_zone+0x6c/0xf2 *pdpt =3D 0000000000000000 *pde =3D f000eef3f000ee00 Oops: 0000 [#1] SMP last sysfs file: Modules linked in: Pid: 0, comm: swapper Not tainted 2.6.39-rc5-00164-g797390d #1 To Be Filled By O.E.M. To Be Filled By O.E.M./E350M1 EIP: 0060:[] EFLAGS: 00010012 CPU: 0 EIP is at memmap_init_zone+0x6c/0xf2 EAX: 00000000 EBX: 000a8000 ECX: 000a7fff EDX: f2c00b80 ESI: 000a8000 EDI: f2c00800 EBP: c19ffe54 ESP: c19ffe34 DS: 007b ES: 007b FS: 00d8 GS: 0000 SS: 0068 Process swapper (pid: 0, ti=3Dc19fe000 task=3Dc1a07f60 task.ti=3Dc19fe000) Stack: 00000002 00000000 0023f000 00000000 10000000 00000a00 f2c00000 f2c00b58 c19ffeb0 c1a80f24 000375fe 00000000 f2c00800 00000800 00000100 00000030 c1abb768 0000003c 00000000 00000000 00000004 00207a02 f2c00800 000375fe Call Trace: [] free_area_init_node+0x358/0x385 [] free_area_init_nodes+0x420/0x487 [] paging_init+0x114/0x11b [] setup_arch+0xb37/0xc0a [] start_kernel+0x76/0x316 [] i386_start_kernel+0xa8/0xb0 This patch fixes the bug by defining early_pfn_valid() to be the same as pfn_valid() when DISCONTIGMEM. Reported-bisected-and-tested-by: Conny Seidel Signed-off-by: Tejun Heo Cc: hans.rosenfeld@amd.com Cc: Christoph Lameter Cc: Conny Seidel Link: http://lkml.kernel.org/r/20110628094107.GB3386@htj.dyndns.org Signed-off-by: Ingo Molnar --- arch/x86/include/asm/mmzone_32.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/x86/include/asm/mmzone_32.h b/arch/x86/include/asm/mmzone_32.h index 224e8c5eb307..ffa037f28d39 100644 --- a/arch/x86/include/asm/mmzone_32.h +++ b/arch/x86/include/asm/mmzone_32.h @@ -57,6 +57,8 @@ static inline int pfn_valid(int pfn) return 0; } +#define early_pfn_valid(pfn) pfn_valid((pfn)) + #endif /* CONFIG_DISCONTIGMEM */ #ifdef CONFIG_NEED_MULTIPLE_NODES -- cgit v1.2.3 From 178783622ce0fd629fad21b33b8f8f56b64c5e45 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 3 Jul 2011 23:24:21 +0100 Subject: ARM: dmabounce: fix map_single() error return value When map_single() is unable to obtain a safe buffer, we must return the dma_addr_t error value, which is ~0 rather than 0. Signed-off-by: Russell King --- arch/arm/common/dmabounce.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c index e5681636626f..841df7d21c2f 100644 --- a/arch/arm/common/dmabounce.c +++ b/arch/arm/common/dmabounce.c @@ -255,7 +255,7 @@ static inline dma_addr_t map_single(struct device *dev, void *ptr, size_t size, if (buf == 0) { dev_err(dev, "%s: unable to map unsafe buffer %p!\n", __func__, ptr); - return 0; + return ~0; } dev_dbg(dev, -- cgit v1.2.3 From 07ad6ab3d79ede41cd8a69499e81df7b405635d2 Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Mon, 4 Jul 2011 03:56:15 -0700 Subject: omap: drop __initdata tags from static struct platform_device declarations Pointers to statically declared platform device structures which are registered with platform_device_register() are then used during run time to access these structure members, for example from platform_uevent() and much more. Therefore, these structures should never be placed inside sections which are dropped after boot. Fix platform devices incorrectly tagged with __initdata which happen to exist inside OMAP sub-trees. This bug has exhibited itself on my ARM/OMAP1 based Amstrad Delta videophone after commit 6d3163ce86dd386b4f7bda80241d7fea2bc0bb1d, "mm: check if any page in a pageblock is reserved before marking it MIGRATE_RESERVE", resulting in reading from several /sys/device/platform/*/uevent files always ending up with segmentation faults. Signed-off-by: Janusz Krzysztofik Acked-by: Felipe Balbi Cc: Varadarajan, Charulatha Cc: Jarkko Nikula Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-ams-delta.c | 8 ++++---- arch/arm/mach-omap1/gpio15xx.c | 4 ++-- arch/arm/mach-omap1/gpio16xx.c | 10 +++++----- arch/arm/mach-omap1/gpio7xx.c | 14 +++++++------- arch/arm/mach-omap2/board-rx51-peripherals.c | 2 +- 5 files changed, 19 insertions(+), 19 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index de88c9297b68..f49ce85d2448 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -215,7 +215,7 @@ static struct omap_kp_platform_data ams_delta_kp_data __initdata = { .delay = 9, }; -static struct platform_device ams_delta_kp_device __initdata = { +static struct platform_device ams_delta_kp_device = { .name = "omap-keypad", .id = -1, .dev = { @@ -225,12 +225,12 @@ static struct platform_device ams_delta_kp_device __initdata = { .resource = ams_delta_kp_resources, }; -static struct platform_device ams_delta_lcd_device __initdata = { +static struct platform_device ams_delta_lcd_device = { .name = "lcd_ams_delta", .id = -1, }; -static struct platform_device ams_delta_led_device __initdata = { +static struct platform_device ams_delta_led_device = { .name = "ams-delta-led", .id = -1 }; @@ -267,7 +267,7 @@ static struct soc_camera_link ams_delta_iclink = { .power = ams_delta_camera_power, }; -static struct platform_device ams_delta_camera_device __initdata = { +static struct platform_device ams_delta_camera_device = { .name = "soc-camera-pdrv", .id = 0, .dev = { diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c index 04c4b04cf54e..364137c2042c 100644 --- a/arch/arm/mach-omap1/gpio15xx.c +++ b/arch/arm/mach-omap1/gpio15xx.c @@ -41,7 +41,7 @@ static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = { .bank_stride = 1, }; -static struct __initdata platform_device omap15xx_mpu_gpio = { +static struct platform_device omap15xx_mpu_gpio = { .name = "omap_gpio", .id = 0, .dev = { @@ -70,7 +70,7 @@ static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = { .bank_width = 16, }; -static struct __initdata platform_device omap15xx_gpio = { +static struct platform_device omap15xx_gpio = { .name = "omap_gpio", .id = 1, .dev = { diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c index 5dd0d4c82b24..293a246e2824 100644 --- a/arch/arm/mach-omap1/gpio16xx.c +++ b/arch/arm/mach-omap1/gpio16xx.c @@ -44,7 +44,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = { .bank_stride = 1, }; -static struct __initdata platform_device omap16xx_mpu_gpio = { +static struct platform_device omap16xx_mpu_gpio = { .name = "omap_gpio", .id = 0, .dev = { @@ -73,7 +73,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = { .bank_width = 16, }; -static struct __initdata platform_device omap16xx_gpio1 = { +static struct platform_device omap16xx_gpio1 = { .name = "omap_gpio", .id = 1, .dev = { @@ -102,7 +102,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = { .bank_width = 16, }; -static struct __initdata platform_device omap16xx_gpio2 = { +static struct platform_device omap16xx_gpio2 = { .name = "omap_gpio", .id = 2, .dev = { @@ -131,7 +131,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = { .bank_width = 16, }; -static struct __initdata platform_device omap16xx_gpio3 = { +static struct platform_device omap16xx_gpio3 = { .name = "omap_gpio", .id = 3, .dev = { @@ -160,7 +160,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = { .bank_width = 16, }; -static struct __initdata platform_device omap16xx_gpio4 = { +static struct platform_device omap16xx_gpio4 = { .name = "omap_gpio", .id = 4, .dev = { diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c index 1204c8b871af..c6ad248d63a6 100644 --- a/arch/arm/mach-omap1/gpio7xx.c +++ b/arch/arm/mach-omap1/gpio7xx.c @@ -46,7 +46,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = { .bank_stride = 2, }; -static struct __initdata platform_device omap7xx_mpu_gpio = { +static struct platform_device omap7xx_mpu_gpio = { .name = "omap_gpio", .id = 0, .dev = { @@ -75,7 +75,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = { .bank_width = 32, }; -static struct __initdata platform_device omap7xx_gpio1 = { +static struct platform_device omap7xx_gpio1 = { .name = "omap_gpio", .id = 1, .dev = { @@ -104,7 +104,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = { .bank_width = 32, }; -static struct __initdata platform_device omap7xx_gpio2 = { +static struct platform_device omap7xx_gpio2 = { .name = "omap_gpio", .id = 2, .dev = { @@ -133,7 +133,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = { .bank_width = 32, }; -static struct __initdata platform_device omap7xx_gpio3 = { +static struct platform_device omap7xx_gpio3 = { .name = "omap_gpio", .id = 3, .dev = { @@ -162,7 +162,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = { .bank_width = 32, }; -static struct __initdata platform_device omap7xx_gpio4 = { +static struct platform_device omap7xx_gpio4 = { .name = "omap_gpio", .id = 4, .dev = { @@ -191,7 +191,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = { .bank_width = 32, }; -static struct __initdata platform_device omap7xx_gpio5 = { +static struct platform_device omap7xx_gpio5 = { .name = "omap_gpio", .id = 5, .dev = { @@ -220,7 +220,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = { .bank_width = 32, }; -static struct __initdata platform_device omap7xx_gpio6 = { +static struct platform_device omap7xx_gpio6 = { .name = "omap_gpio", .id = 6, .dev = { diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 990366726c58..88bd6f7705f0 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -558,7 +558,7 @@ static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = .subdev_board_info = &rx51_si4713_board_info, }; -static struct platform_device rx51_si4713_dev __initdata_or_module = { +static struct platform_device rx51_si4713_dev = { .name = "radio-si4713", .id = -1, .dev = { -- cgit v1.2.3 From f4f38430c94c38187db73a2cf3892cc8b12a2713 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Fri, 1 Jul 2011 14:38:12 +0100 Subject: ARM: 6989/1: perf: do not start the PMU when no events are present armpmu_enable can be called in situations where no events are present (for example, from the event rotation tick after a profiled task has exited). In this case, we currently start the PMU anyway which may leave it active inevitably without any events being monitored. This patch adds a simple check to the enabling code so that we avoid starting the PMU when no events are present. Cc: Reported-by: Ashwin Chaugle Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/kernel/perf_event.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index d53c0abc4dd3..2b5b1421596c 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c @@ -583,7 +583,7 @@ static int armpmu_event_init(struct perf_event *event) static void armpmu_enable(struct pmu *pmu) { /* Enable all of the perf events on hardware. */ - int idx; + int idx, enabled = 0; struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); if (!armpmu) @@ -596,9 +596,11 @@ static void armpmu_enable(struct pmu *pmu) continue; armpmu->enable(&event->hw, idx); + enabled = 1; } - armpmu->start(); + if (enabled) + armpmu->start(); } static void armpmu_disable(struct pmu *pmu) -- cgit v1.2.3 From 0371d3f7e8f1cddaee1f215e42c09a40e235d810 Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 5 Jul 2011 19:58:29 +0100 Subject: ARM: move memory layout sanity checking before meminfo initialization Ensure that the meminfo array is sanity checked before we pass the memory to memblock. This helps to ensure that memblock and meminfo agree on the dimensions of memory, especially when more memory is passed than the kernel can deal with. Acked-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/kernel/setup.c | 2 ++ arch/arm/mm/mmu.c | 5 +++-- arch/arm/mm/nommu.c | 4 ++++ 3 files changed, 9 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index ed11fb08b05a..acbb447ac6b5 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -73,6 +73,7 @@ __setup("fpe=", fpe_setup); #endif extern void paging_init(struct machine_desc *desc); +extern void sanity_check_meminfo(void); extern void reboot_setup(char *str); unsigned int processor_id; @@ -900,6 +901,7 @@ void __init setup_arch(char **cmdline_p) parse_early_param(); + sanity_check_meminfo(); arm_memblock_init(&meminfo, mdesc); paging_init(mdesc); diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 9d9e736c2b4f..594d677b92c8 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -759,7 +759,7 @@ early_param("vmalloc", early_vmalloc); static phys_addr_t lowmem_limit __initdata = 0; -static void __init sanity_check_meminfo(void) +void __init sanity_check_meminfo(void) { int i, j, highmem = 0; @@ -1032,8 +1032,9 @@ void __init paging_init(struct machine_desc *mdesc) { void *zero_page; + memblock_set_current_limit(lowmem_limit); + build_mem_type_table(); - sanity_check_meminfo(); prepare_page_table(); map_lowmem(); devicemaps_init(mdesc); diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c index 687d02319a41..941a98c9e8aa 100644 --- a/arch/arm/mm/nommu.c +++ b/arch/arm/mm/nommu.c @@ -27,6 +27,10 @@ void __init arm_mm_memblock_reserve(void) memblock_reserve(CONFIG_VECTORS_BASE, PAGE_SIZE); } +void __init sanity_check_meminfo(void) +{ +} + /* * paging_init() sets up the page tables, initialises the zone memory * maps, and sets up the zero page, bad page and bad page tables. -- cgit v1.2.3 From a0d8efedb203b5b908dd46cea38201761e2380f9 Mon Sep 17 00:00:00 2001 From: Thomas Abraham Date: Thu, 16 Jun 2011 16:12:35 +0900 Subject: ARM: EXYNOS4: Fix card detection for sdhci 0 and 2 On SMDKV310 board, a card detect gpio pin is available that is directly connected to the io pad of the sdhci controller. Fix incorrect value of cd_type field in platform data for sdhci instance 0 and 2. Signed-off-by: Thomas Abraham Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos4/mach-smdkv310.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-exynos4/mach-smdkv310.c index 152676471b67..edd814110da8 100644 --- a/arch/arm/mach-exynos4/mach-smdkv310.c +++ b/arch/arm/mach-exynos4/mach-smdkv310.c @@ -78,9 +78,7 @@ static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = { }; static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_GPIO, - .ext_cd_gpio = EXYNOS4_GPK0(2), - .ext_cd_gpio_invert = 1, + .cd_type = S3C_SDHCI_CD_INTERNAL, .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT .max_width = 8, @@ -96,9 +94,7 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = { }; static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_GPIO, - .ext_cd_gpio = EXYNOS4_GPK2(2), - .ext_cd_gpio_invert = 1, + .cd_type = S3C_SDHCI_CD_INTERNAL, .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT .max_width = 8, -- cgit v1.2.3 From a3df1d4811bb7710d6497334e3b6a37064527684 Mon Sep 17 00:00:00 2001 From: Naveen Krishna Chatradhi Date: Thu, 16 Jun 2011 19:33:29 +0900 Subject: ARM: EXYNOS4: fix improper gpio configuration These pins are incorrectly configured for PCM2 configure them to SPDIF(_OUT & _EXT_CLK) Signed-off-by: Naveen Krishna Chatradhi Acked-by: Jassi Brar Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos4/dev-audio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-exynos4/dev-audio.c b/arch/arm/mach-exynos4/dev-audio.c index 1eed5f9f7bd3..983069a53239 100644 --- a/arch/arm/mach-exynos4/dev-audio.c +++ b/arch/arm/mach-exynos4/dev-audio.c @@ -330,7 +330,7 @@ struct platform_device exynos4_device_ac97 = { static int exynos4_spdif_cfg_gpio(struct platform_device *pdev) { - s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(4)); return 0; } -- cgit v1.2.3 From bb8bb57b213f63ffba29b3a7f1c7974782b8127d Mon Sep 17 00:00:00 2001 From: MyungJoo Ham Date: Wed, 22 Jun 2011 18:03:21 +0900 Subject: ARM: SAMSUNG: header file revised to prevent declaring duplicated There has been no #ifndef - #define - #endif protection for this header file. Signed-off-by: MyungJoo Ham Signed-off-by: Kukjin Kim --- arch/arm/plat-samsung/include/plat/devs.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index 4af108ff4112..e3b31c26ac3e 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h @@ -12,6 +12,10 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ + +#ifndef __PLAT_DEVS_H +#define __PLAT_DEVS_H __FILE__ + #include struct s3c24xx_uart_resources { @@ -159,3 +163,5 @@ extern struct platform_device s3c_device_ac97; */ extern void *s3c_set_platdata(void *pd, size_t pdsize, struct platform_device *pdev); + +#endif /* __PLAT_DEVS_H */ -- cgit v1.2.3 From 27ea7fd2889eb93041480b18de655b1ff003e05d Mon Sep 17 00:00:00 2001 From: Sangbeom Kim Date: Thu, 23 Jun 2011 21:43:58 +0900 Subject: ARM: S5P: Fix bug on init of PWMTimers for HRTimer This patch fixes following. <6>[ 0.000000] sched_clock: 32 bits at 33MHz, ... <6>[ 128.651309] Calibrating delay loop... There is a big jump. The reason is that PWM Timer which is for HRTimer was used before its initialization. So this patch changes its order and following is kernel boot log message after this. <6>[ 0.000000] sched_clock: 32 bits at 33MHz, ... <6>[ 0.000088] Calibrating delay loop... Signed-off-by: Sangbeom Kim Signed-off-by: Kukjin Kim --- arch/arm/plat-s5p/s5p-time.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-s5p/s5p-time.c index 899a8cc011ff..612934c48b0d 100644 --- a/arch/arm/plat-s5p/s5p-time.c +++ b/arch/arm/plat-s5p/s5p-time.c @@ -370,11 +370,11 @@ static void __init s5p_clocksource_init(void) clock_rate = clk_get_rate(tin_source); - init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate); - s5p_time_setup(timer_source.source_id, TCNT_MAX); s5p_time_start(timer_source.source_id, PERIODIC); + init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate); + if (clocksource_register_hz(&time_clocksource, clock_rate)) panic("%s: can't register clocksource\n", time_clocksource.name); } -- cgit v1.2.3 From 152c036a8096ed219c965957acb63490a2c0c963 Mon Sep 17 00:00:00 2001 From: MyungJoo Ham Date: Mon, 4 Jul 2011 19:03:54 +0900 Subject: ARM: EXYNOS4: Address a section mismatch w/ suspend issue. The section mismatch in headsmp.S made hotplug stop working after the first instance of suspend-to-RAM and its wakeup. Signed-off-by: MyungJoo Ham Signed-off-by: Kyungmin Park Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos4/headsmp.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-exynos4/headsmp.S b/arch/arm/mach-exynos4/headsmp.S index 6c6cfc50c46b..3cdeb3647542 100644 --- a/arch/arm/mach-exynos4/headsmp.S +++ b/arch/arm/mach-exynos4/headsmp.S @@ -13,7 +13,7 @@ #include #include - __INIT + __CPUINIT /* * exynos4 specific entry point for secondary CPUs. This provides -- cgit v1.2.3 From b49c78d4827be8d7e67e5b94adac6b30a4a9ad14 Mon Sep 17 00:00:00 2001 From: Peter Chubb Date: Wed, 6 Jul 2011 10:56:30 +1000 Subject: x86, reboot: Acer Aspire One A110 reboot quirk Since git commit 660e34cebf0a11d54f2d5dd8838607452355f321 x86: reorder reboot method preferences, my Acer Aspire One hangs on reboot. It appears that its ACPI method for rebooting is broken. The attached patch adds a quirk so that the machine will reboot via the BIOS. [ hpa: verified that the ACPI control on this machine is just plain broken. ] Signed-off-by: Peter Chubb Link: http://lkml.kernel.org/r/w439iki5vl.wl%25peter@chubb.wattle.id.au Signed-off-by: H. Peter Anvin --- arch/x86/kernel/reboot.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch') diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index 0c016f727695..4f0d46fefa7f 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c @@ -294,6 +294,14 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = { DMI_MATCH(DMI_BOARD_NAME, "VersaLogic Menlow board"), }, }, + { /* Handle reboot issue on Acer Aspire one */ + .callback = set_bios_reboot, + .ident = "Acer Aspire One A110", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Acer"), + DMI_MATCH(DMI_PRODUCT_NAME, "AOA110"), + }, + }, { } }; -- cgit v1.2.3 From 8918034dfb7b0f625ba9eb0329d5750a9573f62e Mon Sep 17 00:00:00 2001 From: Padmavathi Venna Date: Tue, 5 Jul 2011 17:13:56 +0900 Subject: ARM: SAMSUNG: Add tx_st_done variable tx_st_done is required for checking the transmission status of SPI channels with different fifo levels Signed-off-by: Padmavathi Venna Acked-by: Jassi Brar Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/dev-spi.c | 2 ++ arch/arm/mach-s5p64x0/dev-spi.c | 4 ++++ arch/arm/mach-s5pc100/dev-spi.c | 3 +++ arch/arm/mach-s5pv210/dev-spi.c | 2 ++ arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | 2 ++ 5 files changed, 13 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c index 82db072cb836..5e6b42089eb4 100644 --- a/arch/arm/mach-s3c64xx/dev-spi.c +++ b/arch/arm/mach-s3c64xx/dev-spi.c @@ -88,6 +88,7 @@ static struct s3c64xx_spi_info s3c64xx_spi0_pdata = { .cfg_gpio = s3c64xx_spi_cfg_gpio, .fifo_lvl_mask = 0x7f, .rx_lvl_offset = 13, + .tx_st_done = 21, }; static u64 spi_dmamask = DMA_BIT_MASK(32); @@ -132,6 +133,7 @@ static struct s3c64xx_spi_info s3c64xx_spi1_pdata = { .cfg_gpio = s3c64xx_spi_cfg_gpio, .fifo_lvl_mask = 0x7f, .rx_lvl_offset = 13, + .tx_st_done = 21, }; struct platform_device s3c64xx_device_spi1 = { diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c index e78ee18c76e3..ac825e826326 100644 --- a/arch/arm/mach-s5p64x0/dev-spi.c +++ b/arch/arm/mach-s5p64x0/dev-spi.c @@ -112,12 +112,14 @@ static struct s3c64xx_spi_info s5p6440_spi0_pdata = { .cfg_gpio = s5p6440_spi_cfg_gpio, .fifo_lvl_mask = 0x1ff, .rx_lvl_offset = 15, + .tx_st_done = 25, }; static struct s3c64xx_spi_info s5p6450_spi0_pdata = { .cfg_gpio = s5p6450_spi_cfg_gpio, .fifo_lvl_mask = 0x1ff, .rx_lvl_offset = 15, + .tx_st_done = 25, }; static u64 spi_dmamask = DMA_BIT_MASK(32); @@ -160,12 +162,14 @@ static struct s3c64xx_spi_info s5p6440_spi1_pdata = { .cfg_gpio = s5p6440_spi_cfg_gpio, .fifo_lvl_mask = 0x7f, .rx_lvl_offset = 15, + .tx_st_done = 25, }; static struct s3c64xx_spi_info s5p6450_spi1_pdata = { .cfg_gpio = s5p6450_spi_cfg_gpio, .fifo_lvl_mask = 0x7f, .rx_lvl_offset = 15, + .tx_st_done = 25, }; struct platform_device s5p64x0_device_spi1 = { diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c index 57b19794d9bb..2b58c9a2cf70 100644 --- a/arch/arm/mach-s5pc100/dev-spi.c +++ b/arch/arm/mach-s5pc100/dev-spi.c @@ -90,6 +90,7 @@ static struct s3c64xx_spi_info s5pc100_spi0_pdata = { .fifo_lvl_mask = 0x7f, .rx_lvl_offset = 13, .high_speed = 1, + .tx_st_done = 21, }; static u64 spi_dmamask = DMA_BIT_MASK(32); @@ -134,6 +135,7 @@ static struct s3c64xx_spi_info s5pc100_spi1_pdata = { .fifo_lvl_mask = 0x7f, .rx_lvl_offset = 13, .high_speed = 1, + .tx_st_done = 21, }; struct platform_device s5pc100_device_spi1 = { @@ -176,6 +178,7 @@ static struct s3c64xx_spi_info s5pc100_spi2_pdata = { .fifo_lvl_mask = 0x7f, .rx_lvl_offset = 13, .high_speed = 1, + .tx_st_done = 21, }; struct platform_device s5pc100_device_spi2 = { diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c index e3249a47e3b1..eaf9a7bff7a0 100644 --- a/arch/arm/mach-s5pv210/dev-spi.c +++ b/arch/arm/mach-s5pv210/dev-spi.c @@ -85,6 +85,7 @@ static struct s3c64xx_spi_info s5pv210_spi0_pdata = { .fifo_lvl_mask = 0x1ff, .rx_lvl_offset = 15, .high_speed = 1, + .tx_st_done = 25, }; static u64 spi_dmamask = DMA_BIT_MASK(32); @@ -129,6 +130,7 @@ static struct s3c64xx_spi_info s5pv210_spi1_pdata = { .fifo_lvl_mask = 0x7f, .rx_lvl_offset = 15, .high_speed = 1, + .tx_st_done = 25, }; struct platform_device s5pv210_device_spi1 = { diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h index 0ffe34a21554..4c16fa3621bb 100644 --- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h +++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h @@ -39,6 +39,7 @@ struct s3c64xx_spi_csinfo { * @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6 * @rx_lvl_offset: Depends on tx fifo_lvl field and bus number * @high_speed: If the controller supports HIGH_SPEED_EN bit + * @tx_st_done: Depends on tx fifo_lvl field */ struct s3c64xx_spi_info { int src_clk_nr; @@ -53,6 +54,7 @@ struct s3c64xx_spi_info { int fifo_lvl_mask; int rx_lvl_offset; int high_speed; + int tx_st_done; }; /** -- cgit v1.2.3 From 8fa9dd04b7f7ab1807ebcc274601dd8e2d215569 Mon Sep 17 00:00:00 2001 From: Padmavathi Venna Date: Wed, 6 Jul 2011 15:37:08 +0900 Subject: ARM: S5PC100: Fix for compilation error S5PC100 Compilation fails without this patch Signed-off-by: Padmavathi Venna Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pc100/dev-spi.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c index 57b19794d9bb..cd7ca47d8746 100644 --- a/arch/arm/mach-s5pc100/dev-spi.c +++ b/arch/arm/mach-s5pc100/dev-spi.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include -- cgit v1.2.3 From 5f27275edb7082505eaac1c85a15620207351b63 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 6 Jul 2011 16:04:09 +0900 Subject: ARM: EXYNOS4: Set appropriate I2C device variant Set up a correct I2C bus controller variant name for Exynos4. Without this change the I2C bus driver fails to acquire its clocks. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos4/cpu.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c index 9babe4473e88..bfd621460abf 100644 --- a/arch/arm/mach-exynos4/cpu.c +++ b/arch/arm/mach-exynos4/cpu.c @@ -23,6 +23,7 @@ #include #include #include +#include #include @@ -132,6 +133,11 @@ void __init exynos4_map_io(void) s3c_fimc_setname(1, "exynos4-fimc"); s3c_fimc_setname(2, "exynos4-fimc"); s3c_fimc_setname(3, "exynos4-fimc"); + + /* The I2C bus controllers are directly compatible with s3c2440 */ + s3c_i2c0_setname("s3c2440-i2c"); + s3c_i2c1_setname("s3c2440-i2c"); + s3c_i2c2_setname("s3c2440-i2c"); } void __init exynos4_init_clocks(int xtal) -- cgit v1.2.3 From 8d54297b90831b6e87e62ad910f833b8666094c8 Mon Sep 17 00:00:00 2001 From: Christian Riesch Date: Tue, 28 Jun 2011 15:10:51 +0000 Subject: davinci: da850: add a .set_rate method to ref_clk This patch allows setting the input clock frequency of the SoC from the board specific code using the davinci_set_refclk_rate function. Suggested-by: Kevin Hilman Signed-off-by: Christian Riesch Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/da850.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 133aac405853..4e22b8da3493 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -58,6 +58,7 @@ static struct pll_data pll0_data = { static struct clk ref_clk = { .name = "ref_clk", .rate = DA850_REF_FREQ, + .set_rate = davinci_simple_set_rate, }; static struct clk pll0_clk = { -- cgit v1.2.3 From 2eb5af44b1d22d7f7b715e0b9a4e516eb4451bf9 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 28 Jun 2011 09:53:20 +0100 Subject: ARM: 6979/1: mach-vt8500: add forgotten irq_data conversion This platform has not been converted to 'struct irq_data' when the big pile was done and fails to compile nowadays. Tested on a JayPC-Tablet. Signed-off-by: Wolfram Sang Acked-by: Alexey Charkov Signed-off-by: Russell King --- arch/arm/mach-vt8500/irq.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-vt8500/irq.c b/arch/arm/mach-vt8500/irq.c index 245140c0df10..642de0408f25 100644 --- a/arch/arm/mach-vt8500/irq.c +++ b/arch/arm/mach-vt8500/irq.c @@ -39,9 +39,10 @@ static void __iomem *ic_regbase; static void __iomem *sic_regbase; -static void vt8500_irq_mask(unsigned int irq) +static void vt8500_irq_mask(struct irq_data *d) { void __iomem *base = ic_regbase; + unsigned irq = d->irq; u8 edge; if (irq >= 64) { @@ -64,9 +65,10 @@ static void vt8500_irq_mask(unsigned int irq) } } -static void vt8500_irq_unmask(unsigned int irq) +static void vt8500_irq_unmask(struct irq_data *d) { void __iomem *base = ic_regbase; + unsigned irq = d->irq; u8 dctr; if (irq >= 64) { @@ -78,10 +80,11 @@ static void vt8500_irq_unmask(unsigned int irq) writeb(dctr, base + VT8500_IC_DCTR + irq); } -static int vt8500_irq_set_type(unsigned int irq, unsigned int flow_type) +static int vt8500_irq_set_type(struct irq_data *d, unsigned int flow_type) { void __iomem *base = ic_regbase; - unsigned int orig_irq = irq; + unsigned irq = d->irq; + unsigned orig_irq = irq; u8 dctr; if (irq >= 64) { @@ -114,11 +117,11 @@ static int vt8500_irq_set_type(unsigned int irq, unsigned int flow_type) } static struct irq_chip vt8500_irq_chip = { - .name = "vt8500", - .ack = vt8500_irq_mask, - .mask = vt8500_irq_mask, - .unmask = vt8500_irq_unmask, - .set_type = vt8500_irq_set_type, + .name = "vt8500", + .irq_ack = vt8500_irq_mask, + .irq_mask = vt8500_irq_mask, + .irq_unmask = vt8500_irq_unmask, + .irq_set_type = vt8500_irq_set_type, }; void __init vt8500_init_irq(void) -- cgit v1.2.3 From 186dcaa448c0a7a99933efac2af225fc4fe82c53 Mon Sep 17 00:00:00 2001 From: Petr Štetiar Date: Fri, 17 Jun 2011 11:10:04 +0100 Subject: ARM: 6966/1: ep93xx: fix inverted RTS/DTR signals on uart1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It was discovered by Roberto Bergo, that RTS/DTR signals are inverted after the boot, because it was causing him problems with hardware controlled modem connected on ttyAM0. Todd Valentic came with this patch for the issue. Discussion: http://tech.groups.yahoo.com/group/ts-7000/message/20259 Comments from Petr Štetiar: Sorry, but forget to add Acked-by[1]: 1. https://patchwork.kernel.org/patch/873052/ Cc: Ryan Mallon Cc: Hartley Sweeten Signed-off-by: Todd Valentic Tested-by: Roberto Bergo Signed-off-by: Petr Štetiar Acked-by: H Hartley Sweeten Signed-off-by: Russell King --- arch/arm/mach-ep93xx/core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 1d4b65fd673e..6659a0d137a3 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -251,9 +251,9 @@ static void ep93xx_uart_set_mctrl(struct amba_device *dev, unsigned int mcr; mcr = 0; - if (!(mctrl & TIOCM_RTS)) + if (mctrl & TIOCM_RTS) mcr |= 2; - if (!(mctrl & TIOCM_DTR)) + if (mctrl & TIOCM_DTR) mcr |= 1; __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET); -- cgit v1.2.3 From 38a8914f9ac2379293944f613e6ca24b61373de8 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Fri, 1 Jul 2011 14:36:19 +0100 Subject: ARM: 6987/1: l2x0: fix disabling function to avoid deadlock The l2x0_disable function attempts to writel with the l2x0_lock held. This results in deadlock when the writel contains an outer_sync call for the platform since the l2x0_lock is already held by the disable function. A further problem is that disabling the L2 without flushing it first can lead to the spin_lock operation becoming visible after the spin_unlock, causing any subsequent L2 maintenance to deadlock. This patch replaces the writel with a call to writel_relaxed in the disabling code and adds a flush before disabling in the control register, preventing livelock from occurring. Acked-by: Catalin Marinas Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/mm/cache-l2x0.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index ef59099a5463..44c086710d2b 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -120,17 +120,22 @@ static void l2x0_cache_sync(void) spin_unlock_irqrestore(&l2x0_lock, flags); } -static void l2x0_flush_all(void) +static void __l2x0_flush_all(void) { - unsigned long flags; - - /* clean all ways */ - spin_lock_irqsave(&l2x0_lock, flags); debug_writel(0x03); writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_INV_WAY); cache_wait_way(l2x0_base + L2X0_CLEAN_INV_WAY, l2x0_way_mask); cache_sync(); debug_writel(0x00); +} + +static void l2x0_flush_all(void) +{ + unsigned long flags; + + /* clean all ways */ + spin_lock_irqsave(&l2x0_lock, flags); + __l2x0_flush_all(); spin_unlock_irqrestore(&l2x0_lock, flags); } @@ -266,7 +271,9 @@ static void l2x0_disable(void) unsigned long flags; spin_lock_irqsave(&l2x0_lock, flags); - writel(0, l2x0_base + L2X0_CTRL); + __l2x0_flush_all(); + writel_relaxed(0, l2x0_base + L2X0_CTRL); + dsb(); spin_unlock_irqrestore(&l2x0_lock, flags); } -- cgit v1.2.3 From 7a3136666bc0f0419f7aaa7b1fabb4b0e0a7fb76 Mon Sep 17 00:00:00 2001 From: Kees Cook Date: Wed, 6 Jul 2011 18:10:34 -0700 Subject: x86, suspend: Restore MISC_ENABLE MSR in realmode wakeup Some BIOSes will reset the Intel MISC_ENABLE MSR (specifically the XD_DISABLE bit) when resuming from S3, which can interact poorly with ebba638ae723d8a8fc2f7abce5ec18b688b791d7. In 32bit PAE mode, this can lead to a fault when EFER is restored by the kernel wakeup routines, due to it setting the NX bit for a CPU that (thanks to the BIOS reset) now incorrectly thinks it lacks the NX feature. (64bit is not affected because it uses a common CPU bring-up that specifically handles the XD_DISABLE bit.) The need for MISC_ENABLE being restored so early is specific to the S3 resume path. Normally, MISC_ENABLE is saved in save_processor_state(), but this happens after the resume header is created, so just reproduce the logic here. (acpi_suspend_lowlevel() creates the header, calls do_suspend_lowlevel, which calls save_processor_state(), so the saved processor context isn't available during resume header creation.) [ hpa: Consider for stable if OK in mainline ] Signed-off-by: Kees Cook Link: http://lkml.kernel.org/r/20110707011034.GA8523@outflux.net Signed-off-by: H. Peter Anvin Cc: Rafael J. Wysocki Cc: 2.6.38+ --- arch/x86/kernel/acpi/realmode/wakeup.S | 14 ++++++++++++++ arch/x86/kernel/acpi/realmode/wakeup.h | 6 ++++++ arch/x86/kernel/acpi/sleep.c | 6 ++++++ 3 files changed, 26 insertions(+) (limited to 'arch') diff --git a/arch/x86/kernel/acpi/realmode/wakeup.S b/arch/x86/kernel/acpi/realmode/wakeup.S index ead21b663117..b4fd836e4053 100644 --- a/arch/x86/kernel/acpi/realmode/wakeup.S +++ b/arch/x86/kernel/acpi/realmode/wakeup.S @@ -28,6 +28,8 @@ pmode_cr3: .long 0 /* Saved %cr3 */ pmode_cr4: .long 0 /* Saved %cr4 */ pmode_efer: .quad 0 /* Saved EFER */ pmode_gdt: .quad 0 +pmode_misc_en: .quad 0 /* Saved MISC_ENABLE MSR */ +pmode_behavior: .long 0 /* Wakeup behavior flags */ realmode_flags: .long 0 real_magic: .long 0 trampoline_segment: .word 0 @@ -91,6 +93,18 @@ wakeup_code: /* Call the C code */ calll main + /* Restore MISC_ENABLE before entering protected mode, in case + BIOS decided to clear XD_DISABLE during S3. */ + movl pmode_behavior, %eax + btl $WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE, %eax + jnc 1f + + movl pmode_misc_en, %eax + movl pmode_misc_en + 4, %edx + movl $MSR_IA32_MISC_ENABLE, %ecx + wrmsr +1: + /* Do any other stuff... */ #ifndef CONFIG_64BIT diff --git a/arch/x86/kernel/acpi/realmode/wakeup.h b/arch/x86/kernel/acpi/realmode/wakeup.h index e1828c07e79c..97a29e1430e3 100644 --- a/arch/x86/kernel/acpi/realmode/wakeup.h +++ b/arch/x86/kernel/acpi/realmode/wakeup.h @@ -21,6 +21,9 @@ struct wakeup_header { u32 pmode_efer_low; /* Protected mode EFER */ u32 pmode_efer_high; u64 pmode_gdt; + u32 pmode_misc_en_low; /* Protected mode MISC_ENABLE */ + u32 pmode_misc_en_high; + u32 pmode_behavior; /* Wakeup routine behavior flags */ u32 realmode_flags; u32 real_magic; u16 trampoline_segment; /* segment with trampoline code, 64-bit only */ @@ -39,4 +42,7 @@ extern struct wakeup_header wakeup_header; #define WAKEUP_HEADER_SIGNATURE 0x51ee1111 #define WAKEUP_END_SIGNATURE 0x65a22c82 +/* Wakeup behavior bits */ +#define WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE 0 + #endif /* ARCH_X86_KERNEL_ACPI_RM_WAKEUP_H */ diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c index 18a857ba7a25..103b6ab368d3 100644 --- a/arch/x86/kernel/acpi/sleep.c +++ b/arch/x86/kernel/acpi/sleep.c @@ -77,6 +77,12 @@ int acpi_suspend_lowlevel(void) header->pmode_cr0 = read_cr0(); header->pmode_cr4 = read_cr4_safe(); + header->pmode_behavior = 0; + if (!rdmsr_safe(MSR_IA32_MISC_ENABLE, + &header->pmode_misc_en_low, + &header->pmode_misc_en_high)) + header->pmode_behavior |= + (1 << WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE); header->realmode_flags = acpi_realmode_flags; header->real_magic = 0x12345678; -- cgit v1.2.3 From 9bb7fa1e6598e73172499f6120dad9bf59bb3844 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 25 May 2011 21:55:38 +0800 Subject: ARM: mxs_defconfig: Change CONFIG_RTC_CLASS 'm' to 'y' The patch fixes the warning below. arch/arm/configs/mxs_defconfig:92:warning: symbol value 'm' invalid for RTC_CLASS Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer --- arch/arm/configs/mxs_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig index 2bf224310fb4..5a6ff7c605df 100644 --- a/arch/arm/configs/mxs_defconfig +++ b/arch/arm/configs/mxs_defconfig @@ -89,7 +89,7 @@ CONFIG_DISPLAY_SUPPORT=m # CONFIG_USB_SUPPORT is not set CONFIG_MMC=y CONFIG_MMC_MXS=y -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_DS1307=m CONFIG_DMADEVICES=y CONFIG_MXS_DMA=y -- cgit v1.2.3 From 38c7364917650e809945a4ad1b703f333564905e Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 28 May 2011 11:11:34 -0300 Subject: mx51: Let USB Storage be built by default Let USB Storage be built by default. Also select NLS_ISO8859 so that the USB device can be mounted. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/configs/mx51_defconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig index 0ace16cba9b5..88c5802a2351 100644 --- a/arch/arm/configs/mx51_defconfig +++ b/arch/arm/configs/mx51_defconfig @@ -106,6 +106,7 @@ CONFIG_GPIO_SYSFS=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_MXC=y +CONFIG_USB_STORAGE=y CONFIG_MMC=y CONFIG_MMC_BLOCK=m CONFIG_MMC_SDHCI=m @@ -145,7 +146,7 @@ CONFIG_ROOT_NFS=y CONFIG_NLS_DEFAULT="cp437" CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=y -CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_1=y CONFIG_NLS_ISO8859_15=m CONFIG_NLS_UTF8=y CONFIG_MAGIC_SYSRQ=y -- cgit v1.2.3 From f2abaae42eaf9ee617d8ea59090306da82f956c7 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 4 Jun 2011 13:35:00 -0300 Subject: ARM: mx53: Fix alternate modes for MX53_PAD_PATA_DATA6 MX53_PAD_PATA_DATA6 can have the following alternate modes: PATA_DATA_6: mode 0 GPIO2_6: mode 1 EMI_NANDF_D_6: mode 3 ESDHC4_DAT6 mode 4 GPU3d_GPU_DEBUG_OUT_6 mode 5 IPU_DIAG_BUS_6 mode 6 Fix the modes accordingly. Signed-off-by: Fabio Estevam Signed-off-by: Dinh Nguyen Acked-by: Olof Johansson Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/iomux-mx53.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h index e95d9cb8aeb7..50b88a404fe4 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx53.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx53.h @@ -958,12 +958,12 @@ #define _MX53_PAD_PATA_DATA5__ESDHC4_DAT5 IOMUX_PAD(0x63C, 0x2B8, 4, 0x0, 0, 0) #define _MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5 IOMUX_PAD(0x63C, 0x2B8, 5, 0x0, 0, 0) #define _MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5 IOMUX_PAD(0x63C, 0x2B8, 6, 0x0, 0, 0) -#define _MX53_PAD_PATA_DATA6__PATA_DATA_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) +#define _MX53_PAD_PATA_DATA6__PATA_DATA_6 IOMUX_PAD(0x640, 0x2BC, 0, 0x0, 0, 0) #define _MX53_PAD_PATA_DATA6__GPIO2_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) -#define _MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) -#define _MX53_PAD_PATA_DATA6__ESDHC4_DAT6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) -#define _MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) -#define _MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) +#define _MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 IOMUX_PAD(0x640, 0x2BC, 3, 0x0, 0, 0) +#define _MX53_PAD_PATA_DATA6__ESDHC4_DAT6 IOMUX_PAD(0x640, 0x2BC, 4, 0x0, 0, 0) +#define _MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 IOMUX_PAD(0x640, 0x2BC, 5, 0x0, 0, 0) +#define _MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 IOMUX_PAD(0x640, 0x2BC, 6, 0x0, 0, 0) #define _MX53_PAD_PATA_DATA7__PATA_DATA_7 IOMUX_PAD(0x644, 0x2C0, 0, 0x0, 0, 0) #define _MX53_PAD_PATA_DATA7__GPIO2_7 IOMUX_PAD(0x644, 0x2C0, 1, 0x0, 0, 0) #define _MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 IOMUX_PAD(0x644, 0x2C0, 3, 0x0, 0, 0) -- cgit v1.2.3 From 2aee401e03da21e81ed995dda6f8e8126058f822 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 3 Jun 2011 16:10:15 -0300 Subject: ARM: mx53: Fix the chip select addresses MX53 has 4 chip selects (CS0 - CS3) and the valid combinations are: - CS0 (128MB) - CS0 (64MB), CS1 (64MB) - CS0 (64MB), CS1 (32MB), CS2 (32MB) - CS0 (32MB), CS1 (32MB), CS2 (32MB) , CS3 (32MB) Fix these addresses and also take into account all the four possibilities. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/mx53.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index 9d2a1ef84de2..5a2104eed648 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h @@ -147,12 +147,12 @@ */ #define MX53_CSD0_BASE_ADDR 0x90000000 #define MX53_CSD1_BASE_ADDR 0xA0000000 -#define MX53_CS0_BASE_ADDR 0xB0000000 -#define MX53_CS1_BASE_ADDR 0xB8000000 -#define MX53_CS2_BASE_ADDR 0xC0000000 -#define MX53_CS3_BASE_ADDR 0xC8000000 -#define MX53_CS4_BASE_ADDR 0xCC000000 -#define MX53_CS5_BASE_ADDR 0xCE000000 +#define MX53_CS0_BASE_ADDR 0xF0000000 +#define MX53_CS1_32MB_BASE_ADDR 0xF2000000 +#define MX53_CS1_64MB_BASE_ADDR 0xF4000000 +#define MX53_CS2_64MB_BASE_ADDR 0xF4000000 +#define MX53_CS2_96MB_BASE_ADDR 0xF6000000 +#define MX53_CS3_BASE_ADDR 0xF6000000 #define MX53_IO_P2V(x) IMX_IO_P2V(x) #define MX53_IO_ADDRESS(x) IOMEM(MX53_IO_P2V(x)) -- cgit v1.2.3 From 9333d8731f677e54d5dc28a1652d0879096d8537 Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Wed, 8 Jun 2011 17:56:38 +0200 Subject: ARM: mx53: Fix the base addresses for the DDR memory regions Signed-off-by: Marc Kleine-Budde Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/mx53.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index 5a2104eed648..e14a4f04c696 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h @@ -145,8 +145,8 @@ /* * Memory regions and CS */ -#define MX53_CSD0_BASE_ADDR 0x90000000 -#define MX53_CSD1_BASE_ADDR 0xA0000000 +#define MX53_CSD0_BASE_ADDR 0x70000000 +#define MX53_CSD1_BASE_ADDR 0xB0000000 #define MX53_CS0_BASE_ADDR 0xF0000000 #define MX53_CS1_32MB_BASE_ADDR 0xF2000000 #define MX53_CS1_64MB_BASE_ADDR 0xF4000000 -- cgit v1.2.3 From 98618cfe22a5dbb87c0deb341734436aeecd51bf Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Jun 2011 09:25:23 -0300 Subject: ARM: mach-imx/mx27_3ds: Use the standard i.MX macro for GPIO numbering Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mach-mx27_3ds.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 6e1accf93f81..c60cd3332e81 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -42,10 +42,10 @@ #include "devices-imx27.h" -#define SD1_EN_GPIO (GPIO_PORTB + 25) -#define OTG_PHY_RESET_GPIO (GPIO_PORTB + 23) -#define SPI2_SS0 (GPIO_PORTD + 21) -#define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTC + 28) +#define SD1_EN_GPIO IMX_GPIO_NR(2, 25) +#define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23) +#define SPI2_SS0 IMX_GPIO_NR(4, 21) +#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28)) static const int mx27pdk_pins[] __initconst = { /* UART1 */ -- cgit v1.2.3 From b2a08e3e46f594ad605c9b5f5fce6b9f36a9a3eb Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 20 Jun 2011 10:37:13 -0300 Subject: ARM: mach-imx/mx31_3ds: Fix IOMUX for SPI1 signals Original code was assuming that the CSPI1 pins on the MX31PDK were the primary pin function, which is incorrect. On MX31PDK board these are the pins that provide CSPI1 functionality: DSR_DCE1 (ALT mode 1) --> CSPI1_CLK RI_DCE1 (ALT mode 1) --> CSPI1_RDY DTR_DTE1 -->CSI1_MOSI DSR_DTE1 --> CSPI1_MISO DTR_DCE2 ---> CSPI1_SS2 The 3 IOMUX settings above are done via GPR as per Table A-1 of the MX31RM. This patch fixes the CSPI1 IOMUX and makes the LCD to be functional. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mach-mx31_3ds.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 9b982449cb52..62983bd07d6a 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c @@ -53,11 +53,8 @@ static int mx31_3ds_pins[] = { MX31_PIN_RXD1__RXD1, IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), /*SPI0*/ - MX31_PIN_CSPI1_SCLK__SCLK, - MX31_PIN_CSPI1_MOSI__MOSI, - MX31_PIN_CSPI1_MISO__MISO, - MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, - MX31_PIN_CSPI1_SS2__SS2, /* CS for LCD */ + IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_ALT1), + IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_ALT1), /* SPI 1 */ MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_MOSI__MOSI, @@ -689,6 +686,9 @@ static void __init mx31_3ds_init(void) { int ret; + /* Configure SPI1 IOMUX */ + mxc_iomux_set_gpr(MUX_PGP_CSPI_BB, true); + mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins), "mx31_3ds"); -- cgit v1.2.3 From 581f84e24b45ab871ae5f15f9290261c7226ffa9 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 21 Jun 2011 14:49:37 -0300 Subject: mxc: iomuxv1: Do not use gpio_request when setting the pin as GPIO When setting the IOMUX of multiple pins via mxc_gpio_setup_multiple_pins, gpio_request is called and this prevents subsequent calls of gpio_request done by drivers to succeed. Remove gpio_request call from mxc_gpio_setup_multiple_pins function. As gpio_request is removed from mxc_gpio_setup_multiple_pins, there is no need to have mxc_gpio_release_multiple_pins anymore, so remove this function. Tested on a mx27_3ds board and after applying this patch it is possible to define all the IOMUX setup in a static array Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/iomux-v1.h | 1 - arch/arm/plat-mxc/iomux-v1.c | 32 ------------------------------- 2 files changed, 33 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h index c07d30210c57..253d64d686f8 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v1.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h @@ -98,7 +98,6 @@ extern int mxc_gpio_mode(int gpio_mode); extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, const char *label); -extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count); extern int __init imx_iomuxv1_init(void __iomem *base, int numports); diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/plat-mxc/iomux-v1.c index 3238c10d4e02..d76f3ac25e5d 100644 --- a/arch/arm/plat-mxc/iomux-v1.c +++ b/arch/arm/plat-mxc/iomux-v1.c @@ -172,45 +172,13 @@ static int imx_iomuxv1_setup_multiple(const int *list, unsigned count) int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, const char *label) { - size_t i; int ret; - for (i = 0; i < count; ++i) { - unsigned gpio = pin_list[i] & (GPIO_PIN_MASK | GPIO_PORT_MASK); - - ret = gpio_request(gpio, label); - if (ret) - goto err_gpio_request; - } - ret = imx_iomuxv1_setup_multiple(pin_list, count); - if (ret) - goto err_setup; - - return 0; - -err_setup: - BUG_ON(i != count); - -err_gpio_request: - mxc_gpio_release_multiple_pins(pin_list, i); - return ret; } EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins); -void mxc_gpio_release_multiple_pins(const int *pin_list, int count) -{ - size_t i; - - for (i = 0; i < count; ++i) { - unsigned gpio = pin_list[i] & (GPIO_PIN_MASK | GPIO_PORT_MASK); - - gpio_free(gpio); - } -} -EXPORT_SYMBOL(mxc_gpio_release_multiple_pins); - int __init imx_iomuxv1_init(void __iomem *base, int numports) { imx_iomuxv1_baseaddr = base; -- cgit v1.2.3 From aec250dc123be14805d51d29d19bf9c3abf733fa Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Jun 2011 09:25:24 -0300 Subject: ARM: mach-imx/mx27_3ds: Fix regulator support Fix the 2.8V (VMMC1) and 1.8V (VGEN) voltage generation on mx27_3ds. Also configure the IOMUX for the PMIC interrupt pin and for the CSPI chip select that is connected to the MC13783 PMIC. In order to get the voltage for the LCD (2.8V and 1.8V) it is also necessary to turn on GPO1 and GPO3 supplies because they are connected to switches that enable these two voltages. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mach-mx27_3ds.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index c60cd3332e81..e7965ec176fc 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -46,6 +46,7 @@ #define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23) #define SPI2_SS0 IMX_GPIO_NR(4, 21) #define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28)) +#define PMIC_INT IMX_GPIO_NR(3, 14) static const int mx27pdk_pins[] __initconst = { /* UART1 */ @@ -98,9 +99,12 @@ static const int mx27pdk_pins[] __initconst = { PD22_PF_CSPI2_SCLK, PD23_PF_CSPI2_MISO, PD24_PF_CSPI2_MOSI, + SPI2_SS0 | GPIO_GPIO | GPIO_OUT, /* I2C1 */ PD17_PF_I2C_DATA, PD18_PF_I2C_CLK, + /* PMIC INT */ + PMIC_INT | GPIO_GPIO | GPIO_IN, }; static const struct imxuart_platform_data uart_pdata __initconst = { @@ -193,6 +197,13 @@ static int __init mx27_3ds_otg_mode(char *options) __setup("otg_mode=", mx27_3ds_otg_mode); /* Regulators */ +static struct regulator_init_data gpo_init = { + .constraints = { + .boot_on = 1, + .always_on = 1, + } +}; + static struct regulator_consumer_supply vmmc1_consumers[] = { REGULATOR_SUPPLY("lcd_2v8", NULL), }; @@ -201,7 +212,9 @@ static struct regulator_init_data vmmc1_init = { .constraints = { .min_uV = 2800000, .max_uV = 2800000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, }, .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers), .consumer_supplies = vmmc1_consumers, @@ -228,6 +241,12 @@ static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = { }, { .id = MC13783_REG_VGEN, .init_data = &vgen_init, + }, { + .id = MC13783_REG_GPO1, /* Turn on 1.8V */ + .init_data = &gpo_init, + }, { + .id = MC13783_REG_GPO3, /* Turn on 3.3V */ + .init_data = &gpo_init, }, }; -- cgit v1.2.3 From 6cecabb39122a859076d0bb23f8da4e00ece38de Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Jun 2011 11:31:00 -0300 Subject: ARM: mxc: iomux-v1: Fix build warning Fix the following warning: CC arch/arm/plat-mxc/iomux-v1.o arch/arm/plat-mxc/iomux-v1.c: In function 'mxc_gpio_setup_multiple_pins': arch/arm/plat-mxc/iomux-v1.c:160: warning: 'ret' may be used uninitialized in this function arch/arm/plat-mxc/iomux-v1.c:160: note: 'ret' was declared here Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/iomux-v1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/plat-mxc/iomux-v1.c index d76f3ac25e5d..1f73963bc13e 100644 --- a/arch/arm/plat-mxc/iomux-v1.c +++ b/arch/arm/plat-mxc/iomux-v1.c @@ -157,7 +157,7 @@ EXPORT_SYMBOL(mxc_gpio_mode); static int imx_iomuxv1_setup_multiple(const int *list, unsigned count) { size_t i; - int ret; + int ret = 0; for (i = 0; i < count; ++i) { ret = mxc_gpio_mode(list[i]); -- cgit v1.2.3 From 420766a97a93279ef5ccc096aa55ef8e03000e08 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 22 Jun 2011 22:41:26 +0800 Subject: ARM: mxc: imx-sdma device gets 16K iosize than 4K The sdma on all imx soc gets 16K IO space not 4K. Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/devices/platform-imx-dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index b130f60ca6b7..222e439aa7ff 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c @@ -57,7 +57,7 @@ static struct platform_device __init __maybe_unused *imx_add_imx_sdma( struct resource res[] = { { .start = data->iobase, - .end = data->iobase + SZ_4K - 1, + .end = data->iobase + SZ_16K - 1, .flags = IORESOURCE_MEM, }, { .start = data->irq, -- cgit v1.2.3 From aa5f380cb0ba36f396cc7e8a6857e898ec654466 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 22 Jun 2011 22:41:27 +0800 Subject: ARM: mxc: sdma on imx25 is a V2 block The sdma on soc imx25 is not a V1 but V2 block. Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/devices/platform-imx-dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index 222e439aa7ff..1c0ba53a2187 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c @@ -33,7 +33,7 @@ struct imx_imx_sdma_data { #ifdef CONFIG_SOC_IMX25 struct imx_imx_sdma_data imx25_imx_sdma_data __initconst = - imx_imx_sdma_data_entry_single(MX25, 1, "imx25", 0); + imx_imx_sdma_data_entry_single(MX25, 2, "imx25", 0); #endif /* ifdef CONFIG_SOC_IMX25 */ #ifdef CONFIG_SOC_IMX31 -- cgit v1.2.3 From ee8814db9642713982e793cf3ae48ac0aef58433 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 22 Jun 2011 22:41:28 +0800 Subject: ARM: mxc: change imx-dma default to_version to 1 The value 0 is not a valid TO version number. With the current code, imx-sdma driver will try to load firmware sdma-imx25-to0.bin, which is obviously not a good name. Instead, sdma-imx25-to1.bin makes much more sense. Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/devices/platform-imx-dma.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index 1c0ba53a2187..c2712b7047fd 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c @@ -33,22 +33,22 @@ struct imx_imx_sdma_data { #ifdef CONFIG_SOC_IMX25 struct imx_imx_sdma_data imx25_imx_sdma_data __initconst = - imx_imx_sdma_data_entry_single(MX25, 2, "imx25", 0); + imx_imx_sdma_data_entry_single(MX25, 2, "imx25", 1); #endif /* ifdef CONFIG_SOC_IMX25 */ #ifdef CONFIG_SOC_IMX31 struct imx_imx_sdma_data imx31_imx_sdma_data __initdata = - imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 0); + imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 1); #endif /* ifdef CONFIG_SOC_IMX31 */ #ifdef CONFIG_SOC_IMX35 struct imx_imx_sdma_data imx35_imx_sdma_data __initdata = - imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 0); + imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 1); #endif /* ifdef CONFIG_SOC_IMX35 */ #ifdef CONFIG_SOC_IMX51 struct imx_imx_sdma_data imx51_imx_sdma_data __initconst = - imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 0); + imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 1); #endif /* ifdef CONFIG_SOC_IMX51 */ static struct platform_device __init __maybe_unused *imx_add_imx_sdma( -- cgit v1.2.3 From 187e5f26a853448add574b7efaba3767267dbc15 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 22 Jun 2011 22:41:29 +0800 Subject: ARM: mxc: imx-dma on imx25 has no other TO version but TO1 The imx25 sdma script only gets TO1 version, so there is no need to encode "to1" in the variable name. Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/devices/platform-imx-dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index c2712b7047fd..c64f015e031b 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c @@ -77,7 +77,7 @@ static struct platform_device __init __maybe_unused *imx_add_imx_dma(void) } #ifdef CONFIG_ARCH_MX25 -static struct sdma_script_start_addrs addr_imx25_to1 = { +static struct sdma_script_start_addrs addr_imx25 = { .ap_2_ap_addr = 729, .uart_2_mcu_addr = 904, .per_2_app_addr = 1255, @@ -165,7 +165,7 @@ static int __init imxXX_add_imx_dma(void) #if defined(CONFIG_SOC_IMX25) if (cpu_is_mx25()) { - imx25_imx_sdma_data.pdata.script_addrs = &addr_imx25_to1; + imx25_imx_sdma_data.pdata.script_addrs = &addr_imx25; ret = imx_add_imx_sdma(&imx25_imx_sdma_data); } else #endif -- cgit v1.2.3 From 429a035d1d3f47963624baec81db9bdf81e62fb2 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 27 Jun 2011 17:12:10 -0300 Subject: ARM: mx51: Fix the address space length for SSI On MX51 the address space length for SSI is 16KB. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/devices/platform-imx-ssi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/plat-mxc/devices/platform-imx-ssi.c index 2569c8d8a2ef..66b8593e9b69 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-ssi.c +++ b/arch/arm/plat-mxc/devices/platform-imx-ssi.c @@ -69,7 +69,7 @@ const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst = { #ifdef CONFIG_SOC_IMX51 const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst = { #define imx51_imx_ssi_data_entry(_id, _hwid) \ - imx_imx_ssi_data_entry(MX51, _id, _hwid, SZ_4K) + imx_imx_ssi_data_entry(MX51, _id, _hwid, SZ_16K) imx51_imx_ssi_data_entry(0, 1), imx51_imx_ssi_data_entry(1, 2), imx51_imx_ssi_data_entry(2, 3), -- cgit v1.2.3 From 425933b30b0ccfac58065bca6c853ea627443cdf Mon Sep 17 00:00:00 2001 From: Troy Kisky Date: Fri, 24 Jun 2011 10:52:56 -0700 Subject: MXC: iomux-v3: correct NO_PAD_CTRL definition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit iomux-v3.c uses NO_PAD_CTRL as a 32 bit value so it should not be shifted left by MUX_PAD_CTRL_SHIFT(41) Previously, anything requesting NO_PAD_CTRL would get their pad control register set to 0. Since it is a pad control mask, place it with the other mask values. Signed-off-by: Troy Kisky Acked-by: Lothar Waßmann Tested-by: Lothar Waßmann Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/iomux-v3.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h index 82620af1922f..ebbce33097a7 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h @@ -66,7 +66,6 @@ typedef u64 iomux_v3_cfg_t; #define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT) #define MUX_PAD_CTRL_SHIFT 41 #define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x1ffff << MUX_PAD_CTRL_SHIFT) -#define NO_PAD_CTRL ((iomux_v3_cfg_t)1 << (MUX_PAD_CTRL_SHIFT + 16)) #define MUX_SEL_INPUT_SHIFT 58 #define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT) @@ -85,6 +84,7 @@ typedef u64 iomux_v3_cfg_t; * Use to set PAD control */ +#define NO_PAD_CTRL (1 << 16) #define PAD_CTL_DVS (1 << 13) #define PAD_CTL_HYS (1 << 8) -- cgit v1.2.3 From d7336b837f4234cf897cb83794c68d43d2307660 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 28 Jun 2011 12:58:36 -0300 Subject: ARM: mx53: Fix some interrupts marked as reserved. Mark the actual interrupt source for some interrupts currently marked as reserved. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/mx53.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index e14a4f04c696..74cd093203e0 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h @@ -233,7 +233,7 @@ #define MX53_INT_ESDHC2 2 #define MX53_INT_ESDHC3 3 #define MX53_INT_ESDHC4 4 -#define MX53_INT_RESV5 5 +#define MX53_INT_DAP 5 #define MX53_INT_SDMA 6 #define MX53_INT_IOMUX 7 #define MX53_INT_NFC 8 @@ -262,8 +262,8 @@ #define MX53_INT_UART1 31 #define MX53_INT_UART2 32 #define MX53_INT_UART3 33 -#define MX53_INT_RESV34 34 -#define MX53_INT_RESV35 35 +#define MX53_INT_RTC 34 +#define MX53_INT_PTP 35 #define MX53_INT_ECSPI1 36 #define MX53_INT_ECSPI2 37 #define MX53_INT_CSPI 38 @@ -293,8 +293,8 @@ #define MX53_INT_I2C1 62 #define MX53_INT_I2C2 63 #define MX53_INT_I2C3 64 -#define MX53_INT_RESV65 65 -#define MX53_INT_RESV66 66 +#define MX53_INT_MLB 65 +#define MX53_INT_ASRC 66 #define MX53_INT_SPDIF 67 #define MX53_INT_SIM_DAT 68 #define MX53_INT_IIM 69 -- cgit v1.2.3 From b9b65860e77cc4db913cbfd4340279f331620cc3 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Thu, 30 Jun 2011 21:35:03 +0800 Subject: ARM i.MX23/28: platform-mxsfb: Add missing include of linux/dma-mapping.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix below build error: CC arch/arm/mach-mxs/devices/platform-mxsfb.o arch/arm/mach-mxs/devices/platform-mxsfb.c: In function 'mx23_add_mxsfb': arch/arm/mach-mxs/devices/platform-mxsfb.c:27: error: implicit declaration of function 'DMA_BIT_MASK' make[2]: *** [arch/arm/mach-mxs/devices/platform-mxsfb.o] Error 1 make[1]: *** [arch/arm/mach-mxs/devices] Error 2 make: *** [arch/arm/mach-mxs] Error 2 Signed-off-by: Axel Lin Tested-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mxs/devices/platform-mxsfb.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/mach-mxs/devices/platform-mxsfb.c b/arch/arm/mach-mxs/devices/platform-mxsfb.c index bf72c9b8dbdd..5a75b7180f74 100644 --- a/arch/arm/mach-mxs/devices/platform-mxsfb.c +++ b/arch/arm/mach-mxs/devices/platform-mxsfb.c @@ -5,6 +5,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ +#include #include #include #include -- cgit v1.2.3 From 23e99d4cae02fb782eece2101d9ea67c77920346 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Tue, 5 Jul 2011 12:06:36 +0200 Subject: ARM: mxs/tx28: according to the TX28's datasheet D4-D7 are not used for MMC0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The pins are actually used (not in mainline yet): D4 -> SSP2_D0 D5 -> GPIO D6 -> GPIO D7 -> GPIO for owire so their pinmapping for SSP0 is wrong. Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mxs/mach-tx28.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c index b65e3719cbc4..068e540efbb6 100644 --- a/arch/arm/mach-mxs/mach-tx28.c +++ b/arch/arm/mach-mxs/mach-tx28.c @@ -101,14 +101,6 @@ static const iomux_cfg_t tx28_stk5v3_pads[] __initconst = { (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), MX28_PAD_SSP0_DATA3__SSP0_D3 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA4__SSP0_D4 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA5__SSP0_D5 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA6__SSP0_D6 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA7__SSP0_D7 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), MX28_PAD_SSP0_CMD__SSP0_CMD | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | -- cgit v1.2.3 From 9d73242458d9a2fe26e2e240488063d414eacb1c Mon Sep 17 00:00:00 2001 From: Lothar Waßmann Date: Mon, 4 Jul 2011 15:52:17 +0200 Subject: mach-mx5: fix the I2C clock parents MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The clock from which the I2C timing is derived is the ipg_perclk not ipg_clk. I2C bus frequency was lower by a factor of ~8 due to the clock divider calculation being based on 66.5MHz IPG clock while the bus actually uses 8MHz ipg_perclk. Kernel version: 3.0.0-rc2 branch 'imx-for-next' of git://git.pengutronix.de/git/imx/linux-2.6 Signed-off-by: Lothar Waßmann Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/clock-mx51-mx53.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 6b89c1bf4eb2..cea2bba06d0b 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1274,9 +1274,9 @@ DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET, /* I2C */ DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET, - NULL, NULL, &ipg_clk, NULL); + NULL, NULL, &ipg_perclk, NULL); DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG10_OFFSET, - NULL, NULL, &ipg_clk, NULL); + NULL, NULL, &ipg_perclk, NULL); DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, NULL, NULL, &ipg_clk, NULL); -- cgit v1.2.3 From 58f45e3c6f4fd2b9b9d7d43af71409a79a4b4cf6 Mon Sep 17 00:00:00 2001 From: Troy Kisky Date: Wed, 6 Jul 2011 19:56:03 -0700 Subject: ARM: i.MX53: Fix IOMUX type o's ", o" was used for ", 0" ", 17" was used for ", 7 | 0x10" Signed-off-by: Troy Kisky Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/iomux-mx53.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h index 50b88a404fe4..e11dd5f09c34 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx53.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx53.h @@ -39,7 +39,7 @@ #define _MX53_PAD_GPIO_19__ECSPI1_RDY IOMUX_PAD(0x348, 0x20, 5, 0x0, 0, 0) #define _MX53_PAD_GPIO_19__FEC_TDATA_3 IOMUX_PAD(0x348, 0x20, 6, 0x0, 0, 0) #define _MX53_PAD_GPIO_19__SRC_INT_BOOT IOMUX_PAD(0x348, 0x20,7, 0x0, 0, 0) -#define _MX53_PAD_KEY_COL0__KPP_COL_0 IOMUX_PAD(0x34C, 0x24, o, 0x0, 0, 0) +#define _MX53_PAD_KEY_COL0__KPP_COL_0 IOMUX_PAD(0x34C, 0x24, 0, 0x0, 0, 0) #define _MX53_PAD_KEY_COL0__GPIO4_6 IOMUX_PAD(0x34C, 0x24, 1, 0x0, 0, 0) #define _MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC IOMUX_PAD(0x34C, 0x24, 2, 0x758, 0, 0) #define _MX53_PAD_KEY_COL0__UART4_TXD_MUX IOMUX_PAD(0x34C, 0x24, 4, 0x890, 0, 0) @@ -697,7 +697,7 @@ #define _MX53_PAD_EIM_DA5__GPIO3_5 IOMUX_PAD(0x500, 0x1B0, 1, 0x0, 0, 0) #define _MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 IOMUX_PAD(0x500, 0x1B0, 3, 0x0, 0, 0) #define _MX53_PAD_EIM_DA5__IPU_CSI1_D_4 IOMUX_PAD(0x500, 0x1B0, 4, 0x0, 0, 0) -#define _MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 IOMUX_PAD(0x500, 0x1B0, 17, 0x0, 0, 0) +#define _MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 IOMUX_PAD(0x500, 0x1B0, 7 | IOMUX_CONFIG_SION, 0x0, 0, 0) #define _MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 IOMUX_PAD(0x504, 0x1B4, 0, 0x0, 0, 0) #define _MX53_PAD_EIM_DA6__GPIO3_6 IOMUX_PAD(0x504, 0x1B4, 1, 0x0, 0, 0) #define _MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 IOMUX_PAD(0x504, 0x1B4, 3, 0x0, 0, 0) -- cgit v1.2.3 From 2e7b1bfcb98dd232faf85b4a0a2611a49454c2ea Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 28 May 2011 10:54:35 -0300 Subject: ARM: mx5/mx51_babbage: Move GPIO initialization for USB PHY Reset line to common place The USB PHY Reset GPIO can be configured in the same place as the other GPIOs. While at it rename the pin as BABBAGE_USB_PHY_RESET to make clearer its purpose. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/board-mx51_babbage.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index c7b3fabf50f9..7b919bc8549c 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -36,7 +36,7 @@ #define BABBAGE_USB_HUB_RESET IMX_GPIO_NR(1, 7) #define BABBAGE_USBH1_STP IMX_GPIO_NR(1, 27) -#define BABBAGE_PHY_RESET IMX_GPIO_NR(2, 5) +#define BABBAGE_USB_PHY_RESET IMX_GPIO_NR(2, 5) #define BABBAGE_FEC_PHY_RESET IMX_GPIO_NR(2, 14) #define BABBAGE_POWER_KEY IMX_GPIO_NR(2, 21) #define BABBAGE_ECSPI1_CS0 IMX_GPIO_NR(4, 24) @@ -110,6 +110,9 @@ static iomux_v3_cfg_t mx51babbage_pads[] = { /* USB HUB reset line*/ MX51_PAD_GPIO1_7__GPIO1_7, + /* USB PHY reset line */ + MX51_PAD_EIM_D21__GPIO2_5, + /* FEC */ MX51_PAD_EIM_EB2__FEC_MDIO, MX51_PAD_EIM_EB3__FEC_RDATA1, @@ -172,7 +175,6 @@ static struct imxi2c_platform_data babbage_hsi2c_data = { static int gpio_usbh1_active(void) { iomux_v3_cfg_t usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO1_27; - iomux_v3_cfg_t phyreset_gpio = MX51_PAD_EIM_D21__GPIO2_5; int ret; /* Set USBH1_STP to GPIO and toggle it */ @@ -189,14 +191,13 @@ static int gpio_usbh1_active(void) gpio_free(BABBAGE_USBH1_STP); /* De-assert USB PHY RESETB */ - mxc_iomux_v3_setup_pad(phyreset_gpio); - ret = gpio_request(BABBAGE_PHY_RESET, "phy_reset"); + ret = gpio_request(BABBAGE_USB_PHY_RESET, "phy_reset"); if (ret) { pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret); return ret; } - gpio_direction_output(BABBAGE_PHY_RESET, 1); + gpio_direction_output(BABBAGE_USB_PHY_RESET, 1); return 0; } -- cgit v1.2.3 From 72370a5cc28f9efc94a4d7d7dff2ebcb76139088 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 28 May 2011 10:54:36 -0300 Subject: ARM: mx5/mx51_babbage: Use gpio_request_array for USBH1 pins Instead of using gpio_request followed by gpio_direction_output use gpio_request_array when requesting multiple pins. Also fixed the location of the delay for the reset and make the BABBAGE_USB_PHY_RESET to toggle. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/board-mx51_babbage.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index 7b919bc8549c..770f74b5ea50 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -172,6 +172,11 @@ static struct imxi2c_platform_data babbage_hsi2c_data = { .bitrate = 400000, }; +static struct gpio mx51_babbage_usbh1_gpios[] = { + { BABBAGE_USBH1_STP, GPIOF_OUT_INIT_LOW, "usbh1_stp" }, + { BABBAGE_USB_PHY_RESET, GPIOF_OUT_INIT_LOW, "usbh1_phy_reset" }, +}; + static int gpio_usbh1_active(void) { iomux_v3_cfg_t usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO1_27; @@ -179,25 +184,19 @@ static int gpio_usbh1_active(void) /* Set USBH1_STP to GPIO and toggle it */ mxc_iomux_v3_setup_pad(usbh1stp_gpio); - ret = gpio_request(BABBAGE_USBH1_STP, "usbh1_stp"); + ret = gpio_request_array(mx51_babbage_usbh1_gpios, + ARRAY_SIZE(mx51_babbage_usbh1_gpios)); if (ret) { - pr_debug("failed to get MX51_PAD_USBH1_STP__GPIO_1_27: %d\n", ret); + pr_debug("failed to get USBH1 pins: %d\n", ret); return ret; } - gpio_direction_output(BABBAGE_USBH1_STP, 0); - gpio_set_value(BABBAGE_USBH1_STP, 1); - msleep(100); - gpio_free(BABBAGE_USBH1_STP); - - /* De-assert USB PHY RESETB */ - ret = gpio_request(BABBAGE_USB_PHY_RESET, "phy_reset"); - if (ret) { - pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret); - return ret; - } - gpio_direction_output(BABBAGE_USB_PHY_RESET, 1); + msleep(100); + gpio_set_value(BABBAGE_USBH1_STP, 1); + gpio_set_value(BABBAGE_USB_PHY_RESET, 1); + gpio_free_array(mx51_babbage_usbh1_gpios, + ARRAY_SIZE(mx51_babbage_usbh1_gpios)); return 0; } -- cgit v1.2.3 From 47e837b54c01083ce153493882fb8d74d108ae4a Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Sat, 28 May 2011 21:05:01 +0200 Subject: ARM: imx: convert to new leds-gpio registration helper MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This gets rid of per machine struct platform_device definitions and allows to move the platform data and led definition to .init.rodata. Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/Kconfig | 5 +++++ arch/arm/mach-imx/eukrea_mbimx27-baseboard.c | 23 ++++++----------------- arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c | 15 ++++----------- arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c | 13 +++---------- arch/arm/mach-imx/mach-mx31moboard.c | 14 +++----------- arch/arm/mach-imx/mx31lite-db.c | 15 ++++----------- 6 files changed, 25 insertions(+), 60 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 59c97a331136..e8dd22fa7d61 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -167,6 +167,7 @@ config MACH_EUKREA_MBIMXSD25_BASEBOARD bool "Eukrea MBIMXSD development board" select IMX_HAVE_PLATFORM_GPIO_KEYS select IMX_HAVE_PLATFORM_IMX_SSI + select LEDS_GPIO_REGISTER help This adds board specific devices that can be found on Eukrea's MBIMXSD evaluation board. @@ -265,6 +266,7 @@ config MACH_EUKREA_MBIMX27_BASEBOARD select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_SPI_IMX + select LEDS_GPIO_REGISTER help This adds board specific devices that can be found on Eukrea's MBIMX27 evaluation board. @@ -403,6 +405,7 @@ config MACH_MX31LITE select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_MXC_RTC select IMX_HAVE_PLATFORM_SPI_IMX + select LEDS_GPIO_REGISTER help Include support for MX31 LITEKIT platform. This includes specific configurations for the board and its peripherals. @@ -471,6 +474,7 @@ config MACH_MX31MOBOARD select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_SPI_IMX + select LEDS_GPIO_REGISTER select MXC_ULPI if USB_ULPI help Include support for mx31moboard platform. This includes specific @@ -577,6 +581,7 @@ config MACH_EUKREA_MBIMXSD35_BASEBOARD select IMX_HAVE_PLATFORM_GPIO_KEYS select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IPU_CORE + select LEDS_GPIO_REGISTER help This adds board specific devices that can be found on Eukrea's MBIMXSD evaluation board. diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index 5911281da5f5..5db3e1463af7 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c @@ -112,7 +112,7 @@ eukrea_mbimx27_keymap_data __initconst = { .keymap_size = ARRAY_SIZE(eukrea_mbimx27_keymap), }; -static struct gpio_led gpio_leds[] = { +static const struct gpio_led eukrea_mbimx27_gpio_leds[] __initconst = { { .name = "led1", .default_trigger = "heartbeat", @@ -127,17 +127,10 @@ static struct gpio_led gpio_leds[] = { }, }; -static struct gpio_led_platform_data gpio_led_info = { - .leds = gpio_leds, - .num_leds = ARRAY_SIZE(gpio_leds), -}; - -static struct platform_device leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &gpio_led_info, - }, +static const struct gpio_led_platform_data + eukrea_mbimx27_gpio_led_info __initconst = { + .leds = eukrea_mbimx27_gpio_leds, + .num_leds = ARRAY_SIZE(eukrea_mbimx27_gpio_leds), }; static struct imx_fb_videomode eukrea_mbimx27_modes[] = { @@ -293,10 +286,6 @@ static struct i2c_board_info eukrea_mbimx27_i2c_devices[] = { }, }; -static struct platform_device *platform_devices[] __initdata = { - &leds_gpio, -}; - static const struct imxmmc_platform_data sdhc_pdata __initconst = { .dat3_card_detect = 1, }; @@ -377,5 +366,5 @@ void __init eukrea_mbimx27_baseboard_init(void) imx27_add_imx_keypad(&eukrea_mbimx27_keymap_data); - platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + gpio_led_register_device(-1, &eukrea_mbimx27_gpio_led_info); } diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c index f9ef04acdab1..01ebcb31e482 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c @@ -173,7 +173,7 @@ static struct platform_device eukrea_mbimxsd_lcd_powerdev = { .dev.platform_data = &eukrea_mbimxsd_lcd_power_data, }; -static struct gpio_led eukrea_mbimxsd_leds[] = { +static const struct gpio_led eukrea_mbimxsd_leds[] __initconst = { { .name = "led1", .default_trigger = "heartbeat", @@ -182,19 +182,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = { }, }; -static struct gpio_led_platform_data eukrea_mbimxsd_led_info = { +static const struct gpio_led_platform_data + eukrea_mbimxsd_led_info __initconst = { .leds = eukrea_mbimxsd_leds, .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds), }; -static struct platform_device eukrea_mbimxsd_leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &eukrea_mbimxsd_led_info, - }, -}; - static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = { { .gpio = GPIO_SWITCH1, @@ -212,7 +205,6 @@ static const struct gpio_keys_platform_data }; static struct platform_device *platform_devices[] __initdata = { - &eukrea_mbimxsd_leds_gpio, &eukrea_mbimxsd_lcd_powerdev, }; @@ -287,5 +279,6 @@ void __init eukrea_mbimxsd25_baseboard_init(void) ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + gpio_led_register_device(-1, &eukrea_mbimxsd_led_info); imx_add_gpio_keys(&eukrea_mbimxsd_button_data); } diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c index 4909ea05855a..558eb526ba56 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c @@ -193,19 +193,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = { }, }; -static struct gpio_led_platform_data eukrea_mbimxsd_led_info = { +static const struct gpio_led_platform_data + eukrea_mbimxsd_led_info __initconst = { .leds = eukrea_mbimxsd_leds, .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds), }; -static struct platform_device eukrea_mbimxsd_leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &eukrea_mbimxsd_led_info, - }, -}; - static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = { { .gpio = GPIO_SWITCH1, @@ -223,7 +216,6 @@ static const struct gpio_keys_platform_data }; static struct platform_device *platform_devices[] __initdata = { - &eukrea_mbimxsd_leds_gpio, &eukrea_mbimxsd_lcd_powerdev, }; @@ -299,5 +291,6 @@ void __init eukrea_mbimxsd35_baseboard_init(void) ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + gpio_led_register_device(-1, &eukrea_mbimxsd_led_info); imx_add_gpio_keys(&eukrea_mbimxsd_button_data); } diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index eaa51e49ca95..abe688b3297d 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c @@ -425,7 +425,7 @@ static int __init moboard_usbh2_init(void) return 0; } -static struct gpio_led mx31moboard_leds[] = { +static const struct gpio_led mx31moboard_leds[] __initconst = { { .name = "coreboard-led-0:red:running", .default_trigger = "heartbeat", @@ -442,26 +442,17 @@ static struct gpio_led mx31moboard_leds[] = { }, }; -static struct gpio_led_platform_data mx31moboard_led_pdata = { +static const struct gpio_led_platform_data mx31moboard_led_pdata __initconst = { .num_leds = ARRAY_SIZE(mx31moboard_leds), .leds = mx31moboard_leds, }; -static struct platform_device mx31moboard_leds_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &mx31moboard_led_pdata, - }, -}; - static const struct ipu_platform_data mx3_ipu_data __initconst = { .irq_base = MXC_IPU_IRQ_START, }; static struct platform_device *devices[] __initdata = { &mx31moboard_flash, - &mx31moboard_leds_device, }; static struct mx3_camera_pdata camera_pdata __initdata = { @@ -511,6 +502,7 @@ static void __init mx31moboard_init(void) "moboard"); platform_add_devices(devices, ARRAY_SIZE(devices)); + gpio_led_register_device(-1, &mx31moboard_led_pdata); imx31_add_imx_uart0(&uart0_pdata); imx31_add_imx_uart4(&uart4_pdata); diff --git a/arch/arm/mach-imx/mx31lite-db.c b/arch/arm/mach-imx/mx31lite-db.c index 5aa053edc17c..bf0fb87946ba 100644 --- a/arch/arm/mach-imx/mx31lite-db.c +++ b/arch/arm/mach-imx/mx31lite-db.c @@ -161,7 +161,7 @@ static const struct spi_imx_master spi0_pdata __initconst = { /* GPIO LEDs */ -static struct gpio_led litekit_leds[] = { +static const struct gpio_led litekit_leds[] __initconst = { { .name = "GPIO0", .gpio = IOMUX_TO_GPIO(MX31_PIN_COMPARE), @@ -176,19 +176,12 @@ static struct gpio_led litekit_leds[] = { } }; -static struct gpio_led_platform_data litekit_led_platform_data = { +static const struct gpio_led_platform_data + litekit_led_platform_data __initconst = { .leds = litekit_leds, .num_leds = ARRAY_SIZE(litekit_leds), }; -static struct platform_device litekit_led_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &litekit_led_platform_data, - }, -}; - void __init mx31lite_db_init(void) { mxc_iomux_setup_multiple_pins(litekit_db_board_pins, @@ -197,7 +190,7 @@ void __init mx31lite_db_init(void) imx31_add_imx_uart0(&uart_pdata); imx31_add_mxc_mmc(0, &mmc_pdata); imx31_add_spi_imx0(&spi0_pdata); - platform_device_register(&litekit_led_device); + gpio_led_register_device(-1, &litekit_led_platform_data); imx31_add_imx2_wdt(NULL); imx31_add_mxc_rtc(NULL); } -- cgit v1.2.3 From 5b8d628ca4036e76a2d892f2c1d01b58d232809e Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Sat, 28 May 2011 21:05:02 +0200 Subject: ARM: mx5: convert to new leds-gpio registration helper MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This gets rid of per machine struct platform_device definitions and allows to move the platform data and led definition to .init.rodata. Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/Kconfig | 4 ++++ arch/arm/mach-mx5/board-mx51_efikamx.c | 15 ++++----------- arch/arm/mach-mx5/board-mx51_efikasb.c | 16 ++++------------ arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c | 18 +++--------------- arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c | 19 ++++--------------- 5 files changed, 19 insertions(+), 53 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 799fbc40e53c..f25e9d7bf0f5 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -109,6 +109,7 @@ config MACH_EUKREA_MBIMX51_BASEBOARD bool select IMX_HAVE_PLATFORM_IMX_KEYPAD select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX + select LEDS_GPIO_REGISTER help This adds board specific devices that can be found on Eukrea's MBIMX51 evaluation board. @@ -135,6 +136,7 @@ config MACH_EUKREA_MBIMXSD51_BASEBOARD prompt "Eukrea MBIMXSD development board" bool select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX + select LEDS_GPIO_REGISTER help This adds board specific devices that can be found on Eukrea's MBIMXSD evaluation board. @@ -151,6 +153,7 @@ config MX51_EFIKA_COMMON config MACH_MX51_EFIKAMX bool "Support MX51 Genesi Efika MX nettop" + select LEDS_GPIO_REGISTER select MX51_EFIKA_COMMON help Include support for Genesi Efika MX nettop. This includes specific @@ -158,6 +161,7 @@ config MACH_MX51_EFIKAMX config MACH_MX51_EFIKASB bool "Support MX51 Genesi Efika Smartbook" + select LEDS_GPIO_REGISTER select MX51_EFIKA_COMMON help Include support for Genesi Efika Smartbook. This includes specific diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c index 6e362315291b..2400f6d10099 100644 --- a/arch/arm/mach-mx5/board-mx51_efikamx.c +++ b/arch/arm/mach-mx5/board-mx51_efikamx.c @@ -139,7 +139,7 @@ static void __init mx51_efikamx_board_id(void) } } -static struct gpio_led mx51_efikamx_leds[] = { +static struct gpio_led mx51_efikamx_leds[] __initdata = { { .name = "efikamx:green", .default_trigger = "default-on", @@ -157,19 +157,12 @@ static struct gpio_led mx51_efikamx_leds[] = { }, }; -static struct gpio_led_platform_data mx51_efikamx_leds_data = { +static const struct gpio_led_platform_data + mx51_efikamx_leds_data __initconst = { .leds = mx51_efikamx_leds, .num_leds = ARRAY_SIZE(mx51_efikamx_leds), }; -static struct platform_device mx51_efikamx_leds_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &mx51_efikamx_leds_data, - }, -}; - static struct gpio_keys_button mx51_efikamx_powerkey[] = { { .code = KEY_POWER, @@ -248,7 +241,7 @@ static void __init mx51_efikamx_init(void) mx51_efikamx_leds[2].default_trigger = "mmc1"; } - platform_device_register(&mx51_efikamx_leds_device); + gpio_led_register_device(-1, &mx51_efikamx_leds_data); imx_add_gpio_keys(&mx51_efikamx_powerkey_data); if (system_rev == 0x11) { diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c index 474fc6e4c6df..28d68962e7df 100644 --- a/arch/arm/mach-mx5/board-mx51_efikasb.c +++ b/arch/arm/mach-mx5/board-mx51_efikasb.c @@ -132,7 +132,7 @@ static void __init mx51_efikasb_usb(void) mxc_register_device(&mxc_usbh2_device, &usbh2_config); } -static struct gpio_led mx51_efikasb_leds[] = { +static const struct gpio_led mx51_efikasb_leds[] __initconst = { { .name = "efikasb:green", .default_trigger = "default-on", @@ -146,19 +146,12 @@ static struct gpio_led mx51_efikasb_leds[] = { }, }; -static struct gpio_led_platform_data mx51_efikasb_leds_data = { +static const struct gpio_led_platform_data + mx51_efikasb_leds_data __initconst = { .leds = mx51_efikasb_leds, .num_leds = ARRAY_SIZE(mx51_efikasb_leds), }; -static struct platform_device mx51_efikasb_leds_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &mx51_efikasb_leds_data, - }, -}; - static struct gpio_keys_button mx51_efikasb_keys[] = { { .code = KEY_POWER, @@ -256,9 +249,8 @@ static void __init efikasb_board_init(void) mx51_efikasb_usb(); imx51_add_sdhci_esdhc_imx(1, NULL); - platform_device_register(&mx51_efikasb_leds_device); + gpio_led_register_device(-1, &mx51_efikasb_leds_data); imx_add_gpio_keys(&mx51_efikasb_keys_data); - } static void __init mx51_efikasb_timer_init(void) diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c index 97292d20f1f3..02ce720c887f 100644 --- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c +++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c @@ -37,7 +37,7 @@ #define MBIMX51_LED2 IMX_GPIO_NR(3, 7) #define MBIMX51_LED3 IMX_GPIO_NR(3, 8) -static struct gpio_led mbimx51_leds[] = { +static const struct gpio_led mbimx51_leds[] __initconst = { { .name = "led0", .default_trigger = "heartbeat", @@ -64,23 +64,11 @@ static struct gpio_led mbimx51_leds[] = { }, }; -static struct gpio_led_platform_data mbimx51_leds_info = { +static const struct gpio_led_platform_data mbimx51_leds_info __initconst = { .leds = mbimx51_leds, .num_leds = ARRAY_SIZE(mbimx51_leds), }; -static struct platform_device mbimx51_leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &mbimx51_leds_info, - }, -}; - -static struct platform_device *devices[] __initdata = { - &mbimx51_leds_gpio, -}; - static iomux_v3_cfg_t mbimx51_pads[] = { /* UART2 */ MX51_PAD_UART2_RXD__UART2_RXD, @@ -204,7 +192,7 @@ void __init eukrea_mbimx51_baseboard_init(void) gpio_direction_output(MBIMX51_LED3, 1); gpio_free(MBIMX51_LED3); - platform_add_devices(devices, ARRAY_SIZE(devices)); + gpio_led_register_device(-1, &mbimx51_leds_info); imx51_add_imx_keypad(&mbimx51_map_data); diff --git a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c index 31c871ec46a6..261923997643 100644 --- a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c +++ b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c @@ -74,7 +74,7 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = { #define GPIO_LED1 IMX_GPIO_NR(3, 30) #define GPIO_SWITCH1 IMX_GPIO_NR(3, 31) -static struct gpio_led eukrea_mbimxsd_leds[] = { +static const struct gpio_led eukrea_mbimxsd_leds[] __initconst = { { .name = "led1", .default_trigger = "heartbeat", @@ -83,19 +83,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = { }, }; -static struct gpio_led_platform_data eukrea_mbimxsd_led_info = { +static const struct gpio_led_platform_data + eukrea_mbimxsd_led_info __initconst = { .leds = eukrea_mbimxsd_leds, .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds), }; -static struct platform_device eukrea_mbimxsd_leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &eukrea_mbimxsd_led_info, - }, -}; - static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = { { .gpio = GPIO_SWITCH1, @@ -112,10 +105,6 @@ static const struct gpio_keys_platform_data .nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons), }; -static struct platform_device *platform_devices[] __initdata = { - &eukrea_mbimxsd_leds_gpio, -}; - static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; @@ -154,6 +143,6 @@ void __init eukrea_mbimxsd51_baseboard_init(void) i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices, ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); - platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + gpio_led_register_device(-1, &eukrea_mbimxsd_led_info); imx_add_gpio_keys(&eukrea_mbimxsd_button_data); } -- cgit v1.2.3 From 4daca0e0170b3996a403d10b6b5838a69785faeb Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Sat, 28 May 2011 21:05:03 +0200 Subject: ARM: mxs/tx28: convert to new leds-gpio registration helper MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This allows to move the led definition to .init.rodata. Signed-off-by: Uwe Kleine-König Cc: Shawn Guo Signed-off-by: Sascha Hauer --- arch/arm/mach-mxs/Kconfig | 1 + arch/arm/mach-mxs/mach-tx28.c | 5 ++--- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index f114960622e0..162b0b0bc356 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig @@ -55,6 +55,7 @@ config MACH_MX28EVK config MODULE_TX28 bool select SOC_IMX28 + select LEDS_GPIO_REGISTER select MXS_HAVE_AMBA_DUART select MXS_HAVE_PLATFORM_AUART select MXS_HAVE_PLATFORM_FEC diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c index 068e540efbb6..6766a12cca7f 100644 --- a/arch/arm/mach-mxs/mach-tx28.c +++ b/arch/arm/mach-mxs/mach-tx28.c @@ -109,7 +109,7 @@ static const iomux_cfg_t tx28_stk5v3_pads[] __initconst = { (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), }; -static struct gpio_led tx28_stk5v3_leds[] = { +static const struct gpio_led tx28_stk5v3_leds[] __initconst = { { .name = "GPIO-LED", .default_trigger = "heartbeat", @@ -151,8 +151,7 @@ static void __init tx28_stk5v3_init(void) /* spi via ssp will be added when available */ spi_register_board_info(tx28_spi_board_info, ARRAY_SIZE(tx28_spi_board_info)); - mxs_add_platform_device("leds-gpio", 0, NULL, 0, - &tx28_stk5v3_led_data, sizeof(tx28_stk5v3_led_data)); + gpio_led_register_device(0, &tx28_stk5v3_led_data); mx28_add_mxs_i2c(0); i2c_register_board_info(0, tx28_stk5v3_i2c_boardinfo, ARRAY_SIZE(tx28_stk5v3_i2c_boardinfo)); -- cgit v1.2.3 From c0450dfffcbc2b4949cfbaab2928a0828dbd6305 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 9 May 2011 18:29:00 +0200 Subject: ARM i.MX: fix last user of iomux.h and remove it Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 2 +- arch/arm/plat-mxc/include/mach/iomux.h | 26 -------------------------- 2 files changed, 1 insertion(+), 27 deletions(-) delete mode 100644 arch/arm/plat-mxc/include/mach/iomux.h (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 7ae43b1ec517..686449696543 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -34,7 +34,7 @@ #include #include #include -#include +#include #include "devices-imx27.h" diff --git a/arch/arm/plat-mxc/include/mach/iomux.h b/arch/arm/plat-mxc/include/mach/iomux.h deleted file mode 100644 index 3d226d7e7be2..000000000000 --- a/arch/arm/plat-mxc/include/mach/iomux.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2010 Uwe Kleine-Koenig, Pengutronix - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __MACH_IOMUX_H__ -#define __MACH_IOMUX_H__ - -/* This file will go away, please include mach/iomux-mx... directly */ - -#ifdef CONFIG_ARCH_MX1 -#include -#endif -#ifdef CONFIG_ARCH_MX2 -#include -#ifdef CONFIG_MACH_MX21 -#include -#endif -#ifdef CONFIG_MACH_MX27 -#include -#endif -#endif - -#endif /* __MACH_IOMUX_H__ */ -- cgit v1.2.3 From 5a145baa1a499845103cd566ee5fe509e042aa80 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 9 May 2011 18:30:14 +0200 Subject: ARM i.MX: define CLOCK_TICK_RATE to bogus value We have a clocksource which renders CLOCK_TICK_RATE useless. Define it to a bogus value to get rid of some ifdeffery. Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/timex.h | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h index d61d5c74817c..10343d1f87e1 100644 --- a/arch/arm/plat-mxc/include/mach/timex.h +++ b/arch/arm/plat-mxc/include/mach/timex.h @@ -16,16 +16,7 @@ #ifndef __ASM_ARCH_MXC_TIMEX_H__ #define __ASM_ARCH_MXC_TIMEX_H__ -#if defined CONFIG_ARCH_MX1 -#define CLOCK_TICK_RATE 16000000 -#elif defined CONFIG_ARCH_MX2 -#define CLOCK_TICK_RATE 13300000 -#elif defined CONFIG_ARCH_MX3 -#define CLOCK_TICK_RATE 16625000 -#elif defined CONFIG_ARCH_MX25 -#define CLOCK_TICK_RATE 16000000 -#elif defined CONFIG_ARCH_MX5 -#define CLOCK_TICK_RATE 8000000 -#endif +/* Bogus value */ +#define CLOCK_TICK_RATE 12345678 #endif /* __ASM_ARCH_MXC_TIMEX_H__ */ -- cgit v1.2.3 From db279c1b8dc8b7da9d8de94a0ce103c0b9b8e1ae Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 9 May 2011 18:38:51 +0200 Subject: ARM i.MX: remove SoC defines around header includes All soc specific header have proper namespace now and thus can be included at once. Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/hardware.h | 28 +++++----------------------- 1 file changed, 5 insertions(+), 23 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index 67d3e2bed065..a8bfd565dcad 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h @@ -97,35 +97,17 @@ #include -#ifdef CONFIG_ARCH_MX5 #include #include #include -#endif - -#ifdef CONFIG_ARCH_MX3 #include #include #include -#endif - -#ifdef CONFIG_ARCH_MX2 -# include -# ifdef CONFIG_MACH_MX21 -# include -# endif -# ifdef CONFIG_MACH_MX27 -# include -# endif -#endif - -#ifdef CONFIG_ARCH_MX1 -# include -#endif - -#ifdef CONFIG_ARCH_MX25 -# include -#endif +#include +#include +#include +#include +#include #define imx_map_entry(soc, name, _type) { \ .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ -- cgit v1.2.3 From 6b66ef01f550040674798395ec8c1a9e9f55af9a Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 9 May 2011 18:41:35 +0200 Subject: ARM i.MX: dmav1: kill SoC ifdefs since we now can include all soc specific headers at once we do not need the ifdeffery anymore. Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/dma-v1.c | 25 +++---------------------- 1 file changed, 3 insertions(+), 22 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/dma-v1.c b/arch/arm/mach-imx/dma-v1.c index 236f1495efad..4d76f67f270f 100644 --- a/arch/arm/mach-imx/dma-v1.c +++ b/arch/arm/mach-imx/dma-v1.c @@ -475,7 +475,6 @@ void imx_dma_enable(int channel) imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) | CCR_CEN | CCR_ACRPT, DMA_CCR(channel)); -#ifdef CONFIG_ARCH_MX2 if ((cpu_is_mx21() || cpu_is_mx27()) && imxdma->sg && imx_dma_hw_chain(imxdma)) { imxdma->sg = sg_next(imxdma->sg); @@ -487,7 +486,6 @@ void imx_dma_enable(int channel) DMA_CCR(channel)); } } -#endif imxdma->in_use = 1; local_irq_restore(flags); @@ -518,7 +516,6 @@ void imx_dma_disable(int channel) } EXPORT_SYMBOL(imx_dma_disable); -#ifdef CONFIG_ARCH_MX2 static void imx_dma_watchdog(unsigned long chno) { struct imx_dma_channel *imxdma = &imx_dma_channels[chno]; @@ -530,7 +527,6 @@ static void imx_dma_watchdog(unsigned long chno) if (imxdma->err_handler) imxdma->err_handler(chno, imxdma->data, IMX_DMA_ERR_TIMEOUT); } -#endif static irqreturn_t dma_err_handler(int irq, void *dev_id) { @@ -654,10 +650,8 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id) { int i, disr; -#ifdef CONFIG_ARCH_MX2 if (cpu_is_mx21() || cpu_is_mx27()) dma_err_handler(irq, dev_id); -#endif disr = imx_dmav1_readl(DMA_DISR); @@ -703,7 +697,6 @@ int imx_dma_request(int channel, const char *name) imxdma->name = name; local_irq_restore(flags); /* request_irq() can block */ -#ifdef CONFIG_ARCH_MX2 if (cpu_is_mx21() || cpu_is_mx27()) { ret = request_irq(MX2x_INT_DMACH0 + channel, dma_irq_handler, 0, "DMA", NULL); @@ -717,7 +710,6 @@ int imx_dma_request(int channel, const char *name) imxdma->watchdog.function = &imx_dma_watchdog; imxdma->watchdog.data = channel; } -#endif return ret; } @@ -744,10 +736,8 @@ void imx_dma_free(int channel) imx_dma_disable(channel); imxdma->name = NULL; -#ifdef CONFIG_ARCH_MX2 if (cpu_is_mx21() || cpu_is_mx27()) free_irq(MX2x_INT_DMACH0 + channel, NULL); -#endif local_irq_restore(flags); } @@ -803,21 +793,13 @@ static int __init imx_dma_init(void) int ret = 0; int i; -#ifdef CONFIG_ARCH_MX1 if (cpu_is_mx1()) imx_dmav1_baseaddr = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR); - else -#endif -#ifdef CONFIG_MACH_MX21 - if (cpu_is_mx21()) + else if (cpu_is_mx21()) imx_dmav1_baseaddr = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR); - else -#endif -#ifdef CONFIG_MACH_MX27 - if (cpu_is_mx27()) + else if (cpu_is_mx27()) imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR); else -#endif return 0; dma_clk = clk_get(NULL, "dma"); @@ -828,7 +810,6 @@ static int __init imx_dma_init(void) /* reset DMA module */ imx_dmav1_writel(DCR_DRST, DMA_DCR); -#ifdef CONFIG_ARCH_MX1 if (cpu_is_mx1()) { ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", NULL); if (ret) { @@ -843,7 +824,7 @@ static int __init imx_dma_init(void) return ret; } } -#endif + /* enable DMA module */ imx_dmav1_writel(DCR_DEN, DMA_DCR); -- cgit v1.2.3 From 7bce7e8c296b42bd975a6e8f2be7fc70979780dd Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 19 May 2011 17:23:44 +0200 Subject: ARM i.MX mxc.h: use CONFIG_SOC_* instead of CONFIG_ARCH_* CONFIG_ARCH_* are deprecated, so remove one user. Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/mxc.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index 4ac53ce97c24..09879235a9f5 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h @@ -68,7 +68,7 @@ extern unsigned int __mxc_cpu_type; #endif -#ifdef CONFIG_ARCH_MX1 +#ifdef CONFIG_SOC_IMX1 # ifdef mxc_cpu_type # undef mxc_cpu_type # define mxc_cpu_type __mxc_cpu_type @@ -80,7 +80,7 @@ extern unsigned int __mxc_cpu_type; # define cpu_is_mx1() (0) #endif -#ifdef CONFIG_MACH_MX21 +#ifdef CONFIG_SOC_IMX21 # ifdef mxc_cpu_type # undef mxc_cpu_type # define mxc_cpu_type __mxc_cpu_type @@ -92,7 +92,7 @@ extern unsigned int __mxc_cpu_type; # define cpu_is_mx21() (0) #endif -#ifdef CONFIG_ARCH_MX25 +#ifdef CONFIG_SOC_IMX25 # ifdef mxc_cpu_type # undef mxc_cpu_type # define mxc_cpu_type __mxc_cpu_type @@ -104,7 +104,7 @@ extern unsigned int __mxc_cpu_type; # define cpu_is_mx25() (0) #endif -#ifdef CONFIG_MACH_MX27 +#ifdef CONFIG_SOC_IMX27 # ifdef mxc_cpu_type # undef mxc_cpu_type # define mxc_cpu_type __mxc_cpu_type -- cgit v1.2.3 From fe31ad41590daf9c5262b53cf6947f3be5c24b60 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 10 May 2011 18:15:25 +0200 Subject: ARM i.MX tzic: do not depend on MXC_INTERNAL_IRQS This becomes meaningless in subsequent patches. Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/tzic.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index 57f9395f87ce..710f2e7da4ce 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c @@ -49,6 +49,8 @@ void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */ +#define TZIC_NUM_IRQS 128 + #ifdef CONFIG_FIQ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) { @@ -166,7 +168,7 @@ void __init tzic_init_irq(void __iomem *irqbase) /* all IRQ no FIQ Warning :: No selection */ - for (i = 0; i < MXC_INTERNAL_IRQS; i++) { + for (i = 0; i < TZIC_NUM_IRQS; i++) { irq_set_chip_and_handler(i, &mxc_tzic_chip.base, handle_level_irq); set_irq_flags(i, IRQF_VALID); -- cgit v1.2.3 From 5a24d69c2cd3522e5ed6f8bd7a1e956138149dcd Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 10 May 2011 18:16:10 +0200 Subject: ARM i.MX avic: do not depend on MXC_INTERNAL_IRQS This becomes meaningless in subsequent patches. Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/avic.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index 09e2bd0fcdca..55d2534ec727 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c @@ -46,6 +46,8 @@ #define AVIC_FIPNDH 0x60 /* fast int pending high */ #define AVIC_FIPNDL 0x64 /* fast int pending low */ +#define AVIC_NUM_IRQS 64 + void __iomem *avic_base; #ifdef CONFIG_MXC_IRQ_PRIOR @@ -54,7 +56,7 @@ static int avic_irq_set_priority(unsigned char irq, unsigned char prio) unsigned int temp; unsigned int mask = 0x0F << irq % 8 * 4; - if (irq >= MXC_INTERNAL_IRQS) + if (irq >= AVIC_NUM_IRQS) return -EINVAL;; temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8)); @@ -72,14 +74,14 @@ static int avic_set_irq_fiq(unsigned int irq, unsigned int type) { unsigned int irqt; - if (irq >= MXC_INTERNAL_IRQS) + if (irq >= AVIC_NUM_IRQS) return -EINVAL; - if (irq < MXC_INTERNAL_IRQS / 2) { + if (irq < AVIC_NUM_IRQS / 2) { irqt = __raw_readl(avic_base + AVIC_INTTYPEL) & ~(1 << irq); __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEL); } else { - irq -= MXC_INTERNAL_IRQS / 2; + irq -= AVIC_NUM_IRQS / 2; irqt = __raw_readl(avic_base + AVIC_INTTYPEH) & ~(1 << irq); __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEH); } @@ -138,7 +140,7 @@ void __init mxc_init_irq(void __iomem *irqbase) /* all IRQ no FIQ */ __raw_writel(0, avic_base + AVIC_INTTYPEH); __raw_writel(0, avic_base + AVIC_INTTYPEL); - for (i = 0; i < MXC_INTERNAL_IRQS; i++) { + for (i = 0; i < AVIC_NUM_IRQS; i++) { irq_set_chip_and_handler(i, &mxc_avic_chip.base, handle_level_irq); set_irq_flags(i, IRQF_VALID); -- cgit v1.2.3 From 7cf7381f35330b54cc894bd74137aae1ebb07bbf Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 11 May 2011 11:31:54 +0200 Subject: ARM i.MX: get rid of wrong MXC_INTERNAL_IRQ usage There are several occurences where MXC_INTERNAL_IRQ is assumed to be the start of the gpio interrupts. It was never meant this way. Replace these with gpio_to_irq. Signed-off-by: Sascha Hauer Acked-by: Fabio Estevam --- arch/arm/mach-imx/mach-mx35_3ds.c | 2 +- arch/arm/mach-mx5/board-cpuimx51.c | 12 ++++-------- arch/arm/mach-mx5/board-mx51_3ds.c | 3 ++- arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c | 6 +++--- arch/arm/plat-mxc/include/mach/iomux-v1.h | 3 --- 5 files changed, 10 insertions(+), 16 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c index 882880ac1bbc..c10221d3d102 100644 --- a/arch/arm/mach-imx/mach-mx35_3ds.c +++ b/arch/arm/mach-imx/mach-mx35_3ds.c @@ -43,7 +43,7 @@ #include "devices-imx35.h" -#define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTA + 1) +#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(1, 1)) static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c index 4efa02ee1639..7fbfd0636a35 100644 --- a/arch/arm/mach-mx5/board-cpuimx51.c +++ b/arch/arm/mach-mx5/board-cpuimx51.c @@ -43,10 +43,6 @@ #define CPUIMX51_QUARTB_GPIO IMX_GPIO_NR(3, 25) #define CPUIMX51_QUARTC_GPIO IMX_GPIO_NR(3, 26) #define CPUIMX51_QUARTD_GPIO IMX_GPIO_NR(3, 27) -#define CPUIMX51_QUARTA_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTA_GPIO) -#define CPUIMX51_QUARTB_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTB_GPIO) -#define CPUIMX51_QUARTC_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTC_GPIO) -#define CPUIMX51_QUARTD_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTD_GPIO) #define CPUIMX51_QUART_XTAL 14745600 #define CPUIMX51_QUART_REGSHIFT 17 @@ -61,7 +57,7 @@ static struct plat_serial8250_port serial_platform_data[] = { { .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000), - .irq = CPUIMX51_QUARTA_IRQ, + .irq = gpio_to_irq(CPUIMX51_QUARTA_GPIO), .irqflags = IRQF_TRIGGER_HIGH, .uartclk = CPUIMX51_QUART_XTAL, .regshift = CPUIMX51_QUART_REGSHIFT, @@ -69,7 +65,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, }, { .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000), - .irq = CPUIMX51_QUARTB_IRQ, + .irq = gpio_to_irq(CPUIMX51_QUARTB_GPIO), .irqflags = IRQF_TRIGGER_HIGH, .uartclk = CPUIMX51_QUART_XTAL, .regshift = CPUIMX51_QUART_REGSHIFT, @@ -77,7 +73,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, }, { .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000), - .irq = CPUIMX51_QUARTC_IRQ, + .irq = gpio_to_irq(CPUIMX51_QUARTC_GPIO), .irqflags = IRQF_TRIGGER_HIGH, .uartclk = CPUIMX51_QUART_XTAL, .regshift = CPUIMX51_QUART_REGSHIFT, @@ -85,7 +81,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, }, { .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000), - .irq = CPUIMX51_QUARTD_IRQ, + .irq = irq_to_gpio(CPUIMX51_QUARTD_GPIO), .irqflags = IRQF_TRIGGER_HIGH, .uartclk = CPUIMX51_QUART_XTAL, .regshift = CPUIMX51_QUART_REGSHIFT, diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c index 63dfbeafbc1e..11b2c7a31ddf 100644 --- a/arch/arm/mach-mx5/board-mx51_3ds.c +++ b/arch/arm/mach-mx5/board-mx51_3ds.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -26,7 +27,7 @@ #include "devices-imx51.h" #include "devices.h" -#define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTA + 6) +#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(1, 6)) #define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28) static iomux_v3_cfg_t mx51_3ds_pads[] = { diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c index 02ce720c887f..bbf4564bd050 100644 --- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c +++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c @@ -31,7 +31,6 @@ #include "devices.h" #define MBIMX51_TSC2007_GPIO IMX_GPIO_NR(3, 30) -#define MBIMX51_TSC2007_IRQ (MXC_INTERNAL_IRQS + MBIMX51_TSC2007_GPIO) #define MBIMX51_LED0 IMX_GPIO_NR(3, 5) #define MBIMX51_LED1 IMX_GPIO_NR(3, 6) #define MBIMX51_LED2 IMX_GPIO_NR(3, 7) @@ -161,7 +160,7 @@ struct tsc2007_platform_data tsc2007_data = { static struct i2c_board_info mbimx51_i2c_devices[] = { { I2C_BOARD_INFO("tsc2007", 0x49), - .irq = MBIMX51_TSC2007_IRQ, + .irq = gpio_to_irq(MBIMX51_TSC2007_GPIO), .platform_data = &tsc2007_data, }, { I2C_BOARD_INFO("tlv320aic23", 0x1a), @@ -198,7 +197,8 @@ void __init eukrea_mbimx51_baseboard_init(void) gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq"); gpio_direction_input(MBIMX51_TSC2007_GPIO); - irq_set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING); + irq_set_irq_type(gpio_to_irq(MBIMX51_TSC2007_GPIO), + IRQF_TRIGGER_FALLING); i2c_register_board_info(1, mbimx51_i2c_devices, ARRAY_SIZE(mbimx51_i2c_devices)); diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h index 253d64d686f8..6fa8a707b9a0 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v1.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h @@ -85,9 +85,6 @@ #define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT) #define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT) -/* decode irq number to use with IMR(x), ISR(x) and friends */ -#define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5) - #define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x) #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) -- cgit v1.2.3 From 07d1483a420861eb5581ebff74904c8a5ec33b19 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 10 May 2011 11:21:00 -0300 Subject: ARM: imx/mach-apf9328: Simplify UART0 registration As no flag is passed into UART0 platform data, pass NULL argument when registering UART0. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mach-apf9328.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c index 15e45c84e371..c11d0ab14848 100644 --- a/arch/arm/mach-imx/mach-apf9328.c +++ b/arch/arm/mach-imx/mach-apf9328.c @@ -99,11 +99,6 @@ static struct platform_device dm9000x_device = { } }; -/* --- SERIAL RESSOURCE --- */ -static const struct imxuart_platform_data uart0_pdata __initconst = { - .flags = 0, -}; - static const struct imxuart_platform_data uart1_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; @@ -119,7 +114,7 @@ static void __init apf9328_init(void) ARRAY_SIZE(apf9328_pins), "APF9328"); - imx1_add_imx_uart0(&uart0_pdata); + imx1_add_imx_uart0(NULL); imx1_add_imx_uart1(&uart1_pdata); platform_add_devices(devices, ARRAY_SIZE(devices)); -- cgit v1.2.3 From ae817266710b18f767cf247e9568f52fb88abca0 Mon Sep 17 00:00:00 2001 From: H Hartley Sweeten Date: Mon, 6 Jun 2011 13:44:57 -0700 Subject: plat-mxc/pwm.c: use resource_size() Signed-off-by: H Hartley Sweeten Cc: Sascha Hauer Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/pwm.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c index 7a61ef8f471a..761c3c940a68 100644 --- a/arch/arm/plat-mxc/pwm.c +++ b/arch/arm/plat-mxc/pwm.c @@ -214,14 +214,14 @@ static int __devinit mxc_pwm_probe(struct platform_device *pdev) goto err_free_clk; } - r = request_mem_region(r->start, r->end - r->start + 1, pdev->name); + r = request_mem_region(r->start, resource_size(r), pdev->name); if (r == NULL) { dev_err(&pdev->dev, "failed to request memory resource\n"); ret = -EBUSY; goto err_free_clk; } - pwm->mmio_base = ioremap(r->start, r->end - r->start + 1); + pwm->mmio_base = ioremap(r->start, resource_size(r)); if (pwm->mmio_base == NULL) { dev_err(&pdev->dev, "failed to ioremap() registers\n"); ret = -ENODEV; @@ -236,7 +236,7 @@ static int __devinit mxc_pwm_probe(struct platform_device *pdev) return 0; err_free_mem: - release_mem_region(r->start, r->end - r->start + 1); + release_mem_region(r->start, resource_size(r)); err_free_clk: clk_put(pwm->clk); err_free: @@ -260,7 +260,7 @@ static int __devexit mxc_pwm_remove(struct platform_device *pdev) iounmap(pwm->mmio_base); r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(r->start, r->end - r->start + 1); + release_mem_region(r->start, resource_size(r)); clk_put(pwm->clk); -- cgit v1.2.3 From 31b738a4f4dfea3b464a9cb5fe18aa4ba85eb984 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 21 Jun 2011 14:49:36 -0300 Subject: ARM: mach-imx/scb9328: Make the UART gpio setup simpler Place the UART gpio initialization inside the scb9328_init function as it is done on other i.MX boards. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mach-scb9328.c | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c index dcaee043628e..b77386573502 100644 --- a/arch/arm/mach-imx/mach-scb9328.c +++ b/arch/arm/mach-imx/mach-scb9328.c @@ -101,21 +101,7 @@ static const int mxc_uart1_pins[] = { PC12_PF_UART1_RXD, }; -static int uart1_mxc_init(struct platform_device *pdev) -{ - return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, - ARRAY_SIZE(mxc_uart1_pins), "UART1"); -} - -static void uart1_mxc_exit(struct platform_device *pdev) -{ - mxc_gpio_release_multiple_pins(mxc_uart1_pins, - ARRAY_SIZE(mxc_uart1_pins)); -} - static const struct imxuart_platform_data uart_pdata __initconst = { - .init = uart1_mxc_init, - .exit = uart1_mxc_exit, .flags = IMXUART_HAVE_RTSCTS, }; @@ -129,6 +115,9 @@ static struct platform_device *devices[] __initdata = { */ static void __init scb9328_init(void) { + mxc_gpio_setup_multiple_pins(mxc_uart1_pins, + ARRAY_SIZE(mxc_uart1_pins), "UART1"); + imx1_add_imx_uart0(&uart_pdata); printk(KERN_INFO"Scb9328: Adding devices\n"); -- cgit v1.2.3 From c084473d7a51dde74008e44d995f6da569f17802 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Jun 2011 09:25:27 -0300 Subject: ARM: mach-imx/mx27_3ds: Use the standard gpio_to_irq function Use the standard gpio_to_irq function instead of a dedicated IRQ_GPIOx macro. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mach-mx27_3ds.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index e7965ec176fc..ccb9c3f7fe20 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -47,6 +47,7 @@ #define SPI2_SS0 IMX_GPIO_NR(4, 21) #define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28)) #define PMIC_INT IMX_GPIO_NR(3, 14) +#define SD1_CD IMX_GPIO_NR(2, 26) static const int mx27pdk_pins[] __initconst = { /* UART1 */ @@ -135,13 +136,13 @@ static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = { static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq, void *data) { - return request_irq(IRQ_GPIOB(26), detect_irq, IRQF_TRIGGER_FALLING | - IRQF_TRIGGER_RISING, "sdhc1-card-detect", data); + return request_irq(gpio_to_irq(SD1_CD), detect_irq, + IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, "sdhc1-card-detect", data); } static void mx27_3ds_sdhc1_exit(struct device *dev, void *data) { - free_irq(IRQ_GPIOB(26), data); + free_irq(gpio_to_irq(SD1_CD), data); } static const struct imxmmc_platform_data sdhc1_pdata __initconst = { @@ -275,7 +276,7 @@ static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { .bus_num = 1, .chip_select = 0, /* SS0 */ .platform_data = &mc13783_pdata, - .irq = IRQ_GPIOC(14), + .irq = gpio_to_irq(PMIC_INT), .mode = SPI_CS_HIGH, }, }; -- cgit v1.2.3 From 6d2385ab2532f3a8e2b9d195c006c07919555c31 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Jun 2011 09:25:28 -0300 Subject: ARM: mach-imx/mx27_3ds: Do not annotate the chip select as internal On the i.MX SPI driver the chipselect pins can be of the following types: - internal: when the chipselect pin is used as a dedicated CS pin of the CSPI controller - GPIO: a generic GPIO can be used as a chipselect funtion On the mx27_3ds the SPI2 chip select is a GPIO, so don't annotate 'internal' in the chip select definition. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mach-mx27_3ds.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index ccb9c3f7fe20..352f75da3a4a 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -262,11 +262,11 @@ static struct mc13xxx_platform_data mc13783_pdata = { }; /* SPI */ -static int spi2_internal_chipselect[] = {SPI2_SS0}; +static int spi2_chipselect[] = {SPI2_SS0}; static const struct spi_imx_master spi2_pdata __initconst = { - .chipselect = spi2_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi2_internal_chipselect), + .chipselect = spi2_chipselect, + .num_chipselect = ARRAY_SIZE(spi2_chipselect), }; static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { -- cgit v1.2.3 From fad107086d5a869c1c07e5bb35b7b57a10ecf578 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 19 May 2011 17:25:05 +0200 Subject: ARM i.MX debug macro: use CONFIG_SOC_* instead of CONFIG_ARCH_* CONFIG_ARCH_* are deprecated, so remove one user. Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/debug-macro.S | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S index 8e8d175e5077..91fc7cdb5dc9 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S @@ -12,32 +12,32 @@ */ #include -#ifdef CONFIG_ARCH_MX1 +#ifdef CONFIG_SOC_IMX1 #define UART_PADDR MX1_UART1_BASE_ADDR #endif -#ifdef CONFIG_ARCH_MX25 +#ifdef CONFIG_SOC_IMX25 #ifdef UART_PADDR #error "CONFIG_DEBUG_LL is incompatible with multiple archs" #endif #define UART_PADDR MX25_UART1_BASE_ADDR #endif -#ifdef CONFIG_ARCH_MX2 +#if defined(CONFIG_SOC_IMX21) || defined (CONFIG_SOC_IMX27) #ifdef UART_PADDR #error "CONFIG_DEBUG_LL is incompatible with multiple archs" #endif #define UART_PADDR MX2x_UART1_BASE_ADDR #endif -#ifdef CONFIG_ARCH_MX3 +#if defined(CONFIG_SOC_IMX31) || defined(CONFIG_SOC_IMX35) #ifdef UART_PADDR #error "CONFIG_DEBUG_LL is incompatible with multiple archs" #endif #define UART_PADDR MX3x_UART1_BASE_ADDR #endif -#ifdef CONFIG_ARCH_MX5 +#ifdef CONFIG_SOC_IMX51 #ifdef UART_PADDR #error "CONFIG_DEBUG_LL is incompatible with multiple archs" #endif -- cgit v1.2.3 From d17572741bacb851f0a689c7751ce909835ad96c Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 25 May 2011 21:55:39 +0800 Subject: ARM: mxs_defconfig: Add mx23evk and mx28evk build The patch adds following configurations to enable build of mx23evk and mx28evk in defconfig. CONFIG_MACH_MX23EVK CONFIG_MACH_MX28EVK Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer --- arch/arm/configs/mxs_defconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig index 5a6ff7c605df..db2cb7d180dc 100644 --- a/arch/arm/configs/mxs_defconfig +++ b/arch/arm/configs/mxs_defconfig @@ -22,6 +22,8 @@ CONFIG_BLK_DEV_INTEGRITY=y # CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_CFQ is not set CONFIG_ARCH_MXS=y +CONFIG_MACH_MX23EVK=y +CONFIG_MACH_MX28EVK=y CONFIG_MACH_STMP378X_DEVB=y CONFIG_MACH_TX28=y # CONFIG_ARM_THUMB is not set -- cgit v1.2.3 From 5dc3394c192cb8845a4594a4d029231392634d8a Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 28 May 2011 11:51:32 -0300 Subject: ARM: mx5/mx53_loco: Add support for LED MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Fabio Estevam Acked-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/Kconfig | 1 + arch/arm/mach-mx5/board-mx53_loco.c | 17 ++++++++++++++++- 2 files changed, 17 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index f25e9d7bf0f5..79765122b6ff 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -203,6 +203,7 @@ config MACH_MX53_LOCO select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX select IMX_HAVE_PLATFORM_GPIO_KEYS + select LEDS_GPIO_REGISTER help Include support for MX53 LOCO platform. This includes specific configurations for the board and its peripherals. diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c index 359c3e248add..57576f709f20 100644 --- a/arch/arm/mach-mx5/board-mx53_loco.c +++ b/arch/arm/mach-mx5/board-mx53_loco.c @@ -38,6 +38,7 @@ #define MX53_LOCO_UI1 IMX_GPIO_NR(2, 14) #define MX53_LOCO_UI2 IMX_GPIO_NR(2, 15) #define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6) +#define LOCO_LED IMX_GPIO_NR(7, 7) static iomux_v3_cfg_t mx53_loco_pads[] = { /* FEC */ @@ -163,7 +164,7 @@ static iomux_v3_cfg_t mx53_loco_pads[] = { MX53_PAD_GPIO_7__SPDIF_PLOCK, MX53_PAD_GPIO_17__SPDIF_OUT1, /* GPIO */ - MX53_PAD_PATA_DA_1__GPIO7_7, + MX53_PAD_PATA_DA_1__GPIO7_7, /* LED */ MX53_PAD_PATA_DA_2__GPIO7_8, MX53_PAD_PATA_DATA5__GPIO2_5, MX53_PAD_PATA_DATA6__GPIO2_6, @@ -225,6 +226,19 @@ static const struct imxi2c_platform_data mx53_loco_i2c_data __initconst = { .bitrate = 100000, }; +static const struct gpio_led mx53loco_leds[] __initconst = { + { + .name = "green", + .default_trigger = "heartbeat", + .gpio = LOCO_LED, + }, +}; + +static const struct gpio_led_platform_data mx53loco_leds_data __initconst = { + .leds = mx53loco_leds, + .num_leds = ARRAY_SIZE(mx53loco_leds), +}; + static void __init mx53_loco_board_init(void) { imx53_soc_init(); @@ -240,6 +254,7 @@ static void __init mx53_loco_board_init(void) imx53_add_sdhci_esdhc_imx(0, NULL); imx53_add_sdhci_esdhc_imx(2, NULL); imx_add_gpio_keys(&loco_button_data); + gpio_led_register_device(-1, &mx53loco_leds_data); } static void __init mx53_loco_timer_init(void) -- cgit v1.2.3 From 95b7445946ca68222ad84cad3703a1efe1110869 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 30 May 2011 12:42:26 -0300 Subject: ARM: mx5/mx53_evk: Add support for LED Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/Kconfig | 1 + arch/arm/mach-mx5/board-mx53_evk.c | 17 +++++++++++++++++ 2 files changed, 18 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 79765122b6ff..3c9845552ca7 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -180,6 +180,7 @@ config MACH_MX53_EVK select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX select IMX_HAVE_PLATFORM_SPI_IMX + select LEDS_GPIO_REGISTER help Include support for MX53 EVK platform. This includes specific configurations for the board and its peripherals. diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c index 0d9218a6e2d2..1b417b06b736 100644 --- a/arch/arm/mach-mx5/board-mx53_evk.c +++ b/arch/arm/mach-mx5/board-mx53_evk.c @@ -35,6 +35,7 @@ #define MX53_EVK_FEC_PHY_RST IMX_GPIO_NR(7, 6) #define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30) #define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19) +#define MX53EVK_LED IMX_GPIO_NR(7, 7) #include "crm_regs.h" #include "devices-imx53.h" @@ -58,12 +59,27 @@ static iomux_v3_cfg_t mx53_evk_pads[] = { /* ecspi chip select lines */ MX53_PAD_EIM_EB2__GPIO2_30, MX53_PAD_EIM_D19__GPIO3_19, + /* LED */ + MX53_PAD_PATA_DA_1__GPIO7_7, }; static const struct imxuart_platform_data mx53_evk_uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, }; +static const struct gpio_led mx53evk_leds[] __initconst = { + { + .name = "green", + .default_trigger = "heartbeat", + .gpio = MX53EVK_LED, + }, +}; + +static const struct gpio_led_platform_data mx53evk_leds_data __initconst = { + .leds = mx53evk_leds, + .num_leds = ARRAY_SIZE(mx53evk_leds), +}; + static inline void mx53_evk_init_uart(void) { imx53_add_imx_uart(0, NULL); @@ -135,6 +151,7 @@ static void __init mx53_evk_board_init(void) ARRAY_SIZE(mx53_evk_spi_board_info)); imx53_add_ecspi(0, &mx53_evk_spi_data); imx53_add_imx2_wdt(0, NULL); + gpio_led_register_device(-1, &mx53evk_leds_data); } static void __init mx53_evk_timer_init(void) -- cgit v1.2.3 From 53b8ff9d3781fe6ff74494ecaea735b322d9ef8e Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 31 May 2011 17:07:03 +0800 Subject: ARM: mxs/mx28evk: add leds-gpio device for heartbeat It adds LED2 on mx28evk board as heartbeat trigger for diagnostic purpose. Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer --- arch/arm/mach-mxs/Kconfig | 1 + arch/arm/mach-mxs/mach-mx28evk.c | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index 162b0b0bc356..1d3985f37858 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig @@ -41,6 +41,7 @@ config MACH_MX23EVK config MACH_MX28EVK bool "Support MX28EVK Platform" select SOC_IMX28 + select LEDS_GPIO_REGISTER select MXS_HAVE_AMBA_DUART select MXS_HAVE_PLATFORM_AUART select MXS_HAVE_PLATFORM_FEC diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c index 56767a5cce0e..eaaf6ff28990 100644 --- a/arch/arm/mach-mxs/mach-mx28evk.c +++ b/arch/arm/mach-mxs/mach-mx28evk.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -29,6 +30,7 @@ #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13) #define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15) +#define MX28EVK_GPIO_LED MXS_GPIO_NR(3, 5) #define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18) #define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30) #define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13) @@ -178,6 +180,23 @@ static const iomux_cfg_t mx28evk_pads[] __initconst = { /* slot power enable */ MX28_PAD_PWM4__GPIO_3_29 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), + + /* led */ + MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL, +}; + +/* led */ +static const struct gpio_led mx28evk_leds[] __initconst = { + { + .name = "GPIO-LED", + .default_trigger = "heartbeat", + .gpio = MX28EVK_GPIO_LED, + }, +}; + +static const struct gpio_led_platform_data mx28evk_led_data __initconst = { + .leds = mx28evk_leds, + .num_leds = ARRAY_SIZE(mx28evk_leds), }; /* fec */ @@ -385,6 +404,8 @@ static void __init mx28evk_init(void) if (ret) pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret); mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); + + gpio_led_register_device(0, &mx28evk_led_data); } static void __init mx28evk_timer_init(void) -- cgit v1.2.3 From 8b6c44f10087fedfb2e041e964b373df53c65514 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 7 Jun 2011 13:59:14 +0800 Subject: ARM: mxc: convert tzic to use generic irq chip The patch converts mxc tzic interrupt controller to use generic irq chip. Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer --- arch/arm/Kconfig | 1 + arch/arm/plat-mxc/irq-common.c | 13 +++--- arch/arm/plat-mxc/tzic.c | 97 +++++++++++------------------------------- 3 files changed, 32 insertions(+), 79 deletions(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9adc278a22ab..300226641860 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -376,6 +376,7 @@ config ARCH_MXC select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP select CLKSRC_MMIO + select GENERIC_IRQ_CHIP select HAVE_SCHED_CLOCK help Support for Freescale MXC/iMX-based family of processors diff --git a/arch/arm/plat-mxc/irq-common.c b/arch/arm/plat-mxc/irq-common.c index e1c6eff7258a..96953e2e4f11 100644 --- a/arch/arm/plat-mxc/irq-common.c +++ b/arch/arm/plat-mxc/irq-common.c @@ -42,17 +42,16 @@ EXPORT_SYMBOL(imx_irq_set_priority); int mxc_set_irq_fiq(unsigned int irq, unsigned int type) { - struct mxc_irq_chip *chip; - struct irq_chip *base; + struct irq_chip_generic *gc; + int (*set_irq_fiq)(unsigned int, unsigned int); int ret; ret = -ENOSYS; - base = irq_get_chip(irq); - if (base) { - chip = container_of(base, struct mxc_irq_chip, base); - if (chip->set_irq_fiq) - ret = chip->set_irq_fiq(irq, type); + gc = irq_get_chip_data(irq); + if (gc && gc->private) { + set_irq_fiq = gc->private; + ret = set_irq_fiq(irq, type); } return ret; diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index 710f2e7da4ce..f257fccdc394 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c @@ -68,78 +68,34 @@ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) return 0; } +#else +#define tzic_set_irq_fiq NULL #endif -/** - * tzic_mask_irq() - Disable interrupt source "d" in the TZIC - * - * @param d interrupt source - */ -static void tzic_mask_irq(struct irq_data *d) -{ - int index, off; - - index = d->irq >> 5; - off = d->irq & 0x1F; - __raw_writel(1 << off, tzic_base + TZIC_ENCLEAR0(index)); -} - -/** - * tzic_unmask_irq() - Enable interrupt source "d" in the TZIC - * - * @param d interrupt source - */ -static void tzic_unmask_irq(struct irq_data *d) -{ - int index, off; - - index = d->irq >> 5; - off = d->irq & 0x1F; - __raw_writel(1 << off, tzic_base + TZIC_ENSET0(index)); -} - -static unsigned int wakeup_intr[4]; +static unsigned int *wakeup_intr[4]; -/** - * tzic_set_wake_irq() - Set interrupt source "d" in the TZIC as a wake-up source. - * - * @param d interrupt source - * @param enable enable as wake-up if equal to non-zero - * disble as wake-up if equal to zero - * - * @return This function returns 0 on success. - */ -static int tzic_set_wake_irq(struct irq_data *d, unsigned int enable) +static __init void tzic_init_gc(unsigned int irq_start) { - unsigned int index, off; - - index = d->irq >> 5; - off = d->irq & 0x1F; - - if (index > 3) - return -EINVAL; - - if (enable) - wakeup_intr[index] |= (1 << off); - else - wakeup_intr[index] &= ~(1 << off); - - return 0; + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + int idx = irq_start >> 5; + + gc = irq_alloc_generic_chip("tzic", 1, irq_start, tzic_base, + handle_level_irq); + gc->private = tzic_set_irq_fiq; + gc->wake_enabled = IRQ_MSK(32); + wakeup_intr[idx] = &gc->wake_active; + + ct = gc->chip_types; + ct->chip.irq_mask = irq_gc_mask_disable_reg; + ct->chip.irq_unmask = irq_gc_unmask_enable_reg; + ct->chip.irq_set_wake = irq_gc_set_wake; + ct->regs.disable = TZIC_ENCLEAR0(idx); + ct->regs.enable = TZIC_ENSET0(idx); + + irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0); } -static struct mxc_irq_chip mxc_tzic_chip = { - .base = { - .name = "MXC_TZIC", - .irq_ack = tzic_mask_irq, - .irq_mask = tzic_mask_irq, - .irq_unmask = tzic_unmask_irq, - .irq_set_wake = tzic_set_wake_irq, - }, -#ifdef CONFIG_FIQ - .set_irq_fiq = tzic_set_irq_fiq, -#endif -}; - /* * This function initializes the TZIC hardware and disables all the * interrupts. It registers the interrupt enable and disable functions @@ -168,11 +124,8 @@ void __init tzic_init_irq(void __iomem *irqbase) /* all IRQ no FIQ Warning :: No selection */ - for (i = 0; i < TZIC_NUM_IRQS; i++) { - irq_set_chip_and_handler(i, &mxc_tzic_chip.base, - handle_level_irq); - set_irq_flags(i, IRQF_VALID); - } + for (i = 0; i < TZIC_NUM_IRQS; i += 32) + tzic_init_gc(i); #ifdef CONFIG_FIQ /* Initialize FIQ */ @@ -199,7 +152,7 @@ int tzic_enable_wake(int is_idle) for (i = 0; i < 4; i++) { v = is_idle ? __raw_readl(tzic_base + TZIC_ENSET0(i)) : - wakeup_intr[i]; + *wakeup_intr[i]; __raw_writel(v, tzic_base + TZIC_WAKEUP0(i)); } -- cgit v1.2.3 From bd8978267d024521bdd6e453dcefc64d78d6afe6 Mon Sep 17 00:00:00 2001 From: Andre Silva Date: Fri, 10 Jun 2011 13:08:14 -0300 Subject: ARM: mach-mx5/mx53_ard: Add support for i.MX53 ARD board Signed-off-by: Andre Silva Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/Kconfig | 8 ++ arch/arm/mach-mx5/Makefile | 1 + arch/arm/mach-mx5/board-mx53_ard.c | 176 ++++++++++++++++++++++++++++ arch/arm/plat-mxc/include/mach/uncompress.h | 1 + 4 files changed, 186 insertions(+) create mode 100644 arch/arm/mach-mx5/board-mx53_ard.c (limited to 'arch') diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 3c9845552ca7..695cdf017c5e 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -209,6 +209,14 @@ config MACH_MX53_LOCO Include support for MX53 LOCO platform. This includes specific configurations for the board and its peripherals. +config MACH_MX53_ARD + bool "Support MX53 ARD platforms" + select SOC_IMX53 + select IMX_HAVE_PLATFORM_IMX_UART + help + Include support for MX53 ARD platform. This includes specific + configurations for the board and its peripherals. + endif # ARCH_MX53_SUPPORTED endif diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile index 0b9338cec516..df67fefdc6cb 100644 --- a/arch/arm/mach-mx5/Makefile +++ b/arch/arm/mach-mx5/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o obj-$(CONFIG_MACH_MX53_EVK) += board-mx53_evk.o obj-$(CONFIG_MACH_MX53_SMD) += board-mx53_smd.o obj-$(CONFIG_MACH_MX53_LOCO) += board-mx53_loco.o +obj-$(CONFIG_MACH_MX53_ARD) += board-mx53_ard.o obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c new file mode 100644 index 000000000000..7e1859ba5f83 --- /dev/null +++ b/arch/arm/mach-mx5/board-mx53_ard.c @@ -0,0 +1,176 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include "crm_regs.h" +#include "devices-imx53.h" + +#define ARD_ETHERNET_INT_B IMX_GPIO_NR(2, 31) + +static iomux_v3_cfg_t mx53_ard_pads[] = { + /* UART1 */ + MX53_PAD_PATA_DIOW__UART1_TXD_MUX, + MX53_PAD_PATA_DMACK__UART1_RXD_MUX, + /* WEIM for CS1 */ + MX53_PAD_EIM_EB3__GPIO2_31, /* ETHERNET_INT_B */ + MX53_PAD_EIM_D16__EMI_WEIM_D_16, + MX53_PAD_EIM_D17__EMI_WEIM_D_17, + MX53_PAD_EIM_D18__EMI_WEIM_D_18, + MX53_PAD_EIM_D19__EMI_WEIM_D_19, + MX53_PAD_EIM_D20__EMI_WEIM_D_20, + MX53_PAD_EIM_D21__EMI_WEIM_D_21, + MX53_PAD_EIM_D22__EMI_WEIM_D_22, + MX53_PAD_EIM_D23__EMI_WEIM_D_23, + MX53_PAD_EIM_D24__EMI_WEIM_D_24, + MX53_PAD_EIM_D25__EMI_WEIM_D_25, + MX53_PAD_EIM_D26__EMI_WEIM_D_26, + MX53_PAD_EIM_D27__EMI_WEIM_D_27, + MX53_PAD_EIM_D28__EMI_WEIM_D_28, + MX53_PAD_EIM_D29__EMI_WEIM_D_29, + MX53_PAD_EIM_D30__EMI_WEIM_D_30, + MX53_PAD_EIM_D31__EMI_WEIM_D_31, + MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0, + MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1, + MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2, + MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3, + MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4, + MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5, + MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6, + MX53_PAD_EIM_OE__EMI_WEIM_OE, + MX53_PAD_EIM_RW__EMI_WEIM_RW, + MX53_PAD_EIM_CS1__EMI_WEIM_CS_1, +}; + +static struct resource ard_smsc911x_resources[] = { + { + .start = MX53_CS1_64MB_BASE_ADDR, + .end = MX53_CS1_64MB_BASE_ADDR + SZ_32M - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = gpio_to_irq(ARD_ETHERNET_INT_B), + .end = gpio_to_irq(ARD_ETHERNET_INT_B), + .flags = IORESOURCE_IRQ, + }, +}; + +struct smsc911x_platform_config ard_smsc911x_config = { + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, + .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, + .flags = SMSC911X_USE_32BIT, +}; + +static struct platform_device ard_smsc_lan9220_device = { + .name = "smsc911x", + .id = -1, + .num_resources = ARRAY_SIZE(ard_smsc911x_resources), + .resource = ard_smsc911x_resources, + .dev = { + .platform_data = &ard_smsc911x_config, + }, +}; + +static void __init mx53_ard_io_init(void) +{ + mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads, + ARRAY_SIZE(mx53_ard_pads)); + + gpio_request(ARD_ETHERNET_INT_B, "eth-int-b"); + gpio_direction_input(ARD_ETHERNET_INT_B); +} + + /* Config CS1 settings for ethernet controller */ +static int weim_cs_config(void) +{ + u32 reg; + void __iomem *weim_base, *iomuxc_base; + + weim_base = ioremap(MX53_WEIM_BASE_ADDR, SZ_4K); + if (!weim_base) + return -ENOMEM; + + iomuxc_base = ioremap(MX53_IOMUXC_BASE_ADDR, SZ_4K); + if (!iomuxc_base) + return -ENOMEM; + + /* CS1 timings for LAN9220 */ + writel(0x20001, (weim_base + 0x18)); + writel(0x0, (weim_base + 0x1C)); + writel(0x16000202, (weim_base + 0x20)); + writel(0x00000002, (weim_base + 0x24)); + writel(0x16002082, (weim_base + 0x28)); + writel(0x00000000, (weim_base + 0x2C)); + writel(0x00000000, (weim_base + 0x90)); + + /* specify 64 MB on CS1 and CS0 on GPR1 */ + reg = readl(iomuxc_base + 0x4); + reg &= ~0x3F; + reg |= 0x1B; + writel(reg, (iomuxc_base + 0x4)); + + iounmap(iomuxc_base); + iounmap(weim_base); + + return 0; +} + +static struct platform_device *devices[] __initdata = { + &ard_smsc_lan9220_device, +}; + +static void __init mx53_ard_board_init(void) +{ + imx53_soc_init(); + imx53_add_imx_uart(0, NULL); + + mx53_ard_io_init(); + weim_cs_config(); + platform_add_devices(devices, ARRAY_SIZE(devices)); +} + +static void __init mx53_ard_timer_init(void) +{ + mx53_clocks_init(32768, 24000000, 22579200, 0); +} + +static struct sys_timer mx53_ard_timer = { + .init = mx53_ard_timer_init, +}; + +MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board") + .map_io = mx53_map_io, + .init_early = imx53_init_early, + .init_irq = mx53_init_irq, + .timer = &mx53_ard_timer, + .init_machine = mx53_ard_board_init, +MACHINE_END diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h index d85e2d1c0324..88fd40452567 100644 --- a/arch/arm/plat-mxc/include/mach/uncompress.h +++ b/arch/arm/plat-mxc/include/mach/uncompress.h @@ -117,6 +117,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id) case MACH_TYPE_MX53_EVK: case MACH_TYPE_MX53_LOCO: case MACH_TYPE_MX53_SMD: + case MACH_TYPE_MX53_ARD: uart_base = MX53_UART1_BASE_ADDR; break; default: -- cgit v1.2.3 From 1a636932f862d5d95b018c884a854c5cbc604f3b Mon Sep 17 00:00:00 2001 From: Andre Silva Date: Fri, 10 Jun 2011 13:15:19 -0300 Subject: ARM:mach-mx5/board-mx53_loco: Add CD and WP GPIOs Signed-off-by: Andre Silva Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/board-mx53_loco.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c index 57576f709f20..54be525e2bd7 100644 --- a/arch/arm/mach-mx5/board-mx53_loco.c +++ b/arch/arm/mach-mx5/board-mx53_loco.c @@ -39,6 +39,9 @@ #define MX53_LOCO_UI2 IMX_GPIO_NR(2, 15) #define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6) #define LOCO_LED IMX_GPIO_NR(7, 7) +#define LOCO_SD3_CD IMX_GPIO_NR(3, 11) +#define LOCO_SD3_WP IMX_GPIO_NR(3, 12) +#define LOCO_SD1_CD IMX_GPIO_NR(3, 13) static iomux_v3_cfg_t mx53_loco_pads[] = { /* FEC */ @@ -71,6 +74,8 @@ static iomux_v3_cfg_t mx53_loco_pads[] = { MX53_PAD_SD1_DATA1__ESDHC1_DAT1, MX53_PAD_SD1_DATA2__ESDHC1_DAT2, MX53_PAD_SD1_DATA3__ESDHC1_DAT3, + /* SD1_CD */ + MX53_PAD_EIM_DA13__GPIO3_13, /* SD3 */ MX53_PAD_PATA_DATA8__ESDHC3_DAT0, MX53_PAD_PATA_DATA9__ESDHC3_DAT1, @@ -203,6 +208,15 @@ static const struct gpio_keys_platform_data loco_button_data __initconst = { .nbuttons = ARRAY_SIZE(loco_buttons), }; +static const struct esdhc_platform_data mx53_loco_sd1_data __initconst = { + .cd_gpio = LOCO_SD1_CD, +}; + +static const struct esdhc_platform_data mx53_loco_sd3_data __initconst = { + .cd_gpio = LOCO_SD3_CD, + .wp_gpio = LOCO_SD3_WP, +}; + static inline void mx53_loco_fec_reset(void) { int ret; @@ -251,8 +265,8 @@ static void __init mx53_loco_board_init(void) imx53_add_imx2_wdt(0, NULL); imx53_add_imx_i2c(0, &mx53_loco_i2c_data); imx53_add_imx_i2c(1, &mx53_loco_i2c_data); - imx53_add_sdhci_esdhc_imx(0, NULL); - imx53_add_sdhci_esdhc_imx(2, NULL); + imx53_add_sdhci_esdhc_imx(0, &mx53_loco_sd1_data); + imx53_add_sdhci_esdhc_imx(2, &mx53_loco_sd3_data); imx_add_gpio_keys(&loco_button_data); gpio_led_register_device(-1, &mx53loco_leds_data); } -- cgit v1.2.3 From 6ecdc11bf8e1105ae393bf74026427180a6c5207 Mon Sep 17 00:00:00 2001 From: Andre Silva Date: Fri, 10 Jun 2011 13:15:20 -0300 Subject: ARM:mach-mx5/board-mx51_babbage: Add CD and WP GPIOs Signed-off-by: Andre Silva Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/board-mx51_babbage.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index e54e4bf61cfd..15c600026aee 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -41,6 +41,10 @@ #define BABBAGE_POWER_KEY IMX_GPIO_NR(2, 21) #define BABBAGE_ECSPI1_CS0 IMX_GPIO_NR(4, 24) #define BABBAGE_ECSPI1_CS1 IMX_GPIO_NR(4, 25) +#define BABBAGE_SD1_CD IMX_GPIO_NR(1, 0) +#define BABBAGE_SD1_WP IMX_GPIO_NR(1, 1) +#define BABBAGE_SD2_CD IMX_GPIO_NR(1, 6) +#define BABBAGE_SD2_WP IMX_GPIO_NR(1, 5) /* USB_CTRL_1 */ #define MX51_USB_CTRL_1_OFFSET 0x10 @@ -142,6 +146,8 @@ static iomux_v3_cfg_t mx51babbage_pads[] = { MX51_PAD_SD1_DATA1__SD1_DATA1, MX51_PAD_SD1_DATA2__SD1_DATA2, MX51_PAD_SD1_DATA3__SD1_DATA3, + MX51_PAD_GPIO1_0__GPIO1_0, + MX51_PAD_GPIO1_1__GPIO1_1, /* SD 2 */ MX51_PAD_SD2_CMD__SD2_CMD, @@ -150,6 +156,8 @@ static iomux_v3_cfg_t mx51babbage_pads[] = { MX51_PAD_SD2_DATA1__SD2_DATA1, MX51_PAD_SD2_DATA2__SD2_DATA2, MX51_PAD_SD2_DATA3__SD2_DATA3, + MX51_PAD_GPIO1_6__GPIO1_6, + MX51_PAD_GPIO1_5__GPIO1_5, /* eCSPI1 */ MX51_PAD_CSPI1_MISO__ECSPI1_MISO, @@ -331,6 +339,16 @@ static const struct spi_imx_master mx51_babbage_spi_pdata __initconst = { .num_chipselect = ARRAY_SIZE(mx51_babbage_spi_cs), }; +static const struct esdhc_platform_data mx51_babbage_sd1_data __initconst = { + .cd_gpio = BABBAGE_SD1_CD, + .wp_gpio = BABBAGE_SD1_WP, +}; + +static const struct esdhc_platform_data mx51_babbage_sd2_data __initconst = { + .cd_gpio = BABBAGE_SD2_CD, + .wp_gpio = BABBAGE_SD2_WP, +}; + /* * Board specific initialization. */ @@ -376,8 +394,8 @@ static void __init mx51_babbage_init(void) mxc_iomux_v3_setup_pad(usbh1stp); babbage_usbhub_reset(); - imx51_add_sdhci_esdhc_imx(0, NULL); - imx51_add_sdhci_esdhc_imx(1, NULL); + imx51_add_sdhci_esdhc_imx(0, &mx51_babbage_sd1_data); + imx51_add_sdhci_esdhc_imx(1, &mx51_babbage_sd2_data); spi_register_board_info(mx51_babbage_spi_board_info, ARRAY_SIZE(mx51_babbage_spi_board_info)); -- cgit v1.2.3 From e3a58be3be7f0d7cf3c0966f3f3369acfab421e8 Mon Sep 17 00:00:00 2001 From: Andre Silva Date: Mon, 13 Jun 2011 14:31:57 -0300 Subject: ARM:mach-mx5/mx53_ard: Add ESDHC support Signed-off-by: Andre Silva Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/Kconfig | 1 + arch/arm/mach-mx5/board-mx53_ard.c | 22 ++++++++++++++++++++++ 2 files changed, 23 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 695cdf017c5e..9a8e6f8c2014 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -213,6 +213,7 @@ config MACH_MX53_ARD bool "Support MX53 ARD platforms" select SOC_IMX53 select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX help Include support for MX53 ARD platform. This includes specific configurations for the board and its peripherals. diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c index 7e1859ba5f83..5d98dbfdfab5 100644 --- a/arch/arm/mach-mx5/board-mx53_ard.c +++ b/arch/arm/mach-mx5/board-mx53_ard.c @@ -36,6 +36,8 @@ #include "devices-imx53.h" #define ARD_ETHERNET_INT_B IMX_GPIO_NR(2, 31) +#define ARD_SD1_CD IMX_GPIO_NR(1, 1) +#define ARD_SD1_WP IMX_GPIO_NR(1, 9) static iomux_v3_cfg_t mx53_ard_pads[] = { /* UART1 */ @@ -69,6 +71,19 @@ static iomux_v3_cfg_t mx53_ard_pads[] = { MX53_PAD_EIM_OE__EMI_WEIM_OE, MX53_PAD_EIM_RW__EMI_WEIM_RW, MX53_PAD_EIM_CS1__EMI_WEIM_CS_1, + /* SDHC1 */ + MX53_PAD_SD1_CMD__ESDHC1_CMD, + MX53_PAD_SD1_CLK__ESDHC1_CLK, + MX53_PAD_SD1_DATA0__ESDHC1_DAT0, + MX53_PAD_SD1_DATA1__ESDHC1_DAT1, + MX53_PAD_SD1_DATA2__ESDHC1_DAT2, + MX53_PAD_SD1_DATA3__ESDHC1_DAT3, + MX53_PAD_PATA_DATA8__ESDHC1_DAT4, + MX53_PAD_PATA_DATA9__ESDHC1_DAT5, + MX53_PAD_PATA_DATA10__ESDHC1_DAT6, + MX53_PAD_PATA_DATA11__ESDHC1_DAT7, + MX53_PAD_GPIO_1__GPIO1_1, + MX53_PAD_GPIO_9__GPIO1_9, }; static struct resource ard_smsc911x_resources[] = { @@ -100,6 +115,11 @@ static struct platform_device ard_smsc_lan9220_device = { }, }; +static const struct esdhc_platform_data mx53_ard_sd1_data __initconst = { + .cd_gpio = ARD_SD1_CD, + .wp_gpio = ARD_SD1_WP, +}; + static void __init mx53_ard_io_init(void) { mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads, @@ -156,6 +176,8 @@ static void __init mx53_ard_board_init(void) mx53_ard_io_init(); weim_cs_config(); platform_add_devices(devices, ARRAY_SIZE(devices)); + + imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); } static void __init mx53_ard_timer_init(void) -- cgit v1.2.3 From 40d32c89c897e573f28653920b223b07efbcfac8 Mon Sep 17 00:00:00 2001 From: Andre Silva Date: Mon, 13 Jun 2011 14:31:58 -0300 Subject: ARM:mach-mx5/mx53_ard: Add Watchdog timer support Signed-off-by: Andre Silva Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/Kconfig | 1 + arch/arm/mach-mx5/board-mx53_ard.c | 1 + 2 files changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 9a8e6f8c2014..5b16f398a320 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -212,6 +212,7 @@ config MACH_MX53_LOCO config MACH_MX53_ARD bool "Support MX53 ARD platforms" select SOC_IMX53 + select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX help diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c index 5d98dbfdfab5..7dd54b9f8682 100644 --- a/arch/arm/mach-mx5/board-mx53_ard.c +++ b/arch/arm/mach-mx5/board-mx53_ard.c @@ -178,6 +178,7 @@ static void __init mx53_ard_board_init(void) platform_add_devices(devices, ARRAY_SIZE(devices)); imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); + imx53_add_imx2_wdt(0, NULL); } static void __init mx53_ard_timer_init(void) -- cgit v1.2.3 From be070a40780ff61be7349b2aeeae35663e01b44b Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 15 Jun 2011 09:59:35 -0300 Subject: ARM: mx53: Add SDMA clock Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/clock-mx51-mx53.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index cea2bba06d0b..005b4aebc24e 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1476,6 +1476,7 @@ static struct clk_lookup mx53_lookups[] = { _REGISTER_CLOCK("imx53-cspi.0", NULL, cspi_clk) _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk) _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk) + _REGISTER_CLOCK("imx-sdma", NULL, sdma_clk) }; static void clk_tree_init(void) -- cgit v1.2.3 From 931de39219bd31944dda69a015ccef103cd1d193 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 12 Jun 2011 21:33:00 -0300 Subject: ARM: mx53: Add SDMA support for MX53 Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/devices/platform-imx-dma.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'arch') diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index c64f015e031b..27104f581700 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c @@ -51,6 +51,11 @@ struct imx_imx_sdma_data imx51_imx_sdma_data __initconst = imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 1); #endif /* ifdef CONFIG_SOC_IMX51 */ +#ifdef CONFIG_SOC_IMX53 +struct imx_imx_sdma_data imx53_imx_sdma_data __initconst = + imx_imx_sdma_data_entry_single(MX53, 2, "imx53", 0); +#endif /* ifdef CONFIG_SOC_IMX53 */ + static struct platform_device __init __maybe_unused *imx_add_imx_sdma( const struct imx_imx_sdma_data *data) { @@ -153,6 +158,22 @@ static struct sdma_script_start_addrs addr_imx51 = { }; #endif +#ifdef CONFIG_SOC_IMX53 +static struct sdma_script_start_addrs addr_imx53 = { + .ap_2_ap_addr = 642, + .app_2_mcu_addr = 683, + .mcu_2_app_addr = 747, + .uart_2_mcu_addr = 817, + .shp_2_mcu_addr = 891, + .mcu_2_shp_addr = 960, + .uartsh_2_mcu_addr = 1032, + .spdif_2_mcu_addr = 1100, + .mcu_2_spdif_addr = 1134, + .firi_2_mcu_addr = 1193, + .mcu_2_firi_addr = 1290, +}; +#endif + static int __init imxXX_add_imx_dma(void) { struct platform_device *ret; @@ -202,6 +223,13 @@ static int __init imxXX_add_imx_dma(void) ret = imx_add_imx_sdma(&imx51_imx_sdma_data); } else #endif + +#if defined(CONFIG_SOC_IMX53) + if (cpu_is_mx53()) { + imx53_imx_sdma_data.pdata.script_addrs = &addr_imx53; + ret = imx_add_imx_sdma(&imx53_imx_sdma_data); + } else +#endif ret = ERR_PTR(-ENODEV); if (IS_ERR(ret)) -- cgit v1.2.3 From aedc383caad3a682589e5e1b2158efed1b7f4e06 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 21 Jun 2011 14:49:35 -0300 Subject: ARM: imx2: Fix GPIO iosize On MX1, MX21 and MX27 each GPIO port has an address space of 256 bytes. Fix the iosize for these platforms. Tested on a mx27_3ds board that can boot fine after this change. Cc: Shawn Guo Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mm-imx1.c | 12 ++++++++---- arch/arm/mach-imx/mm-imx21.c | 12 ++++++------ arch/arm/mach-imx/mm-imx27.c | 12 ++++++------ 3 files changed, 20 insertions(+), 16 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c index b486595701b7..f2a6566e22e7 100644 --- a/arch/arm/mach-imx/mm-imx1.c +++ b/arch/arm/mach-imx/mm-imx1.c @@ -50,8 +50,12 @@ void __init mx1_init_irq(void) void __init imx1_soc_init(void) { - mxc_register_gpio(0, MX1_GPIO1_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTA, 0); - mxc_register_gpio(1, MX1_GPIO2_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTB, 0); - mxc_register_gpio(2, MX1_GPIO3_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTC, 0); - mxc_register_gpio(3, MX1_GPIO4_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTD, 0); + mxc_register_gpio(0, MX1_GPIO1_BASE_ADDR, SZ_256, + MX1_GPIO_INT_PORTA, 0); + mxc_register_gpio(1, MX1_GPIO2_BASE_ADDR, SZ_256, + MX1_GPIO_INT_PORTB, 0); + mxc_register_gpio(2, MX1_GPIO3_BASE_ADDR, SZ_256, + MX1_GPIO_INT_PORTC, 0); + mxc_register_gpio(3, MX1_GPIO4_BASE_ADDR, SZ_256, + MX1_GPIO_INT_PORTD, 0); } diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index f0fb8bcce6f9..f8fb41ce68d1 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c @@ -76,10 +76,10 @@ void __init mx21_init_irq(void) void __init imx21_soc_init(void) { - mxc_register_gpio(0, MX21_GPIO1_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); - mxc_register_gpio(1, MX21_GPIO2_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); - mxc_register_gpio(2, MX21_GPIO3_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); - mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); - mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); - mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0); + mxc_register_gpio(0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); + mxc_register_gpio(1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); + mxc_register_gpio(2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); + mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); + mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); + mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); } diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index d3700cec8ec5..acc6db45439e 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c @@ -76,10 +76,10 @@ void __init mx27_init_irq(void) void __init imx27_soc_init(void) { - mxc_register_gpio(0, MX27_GPIO1_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); - mxc_register_gpio(1, MX27_GPIO2_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); - mxc_register_gpio(2, MX27_GPIO3_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); - mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); - mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); - mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); + mxc_register_gpio(0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); + mxc_register_gpio(1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); + mxc_register_gpio(2, MX27_GPIO3_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); + mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); + mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); + mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); } -- cgit v1.2.3 From f9e9fc2736805fe812d9d27444f57733453386fb Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Mon, 28 Mar 2011 10:14:57 -0500 Subject: ARM: mx51: Add support for low power suspend on MX51 Adds initial low power suspend functionality to MX51. Supports "mem" and "standby" modes. Tested on mx51-babbage. Signed-off-by: Dinh Nguyen Tested-by: Arnaud Patard Tested-by: Shawn Guo Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/Makefile | 1 + arch/arm/mach-mx5/pm-imx5.c | 73 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 74 insertions(+) create mode 100644 arch/arm/mach-mx5/pm-imx5.c (limited to 'arch') diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile index df67fefdc6cb..383e7cd3fbcb 100644 --- a/arch/arm/mach-mx5/Makefile +++ b/arch/arm/mach-mx5/Makefile @@ -6,6 +6,7 @@ obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o obj-$(CONFIG_SOC_IMX50) += mm-mx50.o +obj-$(CONFIG_PM) += pm-imx5.o obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o diff --git a/arch/arm/mach-mx5/pm-imx5.c b/arch/arm/mach-mx5/pm-imx5.c new file mode 100644 index 000000000000..e4529af0da72 --- /dev/null +++ b/arch/arm/mach-mx5/pm-imx5.c @@ -0,0 +1,73 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include "crm_regs.h" + +static struct clk *gpc_dvfs_clk; + +static int mx5_suspend_enter(suspend_state_t state) +{ + clk_enable(gpc_dvfs_clk); + switch (state) { + case PM_SUSPEND_MEM: + mx5_cpu_lp_set(STOP_POWER_OFF); + break; + case PM_SUSPEND_STANDBY: + mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); + break; + default: + return -EINVAL; + } + + if (state == PM_SUSPEND_MEM) { + local_flush_tlb_all(); + flush_cache_all(); + + /*clear the EMPGC0/1 bits */ + __raw_writel(0, MXC_SRPG_EMPGC0_SRPGCR); + __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR); + } + cpu_do_idle(); + clk_disable(gpc_dvfs_clk); + + return 0; +} + +static int mx5_pm_valid(suspend_state_t state) +{ + return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX); +} + +static const struct platform_suspend_ops mx5_suspend_ops = { + .valid = mx5_pm_valid, + .enter = mx5_suspend_enter, +}; + +static int __init mx5_pm_init(void) +{ + if (gpc_dvfs_clk == NULL) + gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); + + if (!IS_ERR(gpc_dvfs_clk)) { + if (cpu_is_mx51()) + suspend_set_ops(&mx5_suspend_ops); + } else + return -EPERM; + + return 0; +} +device_initcall(mx5_pm_init); -- cgit v1.2.3 From 1abcb4cca3a964a8dde1c1e2988fd9a9a1470178 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Jun 2011 09:25:25 -0300 Subject: ARM: mach-imx/mx27_3ds: Add LCD support On mx27_3ds board there is a l4f00242t03 LCD that is controlled via CSPI1. Add support for CSPI1 and LCD. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/Kconfig | 1 + arch/arm/mach-imx/mach-mx27_3ds.c | 90 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 91 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index e8dd22fa7d61..0519dd7f034b 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -278,6 +278,7 @@ config MACH_MX27_3DS select SOC_IMX27 select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT + select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_KEYPAD select IMX_HAVE_PLATFORM_IMX_UART diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index b31d4129e10e..7b7c817474de 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include @@ -47,7 +48,10 @@ #define SPI2_SS0 IMX_GPIO_NR(4, 21) #define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28)) #define PMIC_INT IMX_GPIO_NR(3, 14) +#define SPI1_SS0 IMX_GPIO_NR(4, 28) #define SD1_CD IMX_GPIO_NR(2, 26) +#define LCD_RESET IMX_GPIO_NR(1, 3) +#define LCD_ENABLE IMX_GPIO_NR(1, 31) static const int mx27pdk_pins[] __initconst = { /* UART1 */ @@ -96,6 +100,12 @@ static const int mx27pdk_pins[] __initconst = { PE2_PF_USBOTG_DIR, PE24_PF_USBOTG_CLK, PE25_PF_USBOTG_DATA7, + /* CSPI1 */ + PD31_PF_CSPI1_MOSI, + PD30_PF_CSPI1_MISO, + PD29_PF_CSPI1_SCLK, + PD25_PF_CSPI1_RDY, + SPI1_SS0 | GPIO_GPIO | GPIO_OUT, /* CSPI2 */ PD22_PF_CSPI2_SCLK, PD23_PF_CSPI2_MISO, @@ -106,6 +116,31 @@ static const int mx27pdk_pins[] __initconst = { PD18_PF_I2C_CLK, /* PMIC INT */ PMIC_INT | GPIO_GPIO | GPIO_IN, + /* LCD */ + PA5_PF_LSCLK, + PA6_PF_LD0, + PA7_PF_LD1, + PA8_PF_LD2, + PA9_PF_LD3, + PA10_PF_LD4, + PA11_PF_LD5, + PA12_PF_LD6, + PA13_PF_LD7, + PA14_PF_LD8, + PA15_PF_LD9, + PA16_PF_LD10, + PA17_PF_LD11, + PA18_PF_LD12, + PA19_PF_LD13, + PA20_PF_LD14, + PA21_PF_LD15, + PA22_PF_LD16, + PA23_PF_LD17, + PA28_PF_HSYNC, + PA29_PF_VSYNC, + PA30_PF_CONTRAST, + LCD_ENABLE | GPIO_GPIO | GPIO_OUT, + LCD_RESET | GPIO_GPIO | GPIO_OUT, }; static const struct imxuart_platform_data uart_pdata __initconst = { @@ -262,6 +297,13 @@ static struct mc13xxx_platform_data mc13783_pdata = { }; /* SPI */ +static int spi1_chipselect[] = {SPI1_SS0}; + +static const struct spi_imx_master spi1_pdata __initconst = { + .chipselect = spi1_chipselect, + .num_chipselect = ARRAY_SIZE(spi1_chipselect), +}; + static int spi2_chipselect[] = {SPI2_SS0}; static const struct spi_imx_master spi2_pdata __initconst = { @@ -269,6 +311,46 @@ static const struct spi_imx_master spi2_pdata __initconst = { .num_chipselect = ARRAY_SIZE(spi2_chipselect), }; +static struct imx_fb_videomode mx27_3ds_modes[] = { + { /* 480x640 @ 60 Hz */ + .mode = { + .name = "Epson-VGA", + .refresh = 60, + .xres = 480, + .yres = 640, + .pixclock = 41701, + .left_margin = 20, + .right_margin = 41, + .upper_margin = 10, + .lower_margin = 5, + .hsync_len = 20, + .vsync_len = 10, + .sync = FB_SYNC_OE_ACT_HIGH | + FB_SYNC_CLK_INVERT, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, + }, + .bpp = 16, + .pcr = 0xFAC08B82, + }, +}; + +static const struct imx_fb_platform_data mx27_3ds_fb_data __initconst = { + .mode = mx27_3ds_modes, + .num_modes = ARRAY_SIZE(mx27_3ds_modes), + .pwmr = 0x00A903FF, + .lscr1 = 0x00120300, + .dmacr = 0x00020010, +}; + +/* LCD */ +static struct l4f00242t03_pdata mx27_3ds_lcd_pdata = { + .reset_gpio = LCD_RESET, + .data_enable_gpio = LCD_ENABLE, + .core_supply = "lcd_2v8", + .io_supply = "vdd_lcdio", +}; + static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { { .modalias = "mc13783", @@ -278,6 +360,12 @@ static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { .platform_data = &mc13783_pdata, .irq = gpio_to_irq(PMIC_INT), .mode = SPI_CS_HIGH, + }, { + .modalias = "l4f00242t03", + .max_speed_hz = 5000000, + .bus_num = 0, + .chip_select = 0, /* SS0 */ + .platform_data = &mx27_3ds_lcd_pdata, }, }; @@ -311,12 +399,14 @@ static void __init mx27pdk_init(void) imx27_add_fsl_usb2_udc(&otg_device_pdata); imx27_add_spi_imx1(&spi2_pdata); + imx27_add_spi_imx0(&spi1_pdata); spi_register_board_info(mx27_3ds_spi_devs, ARRAY_SIZE(mx27_3ds_spi_devs)); if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT)) pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n"); imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data); + imx27_add_imx_fb(&mx27_3ds_fb_data); } static void __init mx27pdk_timer_init(void) -- cgit v1.2.3 From 10f046bb1df0e40bbc56579ca5ccad5f951f4047 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Jun 2011 09:25:26 -0300 Subject: ARM: mach-imx/mx27_3ds: Add touchscreen support Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mach-mx27_3ds.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 7b7c817474de..84fb79315dd1 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -293,7 +293,7 @@ static struct mc13xxx_platform_data mc13783_pdata = { .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), }, - .flags = MC13783_USE_REGULATOR, + .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN, }; /* SPI */ -- cgit v1.2.3 From b6a14477695e54da6621c6d3c72f019b8cddb89d Mon Sep 17 00:00:00 2001 From: Andre Silva Date: Wed, 22 Jun 2011 16:33:04 -0300 Subject: ARM:mx53: Add I2C3 support Signed-off-by: Andre Silva Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/clock-mx51-mx53.c | 3 +++ arch/arm/plat-mxc/devices/platform-imx-i2c.c | 3 ++- 2 files changed, 5 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 005b4aebc24e..7173b27265dd 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1279,6 +1279,8 @@ DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG10_OFFSET, NULL, NULL, &ipg_perclk, NULL); DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, NULL, NULL, &ipg_clk, NULL); +DEFINE_CLOCK(i2c3_mx53_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, + NULL, NULL, &ipg_perclk, NULL); /* FEC */ DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET, @@ -1467,6 +1469,7 @@ static struct clk_lookup mx53_lookups[] = { _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) + _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_mx53_clk) _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_mx53_clk) _REGISTER_CLOCK("sdhci-esdhc-imx.2", NULL, esdhc3_mx53_clk) diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/plat-mxc/devices/platform-imx-i2c.c index 2ab74f0da9a6..afe60f7244a8 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c +++ b/arch/arm/plat-mxc/devices/platform-imx-i2c.c @@ -94,8 +94,9 @@ const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = { imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K) imx53_imx_i2c_data_entry(0, 1), imx53_imx_i2c_data_entry(1, 2), + imx53_imx_i2c_data_entry(2, 3), }; -#endif /* ifdef CONFIG_SOC_IMX51 */ +#endif /* ifdef CONFIG_SOC_IMX53 */ struct platform_device *__init imx_add_imx_i2c( const struct imx_imx_i2c_data *data, -- cgit v1.2.3 From 8dd7b817a1135940406a3271346a4a8e39e2b87c Mon Sep 17 00:00:00 2001 From: Andre Silva Date: Wed, 22 Jun 2011 16:33:05 -0300 Subject: ARM:mach-mx5/mx53_ard: Add I2C2 and I2C3 support Signed-off-by: Andre Silva Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/Kconfig | 1 + arch/arm/mach-mx5/board-mx53_ard.c | 21 ++++++++++++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 5b16f398a320..6a47d4c9dd17 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -213,6 +213,7 @@ config MACH_MX53_ARD bool "Support MX53 ARD platforms" select SOC_IMX53 select IMX_HAVE_PLATFORM_IMX2_WDT + select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX help diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c index 7dd54b9f8682..70ae25e6830b 100644 --- a/arch/arm/mach-mx5/board-mx53_ard.c +++ b/arch/arm/mach-mx5/board-mx53_ard.c @@ -84,6 +84,12 @@ static iomux_v3_cfg_t mx53_ard_pads[] = { MX53_PAD_PATA_DATA11__ESDHC1_DAT7, MX53_PAD_GPIO_1__GPIO1_1, MX53_PAD_GPIO_9__GPIO1_9, + /* I2C2 */ + MX53_PAD_EIM_EB2__I2C2_SCL, + MX53_PAD_KEY_ROW3__I2C2_SDA, + /* I2C3 */ + MX53_PAD_GPIO_3__I2C3_SCL, + MX53_PAD_GPIO_16__I2C3_SDA, }; static struct resource ard_smsc911x_resources[] = { @@ -120,6 +126,14 @@ static const struct esdhc_platform_data mx53_ard_sd1_data __initconst = { .wp_gpio = ARD_SD1_WP, }; +static struct imxi2c_platform_data mx53_ard_i2c2_data = { + .bitrate = 50000, +}; + +static struct imxi2c_platform_data mx53_ard_i2c3_data = { + .bitrate = 400000, +}; + static void __init mx53_ard_io_init(void) { mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads, @@ -127,9 +141,12 @@ static void __init mx53_ard_io_init(void) gpio_request(ARD_ETHERNET_INT_B, "eth-int-b"); gpio_direction_input(ARD_ETHERNET_INT_B); + + gpio_request(ARD_I2CPORTEXP_B, "i2cptexp-rst"); + gpio_direction_output(ARD_I2CPORTEXP_B, 1); } - /* Config CS1 settings for ethernet controller */ +/* Config CS1 settings for ethernet controller */ static int weim_cs_config(void) { u32 reg; @@ -179,6 +196,8 @@ static void __init mx53_ard_board_init(void) imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); imx53_add_imx2_wdt(0, NULL); + imx53_add_imx_i2c(1, &mx53_ard_i2c2_data); + imx53_add_imx_i2c(2, &mx53_ard_i2c3_data); } static void __init mx53_ard_timer_init(void) -- cgit v1.2.3 From 3622360430e90d47a0d028dd5333a13771589331 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 22 Jun 2011 22:41:30 +0800 Subject: ARM: mxc: clean up imx-dma device registration The patch follows the implementation of gpio-mxc device registration to break the concentrated imx-dma device registration into soc specific setup function. Then we can avoid the churn of "#ifdef" and the cpu_is_mx checking on such a long list, which makes no sense, considering more soc supports need to be added and we need to support single image for multiple socs in the long run. Signed-off-by: Shawn Guo Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mm-imx21.c | 3 + arch/arm/mach-imx/mm-imx25.c | 26 +++ arch/arm/mach-imx/mm-imx27.c | 3 + arch/arm/mach-imx/mm-imx31.c | 24 +++ arch/arm/mach-imx/mm-imx35.c | 44 +++++ arch/arm/mach-mx5/mm.c | 49 +++++ arch/arm/plat-mxc/devices.c | 16 +- arch/arm/plat-mxc/devices/platform-imx-dma.c | 232 ++---------------------- arch/arm/plat-mxc/include/mach/devices-common.h | 6 + 9 files changed, 183 insertions(+), 220 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index f8fb41ce68d1..4f32a8a9aeed 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -82,4 +83,6 @@ void __init imx21_soc_init(void) mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); + + imx_add_imx_dma(); } diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index 1b6d583f750a..0c545207ce00 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include @@ -61,10 +62,35 @@ void __init mx25_init_irq(void) mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR)); } +static struct sdma_script_start_addrs imx25_sdma_script __initdata = { + .ap_2_ap_addr = 729, + .uart_2_mcu_addr = 904, + .per_2_app_addr = 1255, + .mcu_2_app_addr = 834, + .uartsh_2_mcu_addr = 1120, + .per_2_shp_addr = 1329, + .mcu_2_shp_addr = 1048, + .ata_2_mcu_addr = 1560, + .mcu_2_ata_addr = 1479, + .app_2_per_addr = 1189, + .app_2_mcu_addr = 770, + .shp_2_per_addr = 1407, + .shp_2_mcu_addr = 979, +}; + +static struct sdma_platform_data imx25_sdma_pdata __initdata = { + .sdma_version = 2, + .cpu_name = "imx25", + .to_version = 1, + .script_addrs = &imx25_sdma_script, +}; + void __init imx25_soc_init(void) { mxc_register_gpio(0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); mxc_register_gpio(1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); mxc_register_gpio(2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); mxc_register_gpio(3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); + + imx_add_imx_sdma(MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata); } diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index acc6db45439e..944e02d3ccc2 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -82,4 +83,6 @@ void __init imx27_soc_init(void) mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); + + imx_add_imx_dma(); } diff --git a/arch/arm/mach-imx/mm-imx31.c b/arch/arm/mach-imx/mm-imx31.c index cb16ac661776..6af8519d3d6c 100644 --- a/arch/arm/mach-imx/mm-imx31.c +++ b/arch/arm/mach-imx/mm-imx31.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include @@ -57,9 +58,32 @@ void __init mx31_init_irq(void) mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); } +static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = { + .per_2_per_addr = 1677, +}; + +static struct sdma_script_start_addrs imx31_to2_sdma_script __initdata = { + .ap_2_ap_addr = 423, + .ap_2_bp_addr = 829, + .bp_2_ap_addr = 1029, +}; + +static struct sdma_platform_data imx31_sdma_pdata __initdata = { + .sdma_version = 1, + .cpu_name = "imx31", + .script_addrs = &imx31_to2_sdma_script, +}; + void __init imx31_soc_init(void) { + int to_version = mx31_revision() >> 4; + mxc_register_gpio(0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); mxc_register_gpio(1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); mxc_register_gpio(2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); + + imx31_sdma_pdata.to_version = to_version; + if (to_version == 1) + imx31_sdma_pdata.script_addrs = &imx31_to1_sdma_script; + imx_add_imx_sdma(MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); } diff --git a/arch/arm/mach-imx/mm-imx35.c b/arch/arm/mach-imx/mm-imx35.c index 648bfca0163e..9891adb52458 100644 --- a/arch/arm/mach-imx/mm-imx35.c +++ b/arch/arm/mach-imx/mm-imx35.c @@ -25,6 +25,7 @@ #include #include +#include #include #include #include @@ -54,9 +55,52 @@ void __init mx35_init_irq(void) mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); } +static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = { + .ap_2_ap_addr = 642, + .uart_2_mcu_addr = 817, + .mcu_2_app_addr = 747, + .uartsh_2_mcu_addr = 1183, + .per_2_shp_addr = 1033, + .mcu_2_shp_addr = 961, + .ata_2_mcu_addr = 1333, + .mcu_2_ata_addr = 1252, + .app_2_mcu_addr = 683, + .shp_2_per_addr = 1111, + .shp_2_mcu_addr = 892, +}; + +static struct sdma_script_start_addrs imx35_to2_sdma_script __initdata = { + .ap_2_ap_addr = 729, + .uart_2_mcu_addr = 904, + .per_2_app_addr = 1597, + .mcu_2_app_addr = 834, + .uartsh_2_mcu_addr = 1270, + .per_2_shp_addr = 1120, + .mcu_2_shp_addr = 1048, + .ata_2_mcu_addr = 1429, + .mcu_2_ata_addr = 1339, + .app_2_per_addr = 1531, + .app_2_mcu_addr = 770, + .shp_2_per_addr = 1198, + .shp_2_mcu_addr = 979, +}; + +static struct sdma_platform_data imx35_sdma_pdata __initdata = { + .sdma_version = 2, + .cpu_name = "imx35", + .script_addrs = &imx35_to2_sdma_script, +}; + void __init imx35_soc_init(void) { + int to_version = mx35_revision() >> 4; + mxc_register_gpio(0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); mxc_register_gpio(1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); mxc_register_gpio(2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); + + imx35_sdma_pdata.to_version = to_version; + if (to_version == 1) + imx35_sdma_pdata.script_addrs = &imx35_to1_sdma_script; + imx_add_imx_sdma(MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); } diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c index 800bb8b21081..aa848ea987e8 100644 --- a/arch/arm/mach-mx5/mm.c +++ b/arch/arm/mach-mx5/mm.c @@ -18,6 +18,7 @@ #include #include +#include #include /* @@ -100,12 +101,58 @@ void __init mx53_init_irq(void) tzic_init_irq(tzic_virt); } +static struct sdma_script_start_addrs imx51_sdma_script __initdata = { + .ap_2_ap_addr = 642, + .uart_2_mcu_addr = 817, + .mcu_2_app_addr = 747, + .mcu_2_shp_addr = 961, + .ata_2_mcu_addr = 1473, + .mcu_2_ata_addr = 1392, + .app_2_per_addr = 1033, + .app_2_mcu_addr = 683, + .shp_2_per_addr = 1251, + .shp_2_mcu_addr = 892, +}; + +static struct sdma_platform_data imx51_sdma_pdata __initdata = { + .sdma_version = 2, + .cpu_name = "imx51", + .to_version = 1, + .script_addrs = &imx51_sdma_script, +}; + +static struct sdma_script_start_addrs imx53_sdma_script __initdata = { + .ap_2_ap_addr = 642, + .app_2_mcu_addr = 683, + .mcu_2_app_addr = 747, + .uart_2_mcu_addr = 817, + .shp_2_mcu_addr = 891, + .mcu_2_shp_addr = 960, + .uartsh_2_mcu_addr = 1032, + .spdif_2_mcu_addr = 1100, + .mcu_2_spdif_addr = 1134, + .firi_2_mcu_addr = 1193, + .mcu_2_firi_addr = 1290, +}; + +static struct sdma_platform_data imx53_sdma_pdata __initdata = { + .sdma_version = 2, + .cpu_name = "imx53", + .to_version = 1, + .script_addrs = &imx53_sdma_script, +}; + void __init imx51_soc_init(void) { + int to_version = mx51_revision() >> 4; + mxc_register_gpio(0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH); mxc_register_gpio(1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH); mxc_register_gpio(2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH); mxc_register_gpio(3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH); + + imx51_sdma_pdata.to_version = to_version; + imx_add_imx_sdma(MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); } void __init imx53_soc_init(void) @@ -117,4 +164,6 @@ void __init imx53_soc_init(void) mxc_register_gpio(4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH); mxc_register_gpio(5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH); mxc_register_gpio(6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH); + + imx_add_imx_sdma(MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata); } diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/plat-mxc/devices.c index fb166b20f60f..0d6ed31bdbf2 100644 --- a/arch/arm/plat-mxc/devices.c +++ b/arch/arm/plat-mxc/devices.c @@ -95,8 +95,22 @@ struct device mxc_aips_bus = { .parent = &platform_bus, }; +struct device mxc_ahb_bus = { + .init_name = "mxc_ahb", + .parent = &platform_bus, +}; + static int __init mxc_device_init(void) { - return device_register(&mxc_aips_bus); + int ret; + + ret = device_register(&mxc_aips_bus); + if (IS_ERR_VALUE(ret)) + goto done; + + ret = device_register(&mxc_ahb_bus); + +done: + return ret; } core_initcall(mxc_device_init); diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index 27104f581700..2b0fdb23beb8 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c @@ -6,235 +6,29 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include -#include - -#include #include -#include - -struct imx_imx_sdma_data { - resource_size_t iobase; - resource_size_t irq; - struct sdma_platform_data pdata; -}; - -#define imx_imx_sdma_data_entry_single(soc, _sdma_version, _cpu_name, _to_version)\ - { \ - .iobase = soc ## _SDMA ## _BASE_ADDR, \ - .irq = soc ## _INT_SDMA, \ - .pdata = { \ - .sdma_version = _sdma_version, \ - .cpu_name = _cpu_name, \ - .to_version = _to_version, \ - }, \ - } - -#ifdef CONFIG_SOC_IMX25 -struct imx_imx_sdma_data imx25_imx_sdma_data __initconst = - imx_imx_sdma_data_entry_single(MX25, 2, "imx25", 1); -#endif /* ifdef CONFIG_SOC_IMX25 */ -#ifdef CONFIG_SOC_IMX31 -struct imx_imx_sdma_data imx31_imx_sdma_data __initdata = - imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 1); -#endif /* ifdef CONFIG_SOC_IMX31 */ - -#ifdef CONFIG_SOC_IMX35 -struct imx_imx_sdma_data imx35_imx_sdma_data __initdata = - imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 1); -#endif /* ifdef CONFIG_SOC_IMX35 */ - -#ifdef CONFIG_SOC_IMX51 -struct imx_imx_sdma_data imx51_imx_sdma_data __initconst = - imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 1); -#endif /* ifdef CONFIG_SOC_IMX51 */ - -#ifdef CONFIG_SOC_IMX53 -struct imx_imx_sdma_data imx53_imx_sdma_data __initconst = - imx_imx_sdma_data_entry_single(MX53, 2, "imx53", 0); -#endif /* ifdef CONFIG_SOC_IMX53 */ +struct platform_device __init __maybe_unused *imx_add_imx_dma(void) +{ + return platform_device_register_resndata(&mxc_ahb_bus, + "imx-dma", -1, NULL, 0, NULL, 0); +} -static struct platform_device __init __maybe_unused *imx_add_imx_sdma( - const struct imx_imx_sdma_data *data) +struct platform_device __init __maybe_unused *imx_add_imx_sdma( + resource_size_t iobase, int irq, struct sdma_platform_data *pdata) { struct resource res[] = { { - .start = data->iobase, - .end = data->iobase + SZ_16K - 1, + .start = iobase, + .end = iobase + SZ_16K - 1, .flags = IORESOURCE_MEM, }, { - .start = data->irq, - .end = data->irq, + .start = irq, + .end = irq, .flags = IORESOURCE_IRQ, }, }; - return imx_add_platform_device("imx-sdma", -1, - res, ARRAY_SIZE(res), - &data->pdata, sizeof(data->pdata)); -} - -static struct platform_device __init __maybe_unused *imx_add_imx_dma(void) -{ - return imx_add_platform_device("imx-dma", -1, NULL, 0, NULL, 0); -} - -#ifdef CONFIG_ARCH_MX25 -static struct sdma_script_start_addrs addr_imx25 = { - .ap_2_ap_addr = 729, - .uart_2_mcu_addr = 904, - .per_2_app_addr = 1255, - .mcu_2_app_addr = 834, - .uartsh_2_mcu_addr = 1120, - .per_2_shp_addr = 1329, - .mcu_2_shp_addr = 1048, - .ata_2_mcu_addr = 1560, - .mcu_2_ata_addr = 1479, - .app_2_per_addr = 1189, - .app_2_mcu_addr = 770, - .shp_2_per_addr = 1407, - .shp_2_mcu_addr = 979, -}; -#endif - -#ifdef CONFIG_SOC_IMX31 -static struct sdma_script_start_addrs addr_imx31_to1 = { - .per_2_per_addr = 1677, -}; - -static struct sdma_script_start_addrs addr_imx31_to2 = { - .ap_2_ap_addr = 423, - .ap_2_bp_addr = 829, - .bp_2_ap_addr = 1029, -}; -#endif - -#ifdef CONFIG_SOC_IMX35 -static struct sdma_script_start_addrs addr_imx35_to1 = { - .ap_2_ap_addr = 642, - .uart_2_mcu_addr = 817, - .mcu_2_app_addr = 747, - .uartsh_2_mcu_addr = 1183, - .per_2_shp_addr = 1033, - .mcu_2_shp_addr = 961, - .ata_2_mcu_addr = 1333, - .mcu_2_ata_addr = 1252, - .app_2_mcu_addr = 683, - .shp_2_per_addr = 1111, - .shp_2_mcu_addr = 892, -}; - -static struct sdma_script_start_addrs addr_imx35_to2 = { - .ap_2_ap_addr = 729, - .uart_2_mcu_addr = 904, - .per_2_app_addr = 1597, - .mcu_2_app_addr = 834, - .uartsh_2_mcu_addr = 1270, - .per_2_shp_addr = 1120, - .mcu_2_shp_addr = 1048, - .ata_2_mcu_addr = 1429, - .mcu_2_ata_addr = 1339, - .app_2_per_addr = 1531, - .app_2_mcu_addr = 770, - .shp_2_per_addr = 1198, - .shp_2_mcu_addr = 979, -}; -#endif - -#ifdef CONFIG_SOC_IMX51 -static struct sdma_script_start_addrs addr_imx51 = { - .ap_2_ap_addr = 642, - .uart_2_mcu_addr = 817, - .mcu_2_app_addr = 747, - .mcu_2_shp_addr = 961, - .ata_2_mcu_addr = 1473, - .mcu_2_ata_addr = 1392, - .app_2_per_addr = 1033, - .app_2_mcu_addr = 683, - .shp_2_per_addr = 1251, - .shp_2_mcu_addr = 892, -}; -#endif - -#ifdef CONFIG_SOC_IMX53 -static struct sdma_script_start_addrs addr_imx53 = { - .ap_2_ap_addr = 642, - .app_2_mcu_addr = 683, - .mcu_2_app_addr = 747, - .uart_2_mcu_addr = 817, - .shp_2_mcu_addr = 891, - .mcu_2_shp_addr = 960, - .uartsh_2_mcu_addr = 1032, - .spdif_2_mcu_addr = 1100, - .mcu_2_spdif_addr = 1134, - .firi_2_mcu_addr = 1193, - .mcu_2_firi_addr = 1290, -}; -#endif - -static int __init imxXX_add_imx_dma(void) -{ - struct platform_device *ret; - -#if defined(CONFIG_SOC_IMX21) || defined(CONFIG_SOC_IMX27) - if (cpu_is_mx21() || cpu_is_mx27()) - ret = imx_add_imx_dma(); - else -#endif - -#if defined(CONFIG_SOC_IMX25) - if (cpu_is_mx25()) { - imx25_imx_sdma_data.pdata.script_addrs = &addr_imx25; - ret = imx_add_imx_sdma(&imx25_imx_sdma_data); - } else -#endif - -#if defined(CONFIG_SOC_IMX31) - if (cpu_is_mx31()) { - int to_version = mx31_revision() >> 4; - imx31_imx_sdma_data.pdata.to_version = to_version; - if (to_version == 1) - imx31_imx_sdma_data.pdata.script_addrs = &addr_imx31_to1; - else - imx31_imx_sdma_data.pdata.script_addrs = &addr_imx31_to2; - ret = imx_add_imx_sdma(&imx31_imx_sdma_data); - } else -#endif - -#if defined(CONFIG_SOC_IMX35) - if (cpu_is_mx35()) { - int to_version = mx35_revision() >> 4; - imx35_imx_sdma_data.pdata.to_version = to_version; - if (to_version == 1) - imx35_imx_sdma_data.pdata.script_addrs = &addr_imx35_to1; - else - imx35_imx_sdma_data.pdata.script_addrs = &addr_imx35_to2; - ret = imx_add_imx_sdma(&imx35_imx_sdma_data); - } else -#endif - -#if defined(CONFIG_SOC_IMX51) - if (cpu_is_mx51()) { - int to_version = mx51_revision() >> 4; - imx51_imx_sdma_data.pdata.to_version = to_version; - imx51_imx_sdma_data.pdata.script_addrs = &addr_imx51; - ret = imx_add_imx_sdma(&imx51_imx_sdma_data); - } else -#endif - -#if defined(CONFIG_SOC_IMX53) - if (cpu_is_mx53()) { - imx53_imx_sdma_data.pdata.script_addrs = &addr_imx53; - ret = imx_add_imx_sdma(&imx53_imx_sdma_data); - } else -#endif - ret = ERR_PTR(-ENODEV); - - if (IS_ERR(ret)) - return PTR_ERR(ret); - - return 0; + return platform_device_register_resndata(&mxc_ahb_bus, "imx-sdma", + -1, res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); } -arch_initcall(imxXX_add_imx_dma); diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 03f626645374..bf93820ab61c 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -9,8 +9,10 @@ #include #include #include +#include extern struct device mxc_aips_bus; +extern struct device mxc_ahb_bus; struct platform_device *imx_add_platform_device_dmamask( const char *name, int id, @@ -293,3 +295,7 @@ struct imx_spi_imx_data { struct platform_device *__init imx_add_spi_imx( const struct imx_spi_imx_data *data, const struct spi_imx_master *pdata); + +struct platform_device *imx_add_imx_dma(void); +struct platform_device *imx_add_imx_sdma( + resource_size_t iobase, int irq, struct sdma_platform_data *pdata); -- cgit v1.2.3 From 2e534b21a51bad9d1fad125adac6ad49e64e1d7a Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 22 Jun 2011 22:41:31 +0800 Subject: dmaengine: imx-sdma: pass sdma firmware name via platform data It is not good to have cpu_name and to_version encoded into sdma firmware name as variables. For example, there are three TOs of imx51 soc, the sdma script never changes since TO1, which means all three TOs of imx51 uses TO1 version of sdma script. But we have to prepare three identical firmwares, sdma-imx51-to1.bin sdma-imx51-to2.bin and sdma-imx51-to3.bin, to have the kernel capable of running on all three TOs. The patch removes cpu_name and to_version from sdma platform data, and instead uses fw_name to pass the firmware name, so that we can pass the TO version where it's relevant and skip it where only one firmware exists. Signed-off-by: Shawn Guo Acked-by: Vinod Koul Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mm-imx25.c | 3 +-- arch/arm/mach-imx/mm-imx31.c | 9 ++++++--- arch/arm/mach-imx/mm-imx35.c | 9 ++++++--- arch/arm/mach-mx5/mm.c | 9 ++------- arch/arm/plat-mxc/include/mach/sdma.h | 6 ++---- drivers/dma/imx-sdma.c | 6 +++--- 6 files changed, 20 insertions(+), 22 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index 0c545207ce00..1e0c95651c23 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c @@ -80,8 +80,7 @@ static struct sdma_script_start_addrs imx25_sdma_script __initdata = { static struct sdma_platform_data imx25_sdma_pdata __initdata = { .sdma_version = 2, - .cpu_name = "imx25", - .to_version = 1, + .fw_name = "sdma-imx25.bin", .script_addrs = &imx25_sdma_script, }; diff --git a/arch/arm/mach-imx/mm-imx31.c b/arch/arm/mach-imx/mm-imx31.c index 6af8519d3d6c..a1ff96f249d1 100644 --- a/arch/arm/mach-imx/mm-imx31.c +++ b/arch/arm/mach-imx/mm-imx31.c @@ -70,7 +70,7 @@ static struct sdma_script_start_addrs imx31_to2_sdma_script __initdata = { static struct sdma_platform_data imx31_sdma_pdata __initdata = { .sdma_version = 1, - .cpu_name = "imx31", + .fw_name = "sdma-imx31-to2.bin", .script_addrs = &imx31_to2_sdma_script, }; @@ -82,8 +82,11 @@ void __init imx31_soc_init(void) mxc_register_gpio(1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); mxc_register_gpio(2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); - imx31_sdma_pdata.to_version = to_version; - if (to_version == 1) + if (to_version == 1) { + strncpy(imx31_sdma_pdata.fw_name, "sdma-imx31-to1.bin", + strlen(imx31_sdma_pdata.fw_name)); imx31_sdma_pdata.script_addrs = &imx31_to1_sdma_script; + } + imx_add_imx_sdma(MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); } diff --git a/arch/arm/mach-imx/mm-imx35.c b/arch/arm/mach-imx/mm-imx35.c index 9891adb52458..da530ca48aea 100644 --- a/arch/arm/mach-imx/mm-imx35.c +++ b/arch/arm/mach-imx/mm-imx35.c @@ -87,7 +87,7 @@ static struct sdma_script_start_addrs imx35_to2_sdma_script __initdata = { static struct sdma_platform_data imx35_sdma_pdata __initdata = { .sdma_version = 2, - .cpu_name = "imx35", + .fw_name = "sdma-imx35-to2.bin", .script_addrs = &imx35_to2_sdma_script, }; @@ -99,8 +99,11 @@ void __init imx35_soc_init(void) mxc_register_gpio(1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); mxc_register_gpio(2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); - imx35_sdma_pdata.to_version = to_version; - if (to_version == 1) + if (to_version == 1) { + strncpy(imx35_sdma_pdata.fw_name, "sdma-imx35-to1.bin", + strlen(imx35_sdma_pdata.fw_name)); imx35_sdma_pdata.script_addrs = &imx35_to1_sdma_script; + } + imx_add_imx_sdma(MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); } diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c index aa848ea987e8..1b7059f1ac76 100644 --- a/arch/arm/mach-mx5/mm.c +++ b/arch/arm/mach-mx5/mm.c @@ -116,8 +116,7 @@ static struct sdma_script_start_addrs imx51_sdma_script __initdata = { static struct sdma_platform_data imx51_sdma_pdata __initdata = { .sdma_version = 2, - .cpu_name = "imx51", - .to_version = 1, + .fw_name = "sdma-imx51.bin", .script_addrs = &imx51_sdma_script, }; @@ -137,21 +136,17 @@ static struct sdma_script_start_addrs imx53_sdma_script __initdata = { static struct sdma_platform_data imx53_sdma_pdata __initdata = { .sdma_version = 2, - .cpu_name = "imx53", - .to_version = 1, + .fw_name = "sdma-imx53.bin", .script_addrs = &imx53_sdma_script, }; void __init imx51_soc_init(void) { - int to_version = mx51_revision() >> 4; - mxc_register_gpio(0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH); mxc_register_gpio(1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH); mxc_register_gpio(2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH); mxc_register_gpio(3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH); - imx51_sdma_pdata.to_version = to_version; imx_add_imx_sdma(MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); } diff --git a/arch/arm/plat-mxc/include/mach/sdma.h b/arch/arm/plat-mxc/include/mach/sdma.h index 913e0432e40e..f495c87c113f 100644 --- a/arch/arm/plat-mxc/include/mach/sdma.h +++ b/arch/arm/plat-mxc/include/mach/sdma.h @@ -49,14 +49,12 @@ struct sdma_script_start_addrs { * struct sdma_platform_data - platform specific data for SDMA engine * * @sdma_version The version of this SDMA engine - * @cpu_name used to generate the firmware name - * @to_version CPU Tape out version + * @fw_name The firmware name * @script_addrs SDMA scripts addresses in SDMA ROM */ struct sdma_platform_data { int sdma_version; - char *cpu_name; - int to_version; + char *fw_name; struct sdma_script_start_addrs *script_addrs; }; diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index b6d1455fa936..1ea47db2ff06 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -1105,7 +1105,7 @@ static void sdma_add_scripts(struct sdma_engine *sdma, } static int __init sdma_get_firmware(struct sdma_engine *sdma, - const char *cpu_name, int to_version) + const char *fw_name) { const struct firmware *fw; char *fwname; @@ -1114,7 +1114,7 @@ static int __init sdma_get_firmware(struct sdma_engine *sdma, const struct sdma_script_start_addrs *addr; unsigned short *ram_code; - fwname = kasprintf(GFP_KERNEL, "sdma-%s-to%d.bin", cpu_name, to_version); + fwname = kasprintf(GFP_KERNEL, "%s", fw_name); if (!fwname) return -ENOMEM; @@ -1317,7 +1317,7 @@ static int __init sdma_probe(struct platform_device *pdev) if (pdata->script_addrs) sdma_add_scripts(sdma, pdata->script_addrs); - sdma_get_firmware(sdma, pdata->cpu_name, pdata->to_version); + sdma_get_firmware(sdma, pdata->fw_name); sdma->dma_device.dev = &pdev->dev; -- cgit v1.2.3 From fce43f99631b03a65b9309d956bfca93a8fe052f Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 27 Jun 2011 17:12:08 -0300 Subject: ARM: mx53: Add support for missing UARTs MX53 has five UART ports. Add support for the missing UART4 and UART5 ports. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/clock-mx51-mx53.c | 10 ++++++++++ arch/arm/mach-mx5/crm_regs.h | 2 ++ arch/arm/plat-mxc/devices/platform-imx-uart.c | 2 ++ arch/arm/plat-mxc/include/mach/mx53.h | 4 ++-- 4 files changed, 16 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 7173b27265dd..e60e7bc60659 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1254,12 +1254,20 @@ DEFINE_CLOCK(uart2_ipg_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG5_OFFSET, NULL, NULL, &ipg_clk, &aips_tz1_clk); DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET, NULL, NULL, &ipg_clk, &spba_clk); +DEFINE_CLOCK(uart4_ipg_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG4_OFFSET, + NULL, NULL, &ipg_clk, &spba_clk); +DEFINE_CLOCK(uart5_ipg_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG6_OFFSET, + NULL, NULL, &ipg_clk, &spba_clk); DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET, NULL, NULL, &uart_root_clk, &uart1_ipg_clk); DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET, NULL, NULL, &uart_root_clk, &uart2_ipg_clk); DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET, NULL, NULL, &uart_root_clk, &uart3_ipg_clk); +DEFINE_CLOCK(uart4_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG5_OFFSET, + NULL, NULL, &uart_root_clk, &uart4_ipg_clk); +DEFINE_CLOCK(uart5_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG7_OFFSET, + NULL, NULL, &uart_root_clk, &uart5_ipg_clk); /* GPT */ DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, @@ -1464,6 +1472,8 @@ static struct clk_lookup mx53_lookups[] = { _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) + _REGISTER_CLOCK("imx-uart.3", NULL, uart4_clk) + _REGISTER_CLOCK("imx-uart.4", NULL, uart5_clk) _REGISTER_CLOCK(NULL, "gpt", gpt_clk) _REGISTER_CLOCK("fec.0", NULL, fec_clk) _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-mx5/crm_regs.h index 87c0c58f27a7..5e11ba7daee2 100644 --- a/arch/arm/mach-mx5/crm_regs.h +++ b/arch/arm/mach-mx5/crm_regs.h @@ -114,6 +114,8 @@ #define MXC_CCM_CCGR4 (MX51_CCM_BASE + 0x78) #define MXC_CCM_CCGR5 (MX51_CCM_BASE + 0x7C) #define MXC_CCM_CCGR6 (MX51_CCM_BASE + 0x80) +#define MXC_CCM_CCGR7 (MX51_CCM_BASE + 0x84) + #define MXC_CCM_CMEOR (MX51_CCM_BASE + 0x84) /* Define the bits in register CCR */ diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/plat-mxc/devices/platform-imx-uart.c index 3c854c2cc6dd..cfce8c918b73 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-uart.c +++ b/arch/arm/plat-mxc/devices/platform-imx-uart.c @@ -123,6 +123,8 @@ const struct imx_imx_uart_1irq_data imx53_imx_uart_data[] __initconst = { imx53_imx_uart_data_entry(0, 1), imx53_imx_uart_data_entry(1, 2), imx53_imx_uart_data_entry(2, 3), + imx53_imx_uart_data_entry(3, 4), + imx53_imx_uart_data_entry(4, 5), }; #endif /* ifdef CONFIG_SOC_IMX53 */ diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index 74cd093203e0..d1d1bf38efae 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h @@ -241,7 +241,7 @@ #define MX53_INT_IPU_ERR 10 #define MX53_INT_IPU_SYN 11 #define MX53_INT_GPU 12 -#define MX53_INT_RESV13 13 +#define MX53_INT_UART4 13 #define MX53_INT_USB_H1 14 #define MX53_INT_EMI 15 #define MX53_INT_USB_H2 16 @@ -314,7 +314,7 @@ #define MX53_INT_CAN2 83 #define MX53_INT_GPU2_IRQ 84 #define MX53_INT_GPU2_BUSY 85 -#define MX53_INT_RESV86 86 +#define MX53_INT_UART5 86 #define MX53_INT_FEC 87 #define MX53_INT_OWIRE 88 #define MX53_INT_CTI1_TG2 89 -- cgit v1.2.3 From e1fb61e38f8ec8e586c63d67a06197aa44ba952e Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 27 Jun 2011 17:12:09 -0300 Subject: ARM: mx53: Add SSI suport Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/clock-mx51-mx53.c | 3 +++ arch/arm/mach-mx5/devices-imx53.h | 4 ++++ arch/arm/plat-mxc/devices/platform-imx-ssi.c | 10 ++++++++++ arch/arm/plat-mxc/include/mach/mx53.h | 24 ++++++++++++------------ 4 files changed, 29 insertions(+), 12 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index e60e7bc60659..3a269f0c952f 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1490,6 +1490,9 @@ static struct clk_lookup mx53_lookups[] = { _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk) _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk) _REGISTER_CLOCK("imx-sdma", NULL, sdma_clk) + _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) + _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) + _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk) }; static void clk_tree_init(void) diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h index 48f4c8cc42f5..b8a492fe2200 100644 --- a/arch/arm/mach-mx5/devices-imx53.h +++ b/arch/arm/mach-mx5/devices-imx53.h @@ -32,3 +32,7 @@ extern const struct imx_spi_imx_data imx53_ecspi_data[]; extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[]; #define imx53_add_imx2_wdt(id, pdata) \ imx_add_imx2_wdt(&imx53_imx2_wdt_data[id]) + +extern const struct imx_imx_ssi_data imx53_imx_ssi_data[]; +#define imx53_add_imx_ssi(id, pdata) \ + imx_add_imx_ssi(&imx53_imx_ssi_data[id], pdata) diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/plat-mxc/devices/platform-imx-ssi.c index 66b8593e9b69..21c6f30e1017 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-ssi.c +++ b/arch/arm/plat-mxc/devices/platform-imx-ssi.c @@ -76,6 +76,16 @@ const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst = { }; #endif /* ifdef CONFIG_SOC_IMX51 */ +#ifdef CONFIG_SOC_IMX53 +const struct imx_imx_ssi_data imx53_imx_ssi_data[] __initconst = { +#define imx53_imx_ssi_data_entry(_id, _hwid) \ + imx_imx_ssi_data_entry(MX53, _id, _hwid, SZ_16K) + imx53_imx_ssi_data_entry(0, 1), + imx53_imx_ssi_data_entry(1, 2), + imx53_imx_ssi_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX53 */ + struct platform_device *__init imx_add_imx_ssi( const struct imx_imx_ssi_data *data, const struct imx_ssi_platform_data *pdata) diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index d1d1bf38efae..5e3c3236ebf3 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h @@ -176,10 +176,10 @@ /* * DMA request assignments */ -#define MX53_DMA_REQ_SSI3_TX1 47 -#define MX53_DMA_REQ_SSI3_RX1 46 -#define MX53_DMA_REQ_SSI3_TX2 45 -#define MX53_DMA_REQ_SSI3_RX2 44 +#define MX53_DMA_REQ_SSI3_TX0 47 +#define MX53_DMA_REQ_SSI3_RX0 46 +#define MX53_DMA_REQ_SSI3_TX1 45 +#define MX53_DMA_REQ_SSI3_RX1 44 #define MX53_DMA_REQ_UART3_TX 43 #define MX53_DMA_REQ_UART3_RX 42 #define MX53_DMA_REQ_ESAI_TX 41 @@ -194,14 +194,14 @@ #define MX53_DMA_REQ_ASRC_DMA1 32 #define MX53_DMA_REQ_EMI_WR 31 #define MX53_DMA_REQ_EMI_RD 30 -#define MX53_DMA_REQ_SSI1_TX1 29 -#define MX53_DMA_REQ_SSI1_RX1 28 -#define MX53_DMA_REQ_SSI1_TX2 27 -#define MX53_DMA_REQ_SSI1_RX2 26 -#define MX53_DMA_REQ_SSI2_TX1 25 -#define MX53_DMA_REQ_SSI2_RX1 24 -#define MX53_DMA_REQ_SSI2_TX2 23 -#define MX53_DMA_REQ_SSI2_RX2 22 +#define MX53_DMA_REQ_SSI1_TX0 29 +#define MX53_DMA_REQ_SSI1_RX0 28 +#define MX53_DMA_REQ_SSI1_TX1 27 +#define MX53_DMA_REQ_SSI1_RX1 26 +#define MX53_DMA_REQ_SSI2_TX0 25 +#define MX53_DMA_REQ_SSI2_RX0 24 +#define MX53_DMA_REQ_SSI2_TX1 23 +#define MX53_DMA_REQ_SSI2_RX1 22 #define MX53_DMA_REQ_I2C2_SDHC2 21 #define MX53_DMA_REQ_I2C1_SDHC1 20 #define MX53_DMA_REQ_UART1_TX 19 -- cgit v1.2.3 From 22785de54bfeae4809a469483d9021730fe2f106 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 27 Jun 2011 17:12:11 -0300 Subject: ARM: mx53: Add keypad support Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/clock-mx51-mx53.c | 1 + arch/arm/mach-mx5/devices-imx53.h | 4 ++++ arch/arm/plat-mxc/devices/platform-imx-keypad.c | 5 +++++ 3 files changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 3a269f0c952f..ff16d86ff597 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1493,6 +1493,7 @@ static struct clk_lookup mx53_lookups[] = { _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk) + _REGISTER_CLOCK("imx-keypad", NULL, dummy_clk) }; static void clk_tree_init(void) diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h index b8a492fe2200..c27fe8bb4762 100644 --- a/arch/arm/mach-mx5/devices-imx53.h +++ b/arch/arm/mach-mx5/devices-imx53.h @@ -36,3 +36,7 @@ extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[]; extern const struct imx_imx_ssi_data imx53_imx_ssi_data[]; #define imx53_add_imx_ssi(id, pdata) \ imx_add_imx_ssi(&imx53_imx_ssi_data[id], pdata) + +extern const struct imx_imx_keypad_data imx53_imx_keypad_data; +#define imx53_add_imx_keypad(pdata) \ + imx_add_imx_keypad(&imx53_imx_keypad_data, pdata) diff --git a/arch/arm/plat-mxc/devices/platform-imx-keypad.c b/arch/arm/plat-mxc/devices/platform-imx-keypad.c index 26366114b021..479c3e9f771f 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-keypad.c +++ b/arch/arm/plat-mxc/devices/platform-imx-keypad.c @@ -46,6 +46,11 @@ const struct imx_imx_keypad_data imx51_imx_keypad_data __initconst = imx_imx_keypad_data_entry_single(MX51, SZ_16); #endif /* ifdef CONFIG_SOC_IMX51 */ +#ifdef CONFIG_SOC_IMX53 +const struct imx_imx_keypad_data imx53_imx_keypad_data __initconst = + imx_imx_keypad_data_entry_single(MX53, SZ_16); +#endif /* ifdef CONFIG_SOC_IMX53 */ + struct platform_device *__init imx_add_imx_keypad( const struct imx_imx_keypad_data *data, const struct matrix_keymap_data *pdata) -- cgit v1.2.3 From d23cb578cc7c520d17c6a995e78a7a05cb0abe72 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 25 Jun 2011 13:28:53 -0300 Subject: ARM: mach-mx5/mx53_ard: Add missing definition commit 9203d59 (ARM:mach-mx5/mx53_ard: Add I2C2 and I2C3 support) missed to include the define for ARD_I2CPORTEXP_B. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/board-mx53_ard.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c index 70ae25e6830b..280cefc1a986 100644 --- a/arch/arm/mach-mx5/board-mx53_ard.c +++ b/arch/arm/mach-mx5/board-mx53_ard.c @@ -38,6 +38,7 @@ #define ARD_ETHERNET_INT_B IMX_GPIO_NR(2, 31) #define ARD_SD1_CD IMX_GPIO_NR(1, 1) #define ARD_SD1_WP IMX_GPIO_NR(1, 9) +#define ARD_I2CPORTEXP_B IMX_GPIO_NR(2, 3) static iomux_v3_cfg_t mx53_ard_pads[] = { /* UART1 */ -- cgit v1.2.3 From 2a90a69f652edb410f7936d0271bfa8566ef6a87 Mon Sep 17 00:00:00 2001 From: Daiane Angolini Date: Thu, 30 Jun 2011 14:41:46 -0300 Subject: ARM: mach-mx5/mx53_ard: Add gpio_keys support Signed-off-by: Daiane Angolini Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/Kconfig | 1 + arch/arm/mach-mx5/board-mx53_ard.c | 35 +++++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 6a47d4c9dd17..b4e7c58bbb38 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -216,6 +216,7 @@ config MACH_MX53_ARD select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX + select IMX_HAVE_PLATFORM_GPIO_KEYS help Include support for MX53 ARD platform. This includes specific configurations for the board and its peripherals. diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c index 280cefc1a986..76a67c4a2a0b 100644 --- a/arch/arm/mach-mx5/board-mx53_ard.c +++ b/arch/arm/mach-mx5/board-mx53_ard.c @@ -39,6 +39,11 @@ #define ARD_SD1_CD IMX_GPIO_NR(1, 1) #define ARD_SD1_WP IMX_GPIO_NR(1, 9) #define ARD_I2CPORTEXP_B IMX_GPIO_NR(2, 3) +#define ARD_VOLUMEDOWN IMX_GPIO_NR(4, 0) +#define ARD_HOME IMX_GPIO_NR(5, 10) +#define ARD_BACK IMX_GPIO_NR(5, 11) +#define ARD_PROG IMX_GPIO_NR(5, 12) +#define ARD_VOLUMEUP IMX_GPIO_NR(5, 13) static iomux_v3_cfg_t mx53_ard_pads[] = { /* UART1 */ @@ -91,6 +96,35 @@ static iomux_v3_cfg_t mx53_ard_pads[] = { /* I2C3 */ MX53_PAD_GPIO_3__I2C3_SCL, MX53_PAD_GPIO_16__I2C3_SDA, + /* GPIO */ + MX53_PAD_DISP0_DAT16__GPIO5_10, /* home */ + MX53_PAD_DISP0_DAT17__GPIO5_11, /* back */ + MX53_PAD_DISP0_DAT18__GPIO5_12, /* prog */ + MX53_PAD_DISP0_DAT19__GPIO5_13, /* vol up */ + MX53_PAD_GPIO_10__GPIO4_0, /* vol down */ +}; + +#define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \ +{ \ + .gpio = gpio_num, \ + .type = EV_KEY, \ + .code = ev_code, \ + .active_low = act_low, \ + .desc = "btn " descr, \ + .wakeup = wake, \ +} + +static struct gpio_keys_button ard_buttons[] = { + GPIO_BUTTON(ARD_HOME, KEY_HOME, 1, "home", 0), + GPIO_BUTTON(ARD_BACK, KEY_BACK, 1, "back", 0), + GPIO_BUTTON(ARD_PROG, KEY_PROGRAM, 1, "program", 0), + GPIO_BUTTON(ARD_VOLUMEUP, KEY_VOLUMEUP, 1, "volume-up", 0), + GPIO_BUTTON(ARD_VOLUMEDOWN, KEY_VOLUMEDOWN, 1, "volume-down", 0), +}; + +static const struct gpio_keys_platform_data ard_button_data __initconst = { + .buttons = ard_buttons, + .nbuttons = ARRAY_SIZE(ard_buttons), }; static struct resource ard_smsc911x_resources[] = { @@ -199,6 +233,7 @@ static void __init mx53_ard_board_init(void) imx53_add_imx2_wdt(0, NULL); imx53_add_imx_i2c(1, &mx53_ard_i2c2_data); imx53_add_imx_i2c(2, &mx53_ard_i2c3_data); + imx_add_gpio_keys(&ard_button_data); } static void __init mx53_ard_timer_init(void) -- cgit v1.2.3 From 97ea3da2048e9018f2513a36a95d2f14b3853d1a Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Fri, 1 Jul 2011 16:54:01 +0200 Subject: arm: mxs: add mmc-device for mach-tx28 Signed-off-by: Wolfram Sang Signed-off-by: Sascha Hauer --- arch/arm/mach-mxs/Kconfig | 1 + arch/arm/mach-mxs/mach-tx28.c | 6 ++++++ 2 files changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index 1d3985f37858..4cd0231ee539 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig @@ -61,6 +61,7 @@ config MODULE_TX28 select MXS_HAVE_PLATFORM_AUART select MXS_HAVE_PLATFORM_FEC select MXS_HAVE_PLATFORM_MXS_I2C + select MXS_HAVE_PLATFORM_MXS_MMC select MXS_HAVE_PLATFORM_MXS_PWM config MACH_TX28 diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c index 6766a12cca7f..515a423f82cd 100644 --- a/arch/arm/mach-mxs/mach-tx28.c +++ b/arch/arm/mach-mxs/mach-tx28.c @@ -139,6 +139,11 @@ static struct i2c_board_info tx28_stk5v3_i2c_boardinfo[] __initdata = { }, }; +static struct mxs_mmc_platform_data tx28_mmc0_pdata __initdata = { + .wp_gpio = -EINVAL, + .flags = SLOTF_4_BIT_CAPABLE, +}; + static void __init tx28_stk5v3_init(void) { mxs_iomux_setup_multiple_pads(tx28_stk5v3_pads, @@ -155,6 +160,7 @@ static void __init tx28_stk5v3_init(void) mx28_add_mxs_i2c(0); i2c_register_board_info(0, tx28_stk5v3_i2c_boardinfo, ARRAY_SIZE(tx28_stk5v3_i2c_boardinfo)); + mx28_add_mxs_mmc(0, &tx28_mmc0_pdata); } static void __init tx28_timer_init(void) -- cgit v1.2.3 From 1459fc5f6d244b4e43690df5e9e28e8de390caf0 Mon Sep 17 00:00:00 2001 From: Jürgen Lambrecht Date: Tue, 5 Jul 2011 15:35:31 +0200 Subject: Enable RTC driver. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The MC13783 MFD also contains an RTC. Enable it. To avoid "No RTC device found, ALARM timers will not wake from suspend", this patch is needed: http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=c008ba58af24dc5d0d8e9fe6e59d876910254761 Signed-off-by: Jürgen Lambrecht Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mach-mx27_3ds.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 84fb79315dd1..6fa6934ab150 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -293,7 +293,8 @@ static struct mc13xxx_platform_data mc13783_pdata = { .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), }, - .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN, + .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN | + MC13783_USE_RTC, }; /* SPI */ -- cgit v1.2.3 From f70e957cda22d309c769805cbb932407a5232219 Mon Sep 17 00:00:00 2001 From: Matthew Garrett Date: Wed, 6 Jul 2011 16:52:37 -0400 Subject: x86: Don't use the EFI reboot method by default Testing suggests that at least some Lenovos and some Intels will fail to reboot via EFI, attempting to jump to an unmapped physical address. In the long run we could handle this by providing a page table with a 1:1 mapping of physical addresses, but for now it's probably just easier to assume that ACPI or legacy methods will be present and reboot via those. Signed-off-by: Matthew Garrett Cc: Linus Torvalds Cc: Andrew Morton Cc: Alan Cox Link: http://lkml.kernel.org/r/1309985557-15350-1-git-send-email-mjg@redhat.com Signed-off-by: Ingo Molnar --- arch/x86/platform/efi/efi.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch') diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c index 474356b98ede..899e393d8e73 100644 --- a/arch/x86/platform/efi/efi.c +++ b/arch/x86/platform/efi/efi.c @@ -504,9 +504,6 @@ void __init efi_init(void) x86_platform.set_wallclock = efi_set_rtc_mmss; #endif - /* Setup for EFI runtime service */ - reboot_type = BOOT_EFI; - #if EFI_DEBUG print_efi_memmap(); #endif -- cgit v1.2.3 From 90c5ffe592ff3b33afe2bdfe5e9ec630fc599e32 Mon Sep 17 00:00:00 2001 From: Vitaly Kuzmichev Date: Thu, 7 Jul 2011 14:56:05 +0100 Subject: ARM: 6994/1: smp_twd: Fix typo in 'twd_timer_rate' printing To get hundredths of MHz the rate needs to be divided by 10'000. Here is an example: twd_timer_rate = 123456789 Before the patch: twd_timer_rate / 1000000 = 123 (twd_timer_rate / 1000000) % 100 = 23 Result: 123.23MHz. After being fixed: twd_timer_rate / 1000000 = 123 (twd_timer_rate / 10000) % 100 = 45 Result: 123.45MHz. Signed-off-by: Vitaly Kuzmichev Signed-off-by: Russell King --- arch/arm/kernel/smp_twd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index 60636f499cb3..2c277d40cee6 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -115,7 +115,7 @@ static void __cpuinit twd_calibrate_rate(void) twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000, - (twd_timer_rate / 1000000) % 100); + (twd_timer_rate / 10000) % 100); } } -- cgit v1.2.3 From ee339fe63ac408e4604c1c88b1f9a428f2511b70 Mon Sep 17 00:00:00 2001 From: Konrad Rzeszutek Wilk Date: Wed, 6 Jul 2011 09:43:16 -0400 Subject: xen/pci: Move check for acpi_sci_override_gsi to xen_setup_acpi_sci. Previously we would check for acpi_sci_override_gsi == gsi every time a PCI device was enabled. That works during early bootup, but later on it could lead to triggering unnecessarily the acpi_gsi_to_irq(..) lookup. The reason is that acpi_sci_override_gsi was declared in __initdata and after early bootup could contain bogus values. This patch moves the check for acpi_sci_override_gsi to the site where the ACPI SCI is preset. CC: stable@kernel.org Reported-by: Raghavendra D Prabhu Tested-by: Raghavendra D Prabhu [http://lists.xensource.com/archives/html/xen-devel/2011-07/msg00154.html] Suggested-by: Ian Campbell Signed-off-by: Konrad Rzeszutek Wilk --- arch/x86/pci/xen.c | 56 +++++++++++++++++++++++++++--------------------------- 1 file changed, 28 insertions(+), 28 deletions(-) (limited to 'arch') diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c index fe008309ffec..f567965c0620 100644 --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c @@ -327,13 +327,12 @@ int __init pci_xen_hvm_init(void) } #ifdef CONFIG_XEN_DOM0 -static int xen_register_pirq(u32 gsi, int triggering) +static int xen_register_pirq(u32 gsi, int gsi_override, int triggering) { int rc, pirq, irq = -1; struct physdev_map_pirq map_irq; int shareable = 0; char *name; - bool gsi_override = false; if (!xen_pv_domain()) return -1; @@ -345,31 +344,12 @@ static int xen_register_pirq(u32 gsi, int triggering) shareable = 1; name = "ioapic-level"; } - pirq = xen_allocate_pirq_gsi(gsi); if (pirq < 0) goto out; - /* Before we bind the GSI to a Linux IRQ, check whether - * we need to override it with bus_irq (IRQ) value. Usually for - * IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so: - * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level) - * but there are oddballs where the IRQ != GSI: - * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level) - * which ends up being: gsi_to_irq[9] == 20 - * (which is what acpi_gsi_to_irq ends up calling when starting the - * the ACPI interpreter and keels over since IRQ 9 has not been - * setup as we had setup IRQ 20 for it). - */ - if (gsi == acpi_sci_override_gsi) { - /* Check whether the GSI != IRQ */ - acpi_gsi_to_irq(gsi, &irq); - if (irq != gsi) - /* Bugger, we MUST have that IRQ. */ - gsi_override = true; - } - if (gsi_override) - irq = xen_bind_pirq_gsi_to_irq(irq, pirq, shareable, name); + if (gsi_override >= 0) + irq = xen_bind_pirq_gsi_to_irq(gsi_override, pirq, shareable, name); else irq = xen_bind_pirq_gsi_to_irq(gsi, pirq, shareable, name); if (irq < 0) @@ -392,7 +372,7 @@ out: return irq; } -static int xen_register_gsi(u32 gsi, int triggering, int polarity) +static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity) { int rc, irq; struct physdev_setup_gsi setup_gsi; @@ -403,7 +383,7 @@ static int xen_register_gsi(u32 gsi, int triggering, int polarity) printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n", gsi, triggering, polarity); - irq = xen_register_pirq(gsi, triggering); + irq = xen_register_pirq(gsi, gsi_override, triggering); setup_gsi.gsi = gsi; setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1); @@ -425,6 +405,8 @@ static __init void xen_setup_acpi_sci(void) int rc; int trigger, polarity; int gsi = acpi_sci_override_gsi; + int irq = -1; + int gsi_override = -1; if (!gsi) return; @@ -441,7 +423,25 @@ static __init void xen_setup_acpi_sci(void) printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d " "polarity=%d\n", gsi, trigger, polarity); - gsi = xen_register_gsi(gsi, trigger, polarity); + /* Before we bind the GSI to a Linux IRQ, check whether + * we need to override it with bus_irq (IRQ) value. Usually for + * IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so: + * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level) + * but there are oddballs where the IRQ != GSI: + * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level) + * which ends up being: gsi_to_irq[9] == 20 + * (which is what acpi_gsi_to_irq ends up calling when starting the + * the ACPI interpreter and keels over since IRQ 9 has not been + * setup as we had setup IRQ 20 for it). + */ + /* Check whether the GSI != IRQ */ + if (acpi_gsi_to_irq(gsi, &irq) == 0) { + if (irq >= 0 && irq != gsi) + /* Bugger, we MUST have that IRQ. */ + gsi_override = irq; + } + + gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity); printk(KERN_INFO "xen: acpi sci %d\n", gsi); return; @@ -450,7 +450,7 @@ static __init void xen_setup_acpi_sci(void) static int acpi_register_gsi_xen(struct device *dev, u32 gsi, int trigger, int polarity) { - return xen_register_gsi(gsi, trigger, polarity); + return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity); } static int __init pci_xen_initial_domain(void) @@ -489,7 +489,7 @@ void __init xen_setup_pirqs(void) if (acpi_get_override_irq(irq, &trigger, &polarity) == -1) continue; - xen_register_pirq(irq, + xen_register_pirq(irq, -1 /* no GSI override */, trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE); } } -- cgit v1.2.3 From a51ca38b6330e463cc1a7adf64502ff735452915 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Wed, 6 Jul 2011 06:01:21 +0000 Subject: davinci: pass clock flags to davinci_psc_config() Enabling or disabling a PSC can take certain modifiers like "disable with reset", "force enable/disable" and "enable/disable with local reset" apart from the regular clock gating functionality. Pass a flags argument to davinci_psc_config() so these variations can be supported there. At this time only "disable with reset" is supported, but other functionality will be added in subsequent patches. Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/clock.c | 8 +++----- arch/arm/mach-davinci/include/mach/psc.h | 2 +- arch/arm/mach-davinci/psc.c | 12 +++++++++++- 3 files changed, 15 insertions(+), 7 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index e4e3af179f02..d0450ac2c00e 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -44,7 +44,7 @@ static void __clk_enable(struct clk *clk) __clk_enable(clk->parent); if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, - PSC_STATE_ENABLE); + true, clk->flags); } static void __clk_disable(struct clk *clk) @@ -54,8 +54,7 @@ static void __clk_disable(struct clk *clk) if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && (clk->flags & CLK_PSC)) davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, - (clk->flags & PSC_SWRSTDISABLE) ? - PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE); + false, clk->flags); if (clk->parent) __clk_disable(clk->parent); } @@ -239,8 +238,7 @@ static int __init clk_disable_unused(void) pr_debug("Clocks: disable unused %s\n", ck->name); davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, - (ck->flags & PSC_SWRSTDISABLE) ? - PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE); + false, ck->flags); } spin_unlock_irq(&clockfw_lock); diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index a47e6f29206e..215fcca6bbdc 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h @@ -249,7 +249,7 @@ extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, - unsigned int id, u32 next_state); + unsigned int id, bool enable, u32 flags); #endif diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index a41580400701..823cb1b9e484 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c @@ -25,6 +25,8 @@ #include #include +#include "clock.h" + /* Return nonzero iff the domain's clock is active */ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) { @@ -48,11 +50,12 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) /* Enable or disable a PSC domain */ void davinci_psc_config(unsigned int domain, unsigned int ctlr, - unsigned int id, u32 next_state) + unsigned int id, bool enable, u32 flags) { u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; void __iomem *psc_base; struct davinci_soc_info *soc_info = &davinci_soc_info; + u32 next_state = PSC_STATE_ENABLE; if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { pr_warning("PSC: Bad psc data: 0x%x[%d]\n", @@ -62,6 +65,13 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr, psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); + if (!enable) { + if (flags & PSC_SWRSTDISABLE) + next_state = PSC_STATE_SWRSTDISABLE; + else + next_state = PSC_STATE_DISABLE; + } + mdctl = __raw_readl(psc_base + MDCTL + 4 * id); mdctl &= ~MDSTAT_STATE_MASK; mdctl |= next_state; -- cgit v1.2.3 From 5838e9b8dada491278db48ff9162e25125fa89d6 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Fri, 8 Jul 2011 14:33:02 +0900 Subject: ARM: S3C24XX: don't use uninitialized variable in dma.c Commit 8970ef47 (S3C24XX: Remove hardware specific registers from DMA calls) removed the parameter dcon in s3c2410_dma_config() and calculates it on its own. So the debug-output for the old parameter can go, too. Fixes: arch/arm/plat-s3c24xx/dma.c: In function 's3c2410_dma_config': arch/arm/plat-s3c24xx/dma.c:1030:2: warning: 'dcon' is used uninitialized in this function Signed-off-by: Wolfram Sang Cc: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/plat-s3c24xx/dma.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index 2abf9660bc6c..a5b3684e1154 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c @@ -1027,17 +1027,13 @@ int s3c2410_dma_config(unsigned int channel, struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); unsigned int dcon; - pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n", - __func__, channel, xferunit, dcon); + pr_debug("%s: chan=%d, xfer_unit=%d\n", __func__, channel, xferunit); if (chan == NULL) return -EINVAL; - pr_debug("%s: Initial dcon is %08x\n", __func__, dcon); - dcon = chan->dcon & dma_sel.dcon_mask; - - pr_debug("%s: New dcon is %08x\n", __func__, dcon); + pr_debug("%s: dcon is %08x\n", __func__, dcon); switch (chan->req_ch) { case DMACH_I2S_IN: -- cgit v1.2.3 From cb26a7b1c18857d14913040b45f3fe51b513f936 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Fri, 8 Jul 2011 14:33:02 +0900 Subject: ARM: S3C24XX: drop return codes in void function of dma.c Commit bb072c3c (ARM / Samsung: Use struct syscore_ops for "core" power management) turned s3c2410_dma_resume_chan() from int to void. So, drop the actual return values, too. Fixes: arch/arm/plat-s3c24xx/dma.c: In function 's3c2410_dma_resume_chan': arch/arm/plat-s3c24xx/dma.c:1238:3: warning: 'return' with a value, in function returning void arch/arm/plat-s3c24xx/dma.c:1250:2: warning: 'return' with a value, in function returning void Signed-off-by: Wolfram Sang Acked-by: Rafael J. Wysocki Signed-off-by: Kukjin Kim --- arch/arm/plat-s3c24xx/dma.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index a5b3684e1154..a79a8ccd25f6 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c @@ -1231,7 +1231,7 @@ static void s3c2410_dma_resume_chan(struct s3c2410_dma_chan *cp) /* restore channel's hardware configuration */ if (!cp->in_use) - return 0; + return; printk(KERN_INFO "dma%d: restoring configuration\n", cp->number); @@ -1242,8 +1242,6 @@ static void s3c2410_dma_resume_chan(struct s3c2410_dma_chan *cp) if (cp->map != NULL) dma_sel.select(cp, cp->map); - - return 0; } static void s3c2410_dma_resume(void) -- cgit v1.2.3 From aad70de20fc69970a3080e7e8f02b54a4a3fe3e6 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Wed, 6 Jul 2011 06:01:22 +0000 Subject: davinci: enable forced transitions on PSC Some DaVinci modules like the SATA on DA850 need forced module state transitions. Define a "force" flag which can be passed to the PSC config function to enable it to make forced transitions. Forced transitions shouldn't normally be attempted, unless the TRM explicitly specifies its usage. ChangeLog: v2: Modified to take care of the fact that davinci_psc_config() now takes the flags directly. Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/clock.h | 1 + arch/arm/mach-davinci/include/mach/psc.h | 1 + arch/arm/mach-davinci/psc.c | 2 ++ 3 files changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index 0dd22031ec62..48ee4627e188 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -111,6 +111,7 @@ struct clk { #define CLK_PLL BIT(4) /* PLL-derived clock */ #define PRE_PLL BIT(5) /* source is before PLL mult/div */ #define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */ +#define PSC_FORCE BIT(7) /* Force module state transtition */ #define CLK(dev, con, ck) \ { \ diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 215fcca6bbdc..6213f0d4211d 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h @@ -244,6 +244,7 @@ #define PSC_STATE_ENABLE 3 #define MDSTAT_STATE_MASK 0x1f +#define MDCTL_FORCE BIT(31) #ifndef __ASSEMBLER__ diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index 823cb1b9e484..1fb6bdff38c1 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c @@ -75,6 +75,8 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr, mdctl = __raw_readl(psc_base + MDCTL + 4 * id); mdctl &= ~MDSTAT_STATE_MASK; mdctl |= next_state; + if (flags & PSC_FORCE) + mdctl |= MDCTL_FORCE; __raw_writel(mdctl, psc_base + MDCTL + 4 * id); pdstat = __raw_readl(psc_base + PDSTAT); -- cgit v1.2.3 From cbb2c9617ae80c99a7b290dbe5cf48ebf9a36ad9 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Wed, 6 Jul 2011 06:01:23 +0000 Subject: davinci: da850: add support for SATA interface Add support for SATA controller on the DA850/OMAP-L138/AM18x devices. The patch adds the necessary clocks, platform resources and a routine to initialize the SATA controller. The PHY configuration in this patch is courtesy the work done by Zegeye Alemu, Swaminathan and Mansoor Ahamed from TI. While testing this patch, enable port multiplier support iff you are actually using one. The reasons of this behaviour are discussed here: http://patchwork.ozlabs.org/patch/78163/ ChangeLog: v3: Removed fields which were being initialized to zero in PHY configuration. Moved SATA base address definition to the top of the file to make it inline with what is done for the rest of the modules. v2: Addressed comments from Sergei. Removed unnecessary braces and removed unnecessary else after goto. Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/da850.c | 9 +++ arch/arm/mach-davinci/devices-da8xx.c | 126 +++++++++++++++++++++++++++++ arch/arm/mach-davinci/include/mach/da8xx.h | 2 + 3 files changed, 137 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 4e22b8da3493..935dbed5c541 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -374,6 +374,14 @@ static struct clk spi1_clk = { .flags = DA850_CLK_ASYNC3, }; +static struct clk sata_clk = { + .name = "sata", + .parent = &pll0_sysclk2, + .lpsc = DA850_LPSC1_SATA, + .gpsc = 1, + .flags = PSC_FORCE, +}; + static struct clk_lookup da850_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll0", &pll0_clk), @@ -420,6 +428,7 @@ static struct clk_lookup da850_clks[] = { CLK(NULL, "usb20", &usb20_clk), CLK("spi_davinci.0", NULL, &spi0_clk), CLK("spi_davinci.1", NULL, &spi1_clk), + CLK("ahci", NULL, &sata_clk), CLK(NULL, NULL, NULL), }; diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index fc4e98ea7543..2f7e719636f1 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -14,6 +14,8 @@ #include #include #include +#include +#include #include #include @@ -33,6 +35,7 @@ #define DA8XX_SPI0_BASE 0x01c41000 #define DA830_SPI1_BASE 0x01e12000 #define DA8XX_LCD_CNTRL_BASE 0x01e13000 +#define DA850_SATA_BASE 0x01e18000 #define DA850_MMCSD1_BASE 0x01e1b000 #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 @@ -842,3 +845,126 @@ int __init da8xx_register_spi(int instance, struct spi_board_info *info, return platform_device_register(&da8xx_spi_device[instance]); } + +#ifdef CONFIG_ARCH_DAVINCI_DA850 + +static struct resource da850_sata_resources[] = { + { + .start = DA850_SATA_BASE, + .end = DA850_SATA_BASE + 0x1fff, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_DA850_SATAINT, + .flags = IORESOURCE_IRQ, + }, +}; + +/* SATA PHY Control Register offset from AHCI base */ +#define SATA_P0PHYCR_REG 0x178 + +#define SATA_PHY_MPY(x) ((x) << 0) +#define SATA_PHY_LOS(x) ((x) << 6) +#define SATA_PHY_RXCDR(x) ((x) << 10) +#define SATA_PHY_RXEQ(x) ((x) << 13) +#define SATA_PHY_TXSWING(x) ((x) << 19) +#define SATA_PHY_ENPLL(x) ((x) << 31) + +static struct clk *da850_sata_clk; +static unsigned long da850_sata_refclkpn; + +/* Supported DA850 SATA crystal frequencies */ +#define KHZ_TO_HZ(freq) ((freq) * 1000) +static unsigned long da850_sata_xtal[] = { + KHZ_TO_HZ(300000), + KHZ_TO_HZ(250000), + 0, /* Reserved */ + KHZ_TO_HZ(187500), + KHZ_TO_HZ(150000), + KHZ_TO_HZ(125000), + KHZ_TO_HZ(120000), + KHZ_TO_HZ(100000), + KHZ_TO_HZ(75000), + KHZ_TO_HZ(60000), +}; + +static int da850_sata_init(struct device *dev, void __iomem *addr) +{ + int i, ret; + unsigned int val; + + da850_sata_clk = clk_get(dev, NULL); + if (IS_ERR(da850_sata_clk)) + return PTR_ERR(da850_sata_clk); + + ret = clk_enable(da850_sata_clk); + if (ret) + goto err0; + + /* Enable SATA clock receiver */ + val = __raw_readl(DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG)); + val &= ~BIT(0); + __raw_writel(val, DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG)); + + /* Get the multiplier needed for 1.5GHz PLL output */ + for (i = 0; i < ARRAY_SIZE(da850_sata_xtal); i++) + if (da850_sata_xtal[i] == da850_sata_refclkpn) + break; + + if (i == ARRAY_SIZE(da850_sata_xtal)) { + ret = -EINVAL; + goto err1; + } + + val = SATA_PHY_MPY(i + 1) | + SATA_PHY_LOS(1) | + SATA_PHY_RXCDR(4) | + SATA_PHY_RXEQ(1) | + SATA_PHY_TXSWING(3) | + SATA_PHY_ENPLL(1); + + __raw_writel(val, addr + SATA_P0PHYCR_REG); + + return 0; + +err1: + clk_disable(da850_sata_clk); +err0: + clk_put(da850_sata_clk); + return ret; +} + +static void da850_sata_exit(struct device *dev) +{ + clk_disable(da850_sata_clk); + clk_put(da850_sata_clk); +} + +static struct ahci_platform_data da850_sata_pdata = { + .init = da850_sata_init, + .exit = da850_sata_exit, +}; + +static u64 da850_sata_dmamask = DMA_BIT_MASK(32); + +static struct platform_device da850_sata_device = { + .name = "ahci", + .id = -1, + .dev = { + .platform_data = &da850_sata_pdata, + .dma_mask = &da850_sata_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(da850_sata_resources), + .resource = da850_sata_resources, +}; + +int __init da850_register_sata(unsigned long refclkpn) +{ + da850_sata_refclkpn = refclkpn; + if (!da850_sata_refclkpn) + return -EINVAL; + + return platform_device_register(&da850_sata_device); +} +#endif diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index ad64da713fc8..eaca7d8b9d68 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -57,6 +57,7 @@ extern unsigned int da850_max_speed; #define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000) #define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x)) #define DA8XX_DEEPSLEEP_REG 0x8 +#define DA8XX_PWRDN_REG 0x18 #define DA8XX_PSC0_BASE 0x01c10000 #define DA8XX_PLL0_BASE 0x01c11000 @@ -89,6 +90,7 @@ int da850_register_cpufreq(char *async_clk); int da8xx_register_cpuidle(void); void __iomem * __init da8xx_get_mem_ctlr(void); int da850_register_pm(struct platform_device *pdev); +int __init da850_register_sata(unsigned long refclkpn); extern struct platform_device da8xx_serial_device; extern struct emac_platform_data da8xx_emac_pdata; -- cgit v1.2.3 From 8bb2c4813c534d26eba3beb7888fbd3cbc931f62 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Wed, 6 Jul 2011 06:01:24 +0000 Subject: davinci: da850 evm: register SATA device Register the platform device for SATA interface present on the DA850/OMAP-L138/AM18x EVM. Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-da850-evm.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index a7b41bf505f1..3d2c0d7d129f 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -1117,6 +1117,8 @@ static __init int da850_evm_init_cpufreq(void) static __init int da850_evm_init_cpufreq(void) { return 0; } #endif +#define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000) + static __init void da850_evm_init(void) { int ret; @@ -1237,6 +1239,11 @@ static __init void da850_evm_init(void) if (ret) pr_warning("da850_evm_init: spi 1 registration failed: %d\n", ret); + + ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE); + if (ret) + pr_warning("da850_evm_init: sata registration failed: %d\n", + ret); } #ifdef CONFIG_SERIAL_8250_CONSOLE -- cgit v1.2.3 From d34c1fcddc3a159d52576c656f8caabc0cf4894b Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Fri, 8 Jul 2011 18:16:56 +0900 Subject: ARM: S3C2440: fix section mismatch on mini2440 If mini2440_init() is in __init, mini2440_parse_features() should also be in __init. Fixes: (.text+0x9adc): Section mismatch in reference from the function mini2440_parse_features.clone.0() to the (unknown reference) .init.data:(unknown) The function mini2440_parse_features.clone.0() references the (unknown reference) __initdata (unknown). Signed-off-by: Wolfram Sang Cc: Michel Pollet Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c2440/mach-mini2440.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c index dd3120df09fe..fc2dc0b3d4fe 100644 --- a/arch/arm/mach-s3c2440/mach-mini2440.c +++ b/arch/arm/mach-s3c2440/mach-mini2440.c @@ -552,7 +552,7 @@ struct mini2440_features_t { struct platform_device *optional[8]; }; -static void mini2440_parse_features( +static void __init mini2440_parse_features( struct mini2440_features_t * features, const char * features_str ) { -- cgit v1.2.3 From 7db2b37751caa2f17b026223a382eca07c90c575 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Mon, 21 Mar 2011 16:14:43 +0100 Subject: arm: lpc32xx: add tsc-device Fix the clock name, too. Signed-off-by: Wolfram Sang Tested-by: Kevin Wells --- arch/arm/mach-lpc32xx/clock.c | 2 +- arch/arm/mach-lpc32xx/common.c | 21 +++++++++++++++++++++ arch/arm/mach-lpc32xx/common.h | 1 + 3 files changed, 23 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c index da0e6498110a..1e027514096d 100644 --- a/arch/arm/mach-lpc32xx/clock.c +++ b/arch/arm/mach-lpc32xx/clock.c @@ -1077,7 +1077,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand) _REGISTER_CLOCK("tbd", "i2s0_ck", clk_i2s0) _REGISTER_CLOCK("tbd", "i2s1_ck", clk_i2s1) - _REGISTER_CLOCK("lpc32xx-ts", NULL, clk_tsc) + _REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc) _REGISTER_CLOCK("dev:mmc0", "MCLK", clk_mmc) _REGISTER_CLOCK("lpc-net.0", NULL, clk_net) _REGISTER_CLOCK("dev:clcd", NULL, clk_lcd) diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c index ee24dc28e93e..6880b47a9ae5 100644 --- a/arch/arm/mach-lpc32xx/common.c +++ b/arch/arm/mach-lpc32xx/common.c @@ -95,6 +95,27 @@ struct platform_device lpc32xx_i2c2_device = { }, }; +/* TSC (Touch Screen Controller) */ + +static struct resource lpc32xx_tsc_resources[] = { + { + .start = LPC32XX_ADC_BASE, + .end = LPC32XX_ADC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_LPC32XX_TS_IRQ, + .end = IRQ_LPC32XX_TS_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device lpc32xx_tsc_device = { + .name = "ts-lpc32xx", + .id = -1, + .num_resources = ARRAY_SIZE(lpc32xx_tsc_resources), + .resource = lpc32xx_tsc_resources, +}; + /* * Returns the unique ID for the device */ diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h index f82211fd80c1..e81243c79f77 100644 --- a/arch/arm/mach-lpc32xx/common.h +++ b/arch/arm/mach-lpc32xx/common.h @@ -28,6 +28,7 @@ extern struct platform_device lpc32xx_watchdog_device; extern struct platform_device lpc32xx_i2c0_device; extern struct platform_device lpc32xx_i2c1_device; extern struct platform_device lpc32xx_i2c2_device; +extern struct platform_device lpc32xx_tsc_device; /* * Other arch specific structures and functions -- cgit v1.2.3 From 1c72f9eaa53e920f142f4c1d20b4fc82b1a10ed5 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Mon, 28 Mar 2011 16:51:35 +0200 Subject: arm: lpc32xx: add rtc-device Signed-off-by: Wolfram Sang Tested-by: Kevin Wells --- arch/arm/mach-lpc32xx/common.c | 21 +++++++++++++++++++++ arch/arm/mach-lpc32xx/common.h | 1 + 2 files changed, 22 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c index 6880b47a9ae5..205b2dbb565b 100644 --- a/arch/arm/mach-lpc32xx/common.c +++ b/arch/arm/mach-lpc32xx/common.c @@ -116,6 +116,27 @@ struct platform_device lpc32xx_tsc_device = { .resource = lpc32xx_tsc_resources, }; +/* RTC */ + +static struct resource lpc32xx_rtc_resources[] = { + { + .start = LPC32XX_RTC_BASE, + .end = LPC32XX_RTC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + },{ + .start = IRQ_LPC32XX_RTC, + .end = IRQ_LPC32XX_RTC, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device lpc32xx_rtc_device = { + .name = "rtc-lpc32xx", + .id = -1, + .num_resources = ARRAY_SIZE(lpc32xx_rtc_resources), + .resource = lpc32xx_rtc_resources, +}; + /* * Returns the unique ID for the device */ diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h index e81243c79f77..5583f52662bd 100644 --- a/arch/arm/mach-lpc32xx/common.h +++ b/arch/arm/mach-lpc32xx/common.h @@ -29,6 +29,7 @@ extern struct platform_device lpc32xx_i2c0_device; extern struct platform_device lpc32xx_i2c1_device; extern struct platform_device lpc32xx_i2c2_device; extern struct platform_device lpc32xx_tsc_device; +extern struct platform_device lpc32xx_rtc_device; /* * Other arch specific structures and functions -- cgit v1.2.3 From a4841e39f7ca85ee2a40803ebac6221c6d8822c0 Mon Sep 17 00:00:00 2001 From: Russell King - ARM Linux Date: Mon, 11 Jul 2011 22:25:43 +0100 Subject: ARM: introduce handle_IRQ() not to dump exception stack On Mon, Jul 11, 2011 at 3:52 PM, Russell King - ARM Linux wrote: ... > The __exception annotation on a function causes this to happen: > > [] (asm_do_IRQ+0x6c/0x8c) from [] > (__irq_svc+0x44/0xcc) > Exception stack(0xc3897c78 to 0xc3897cc0) > 7c60: 4022d320 4022e000 > 7c80: 08000075 00001000 c32273c0 c03ce1c0 c2b49b78 4022d000 c2b420b4 00000001 > 7ca0: 00000000 c3897cfc 00000000 c3897cc0 c00afc54 c002edd8 00000013 ffffffff > > Where that stack dump represents the pt_regs for the exception which > happened. Any function found in while unwinding will cause this to > be printed. > > If you insert a C function between the IRQ assembly and asm_do_IRQ, > the > dump you get from asm_do_IRQ will be the stack for your function, > not > the pt_regs. That makes the feature useless. > When __irq_svc - or any of the other exception handling assembly code - calls the C code, the stack pointer will be pointing at the pt_regs structure. All the entry points into C code from the exception handling code are marked with __exception or __exception_irq_enter to indicate that they are one of the functions which has pt_regs above them. Normally, when you've entered asm_do_IRQ() you will have this stack layout (higher address towards top): pt_regs asm_do_IRQ frame If you insert a C function between the exception assembly code and asm_do_IRQ, you end up with this stack layout instead: pt_regs your function frame asm_do_IRQ frame This means when we unwind, we'll get to asm_do_IRQ, and rather than dumping out the pt_regs, we'll dump out your functions stack frame instead, because that's what is above the asm_do_IRQ stack frame rather than the expected pt_regs structure. The fix is to introduce handle_IRQ() for no exception stack dump, so it can be called with MULTI_IRQ_HANDLER is selected and a C function is between the assembly code and the actual IRQ handling code. Signed-off-by: Russell King Signed-off-by: Eric Miao --- arch/arm/include/asm/irq.h | 1 + arch/arm/kernel/irq.c | 19 ++++++++++++++----- 2 files changed, 15 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h index 2721a5814cb9..5a526afb5f18 100644 --- a/arch/arm/include/asm/irq.h +++ b/arch/arm/include/asm/irq.h @@ -23,6 +23,7 @@ struct pt_regs; extern void migrate_irqs(void); extern void asm_do_IRQ(unsigned int, struct pt_regs *); +void handle_IRQ(unsigned int, struct pt_regs *); void init_IRQ(void); #endif diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 83bbad03fcc6..dbc1f41575b2 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -67,12 +67,12 @@ int arch_show_interrupts(struct seq_file *p, int prec) } /* - * do_IRQ handles all hardware IRQ's. Decoded IRQs should not - * come via this function. Instead, they should provide their - * own 'handler' + * handle_IRQ handles all hardware IRQ's. Decoded IRQs should + * not come via this function. Instead, they should provide their + * own 'handler'. Used by platform code implementing C-based 1st + * level decoding. */ -asmlinkage void __exception_irq_entry -asm_do_IRQ(unsigned int irq, struct pt_regs *regs) +void handle_IRQ(unsigned int irq, struct pt_regs *regs) { struct pt_regs *old_regs = set_irq_regs(regs); @@ -97,6 +97,15 @@ asm_do_IRQ(unsigned int irq, struct pt_regs *regs) set_irq_regs(old_regs); } +/* + * asm_do_IRQ is the interface to be used from assembly code. + */ +asmlinkage void __exception_irq_entry +asm_do_IRQ(unsigned int irq, struct pt_regs *regs) +{ + handle_IRQ(irq, regs); +} + void set_irq_flags(unsigned int irq, unsigned int iflags) { unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; -- cgit v1.2.3 From 4e234cc0ee9db31d5b16b58d7c09af17246b2466 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Mon, 4 Apr 2011 15:06:33 +0800 Subject: ARM: pxa: enable AUTO_ZRELADDR Signed-off-by: Eric Miao --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9adc278a22ab..47c22a7df982 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -618,6 +618,7 @@ config ARCH_PXA select TICK_ONESHOT select PLAT_PXA select SPARSE_IRQ + select AUTO_ZRELADDR help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. -- cgit v1.2.3 From 52585ccd93d75e368382af09ae336ed8f231642c Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Fri, 8 Apr 2011 20:15:38 +0800 Subject: ARM: pxa: add clk_set_rate() Since there're mulitple clock rates in some device controllers, enable clk_set_rate() for this usage. Signed-off-by: Haojian Zhuang Signed-off-by: Eric Miao --- arch/arm/mach-mmp/clock.c | 15 +++++++++++++++ arch/arm/mach-mmp/clock.h | 1 + arch/arm/mach-pxa/clock.c | 15 +++++++++++++++ arch/arm/mach-pxa/clock.h | 1 + 4 files changed, 32 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-mmp/clock.c b/arch/arm/mach-mmp/clock.c index 886e05648f08..7c6f95f29142 100644 --- a/arch/arm/mach-mmp/clock.c +++ b/arch/arm/mach-mmp/clock.c @@ -88,3 +88,18 @@ unsigned long clk_get_rate(struct clk *clk) return rate; } EXPORT_SYMBOL(clk_get_rate); + +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long flags; + int ret = -EINVAL; + + if (clk->ops->setrate) { + spin_lock_irqsave(&clocks_lock, flags); + ret = clk->ops->setrate(clk, rate); + spin_unlock_irqrestore(&clocks_lock, flags); + } + + return ret; +} +EXPORT_SYMBOL(clk_set_rate); diff --git a/arch/arm/mach-mmp/clock.h b/arch/arm/mach-mmp/clock.h index 9b027d7491f5..3143e994e672 100644 --- a/arch/arm/mach-mmp/clock.h +++ b/arch/arm/mach-mmp/clock.h @@ -12,6 +12,7 @@ struct clkops { void (*enable)(struct clk *); void (*disable)(struct clk *); unsigned long (*getrate)(struct clk *); + int (*setrate)(struct clk *, unsigned long); }; struct clk { diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c index d5152220ce94..4d466102a027 100644 --- a/arch/arm/mach-pxa/clock.c +++ b/arch/arm/mach-pxa/clock.c @@ -53,6 +53,21 @@ unsigned long clk_get_rate(struct clk *clk) } EXPORT_SYMBOL(clk_get_rate); +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long flags; + int ret = -EINVAL; + + if (clk->ops->setrate) { + spin_lock_irqsave(&clocks_lock, flags); + ret = clk->ops->setrate(clk, rate); + spin_unlock_irqrestore(&clocks_lock, flags); + } + + return ret; +} +EXPORT_SYMBOL(clk_set_rate); + void clk_dummy_enable(struct clk *clk) { } diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h index 1f2fb9c43f06..3a258b1bf1aa 100644 --- a/arch/arm/mach-pxa/clock.h +++ b/arch/arm/mach-pxa/clock.h @@ -5,6 +5,7 @@ struct clkops { void (*enable)(struct clk *); void (*disable)(struct clk *); unsigned long (*getrate)(struct clk *); + int (*setrate)(struct clk *, unsigned long); }; struct clk { -- cgit v1.2.3 From 9c86441081e84c9fb9fac3929c6e7d3e6f4dd891 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 18 May 2011 15:35:54 +0800 Subject: ARM: pxa: add common header file for pxa3xx Signed-off-by: Eric Miao --- arch/arm/mach-pxa/include/mach/pxa300.h | 3 +-- arch/arm/mach-pxa/include/mach/pxa320.h | 3 +-- arch/arm/mach-pxa/include/mach/pxa3xx.h | 7 +++++++ arch/arm/mach-pxa/include/mach/pxa930.h | 3 +-- 4 files changed, 10 insertions(+), 6 deletions(-) create mode 100644 arch/arm/mach-pxa/include/mach/pxa3xx.h (limited to 'arch') diff --git a/arch/arm/mach-pxa/include/mach/pxa300.h b/arch/arm/mach-pxa/include/mach/pxa300.h index 2f33076c9e48..733b6412c3df 100644 --- a/arch/arm/mach-pxa/include/mach/pxa300.h +++ b/arch/arm/mach-pxa/include/mach/pxa300.h @@ -1,8 +1,7 @@ #ifndef __MACH_PXA300_H #define __MACH_PXA300_H -#include -#include +#include #include #endif /* __MACH_PXA300_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa320.h b/arch/arm/mach-pxa/include/mach/pxa320.h index cab78e903273..b6204e470d89 100644 --- a/arch/arm/mach-pxa/include/mach/pxa320.h +++ b/arch/arm/mach-pxa/include/mach/pxa320.h @@ -1,8 +1,7 @@ #ifndef __MACH_PXA320_H #define __MACH_PXA320_H -#include -#include +#include #include #endif /* __MACH_PXA320_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx.h b/arch/arm/mach-pxa/include/mach/pxa3xx.h new file mode 100644 index 000000000000..5b9552d8908a --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/pxa3xx.h @@ -0,0 +1,7 @@ +#ifndef __MACH_PXA3XX_H +#define __MACH_PXA3XX_H + +#include +#include + +#endif /* __MACH_PXA3XX_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa930.h b/arch/arm/mach-pxa/include/mach/pxa930.h index d45f76a9b54d..190363b98d01 100644 --- a/arch/arm/mach-pxa/include/mach/pxa930.h +++ b/arch/arm/mach-pxa/include/mach/pxa930.h @@ -1,8 +1,7 @@ #ifndef __MACH_PXA930_H #define __MACH_PXA930_H -#include -#include +#include #include #endif /* __MACH_PXA930_H */ -- cgit v1.2.3 From 5d284e353eb11ab2e8b1c5671ba06489b0bd1e0c Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 27 Apr 2011 22:48:04 +0800 Subject: ARM: pxa: avoid accessing interrupt registers directly Signed-off-by: Eric Miao --- arch/arm/mach-pxa/include/mach/irqs.h | 7 +++++++ arch/arm/mach-pxa/include/mach/regs-intc.h | 30 ------------------------------ arch/arm/mach-pxa/irq.c | 4 ++-- arch/arm/mach-pxa/pxa3xx.c | 5 ++--- arch/arm/mach-pxa/pxa95x.c | 1 - 5 files changed, 11 insertions(+), 36 deletions(-) delete mode 100644 arch/arm/mach-pxa/include/mach/regs-intc.h (limited to 'arch') diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 038402404e39..a94c694b4af9 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h @@ -104,4 +104,11 @@ #define NR_IRQS (IRQ_BOARD_START) +#ifndef __ASSEMBLY__ +struct irq_data; + +void pxa_mask_irq(struct irq_data *); +void pxa_unmask_irq(struct irq_data *); +#endif + #endif /* __ASM_MACH_IRQS_H */ diff --git a/arch/arm/mach-pxa/include/mach/regs-intc.h b/arch/arm/mach-pxa/include/mach/regs-intc.h deleted file mode 100644 index 662288eb6f95..000000000000 --- a/arch/arm/mach-pxa/include/mach/regs-intc.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef __ASM_MACH_REGS_INTC_H -#define __ASM_MACH_REGS_INTC_H - -#include - -/* - * Interrupt Controller - */ - -#define ICIP __REG(0x40D00000) /* Interrupt Controller IRQ Pending Register */ -#define ICMR __REG(0x40D00004) /* Interrupt Controller Mask Register */ -#define ICLR __REG(0x40D00008) /* Interrupt Controller Level Register */ -#define ICFP __REG(0x40D0000C) /* Interrupt Controller FIQ Pending Register */ -#define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */ -#define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */ -#define ICHP __REG(0x40D00018) /* Interrupt Controller Highest Priority Register */ - -#define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ -#define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */ -#define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */ -#define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */ -#define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */ - -#define ICIP3 __REG(0x40D00130) /* Interrupt Controller IRQ Pending Register 3 */ -#define ICMR3 __REG(0x40D00134) /* Interrupt Controller Mask Register 3 */ -#define ICLR3 __REG(0x40D00138) /* Interrupt Controller Level Register 3 */ -#define ICFP3 __REG(0x40D0013C) /* Interrupt Controller FIQ Pending Register 3 */ -#define ICPR3 __REG(0x40D00140) /* Interrupt Controller Pending Register 3 */ - -#endif /* __ASM_MACH_REGS_INTC_H */ diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 32ed551bf9c5..c89c0e40fe32 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -64,7 +64,7 @@ static inline void __iomem *irq_base(int i) return (void __iomem *)io_p2v(phys_base[i]); } -static void pxa_mask_irq(struct irq_data *d) +void pxa_mask_irq(struct irq_data *d) { void __iomem *base = irq_data_get_irq_chip_data(d); uint32_t icmr = __raw_readl(base + ICMR); @@ -73,7 +73,7 @@ static void pxa_mask_irq(struct irq_data *d) __raw_writel(icmr, base + ICMR); } -static void pxa_unmask_irq(struct irq_data *d) +void pxa_unmask_irq(struct irq_data *d) { void __iomem *base = irq_data_get_irq_chip_data(d); uint32_t icmr = __raw_readl(base + ICMR); diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 8521d7d6f1da..e66dc1562cda 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include "generic.h" @@ -328,13 +327,13 @@ static void pxa_ack_ext_wakeup(struct irq_data *d) static void pxa_mask_ext_wakeup(struct irq_data *d) { - ICMR2 &= ~(1 << ((d->irq - PXA_IRQ(0)) & 0x1f)); + pxa_mask_irq(d); PECR &= ~PECR_IE(d->irq - IRQ_WAKEUP0); } static void pxa_unmask_ext_wakeup(struct irq_data *d) { - ICMR2 |= 1 << ((d->irq - PXA_IRQ(0)) & 0x1f); + pxa_unmask_irq(d); PECR |= PECR_IE(d->irq - IRQ_WAKEUP0); } diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c index ecc82a330fad..0ee166b61f81 100644 --- a/arch/arm/mach-pxa/pxa95x.c +++ b/arch/arm/mach-pxa/pxa95x.c @@ -27,7 +27,6 @@ #include #include #include -#include #include "generic.h" #include "devices.h" -- cgit v1.2.3 From a551e4f787220459c6e78668a15cbe01f1ac7637 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 27 Apr 2011 22:48:05 +0800 Subject: ARM: pxa: introduce {icip,ichp}_handle_irq() to prepare MULTI_IRQ_HANDLER Thanks Dmitry for providing a fix to the original code. Signed-off-by: Eric Miao Signed-off-by: Dmitry Eremin-Solenikov --- arch/arm/mach-pxa/include/mach/irqs.h | 3 +++ arch/arm/mach-pxa/irq.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index a94c694b4af9..564337de9582 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h @@ -106,9 +106,12 @@ #ifndef __ASSEMBLY__ struct irq_data; +struct pt_regs; void pxa_mask_irq(struct irq_data *); void pxa_unmask_irq(struct irq_data *); +void icip_handle_irq(struct pt_regs *); +void ichp_handle_irq(struct pt_regs *); #endif #endif /* __ASM_MACH_IRQS_H */ diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index c89c0e40fe32..b09e848eb6c6 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -37,6 +37,8 @@ #define IPR(i) (((i) < 32) ? (0x01c + ((i) << 2)) : \ ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \ (0x144 + (((i) - 64) << 2))) +#define ICHP_VAL_IRQ (1 << 31) +#define ICHP_IRQ(i) (((i) >> 16) & 0x7fff) #define IPR_VALID (1 << 31) #define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f) @@ -127,6 +129,36 @@ static struct irq_chip pxa_low_gpio_chip = { .irq_set_type = pxa_set_low_gpio_type, }; +asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs) +{ + uint32_t icip, icmr, mask; + + do { + icip = __raw_readl(IRQ_BASE + ICIP); + icmr = __raw_readl(IRQ_BASE + ICMR); + mask = icip & icmr; + + if (mask == 0) + break; + + handle_IRQ(PXA_IRQ(fls(mask) - 1), regs); + } while (1); +} + +asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs) +{ + uint32_t ichp; + + do { + __asm__ __volatile__("mrc p6, 0, %0, c5, c0, 0\n": "=r"(ichp)); + + if ((ichp & ICHP_VAL_IRQ) == 0) + break; + + handle_IRQ(PXA_IRQ(ICHP_IRQ(ichp)), regs); + } while (1); +} + static void __init pxa_init_low_gpio_irq(set_wake_t fn) { int irq; -- cgit v1.2.3 From ca0e687c8ea5a7ae4b1c7a735f797f95ed953f9a Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 18 May 2011 21:19:04 +0800 Subject: ARM: pxa: move declarations from generic.h to .h Signed-off-by: Eric Miao --- arch/arm/mach-pxa/cm-x2xx.c | 3 ++- arch/arm/mach-pxa/colibri-pxa320.c | 3 +-- arch/arm/mach-pxa/csb726.c | 3 +-- arch/arm/mach-pxa/generic.h | 13 ------------- arch/arm/mach-pxa/himalaya.c | 3 +-- arch/arm/mach-pxa/include/mach/irqs.h | 2 ++ arch/arm/mach-pxa/include/mach/pxa25x.h | 6 ++++++ arch/arm/mach-pxa/include/mach/pxa27x.h | 3 +++ arch/arm/mach-pxa/include/mach/pxa3xx.h | 4 ++++ arch/arm/mach-pxa/palmtc.c | 3 +-- arch/arm/mach-pxa/palmte2.c | 2 +- arch/arm/mach-pxa/raumfeld.c | 5 +---- arch/arm/mach-pxa/xcep.c | 3 +-- arch/arm/mach-pxa/zeus.c | 3 +-- arch/arm/mach-pxa/zylonite.c | 2 +- 15 files changed, 26 insertions(+), 32 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index a10996782476..7cc7414bafcf 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c @@ -21,7 +21,8 @@ #include #include -#include +#include +#include #include #include #include diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c index ff9ff5f4fc47..42b8929acfa7 100644 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ b/arch/arm/mach-pxa/colibri-pxa320.c @@ -23,8 +23,7 @@ #include #include -#include -#include +#include #include #include #include diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c index 0481c29a70e8..6e95e819f8a1 100644 --- a/arch/arm/mach-pxa/csb726.c +++ b/arch/arm/mach-pxa/csb726.c @@ -22,10 +22,9 @@ #include #include #include -#include +#include #include #include -#include #include #include diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index e6c9344a95ae..92a2e85ab02c 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h @@ -13,21 +13,8 @@ struct irq_data; struct sys_timer; extern struct sys_timer pxa_timer; -extern void __init pxa_init_irq(int irq_nr, - int (*set_wake)(struct irq_data *, - unsigned int)); -extern void __init pxa25x_init_irq(void); -#ifdef CONFIG_CPU_PXA26x -extern void __init pxa26x_init_irq(void); -#endif -extern void __init pxa27x_init_irq(void); -extern void __init pxa3xx_init_irq(void); -extern void __init pxa95x_init_irq(void); extern void __init pxa_map_io(void); -extern void __init pxa25x_map_io(void); -extern void __init pxa27x_map_io(void); -extern void __init pxa3xx_map_io(void); extern unsigned int get_clk_frequency_khz(int info); diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c index e8603eba54bd..a2ea97926a6d 100644 --- a/arch/arm/mach-pxa/himalaya.c +++ b/arch/arm/mach-pxa/himalaya.c @@ -24,8 +24,7 @@ #include #include -#include -#include +#include #include "generic.h" diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 564337de9582..7cc5a781e99e 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h @@ -112,6 +112,8 @@ void pxa_mask_irq(struct irq_data *); void pxa_unmask_irq(struct irq_data *); void icip_handle_irq(struct pt_regs *); void ichp_handle_irq(struct pt_regs *); + +void pxa_init_irq(int irq_nr, int (*set_wake)(struct irq_data *, unsigned int)); #endif #endif /* __ASM_MACH_IRQS_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa25x.h b/arch/arm/mach-pxa/include/mach/pxa25x.h index 508c3ba1f4d0..187b14c26a65 100644 --- a/arch/arm/mach-pxa/include/mach/pxa25x.h +++ b/arch/arm/mach-pxa/include/mach/pxa25x.h @@ -4,5 +4,11 @@ #include #include #include +#include +extern void __init pxa25x_map_io(void); +extern void __init pxa25x_init_irq(void); +#ifdef CONFIG_CPU_PXA26x +extern void __init pxa26x_init_irq(void); +#endif #endif /* __MACH_PXA25x_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h index 0b702693f458..801f170b1207 100644 --- a/arch/arm/mach-pxa/include/mach/pxa27x.h +++ b/arch/arm/mach-pxa/include/mach/pxa27x.h @@ -4,6 +4,7 @@ #include #include #include +#include #define ARB_CNTRL __REG(0x48000048) /* Arbiter Control Register */ @@ -17,6 +18,8 @@ #define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ #define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ +extern void __init pxa27x_map_io(void); +extern void __init pxa27x_init_irq(void); extern int __init pxa27x_set_pwrmode(unsigned int mode); #endif /* __MACH_PXA27x_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx.h b/arch/arm/mach-pxa/include/mach/pxa3xx.h index 5b9552d8908a..c50a1b5c3812 100644 --- a/arch/arm/mach-pxa/include/mach/pxa3xx.h +++ b/arch/arm/mach-pxa/include/mach/pxa3xx.h @@ -3,5 +3,9 @@ #include #include +#include +extern void __init pxa3xx_map_io(void); +extern void __init pxa3xx_init_irq(void); +extern void __init pxa95x_init_irq(void); #endif /* __MACH_PXA3XX_H */ diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index fb06bd047272..796d391857dc 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c @@ -31,14 +31,13 @@ #include #include +#include #include #include #include #include -#include #include #include -#include #include "generic.h" #include "devices.h" diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c index 726f5b98dcd3..6e59c5fc5a34 100644 --- a/arch/arm/mach-pxa/palmte2.c +++ b/arch/arm/mach-pxa/palmte2.c @@ -31,11 +31,11 @@ #include #include +#include #include #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c index d130f77b6d11..ad1a313c8fca 100644 --- a/arch/arm/mach-pxa/raumfeld.c +++ b/arch/arm/mach-pxa/raumfeld.c @@ -46,10 +46,7 @@ #include #include -#include -#include -#include -#include +#include #include #include #include diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c index f55f8f2e0db3..03cfd60a6560 100644 --- a/arch/arm/mach-pxa/xcep.c +++ b/arch/arm/mach-pxa/xcep.c @@ -28,8 +28,7 @@ #include #include -#include -#include +#include #include #include "generic.h" diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 00363c7ac182..973590e8dba7 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -34,14 +34,13 @@ #include #include -#include +#include #include #include #include #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 5821185f77ab..23776fb7cbda 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c @@ -24,7 +24,7 @@ #include #include -#include +#include #include #include #include -- cgit v1.2.3 From 8a97ae2f554d762a4bc67b5d13b52ef39c8d6baa Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 18 May 2011 21:30:04 +0800 Subject: ARM: pxa: enable MULTI_IRQ_HANDLER for all boards Signed-off-by: Eric Miao --- arch/arm/Kconfig | 1 + arch/arm/mach-pxa/balloon3.c | 1 + arch/arm/mach-pxa/capc7117.c | 1 + arch/arm/mach-pxa/cm-x2xx.c | 2 ++ arch/arm/mach-pxa/cm-x300.c | 1 + arch/arm/mach-pxa/colibri-pxa270.c | 2 ++ arch/arm/mach-pxa/colibri-pxa300.c | 1 + arch/arm/mach-pxa/colibri-pxa320.c | 1 + arch/arm/mach-pxa/corgi.c | 3 +++ arch/arm/mach-pxa/csb726.c | 1 + arch/arm/mach-pxa/em-x270.c | 2 ++ arch/arm/mach-pxa/eseries.c | 6 ++++++ arch/arm/mach-pxa/ezx.c | 6 ++++++ arch/arm/mach-pxa/gumstix.c | 1 + arch/arm/mach-pxa/h5000.c | 2 ++ arch/arm/mach-pxa/himalaya.c | 1 + arch/arm/mach-pxa/hx4700.c | 1 + arch/arm/mach-pxa/icontrol.c | 1 + arch/arm/mach-pxa/idp.c | 1 + arch/arm/mach-pxa/include/mach/pxa25x.h | 3 +++ arch/arm/mach-pxa/include/mach/pxa27x.h | 2 ++ arch/arm/mach-pxa/include/mach/pxa3xx.h | 3 +++ arch/arm/mach-pxa/littleton.c | 1 + arch/arm/mach-pxa/lpd270.c | 1 + arch/arm/mach-pxa/lubbock.c | 1 + arch/arm/mach-pxa/magician.c | 1 + arch/arm/mach-pxa/mainstone.c | 1 + arch/arm/mach-pxa/mioa701.c | 1 + arch/arm/mach-pxa/mp900.c | 1 + arch/arm/mach-pxa/palmld.c | 1 + arch/arm/mach-pxa/palmt5.c | 1 + arch/arm/mach-pxa/palmtc.c | 1 + arch/arm/mach-pxa/palmte2.c | 1 + arch/arm/mach-pxa/palmtreo.c | 2 ++ arch/arm/mach-pxa/palmtx.c | 1 + arch/arm/mach-pxa/palmz72.c | 1 + arch/arm/mach-pxa/pcm027.c | 1 + arch/arm/mach-pxa/poodle.c | 1 + arch/arm/mach-pxa/raumfeld.c | 3 +++ arch/arm/mach-pxa/saar.c | 1 + arch/arm/mach-pxa/saarb.c | 1 + arch/arm/mach-pxa/spitz.c | 3 +++ arch/arm/mach-pxa/stargate2.c | 2 ++ arch/arm/mach-pxa/tavorevb.c | 1 + arch/arm/mach-pxa/tavorevb3.c | 1 + arch/arm/mach-pxa/tosa.c | 1 + arch/arm/mach-pxa/trizeps4.c | 2 ++ arch/arm/mach-pxa/viper.c | 1 + arch/arm/mach-pxa/vpac270.c | 1 + arch/arm/mach-pxa/xcep.c | 1 + arch/arm/mach-pxa/z2.c | 1 + arch/arm/mach-pxa/zeus.c | 1 + arch/arm/mach-pxa/zylonite.c | 1 + 53 files changed, 81 insertions(+) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 47c22a7df982..3eacf575037c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -619,6 +619,7 @@ config ARCH_PXA select PLAT_PXA select SPARSE_IRQ select AUTO_ZRELADDR + select MULTI_IRQ_HANDLER help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 810a982a66f8..ef3e8b1e06c1 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -825,6 +825,7 @@ MACHINE_START(BALLOON3, "Balloon3") .map_io = balloon3_map_io, .nr_irqs = BALLOON3_NR_IRQS, .init_irq = balloon3_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = balloon3_init, .boot_params = PLAT_PHYS_OFFSET + 0x100, diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c index 4284513f396a..648b0ab2bf77 100644 --- a/arch/arm/mach-pxa/capc7117.c +++ b/arch/arm/mach-pxa/capc7117.c @@ -151,6 +151,7 @@ MACHINE_START(CAPC7117, .boot_params = 0xa0000100, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = capc7117_init MACHINE_END diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index 7cc7414bafcf..1719927c24d6 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c @@ -517,6 +517,8 @@ MACHINE_START(ARMCORE, "Compulab CM-X2XX") .map_io = cmx2xx_map_io, .nr_irqs = CMX2XX_NR_IRQS, .init_irq = cmx2xx_init_irq, + /* NOTE: pxa25x_handle_irq() works on PXA27x w/o camera support */ + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = cmx2xx_init, MACHINE_END diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index b2248e76ec8b..de577c7e3ace 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -859,6 +859,7 @@ MACHINE_START(CM_X300, "CM-X300 module") .boot_params = 0xa0000100, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = cm_x300_init, .fixup = cm_x300_fixup, diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c index 7545a48ed88b..870920934ecf 100644 --- a/arch/arm/mach-pxa/colibri-pxa270.c +++ b/arch/arm/mach-pxa/colibri-pxa270.c @@ -310,6 +310,7 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270") .init_machine = colibri_pxa270_init, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, MACHINE_END @@ -318,6 +319,7 @@ MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") .init_machine = colibri_pxa270_income_init, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c index 66dd81cbc8a0..60a6781e7a8e 100644 --- a/arch/arm/mach-pxa/colibri-pxa300.c +++ b/arch/arm/mach-pxa/colibri-pxa300.c @@ -187,6 +187,7 @@ MACHINE_START(COLIBRI300, "Toradex Colibri PXA300") .init_machine = colibri_pxa300_init, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c index 42b8929acfa7..d2c6631915d4 100644 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ b/arch/arm/mach-pxa/colibri-pxa320.c @@ -257,6 +257,7 @@ MACHINE_START(COLIBRI320, "Toradex Colibri PXA320") .init_machine = colibri_pxa320_init, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 3a5507e31919..185a37cad254 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c @@ -722,6 +722,7 @@ MACHINE_START(CORGI, "SHARP Corgi") .fixup = fixup_corgi, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .init_machine = corgi_init, .timer = &pxa_timer, MACHINE_END @@ -732,6 +733,7 @@ MACHINE_START(SHEPHERD, "SHARP Shepherd") .fixup = fixup_corgi, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .init_machine = corgi_init, .timer = &pxa_timer, MACHINE_END @@ -742,6 +744,7 @@ MACHINE_START(HUSKY, "SHARP Husky") .fixup = fixup_corgi, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .init_machine = corgi_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c index 6e95e819f8a1..fe812eafb1f1 100644 --- a/arch/arm/mach-pxa/csb726.c +++ b/arch/arm/mach-pxa/csb726.c @@ -275,6 +275,7 @@ MACHINE_START(CSB726, "Cogent CSB726") .boot_params = 0xa0000100, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .init_machine = csb726_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index f8a6e9d79a3a..2e37ea52b372 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c @@ -1302,6 +1302,7 @@ MACHINE_START(EM_X270, "Compulab EM-X270") .boot_params = 0xa0000100, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = em_x270_init, MACHINE_END @@ -1310,6 +1311,7 @@ MACHINE_START(EXEDA, "Compulab eXeda") .boot_params = 0xa0000100, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = em_x270_init, MACHINE_END diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c index 2e3970fdde0b..b4599ec9d619 100644 --- a/arch/arm/mach-pxa/eseries.c +++ b/arch/arm/mach-pxa/eseries.c @@ -193,6 +193,7 @@ MACHINE_START(E330, "Toshiba e330") .map_io = pxa25x_map_io, .nr_irqs = ESERIES_NR_IRQS, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .fixup = eseries_fixup, .init_machine = e330_init, .timer = &pxa_timer, @@ -242,6 +243,7 @@ MACHINE_START(E350, "Toshiba e350") .map_io = pxa25x_map_io, .nr_irqs = ESERIES_NR_IRQS, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .fixup = eseries_fixup, .init_machine = e350_init, .timer = &pxa_timer, @@ -364,6 +366,7 @@ MACHINE_START(E400, "Toshiba e400") .map_io = pxa25x_map_io, .nr_irqs = ESERIES_NR_IRQS, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .fixup = eseries_fixup, .init_machine = e400_init, .timer = &pxa_timer, @@ -552,6 +555,7 @@ MACHINE_START(E740, "Toshiba e740") .map_io = pxa25x_map_io, .nr_irqs = ESERIES_NR_IRQS, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .fixup = eseries_fixup, .init_machine = e740_init, .timer = &pxa_timer, @@ -743,6 +747,7 @@ MACHINE_START(E750, "Toshiba e750") .map_io = pxa25x_map_io, .nr_irqs = ESERIES_NR_IRQS, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .fixup = eseries_fixup, .init_machine = e750_init, .timer = &pxa_timer, @@ -947,6 +952,7 @@ MACHINE_START(E800, "Toshiba e800") .map_io = pxa25x_map_io, .nr_irqs = ESERIES_NR_IRQS, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .fixup = eseries_fixup, .init_machine = e800_init, .timer = &pxa_timer, diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c index d88aed8fbe15..b73eadb9f5dc 100644 --- a/arch/arm/mach-pxa/ezx.c +++ b/arch/arm/mach-pxa/ezx.c @@ -801,6 +801,7 @@ MACHINE_START(EZX_A780, "Motorola EZX A780") .map_io = pxa27x_map_io, .nr_irqs = EZX_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = a780_init, MACHINE_END @@ -866,6 +867,7 @@ MACHINE_START(EZX_E680, "Motorola EZX E680") .map_io = pxa27x_map_io, .nr_irqs = EZX_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = e680_init, MACHINE_END @@ -931,6 +933,7 @@ MACHINE_START(EZX_A1200, "Motorola EZX A1200") .map_io = pxa27x_map_io, .nr_irqs = EZX_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = a1200_init, MACHINE_END @@ -1121,6 +1124,7 @@ MACHINE_START(EZX_A910, "Motorola EZX A910") .map_io = pxa27x_map_io, .nr_irqs = EZX_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = a910_init, MACHINE_END @@ -1186,6 +1190,7 @@ MACHINE_START(EZX_E6, "Motorola EZX E6") .map_io = pxa27x_map_io, .nr_irqs = EZX_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = e6_init, MACHINE_END @@ -1225,6 +1230,7 @@ MACHINE_START(EZX_E2, "Motorola EZX E2") .map_io = pxa27x_map_io, .nr_irqs = EZX_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = e2_init, MACHINE_END diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c index d65e4bde9b91..deaa111c91f9 100644 --- a/arch/arm/mach-pxa/gumstix.c +++ b/arch/arm/mach-pxa/gumstix.c @@ -236,6 +236,7 @@ MACHINE_START(GUMSTIX, "Gumstix") .boot_params = 0xa0000100, /* match u-boot bi_boot_params */ .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = gumstix_init, MACHINE_END diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c index 657db469de1f..0a235128914d 100644 --- a/arch/arm/mach-pxa/h5000.c +++ b/arch/arm/mach-pxa/h5000.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include @@ -205,6 +206,7 @@ MACHINE_START(H5400, "HP iPAQ H5000") .boot_params = 0xa0000100, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = h5000_init, MACHINE_END diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c index a2ea97926a6d..a997d0ab2872 100644 --- a/arch/arm/mach-pxa/himalaya.c +++ b/arch/arm/mach-pxa/himalaya.c @@ -161,6 +161,7 @@ MACHINE_START(HIMALAYA, "HTC Himalaya") .boot_params = 0xa0000100, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .init_machine = himalaya_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c index f941a495a4a8..9a734cb7236e 100644 --- a/arch/arm/mach-pxa/hx4700.c +++ b/arch/arm/mach-pxa/hx4700.c @@ -874,6 +874,7 @@ MACHINE_START(H4700, "HP iPAQ HX4700") .map_io = pxa27x_map_io, .nr_irqs = HX4700_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .init_machine = hx4700_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c index 6cedc81da3bc..d427429f1f34 100644 --- a/arch/arm/mach-pxa/icontrol.c +++ b/arch/arm/mach-pxa/icontrol.c @@ -194,6 +194,7 @@ MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM") .boot_params = 0xa0000100, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = icontrol_init MACHINE_END diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index f7fb64f11a7d..ddf20e5c376e 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c @@ -196,6 +196,7 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP") /* Maintainer: Vibren Technologies */ .map_io = idp_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = idp_init, MACHINE_END diff --git a/arch/arm/mach-pxa/include/mach/pxa25x.h b/arch/arm/mach-pxa/include/mach/pxa25x.h index 187b14c26a65..3ac0baac7350 100644 --- a/arch/arm/mach-pxa/include/mach/pxa25x.h +++ b/arch/arm/mach-pxa/include/mach/pxa25x.h @@ -11,4 +11,7 @@ extern void __init pxa25x_init_irq(void); #ifdef CONFIG_CPU_PXA26x extern void __init pxa26x_init_irq(void); #endif + +#define pxa25x_handle_irq icip_handle_irq + #endif /* __MACH_PXA25x_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h index 801f170b1207..b9b1bdc4bacc 100644 --- a/arch/arm/mach-pxa/include/mach/pxa27x.h +++ b/arch/arm/mach-pxa/include/mach/pxa27x.h @@ -22,4 +22,6 @@ extern void __init pxa27x_map_io(void); extern void __init pxa27x_init_irq(void); extern int __init pxa27x_set_pwrmode(unsigned int mode); +#define pxa27x_handle_irq ichp_handle_irq + #endif /* __MACH_PXA27x_H */ diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx.h b/arch/arm/mach-pxa/include/mach/pxa3xx.h index c50a1b5c3812..cd3e57f42688 100644 --- a/arch/arm/mach-pxa/include/mach/pxa3xx.h +++ b/arch/arm/mach-pxa/include/mach/pxa3xx.h @@ -8,4 +8,7 @@ extern void __init pxa3xx_map_io(void); extern void __init pxa3xx_init_irq(void); extern void __init pxa95x_init_irq(void); + +#define pxa3xx_handle_irq ichp_handle_irq + #endif /* __MACH_PXA3XX_H */ diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index e5e326d2cdc9..8f97e15e86e5 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c @@ -441,6 +441,7 @@ MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleto .map_io = pxa3xx_map_io, .nr_irqs = LITTLETON_NR_IRQS, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = littleton_init, MACHINE_END diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 6cf8180bf5bd..c171d6ebee49 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -503,6 +503,7 @@ MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine") .map_io = lpd270_map_io, .nr_irqs = LPD270_NR_IRQS, .init_irq = lpd270_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = lpd270_init, MACHINE_END diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index e10ddb827147..a8c696bfc132 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -553,6 +553,7 @@ MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)") .map_io = lubbock_map_io, .nr_irqs = LUBBOCK_NR_IRQS, .init_irq = lubbock_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = lubbock_init, MACHINE_END diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index e1920572948a..cb3509ee1fe2 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c @@ -768,6 +768,7 @@ MACHINE_START(MAGICIAN, "HTC Magician") .map_io = pxa27x_map_io, .nr_irqs = MAGICIAN_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .init_machine = magician_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 3479e2b3b511..4622eb78ef25 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -620,6 +620,7 @@ MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") .map_io = mainstone_map_io, .nr_irqs = MAINSTONE_NR_IRQS, .init_irq = mainstone_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = mainstone_init, MACHINE_END diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index e3470137c934..ff92efd65a53 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -794,6 +794,7 @@ MACHINE_START(MIOA701, "MIO A701") .boot_params = 0xa0000100, .map_io = &pxa27x_map_io, .init_irq = &pxa27x_init_irq, + .handle_irq = &pxa27x_handle_irq, .init_machine = mioa701_machine_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c index 59cce78aebd1..fb408861dbcf 100644 --- a/arch/arm/mach-pxa/mp900.c +++ b/arch/arm/mach-pxa/mp900.c @@ -96,6 +96,7 @@ MACHINE_START(NEC_MP900, "MobilePro900/C") .timer = &pxa_timer, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .init_machine = mp900c_init, MACHINE_END diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c index 4061ecddee70..6b77365ed938 100644 --- a/arch/arm/mach-pxa/palmld.c +++ b/arch/arm/mach-pxa/palmld.c @@ -345,6 +345,7 @@ MACHINE_START(PALMLD, "Palm LifeDrive") .boot_params = 0xa0000100, .map_io = palmld_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = palmld_init MACHINE_END diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c index df4d7d009fbb..9bd3e47486fb 100644 --- a/arch/arm/mach-pxa/palmt5.c +++ b/arch/arm/mach-pxa/palmt5.c @@ -206,6 +206,7 @@ MACHINE_START(PALMT5, "Palm Tungsten|T5") .map_io = pxa27x_map_io, .reserve = palmt5_reserve, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = palmt5_init MACHINE_END diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index 796d391857dc..6ad4a6c7bc96 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c @@ -540,6 +540,7 @@ MACHINE_START(PALMTC, "Palm Tungsten|C") .boot_params = 0xa0000100, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = palmtc_init MACHINE_END diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c index 6e59c5fc5a34..664232f3e62c 100644 --- a/arch/arm/mach-pxa/palmte2.c +++ b/arch/arm/mach-pxa/palmte2.c @@ -359,6 +359,7 @@ MACHINE_START(PALMTE2, "Palm Tungsten|E2") .boot_params = 0xa0000100, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = palmte2_init MACHINE_END diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c index 20d1b18b1733..bb27d4b688d8 100644 --- a/arch/arm/mach-pxa/palmtreo.c +++ b/arch/arm/mach-pxa/palmtreo.c @@ -444,6 +444,7 @@ MACHINE_START(TREO680, "Palm Treo 680") .map_io = pxa27x_map_io, .reserve = treo_reserve, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = treo680_init, MACHINE_END @@ -453,6 +454,7 @@ MACHINE_START(CENTRO, "Palm Centro 685") .map_io = pxa27x_map_io, .reserve = treo_reserve, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = centro_init, MACHINE_END diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 595f002066cc..fc4285589c1f 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c @@ -367,6 +367,7 @@ MACHINE_START(PALMTX, "Palm T|X") .boot_params = 0xa0000100, .map_io = palmtx_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = palmtx_init MACHINE_END diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c index 65f24f0b77e8..95d71c3a5bae 100644 --- a/arch/arm/mach-pxa/palmz72.c +++ b/arch/arm/mach-pxa/palmz72.c @@ -401,6 +401,7 @@ MACHINE_START(PALMZ72, "Palm Zire72") .boot_params = 0xa0000100, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = palmz72_init MACHINE_END diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c index 1fc8a66407ae..ffa65dfb8c6f 100644 --- a/arch/arm/mach-pxa/pcm027.c +++ b/arch/arm/mach-pxa/pcm027.c @@ -262,6 +262,7 @@ MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270") .map_io = pcm027_map_io, .nr_irqs = PCM027_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = pcm027_init, MACHINE_END diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index 16d14fd79b4b..a113ea9ab4ab 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -468,6 +468,7 @@ MACHINE_START(POODLE, "SHARP Poodle") .map_io = pxa25x_map_io, .nr_irqs = POODLE_NR_IRQS, /* 4 for LoCoMo */ .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = poodle_init, MACHINE_END diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c index ad1a313c8fca..8b8cff6a9620 100644 --- a/arch/arm/mach-pxa/raumfeld.c +++ b/arch/arm/mach-pxa/raumfeld.c @@ -1088,6 +1088,7 @@ MACHINE_START(RAUMFELD_RC, "Raumfeld Controller") .init_machine = raumfeld_controller_init, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, MACHINE_END #endif @@ -1098,6 +1099,7 @@ MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector") .init_machine = raumfeld_connector_init, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, MACHINE_END #endif @@ -1108,6 +1110,7 @@ MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker") .init_machine = raumfeld_speaker_init, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, MACHINE_END #endif diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c index fee97a935122..df4356e8acae 100644 --- a/arch/arm/mach-pxa/saar.c +++ b/arch/arm/mach-pxa/saar.c @@ -599,6 +599,7 @@ MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)") .boot_params = 0xa0000100, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = saar_init, MACHINE_END diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c index 9322fe527c7f..3b582d691cc6 100644 --- a/arch/arm/mach-pxa/saarb.c +++ b/arch/arm/mach-pxa/saarb.c @@ -107,6 +107,7 @@ MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)") .map_io = pxa_map_io, .nr_irqs = SAARB_NR_IRQS, .init_irq = pxa95x_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = saarb_init, MACHINE_END diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 01c576963e94..438c7b5e451f 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -984,6 +984,7 @@ MACHINE_START(SPITZ, "SHARP Spitz") .fixup = spitz_fixup, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .init_machine = spitz_init, .timer = &pxa_timer, MACHINE_END @@ -994,6 +995,7 @@ MACHINE_START(BORZOI, "SHARP Borzoi") .fixup = spitz_fixup, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .init_machine = spitz_init, .timer = &pxa_timer, MACHINE_END @@ -1004,6 +1006,7 @@ MACHINE_START(AKITA, "SHARP Akita") .fixup = spitz_fixup, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .init_machine = spitz_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c index cb5611daf5fe..3f8d0af9e2f7 100644 --- a/arch/arm/mach-pxa/stargate2.c +++ b/arch/arm/mach-pxa/stargate2.c @@ -1001,6 +1001,7 @@ static void __init stargate2_init(void) MACHINE_START(INTELMOTE2, "IMOTE 2") .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = imote2_init, .boot_params = 0xA0000100, @@ -1012,6 +1013,7 @@ MACHINE_START(STARGATE2, "Stargate 2") .map_io = pxa27x_map_io, .nr_irqs = STARGATE_NR_IRQS, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = stargate2_init, .boot_params = 0xA0000100, diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c index 53d4a472b699..32fb58e01b10 100644 --- a/arch/arm/mach-pxa/tavorevb.c +++ b/arch/arm/mach-pxa/tavorevb.c @@ -492,6 +492,7 @@ MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)") .boot_params = 0xa0000100, .map_io = pxa3xx_map_io, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = tavorevb_init, MACHINE_END diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c index 79f4422f12f4..fd5a8eae0a87 100644 --- a/arch/arm/mach-pxa/tavorevb3.c +++ b/arch/arm/mach-pxa/tavorevb3.c @@ -129,6 +129,7 @@ MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)") .map_io = pxa3xx_map_io, .nr_irqs = TAVOREVB3_NR_IRQS, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = evb3_init, MACHINE_END diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 5fa145778e7d..9f69a2682693 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -974,6 +974,7 @@ MACHINE_START(TOSA, "SHARP Tosa") .map_io = pxa25x_map_io, .nr_irqs = TOSA_NR_IRQS, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .init_machine = tosa_init, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 687417a93698..c0417508f39d 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c @@ -558,6 +558,7 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") .init_machine = trizeps4_init, .map_io = trizeps4_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, MACHINE_END @@ -567,5 +568,6 @@ MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") .init_machine = trizeps4_init, .map_io = trizeps4_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index 903218eab56d..d4a3dc74e84a 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c @@ -995,6 +995,7 @@ MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC") .boot_params = 0xa0000100, .map_io = viper_map_io, .init_irq = viper_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = viper_init, MACHINE_END diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c index 67bd41488bf8..5f8490ab07cb 100644 --- a/arch/arm/mach-pxa/vpac270.c +++ b/arch/arm/mach-pxa/vpac270.c @@ -719,6 +719,7 @@ MACHINE_START(VPAC270, "Voipac PXA270") .boot_params = 0xa0000100, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = vpac270_init MACHINE_END diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c index 03cfd60a6560..acc600f5e72f 100644 --- a/arch/arm/mach-pxa/xcep.c +++ b/arch/arm/mach-pxa/xcep.c @@ -184,6 +184,7 @@ MACHINE_START(XCEP, "Iskratel XCEP") .init_machine = xcep_init, .map_io = pxa25x_map_io, .init_irq = pxa25x_init_irq, + .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, MACHINE_END diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index fbe9e02e2f9f..e9b38cdc9269 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c @@ -704,6 +704,7 @@ MACHINE_START(ZIPIT2, "Zipit Z2") .boot_params = 0xa0000100, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = z2_init, MACHINE_END diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 973590e8dba7..667e0956a567 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -907,6 +907,7 @@ MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS") .map_io = zeus_map_io, .nr_irqs = ZEUS_NR_IRQS, .init_irq = zeus_init_irq, + .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = zeus_init, MACHINE_END diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 23776fb7cbda..15ec66b3471a 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c @@ -426,6 +426,7 @@ MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") .map_io = pxa3xx_map_io, .nr_irqs = ZYLONITE_NR_IRQS, .init_irq = pxa3xx_init_irq, + .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = zylonite_init, MACHINE_END -- cgit v1.2.3 From 41646b24993590c49d21e6cc0f4378505e1f94a6 Mon Sep 17 00:00:00 2001 From: Vasily Khoruzhick Date: Tue, 15 Mar 2011 22:11:17 +0200 Subject: ARM: pxa/z2: add poweroff function Signed-off-by: Vasily Khoruzhick Signed-off-by: Eric Miao --- arch/arm/mach-pxa/z2.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index e9b38cdc9269..6c9275a20c91 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c @@ -40,6 +40,7 @@ #include #include #include +#include #include "generic.h" #include "devices.h" @@ -677,6 +678,20 @@ static void __init z2_pmic_init(void) static inline void z2_pmic_init(void) {} #endif +#ifdef CONFIG_PM +static void z2_power_off(void) +{ + /* We're using deep sleep as poweroff, so clear PSPR to ensure that + * bootloader will jump to its entry point in resume handler + */ + PSPR = 0x0; + local_irq_disable(); + pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PLAT_PHYS_OFFSET - PAGE_OFFSET); +} +#else +#define z2_power_off NULL +#endif + /****************************************************************************** * Machine init ******************************************************************************/ @@ -698,6 +713,8 @@ static void __init z2_init(void) z2_leds_init(); z2_keys_init(); z2_pmic_init(); + + pm_power_off = z2_power_off; } MACHINE_START(ZIPIT2, "Zipit Z2") -- cgit v1.2.3 From 26407f818e62a88ac9cee64f250ec844fb079862 Mon Sep 17 00:00:00 2001 From: Tanmay Upadhyay Date: Mon, 2 May 2011 11:29:58 +0530 Subject: ARM: pxa168: Add support for UART3 PXA168 has 3 onchip UARTs. Added support for the third one Signed-off-by: Tanmay Upadhyay Signed-off-by: Eric Miao --- arch/arm/mach-mmp/include/mach/pxa168.h | 2 ++ arch/arm/mach-mmp/pxa168.c | 3 +++ 2 files changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h index a52b3d2f325c..705e963574d9 100644 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ b/arch/arm/mach-mmp/include/mach/pxa168.h @@ -17,6 +17,7 @@ extern void pxa168_clear_keypad_wakeup(void); extern struct pxa_device_desc pxa168_device_uart1; extern struct pxa_device_desc pxa168_device_uart2; +extern struct pxa_device_desc pxa168_device_uart3; extern struct pxa_device_desc pxa168_device_twsi0; extern struct pxa_device_desc pxa168_device_twsi1; extern struct pxa_device_desc pxa168_device_pwm1; @@ -39,6 +40,7 @@ static inline int pxa168_add_uart(int id) switch (id) { case 1: d = &pxa168_device_uart1; break; case 2: d = &pxa168_device_uart2; break; + case 3: d = &pxa168_device_uart3; break; } if (d == NULL) diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c index 72b4e7631583..dcb203be55d9 100644 --- a/arch/arm/mach-mmp/pxa168.c +++ b/arch/arm/mach-mmp/pxa168.c @@ -66,6 +66,7 @@ void __init pxa168_init_irq(void) /* APB peripheral clocks */ static APBC_CLK(uart1, PXA168_UART1, 1, 14745600); static APBC_CLK(uart2, PXA168_UART2, 1, 14745600); +static APBC_CLK(uart3, PXA168_UART3, 1, 14745600); static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000); static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000); static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000); @@ -86,6 +87,7 @@ static APMU_CLK(lcd, LCD, 0x7f, 312000000); static struct clk_lookup pxa168_clkregs[] = { INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), + INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL), INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL), INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL), INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL), @@ -149,6 +151,7 @@ void pxa168_clear_keypad_wakeup(void) /* on-chip devices */ PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22); PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24); +PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24); PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28); PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28); PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10); -- cgit v1.2.3 From 80def0dc35886328284dfbde525815643882e730 Mon Sep 17 00:00:00 2001 From: Tanmay Upadhyay Date: Mon, 2 May 2011 11:29:59 +0530 Subject: ARM: pxa168: Add support for Ethernet Add wrapper that creates resources for PXA168 Ethernet driver Signed-off-by: Tanmay Upadhyay Signed-off-by: Eric Miao --- arch/arm/mach-mmp/include/mach/mfp-pxa168.h | 19 +++++++++++++++++++ arch/arm/mach-mmp/include/mach/pxa168.h | 6 ++++++ arch/arm/mach-mmp/include/mach/regs-apmu.h | 1 + arch/arm/mach-mmp/pxa168.c | 3 +++ 4 files changed, 29 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h index 713be155a44d..8c782328b21c 100644 --- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h +++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h @@ -305,4 +305,23 @@ #define GPIO112_KP_MKOUT6 MFP_CFG(GPIO112, AF7) #define GPIO121_KP_MKIN4 MFP_CFG(GPIO121, AF7) +/* Fast Ethernet */ +#define GPIO86_TX_CLK MFP_CFG(GPIO86, AF5) +#define GPIO87_TX_EN MFP_CFG(GPIO87, AF5) +#define GPIO88_TX_DQ3 MFP_CFG(GPIO88, AF5) +#define GPIO89_TX_DQ2 MFP_CFG(GPIO89, AF5) +#define GPIO90_TX_DQ1 MFP_CFG(GPIO90, AF5) +#define GPIO91_TX_DQ0 MFP_CFG(GPIO91, AF5) +#define GPIO92_MII_CRS MFP_CFG(GPIO92, AF5) +#define GPIO93_MII_COL MFP_CFG(GPIO93, AF5) +#define GPIO94_RX_CLK MFP_CFG(GPIO94, AF5) +#define GPIO95_RX_ER MFP_CFG(GPIO95, AF5) +#define GPIO96_RX_DQ3 MFP_CFG(GPIO96, AF5) +#define GPIO97_RX_DQ2 MFP_CFG(GPIO97, AF5) +#define GPIO98_RX_DQ1 MFP_CFG(GPIO98, AF5) +#define GPIO99_RX_DQ0 MFP_CFG(GPIO99, AF5) +#define GPIO100_MII_MDC MFP_CFG(GPIO100, AF5) +#define GPIO101_MII_MDIO MFP_CFG(GPIO101, AF5) +#define GPIO103_RX_DV MFP_CFG(GPIO103, AF5) + #endif /* __ASM_MACH_MFP_PXA168_H */ diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h index 705e963574d9..7f005843a707 100644 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ b/arch/arm/mach-mmp/include/mach/pxa168.h @@ -14,6 +14,7 @@ extern void pxa168_clear_keypad_wakeup(void); #include