From 6fe5aeb5e7e9318bb720b1f582fc86b7ac3118c0 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Mon, 26 Sep 2016 03:03:43 +0300 Subject: ARM: clk: imx31: properly init clocks for machines with DT Clock initialization for i.MX31 powered machines with DT support should be done by a call of an init function registered with CLK_OF_DECLARE() in common clock framework. The change converts exported mx31_clocks_init_dt() into a static initialization function registered by CLK_OF_DECLARE(). Signed-off-by: Vladimir Zapolskiy Acked-by: Stephen Boyd Signed-off-by: Shawn Guo --- drivers/clk/imx/clk-imx31.c | 50 +++++++++++++++++++++++---------------------- 1 file changed, 26 insertions(+), 24 deletions(-) (limited to 'drivers/clk/imx') diff --git a/drivers/clk/imx/clk-imx31.c b/drivers/clk/imx/clk-imx31.c index 6a49ba2b9671..cbce308aad04 100644 --- a/drivers/clk/imx/clk-imx31.c +++ b/drivers/clk/imx/clk-imx31.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -72,14 +73,8 @@ static struct clk ** const uart_clks[] __initconst = { NULL }; -static void __init _mx31_clocks_init(unsigned long fref) +static void __init _mx31_clocks_init(void __iomem *base, unsigned long fref) { - void __iomem *base; - struct device_node *np; - - base = ioremap(MX31_CCM_BASE_ADDR, SZ_4K); - BUG_ON(!base); - clk[dummy] = imx_clk_fixed("dummy", 0); clk[ckih] = imx_clk_fixed("ckih", fref); clk[ckil] = imx_clk_fixed("ckil", 32768); @@ -147,19 +142,17 @@ static void __init _mx31_clocks_init(unsigned long fref) clk_prepare_enable(clk[iim_gate]); mx31_revision(); clk_disable_unprepare(clk[iim_gate]); - - np = of_find_compatible_node(NULL, NULL, "fsl,imx31-ccm"); - - if (np) { - clk_data.clks = clk; - clk_data.clk_num = ARRAY_SIZE(clk); - of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); - } } int __init mx31_clocks_init(unsigned long fref) { - _mx31_clocks_init(fref); + void __iomem *base; + + base = ioremap(MX31_CCM_BASE_ADDR, SZ_4K); + if (!base) + panic("%s: failed to map registers\n", __func__); + + _mx31_clocks_init(base, fref); clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); @@ -222,22 +215,31 @@ int __init mx31_clocks_init(unsigned long fref) return 0; } -int __init mx31_clocks_init_dt(void) +static void __init mx31_clocks_init_dt(struct device_node *np) { - struct device_node *np; + struct device_node *osc_np; u32 fref = 26000000; /* default */ + void __iomem *ccm; - for_each_compatible_node(np, NULL, "fixed-clock") { - if (!of_device_is_compatible(np, "fsl,imx-osc26m")) + for_each_compatible_node(osc_np, NULL, "fixed-clock") { + if (!of_device_is_compatible(osc_np, "fsl,imx-osc26m")) continue; - if (!of_property_read_u32(np, "clock-frequency", &fref)) { - of_node_put(np); + if (!of_property_read_u32(osc_np, "clock-frequency", &fref)) { + of_node_put(osc_np); break; } } - _mx31_clocks_init(fref); + ccm = of_iomap(np, 0); + if (!ccm) + panic("%s: failed to map registers\n", __func__); - return 0; + _mx31_clocks_init(ccm, fref); + + clk_data.clks = clk; + clk_data.clk_num = ARRAY_SIZE(clk); + of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); } + +CLK_OF_DECLARE(imx31_ccm, "fsl,imx31-ccm", mx31_clocks_init_dt); -- cgit v1.2.3