From 3cf467a9969db8297dcf783c5b09b0df8fda863b Mon Sep 17 00:00:00 2001 From: J Keerthy Date: Tue, 23 Jul 2013 12:05:37 +0530 Subject: CLK: TI: DRA7: Add APLL support The patch adds support for DRA7 PCIe APLL. The APLL sources the optional functional clocks for PCIe module. APLL stands for Analog PLL. This is different when comapred with DPLL meaning Digital PLL, the phase detection is done using an analog circuit. Signed-off-by: J Keerthy Signed-off-by: Tero Kristo Acked-by: Tony Lindgren Signed-off-by: Mike Turquette --- drivers/clk/ti/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/clk/ti/Makefile') diff --git a/drivers/clk/ti/Makefile b/drivers/clk/ti/Makefile index 4a8f846740cb..26e994ac3557 100644 --- a/drivers/clk/ti/Makefile +++ b/drivers/clk/ti/Makefile @@ -1,7 +1,7 @@ ifneq ($(CONFIG_OF),) obj-y += clk.o autoidle.o clockdomain.o clk-common = dpll.o composite.o divider.o gate.o \ - fixed-factor.o mux.o + fixed-factor.o mux.o apll.o obj-$(CONFIG_ARCH_OMAP4) += $(clk-common) clk-44xx.o obj-$(CONFIG_SOC_OMAP5) += $(clk-common) clk-54xx.o endif -- cgit v1.2.3