From db8196df4bb6f117caa163aa73b0f16fd62290bd Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Thu, 13 Oct 2011 22:34:23 +0530 Subject: dmaengine: move drivers to dma_transfer_direction fixup usage of dma direction by introducing dma_transfer_direction, this patch moves dma/drivers/* to use new enum Cc: Jassi Brar Cc: Russell King Cc: Viresh Kumar Cc: Linus Walleij Cc: Nicolas Ferre Cc: Mika Westerberg Cc: H Hartley Sweeten Cc: Li Yang Cc: Zhang Wei Cc: Sascha Hauer Cc: Guennadi Liakhovetski Cc: Shawn Guo Cc: Yong Wang Cc: Tomoya MORINAGA Cc: Boojin Kim Cc: Barry Song Acked-by: Mika Westerberg Acked-by: Linus Walleij Acked-by: Viresh Kumar Acked-by: Nicolas Ferre Signed-off-by: Vinod Koul --- drivers/dma/mxs-dma.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers/dma/mxs-dma.c') diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index b4588bdd98bb..bdf4672b2553 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -377,7 +377,7 @@ static void mxs_dma_free_chan_resources(struct dma_chan *chan) static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( struct dma_chan *chan, struct scatterlist *sgl, - unsigned int sg_len, enum dma_data_direction direction, + unsigned int sg_len, enum dma_transfer_direction direction, unsigned long append) { struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan); @@ -450,7 +450,7 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( ccw->bits |= CCW_CHAIN; ccw->bits |= CCW_HALT_ON_TERM; ccw->bits |= CCW_TERM_FLUSH; - ccw->bits |= BF_CCW(direction == DMA_FROM_DEVICE ? + ccw->bits |= BF_CCW(direction == DMA_DEV_TO_MEM ? MXS_DMA_CMD_WRITE : MXS_DMA_CMD_READ, COMMAND); @@ -472,7 +472,7 @@ err_out: static struct dma_async_tx_descriptor *mxs_dma_prep_dma_cyclic( struct dma_chan *chan, dma_addr_t dma_addr, size_t buf_len, - size_t period_len, enum dma_data_direction direction) + size_t period_len, enum dma_transfer_direction direction) { struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan); struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma; @@ -515,7 +515,7 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_dma_cyclic( ccw->bits |= CCW_IRQ; ccw->bits |= CCW_HALT_ON_TERM; ccw->bits |= CCW_TERM_FLUSH; - ccw->bits |= BF_CCW(direction == DMA_FROM_DEVICE ? + ccw->bits |= BF_CCW(direction == DMA_DEV_TO_MEM ? MXS_DMA_CMD_WRITE : MXS_DMA_CMD_READ, COMMAND); dma_addr += period_len; -- cgit v1.2.3 From 400312201b0cf4e4deaf75842f5e95212b382e81 Mon Sep 17 00:00:00 2001 From: Lothar Waßmann Date: Thu, 8 Dec 2011 09:15:41 +0100 Subject: dma: mxs-dma: fix a typo in comment MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Lothar Waßmann Signed-off-by: Vinod Koul --- drivers/dma/mxs-dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/dma/mxs-dma.c') diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index bdf4672b2553..d04662e94467 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -268,7 +268,7 @@ static irqreturn_t mxs_dma_int_handler(int irq, void *dev_id) /* * When both completion and error of termination bits set at the * same time, we do not take it as an error. IOW, it only becomes - * an error we need to handler here in case of ether it's (1) an bus + * an error we need to handle here in case of either it's (1) a bus * error or (2) a termination error with no completion. */ stat2 = ((stat2 >> MXS_DMA_CHANNELS) & stat2) | /* (1) */ -- cgit v1.2.3 From feb397de65c3f76e40ef70e264f2cdf688c850c1 Mon Sep 17 00:00:00 2001 From: Lothar Waßmann Date: Thu, 8 Dec 2011 09:15:42 +0100 Subject: dma: mxs-dma: Always leave mxs_dma_init() with the clock disabled. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There is no need to have the clock enabled all the time the driver is loaded. It will be enabled anyway in mxs_dma_alloc_chan_resources() when a channel is actually going to be used. Signed-off-by: Lothar Waßmann Signed-off-by: Vinod Koul --- drivers/dma/mxs-dma.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'drivers/dma/mxs-dma.c') diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index d04662e94467..b0e6ac3e09aa 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -580,7 +580,7 @@ static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma) ret = clk_enable(mxs_dma->clk); if (ret) - goto err_out; + return ret; ret = mxs_reset_block(mxs_dma->base); if (ret) @@ -604,11 +604,8 @@ static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma) writel(MXS_DMA_CHANNELS_MASK << MXS_DMA_CHANNELS, mxs_dma->base + HW_APBHX_CTRL1 + MXS_SET_ADDR); - clk_disable(mxs_dma->clk); - - return 0; - err_out: + clk_disable(mxs_dma->clk); return ret; } -- cgit v1.2.3 From 6d23ea4b1906f28f5d99ad6aeef7207c48be6bfd Mon Sep 17 00:00:00 2001 From: Lothar Waßmann Date: Thu, 8 Dec 2011 09:15:43 +0100 Subject: dma: mxs-dma: make mxs_dma_prep_slave_sg() multi user safe MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Using a static variable for counting the number of CCWs attached to a DMA channel when appending a new descriptor is not multi user safe. Signed-off-by: Lothar Waßmann Signed-off-by: Vinod Koul --- drivers/dma/mxs-dma.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers/dma/mxs-dma.c') diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index b0e6ac3e09aa..1b4c6be3aacb 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -111,6 +111,7 @@ struct mxs_dma_chan { int chan_irq; struct mxs_dma_ccw *ccw; dma_addr_t ccw_phys; + int desc_count; dma_cookie_t last_completed; enum dma_status status; unsigned int flags; @@ -386,7 +387,7 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( struct scatterlist *sg; int i, j; u32 *pio; - static int idx; + int idx = append ? mxs_chan->desc_count : 0; if (mxs_chan->status == DMA_IN_PROGRESS && !append) return NULL; @@ -462,6 +463,7 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( } } } + mxs_chan->desc_count = idx; return &mxs_chan->desc; @@ -523,6 +525,7 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_dma_cyclic( i++; } + mxs_chan->desc_count = i; return &mxs_chan->desc; -- cgit v1.2.3 From 7ad7a345a4f17c08a1bb9bfdbb62f7793d84aa36 Mon Sep 17 00:00:00 2001 From: Lothar Waßmann Date: Thu, 8 Dec 2011 09:15:44 +0100 Subject: dma: mxs-dma: Don't use CLKGATE bits in CTRL0 to disable DMA channels MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is how the original Freescale code (unintentionally) worked, because the code path which would have asserted the CLKGATE bit was never actually reached in their code. This fixes the nefarious "DMA timout" bug when multiple DMA channels (e.g. GPMI NAND and MMC) are used at the same time. If a better fix for this problem should be found, the clkgate handling could be reinstated. See http://lists.infradead.org/pipermail/linux-arm-kernel/2011-September/065228.html Also reverse the order of mxs_dma_disable_chan() and mxs_dma_reset_chan() in mxs_dma_control() because mxs_dma_reset_chan() can only work when the DMA channel is enabled. Signed-off-by: Lothar Waßmann Signed-off-by: Vinod Koul --- drivers/dma/mxs-dma.c | 29 +---------------------------- 1 file changed, 1 insertion(+), 28 deletions(-) (limited to 'drivers/dma/mxs-dma.c') diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index 1b4c6be3aacb..6548595c26dc 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -44,7 +44,6 @@ #define HW_APBHX_CTRL0 0x000 #define BM_APBH_CTRL0_APB_BURST8_EN (1 << 29) #define BM_APBH_CTRL0_APB_BURST_EN (1 << 28) -#define BP_APBH_CTRL0_CLKGATE_CHANNEL 8 #define BP_APBH_CTRL0_RESET_CHANNEL 16 #define HW_APBHX_CTRL1 0x010 #define HW_APBHX_CTRL2 0x020 @@ -131,23 +130,6 @@ struct mxs_dma_engine { struct mxs_dma_chan mxs_chans[MXS_DMA_CHANNELS]; }; -static inline void mxs_dma_clkgate(struct mxs_dma_chan *mxs_chan, int enable) -{ - struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma; - int chan_id = mxs_chan->chan.chan_id; - int set_clr = enable ? MXS_CLR_ADDR : MXS_SET_ADDR; - - /* enable apbh channel clock */ - if (dma_is_apbh()) { - if (apbh_is_old()) - writel(1 << (chan_id + BP_APBH_CTRL0_CLKGATE_CHANNEL), - mxs_dma->base + HW_APBHX_CTRL0 + set_clr); - else - writel(1 << chan_id, - mxs_dma->base + HW_APBHX_CTRL0 + set_clr); - } -} - static void mxs_dma_reset_chan(struct mxs_dma_chan *mxs_chan) { struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma; @@ -166,9 +148,6 @@ static void mxs_dma_enable_chan(struct mxs_dma_chan *mxs_chan) struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma; int chan_id = mxs_chan->chan.chan_id; - /* clkgate needs to be enabled before writing other registers */ - mxs_dma_clkgate(mxs_chan, 1); - /* set cmd_addr up */ writel(mxs_chan->ccw_phys, mxs_dma->base + HW_APBHX_CHn_NXTCMDAR(chan_id)); @@ -179,9 +158,6 @@ static void mxs_dma_enable_chan(struct mxs_dma_chan *mxs_chan) static void mxs_dma_disable_chan(struct mxs_dma_chan *mxs_chan) { - /* disable apbh channel clock */ - mxs_dma_clkgate(mxs_chan, 0); - mxs_chan->status = DMA_SUCCESS; } @@ -339,10 +315,7 @@ static int mxs_dma_alloc_chan_resources(struct dma_chan *chan) if (ret) goto err_clk; - /* clkgate needs to be enabled for reset to finish */ - mxs_dma_clkgate(mxs_chan, 1); mxs_dma_reset_chan(mxs_chan); - mxs_dma_clkgate(mxs_chan, 0); dma_async_tx_descriptor_init(&mxs_chan->desc, chan); mxs_chan->desc.tx_submit = mxs_dma_tx_submit; @@ -542,8 +515,8 @@ static int mxs_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, switch (cmd) { case DMA_TERMINATE_ALL: - mxs_dma_disable_chan(mxs_chan); mxs_dma_reset_chan(mxs_chan); + mxs_dma_disable_chan(mxs_chan); break; case DMA_PAUSE: mxs_dma_pause_chan(mxs_chan); -- cgit v1.2.3 From 62268ce9170c5466332c046ff6ddafcb67751502 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 13 Dec 2011 23:48:03 +0800 Subject: dmaengine: add DMA_TRANS_NONE to dma_transfer_direction MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Before dma_transfer_direction was introduced to replace dma_data_direction, some dmaengine device uses DMA_NONE of dma_data_direction for some talk with its client drivers. The mxs-dma and its clients mxs-mmc and gpmi-nand are such case. This patch adds DMA_TRANS_NONE to dma_transfer_direction and migrate the DMA_NONE use in mxs-dma to it. It also fixes the compile warning below. CC drivers/dma/mxs-dma.o drivers/dma/mxs-dma.c: In function ‘mxs_dma_prep_slave_sg’: drivers/dma/mxs-dma.c:420:16: warning: comparison between ‘enum dma_transfer_direction’ and ‘enum dma_data_direction’ Signed-off-by: Shawn Guo Signed-off-by: Vinod Koul --- drivers/dma/mxs-dma.c | 2 +- include/linux/dmaengine.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/dma/mxs-dma.c') diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index 6548595c26dc..493af2f6e33a 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -391,7 +391,7 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( idx = 0; } - if (direction == DMA_NONE) { + if (direction == DMA_TRANS_NONE) { ccw = &mxs_chan->ccw[idx++]; pio = (u32 *) sgl; diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 5532bb8b500c..679b349d9b66 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -88,6 +88,7 @@ enum dma_transfer_direction { DMA_MEM_TO_DEV, DMA_DEV_TO_MEM, DMA_DEV_TO_DEV, + DMA_TRANS_NONE, }; /** -- cgit v1.2.3 From 759a2e30d288032130f1f77092e72d4ec87ad4d0 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 20 Dec 2011 13:54:00 +0800 Subject: dma: mxs-dma: convert to clk_prepare/clk_unprepare The patch converts mxs-dma driver to clk_prepare/clk_unprepare by using helper functions clk_prepare_enable/clk_disable_unprepare. Signed-off-by: Shawn Guo Acked-by: Marek Vasut Acked-by: Vinod Koul --- drivers/dma/mxs-dma.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers/dma/mxs-dma.c') diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index b4588bdd98bb..fc903c0ed234 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -334,7 +334,7 @@ static int mxs_dma_alloc_chan_resources(struct dma_chan *chan) goto err_irq; } - ret = clk_enable(mxs_dma->clk); + ret = clk_prepare_enable(mxs_dma->clk); if (ret) goto err_clk; @@ -372,7 +372,7 @@ static void mxs_dma_free_chan_resources(struct dma_chan *chan) dma_free_coherent(mxs_dma->dma_device.dev, PAGE_SIZE, mxs_chan->ccw, mxs_chan->ccw_phys); - clk_disable(mxs_dma->clk); + clk_disable_unprepare(mxs_dma->clk); } static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( @@ -578,7 +578,7 @@ static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma) { int ret; - ret = clk_enable(mxs_dma->clk); + ret = clk_prepare_enable(mxs_dma->clk); if (ret) goto err_out; @@ -604,7 +604,7 @@ static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma) writel(MXS_DMA_CHANNELS_MASK << MXS_DMA_CHANNELS, mxs_dma->base + HW_APBHX_CTRL1 + MXS_SET_ADDR); - clk_disable(mxs_dma->clk); + clk_disable_unprepare(mxs_dma->clk); return 0; -- cgit v1.2.3