From 664695ae6f8b2b72aa5820aa20f4d65016cb3fd0 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Wed, 21 Mar 2012 13:57:40 +1000 Subject: drm/nouveau: inform userspace of new kernel subchannel requirements All available subchannels are now available for userspace to do with as it pleases on NVC0+. On all earlier chipsets, the kernel still uses a software object on subc 0 to implement the page flip completion method. I hope to find some decent way of addressing this too, but it's a tad tricker prior to fermi. Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nouveau_channel.c | 15 ++++----------- 1 file changed, 4 insertions(+), 11 deletions(-) (limited to 'drivers/gpu/drm/nouveau/nouveau_channel.c') diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c index 337e228629ed..44e6416d4a33 100644 --- a/drivers/gpu/drm/nouveau/nouveau_channel.c +++ b/drivers/gpu/drm/nouveau/nouveau_channel.c @@ -436,18 +436,11 @@ nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data, } if (dev_priv->card_type < NV_C0) { - init->subchan[0].handle = NvM2MF; - if (dev_priv->card_type < NV_50) - init->subchan[0].grclass = 0x0039; - else - init->subchan[0].grclass = 0x5039; - init->subchan[1].handle = NvSw; - init->subchan[1].grclass = NV_SW; - init->nr_subchan = 2; - } else { - init->subchan[0].handle = 0x9039; - init->subchan[0].grclass = 0x9039; + init->subchan[0].handle = NvSw; + init->subchan[0].grclass = NV_SW; init->nr_subchan = 1; + } else { + init->nr_subchan = 0; } /* Named memory object area */ -- cgit v1.2.3