From 3cf8bb1ad1b8266ae12a0fbdfa79cdbdc2168a3f Mon Sep 17 00:00:00 2001 From: Jérome Glisse Date: Wed, 16 Mar 2016 12:56:45 +0100 Subject: drm/radeon: fix indentation. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit I hate doing this but it hurts my eyes to go over code that does not comply with indentation rules. Only thing that is not only space change is in atom.c all other files are space indentation issues. Acked-by: Christian König Signed-off-by: Jérôme Glisse Cc: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/r600_cs.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'drivers/gpu/drm/radeon/r600_cs.c') diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 2f36fa1576e0..b69c8de35bd3 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c @@ -1671,8 +1671,8 @@ static int r600_packet3_check(struct radeon_cs_parser *p, } offset = reloc->gpu_offset + - (idx_value & 0xfffffff0) + - ((u64)(tmp & 0xff) << 32); + (idx_value & 0xfffffff0) + + ((u64)(tmp & 0xff) << 32); ib[idx + 0] = offset; ib[idx + 1] = (tmp & 0xffffff00) | (upper_32_bits(offset) & 0xff); @@ -1712,8 +1712,8 @@ static int r600_packet3_check(struct radeon_cs_parser *p, } offset = reloc->gpu_offset + - idx_value + - ((u64)(radeon_get_ib_value(p, idx+1) & 0xff) << 32); + idx_value + + ((u64)(radeon_get_ib_value(p, idx+1) & 0xff) << 32); ib[idx+0] = offset; ib[idx+1] = upper_32_bits(offset) & 0xff; @@ -1764,8 +1764,8 @@ static int r600_packet3_check(struct radeon_cs_parser *p, } offset = reloc->gpu_offset + - (radeon_get_ib_value(p, idx+1) & 0xfffffff0) + - ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); + (radeon_get_ib_value(p, idx+1) & 0xfffffff0) + + ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); ib[idx+1] = (ib[idx+1] & 0x3) | (offset & 0xfffffff0); ib[idx+2] = upper_32_bits(offset) & 0xff; @@ -1876,8 +1876,8 @@ static int r600_packet3_check(struct radeon_cs_parser *p, return -EINVAL; } offset = reloc->gpu_offset + - (radeon_get_ib_value(p, idx+1) & 0xfffffff8) + - ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); + (radeon_get_ib_value(p, idx+1) & 0xfffffff8) + + ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); ib[idx+1] = offset & 0xfffffff8; ib[idx+2] = upper_32_bits(offset) & 0xff; @@ -1898,8 +1898,8 @@ static int r600_packet3_check(struct radeon_cs_parser *p, } offset = reloc->gpu_offset + - (radeon_get_ib_value(p, idx+1) & 0xfffffffc) + - ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); + (radeon_get_ib_value(p, idx+1) & 0xfffffffc) + + ((u64)(radeon_get_ib_value(p, idx+2) & 0xff) << 32); ib[idx+1] = offset & 0xfffffffc; ib[idx+2] = (ib[idx+2] & 0xffffff00) | (upper_32_bits(offset) & 0xff); -- cgit v1.2.3