From 62409933b8d5afc9f09878608f3a38cf1b5467c2 Mon Sep 17 00:00:00 2001 From: Martin Hundebøll Date: Mon, 21 Oct 2019 10:08:38 +0200 Subject: rtc: pcf2127: handle boot-enabled watchdog feature MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Linux should handle when the pcf2127 watchdog feature is enabled by the bootloader. This is done by checking the watchdog timer value during init, and set the WDOG_HW_RUNNING flag if the value differs from zero. Signed-off-by: Martin Hundebøll Acked-by: Guenter Roeck Link: https://lore.kernel.org/r/20191021080838.2789-1-martin@geanix.com Signed-off-by: Alexandre Belloni --- drivers/rtc/rtc-pcf2127.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'drivers/rtc') diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c index 02b069caffd5..ba5baaca47be 100644 --- a/drivers/rtc/rtc-pcf2127.c +++ b/drivers/rtc/rtc-pcf2127.c @@ -417,6 +417,7 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap, const char *name, bool has_nvmem) { struct pcf2127 *pcf2127; + u32 wdd_timeout; int ret = 0; dev_dbg(dev, "%s\n", __func__); @@ -459,7 +460,6 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap, /* * Watchdog timer enabled and reset pin /RST activated when timed out. * Select 1Hz clock source for watchdog timer. - * Timer is not started until WD_VAL is loaded with a valid value. * Note: Countdown timer disabled and not available. */ ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_WD_CTL, @@ -475,6 +475,14 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap, return ret; } + /* Test if watchdog timer is started by bootloader */ + ret = regmap_read(pcf2127->regmap, PCF2127_REG_WD_VAL, &wdd_timeout); + if (ret) + return ret; + + if (wdd_timeout) + set_bit(WDOG_HW_RUNNING, &pcf2127->wdd.status); + #ifdef CONFIG_WATCHDOG ret = devm_watchdog_register_device(dev, &pcf2127->wdd); if (ret) -- cgit v1.2.3