From c530cd1d9d5e7741c641c5c366ddb4e23aa5caec Mon Sep 17 00:00:00 2001 From: Ludovic Barre Date: Fri, 5 Oct 2018 09:43:03 +0200 Subject: spi: spi-mem: add stm32 qspi controller The qspi controller is a specialized communication interface targeting single, dual or quad SPI Flash memories (NOR/NAND). It can operate in any of the following modes: -indirect mode: all the operations are performed using the quadspi registers -read memory-mapped mode: the external Flash memory is mapped to the microcontroller address space and is seen by the system as if it was an internal memory tested on: -NOR: mx66l51235l -NAND: MT29F2G01ABAGD Signed-off-by: Ludovic Barre Signed-off-by: Mark Brown --- drivers/spi/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/spi/Makefile') diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 7e7df53fc73a..df04dfbe7d70 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -94,6 +94,7 @@ obj-$(CONFIG_SPI_SLAVE_MT27XX) += spi-slave-mt27xx.o obj-$(CONFIG_SPI_SPRD) += spi-sprd.o obj-$(CONFIG_SPI_SPRD_ADI) += spi-sprd-adi.o obj-$(CONFIG_SPI_STM32) += spi-stm32.o +obj-$(CONFIG_SPI_STM32_QSPI) += spi-stm32-qspi.o obj-$(CONFIG_SPI_ST_SSC4) += spi-st-ssc4.o obj-$(CONFIG_SPI_SUN4I) += spi-sun4i.o obj-$(CONFIG_SPI_SUN6I) += spi-sun6i.o -- cgit v1.2.3