From 7df5081cbf5e1c342acd30850a483ef504519937 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 25 Jul 2020 16:49:47 +0200 Subject: serial: stm32: Add RS485 RTS GPIO control While the STM32 does support RS485 drive-enable control within the UART IP itself, some systems have the drive-enable line connected to a pin which cannot be pinmuxed as RTS. Add support for toggling the RTS GPIO line using the modem control GPIOs to provide at least some sort of emulation. Signed-off-by: Marek Vasut Cc: Alexandre Torgue Cc: Andy Shevchenko Cc: Manivannan Sadhasivam Cc: Fabrice Gasnier Cc: Greg Kroah-Hartman Cc: linux-stm32@st-md-mailman.stormreply.com Link: https://lore.kernel.org/r/20200725144947.537007-1-marex@denx.de Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/stm32-usart.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/tty') diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index d1c5e536a167..143300a80090 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -129,9 +129,13 @@ static int stm32_config_rs485(struct uart_port *port, if (rs485conf->flags & SER_RS485_RTS_ON_SEND) { cr3 &= ~USART_CR3_DEP; rs485conf->flags &= ~SER_RS485_RTS_AFTER_SEND; + mctrl_gpio_set(stm32_port->gpios, + stm32_port->port.mctrl & ~TIOCM_RTS); } else { cr3 |= USART_CR3_DEP; rs485conf->flags |= SER_RS485_RTS_AFTER_SEND; + mctrl_gpio_set(stm32_port->gpios, + stm32_port->port.mctrl | TIOCM_RTS); } writel_relaxed(cr3, port->membase + ofs->cr3); @@ -847,9 +851,13 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, if (rs485conf->flags & SER_RS485_RTS_ON_SEND) { cr3 &= ~USART_CR3_DEP; rs485conf->flags &= ~SER_RS485_RTS_AFTER_SEND; + mctrl_gpio_set(stm32_port->gpios, + stm32_port->port.mctrl & ~TIOCM_RTS); } else { cr3 |= USART_CR3_DEP; rs485conf->flags |= SER_RS485_RTS_AFTER_SEND; + mctrl_gpio_set(stm32_port->gpios, + stm32_port->port.mctrl | TIOCM_RTS); } } else { -- cgit v1.2.3