From c8aac01b7bd1109795586db11ea7f12ab1e2d163 Mon Sep 17 00:00:00 2001 From: Senthilvadivu Guruswamy Date: Mon, 24 Jan 2011 06:22:02 +0000 Subject: OMAP2, 3: DSS2: DSI: create platform_driver, move init, exit to driver Hwmod adaptation design requires each of the DSS HW IP to be a platform driver. So a platform_driver for DSI is created and init exit methods are moved from core.c to its driver probe,remove. pdev member has to be maintained by its own drivers. Also, vdds_dsi regulator handling is copied to dsi.c, since vdds_dsi regulator is needed by dpi_init() too. Board files are updated accordingly to add 2 instances of vdds_dsi regulator. DSI platform driver is registered from inside omap_dss_probe, in the order desired. Signed-off-by: Senthilvadivu Guruswamy Signed-off-by: Sumit Semwal Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dsi.c | 64 +++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 61 insertions(+), 3 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index ddf3a0560822..fa85f1adba2a 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -222,6 +222,7 @@ struct dsi_irq_stats { static struct { + struct platform_device *pdev; void __iomem *base; struct dsi_clock_info current_cinfo; @@ -292,6 +293,20 @@ static inline u32 dsi_read_reg(const struct dsi_reg idx) return __raw_readl(dsi.base + idx.idx); } +static struct regulator *dsi_get_vdds_dsi(void) +{ + struct regulator *reg; + + if (dsi.vdds_dsi_reg != NULL) + return dsi.vdds_dsi_reg; + + reg = regulator_get(&dsi.pdev->dev, "vdds_dsi"); + if (!IS_ERR(reg)) + dsi.vdds_dsi_reg = reg; + + return reg; +} + void dsi_save_context(void) { @@ -3238,7 +3253,7 @@ void dsi_wait_dsi2_pll_active(void) DSSERR("DSI2 PLL clock not active\n"); } -int dsi_init(struct platform_device *pdev) +static int dsi_init(struct platform_device *pdev) { u32 rev; int r; @@ -3275,7 +3290,7 @@ int dsi_init(struct platform_device *pdev) goto err1; } - dsi.vdds_dsi_reg = dss_get_vdds_dsi(); + dsi.vdds_dsi_reg = dsi_get_vdds_dsi(); if (IS_ERR(dsi.vdds_dsi_reg)) { DSSERR("can't get VDDS_DSI regulator\n"); r = PTR_ERR(dsi.vdds_dsi_reg); @@ -3298,8 +3313,13 @@ err1: return r; } -void dsi_exit(void) +static void dsi_exit(void) { + if (dsi.vdds_dsi_reg != NULL) { + regulator_put(dsi.vdds_dsi_reg); + dsi.vdds_dsi_reg = NULL; + } + iounmap(dsi.base); destroy_workqueue(dsi.workqueue); @@ -3307,3 +3327,41 @@ void dsi_exit(void) DSSDBG("omap_dsi_exit\n"); } +/* DSI1 HW IP initialisation */ +static int omap_dsi1hw_probe(struct platform_device *pdev) +{ + int r; + dsi.pdev = pdev; + r = dsi_init(pdev); + if (r) { + DSSERR("Failed to initialize DSI\n"); + goto err_dsi; + } +err_dsi: + return r; +} + +static int omap_dsi1hw_remove(struct platform_device *pdev) +{ + dsi_exit(); + return 0; +} + +static struct platform_driver omap_dsi1hw_driver = { + .probe = omap_dsi1hw_probe, + .remove = omap_dsi1hw_remove, + .driver = { + .name = "omapdss_dsi1", + .owner = THIS_MODULE, + }, +}; + +int dsi_init_platform_driver(void) +{ + return platform_driver_register(&omap_dsi1hw_driver); +} + +void dsi_uninit_platform_driver(void) +{ + return platform_driver_unregister(&omap_dsi1hw_driver); +} -- cgit v1.2.3 From a06b62f8004bd95c132fa312e8593c9a10f466ec Mon Sep 17 00:00:00 2001 From: Sumit Semwal Date: Mon, 24 Jan 2011 06:22:03 +0000 Subject: OMAP2,3: DSS2: replace printk with dev_dbg in init This patch replaces printk's in the init/probe functions to dev_dbg for boot time optimization. Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Signed-off-by: Sumit Semwal Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dispc.c | 2 +- drivers/video/omap2/dss/dsi.c | 2 +- drivers/video/omap2/dss/rfbi.c | 2 +- drivers/video/omap2/dss/venc.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 28ad68b6be48..032e5dd19e09 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -3350,7 +3350,7 @@ static int omap_dispchw_probe(struct platform_device *pdev) dispc_save_context(); rev = dispc_read_reg(DISPC_REVISION); - printk(KERN_INFO "OMAP DISPC rev %d.%d\n", + dev_dbg(&pdev->dev, "OMAP DISPC rev %d.%d\n", FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); enable_clocks(0); diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index fa85f1adba2a..df246033b940 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -3300,7 +3300,7 @@ static int dsi_init(struct platform_device *pdev) enable_clocks(1); rev = dsi_read_reg(DSI_REVISION); - printk(KERN_INFO "OMAP DSI rev %d.%d\n", + dev_dbg(&pdev->dev, "OMAP DSI rev %d.%d\n", FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); enable_clocks(0); diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c index 153f963e8e89..5f186484984f 100644 --- a/drivers/video/omap2/dss/rfbi.c +++ b/drivers/video/omap2/dss/rfbi.c @@ -1046,7 +1046,7 @@ static int omap_rfbihw_probe(struct platform_device *pdev) rfbi_write_reg(RFBI_SYSCONFIG, l); rev = rfbi_read_reg(RFBI_REVISION); - printk(KERN_INFO "OMAP RFBI rev %d.%d\n", + dev_dbg(&pdev->dev, "OMAP RFBI rev %d.%d\n", FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); rfbi_enable_clocks(0); diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c index 765a4ac44ecd..4a02f8eeb0d8 100644 --- a/drivers/video/omap2/dss/venc.c +++ b/drivers/video/omap2/dss/venc.c @@ -739,7 +739,7 @@ static int omap_venchw_probe(struct platform_device *pdev) venc_enable_clocks(1); rev_id = (u8)(venc_read_reg(VENC_REV_ID) & 0xff); - printk(KERN_INFO "OMAP VENC rev %d\n", rev_id); + dev_dbg(&pdev->dev, "OMAP VENC rev %d\n", rev_id); venc_enable_clocks(0); -- cgit v1.2.3 From ea9da36a304eed585fc5ef89c0f1c460eca61b48 Mon Sep 17 00:00:00 2001 From: Senthilvadivu Guruswamy Date: Mon, 24 Jan 2011 06:22:04 +0000 Subject: OMAP2,3: DSS2: Use platform device to get baseaddr DSS, DISPC, DSI, RFBI, VENC baseaddr can be obtained from platform_get_resource(). This API in turn picks the right silicon baseaddr from the hwmod database. So hardcoding of base addr could be removed. Reviewed-by: Paul Walmsley Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Signed-off-by: Sumit Semwal Signed-off-by: Senthilvadivu Guruswamy Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dispc.c | 11 ++++++++--- drivers/video/omap2/dss/dsi.c | 11 ++++++++--- drivers/video/omap2/dss/dss.c | 11 ++++++++--- drivers/video/omap2/dss/rfbi.c | 10 +++++++--- drivers/video/omap2/dss/venc.c | 11 ++++++++--- 5 files changed, 39 insertions(+), 15 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 032e5dd19e09..96e37f8e75dc 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -42,8 +42,6 @@ #include "dss_features.h" /* DISPC */ -#define DISPC_BASE 0x48050400 - #define DISPC_SZ_REGS SZ_4K struct dispc_reg { u16 idx; }; @@ -3324,6 +3322,8 @@ int dispc_setup_plane(enum omap_plane plane, static int omap_dispchw_probe(struct platform_device *pdev) { u32 rev; + struct resource *dispc_mem; + dispc.pdev = pdev; spin_lock_init(&dispc.irq_lock); @@ -3335,7 +3335,12 @@ static int omap_dispchw_probe(struct platform_device *pdev) INIT_WORK(&dispc.error_work, dispc_error_worker); - dispc.base = ioremap(DISPC_BASE, DISPC_SZ_REGS); + dispc_mem = platform_get_resource(dispc.pdev, IORESOURCE_MEM, 0); + if (!dispc_mem) { + DSSERR("can't get IORESOURCE_MEM DISPC\n"); + return -EINVAL; + } + dispc.base = ioremap(dispc_mem->start, resource_size(dispc_mem)); if (!dispc.base) { DSSERR("can't ioremap DISPC\n"); return -ENOMEM; diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index df246033b940..c42acae10af0 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -42,8 +42,6 @@ /*#define VERBOSE_IRQ*/ #define DSI_CATCH_MISSING_TE -#define DSI_BASE 0x4804FC00 - struct dsi_reg { u16 idx; }; #define DSI_REG(idx) ((const struct dsi_reg) { idx }) @@ -3257,6 +3255,7 @@ static int dsi_init(struct platform_device *pdev) { u32 rev; int r; + struct resource *dsi_mem; spin_lock_init(&dsi.errors_lock); dsi.errors = 0; @@ -3283,7 +3282,13 @@ static int dsi_init(struct platform_device *pdev) dsi.te_timer.function = dsi_te_timeout; dsi.te_timer.data = 0; #endif - dsi.base = ioremap(DSI_BASE, DSI_SZ_REGS); + dsi_mem = platform_get_resource(dsi.pdev, IORESOURCE_MEM, 0); + if (!dsi_mem) { + DSSERR("can't get IORESOURCE_MEM DSI\n"); + r = -EINVAL; + goto err1; + } + dsi.base = ioremap(dsi_mem->start, resource_size(dsi_mem)); if (!dsi.base) { DSSERR("can't ioremap DSI\n"); r = -ENOMEM; diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 72b395d69aae..ee9ce4af58b5 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -34,8 +34,6 @@ #include #include "dss.h" -#define DSS_BASE 0x48050000 - #define DSS_SZ_REGS SZ_512 struct dss_reg { @@ -567,8 +565,15 @@ static int dss_init(bool skip_init) { int r; u32 rev; + struct resource *dss_mem; - dss.base = ioremap(DSS_BASE, DSS_SZ_REGS); + dss_mem = platform_get_resource(dss.pdev, IORESOURCE_MEM, 0); + if (!dss_mem) { + DSSERR("can't get IORESOURCE_MEM DSS\n"); + r = -EINVAL; + goto fail0; + } + dss.base = ioremap(dss_mem->start, resource_size(dss_mem)); if (!dss.base) { DSSERR("can't ioremap DSS\n"); r = -ENOMEM; diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c index 5f186484984f..6dbb95d557f8 100644 --- a/drivers/video/omap2/dss/rfbi.c +++ b/drivers/video/omap2/dss/rfbi.c @@ -36,8 +36,6 @@ #include #include "dss.h" -#define RFBI_BASE 0x48050800 - struct rfbi_reg { u16 idx; }; #define RFBI_REG(idx) ((const struct rfbi_reg) { idx }) @@ -1019,6 +1017,7 @@ static int omap_rfbihw_probe(struct platform_device *pdev) { u32 rev; u32 l; + struct resource *rfbi_mem; rfbi.pdev = pdev; @@ -1028,7 +1027,12 @@ static int omap_rfbihw_probe(struct platform_device *pdev) atomic_set(&rfbi.cmd_fifo_full, 0); atomic_set(&rfbi.cmd_pending, 0); - rfbi.base = ioremap(RFBI_BASE, SZ_256); + rfbi_mem = platform_get_resource(rfbi.pdev, IORESOURCE_MEM, 0); + if (!rfbi_mem) { + DSSERR("can't get IORESOURCE_MEM RFBI\n"); + return -EINVAL; + } + rfbi.base = ioremap(rfbi_mem->start, resource_size(rfbi_mem)); if (!rfbi.base) { DSSERR("can't ioremap RFBI\n"); return -ENOMEM; diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c index 4a02f8eeb0d8..ef36811f6ac8 100644 --- a/drivers/video/omap2/dss/venc.c +++ b/drivers/video/omap2/dss/venc.c @@ -39,8 +39,6 @@ #include "dss.h" -#define VENC_BASE 0x48050C00 - /* Venc registers */ #define VENC_REV_ID 0x00 #define VENC_STATUS 0x04 @@ -717,13 +715,20 @@ void venc_dump_regs(struct seq_file *s) static int omap_venchw_probe(struct platform_device *pdev) { u8 rev_id; + struct resource *venc_mem; + venc.pdev = pdev; mutex_init(&venc.venc_lock); venc.wss_data = 0; - venc.base = ioremap(VENC_BASE, SZ_1K); + venc_mem = platform_get_resource(venc.pdev, IORESOURCE_MEM, 0); + if (!venc_mem) { + DSSERR("can't get IORESOURCE_MEM VENC\n"); + return -EINVAL; + } + venc.base = ioremap(venc_mem->start, resource_size(venc_mem)); if (!venc.base) { DSSERR("can't ioremap VENC\n"); return -ENOMEM; -- cgit v1.2.3 From 6af9cd1431db952a7f9f8931497c9989a48b07df Mon Sep 17 00:00:00 2001 From: Archit Taneja Date: Mon, 31 Jan 2011 16:27:44 +0000 Subject: OMAP2PLUS: DSS2: Generalize naming of PRCM related clock enums in DSS driver enum dss_clock structure is replaced with generic names that could be used across OMAP2420, 2430, 3xxx, 44xx platforms. Signed-off-by: Sumit Semwal Signed-off-by: Archit Taneja Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/core.c | 4 +-- drivers/video/omap2/dss/dispc.c | 10 +++---- drivers/video/omap2/dss/dpi.c | 16 +++++----- drivers/video/omap2/dss/dsi.c | 18 ++++++------ drivers/video/omap2/dss/dss.c | 62 +++++++++++++++++++-------------------- drivers/video/omap2/dss/dss.h | 10 +++---- drivers/video/omap2/dss/manager.c | 4 +-- drivers/video/omap2/dss/overlay.c | 4 +-- drivers/video/omap2/dss/rfbi.c | 10 +++---- drivers/video/omap2/dss/sdi.c | 8 ++--- drivers/video/omap2/dss/venc.c | 8 ++--- 11 files changed, 77 insertions(+), 77 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/core.c b/drivers/video/omap2/dss/core.c index 3f7a5fcd1142..f56ee64f5b58 100644 --- a/drivers/video/omap2/dss/core.c +++ b/drivers/video/omap2/dss/core.c @@ -184,7 +184,7 @@ static int omap_dss_probe(struct platform_device *pdev) } /* keep clocks enabled to prevent context saves/restores during init */ - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); r = rfbi_init_platform_driver(); if (r) { @@ -251,7 +251,7 @@ static int omap_dss_probe(struct platform_device *pdev) pdata->default_device = dssdev; } - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); return 0; diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 96e37f8e75dc..dc4518c4b0e4 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -551,9 +551,9 @@ void dispc_restore_context(void) static inline void enable_clocks(bool enable) { if (enable) - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); else - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); } bool dispc_go_busy(enum omap_channel channel) @@ -2311,7 +2311,7 @@ unsigned long dispc_fclk_rate(void) unsigned long r = 0; if (dss_get_dispc_clk_source() == DSS_SRC_DSS1_ALWON_FCLK) - r = dss_clk_get_rate(DSS_CLK_FCK1); + r = dss_clk_get_rate(DSS_CLK_FCK); else #ifdef CONFIG_OMAP2_DSS_DSI r = dsi_get_dsi1_pll_rate(); @@ -2439,7 +2439,7 @@ void dispc_dump_regs(struct seq_file *s) { #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dispc_read_reg(r)) - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); DUMPREG(DISPC_REVISION); DUMPREG(DISPC_SYSCONFIG); @@ -2596,7 +2596,7 @@ void dispc_dump_regs(struct seq_file *s) DUMPREG(DISPC_VID_PRELOAD(0)); DUMPREG(DISPC_VID_PRELOAD(1)); - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); #undef DUMPREG } diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c index 75fb0a515430..746f1b6dd897 100644 --- a/drivers/video/omap2/dss/dpi.c +++ b/drivers/video/omap2/dss/dpi.c @@ -107,7 +107,7 @@ static int dpi_set_mode(struct omap_dss_device *dssdev) bool is_tft; int r = 0; - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); dispc_set_pol_freq(dssdev->manager->id, dssdev->panel.config, dssdev->panel.acbi, dssdev->panel.acb); @@ -137,7 +137,7 @@ static int dpi_set_mode(struct omap_dss_device *dssdev) dispc_set_lcd_timings(dssdev->manager->id, t); err0: - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); return r; } @@ -173,14 +173,14 @@ int omapdss_dpi_display_enable(struct omap_dss_device *dssdev) goto err1; } - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); r = dpi_basic_init(dssdev); if (r) goto err2; #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL - dss_clk_enable(DSS_CLK_FCK2); + dss_clk_enable(DSS_CLK_SYSCK); r = dsi_pll_init(dssdev, 0, 1); if (r) goto err3; @@ -199,10 +199,10 @@ err4: #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL dsi_pll_uninit(); err3: - dss_clk_disable(DSS_CLK_FCK2); + dss_clk_disable(DSS_CLK_SYSCK); #endif err2: - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); if (cpu_is_omap34xx()) regulator_disable(dpi.vdds_dsi_reg); err1: @@ -219,10 +219,10 @@ void omapdss_dpi_display_disable(struct omap_dss_device *dssdev) #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL dss_select_dispc_clk_source(DSS_SRC_DSS1_ALWON_FCLK); dsi_pll_uninit(); - dss_clk_disable(DSS_CLK_FCK2); + dss_clk_disable(DSS_CLK_SYSCK); #endif - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); if (cpu_is_omap34xx()) regulator_disable(dpi.vdds_dsi_reg); diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index c42acae10af0..c7b5382e1a6b 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -654,18 +654,18 @@ static void dsi_vc_disable_bta_irq(int channel) static inline void enable_clocks(bool enable) { if (enable) - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); else - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); } /* source clock for DSI PLL. this could also be PCLKFREE */ static inline void dsi_enable_pll_clock(bool enable) { if (enable) - dss_clk_enable(DSS_CLK_FCK2); + dss_clk_enable(DSS_CLK_SYSCK); else - dss_clk_disable(DSS_CLK_FCK2); + dss_clk_disable(DSS_CLK_SYSCK); if (enable && dsi.pll_locked) { if (wait_for_bit_change(DSI_PLL_STATUS, 1, 1) != 1) @@ -741,7 +741,7 @@ static unsigned long dsi_fclk_rate(void) if (dss_get_dsi_clk_source() == DSS_SRC_DSS1_ALWON_FCLK) { /* DSI FCLK source is DSS1_ALWON_FCK, which is dss1_fck */ - r = dss_clk_get_rate(DSS_CLK_FCK1); + r = dss_clk_get_rate(DSS_CLK_FCK); } else { /* DSI FCLK source is DSI2_PLL_FCLK */ r = dsi_get_dsi2_pll_rate(); @@ -821,7 +821,7 @@ static int dsi_calc_clock_rates(struct omap_dss_device *dssdev, return -EINVAL; if (cinfo->use_dss2_fck) { - cinfo->clkin = dss_clk_get_rate(DSS_CLK_FCK2); + cinfo->clkin = dss_clk_get_rate(DSS_CLK_SYSCK); /* XXX it is unclear if highfreq should be used * with DSS2_FCK source also */ cinfo->highfreq = 0; @@ -867,7 +867,7 @@ int dsi_pll_calc_clock_div_pck(bool is_tft, unsigned long req_pck, int match = 0; unsigned long dss_clk_fck2; - dss_clk_fck2 = dss_clk_get_rate(DSS_CLK_FCK2); + dss_clk_fck2 = dss_clk_get_rate(DSS_CLK_SYSCK); if (req_pck == dsi.cache_req_pck && dsi.cache_cinfo.clkin == dss_clk_fck2) { @@ -1319,7 +1319,7 @@ void dsi_dump_regs(struct seq_file *s) { #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(r)) - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); DUMPREG(DSI_REVISION); DUMPREG(DSI_SYSCONFIG); @@ -1391,7 +1391,7 @@ void dsi_dump_regs(struct seq_file *s) DUMPREG(DSI_PLL_CONFIGURATION1); DUMPREG(DSI_PLL_CONFIGURATION2); - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); #undef DUMPREG } diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 56d37bfefd4d..0372befbb692 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -227,7 +227,7 @@ void dss_dump_clocks(struct seq_file *s) unsigned long dpll4_ck_rate; unsigned long dpll4_m4_ck_rate; - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); dpll4_ck_rate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); dpll4_m4_ck_rate = clk_get_rate(dss.dpll4_m4_ck); @@ -240,21 +240,21 @@ void dss_dump_clocks(struct seq_file *s) seq_printf(s, "dss1_alwon_fclk = %lu / %lu = %lu\n", dpll4_ck_rate, dpll4_ck_rate / dpll4_m4_ck_rate, - dss_clk_get_rate(DSS_CLK_FCK1)); + dss_clk_get_rate(DSS_CLK_FCK)); else seq_printf(s, "dss1_alwon_fclk = %lu / %lu * 2 = %lu\n", dpll4_ck_rate, dpll4_ck_rate / dpll4_m4_ck_rate, - dss_clk_get_rate(DSS_CLK_FCK1)); + dss_clk_get_rate(DSS_CLK_FCK)); - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); } void dss_dump_regs(struct seq_file *s) { #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dss_read_reg(r)) - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); DUMPREG(DSS_REVISION); DUMPREG(DSS_SYSCONFIG); @@ -265,7 +265,7 @@ void dss_dump_regs(struct seq_file *s) DUMPREG(DSS_PLL_CONTROL); DUMPREG(DSS_SDI_STATUS); - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); #undef DUMPREG } @@ -350,7 +350,7 @@ int dss_set_clock_div(struct dss_clock_info *cinfo) int dss_get_clock_div(struct dss_clock_info *cinfo) { - cinfo->fck = dss_clk_get_rate(DSS_CLK_FCK1); + cinfo->fck = dss_clk_get_rate(DSS_CLK_FCK); if (cpu_is_omap34xx()) { unsigned long prate; @@ -391,7 +391,7 @@ int dss_calc_clock_div(bool is_tft, unsigned long req_pck, prate = dss_get_dpll4_rate(); - fck = dss_clk_get_rate(DSS_CLK_FCK1); + fck = dss_clk_get_rate(DSS_CLK_FCK); if (req_pck == dss.cache_req_pck && ((cpu_is_omap34xx() && prate == dss.cache_prate) || dss.cache_dss_cinfo.fck == fck)) { @@ -418,7 +418,7 @@ retry: if (cpu_is_omap24xx()) { struct dispc_clock_info cur_dispc; /* XXX can we change the clock on omap2? */ - fck = dss_clk_get_rate(DSS_CLK_FCK1); + fck = dss_clk_get_rate(DSS_CLK_FCK); fck_div = 1; dispc_find_clk_divs(is_tft, req_pck, fck, &cur_dispc); @@ -701,7 +701,7 @@ static void save_all_ctx(void) { DSSDBG("save context\n"); - dss_clk_enable_no_ctx(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable_no_ctx(DSS_CLK_ICK | DSS_CLK_FCK); dss_save_context(); dispc_save_context(); @@ -709,7 +709,7 @@ static void save_all_ctx(void) dsi_save_context(); #endif - dss_clk_disable_no_ctx(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable_no_ctx(DSS_CLK_ICK | DSS_CLK_FCK); } static void restore_all_ctx(void) @@ -807,13 +807,13 @@ unsigned long dss_clk_get_rate(enum dss_clock clk) switch (clk) { case DSS_CLK_ICK: return clk_get_rate(dss.dss_ick); - case DSS_CLK_FCK1: + case DSS_CLK_FCK: return clk_get_rate(dss.dss1_fck); - case DSS_CLK_FCK2: + case DSS_CLK_SYSCK: return clk_get_rate(dss.dss2_fck); - case DSS_CLK_54M: + case DSS_CLK_TVFCK: return clk_get_rate(dss.dss_54m_fck); - case DSS_CLK_96M: + case DSS_CLK_VIDFCK: return clk_get_rate(dss.dss_96m_fck); } @@ -827,13 +827,13 @@ static unsigned count_clk_bits(enum dss_clock clks) if (clks & DSS_CLK_ICK) ++num_clks; - if (clks & DSS_CLK_FCK1) + if (clks & DSS_CLK_FCK) ++num_clks; - if (clks & DSS_CLK_FCK2) + if (clks & DSS_CLK_SYSCK) ++num_clks; - if (clks & DSS_CLK_54M) + if (clks & DSS_CLK_TVFCK) ++num_clks; - if (clks & DSS_CLK_96M) + if (clks & DSS_CLK_VIDFCK) ++num_clks; return num_clks; @@ -845,13 +845,13 @@ static void dss_clk_enable_no_ctx(enum dss_clock clks) if (clks & DSS_CLK_ICK) clk_enable(dss.dss_ick); - if (clks & DSS_CLK_FCK1) + if (clks & DSS_CLK_FCK) clk_enable(dss.dss1_fck); - if (clks & DSS_CLK_FCK2) + if (clks & DSS_CLK_SYSCK) clk_enable(dss.dss2_fck); - if (clks & DSS_CLK_54M) + if (clks & DSS_CLK_TVFCK) clk_enable(dss.dss_54m_fck); - if (clks & DSS_CLK_96M) + if (clks & DSS_CLK_VIDFCK) clk_enable(dss.dss_96m_fck); dss.num_clks_enabled += num_clks; @@ -873,13 +873,13 @@ static void dss_clk_disable_no_ctx(enum dss_clock clks) if (clks & DSS_CLK_ICK) clk_disable(dss.dss_ick); - if (clks & DSS_CLK_FCK1) + if (clks & DSS_CLK_FCK) clk_disable(dss.dss1_fck); - if (clks & DSS_CLK_FCK2) + if (clks & DSS_CLK_SYSCK) clk_disable(dss.dss2_fck); - if (clks & DSS_CLK_54M) + if (clks & DSS_CLK_TVFCK) clk_disable(dss.dss_54m_fck); - if (clks & DSS_CLK_96M) + if (clks & DSS_CLK_VIDFCK) clk_disable(dss.dss_96m_fck); dss.num_clks_enabled -= num_clks; @@ -903,9 +903,9 @@ static void dss_clk_enable_all_no_ctx(void) { enum dss_clock clks; - clks = DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_FCK2 | DSS_CLK_54M; + clks = DSS_CLK_ICK | DSS_CLK_FCK | DSS_CLK_SYSCK | DSS_CLK_TVFCK; if (cpu_is_omap34xx()) - clks |= DSS_CLK_96M; + clks |= DSS_CLK_VIDFCK; dss_clk_enable_no_ctx(clks); } @@ -913,9 +913,9 @@ static void dss_clk_disable_all_no_ctx(void) { enum dss_clock clks; - clks = DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_FCK2 | DSS_CLK_54M; + clks = DSS_CLK_ICK | DSS_CLK_FCK | DSS_CLK_SYSCK | DSS_CLK_TVFCK; if (cpu_is_omap34xx()) - clks |= DSS_CLK_96M; + clks |= DSS_CLK_VIDFCK; dss_clk_disable_no_ctx(clks); } diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h index 981d247c30f2..4b02e079f20e 100644 --- a/drivers/video/omap2/dss/dss.h +++ b/drivers/video/omap2/dss/dss.h @@ -112,11 +112,11 @@ enum omap_parallel_interface_mode { }; enum dss_clock { - DSS_CLK_ICK = 1 << 0, - DSS_CLK_FCK1 = 1 << 1, - DSS_CLK_FCK2 = 1 << 2, - DSS_CLK_54M = 1 << 3, - DSS_CLK_96M = 1 << 4, + DSS_CLK_ICK = 1 << 0, /* DSS_L3_ICLK and DSS_L4_ICLK */ + DSS_CLK_FCK = 1 << 1, /* DSS1_ALWON_FCLK */ + DSS_CLK_SYSCK = 1 << 2, /* DSS2_ALWON_FCLK */ + DSS_CLK_TVFCK = 1 << 3, /* DSS_TV_FCLK */ + DSS_CLK_VIDFCK = 1 << 4, /* DSS_96M_FCLK*/ }; enum dss_clk_source { diff --git a/drivers/video/omap2/dss/manager.c b/drivers/video/omap2/dss/manager.c index 172d4e697309..1f53bf20b6cb 100644 --- a/drivers/video/omap2/dss/manager.c +++ b/drivers/video/omap2/dss/manager.c @@ -1394,7 +1394,7 @@ static int omap_dss_mgr_apply(struct omap_overlay_manager *mgr) } r = 0; - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); if (!dss_cache.irq_enabled) { u32 mask; @@ -1407,7 +1407,7 @@ static int omap_dss_mgr_apply(struct omap_overlay_manager *mgr) dss_cache.irq_enabled = true; } configure_dispc(); - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); spin_unlock_irqrestore(&dss_cache.lock, flags); diff --git a/drivers/video/omap2/dss/overlay.c b/drivers/video/omap2/dss/overlay.c index 456efef03c20..996e9a4f6771 100644 --- a/drivers/video/omap2/dss/overlay.c +++ b/drivers/video/omap2/dss/overlay.c @@ -490,7 +490,7 @@ static int omap_dss_set_manager(struct omap_overlay *ovl, ovl->manager = mgr; - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); /* XXX: on manual update display, in auto update mode, a bug happens * here. When an overlay is first enabled on LCD, then it's disabled, * and the manager is changed to TV, we sometimes get SYNC_LOST_DIGIT @@ -499,7 +499,7 @@ static int omap_dss_set_manager(struct omap_overlay *ovl, * but I don't understand how or why. */ msleep(40); dispc_set_channel_out(ovl->id, mgr->id); - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); return 0; } diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c index 6dbb95d557f8..5ea17f49c611 100644 --- a/drivers/video/omap2/dss/rfbi.c +++ b/drivers/video/omap2/dss/rfbi.c @@ -141,9 +141,9 @@ static inline u32 rfbi_read_reg(const struct rfbi_reg idx) static void rfbi_enable_clocks(bool enable) { if (enable) - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); else - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); } void omap_rfbi_write_command(const void *buf, u32 len) @@ -496,7 +496,7 @@ unsigned long rfbi_get_max_tx_rate(void) }; l4_rate = rfbi.l4_khz / 1000; - dss1_rate = dss_clk_get_rate(DSS_CLK_FCK1) / 1000000; + dss1_rate = dss_clk_get_rate(DSS_CLK_FCK) / 1000000; for (i = 0; i < ARRAY_SIZE(ftab); i++) { /* Use a window instead of an exact match, to account @@ -921,7 +921,7 @@ void rfbi_dump_regs(struct seq_file *s) { #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r)) - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); DUMPREG(RFBI_REVISION); DUMPREG(RFBI_SYSCONFIG); @@ -952,7 +952,7 @@ void rfbi_dump_regs(struct seq_file *s) DUMPREG(RFBI_VSYNC_WIDTH); DUMPREG(RFBI_HSYNC_WIDTH); - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); #undef DUMPREG } diff --git a/drivers/video/omap2/dss/sdi.c b/drivers/video/omap2/dss/sdi.c index b64adf7dfc88..8272fc1f3279 100644 --- a/drivers/video/omap2/dss/sdi.c +++ b/drivers/video/omap2/dss/sdi.c @@ -70,7 +70,7 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev) /* In case of skip_init sdi_init has already enabled the clocks */ if (!sdi.skip_init) - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); sdi_basic_init(dssdev); @@ -130,7 +130,7 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev) return 0; err2: - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); regulator_disable(sdi.vdds_sdi_reg); err1: omap_dss_stop_device(dssdev); @@ -145,7 +145,7 @@ void omapdss_sdi_display_disable(struct omap_dss_device *dssdev) dss_sdi_disable(); - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); regulator_disable(sdi.vdds_sdi_reg); @@ -175,7 +175,7 @@ int sdi_init(bool skip_init) * of them until sdi_display_enable is called. */ if (skip_init) - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK); return 0; } diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c index ef36811f6ac8..1aadceb76e1d 100644 --- a/drivers/video/omap2/dss/venc.c +++ b/drivers/video/omap2/dss/venc.c @@ -391,11 +391,11 @@ static void venc_reset(void) static void venc_enable_clocks(int enable) { if (enable) - dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_54M | - DSS_CLK_96M); + dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK | DSS_CLK_TVFCK | + DSS_CLK_VIDFCK); else - dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_54M | - DSS_CLK_96M); + dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK | DSS_CLK_TVFCK | + DSS_CLK_VIDFCK); } static const struct venc_config *venc_timings_to_config( -- cgit v1.2.3 From 5f42f2ce63f5ecbd9bc744b9c25d9786e9a8e3b4 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Tue, 22 Feb 2011 15:53:46 +0200 Subject: OMAP: DSS2: Delay regulator_get() calls DSS submodules DPI/SDI/DSI/VENC require a regulator to function. However, if the board doesn't use, say, SDI, the board shouldn't need to configure vdds_sdi regulator required by the SDI module. Currently the regulators are acquired when the DSS driver is loaded. This means that if the kernel is configured with SDI, vdds_sdi regulator is needed for all boards. This patch changes the DSS driver to acquire the regulators only when a display of particular type is initialized. For example, vdds_sdi is acquired when sdi_init_display() is called. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dpi.c | 21 +++++++++++++-------- drivers/video/omap2/dss/dsi.c | 36 +++++++++++++----------------------- drivers/video/omap2/dss/sdi.c | 18 +++++++++++++----- drivers/video/omap2/dss/venc.c | 31 +++++++++++++------------------ 4 files changed, 52 insertions(+), 54 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c index 746f1b6dd897..026702b921e5 100644 --- a/drivers/video/omap2/dss/dpi.c +++ b/drivers/video/omap2/dss/dpi.c @@ -303,22 +303,27 @@ int dpi_init_display(struct omap_dss_device *dssdev) { DSSDBG("init_display\n"); - return 0; -} + if (cpu_is_omap34xx() && dpi.vdds_dsi_reg == NULL) { + struct regulator *vdds_dsi; -int dpi_init(struct platform_device *pdev) -{ - if (cpu_is_omap34xx()) { - dpi.vdds_dsi_reg = dss_get_vdds_dsi(); - if (IS_ERR(dpi.vdds_dsi_reg)) { + vdds_dsi = dss_get_vdds_dsi(); + + if (IS_ERR(vdds_dsi)) { DSSERR("can't get VDDS_DSI regulator\n"); - return PTR_ERR(dpi.vdds_dsi_reg); + return PTR_ERR(vdds_dsi); } + + dpi.vdds_dsi_reg = vdds_dsi; } return 0; } +int dpi_init(struct platform_device *pdev) +{ + return 0; +} + void dpi_exit(void) { } diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index c7b5382e1a6b..2928cddeb3fc 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -291,20 +291,6 @@ static inline u32 dsi_read_reg(const struct dsi_reg idx) return __raw_readl(dsi.base + idx.idx); } -static struct regulator *dsi_get_vdds_dsi(void) -{ - struct regulator *reg; - - if (dsi.vdds_dsi_reg != NULL) - return dsi.vdds_dsi_reg; - - reg = regulator_get(&dsi.pdev->dev, "vdds_dsi"); - if (!IS_ERR(reg)) - dsi.vdds_dsi_reg = reg; - - return reg; -} - void dsi_save_context(void) { @@ -3236,6 +3222,19 @@ int dsi_init_display(struct omap_dss_device *dssdev) dsi.vc[0].dssdev = dssdev; dsi.vc[1].dssdev = dssdev; + if (dsi.vdds_dsi_reg == NULL) { + struct regulator *vdds_dsi; + + vdds_dsi = regulator_get(&dsi.pdev->dev, "vdds_dsi"); + + if (IS_ERR(vdds_dsi)) { + DSSERR("can't get VDDS_DSI regulator\n"); + return PTR_ERR(vdds_dsi); + } + + dsi.vdds_dsi_reg = vdds_dsi; + } + return 0; } @@ -3295,13 +3294,6 @@ static int dsi_init(struct platform_device *pdev) goto err1; } - dsi.vdds_dsi_reg = dsi_get_vdds_dsi(); - if (IS_ERR(dsi.vdds_dsi_reg)) { - DSSERR("can't get VDDS_DSI regulator\n"); - r = PTR_ERR(dsi.vdds_dsi_reg); - goto err2; - } - enable_clocks(1); rev = dsi_read_reg(DSI_REVISION); @@ -3311,8 +3303,6 @@ static int dsi_init(struct platform_device *pdev) enable_clocks(0); return 0; -err2: - iounmap(dsi.base); err1: destroy_workqueue(dsi.workqueue); return r; diff --git a/drivers/video/omap2/dss/sdi.c b/drivers/video/omap2/dss/sdi.c index 8272fc1f3279..9f10a0d9e760 100644 --- a/drivers/video/omap2/dss/sdi.c +++ b/drivers/video/omap2/dss/sdi.c @@ -157,6 +157,19 @@ int sdi_init_display(struct omap_dss_device *dssdev) { DSSDBG("SDI init\n"); + if (sdi.vdds_sdi_reg == NULL) { + struct regulator *vdds_sdi; + + vdds_sdi = dss_get_vdds_sdi(); + + if (IS_ERR(vdds_sdi)) { + DSSERR("can't get VDDS_SDI regulator\n"); + return PTR_ERR(vdds_sdi); + } + + sdi.vdds_sdi_reg = vdds_sdi; + } + return 0; } @@ -165,11 +178,6 @@ int sdi_init(bool skip_init) /* we store this for first display enable, then clear it */ sdi.skip_init = skip_init; - sdi.vdds_sdi_reg = dss_get_vdds_sdi(); - if (IS_ERR(sdi.vdds_sdi_reg)) { - DSSERR("can't get VDDS_SDI regulator\n"); - return PTR_ERR(sdi.vdds_sdi_reg); - } /* * Enable clocks already here, otherwise there would be a toggle * of them until sdi_display_enable is called. diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c index 1aadceb76e1d..43009e57cd3e 100644 --- a/drivers/video/omap2/dss/venc.c +++ b/drivers/video/omap2/dss/venc.c @@ -305,17 +305,6 @@ static inline u32 venc_read_reg(int idx) return l; } -static struct regulator *venc_get_vdda_dac(void) -{ - struct regulator *reg; - - reg = regulator_get(&venc.pdev->dev, "vdda_dac"); - if (!IS_ERR(reg)) - venc.vdda_dac_reg = reg; - - return reg; -} - static void venc_write_config(const struct venc_config *config) { DSSDBG("write venc conf\n"); @@ -655,6 +644,19 @@ int venc_init_display(struct omap_dss_device *dssdev) { DSSDBG("init_display\n"); + if (venc.vdda_dac_reg == NULL) { + struct regulator *vdda_dac; + + vdda_dac = regulator_get(&venc.pdev->dev, "vdda_dac"); + + if (IS_ERR(vdda_dac)) { + DSSERR("can't get VDDA_DAC regulator\n"); + return PTR_ERR(vdda_dac); + } + + venc.vdda_dac_reg = vdda_dac; + } + return 0; } @@ -734,13 +736,6 @@ static int omap_venchw_probe(struct platform_device *pdev) return -ENOMEM; } - venc.vdda_dac_reg = venc_get_vdda_dac(); - if (IS_ERR(venc.vdda_dac_reg)) { - iounmap(venc.base); - DSSERR("can't get VDDA_DAC regulator\n"); - return PTR_ERR(venc.vdda_dac_reg); - } - venc_enable_clocks(1); rev_id = (u8)(venc_read_reg(VENC_REV_ID) & 0xff); -- cgit v1.2.3 From affe360d13e54b415cde2f11cee02369b4ed54bd Mon Sep 17 00:00:00 2001 From: archit taneja Date: Wed, 23 Feb 2011 08:41:03 +0000 Subject: OMAP: DSS2: Have separate irq handlers for DISPC and DSI Currently, the core DSS platform device requests for an irq line for OMAP2 and OMAP3. Make DISPC and DSI platform devices request for a shared IRQ line. On OMAP3, the logical OR of DSI and DISPC interrupt lines goes to the MPU. There is a register DSS_IRQSTATUS which tells if the interrupt came from DISPC or DSI. On OMAP2, there is no DSI, only DISPC interrupts goto the MPU. There is no DSS_IRQSTATUS register. Hence, it makes more sense to have separate irq handlers corresponding to the DSS sub modules instead of having a common handler. Since on OMAP3 the logical OR of the lines goes to MPU, the irq line is shared among the IRQ handlers. The hwmod irq info has been removed for DSS to DISPC and DSI for OMAP2 and OMAP3 hwmod databases. The Probes of DISPC and DSI now request for irq handlers. Signed-off-by: Archit Taneja Signed-off-by: Tomi Valkeinen --- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 13 ++++---- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 12 +++---- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 21 ++++++------ drivers/video/omap2/dss/dispc.c | 40 ++++++++++++++++++++--- drivers/video/omap2/dss/dsi.c | 25 +++++++++++++-- drivers/video/omap2/dss/dss.c | 51 +----------------------------- 6 files changed, 84 insertions(+), 78 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 61e58bd27aec..3a1ad0074978 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -1168,11 +1168,6 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = { .sysc = &omap2420_dss_sysc, }; -/* dss */ -static struct omap_hwmod_irq_info omap2420_dss_irqs[] = { - { .irq = 25 }, -}; - static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, }; @@ -1221,8 +1216,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { .name = "dss_core", .class = &omap2420_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ - .mpu_irqs = omap2420_dss_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dss_irqs), .sdma_reqs = omap2420_dss_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs), .prcm = { @@ -1265,6 +1258,10 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = { .sysc = &omap2420_dispc_sysc, }; +static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { + { .irq = 25 }, +}; + static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { { .pa_start = 0x48050400, @@ -1297,6 +1294,8 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = { static struct omap_hwmod omap2420_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2420_dispc_hwmod_class, + .mpu_irqs = omap2420_dispc_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dispc_irqs), .main_clk = "dss1_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 490789a6bed0..c905c1bf90c4 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1268,10 +1268,6 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = { .sysc = &omap2430_dss_sysc, }; -/* dss */ -static struct omap_hwmod_irq_info omap2430_dss_irqs[] = { - { .irq = 25 }, -}; static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, }; @@ -1314,8 +1310,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { .name = "dss_core", .class = &omap2430_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ - .mpu_irqs = omap2430_dss_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dss_irqs), .sdma_reqs = omap2430_dss_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs), .prcm = { @@ -1358,6 +1352,10 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = { .sysc = &omap2430_dispc_sysc, }; +static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { + { .irq = 25 }, +}; + static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { { .pa_start = 0x48050400, @@ -1384,6 +1382,8 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = { static struct omap_hwmod omap2430_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2430_dispc_hwmod_class, + .mpu_irqs = omap2430_dispc_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dispc_irqs), .main_clk = "dss1_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 4ed48cab06fe..f997b0e9759d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1503,11 +1503,6 @@ static struct omap_hwmod_class omap3xxx_dss_hwmod_class = { .sysc = &omap3xxx_dss_sysc, }; -/* dss */ -static struct omap_hwmod_irq_info omap3xxx_dss_irqs[] = { - { .irq = 25 }, -}; - static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, { .name = "dsi1", .dma_req = 74 }, @@ -1579,8 +1574,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { .name = "dss_core", .class = &omap3xxx_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ - .mpu_irqs = omap3xxx_dss_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dss_irqs), .sdma_reqs = omap3xxx_dss_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), @@ -1607,8 +1600,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = { .name = "dss_core", .class = &omap3xxx_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ - .mpu_irqs = omap3xxx_dss_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dss_irqs), .sdma_reqs = omap3xxx_dss_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), @@ -1654,6 +1645,10 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { .sysc = &omap3xxx_dispc_sysc, }; +static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { + { .irq = 25 }, +}; + static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = { { .pa_start = 0x48050400, @@ -1687,6 +1682,8 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = { static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap3xxx_dispc_hwmod_class, + .mpu_irqs = omap3xxx_dispc_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dispc_irqs), .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { @@ -1712,6 +1709,10 @@ static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = { .name = "dsi", }; +static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = { + { .irq = 25 }, +}; + /* dss_dsi1 */ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = { { @@ -1745,6 +1746,8 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = { static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { .name = "dss_dsi1", .class = &omap3xxx_dsi_hwmod_class, + .mpu_irqs = omap3xxx_dsi1_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dsi1_irqs), .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index dc4518c4b0e4..43f7091c71cb 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include @@ -178,6 +179,7 @@ struct dispc_irq_stats { static struct { struct platform_device *pdev; void __iomem *base; + int irq; u32 fifo_size[3]; @@ -2865,10 +2867,10 @@ static void print_irq_status(u32 status) * but we presume they are on because we got an IRQ. However, * an irq handler may turn the clocks off, so we may not have * clock later in the function. */ -void dispc_irq_handler(void) +static irqreturn_t omap_dispc_irq_handler(int irq, void *arg) { int i; - u32 irqstatus; + u32 irqstatus, irqenable; u32 handledirqs = 0; u32 unhandled_errors; struct omap_dispc_isr_data *isr_data; @@ -2877,6 +2879,13 @@ void dispc_irq_handler(void) spin_lock(&dispc.irq_lock); irqstatus = dispc_read_reg(DISPC_IRQSTATUS); + irqenable = dispc_read_reg(DISPC_IRQENABLE); + + /* IRQ is not for us */ + if (!(irqstatus & irqenable)) { + spin_unlock(&dispc.irq_lock); + return IRQ_NONE; + } #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS spin_lock(&dispc.irq_stats_lock); @@ -2928,6 +2937,8 @@ void dispc_irq_handler(void) } spin_unlock(&dispc.irq_lock); + + return IRQ_HANDLED; } static void dispc_error_worker(struct work_struct *work) @@ -3322,6 +3333,7 @@ int dispc_setup_plane(enum omap_plane plane, static int omap_dispchw_probe(struct platform_device *pdev) { u32 rev; + int r = 0; struct resource *dispc_mem; dispc.pdev = pdev; @@ -3338,12 +3350,27 @@ static int omap_dispchw_probe(struct platform_device *pdev) dispc_mem = platform_get_resource(dispc.pdev, IORESOURCE_MEM, 0); if (!dispc_mem) { DSSERR("can't get IORESOURCE_MEM DISPC\n"); - return -EINVAL; + r = -EINVAL; + goto fail0; } dispc.base = ioremap(dispc_mem->start, resource_size(dispc_mem)); if (!dispc.base) { DSSERR("can't ioremap DISPC\n"); - return -ENOMEM; + r = -ENOMEM; + goto fail0; + } + dispc.irq = platform_get_irq(dispc.pdev, 0); + if (dispc.irq < 0) { + DSSERR("platform_get_irq failed\n"); + r = -ENODEV; + goto fail1; + } + + r = request_irq(dispc.irq, omap_dispc_irq_handler, IRQF_SHARED, + "OMAP DISPC", dispc.pdev); + if (r < 0) { + DSSERR("request_irq failed\n"); + goto fail1; } enable_clocks(1); @@ -3361,10 +3388,15 @@ static int omap_dispchw_probe(struct platform_device *pdev) enable_clocks(0); return 0; +fail1: + iounmap(dispc.base); +fail0: + return r; } static int omap_dispchw_remove(struct platform_device *pdev) { + free_irq(dispc.irq, dispc.pdev); iounmap(dispc.base); return 0; } diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 2928cddeb3fc..2f7d9491cd02 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -222,6 +222,7 @@ static struct { struct platform_device *pdev; void __iomem *base; + int irq; struct dsi_clock_info current_cinfo; @@ -480,13 +481,17 @@ static void print_irq_status_cio(u32 status) static int debug_irq; /* called from dss */ -void dsi_irq_handler(void) +static irqreturn_t omap_dsi_irq_handler(int irq, void *arg) { u32 irqstatus, vcstatus, ciostatus; int i; irqstatus = dsi_read_reg(DSI_IRQSTATUS); + /* IRQ is not for us */ + if (!irqstatus) + return IRQ_NONE; + #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS spin_lock(&dsi.irq_stats_lock); dsi.irq_stats.irq_count++; @@ -564,9 +569,9 @@ void dsi_irq_handler(void) #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS spin_unlock(&dsi.irq_stats_lock); #endif + return IRQ_HANDLED; } - static void _dsi_initialize_irq(void) { u32 l; @@ -3293,6 +3298,19 @@ static int dsi_init(struct platform_device *pdev) r = -ENOMEM; goto err1; } + dsi.irq = platform_get_irq(dsi.pdev, 0); + if (dsi.irq < 0) { + DSSERR("platform_get_irq failed\n"); + r = -ENODEV; + goto err2; + } + + r = request_irq(dsi.irq, omap_dsi_irq_handler, IRQF_SHARED, + "OMAP DSI1", dsi.pdev); + if (r < 0) { + DSSERR("request_irq failed\n"); + goto err2; + } enable_clocks(1); @@ -3303,6 +3321,8 @@ static int dsi_init(struct platform_device *pdev) enable_clocks(0); return 0; +err2: + iounmap(dsi.base); err1: destroy_workqueue(dsi.workqueue); return r; @@ -3315,6 +3335,7 @@ static void dsi_exit(void) dsi.vdds_dsi_reg = NULL; } + free_irq(dsi.irq, dsi.pdev); iounmap(dsi.base); destroy_workqueue(dsi.workqueue); diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index ab82f7937675..dc57100cc43d 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -26,7 +26,6 @@ #include #include #include -#include #include #include @@ -79,7 +78,6 @@ static struct { enum dss_clk_source dispc_clk_source; u32 ctx[DSS_SZ_REGS / sizeof(u32)]; - int dss_irq; } dss; static void dss_clk_enable_all_no_ctx(void); @@ -495,31 +493,6 @@ found: return 0; } - - -static irqreturn_t dss_irq_handler_omap2(int irq, void *arg) -{ - dispc_irq_handler(); - - return IRQ_HANDLED; -} - -static irqreturn_t dss_irq_handler_omap3(int irq, void *arg) -{ - u32 irqstatus; - - irqstatus = dss_read_reg(DSS_IRQSTATUS); - - if (irqstatus & (1<<0)) /* DISPC_IRQ */ - dispc_irq_handler(); -#ifdef CONFIG_OMAP2_DSS_DSI - if (irqstatus & (1<<1)) /* DSI_IRQ */ - dsi_irq_handler(); -#endif - - return IRQ_HANDLED; -} - static int _omap_dss_wait_reset(void) { int t = 0; @@ -610,30 +583,12 @@ static int dss_init(bool skip_init) REG_FLD_MOD(DSS_CONTROL, 0, 2, 2); /* venc clock mode = normal */ #endif - dss.dss_irq = platform_get_irq(dss.pdev, 0); - if (dss.dss_irq < 0) { - DSSERR("omap2 dss: platform_get_irq failed\n"); - r = -ENODEV; - goto fail1; - } - - r = request_irq(dss.dss_irq, - cpu_is_omap24xx() - ? dss_irq_handler_omap2 - : dss_irq_handler_omap3, - 0, "OMAP DSS", NULL); - - if (r < 0) { - DSSERR("omap2 dss: request_irq failed\n"); - goto fail1; - } - if (cpu_is_omap34xx()) { dss.dpll4_m4_ck = clk_get(NULL, "dpll4_m4_ck"); if (IS_ERR(dss.dpll4_m4_ck)) { DSSERR("Failed to get dpll4_m4_ck\n"); r = PTR_ERR(dss.dpll4_m4_ck); - goto fail2; + goto fail1; } } @@ -648,8 +603,6 @@ static int dss_init(bool skip_init) return 0; -fail2: - free_irq(dss.dss_irq, NULL); fail1: iounmap(dss.base); fail0: @@ -661,8 +614,6 @@ static void dss_exit(void) if (cpu_is_omap34xx()) clk_put(dss.dpll4_m4_ck); - free_irq(dss.dss_irq, NULL); - iounmap(dss.base); } -- cgit v1.2.3 From 4b6b7fa2d3677d1d86780c73fe2284147713e3b1 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 2 Jun 2010 15:09:37 +0300 Subject: OMAP: DSS2: DSI: remove unused function dsi_reset_tx_fifo() was not used. Furthermore, OMAP errata states that TX FIFO flush is not functional, so the function wouldn't even have worked. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dsi.c | 14 -------------- 1 file changed, 14 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 2f7d9491cd02..c3019d95618d 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -1626,20 +1626,6 @@ static int _dsi_reset(void) return _dsi_wait_reset(); } -static void dsi_reset_tx_fifo(int channel) -{ - u32 mask; - u32 l; - - /* set fifosize of the channel to 0, then return the old size */ - l = dsi_read_reg(DSI_TX_FIFO_VC_SIZE); - - mask = FLD_MASK((8 * channel) + 7, (8 * channel) + 4); - dsi_write_reg(DSI_TX_FIFO_VC_SIZE, l & ~mask); - - dsi_write_reg(DSI_TX_FIFO_VC_SIZE, l); -} - static void dsi_config_tx_fifo(enum fifo_size size1, enum fifo_size size2, enum fifo_size size3, enum fifo_size size4) { -- cgit v1.2.3 From 819d807c59af10cce1dcbb13539c2fb100953fcd Mon Sep 17 00:00:00 2001 From: Archit Taneja Date: Tue, 1 Mar 2011 11:54:00 +0530 Subject: OMAP2PLUS: DSS2: FEATURES: Function to Provide the max fck supported The maximum supported frequency for DSS has increased from 173 to 186 Mhz on OMAP4. Introduce a dss feature function to get the max_fck to replace DISPC_MAX_FCK macro. Signed-off-by: Archit Taneja Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dsi.c | 9 ++++++--- drivers/video/omap2/dss/dss.c | 8 +++++--- drivers/video/omap2/dss/dss.h | 2 -- drivers/video/omap2/dss/dss_features.c | 11 +++++++++++ drivers/video/omap2/dss/dss_features.h | 1 + 5 files changed, 23 insertions(+), 8 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index c3019d95618d..705599ad3166 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -38,6 +38,7 @@ #include #include "dss.h" +#include "dss_features.h" /*#define VERBOSE_IRQ*/ #define DSI_CATCH_MISSING_TE @@ -856,10 +857,12 @@ int dsi_pll_calc_clock_div_pck(bool is_tft, unsigned long req_pck, struct dispc_clock_info best_dispc; int min_fck_per_pck; int match = 0; - unsigned long dss_clk_fck2; + unsigned long dss_clk_fck2, max_dss_fck; dss_clk_fck2 = dss_clk_get_rate(DSS_CLK_SYSCK); + max_dss_fck = dss_feat_get_max_dss_fck(); + if (req_pck == dsi.cache_req_pck && dsi.cache_cinfo.clkin == dss_clk_fck2) { DSSDBG("DSI clock info found from cache\n"); @@ -872,7 +875,7 @@ int dsi_pll_calc_clock_div_pck(bool is_tft, unsigned long req_pck, min_fck_per_pck = CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK; if (min_fck_per_pck && - req_pck * min_fck_per_pck > DISPC_MAX_FCK) { + req_pck * min_fck_per_pck > max_dss_fck) { DSSERR("Requested pixel clock not possible with the current " "OMAP2_DSS_MIN_FCK_PER_PCK setting. Turning " "the constraint off.\n"); @@ -925,7 +928,7 @@ retry: if (cur.dsi1_pll_fclk < req_pck) break; - if (cur.dsi1_pll_fclk > DISPC_MAX_FCK) + if (cur.dsi1_pll_fclk > max_dss_fck) continue; if (min_fck_per_pck && diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 0cf5f8bd1c8a..01be82a4f42f 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -387,7 +387,7 @@ int dss_calc_clock_div(bool is_tft, unsigned long req_pck, struct dss_clock_info best_dss; struct dispc_clock_info best_dispc; - unsigned long fck; + unsigned long fck, max_dss_fck; u16 fck_div; @@ -396,6 +396,8 @@ int dss_calc_clock_div(bool is_tft, unsigned long req_pck, prate = dss_get_dpll4_rate(); + max_dss_fck = dss_feat_get_max_dss_fck(); + fck = dss_clk_get_rate(DSS_CLK_FCK); if (req_pck == dss.cache_req_pck && ((cpu_is_omap34xx() && prate == dss.cache_prate) || @@ -409,7 +411,7 @@ int dss_calc_clock_div(bool is_tft, unsigned long req_pck, min_fck_per_pck = CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK; if (min_fck_per_pck && - req_pck * min_fck_per_pck > DISPC_MAX_FCK) { + req_pck * min_fck_per_pck > max_dss_fck) { DSSERR("Requested pixel clock not possible with the current " "OMAP2_DSS_MIN_FCK_PER_PCK setting. Turning " "the constraint off.\n"); @@ -445,7 +447,7 @@ retry: else fck = prate / fck_div * 2; - if (fck > DISPC_MAX_FCK) + if (fck > max_dss_fck) continue; if (min_fck_per_pck && diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h index 4b02e079f20e..7fe32d1647f9 100644 --- a/drivers/video/omap2/dss/dss.h +++ b/drivers/video/omap2/dss/dss.h @@ -97,8 +97,6 @@ extern unsigned int dss_debug; #define FLD_MOD(orig, val, start, end) \ (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end)) -#define DISPC_MAX_FCK 173000000 - enum omap_burst_size { OMAP_DSS_BURST_4x32 = 0, OMAP_DSS_BURST_8x32 = 1, diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c index 679be14b73a8..3ebe0d91afd2 100644 --- a/drivers/video/omap2/dss/dss_features.c +++ b/drivers/video/omap2/dss/dss_features.c @@ -41,6 +41,7 @@ struct omap_dss_features { const int num_mgrs; const int num_ovls; + const unsigned long max_dss_fck; const enum omap_display_type *supported_displays; const enum omap_color_mode *supported_color_modes; }; @@ -168,6 +169,7 @@ static struct omap_dss_features omap2_dss_features = { .num_mgrs = 2, .num_ovls = 3, + .max_dss_fck = 173000000, .supported_displays = omap2_dss_supported_displays, .supported_color_modes = omap2_dss_supported_color_modes, }; @@ -185,6 +187,7 @@ static struct omap_dss_features omap3430_dss_features = { .num_mgrs = 2, .num_ovls = 3, + .max_dss_fck = 173000000, .supported_displays = omap3430_dss_supported_displays, .supported_color_modes = omap3_dss_supported_color_modes, }; @@ -202,6 +205,7 @@ static struct omap_dss_features omap3630_dss_features = { .num_mgrs = 2, .num_ovls = 3, + .max_dss_fck = 173000000, .supported_displays = omap3630_dss_supported_displays, .supported_color_modes = omap3_dss_supported_color_modes, }; @@ -217,6 +221,7 @@ static struct omap_dss_features omap4_dss_features = { .num_mgrs = 3, .num_ovls = 3, + .max_dss_fck = 186000000, .supported_displays = omap4_dss_supported_displays, .supported_color_modes = omap3_dss_supported_color_modes, }; @@ -232,6 +237,12 @@ int dss_feat_get_num_ovls(void) return omap_current_dss_features->num_ovls; } +/* Max supported DSS FCK in Hz */ +unsigned long dss_feat_get_max_dss_fck(void) +{ + return omap_current_dss_features->max_dss_fck; +} + enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel) { return omap_current_dss_features->supported_displays[channel]; diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h index b3f81415507c..18ab19515817 100644 --- a/drivers/video/omap2/dss/dss_features.h +++ b/drivers/video/omap2/dss/dss_features.h @@ -52,6 +52,7 @@ enum dss_feat_reg_field { /* DSS Feature Functions */ int dss_feat_get_num_mgrs(void); int dss_feat_get_num_ovls(void); +unsigned long dss_feat_get_max_dss_fck(void); enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel); enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane); bool dss_feat_color_mode_supported(enum omap_plane plane, -- cgit v1.2.3 From 88134fa138b90518819b750891ffecc13f5f4886 Mon Sep 17 00:00:00 2001 From: Archit Taneja Date: Thu, 6 Jan 2011 10:44:10 +0530 Subject: OMAP2PLUS: DSS2: Make members of dss_clk_source generic The enum members of 'dss_clk_source' have clock source names specific to OMAP2/3. Change the names to more generic terms such that they now describe where the clocks come from and what they are used for. Also, change the enum member names to have "DSS_CLK_SRC" instead of "DSS_SRC" for more clarity. Signed-off-by: Archit Taneja Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dispc.c | 4 ++-- drivers/video/omap2/dss/dpi.c | 4 ++-- drivers/video/omap2/dss/dsi.c | 20 ++++++++++---------- drivers/video/omap2/dss/dss.c | 20 ++++++++++---------- drivers/video/omap2/dss/dss.h | 6 +++--- 5 files changed, 27 insertions(+), 27 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index aa6479712d4c..a06b2ea41e98 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -2334,7 +2334,7 @@ unsigned long dispc_fclk_rate(void) { unsigned long r = 0; - if (dss_get_dispc_clk_source() == DSS_SRC_DSS1_ALWON_FCLK) + if (dss_get_dispc_clk_source() == DSS_CLK_SRC_FCK) r = dss_clk_get_rate(DSS_CLK_FCK); else #ifdef CONFIG_OMAP2_DSS_DSI @@ -2385,7 +2385,7 @@ void dispc_dump_clocks(struct seq_file *s) seq_printf(s, "- DISPC -\n"); seq_printf(s, "dispc fclk source = %s\n", - dss_get_dispc_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ? + dss_get_dispc_clk_source() == DSS_CLK_SRC_FCK ? "dss1_alwon_fclk" : "dsi1_pll_fclk"); seq_printf(s, "fck\t\t%-16lu\n", dispc_fclk_rate()); diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c index 026702b921e5..1b2867dfeeb9 100644 --- a/drivers/video/omap2/dss/dpi.c +++ b/drivers/video/omap2/dss/dpi.c @@ -57,7 +57,7 @@ static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft, if (r) return r; - dss_select_dispc_clk_source(DSS_SRC_DSI1_PLL_FCLK); + dss_select_dispc_clk_source(DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC); r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo); if (r) @@ -217,7 +217,7 @@ void omapdss_dpi_display_disable(struct omap_dss_device *dssdev) dssdev->manager->disable(dssdev->manager); #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL - dss_select_dispc_clk_source(DSS_SRC_DSS1_ALWON_FCLK); + dss_select_dispc_clk_source(DSS_CLK_SRC_FCK); dsi_pll_uninit(); dss_clk_disable(DSS_CLK_SYSCK); #endif diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 705599ad3166..df35aed828da 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -731,7 +731,7 @@ static unsigned long dsi_fclk_rate(void) { unsigned long r; - if (dss_get_dsi_clk_source() == DSS_SRC_DSS1_ALWON_FCLK) { + if (dss_get_dsi_clk_source() == DSS_CLK_SRC_FCK) { /* DSI FCLK source is DSS1_ALWON_FCK, which is dss1_fck */ r = dss_clk_get_rate(DSS_CLK_FCK); } else { @@ -1188,19 +1188,19 @@ void dsi_dump_clocks(struct seq_file *s) seq_printf(s, "dsi1_pll_fck\t%-16luregm3 %u\t(%s)\n", cinfo->dsi1_pll_fclk, cinfo->regm3, - dss_get_dispc_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ? + dss_get_dispc_clk_source() == DSS_CLK_SRC_FCK ? "off" : "on"); seq_printf(s, "dsi2_pll_fck\t%-16luregm4 %u\t(%s)\n", cinfo->dsi2_pll_fclk, cinfo->regm4, - dss_get_dsi_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ? + dss_get_dsi_clk_source() == DSS_CLK_SRC_FCK ? "off" : "on"); seq_printf(s, "- DSI -\n"); seq_printf(s, "dsi fclk source = %s\n", - dss_get_dsi_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ? + dss_get_dsi_clk_source() == DSS_CLK_SRC_FCK ? "dss1_alwon_fclk" : "dsi2_pll_fclk"); seq_printf(s, "DSI_FCLK\t%lu\n", dsi_fclk_rate()); @@ -3038,8 +3038,8 @@ static int dsi_display_init_dsi(struct omap_dss_device *dssdev) if (r) goto err1; - dss_select_dispc_clk_source(DSS_SRC_DSI1_PLL_FCLK); - dss_select_dsi_clk_source(DSS_SRC_DSI2_PLL_FCLK); + dss_select_dispc_clk_source(DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC); + dss_select_dsi_clk_source(DSS_CLK_SRC_DSI_PLL_HSDIV_DSI); DSSDBG("PLL OK\n"); @@ -3075,8 +3075,8 @@ static int dsi_display_init_dsi(struct omap_dss_device *dssdev) err3: dsi_complexio_uninit(); err2: - dss_select_dispc_clk_source(DSS_SRC_DSS1_ALWON_FCLK); - dss_select_dsi_clk_source(DSS_SRC_DSS1_ALWON_FCLK); + dss_select_dispc_clk_source(DSS_CLK_SRC_FCK); + dss_select_dsi_clk_source(DSS_CLK_SRC_FCK); err1: dsi_pll_uninit(); err0: @@ -3092,8 +3092,8 @@ static void dsi_display_uninit_dsi(struct omap_dss_device *dssdev) dsi_vc_enable(2, 0); dsi_vc_enable(3, 0); - dss_select_dispc_clk_source(DSS_SRC_DSS1_ALWON_FCLK); - dss_select_dsi_clk_source(DSS_SRC_DSS1_ALWON_FCLK); + dss_select_dispc_clk_source(DSS_CLK_SRC_FCK); + dss_select_dsi_clk_source(DSS_CLK_SRC_FCK); dsi_complexio_uninit(); dsi_pll_uninit(); } diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 01be82a4f42f..998c188c8823 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -278,12 +278,12 @@ void dss_select_dispc_clk_source(enum dss_clk_source clk_src) { int b; - BUG_ON(clk_src != DSS_SRC_DSI1_PLL_FCLK && - clk_src != DSS_SRC_DSS1_ALWON_FCLK); + BUG_ON(clk_src != DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC && + clk_src != DSS_CLK_SRC_FCK); - b = clk_src == DSS_SRC_DSS1_ALWON_FCLK ? 0 : 1; + b = clk_src == DSS_CLK_SRC_FCK ? 0 : 1; - if (clk_src == DSS_SRC_DSI1_PLL_FCLK) + if (clk_src == DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC) dsi_wait_dsi1_pll_active(); REG_FLD_MOD(DSS_CONTROL, b, 0, 0); /* DISPC_CLK_SWITCH */ @@ -295,12 +295,12 @@ void dss_select_dsi_clk_source(enum dss_clk_source clk_src) { int b; - BUG_ON(clk_src != DSS_SRC_DSI2_PLL_FCLK && - clk_src != DSS_SRC_DSS1_ALWON_FCLK); + BUG_ON(clk_src != DSS_CLK_SRC_DSI_PLL_HSDIV_DSI && + clk_src != DSS_CLK_SRC_FCK); - b = clk_src == DSS_SRC_DSS1_ALWON_FCLK ? 0 : 1; + b = clk_src == DSS_CLK_SRC_FCK ? 0 : 1; - if (clk_src == DSS_SRC_DSI2_PLL_FCLK) + if (clk_src == DSS_CLK_SRC_DSI_PLL_HSDIV_DSI) dsi_wait_dsi2_pll_active(); REG_FLD_MOD(DSS_CONTROL, b, 1, 1); /* DSI_CLK_SWITCH */ @@ -601,8 +601,8 @@ static int dss_init(bool skip_init) } } - dss.dsi_clk_source = DSS_SRC_DSS1_ALWON_FCLK; - dss.dispc_clk_source = DSS_SRC_DSS1_ALWON_FCLK; + dss.dsi_clk_source = DSS_CLK_SRC_FCK; + dss.dispc_clk_source = DSS_CLK_SRC_FCK; dss_save_context(); diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h index 7fe32d1647f9..a166ff36ec90 100644 --- a/drivers/video/omap2/dss/dss.h +++ b/drivers/video/omap2/dss/dss.h @@ -118,9 +118,9 @@ enum dss_clock { }; enum dss_clk_source { - DSS_SRC_DSI1_PLL_FCLK, - DSS_SRC_DSI2_PLL_FCLK, - DSS_SRC_DSS1_ALWON_FCLK, + DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* DSI1_PLL_FCLK */ + DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* DSI2_PLL_FCLK */ + DSS_CLK_SRC_FCK, /* DSS1_ALWON_FCLK */ }; struct dss_clock_info { -- cgit v1.2.3 From 067a57e48e302863eb2d5ac0900ae9ae65dbc8c3 Mon Sep 17 00:00:00 2001 From: Archit Taneja Date: Wed, 2 Mar 2011 11:57:25 +0530 Subject: OMAP2PLUS: DSS2: Use dss features to get clock source names of current OMAP Clock source names vary across OMAP2/3 and OMAP4, the clock source enum names have been made generic in the driver, but for purposes of debugging and dumping clock sources, it is better to preserve the actual TRM name of the clock. Introduce a dss feature function 'dss_feat_get_clk_source_name()' which returns a string with the TRM clock name for the current OMAP in use. The OMAP specific name is printed along the generic name within brackets. Signed-off-by: Archit Taneja Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dispc.c | 7 +++--- drivers/video/omap2/dss/dsi.c | 42 +++++++++++++++++++++++----------- drivers/video/omap2/dss/dss.c | 19 +++++++++++++-- drivers/video/omap2/dss/dss.h | 7 ++++++ drivers/video/omap2/dss/dss_features.c | 23 +++++++++++++++++++ drivers/video/omap2/dss/dss_features.h | 1 + 6 files changed, 81 insertions(+), 18 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index a06b2ea41e98..2c82d9a3df4b 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -2379,14 +2379,15 @@ unsigned long dispc_pclk_rate(enum omap_channel channel) void dispc_dump_clocks(struct seq_file *s) { int lcd, pcd; + enum dss_clk_source dispc_clk_src = dss_get_dispc_clk_source(); enable_clocks(1); seq_printf(s, "- DISPC -\n"); - seq_printf(s, "dispc fclk source = %s\n", - dss_get_dispc_clk_source() == DSS_CLK_SRC_FCK ? - "dss1_alwon_fclk" : "dsi1_pll_fclk"); + seq_printf(s, "dispc fclk source = %s (%s)\n", + dss_get_generic_clk_source_name(dispc_clk_src), + dss_feat_get_clk_source_name(dispc_clk_src)); seq_printf(s, "fck\t\t%-16lu\n", dispc_fclk_rate()); diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index df35aed828da..3ef94227bbe7 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -1022,10 +1022,14 @@ int dsi_pll_set_clock_div(struct dsi_clock_info *cinfo) DSSDBG("Clock lane freq %ld Hz\n", cinfo->clkin4ddr / 4); - DSSDBG("regm3 = %d, dsi1_pll_fclk = %lu\n", - cinfo->regm3, cinfo->dsi1_pll_fclk); - DSSDBG("regm4 = %d, dsi2_pll_fclk = %lu\n", - cinfo->regm4, cinfo->dsi2_pll_fclk); + DSSDBG("regm3 = %d, %s (%s) = %lu\n", cinfo->regm3, + dss_get_generic_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC), + dss_feat_get_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC), + cinfo->dsi1_pll_fclk); + DSSDBG("regm4 = %d, %s (%s) = %lu\n", cinfo->regm4, + dss_get_generic_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DSI), + dss_feat_get_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DSI), + cinfo->dsi2_pll_fclk); REG_FLD_MOD(DSI_PLL_CONTROL, 0, 0, 0); /* DSI_PLL_AUTOMODE = manual */ @@ -1169,6 +1173,10 @@ void dsi_dump_clocks(struct seq_file *s) { int clksel; struct dsi_clock_info *cinfo = &dsi.current_cinfo; + enum dss_clk_source dispc_clk_src, dsi_clk_src; + + dispc_clk_src = dss_get_dispc_clk_source(); + dsi_clk_src = dss_get_dsi_clk_source(); enable_clocks(1); @@ -1185,23 +1193,27 @@ void dsi_dump_clocks(struct seq_file *s) seq_printf(s, "CLKIN4DDR\t%-16luregm %u\n", cinfo->clkin4ddr, cinfo->regm); - seq_printf(s, "dsi1_pll_fck\t%-16luregm3 %u\t(%s)\n", + seq_printf(s, "%s (%s)\t%-16luregm3 %u\t(%s)\n", + dss_get_generic_clk_source_name(dispc_clk_src), + dss_feat_get_clk_source_name(dispc_clk_src), cinfo->dsi1_pll_fclk, cinfo->regm3, - dss_get_dispc_clk_source() == DSS_CLK_SRC_FCK ? + dispc_clk_src == DSS_CLK_SRC_FCK ? "off" : "on"); - seq_printf(s, "dsi2_pll_fck\t%-16luregm4 %u\t(%s)\n", + seq_printf(s, "%s (%s)\t%-16luregm4 %u\t(%s)\n", + dss_get_generic_clk_source_name(dsi_clk_src), + dss_feat_get_clk_source_name(dsi_clk_src), cinfo->dsi2_pll_fclk, cinfo->regm4, - dss_get_dsi_clk_source() == DSS_CLK_SRC_FCK ? + dsi_clk_src == DSS_CLK_SRC_FCK ? "off" : "on"); seq_printf(s, "- DSI -\n"); - seq_printf(s, "dsi fclk source = %s\n", - dss_get_dsi_clk_source() == DSS_CLK_SRC_FCK ? - "dss1_alwon_fclk" : "dsi2_pll_fclk"); + seq_printf(s, "dsi fclk source = %s (%s)\n", + dss_get_generic_clk_source_name(dsi_clk_src), + dss_feat_get_clk_source_name(dsi_clk_src)); seq_printf(s, "DSI_FCLK\t%lu\n", dsi_fclk_rate()); @@ -3235,13 +3247,17 @@ int dsi_init_display(struct omap_dss_device *dssdev) void dsi_wait_dsi1_pll_active(void) { if (wait_for_bit_change(DSI_PLL_STATUS, 7, 1) != 1) - DSSERR("DSI1 PLL clock not active\n"); + DSSERR("%s (%s) not active\n", + dss_get_generic_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC), + dss_feat_get_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC)); } void dsi_wait_dsi2_pll_active(void) { if (wait_for_bit_change(DSI_PLL_STATUS, 8, 1) != 1) - DSSERR("DSI2 PLL clock not active\n"); + DSSERR("%s (%s) not active\n", + dss_get_generic_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DSI), + dss_feat_get_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DSI)); } static int dsi_init(struct platform_device *pdev) diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 998c188c8823..d049598bb412 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -81,6 +81,12 @@ static struct { u32 ctx[DSS_SZ_REGS / sizeof(u32)]; } dss; +static const struct dss_clk_source_name dss_generic_clk_source_names[] = { + { DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, "DSI_PLL_HSDIV_DISPC" }, + { DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, "DSI_PLL_HSDIV_DSI" }, + { DSS_CLK_SRC_FCK, "DSS_FCK" }, +}; + static void dss_clk_enable_all_no_ctx(void); static void dss_clk_disable_all_no_ctx(void); static void dss_clk_enable_no_ctx(enum dss_clock clks); @@ -223,6 +229,11 @@ void dss_sdi_disable(void) REG_FLD_MOD(DSS_PLL_CONTROL, 0, 18, 18); /* SDI_PLL_SYSRESET */ } +const char *dss_get_generic_clk_source_name(enum dss_clk_source clk_src) +{ + return dss_generic_clk_source_names[clk_src].clksrc_name; +} + void dss_dump_clocks(struct seq_file *s) { unsigned long dpll4_ck_rate; @@ -238,12 +249,16 @@ void dss_dump_clocks(struct seq_file *s) seq_printf(s, "dpll4_ck %lu\n", dpll4_ck_rate); if (cpu_is_omap3630()) - seq_printf(s, "dss1_alwon_fclk = %lu / %lu = %lu\n", + seq_printf(s, "%s (%s) = %lu / %lu = %lu\n", + dss_get_generic_clk_source_name(DSS_CLK_SRC_FCK), + dss_feat_get_clk_source_name(DSS_CLK_SRC_FCK), dpll4_ck_rate, dpll4_ck_rate / dpll4_m4_ck_rate, dss_clk_get_rate(DSS_CLK_FCK)); else - seq_printf(s, "dss1_alwon_fclk = %lu / %lu * 2 = %lu\n", + seq_printf(s, "%s (%s) = %lu / %lu * 2 = %lu\n", + dss_get_generic_clk_source_name(DSS_CLK_SRC_FCK), + dss_feat_get_clk_source_name(DSS_CLK_SRC_FCK), dpll4_ck_rate, dpll4_ck_rate / dpll4_m4_ck_rate, dss_clk_get_rate(DSS_CLK_FCK)); diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h index a166ff36ec90..42ca70f2bfd5 100644 --- a/drivers/video/omap2/dss/dss.h +++ b/drivers/video/omap2/dss/dss.h @@ -123,6 +123,12 @@ enum dss_clk_source { DSS_CLK_SRC_FCK, /* DSS1_ALWON_FCLK */ }; +/* Correlates clock source name and dss_clk_source member */ +struct dss_clk_source_name { + enum dss_clk_source clksrc; + const char *clksrc_name; +}; + struct dss_clock_info { /* rates that we get with dividers below */ unsigned long fck; @@ -215,6 +221,7 @@ void dss_clk_enable(enum dss_clock clks); void dss_clk_disable(enum dss_clock clks); unsigned long dss_clk_get_rate(enum dss_clock clk); int dss_need_ctx_restore(void); +const char *dss_get_generic_clk_source_name(enum dss_clk_source clk_src); void dss_dump_clocks(struct seq_file *s); void dss_dump_regs(struct seq_file *s); diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c index 3ebe0d91afd2..ccae57b34f5c 100644 --- a/drivers/video/omap2/dss/dss_features.c +++ b/drivers/video/omap2/dss/dss_features.c @@ -25,6 +25,7 @@ #include #include +#include "dss.h" #include "dss_features.h" /* Defines a generic omap register field */ @@ -44,6 +45,7 @@ struct omap_dss_features { const unsigned long max_dss_fck; const enum omap_display_type *supported_displays; const enum omap_color_mode *supported_color_modes; + const struct dss_clk_source_name *clksrc_names; }; /* This struct is assigned to one of the below during initialization */ @@ -157,6 +159,18 @@ static const enum omap_color_mode omap3_dss_supported_color_modes[] = { OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32, }; +static const struct dss_clk_source_name omap2_dss_clk_source_names[] = { + { DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, "N/A" }, + { DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, "N/A" }, + { DSS_CLK_SRC_FCK, "DSS_FCLK1" }, +}; + +static const struct dss_clk_source_name omap3_dss_clk_source_names[] = { + { DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, "DSI1_PLL_FCLK" }, + { DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, "DSI2_PLL_FCLK" }, + { DSS_CLK_SRC_FCK, "DSS1_ALWON_FCLK" }, +}; + /* OMAP2 DSS Features */ static struct omap_dss_features omap2_dss_features = { .reg_fields = omap2_dss_reg_fields, @@ -172,6 +186,7 @@ static struct omap_dss_features omap2_dss_features = { .max_dss_fck = 173000000, .supported_displays = omap2_dss_supported_displays, .supported_color_modes = omap2_dss_supported_color_modes, + .clksrc_names = omap2_dss_clk_source_names, }; /* OMAP3 DSS Features */ @@ -190,6 +205,7 @@ static struct omap_dss_features omap3430_dss_features = { .max_dss_fck = 173000000, .supported_displays = omap3430_dss_supported_displays, .supported_color_modes = omap3_dss_supported_color_modes, + .clksrc_names = omap3_dss_clk_source_names, }; static struct omap_dss_features omap3630_dss_features = { @@ -208,6 +224,7 @@ static struct omap_dss_features omap3630_dss_features = { .max_dss_fck = 173000000, .supported_displays = omap3630_dss_supported_displays, .supported_color_modes = omap3_dss_supported_color_modes, + .clksrc_names = omap3_dss_clk_source_names, }; /* OMAP4 DSS Features */ @@ -224,6 +241,7 @@ static struct omap_dss_features omap4_dss_features = { .max_dss_fck = 186000000, .supported_displays = omap4_dss_supported_displays, .supported_color_modes = omap3_dss_supported_color_modes, + .clksrc_names = omap3_dss_clk_source_names, }; /* Functions returning values related to a DSS feature */ @@ -260,6 +278,11 @@ bool dss_feat_color_mode_supported(enum omap_plane plane, color_mode; } +const char *dss_feat_get_clk_source_name(enum dss_clk_source id) +{ + return omap_current_dss_features->clksrc_names[id].clksrc_name; +} + /* DSS has_feature check */ bool dss_has_feature(enum dss_feat_id id) { diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h index 18ab19515817..65d6de7e0feb 100644 --- a/drivers/video/omap2/dss/dss_features.h +++ b/drivers/video/omap2/dss/dss_features.h @@ -57,6 +57,7 @@ enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane); bool dss_feat_color_mode_supported(enum omap_plane plane, enum omap_color_mode color_mode); +const char *dss_feat_get_clk_source_name(enum dss_clk_source id); bool dss_has_feature(enum dss_feat_id id); void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end); -- cgit v1.2.3 From 1bb478350670fadf708d3cbd6137c32dfbe3fd5f Mon Sep 17 00:00:00 2001 From: Archit Taneja Date: Thu, 24 Feb 2011 14:17:30 +0530 Subject: OMAP2PLUS: DSS2: DSI: Generalize DSI PLL Clock Naming DSI PLL output clock names have been made more generic. The clock name describes what the source of the clock and what clock is used for. Some of DSI PLL parameters like dividers and DSI PLL source have also been made more generic. dsi1_pll_fclk and dsi2_pll_fclk have been changed as dsi_pll_hsdiv_dispc_clk and dsi_pll_hsdiv_dsi_clk respectively. Also, the hsdividers are now named regm_dispc and regm_dsi instead of regm3 and regm4. Functions and macros named on the basis of these clock names have also been made generic. Signed-off-by: Archit Taneja Signed-off-by: Tomi Valkeinen --- arch/arm/plat-omap/include/plat/display.h | 4 +- drivers/video/omap2/dss/dispc.c | 2 +- drivers/video/omap2/dss/dpi.c | 4 +- drivers/video/omap2/dss/dsi.c | 134 ++++++++++++++++-------------- drivers/video/omap2/dss/dss.c | 4 +- drivers/video/omap2/dss/dss.h | 20 ++--- 6 files changed, 87 insertions(+), 81 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/arch/arm/plat-omap/include/plat/display.h b/arch/arm/plat-omap/include/plat/display.h index 4101bcd2133e..37658249e483 100644 --- a/arch/arm/plat-omap/include/plat/display.h +++ b/arch/arm/plat-omap/include/plat/display.h @@ -403,8 +403,8 @@ struct omap_dss_device { struct { u16 regn; u16 regm; - u16 regm3; - u16 regm4; + u16 regm_dispc; + u16 regm_dsi; u16 lp_clk_div; diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 2c82d9a3df4b..9fb11c17623f 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -2338,7 +2338,7 @@ unsigned long dispc_fclk_rate(void) r = dss_clk_get_rate(DSS_CLK_FCK); else #ifdef CONFIG_OMAP2_DSS_DSI - r = dsi_get_dsi1_pll_rate(); + r = dsi_get_pll_hsdiv_dispc_rate(); #else BUG(); #endif diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c index 1b2867dfeeb9..08fed3080c0a 100644 --- a/drivers/video/omap2/dss/dpi.c +++ b/drivers/video/omap2/dss/dpi.c @@ -63,7 +63,7 @@ static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft, if (r) return r; - *fck = dsi_cinfo.dsi1_pll_fclk; + *fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk; *lck_div = dispc_cinfo.lck_div; *pck_div = dispc_cinfo.pck_div; @@ -271,7 +271,7 @@ int dpi_check_timings(struct omap_dss_device *dssdev, if (r) return r; - fck = dsi_cinfo.dsi1_pll_fclk; + fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk; lck_div = dispc_cinfo.lck_div; pck_div = dispc_cinfo.pck_div; } diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 3ef94227bbe7..37ffbb6ecf69 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -189,8 +189,8 @@ struct dsi_reg { u16 idx; }; #define FINT_MIN 750000 #define REGN_MAX (1 << 7) #define REGM_MAX ((1 << 11) - 1) -#define REGM3_MAX (1 << 4) -#define REGM4_MAX (1 << 4) +#define REGM_DISPC_MAX (1 << 4) +#define REGM_DSI_MAX (1 << 4) #define LP_DIV_MAX ((1 << 13) - 1) enum fifo_size { @@ -642,7 +642,7 @@ static void dsi_vc_disable_bta_irq(int channel) dsi_write_reg(DSI_VC_IRQENABLE(channel), l); } -/* DSI func clock. this could also be DSI2_PLL_FCLK */ +/* DSI func clock. this could also be dsi_pll_hsdiv_dsi_clk */ static inline void enable_clocks(bool enable) { if (enable) @@ -712,14 +712,14 @@ static inline int dsi_if_enable(bool enable) return 0; } -unsigned long dsi_get_dsi1_pll_rate(void) +unsigned long dsi_get_pll_hsdiv_dispc_rate(void) { - return dsi.current_cinfo.dsi1_pll_fclk; + return dsi.current_cinfo.dsi_pll_hsdiv_dispc_clk; } -static unsigned long dsi_get_dsi2_pll_rate(void) +static unsigned long dsi_get_pll_hsdiv_dsi_rate(void) { - return dsi.current_cinfo.dsi2_pll_fclk; + return dsi.current_cinfo.dsi_pll_hsdiv_dsi_clk; } static unsigned long dsi_get_txbyteclkhs(void) @@ -732,11 +732,11 @@ static unsigned long dsi_fclk_rate(void) unsigned long r; if (dss_get_dsi_clk_source() == DSS_CLK_SRC_FCK) { - /* DSI FCLK source is DSS1_ALWON_FCK, which is dss1_fck */ + /* DSI FCLK source is DSS_CLK_FCK */ r = dss_clk_get_rate(DSS_CLK_FCK); } else { - /* DSI FCLK source is DSI2_PLL_FCLK */ - r = dsi_get_dsi2_pll_rate(); + /* DSI FCLK source is dsi_pll_hsdiv_dsi_clk */ + r = dsi_get_pll_hsdiv_dsi_rate(); } return r; @@ -806,16 +806,16 @@ static int dsi_calc_clock_rates(struct omap_dss_device *dssdev, if (cinfo->regm == 0 || cinfo->regm > REGM_MAX) return -EINVAL; - if (cinfo->regm3 > REGM3_MAX) + if (cinfo->regm_dispc > REGM_DISPC_MAX) return -EINVAL; - if (cinfo->regm4 > REGM4_MAX) + if (cinfo->regm_dsi > REGM_DSI_MAX) return -EINVAL; - if (cinfo->use_dss2_fck) { + if (cinfo->use_sys_clk) { cinfo->clkin = dss_clk_get_rate(DSS_CLK_SYSCK); /* XXX it is unclear if highfreq should be used - * with DSS2_FCK source also */ + * with DSS_SYS_CLK source also */ cinfo->highfreq = 0; } else { cinfo->clkin = dispc_pclk_rate(dssdev->manager->id); @@ -836,15 +836,17 @@ static int dsi_calc_clock_rates(struct omap_dss_device *dssdev, if (cinfo->clkin4ddr > 1800 * 1000 * 1000) return -EINVAL; - if (cinfo->regm3 > 0) - cinfo->dsi1_pll_fclk = cinfo->clkin4ddr / cinfo->regm3; + if (cinfo->regm_dispc > 0) + cinfo->dsi_pll_hsdiv_dispc_clk = + cinfo->clkin4ddr / cinfo->regm_dispc; else - cinfo->dsi1_pll_fclk = 0; + cinfo->dsi_pll_hsdiv_dispc_clk = 0; - if (cinfo->regm4 > 0) - cinfo->dsi2_pll_fclk = cinfo->clkin4ddr / cinfo->regm4; + if (cinfo->regm_dsi > 0) + cinfo->dsi_pll_hsdiv_dsi_clk = + cinfo->clkin4ddr / cinfo->regm_dsi; else - cinfo->dsi2_pll_fclk = 0; + cinfo->dsi_pll_hsdiv_dsi_clk = 0; return 0; } @@ -857,18 +859,18 @@ int dsi_pll_calc_clock_div_pck(bool is_tft, unsigned long req_pck, struct dispc_clock_info best_dispc; int min_fck_per_pck; int match = 0; - unsigned long dss_clk_fck2, max_dss_fck; + unsigned long dss_sys_clk, max_dss_fck; - dss_clk_fck2 = dss_clk_get_rate(DSS_CLK_SYSCK); + dss_sys_clk = dss_clk_get_rate(DSS_CLK_SYSCK); max_dss_fck = dss_feat_get_max_dss_fck(); if (req_pck == dsi.cache_req_pck && - dsi.cache_cinfo.clkin == dss_clk_fck2) { + dsi.cache_cinfo.clkin == dss_sys_clk) { DSSDBG("DSI clock info found from cache\n"); *dsi_cinfo = dsi.cache_cinfo; - dispc_find_clk_divs(is_tft, req_pck, dsi_cinfo->dsi1_pll_fclk, - dispc_cinfo); + dispc_find_clk_divs(is_tft, req_pck, + dsi_cinfo->dsi_pll_hsdiv_dispc_clk, dispc_cinfo); return 0; } @@ -889,8 +891,8 @@ retry: memset(&best_dispc, 0, sizeof(best_dispc)); memset(&cur, 0, sizeof(cur)); - cur.clkin = dss_clk_fck2; - cur.use_dss2_fck = 1; + cur.clkin = dss_sys_clk; + cur.use_sys_clk = 1; cur.highfreq = 0; /* no highfreq: 0.75MHz < Fint = clkin / regn < 2.1MHz */ @@ -916,30 +918,32 @@ retry: if (cur.clkin4ddr > 1800 * 1000 * 1000) break; - /* DSI1_PLL_FCLK(MHz) = DSIPHY(MHz) / regm3 < 173MHz */ - for (cur.regm3 = 1; cur.regm3 < REGM3_MAX; - ++cur.regm3) { + /* dsi_pll_hsdiv_dispc_clk(MHz) = + * DSIPHY(MHz) / regm_dispc < 173MHz/186Mhz */ + for (cur.regm_dispc = 1; cur.regm_dispc < REGM_DISPC_MAX; + ++cur.regm_dispc) { struct dispc_clock_info cur_dispc; - cur.dsi1_pll_fclk = cur.clkin4ddr / cur.regm3; + cur.dsi_pll_hsdiv_dispc_clk = + cur.clkin4ddr / cur.regm_dispc; /* this will narrow down the search a bit, * but still give pixclocks below what was * requested */ - if (cur.dsi1_pll_fclk < req_pck) + if (cur.dsi_pll_hsdiv_dispc_clk < req_pck) break; - if (cur.dsi1_pll_fclk > max_dss_fck) + if (cur.dsi_pll_hsdiv_dispc_clk > max_dss_fck) continue; if (min_fck_per_pck && - cur.dsi1_pll_fclk < + cur.dsi_pll_hsdiv_dispc_clk < req_pck * min_fck_per_pck) continue; match = 1; dispc_find_clk_divs(is_tft, req_pck, - cur.dsi1_pll_fclk, + cur.dsi_pll_hsdiv_dispc_clk, &cur_dispc); if (abs(cur_dispc.pck - req_pck) < @@ -968,9 +972,9 @@ found: return -EINVAL; } - /* DSI2_PLL_FCLK (regm4) is not used */ - best.regm4 = 0; - best.dsi2_pll_fclk = 0; + /* dsi_pll_hsdiv_dsi_clk (regm_dsi) is not used */ + best.regm_dsi = 0; + best.dsi_pll_hsdiv_dsi_clk = 0; if (dsi_cinfo) *dsi_cinfo = best; @@ -994,18 +998,20 @@ int dsi_pll_set_clock_div(struct dsi_clock_info *cinfo) dsi.current_cinfo.fint = cinfo->fint; dsi.current_cinfo.clkin4ddr = cinfo->clkin4ddr; - dsi.current_cinfo.dsi1_pll_fclk = cinfo->dsi1_pll_fclk; - dsi.current_cinfo.dsi2_pll_fclk = cinfo->dsi2_pll_fclk; + dsi.current_cinfo.dsi_pll_hsdiv_dispc_clk = + cinfo->dsi_pll_hsdiv_dispc_clk; + dsi.current_cinfo.dsi_pll_hsdiv_dsi_clk = + cinfo->dsi_pll_hsdiv_dsi_clk; dsi.current_cinfo.regn = cinfo->regn; dsi.current_cinfo.regm = cinfo->regm; - dsi.current_cinfo.regm3 = cinfo->regm3; - dsi.current_cinfo.regm4 = cinfo->regm4; + dsi.current_cinfo.regm_dispc = cinfo->regm_dispc; + dsi.current_cinfo.regm_dsi = cinfo->regm_dsi; DSSDBG("DSI Fint %ld\n", cinfo->fint); DSSDBG("clkin (%s) rate %ld, highfreq %d\n", - cinfo->use_dss2_fck ? "dss2_fck" : "pclkfree", + cinfo->use_sys_clk ? "dss_sys_clk" : "pclkfree", cinfo->clkin, cinfo->highfreq); @@ -1022,14 +1028,14 @@ int dsi_pll_set_clock_div(struct dsi_clock_info *cinfo) DSSDBG("Clock lane freq %ld Hz\n", cinfo->clkin4ddr / 4); - DSSDBG("regm3 = %d, %s (%s) = %lu\n", cinfo->regm3, + DSSDBG("regm_dispc = %d, %s (%s) = %lu\n", cinfo->regm_dispc, dss_get_generic_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC), dss_feat_get_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC), - cinfo->dsi1_pll_fclk); - DSSDBG("regm4 = %d, %s (%s) = %lu\n", cinfo->regm4, + cinfo->dsi_pll_hsdiv_dispc_clk); + DSSDBG("regm_dsi = %d, %s (%s) = %lu\n", cinfo->regm_dsi, dss_get_generic_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DSI), dss_feat_get_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DSI), - cinfo->dsi2_pll_fclk); + cinfo->dsi_pll_hsdiv_dsi_clk); REG_FLD_MOD(DSI_PLL_CONTROL, 0, 0, 0); /* DSI_PLL_AUTOMODE = manual */ @@ -1037,9 +1043,9 @@ int dsi_pll_set_clock_div(struct dsi_clock_info *cinfo) l = FLD_MOD(l, 1, 0, 0); /* DSI_PLL_STOPMODE */ l = FLD_MOD(l, cinfo->regn - 1, 7, 1); /* DSI_PLL_REGN */ l = FLD_MOD(l, cinfo->regm, 18, 8); /* DSI_PLL_REGM */ - l = FLD_MOD(l, cinfo->regm3 > 0 ? cinfo->regm3 - 1 : 0, + l = FLD_MOD(l, cinfo->regm_dispc > 0 ? cinfo->regm_dispc - 1 : 0, 22, 19); /* DSI_CLOCK_DIV */ - l = FLD_MOD(l, cinfo->regm4 > 0 ? cinfo->regm4 - 1 : 0, + l = FLD_MOD(l, cinfo->regm_dsi > 0 ? cinfo->regm_dsi - 1 : 0, 26, 23); /* DSIPROTO_CLOCK_DIV */ dsi_write_reg(DSI_PLL_CONFIGURATION1, l); @@ -1057,7 +1063,7 @@ int dsi_pll_set_clock_div(struct dsi_clock_info *cinfo) l = dsi_read_reg(DSI_PLL_CONFIGURATION2); l = FLD_MOD(l, f, 4, 1); /* DSI_PLL_FREQSEL */ - l = FLD_MOD(l, cinfo->use_dss2_fck ? 0 : 1, + l = FLD_MOD(l, cinfo->use_sys_clk ? 0 : 1, 11, 11); /* DSI_PLL_CLKSEL */ l = FLD_MOD(l, cinfo->highfreq, 12, 12); /* DSI_PLL_HIGHFREQ */ @@ -1186,26 +1192,26 @@ void dsi_dump_clocks(struct seq_file *s) seq_printf(s, "dsi pll source = %s\n", clksel == 0 ? - "dss2_alwon_fclk" : "pclkfree"); + "dss_sys_clk" : "pclkfree"); seq_printf(s, "Fint\t\t%-16luregn %u\n", cinfo->fint, cinfo->regn); seq_printf(s, "CLKIN4DDR\t%-16luregm %u\n", cinfo->clkin4ddr, cinfo->regm); - seq_printf(s, "%s (%s)\t%-16luregm3 %u\t(%s)\n", + seq_printf(s, "%s (%s)\t%-16luregm_dispc %u\t(%s)\n", dss_get_generic_clk_source_name(dispc_clk_src), dss_feat_get_clk_source_name(dispc_clk_src), - cinfo->dsi1_pll_fclk, - cinfo->regm3, + cinfo->dsi_pll_hsdiv_dispc_clk, + cinfo->regm_dispc, dispc_clk_src == DSS_CLK_SRC_FCK ? "off" : "on"); - seq_printf(s, "%s (%s)\t%-16luregm4 %u\t(%s)\n", + seq_printf(s, "%s (%s)\t%-16luregm_dsi %u\t(%s)\n", dss_get_generic_clk_source_name(dsi_clk_src), dss_feat_get_clk_source_name(dsi_clk_src), - cinfo->dsi2_pll_fclk, - cinfo->regm4, + cinfo->dsi_pll_hsdiv_dsi_clk, + cinfo->regm_dsi, dsi_clk_src == DSS_CLK_SRC_FCK ? "off" : "on"); @@ -2989,12 +2995,12 @@ static int dsi_configure_dsi_clocks(struct omap_dss_device *dssdev) struct dsi_clock_info cinfo; int r; - /* we always use DSS2_FCK as input clock */ - cinfo.use_dss2_fck = true; + /* we always use DSS_CLK_SYSCK as input clock */ + cinfo.use_sys_clk = true; cinfo.regn = dssdev->phy.dsi.div.regn; cinfo.regm = dssdev->phy.dsi.div.regm; - cinfo.regm3 = dssdev->phy.dsi.div.regm3; - cinfo.regm4 = dssdev->phy.dsi.div.regm4; + cinfo.regm_dispc = dssdev->phy.dsi.div.regm_dispc; + cinfo.regm_dsi = dssdev->phy.dsi.div.regm_dsi; r = dsi_calc_clock_rates(dssdev, &cinfo); if (r) { DSSERR("Failed to calc dsi clocks\n"); @@ -3016,7 +3022,7 @@ static int dsi_configure_dispc_clocks(struct omap_dss_device *dssdev) int r; unsigned long long fck; - fck = dsi_get_dsi1_pll_rate(); + fck = dsi_get_pll_hsdiv_dispc_rate(); dispc_cinfo.lck_div = dssdev->phy.dsi.div.lck_div; dispc_cinfo.pck_div = dssdev->phy.dsi.div.pck_div; @@ -3244,7 +3250,7 @@ int dsi_init_display(struct omap_dss_device *dssdev) return 0; } -void dsi_wait_dsi1_pll_active(void) +void dsi_wait_pll_hsdiv_dispc_active(void) { if (wait_for_bit_change(DSI_PLL_STATUS, 7, 1) != 1) DSSERR("%s (%s) not active\n", @@ -3252,7 +3258,7 @@ void dsi_wait_dsi1_pll_active(void) dss_feat_get_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC)); } -void dsi_wait_dsi2_pll_active(void) +void dsi_wait_pll_hsdiv_dsi_active(void) { if (wait_for_bit_change(DSI_PLL_STATUS, 8, 1) != 1) DSSERR("%s (%s) not active\n", diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index d049598bb412..5c6805b3362d 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -299,7 +299,7 @@ void dss_select_dispc_clk_source(enum dss_clk_source clk_src) b = clk_src == DSS_CLK_SRC_FCK ? 0 : 1; if (clk_src == DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC) - dsi_wait_dsi1_pll_active(); + dsi_wait_pll_hsdiv_dispc_active(); REG_FLD_MOD(DSS_CONTROL, b, 0, 0); /* DISPC_CLK_SWITCH */ @@ -316,7 +316,7 @@ void dss_select_dsi_clk_source(enum dss_clk_source clk_src) b = clk_src == DSS_CLK_SRC_FCK ? 0 : 1; if (clk_src == DSS_CLK_SRC_DSI_PLL_HSDIV_DSI) - dsi_wait_dsi2_pll_active(); + dsi_wait_pll_hsdiv_dsi_active(); REG_FLD_MOD(DSS_CONTROL, b, 1, 1); /* DSI_CLK_SWITCH */ diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h index 42ca70f2bfd5..20590fb53c91 100644 --- a/drivers/video/omap2/dss/dss.h +++ b/drivers/video/omap2/dss/dss.h @@ -152,21 +152,21 @@ struct dsi_clock_info { unsigned long fint; unsigned long clkin4ddr; unsigned long clkin; - unsigned long dsi1_pll_fclk; - unsigned long dsi2_pll_fclk; + unsigned long dsi_pll_hsdiv_dispc_clk; /* DSI1_PLL_CLK */ + unsigned long dsi_pll_hsdiv_dsi_clk; /* DSI2_PLL_CLK */ unsigned long lp_clk; /* dividers */ u16 regn; u16 regm; - u16 regm3; - u16 regm4; + u16 regm_dispc; /* REGM3 */ + u16 regm_dsi; /* REGM4 */ u16 lp_clk_div; u8 highfreq; - bool use_dss2_fck; + bool use_sys_clk; }; struct seq_file; @@ -278,7 +278,7 @@ void dsi_restore_context(void); int dsi_init_display(struct omap_dss_device *display); void dsi_irq_handler(void); -unsigned long dsi_get_dsi1_pll_rate(void); +unsigned long dsi_get_pll_hsdiv_dispc_rate(void); int dsi_pll_set_clock_div(struct dsi_clock_info *cinfo); int dsi_pll_calc_clock_div_pck(bool is_tft, unsigned long req_pck, struct dsi_clock_info *cinfo, @@ -289,8 +289,8 @@ void dsi_pll_uninit(void); void dsi_get_overlay_fifo_thresholds(enum omap_plane plane, u32 fifo_size, enum omap_burst_size *burst_size, u32 *fifo_low, u32 *fifo_high); -void dsi_wait_dsi1_pll_active(void); -void dsi_wait_dsi2_pll_active(void); +void dsi_wait_pll_hsdiv_dispc_active(void); +void dsi_wait_pll_hsdiv_dsi_active(void); #else static inline int dsi_init_platform_driver(void) { @@ -299,10 +299,10 @@ static inline int dsi_init_platform_driver(void) static inline void dsi_uninit_platform_driver(void) { } -static inline void dsi_wait_dsi1_pll_active(void) +static inline void dsi_wait_pll_hsdiv_dispc_active(void) { } -static inline void dsi_wait_dsi2_pll_active(void) +static inline void dsi_wait_pll_hsdiv_dsi_active(void) { } #endif -- cgit v1.2.3 From 5ee3c1445dd89342ca8498c14afef82d0f76c794 Mon Sep 17 00:00:00 2001 From: Archit Taneja Date: Wed, 2 Mar 2011 12:35:53 +0530 Subject: OMAP: DSS2: Functions to request/release DSI VCs Introduce functions which request and release VC's. This will be used in panel drivers in their probes. omap_dsi_request_vc() takes in the pointer to the omap_dss_device, the VC_ID parameter which goes into the header of the DSI packets, and returns a Virtual channel number (or virtual channel register set) which it can use. omap_dsi_set_vc_id() takes the omap_dss_device pointer, the Virtual Channel number and the VC_ID that needs to be set for the specifed Virtual Channel. omap_dsi_release_vc() takes the omap_dss_device pointer and the Virtual Channel number that needs to be made free. Initialisation of VC parameters is done in dsi_init(). Signed-off-by: Archit Taneja Signed-off-by: Tomi Valkeinen --- arch/arm/plat-omap/include/plat/display.h | 3 ++ drivers/video/omap2/dss/dsi.c | 67 ++++++++++++++++++++++++++++--- 2 files changed, 65 insertions(+), 5 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/arch/arm/plat-omap/include/plat/display.h b/arch/arm/plat-omap/include/plat/display.h index 37658249e483..e81ca66dfbb4 100644 --- a/arch/arm/plat-omap/include/plat/display.h +++ b/arch/arm/plat-omap/include/plat/display.h @@ -562,6 +562,9 @@ int omap_dsi_update(struct omap_dss_device *dssdev, int channel, u16 x, u16 y, u16 w, u16 h, void (*callback)(int, void *), void *data); +int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel); +int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id); +void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel); int omapdss_dsi_display_enable(struct omap_dss_device *dssdev); void omapdss_dsi_display_disable(struct omap_dss_device *dssdev); diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 37ffbb6ecf69..fe3578bbff7d 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -233,6 +233,7 @@ static struct enum dsi_vc_mode mode; struct omap_dss_device *dssdev; enum fifo_size fifo_size; + int vc_id; } vc[4]; struct mutex lock; @@ -1764,8 +1765,6 @@ static void dsi_vc_initial_config(int channel) r = FLD_MOD(r, 4, 23, 21); /* DMA_TX_REQ_NB = no dma */ dsi_write_reg(DSI_VC_CTRL(channel), r); - - dsi.vc[channel].mode = DSI_VC_MODE_L4; } static int dsi_vc_config_l4(int channel) @@ -1972,7 +1971,7 @@ static inline void dsi_vc_write_long_header(int channel, u8 data_type, WARN_ON(!dsi_bus_is_locked()); - data_id = data_type | channel << 6; + data_id = data_type | dsi.vc[channel].vc_id << 6; val = FLD_VAL(data_id, 7, 0) | FLD_VAL(len, 23, 8) | FLD_VAL(ecc, 31, 24); @@ -2075,7 +2074,7 @@ static int dsi_vc_send_short(int channel, u8 data_type, u16 data, u8 ecc) return -EINVAL; } - data_id = data_type | channel << 6; + data_id = data_type | dsi.vc[channel].vc_id << 6; r = (data_id << 0) | (data << 8) | (ecc << 24); @@ -3250,6 +3249,57 @@ int dsi_init_display(struct omap_dss_device *dssdev) return 0; } +int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(dsi.vc); i++) { + if (!dsi.vc[i].dssdev) { + dsi.vc[i].dssdev = dssdev; + *channel = i; + return 0; + } + } + + DSSERR("cannot get VC for display %s", dssdev->name); + return -ENOSPC; +} +EXPORT_SYMBOL(omap_dsi_request_vc); + +int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id) +{ + if (vc_id < 0 || vc_id > 3) { + DSSERR("VC ID out of range\n"); + return -EINVAL; + } + + if (channel < 0 || channel > 3) { + DSSERR("Virtual Channel out of range\n"); + return -EINVAL; + } + + if (dsi.vc[channel].dssdev != dssdev) { + DSSERR("Virtual Channel not allocated to display %s\n", + dssdev->name); + return -EINVAL; + } + + dsi.vc[channel].vc_id = vc_id; + + return 0; +} +EXPORT_SYMBOL(omap_dsi_set_vc_id); + +void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel) +{ + if ((channel >= 0 && channel <= 3) && + dsi.vc[channel].dssdev == dssdev) { + dsi.vc[channel].dssdev = NULL; + dsi.vc[channel].vc_id = 0; + } +} +EXPORT_SYMBOL(omap_dsi_release_vc); + void dsi_wait_pll_hsdiv_dispc_active(void) { if (wait_for_bit_change(DSI_PLL_STATUS, 7, 1) != 1) @@ -3269,7 +3319,7 @@ void dsi_wait_pll_hsdiv_dsi_active(void) static int dsi_init(struct platform_device *pdev) { u32 rev; - int r; + int r, i; struct resource *dsi_mem; spin_lock_init(&dsi.errors_lock); @@ -3323,6 +3373,13 @@ static int dsi_init(struct platform_device *pdev) goto err2; } + /* DSI VCs initialization */ + for (i = 0; i < ARRAY_SIZE(dsi.vc); i++) { + dsi.vc[i].mode = DSI_VC_MODE_L4; + dsi.vc[i].dssdev = NULL; + dsi.vc[i].vc_id = 0; + } + enable_clocks(1); rev = dsi_read_reg(DSI_REVISION); -- cgit v1.2.3 From bc6d4b1d3d9b7568fe88f5bb80d0266a7ef624cc Mon Sep 17 00:00:00 2001 From: Archit Taneja Date: Tue, 1 Mar 2011 13:59:46 +0530 Subject: OMAP: DSS2: Use request / release calls in Taal for DSI Virtual Channels. Taal driver used to take a hard coded Macro for Virtual Channel and the VC_ID. The Taal panel driver now requests for a Virtual channel through the omap_dsi_request_vc() call in taal_probe(). The channel number returned by the request_vc() call is used for sending command and data to the Panel. The DSI driver automatically configures the Virtual Channel's source to either Video Port or L4 Slave port based on what the panel driver is using it for. The driver uses omap_dsi_release_vc() to free the VC specified by the panel. taal_remove() or when a request_vc() call fails. Signed-off-by: Archit Taneja Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/displays/panel-taal.c | 123 +++++++++++++++++------------- drivers/video/omap2/dss/dsi.c | 3 - 2 files changed, 71 insertions(+), 55 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/displays/panel-taal.c b/drivers/video/omap2/displays/panel-taal.c index 61026f96ad20..abdfdd81001f 100644 --- a/drivers/video/omap2/displays/panel-taal.c +++ b/drivers/video/omap2/displays/panel-taal.c @@ -218,6 +218,8 @@ struct taal_data { u16 w; u16 h; } update_region; + int channel; + struct delayed_work te_timeout_work; bool use_dsi_bl; @@ -257,12 +259,12 @@ static void hw_guard_wait(struct taal_data *td) } } -static int taal_dcs_read_1(u8 dcs_cmd, u8 *data) +static int taal_dcs_read_1(struct taal_data *td, u8 dcs_cmd, u8 *data) { int r; u8 buf[1]; - r = dsi_vc_dcs_read(TCH, dcs_cmd, buf, 1); + r = dsi_vc_dcs_read(td->channel, dcs_cmd, buf, 1); if (r < 0) return r; @@ -272,17 +274,17 @@ static int taal_dcs_read_1(u8 dcs_cmd, u8 *data) return 0; } -static int taal_dcs_write_0(u8 dcs_cmd) +static int taal_dcs_write_0(struct taal_data *td, u8 dcs_cmd) { - return dsi_vc_dcs_write(TCH, &dcs_cmd, 1); + return dsi_vc_dcs_write(td->channel, &dcs_cmd, 1); } -static int taal_dcs_write_1(u8 dcs_cmd, u8 param) +static int taal_dcs_write_1(struct taal_data *td, u8 dcs_cmd, u8 param) { u8 buf[2]; buf[0] = dcs_cmd; buf[1] = param; - return dsi_vc_dcs_write(TCH, buf, 2); + return dsi_vc_dcs_write(td->channel, buf, 2); } static int taal_sleep_in(struct taal_data *td) @@ -294,7 +296,7 @@ static int taal_sleep_in(struct taal_data *td) hw_guard_wait(td); cmd = DCS_SLEEP_IN; - r = dsi_vc_dcs_write_nosync(TCH, &cmd, 1); + r = dsi_vc_dcs_write_nosync(td->channel, &cmd, 1); if (r) return r; @@ -312,7 +314,7 @@ static int taal_sleep_out(struct taal_data *td) hw_guard_wait(td); - r = taal_dcs_write_0(DCS_SLEEP_OUT); + r = taal_dcs_write_0(td, DCS_SLEEP_OUT); if (r) return r; @@ -324,30 +326,30 @@ static int taal_sleep_out(struct taal_data *td) return 0; } -static int taal_get_id(u8 *id1, u8 *id2, u8 *id3) +static int taal_get_id(struct taal_data *td, u8 *id1, u8 *id2, u8 *id3) { int r; - r = taal_dcs_read_1(DCS_GET_ID1, id1); + r = taal_dcs_read_1(td, DCS_GET_ID1, id1); if (r) return r; - r = taal_dcs_read_1(DCS_GET_ID2, id2); + r = taal_dcs_read_1(td, DCS_GET_ID2, id2); if (r) return r; - r = taal_dcs_read_1(DCS_GET_ID3, id3); + r = taal_dcs_read_1(td, DCS_GET_ID3, id3); if (r) return r; return 0; } -static int taal_set_addr_mode(u8 rotate, bool mirror) +static int taal_set_addr_mode(struct taal_data *td, u8 rotate, bool mirror) { int r; u8 mode; int b5, b6, b7; - r = taal_dcs_read_1(DCS_READ_MADCTL, &mode); + r = taal_dcs_read_1(td, DCS_READ_MADCTL, &mode); if (r) return r; @@ -381,10 +383,11 @@ static int taal_set_addr_mode(u8 rotate, bool mirror) mode &= ~((1<<7) | (1<<6) | (1<<5)); mode |= (b7 << 7) | (b6 << 6) | (b5 << 5); - return taal_dcs_write_1(DCS_MEM_ACC_CTRL, mode); + return taal_dcs_write_1(td, DCS_MEM_ACC_CTRL, mode); } -static int taal_set_update_window(u16 x, u16 y, u16 w, u16 h) +static int taal_set_update_window(struct taal_data *td, + u16 x, u16 y, u16 w, u16 h) { int r; u16 x1 = x; @@ -399,7 +402,7 @@ static int taal_set_update_window(u16 x, u16 y, u16 w, u16 h) buf[3] = (x2 >> 8) & 0xff; buf[4] = (x2 >> 0) & 0xff; - r = dsi_vc_dcs_write_nosync(TCH, buf, sizeof(buf)); + r = dsi_vc_dcs_write_nosync(td->channel, buf, sizeof(buf)); if (r) return r; @@ -409,11 +412,11 @@ static int taal_set_update_window(u16 x, u16 y, u16 w, u16 h) buf[3] = (y2 >> 8) & 0xff; buf[4] = (y2 >> 0) & 0xff; - r = dsi_vc_dcs_write_nosync(TCH, buf, sizeof(buf)); + r = dsi_vc_dcs_write_nosync(td->channel, buf, sizeof(buf)); if (r) return r; - dsi_vc_send_bta_sync(TCH); + dsi_vc_send_bta_sync(td->channel); return r; } @@ -439,7 +442,7 @@ static int taal_bl_update_status(struct backlight_device *dev) if (td->use_dsi_bl) { if (td->enabled) { dsi_bus_lock(); - r = taal_dcs_write_1(DCS_BRIGHTNESS, level); + r = taal_dcs_write_1(td, DCS_BRIGHTNESS, level); dsi_bus_unlock(); } else { r = 0; @@ -502,7 +505,7 @@ static ssize_t taal_num_errors_show(struct device *dev, if (td->enabled) { dsi_bus_lock(); - r = taal_dcs_read_1(DCS_READ_NUM_ERRORS, &errors); + r = taal_dcs_read_1(td, DCS_READ_NUM_ERRORS, &errors); dsi_bus_unlock(); } else { r = -ENODEV; @@ -528,7 +531,7 @@ static ssize_t taal_hw_revision_show(struct device *dev, if (td->enabled) { dsi_bus_lock(); - r = taal_get_id(&id1, &id2, &id3); + r = taal_get_id(td, &id1, &id2, &id3); dsi_bus_unlock(); } else { r = -ENODEV; @@ -590,7 +593,7 @@ static ssize_t store_cabc_mode(struct device *dev, if (td->enabled) { dsi_bus_lock(); if (!td->cabc_broken) - taal_dcs_write_1(DCS_WRITE_CABC, i); + taal_dcs_write_1(td, DCS_WRITE_CABC, i); dsi_bus_unlock(); } @@ -774,14 +777,29 @@ static int taal_probe(struct omap_dss_device *dssdev) dev_dbg(&dssdev->dev, "Using GPIO TE\n"); } + r = omap_dsi_request_vc(dssdev, &td->channel); + if (r) { + dev_err(&dssdev->dev, "failed to get virtual channel\n"); + goto err_req_vc; + } + + r = omap_dsi_set_vc_id(dssdev, td->channel, TCH); + if (r) { + dev_err(&dssdev->dev, "failed to set VC_ID\n"); + goto err_vc_id; + } + r = sysfs_create_group(&dssdev->dev.kobj, &taal_attr_group); if (r) { dev_err(&dssdev->dev, "failed to create sysfs files\n"); - goto err_sysfs; + goto err_vc_id; } return 0; -err_sysfs: + +err_vc_id: + omap_dsi_release_vc(dssdev, td->channel); +err_req_vc: if (panel_data->use_ext_te) free_irq(gpio_to_irq(panel_data->ext_te_gpio), dssdev); err_irq: @@ -808,6 +826,7 @@ static void taal_remove(struct omap_dss_device *dssdev) dev_dbg(&dssdev->dev, "remove\n"); sysfs_remove_group(&dssdev->dev.kobj, &taal_attr_group); + omap_dsi_release_vc(dssdev, td->channel); if (panel_data->use_ext_te) { int gpio = panel_data->ext_te_gpio; @@ -846,13 +865,13 @@ static int taal_power_on(struct omap_dss_device *dssdev) taal_hw_reset(dssdev); - omapdss_dsi_vc_enable_hs(TCH, false); + omapdss_dsi_vc_enable_hs(td->channel, false); r = taal_sleep_out(td); if (r) goto err; - r = taal_get_id(&id1, &id2, &id3); + r = taal_get_id(td, &id1, &id2, &id3); if (r) goto err; @@ -861,30 +880,30 @@ static int taal_power_on(struct omap_dss_device *dssdev) (id2 == 0x00 || id2 == 0xff || id2 == 0x81)) td->cabc_broken = true; - r = taal_dcs_write_1(DCS_BRIGHTNESS, 0xff); + r = taal_dcs_write_1(td, DCS_BRIGHTNESS, 0xff); if (r) goto err; - r = taal_dcs_write_1(DCS_CTRL_DISPLAY, + r = taal_dcs_write_1(td, DCS_CTRL_DISPLAY, (1<<2) | (1<<5)); /* BL | BCTRL */ if (r) goto err; - r = taal_dcs_write_1(DCS_PIXEL_FORMAT, 0x7); /* 24bit/pixel */ + r = taal_dcs_write_1(td, DCS_PIXEL_FORMAT, 0x7); /* 24bit/pixel */ if (r) goto err; - r = taal_set_addr_mode(td->rotate, td->mirror); + r = taal_set_addr_mode(td, td->rotate, td->mirror); if (r) goto err; if (!td->cabc_broken) { - r = taal_dcs_write_1(DCS_WRITE_CABC, td->cabc_mode); + r = taal_dcs_write_1(td, DCS_WRITE_CABC, td->cabc_mode); if (r) goto err; } - r = taal_dcs_write_0(DCS_DISPLAY_ON); + r = taal_dcs_write_0(td, DCS_DISPLAY_ON); if (r) goto err; @@ -903,7 +922,7 @@ static int taal_power_on(struct omap_dss_device *dssdev) td->intro_printed = true; } - omapdss_dsi_vc_enable_hs(TCH, true); + omapdss_dsi_vc_enable_hs(td->channel, true); return 0; err: @@ -921,7 +940,7 @@ static void taal_power_off(struct omap_dss_device *dssdev) struct taal_data *td = dev_get_drvdata(&dssdev->dev); int r; - r = taal_dcs_write_0(DCS_DISPLAY_OFF); + r = taal_dcs_write_0(td, DCS_DISPLAY_OFF); if (!r) { r = taal_sleep_in(td); /* HACK: wait a bit so that the message goes through */ @@ -1089,7 +1108,7 @@ static irqreturn_t taal_te_isr(int irq, void *data) if (old) { cancel_delayed_work(&td->te_timeout_work); - r = omap_dsi_update(dssdev, TCH, + r = omap_dsi_update(dssdev, td->channel, td->update_region.x, td->update_region.y, td->update_region.w, @@ -1139,7 +1158,7 @@ static int taal_update(struct omap_dss_device *dssdev, if (r) goto err; - r = taal_set_update_window(x, y, w, h); + r = taal_set_update_window(td, x, y, w, h); if (r) goto err; @@ -1153,7 +1172,7 @@ static int taal_update(struct omap_dss_device *dssdev, msecs_to_jiffies(250)); atomic_set(&td->do_update, 1); } else { - r = omap_dsi_update(dssdev, TCH, x, y, w, h, + r = omap_dsi_update(dssdev, td->channel, x, y, w, h, taal_framedone_cb, dssdev); if (r) goto err; @@ -1191,9 +1210,9 @@ static int _taal_enable_te(struct omap_dss_device *dssdev, bool enable) int r; if (enable) - r = taal_dcs_write_1(DCS_TEAR_ON, 0); + r = taal_dcs_write_1(td, DCS_TEAR_ON, 0); else - r = taal_dcs_write_0(DCS_TEAR_OFF); + r = taal_dcs_write_0(td, DCS_TEAR_OFF); if (!panel_data->use_ext_te) omapdss_dsi_enable_te(dssdev, enable); @@ -1263,7 +1282,7 @@ static int taal_rotate(struct omap_dss_device *dssdev, u8 rotate) dsi_bus_lock(); if (td->enabled) { - r = taal_set_addr_mode(rotate, td->mirror); + r = taal_set_addr_mode(td, rotate, td->mirror); if (r) goto err; } @@ -1306,7 +1325,7 @@ static int taal_mirror(struct omap_dss_device *dssdev, bool enable) dsi_bus_lock(); if (td->enabled) { - r = taal_set_addr_mode(td->rotate, enable); + r = taal_set_addr_mode(td, td->rotate, enable); if (r) goto err; } @@ -1350,13 +1369,13 @@ static int taal_run_test(struct omap_dss_device *dssdev, int test_num) dsi_bus_lock(); - r = taal_dcs_read_1(DCS_GET_ID1, &id1); + r = taal_dcs_read_1(td, DCS_GET_ID1, &id1); if (r) goto err2; - r = taal_dcs_read_1(DCS_GET_ID2, &id2); + r = taal_dcs_read_1(td, DCS_GET_ID2, &id2); if (r) goto err2; - r = taal_dcs_read_1(DCS_GET_ID3, &id3); + r = taal_dcs_read_1(td, DCS_GET_ID3, &id3); if (r) goto err2; @@ -1404,9 +1423,9 @@ static int taal_memory_read(struct omap_dss_device *dssdev, else plen = 2; - taal_set_update_window(x, y, w, h); + taal_set_update_window(td, x, y, w, h); - r = dsi_vc_set_max_rx_packet_size(TCH, plen); + r = dsi_vc_set_max_rx_packet_size(td->channel, plen); if (r) goto err2; @@ -1414,7 +1433,7 @@ static int taal_memory_read(struct omap_dss_device *dssdev, u8 dcs_cmd = first ? 0x2e : 0x3e; first = 0; - r = dsi_vc_dcs_read(TCH, dcs_cmd, + r = dsi_vc_dcs_read(td->channel, dcs_cmd, buf + buf_used, size - buf_used); if (r < 0) { @@ -1440,7 +1459,7 @@ static int taal_memory_read(struct omap_dss_device *dssdev, r = buf_used; err3: - dsi_vc_set_max_rx_packet_size(TCH, 1); + dsi_vc_set_max_rx_packet_size(td->channel, 1); err2: dsi_bus_unlock(); err1: @@ -1466,7 +1485,7 @@ static void taal_esd_work(struct work_struct *work) dsi_bus_lock(); - r = taal_dcs_read_1(DCS_RDDSDR, &state1); + r = taal_dcs_read_1(td, DCS_RDDSDR, &state1); if (r) { dev_err(&dssdev->dev, "failed to read Taal status\n"); goto err; @@ -1479,7 +1498,7 @@ static void taal_esd_work(struct work_struct *work) goto err; } - r = taal_dcs_read_1(DCS_RDDSDR, &state2); + r = taal_dcs_read_1(td, DCS_RDDSDR, &state2); if (r) { dev_err(&dssdev->dev, "failed to read Taal status\n"); goto err; @@ -1495,7 +1514,7 @@ static void taal_esd_work(struct work_struct *work) /* Self-diagnostics result is also shown on TE GPIO line. We need * to re-enable TE after self diagnostics */ if (td->te_enabled && panel_data->use_ext_te) { - r = taal_dcs_write_1(DCS_TEAR_ON, 0); + r = taal_dcs_write_1(td, DCS_TEAR_ON, 0); if (r) goto err; } diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index fe3578bbff7d..44b667b55ab8 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -3230,9 +3230,6 @@ int dsi_init_display(struct omap_dss_device *dssdev) dssdev->caps = OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE | OMAP_DSS_DISPLAY_CAP_TEAR_ELIM; - dsi.vc[0].dssdev = dssdev; - dsi.vc[1].dssdev = dssdev; - if (dsi.vdds_dsi_reg == NULL) { struct regulator *vdds_dsi; -- cgit v1.2.3 From f2988ab9f4a2bf5e24f37d20eab1aad6862953d3 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 2 Mar 2011 10:06:48 +0200 Subject: HACK: OMAP: DSS2: Fix OMAP2_DSS_USE_DSI_PLL When using OMAP2_DSS_USE_DSI_PLL, which selects DSI PLL as source clock for DISPC, the DSI needs the vdds_dsi regulator. Latest regulator changes broke this, causing the the code to not acquire the regulator when using OMAP2_DSS_USE_DSI_PLL. This patch acquires the vdds_dsi regulator in dsi_pll_init(), fixing the issue. This is is just a quick hack to get the OMAP2_DSS_USE_DSI_PLL option working. There shouldn't be any other downside in this solution than some extra lines of code. OMAP2_DSS_USE_DSI_PLL is itself a big hack, and should be removed, and the feature itself should be implemented in a more sane way. However, the solution is not trivial, and people are using DSI PLL to get more exact pixel clocks, so this hack is an acceptable temporary solution for the time being. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dsi.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 44b667b55ab8..be7694ff7ca7 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -1119,6 +1119,26 @@ int dsi_pll_init(struct omap_dss_device *dssdev, bool enable_hsclk, DSSDBG("PLL init\n"); +#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL + /* + * HACK: this is just a quick hack to get the USE_DSI_PLL + * option working. USE_DSI_PLL is itself a big hack, and + * should be removed. + */ + if (dsi.vdds_dsi_reg == NULL) { + struct regulator *vdds_dsi; + + vdds_dsi = regulator_get(&dsi.pdev->dev, "vdds_dsi"); + + if (IS_ERR(vdds_dsi)) { + DSSERR("can't get VDDS_DSI regulator\n"); + return PTR_ERR(vdds_dsi); + } + + dsi.vdds_dsi_reg = vdds_dsi; + } +#endif + enable_clocks(1); dsi_enable_pll_clock(1); -- cgit v1.2.3 From 31ef82377f1e0f1bc7d308ae4312e6cc5a431885 Mon Sep 17 00:00:00 2001 From: "Taneja, Archit" Date: Mon, 14 Mar 2011 23:28:22 -0500 Subject: OMAP: DSS2: FEATURES: Functions to return min and max values of parameters Create 2 functions dss_feat_get_param_min() and dss_feat_get_param_max() which return the minimum and maximum value of a parameter. Introduce a enum in dss_features called dss_range_param which contains parameters whose ranges we are interested in. Replace this with dss_feat_get_max_dss_fck() which is specific to the parameter DSS_FCK. Signed-off-by: Archit Taneja Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dsi.c | 2 +- drivers/video/omap2/dss/dss.c | 2 +- drivers/video/omap2/dss/dss_features.c | 36 ++++++++++++++++++++++++++-------- drivers/video/omap2/dss/dss_features.h | 7 ++++++- 4 files changed, 36 insertions(+), 11 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index be7694ff7ca7..6e7f46828148 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -864,7 +864,7 @@ int dsi_pll_calc_clock_div_pck(bool is_tft, unsigned long req_pck, dss_sys_clk = dss_clk_get_rate(DSS_CLK_SYSCK); - max_dss_fck = dss_feat_get_max_dss_fck(); + max_dss_fck = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK); if (req_pck == dsi.cache_req_pck && dsi.cache_cinfo.clkin == dss_sys_clk) { diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 06ad31290853..562d8d28d4f2 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -457,7 +457,7 @@ int dss_calc_clock_div(bool is_tft, unsigned long req_pck, prate = dss_get_dpll4_rate(); - max_dss_fck = dss_feat_get_max_dss_fck(); + max_dss_fck = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK); fck = dss_clk_get_rate(DSS_CLK_FCK); if (req_pck == dss.cache_req_pck && diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c index 8de3344842d7..4c8b32af496c 100644 --- a/drivers/video/omap2/dss/dss_features.c +++ b/drivers/video/omap2/dss/dss_features.c @@ -33,6 +33,10 @@ struct dss_reg_field { u8 start, end; }; +struct dss_param_range { + int min, max; +}; + struct omap_dss_features { const struct dss_reg_field *reg_fields; const int num_reg_fields; @@ -41,10 +45,10 @@ struct omap_dss_features { const int num_mgrs; const int num_ovls; - const unsigned long max_dss_fck; const enum omap_display_type *supported_displays; const enum omap_color_mode *supported_color_modes; const char * const *clksrc_names; + const struct dss_param_range *dss_params; }; /* This struct is assigned to one of the below during initialization */ @@ -179,6 +183,18 @@ static const char * const omap4_dss_clk_source_names[] = { [DSS_CLK_SRC_FCK] = "DSS_FCLK", }; +static const struct dss_param_range omap2_dss_param_range[] = { + [FEAT_PARAM_DSS_FCK] = { 0, 173000000 }, +}; + +static const struct dss_param_range omap3_dss_param_range[] = { + [FEAT_PARAM_DSS_FCK] = { 0, 173000000 }, +}; + +static const struct dss_param_range omap4_dss_param_range[] = { + [FEAT_PARAM_DSS_FCK] = { 0, 186000000 }, +}; + /* OMAP2 DSS Features */ static struct omap_dss_features omap2_dss_features = { .reg_fields = omap2_dss_reg_fields, @@ -191,10 +207,10 @@ static struct omap_dss_features omap2_dss_features = { .num_mgrs = 2, .num_ovls = 3, - .max_dss_fck = 173000000, .supported_displays = omap2_dss_supported_displays, .supported_color_modes = omap2_dss_supported_color_modes, .clksrc_names = omap2_dss_clk_source_names, + .dss_params = omap2_dss_param_range, }; /* OMAP3 DSS Features */ @@ -210,10 +226,10 @@ static struct omap_dss_features omap3430_dss_features = { .num_mgrs = 2, .num_ovls = 3, - .max_dss_fck = 173000000, .supported_displays = omap3430_dss_supported_displays, .supported_color_modes = omap3_dss_supported_color_modes, .clksrc_names = omap3_dss_clk_source_names, + .dss_params = omap3_dss_param_range, }; static struct omap_dss_features omap3630_dss_features = { @@ -229,10 +245,10 @@ static struct omap_dss_features omap3630_dss_features = { .num_mgrs = 2, .num_ovls = 3, - .max_dss_fck = 173000000, .supported_displays = omap3630_dss_supported_displays, .supported_color_modes = omap3_dss_supported_color_modes, .clksrc_names = omap3_dss_clk_source_names, + .dss_params = omap3_dss_param_range, }; /* OMAP4 DSS Features */ @@ -247,10 +263,10 @@ static struct omap_dss_features omap4_dss_features = { .num_mgrs = 3, .num_ovls = 3, - .max_dss_fck = 186000000, .supported_displays = omap4_dss_supported_displays, .supported_color_modes = omap3_dss_supported_color_modes, .clksrc_names = omap4_dss_clk_source_names, + .dss_params = omap4_dss_param_range, }; /* Functions returning values related to a DSS feature */ @@ -264,10 +280,14 @@ int dss_feat_get_num_ovls(void) return omap_current_dss_features->num_ovls; } -/* Max supported DSS FCK in Hz */ -unsigned long dss_feat_get_max_dss_fck(void) +unsigned long dss_feat_get_param_min(enum dss_range_param param) +{ + return omap_current_dss_features->dss_params[param].min; +} + +unsigned long dss_feat_get_param_max(enum dss_range_param param) { - return omap_current_dss_features->max_dss_fck; + return omap_current_dss_features->dss_params[param].max; } enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel) diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h index 729b5f19fa2e..da63bbf38e90 100644 --- a/drivers/video/omap2/dss/dss_features.h +++ b/drivers/video/omap2/dss/dss_features.h @@ -54,10 +54,15 @@ enum dss_feat_reg_field { FEAT_REG_DISPC_CLK_SWITCH, }; +enum dss_range_param { + FEAT_PARAM_DSS_FCK, +}; + /* DSS Feature Functions */ int dss_feat_get_num_mgrs(void); int dss_feat_get_num_ovls(void); -unsigned long dss_feat_get_max_dss_fck(void); +unsigned long dss_feat_get_param_min(enum dss_range_param param); +unsigned long dss_feat_get_param_max(enum dss_range_param param); enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel); enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane); bool dss_feat_color_mode_supported(enum omap_plane plane, -- cgit v1.2.3 From 49641116392ad7522fa0efad53f7ed63f811bd88 Mon Sep 17 00:00:00 2001 From: "Taneja, Archit" Date: Mon, 14 Mar 2011 23:28:23 -0500 Subject: OMAP: DSS2: FEATURES: DSI PLL parameter cleanup The DSI PLL parameters (regm, regn, regm_dispc, regm_dsi, fint) have different fields and also different Max values on OMAP3 and OMAP4. Use dss features to calculate the register fields and min/max values based on current OMAP revision. Signed-off-by: Archit Taneja Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dsi.c | 69 ++++++++++++++++++---------- drivers/video/omap2/dss/dss_features.c | 84 +++++++++++++++++++++++----------- drivers/video/omap2/dss/dss_features.h | 10 ++++ 3 files changed, 113 insertions(+), 50 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 6e7f46828148..7a4b4404a976 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -185,14 +185,6 @@ struct dsi_reg { u16 idx; }; #define DSI_DT_RX_SHORT_READ_1 0x21 #define DSI_DT_RX_SHORT_READ_2 0x22 -#define FINT_MAX 2100000 -#define FINT_MIN 750000 -#define REGN_MAX (1 << 7) -#define REGM_MAX ((1 << 11) - 1) -#define REGM_DISPC_MAX (1 << 4) -#define REGM_DSI_MAX (1 << 4) -#define LP_DIV_MAX ((1 << 13) - 1) - enum fifo_size { DSI_FIFO_SIZE_0 = 0, DSI_FIFO_SIZE_32 = 1, @@ -277,6 +269,11 @@ static struct spinlock_t irq_stats_lock; struct dsi_irq_stats irq_stats; #endif + /* DSI PLL Parameter Ranges */ + unsigned long regm_max, regn_max; + unsigned long regm_dispc_max, regm_dsi_max; + unsigned long fint_min, fint_max; + unsigned long lpdiv_max; } dsi; #ifdef DEBUG @@ -751,7 +748,7 @@ static int dsi_set_lp_clk_divisor(struct omap_dss_device *dssdev) lp_clk_div = dssdev->phy.dsi.div.lp_clk_div; - if (lp_clk_div == 0 || lp_clk_div > LP_DIV_MAX) + if (lp_clk_div == 0 || lp_clk_div > dsi.lpdiv_max) return -EINVAL; dsi_fclk = dsi_fclk_rate(); @@ -801,16 +798,16 @@ static int dsi_pll_power(enum dsi_pll_power_state state) static int dsi_calc_clock_rates(struct omap_dss_device *dssdev, struct dsi_clock_info *cinfo) { - if (cinfo->regn == 0 || cinfo->regn > REGN_MAX) + if (cinfo->regn == 0 || cinfo->regn > dsi.regn_max) return -EINVAL; - if (cinfo->regm == 0 || cinfo->regm > REGM_MAX) + if (cinfo->regm == 0 || cinfo->regm > dsi.regm_max) return -EINVAL; - if (cinfo->regm_dispc > REGM_DISPC_MAX) + if (cinfo->regm_dispc > dsi.regm_dispc_max) return -EINVAL; - if (cinfo->regm_dsi > REGM_DSI_MAX) + if (cinfo->regm_dsi > dsi.regm_dsi_max) return -EINVAL; if (cinfo->use_sys_clk) { @@ -829,7 +826,7 @@ static int dsi_calc_clock_rates(struct omap_dss_device *dssdev, cinfo->fint = cinfo->clkin / (cinfo->regn * (cinfo->highfreq ? 2 : 1)); - if (cinfo->fint > FINT_MAX || cinfo->fint < FINT_MIN) + if (cinfo->fint > dsi.fint_max || cinfo->fint < dsi.fint_min) return -EINVAL; cinfo->clkin4ddr = 2 * cinfo->regm * cinfo->fint; @@ -899,17 +896,17 @@ retry: /* no highfreq: 0.75MHz < Fint = clkin / regn < 2.1MHz */ /* highfreq: 0.75MHz < Fint = clkin / (2*regn) < 2.1MHz */ /* To reduce PLL lock time, keep Fint high (around 2 MHz) */ - for (cur.regn = 1; cur.regn < REGN_MAX; ++cur.regn) { + for (cur.regn = 1; cur.regn < dsi.regn_max; ++cur.regn) { if (cur.highfreq == 0) cur.fint = cur.clkin / cur.regn; else cur.fint = cur.clkin / (2 * cur.regn); - if (cur.fint > FINT_MAX || cur.fint < FINT_MIN) + if (cur.fint > dsi.fint_max || cur.fint < dsi.fint_min) continue; /* DSIPHY(MHz) = (2 * regm / regn) * (clkin / (highfreq + 1)) */ - for (cur.regm = 1; cur.regm < REGM_MAX; ++cur.regm) { + for (cur.regm = 1; cur.regm < dsi.regm_max; ++cur.regm) { unsigned long a, b; a = 2 * cur.regm * (cur.clkin/1000); @@ -921,7 +918,7 @@ retry: /* dsi_pll_hsdiv_dispc_clk(MHz) = * DSIPHY(MHz) / regm_dispc < 173MHz/186Mhz */ - for (cur.regm_dispc = 1; cur.regm_dispc < REGM_DISPC_MAX; + for (cur.regm_dispc = 1; cur.regm_dispc < dsi.regm_dispc_max; ++cur.regm_dispc) { struct dispc_clock_info cur_dispc; cur.dsi_pll_hsdiv_dispc_clk = @@ -994,6 +991,8 @@ int dsi_pll_set_clock_div(struct dsi_clock_info *cinfo) int r = 0; u32 l; int f; + u8 regn_start, regn_end, regm_start, regm_end; + u8 regm_dispc_start, regm_dispc_end, regm_dsi_start, regm_dsi_end; DSSDBGF(); @@ -1038,19 +1037,30 @@ int dsi_pll_set_clock_div(struct dsi_clock_info *cinfo) dss_feat_get_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DSI), cinfo->dsi_pll_hsdiv_dsi_clk); + dss_feat_get_reg_field(FEAT_REG_DSIPLL_REGN, ®n_start, ®n_end); + dss_feat_get_reg_field(FEAT_REG_DSIPLL_REGM, ®m_start, ®m_end); + dss_feat_get_reg_field(FEAT_REG_DSIPLL_REGM_DISPC, ®m_dispc_start, + ®m_dispc_end); + dss_feat_get_reg_field(FEAT_REG_DSIPLL_REGM_DSI, ®m_dsi_start, + ®m_dsi_end); + REG_FLD_MOD(DSI_PLL_CONTROL, 0, 0, 0); /* DSI_PLL_AUTOMODE = manual */ l = dsi_read_reg(DSI_PLL_CONFIGURATION1); l = FLD_MOD(l, 1, 0, 0); /* DSI_PLL_STOPMODE */ - l = FLD_MOD(l, cinfo->regn - 1, 7, 1); /* DSI_PLL_REGN */ - l = FLD_MOD(l, cinfo->regm, 18, 8); /* DSI_PLL_REGM */ + /* DSI_PLL_REGN */ + l = FLD_MOD(l, cinfo->regn - 1, regn_start, regn_end); + /* DSI_PLL_REGM */ + l = FLD_MOD(l, cinfo->regm, regm_start, regm_end); + /* DSI_CLOCK_DIV */ l = FLD_MOD(l, cinfo->regm_dispc > 0 ? cinfo->regm_dispc - 1 : 0, - 22, 19); /* DSI_CLOCK_DIV */ + regm_dispc_start, regm_dispc_end); + /* DSIPROTO_CLOCK_DIV */ l = FLD_MOD(l, cinfo->regm_dsi > 0 ? cinfo->regm_dsi - 1 : 0, - 26, 23); /* DSIPROTO_CLOCK_DIV */ + regm_dsi_start, regm_dsi_end); dsi_write_reg(DSI_PLL_CONFIGURATION1, l); - BUG_ON(cinfo->fint < 750000 || cinfo->fint > 2100000); + BUG_ON(cinfo->fint < dsi.fint_min || cinfo->fint > dsi.fint_max); if (cinfo->fint < 1000000) f = 0x3; else if (cinfo->fint < 1250000) @@ -3333,6 +3343,17 @@ void dsi_wait_pll_hsdiv_dsi_active(void) dss_feat_get_clk_source_name(DSS_CLK_SRC_DSI_PLL_HSDIV_DSI)); } +static void dsi_calc_clock_param_ranges(void) +{ + dsi.regn_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_REGN); + dsi.regm_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_REGM); + dsi.regm_dispc_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_REGM_DISPC); + dsi.regm_dsi_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_REGM_DSI); + dsi.fint_min = dss_feat_get_param_min(FEAT_PARAM_DSIPLL_FINT); + dsi.fint_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_FINT); + dsi.lpdiv_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_LPDIV); +} + static int dsi_init(struct platform_device *pdev) { u32 rev; @@ -3397,6 +3418,8 @@ static int dsi_init(struct platform_device *pdev) dsi.vc[i].vc_id = 0; } + dsi_calc_clock_param_ranges(); + enable_clocks(1); rev = dsi_read_reg(DSI_REVISION); diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c index 4c8b32af496c..06b18f73449b 100644 --- a/drivers/video/omap2/dss/dss_features.c +++ b/drivers/video/omap2/dss/dss_features.c @@ -55,36 +55,48 @@ struct omap_dss_features { static struct omap_dss_features *omap_current_dss_features; static const struct dss_reg_field omap2_dss_reg_fields[] = { - [FEAT_REG_FIRHINC] = { 11, 0 }, - [FEAT_REG_FIRVINC] = { 27, 16 }, - [FEAT_REG_FIFOLOWTHRESHOLD] = { 8, 0 }, - [FEAT_REG_FIFOHIGHTHRESHOLD] = { 24, 16 }, - [FEAT_REG_FIFOSIZE] = { 8, 0 }, - [FEAT_REG_HORIZONTALACCU] = { 9, 0 }, - [FEAT_REG_VERTICALACCU] = { 25, 16 }, - [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 }, + [FEAT_REG_FIRHINC] = { 11, 0 }, + [FEAT_REG_FIRVINC] = { 27, 16 }, + [FEAT_REG_FIFOLOWTHRESHOLD] = { 8, 0 }, + [FEAT_REG_FIFOHIGHTHRESHOLD] = { 24, 16 }, + [FEAT_REG_FIFOSIZE] = { 8, 0 }, + [FEAT_REG_HORIZONTALACCU] = { 9, 0 }, + [FEAT_REG_VERTICALACCU] = { 25, 16 }, + [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 }, + [FEAT_REG_DSIPLL_REGN] = { 0, 0 }, + [FEAT_REG_DSIPLL_REGM] = { 0, 0 }, + [FEAT_REG_DSIPLL_REGM_DISPC] = { 0, 0 }, + [FEAT_REG_DSIPLL_REGM_DSI] = { 0, 0 }, }; static const struct dss_reg_field omap3_dss_reg_fields[] = { - [FEAT_REG_FIRHINC] = { 12, 0 }, - [FEAT_REG_FIRVINC] = { 28, 16 }, - [FEAT_REG_FIFOLOWTHRESHOLD] = { 11, 0 }, - [FEAT_REG_FIFOHIGHTHRESHOLD] = { 27, 16 }, - [FEAT_REG_FIFOSIZE] = { 10, 0 }, - [FEAT_REG_HORIZONTALACCU] = { 9, 0 }, - [FEAT_REG_VERTICALACCU] = { 25, 16 }, - [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 }, + [FEAT_REG_FIRHINC] = { 12, 0 }, + [FEAT_REG_FIRVINC] = { 28, 16 }, + [FEAT_REG_FIFOLOWTHRESHOLD] = { 11, 0 }, + [FEAT_REG_FIFOHIGHTHRESHOLD] = { 27, 16 }, + [FEAT_REG_FIFOSIZE] = { 10, 0 }, + [FEAT_REG_HORIZONTALACCU] = { 9, 0 }, + [FEAT_REG_VERTICALACCU] = { 25, 16 }, + [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 }, + [FEAT_REG_DSIPLL_REGN] = { 7, 1 }, + [FEAT_REG_DSIPLL_REGM] = { 18, 8 }, + [FEAT_REG_DSIPLL_REGM_DISPC] = { 22, 19 }, + [FEAT_REG_DSIPLL_REGM_DSI] = { 26, 23 }, }; static const struct dss_reg_field omap4_dss_reg_fields[] = { - [FEAT_REG_FIRHINC] = { 12, 0 }, - [FEAT_REG_FIRVINC] = { 28, 16 }, - [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 }, - [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 }, - [FEAT_REG_FIFOSIZE] = { 15, 0 }, - [FEAT_REG_HORIZONTALACCU] = { 10, 0 }, - [FEAT_REG_VERTICALACCU] = { 26, 16 }, - [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 8 }, + [FEAT_REG_FIRHINC] = { 12, 0 }, + [FEAT_REG_FIRVINC] = { 28, 16 }, + [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 }, + [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 }, + [FEAT_REG_FIFOSIZE] = { 15, 0 }, + [FEAT_REG_HORIZONTALACCU] = { 10, 0 }, + [FEAT_REG_VERTICALACCU] = { 26, 16 }, + [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 8 }, + [FEAT_REG_DSIPLL_REGN] = { 8, 1 }, + [FEAT_REG_DSIPLL_REGM] = { 20, 9 }, + [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 }, + [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 }, }; static const enum omap_display_type omap2_dss_supported_displays[] = { @@ -184,15 +196,33 @@ static const char * const omap4_dss_clk_source_names[] = { }; static const struct dss_param_range omap2_dss_param_range[] = { - [FEAT_PARAM_DSS_FCK] = { 0, 173000000 }, + [FEAT_PARAM_DSS_FCK] = { 0, 173000000 }, + [FEAT_PARAM_DSIPLL_REGN] = { 0, 0 }, + [FEAT_PARAM_DSIPLL_REGM] = { 0, 0 }, + [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, 0 }, + [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, 0 }, + [FEAT_PARAM_DSIPLL_FINT] = { 0, 0 }, + [FEAT_PARAM_DSIPLL_LPDIV] = { 0, 0 }, }; static const struct dss_param_range omap3_dss_param_range[] = { - [FEAT_PARAM_DSS_FCK] = { 0, 173000000 }, + [FEAT_PARAM_DSS_FCK] = { 0, 173000000 }, + [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 7) - 1 }, + [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 11) - 1 }, + [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 4) - 1 }, + [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 4) - 1 }, + [FEAT_PARAM_DSIPLL_FINT] = { 750000, 2100000 }, + [FEAT_PARAM_DSIPLL_LPDIV] = { 1, (1 << 13) - 1}, }; static const struct dss_param_range omap4_dss_param_range[] = { - [FEAT_PARAM_DSS_FCK] = { 0, 186000000 }, + [FEAT_PARAM_DSS_FCK] = { 0, 186000000 }, + [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 }, + [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 }, + [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 }, + [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 }, + [FEAT_PARAM_DSIPLL_FINT] = { 500000, 2500000 }, + [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 }, }; /* OMAP2 DSS Features */ diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h index da63bbf38e90..12e9c4ef0dec 100644 --- a/drivers/video/omap2/dss/dss_features.h +++ b/drivers/video/omap2/dss/dss_features.h @@ -52,10 +52,20 @@ enum dss_feat_reg_field { FEAT_REG_HORIZONTALACCU, FEAT_REG_VERTICALACCU, FEAT_REG_DISPC_CLK_SWITCH, + FEAT_REG_DSIPLL_REGN, + FEAT_REG_DSIPLL_REGM, + FEAT_REG_DSIPLL_REGM_DISPC, + FEAT_REG_DSIPLL_REGM_DSI, }; enum dss_range_param { FEAT_PARAM_DSS_FCK, + FEAT_PARAM_DSIPLL_REGN, + FEAT_PARAM_DSIPLL_REGM, + FEAT_PARAM_DSIPLL_REGM_DISPC, + FEAT_PARAM_DSIPLL_REGM_DSI, + FEAT_PARAM_DSIPLL_FINT, + FEAT_PARAM_DSIPLL_LPDIV, }; /* DSS Feature Functions */ -- cgit v1.2.3 From 69b281a61442f97e8df14babc9bb6a28624886b1 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 2 Mar 2011 14:44:27 +0200 Subject: OMAP: DSS2: DSI: Restructure IRQ handler Clean up the IRQ handler a bit by separating collection of IRQ stats and handling of IRQ errors to separate functions. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dsi.c | 123 +++++++++++++++++++++++++----------------- 1 file changed, 73 insertions(+), 50 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 7a4b4404a976..b6c08a6f2da1 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -477,26 +477,33 @@ static void print_irq_status_cio(u32 status) printk("\n"); } -static int debug_irq; - -/* called from dss */ -static irqreturn_t omap_dsi_irq_handler(int irq, void *arg) +#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS +static void dsi_collect_irq_stats(u32 irqstatus, u32 *vcstatus, u32 ciostatus) { - u32 irqstatus, vcstatus, ciostatus; int i; - irqstatus = dsi_read_reg(DSI_IRQSTATUS); - - /* IRQ is not for us */ - if (!irqstatus) - return IRQ_NONE; - -#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS spin_lock(&dsi.irq_stats_lock); + dsi.irq_stats.irq_count++; dss_collect_irq_stats(irqstatus, dsi.irq_stats.dsi_irqs); + + for (i = 0; i < 4; ++i) + dss_collect_irq_stats(vcstatus[i], dsi.irq_stats.vc_irqs[i]); + + dss_collect_irq_stats(ciostatus, dsi.irq_stats.cio_irqs); + + spin_unlock(&dsi.irq_stats_lock); +} +#else +#define dsi_collect_irq_stats(irqstatus, vcstatus, ciostatus) #endif +static int debug_irq; + +static void dsi_handle_irq_errors(u32 irqstatus, u32 *vcstatus, u32 ciostatus) +{ + int i; + if (irqstatus & DSI_IRQ_ERROR_MASK) { DSSERR("DSI error, irqstatus %x\n", irqstatus); print_irq_status(irqstatus); @@ -507,37 +514,48 @@ static irqreturn_t omap_dsi_irq_handler(int irq, void *arg) print_irq_status(irqstatus); } -#ifdef DSI_CATCH_MISSING_TE - if (irqstatus & DSI_IRQ_TE_TRIGGER) - del_timer(&dsi.te_timer); -#endif - for (i = 0; i < 4; ++i) { - if ((irqstatus & (1< Date: Wed, 2 Mar 2011 14:47:04 +0200 Subject: OMAP: DSS2: DSI: Add ISR support Add generic ISR support for DSI interrupts. ISRs can be used instead of custom hooks in the interrupt handler. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dsi.c | 329 ++++++++++++++++++++++++++++++++++++++---- 1 file changed, 304 insertions(+), 25 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index b6c08a6f2da1..8613ec489410 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -185,6 +185,16 @@ struct dsi_reg { u16 idx; }; #define DSI_DT_RX_SHORT_READ_1 0x21 #define DSI_DT_RX_SHORT_READ_2 0x22 +typedef void (*omap_dsi_isr_t) (void *arg, u32 mask); + +#define DSI_MAX_NR_ISRS 2 + +struct dsi_isr_data { + omap_dsi_isr_t isr; + void *arg; + u32 mask; +}; + enum fifo_size { DSI_FIFO_SIZE_0 = 0, DSI_FIFO_SIZE_32 = 1, @@ -211,6 +221,12 @@ struct dsi_irq_stats { unsigned cio_irqs[32]; }; +struct dsi_isr_tables { + struct dsi_isr_data isr_table[DSI_MAX_NR_ISRS]; + struct dsi_isr_data isr_table_vc[4][DSI_MAX_NR_ISRS]; + struct dsi_isr_data isr_table_cio[DSI_MAX_NR_ISRS]; +}; + static struct { struct platform_device *pdev; @@ -236,6 +252,11 @@ static struct struct completion bta_completion; void (*bta_callback)(void); + spinlock_t irq_lock; + struct dsi_isr_tables isr_tables; + /* space for a copy used by the interrupt handler */ + struct dsi_isr_tables isr_tables_copy; + int update_channel; struct dsi_update_region update_region; @@ -532,16 +553,56 @@ static void dsi_handle_irq_errors(u32 irqstatus, u32 *vcstatus, u32 ciostatus) } } +static void dsi_call_isrs(struct dsi_isr_data *isr_array, + unsigned isr_array_size, u32 irqstatus) +{ + struct dsi_isr_data *isr_data; + int i; + + for (i = 0; i < isr_array_size; i++) { + isr_data = &isr_array[i]; + if (isr_data->isr && isr_data->mask & irqstatus) + isr_data->isr(isr_data->arg, irqstatus); + } +} + +static void dsi_handle_isrs(struct dsi_isr_tables *isr_tables, + u32 irqstatus, u32 *vcstatus, u32 ciostatus) +{ + int i; + + dsi_call_isrs(isr_tables->isr_table, + ARRAY_SIZE(isr_tables->isr_table), + irqstatus); + + for (i = 0; i < 4; ++i) { + if (vcstatus[i] == 0) + continue; + dsi_call_isrs(isr_tables->isr_table_vc[i], + ARRAY_SIZE(isr_tables->isr_table_vc[i]), + vcstatus[i]); + } + + if (ciostatus != 0) + dsi_call_isrs(isr_tables->isr_table_cio, + ARRAY_SIZE(isr_tables->isr_table_cio), + ciostatus); +} + static irqreturn_t omap_dsi_irq_handler(int irq, void *arg) { u32 irqstatus, vcstatus[4], ciostatus; int i; + spin_lock(&dsi.irq_lock); + irqstatus = dsi_read_reg(DSI_IRQSTATUS); /* IRQ is not for us */ - if (!irqstatus) + if (!irqstatus) { + spin_unlock(&dsi.irq_lock); return IRQ_NONE; + } dsi_write_reg(DSI_IRQSTATUS, irqstatus & ~DSI_IRQ_CHANNEL_MASK); /* flush posted write */ @@ -587,6 +648,14 @@ static irqreturn_t omap_dsi_irq_handler(int irq, void *arg) } } + /* make a copy and unlock, so that isrs can unregister + * themselves */ + memcpy(&dsi.isr_tables_copy, &dsi.isr_tables, sizeof(dsi.isr_tables)); + + spin_unlock(&dsi.irq_lock); + + dsi_handle_isrs(&dsi.isr_tables_copy, irqstatus, vcstatus, ciostatus); + dsi_handle_irq_errors(irqstatus, vcstatus, ciostatus); dsi_collect_irq_stats(irqstatus, vcstatus, ciostatus); @@ -594,42 +663,251 @@ static irqreturn_t omap_dsi_irq_handler(int irq, void *arg) return IRQ_HANDLED; } -static void _dsi_initialize_irq(void) +/* dsi.irq_lock has to be locked by the caller */ +static void _omap_dsi_configure_irqs(struct dsi_isr_data *isr_array, + unsigned isr_array_size, u32 default_mask, + const struct dsi_reg enable_reg, + const struct dsi_reg status_reg) { - u32 l; + struct dsi_isr_data *isr_data; + u32 mask; + u32 old_mask; int i; - /* disable all interrupts */ - dsi_write_reg(DSI_IRQENABLE, 0); - for (i = 0; i < 4; ++i) - dsi_write_reg(DSI_VC_IRQENABLE(i), 0); - dsi_write_reg(DSI_COMPLEXIO_IRQ_ENABLE, 0); + mask = default_mask; - /* clear interrupt status */ - l = dsi_read_reg(DSI_IRQSTATUS); - dsi_write_reg(DSI_IRQSTATUS, l & ~DSI_IRQ_CHANNEL_MASK); + for (i = 0; i < isr_array_size; i++) { + isr_data = &isr_array[i]; - for (i = 0; i < 4; ++i) { - l = dsi_read_reg(DSI_VC_IRQSTATUS(i)); - dsi_write_reg(DSI_VC_IRQSTATUS(i), l); + if (isr_data->isr == NULL) + continue; + + mask |= isr_data->mask; } - l = dsi_read_reg(DSI_COMPLEXIO_IRQ_STATUS); - dsi_write_reg(DSI_COMPLEXIO_IRQ_STATUS, l); + old_mask = dsi_read_reg(enable_reg); + /* clear the irqstatus for newly enabled irqs */ + dsi_write_reg(status_reg, (mask ^ old_mask) & mask); + dsi_write_reg(enable_reg, mask); + + /* flush posted writes */ + dsi_read_reg(enable_reg); + dsi_read_reg(status_reg); +} - /* enable error irqs */ - l = DSI_IRQ_ERROR_MASK; +/* dsi.irq_lock has to be locked by the caller */ +static void _omap_dsi_set_irqs(void) +{ + u32 mask = DSI_IRQ_ERROR_MASK; #ifdef DSI_CATCH_MISSING_TE - l |= DSI_IRQ_TE_TRIGGER; + mask |= DSI_IRQ_TE_TRIGGER; #endif - dsi_write_reg(DSI_IRQENABLE, l); + _omap_dsi_configure_irqs(dsi.isr_tables.isr_table, + ARRAY_SIZE(dsi.isr_tables.isr_table), mask, + DSI_IRQENABLE, DSI_IRQSTATUS); +} - l = DSI_VC_IRQ_ERROR_MASK; - for (i = 0; i < 4; ++i) - dsi_write_reg(DSI_VC_IRQENABLE(i), l); +/* dsi.irq_lock has to be locked by the caller */ +static void _omap_dsi_set_irqs_vc(int vc) +{ + _omap_dsi_configure_irqs(dsi.isr_tables.isr_table_vc[vc], + ARRAY_SIZE(dsi.isr_tables.isr_table_vc[vc]), + DSI_VC_IRQ_ERROR_MASK, + DSI_VC_IRQENABLE(vc), DSI_VC_IRQSTATUS(vc)); +} + +/* dsi.irq_lock has to be locked by the caller */ +static void _omap_dsi_set_irqs_cio(void) +{ + _omap_dsi_configure_irqs(dsi.isr_tables.isr_table_cio, + ARRAY_SIZE(dsi.isr_tables.isr_table_cio), + DSI_CIO_IRQ_ERROR_MASK, + DSI_COMPLEXIO_IRQ_ENABLE, DSI_COMPLEXIO_IRQ_STATUS); +} + +static void _dsi_initialize_irq(void) +{ + unsigned long flags; + int vc; + + spin_lock_irqsave(&dsi.irq_lock, flags); + + memset(&dsi.isr_tables, 0, sizeof(dsi.isr_tables)); + + _omap_dsi_set_irqs(); + for (vc = 0; vc < 4; ++vc) + _omap_dsi_set_irqs_vc(vc); + _omap_dsi_set_irqs_cio(); + + spin_unlock_irqrestore(&dsi.irq_lock, flags); +} - l = DSI_CIO_IRQ_ERROR_MASK; - dsi_write_reg(DSI_COMPLEXIO_IRQ_ENABLE, l); +static int _dsi_register_isr(omap_dsi_isr_t isr, void *arg, u32 mask, + struct dsi_isr_data *isr_array, unsigned isr_array_size) +{ + struct dsi_isr_data *isr_data; + int free_idx; + int i; + + BUG_ON(isr == NULL); + + /* check for duplicate entry and find a free slot */ + free_idx = -1; + for (i = 0; i < isr_array_size; i++) { + isr_data = &isr_array[i]; + + if (isr_data->isr == isr && isr_data->arg == arg && + isr_data->mask == mask) { + return -EINVAL; + } + + if (isr_data->isr == NULL && free_idx == -1) + free_idx = i; + } + + if (free_idx == -1) + return -EBUSY; + + isr_data = &isr_array[free_idx]; + isr_data->isr = isr; + isr_data->arg = arg; + isr_data->mask = mask; + + return 0; +} + +static int _dsi_unregister_isr(omap_dsi_isr_t isr, void *arg, u32 mask, + struct dsi_isr_data *isr_array, unsigned isr_array_size) +{ + struct dsi_isr_data *isr_data; + int i; + + for (i = 0; i < isr_array_size; i++) { + isr_data = &isr_array[i]; + if (isr_data->isr != isr || isr_data->arg != arg || + isr_data->mask != mask) + continue; + + isr_data->isr = NULL; + isr_data->arg = NULL; + isr_data->mask = 0; + + return 0; + } + + return -EINVAL; +} + +static int dsi_register_isr(omap_dsi_isr_t isr, void *arg, u32 mask) +{ + unsigned long flags; + int r; + + spin_lock_irqsave(&dsi.irq_lock, flags); + + r = _dsi_register_isr(isr, arg, mask, dsi.isr_tables.isr_table, + ARRAY_SIZE(dsi.isr_tables.isr_table)); + + if (r == 0) + _omap_dsi_set_irqs(); + + spin_unlock_irqrestore(&dsi.irq_lock, flags); + + return r; +} + +static int dsi_unregister_isr(omap_dsi_isr_t isr, void *arg, u32 mask) +{ + unsigned long flags; + int r; + + spin_lock_irqsave(&dsi.irq_lock, flags); + + r = _dsi_unregister_isr(isr, arg, mask, dsi.isr_tables.isr_table, + ARRAY_SIZE(dsi.isr_tables.isr_table)); + + if (r == 0) + _omap_dsi_set_irqs(); + + spin_unlock_irqrestore(&dsi.irq_lock, flags); + + return r; +} + +static int dsi_register_isr_vc(int channel, omap_dsi_isr_t isr, void *arg, + u32 mask) +{ + unsigned long flags; + int r; + + spin_lock_irqsave(&dsi.irq_lock, flags); + + r = _dsi_register_isr(isr, arg, mask, + dsi.isr_tables.isr_table_vc[channel], + ARRAY_SIZE(dsi.isr_tables.isr_table_vc[channel])); + + if (r == 0) + _omap_dsi_set_irqs_vc(channel); + + spin_unlock_irqrestore(&dsi.irq_lock, flags); + + return r; +} + +static int dsi_unregister_isr_vc(int channel, omap_dsi_isr_t isr, void *arg, + u32 mask) +{ + unsigned long flags; + int r; + + spin_lock_irqsave(&dsi.irq_lock, flags); + + r = _dsi_unregister_isr(isr, arg, mask, + dsi.isr_tables.isr_table_vc[channel], + ARRAY_SIZE(dsi.isr_tables.isr_table_vc[channel])); + + if (r == 0) + _omap_dsi_set_irqs_vc(channel); + + spin_unlock_irqrestore(&dsi.irq_lock, flags); + + return r; +} + +static int dsi_register_isr_cio(omap_dsi_isr_t isr, void *arg, u32 mask) +{ + unsigned long flags; + int r; + + spin_lock_irqsave(&dsi.irq_lock, flags); + + r = _dsi_register_isr(isr, arg, mask, dsi.isr_tables.isr_table_cio, + ARRAY_SIZE(dsi.isr_tables.isr_table_cio)); + + if (r == 0) + _omap_dsi_set_irqs_cio(); + + spin_unlock_irqrestore(&dsi.irq_lock, flags); + + return r; +} + +static int dsi_unregister_isr_cio(omap_dsi_isr_t isr, void *arg, u32 mask) +{ + unsigned long flags; + int r; + + spin_lock_irqsave(&dsi.irq_lock, flags); + + r = _dsi_unregister_isr(isr, arg, mask, dsi.isr_tables.isr_table_cio, + ARRAY_SIZE(dsi.isr_tables.isr_table_cio)); + + if (r == 0) + _omap_dsi_set_irqs_cio(); + + spin_unlock_irqrestore(&dsi.irq_lock, flags); + + return r; } static u32 dsi_get_errors(void) @@ -3383,6 +3661,7 @@ static int dsi_init(struct platform_device *pdev) int r, i; struct resource *dsi_mem; + spin_lock_init(&dsi.irq_lock); spin_lock_init(&dsi.errors_lock); dsi.errors = 0; -- cgit v1.2.3 From f36a06e702ef804a99ce3a286514d84610a74db5 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 2 Mar 2011 14:48:41 +0200 Subject: OMAP: DSS2: DSI: use ISR in send_bta_sync Remove bta_completion handling from the interrupt handler, and use ISR support instead. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dsi.c | 32 ++++++++++++++++++-------------- 1 file changed, 18 insertions(+), 14 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 8613ec489410..18b72521ee7e 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -249,7 +249,6 @@ static struct unsigned pll_locked; - struct completion bta_completion; void (*bta_callback)(void); spinlock_t irq_lock; @@ -338,6 +337,11 @@ static bool dsi_bus_is_locked(void) return dsi.bus_lock.count == 0; } +static void dsi_completion_handler(void *data, u32 mask) +{ + complete((struct completion *)data); +} + static inline int wait_for_bit_change(const struct dsi_reg idx, int bitnum, int value) { @@ -641,8 +645,6 @@ static irqreturn_t omap_dsi_irq_handler(int irq, void *arg) continue; if (vcstatus[i] & DSI_VC_IRQ_BTA) { - complete(&dsi.bta_completion); - if (dsi.bta_callback) dsi.bta_callback(); } @@ -2263,33 +2265,37 @@ static int dsi_vc_send_bta(int channel) int dsi_vc_send_bta_sync(int channel) { + DECLARE_COMPLETION_ONSTACK(completion); int r = 0; u32 err; - INIT_COMPLETION(dsi.bta_completion); - - dsi_vc_enable_bta_irq(channel); + r = dsi_register_isr_vc(channel, dsi_completion_handler, + &completion, DSI_VC_IRQ_BTA); + if (r) + goto err0; r = dsi_vc_send_bta(channel); if (r) - goto err; + goto err1; - if (wait_for_completion_timeout(&dsi.bta_completion, + if (wait_for_completion_timeout(&completion, msecs_to_jiffies(500)) == 0) { DSSERR("Failed to receive BTA\n"); r = -EIO; - goto err; + goto err1; } err = dsi_get_errors(); if (err) { DSSERR("Error while sending BTA: %x\n", err); r = -EIO; - goto err; + goto err1; } -err: - dsi_vc_disable_bta_irq(channel); +err1: + dsi_unregister_isr_vc(channel, dsi_completion_handler, + &completion, DSI_VC_IRQ_BTA); +err0: return r; } EXPORT_SYMBOL(dsi_vc_send_bta_sync); @@ -3670,8 +3676,6 @@ static int dsi_init(struct platform_device *pdev) dsi.irq_stats.last_reset = jiffies; #endif - init_completion(&dsi.bta_completion); - mutex_init(&dsi.lock); sema_init(&dsi.bus_lock, 1); -- cgit v1.2.3 From f34bd465cae57bcce11fb7f953cfcbb18222b99e Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 2 Mar 2011 14:52:48 +0200 Subject: OMAP: DSS2: DSI: use ISR for BTA in framedone Remove bta_callback from the interrupt handler, and use ISR support instead. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dsi.c | 57 ++++++++++++------------------------------- 1 file changed, 15 insertions(+), 42 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 18b72521ee7e..cd872e9d7989 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -249,8 +249,6 @@ static struct unsigned pll_locked; - void (*bta_callback)(void); - spinlock_t irq_lock; struct dsi_isr_tables isr_tables; /* space for a copy used by the interrupt handler */ @@ -640,16 +638,6 @@ static irqreturn_t omap_dsi_irq_handler(int irq, void *arg) del_timer(&dsi.te_timer); #endif - for (i = 0; i < 4; ++i) { - if (vcstatus[i] == 0) - continue; - - if (vcstatus[i] & DSI_VC_IRQ_BTA) { - if (dsi.bta_callback) - dsi.bta_callback(); - } - } - /* make a copy and unlock, so that isrs can unregister * themselves */ memcpy(&dsi.isr_tables_copy, &dsi.isr_tables, sizeof(dsi.isr_tables)); @@ -923,26 +911,6 @@ static u32 dsi_get_errors(void) return e; } -static void dsi_vc_enable_bta_irq(int channel) -{ - u32 l; - - dsi_write_reg(DSI_VC_IRQSTATUS(channel), DSI_VC_IRQ_BTA); - - l = dsi_read_reg(DSI_VC_IRQENABLE(channel)); - l |= DSI_VC_IRQ_BTA; - dsi_write_reg(DSI_VC_IRQENABLE(channel), l); -} - -static void dsi_vc_disable_bta_irq(int channel) -{ - u32 l; - - l = dsi_read_reg(DSI_VC_IRQENABLE(channel)); - l &= ~DSI_VC_IRQ_BTA; - dsi_write_reg(DSI_VC_IRQENABLE(channel), l); -} - /* DSI func clock. this could also be dsi_pll_hsdiv_dsi_clk */ static inline void enable_clocks(bool enable) { @@ -3109,19 +3077,20 @@ static void dsi_te_timeout(unsigned long arg) } #endif +static void dsi_framedone_bta_callback(void *data, u32 mask); + static void dsi_handle_framedone(int error) { const int channel = dsi.update_channel; - cancel_delayed_work(&dsi.framedone_timeout_work); + dsi_unregister_isr_vc(channel, dsi_framedone_bta_callback, + NULL, DSI_VC_IRQ_BTA); - dsi_vc_disable_bta_irq(channel); + cancel_delayed_work(&dsi.framedone_timeout_work); /* SIDLEMODE back to smart-idle */ dispc_enable_sidle(); - dsi.bta_callback = NULL; - if (dsi.te_enabled) { /* enable LP_RX_TO again after the TE */ REG_FLD_MOD(DSI_TIMING2, 1, 15, 15); /* LP_RX_TO */ @@ -3155,7 +3124,7 @@ static void dsi_framedone_timeout_work_callback(struct work_struct *work) dsi_handle_framedone(-ETIMEDOUT); } -static void dsi_framedone_bta_callback(void) +static void dsi_framedone_bta_callback(void *data, u32 mask) { dsi_handle_framedone(0); @@ -3195,15 +3164,19 @@ static void dsi_framedone_irq_callback(void *data, u32 mask) * asynchronously. * */ - dsi.bta_callback = dsi_framedone_bta_callback; - - barrier(); - - dsi_vc_enable_bta_irq(channel); + r = dsi_register_isr_vc(channel, dsi_framedone_bta_callback, + NULL, DSI_VC_IRQ_BTA); + if (r) { + DSSERR("Failed to register BTA ISR\n"); + dsi_handle_framedone(-EIO); + return; + } r = dsi_vc_send_bta(channel); if (r) { DSSERR("BTA after framedone failed\n"); + dsi_unregister_isr_vc(channel, dsi_framedone_bta_callback, + NULL, DSI_VC_IRQ_BTA); dsi_handle_framedone(-EIO); } } -- cgit v1.2.3 From 773b30b22f8c5ac4ccc52775c17809cc5826cb86 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Fri, 8 Oct 2010 16:15:25 +0300 Subject: OMAP: DSS2: DSI: catch DSI errors in send_bta_sync dsi_vc_send_bta_sync() waits for BTA interrupt with a 500ms timeout. If a DSI error happens, no BTA is received and the timeout triggers. This could be handled much faster by listening to DSI errors also. This patch uses the ISR support to notice DSI errors while waiting for the BTA, thus speeding up the fail-path considerably. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dsi.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index cd872e9d7989..37226628bc0f 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -2242,24 +2242,31 @@ int dsi_vc_send_bta_sync(int channel) if (r) goto err0; - r = dsi_vc_send_bta(channel); + r = dsi_register_isr(dsi_completion_handler, &completion, + DSI_IRQ_ERROR_MASK); if (r) goto err1; + r = dsi_vc_send_bta(channel); + if (r) + goto err2; + if (wait_for_completion_timeout(&completion, msecs_to_jiffies(500)) == 0) { DSSERR("Failed to receive BTA\n"); r = -EIO; - goto err1; + goto err2; } err = dsi_get_errors(); if (err) { DSSERR("Error while sending BTA: %x\n", err); r = -EIO; - goto err1; + goto err2; } - +err2: + dsi_unregister_isr(dsi_completion_handler, &completion, + DSI_IRQ_ERROR_MASK); err1: dsi_unregister_isr_vc(channel, dsi_completion_handler, &completion, DSI_VC_IRQ_BTA); -- cgit v1.2.3 From d80d499ed926e70b429d309360f5910d5ad54788 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 2 Mar 2011 15:53:07 +0200 Subject: OMAP: DSS2: DSI: fix IRQ debug prints print_irq_status functions can be called with empty irq status when full irq debugging is enabled. This patch makes print_irq_status functions return immediately when given an empty irq status to lessen the debug spam slightly. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dsi.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'drivers/video/omap2/dss/dsi.c') diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 37226628bc0f..0a7f1a47f8e3 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -409,6 +409,9 @@ static void dsi_perf_show(const char *name) static void print_irq_status(u32 status) { + if (status == 0) + return; + #ifndef VERBOSE_IRQ if ((status & ~DSI_IRQ_CHANNEL_MASK) == 0) return; @@ -444,6 +447,9 @@ static void print_irq_status(u32 status) static void print_irq_status_vc(int channel, u32 status) { + if (status == 0) + return; + #ifndef VERBOSE_IRQ if ((status & ~DSI_VC_IRQ_PACKET_SENT) == 0) return; @@ -470,6 +476,9 @@ static void print_irq_status_vc(int channel, u32 status) static void print_irq_status_cio(u32 status) { + if (status == 0) + return; + printk(KERN_DEBUG "DSI CIO IRQ 0x%x: ", status); #define PIS(x) \ -- cgit v1.2.3