From 148ebf479aa207406f8208466b3e446f9cd25f4b Mon Sep 17 00:00:00 2001 From: Koji Matsuoka Date: Thu, 30 Oct 2014 14:58:55 +0900 Subject: ARM: shmobile: r8a7794: Add VIN clock to device tree Signed-off-by: Koji Matsuoka Signed-off-by: Simon Horman --- include/dt-bindings/clock/r8a7794-clock.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index 9ac1043e25bc..fd7cdee6a666 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -61,6 +61,8 @@ #define R8A7794_CLK_SCIF0 21 /* MSTP8 */ +#define R8A7794_CLK_VIN1 10 +#define R8A7794_CLK_VIN0 11 #define R8A7794_CLK_ETHER 13 /* MSTP9 */ -- cgit v1.2.3 From ba3240beae340bc84dad16f2b67590f32d25d5a6 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 3 Nov 2014 17:44:51 -0800 Subject: ARM: shmobile: r8a7790: Add Audio DMAC devices to DT Instantiate the two Audio DMA controllers in the r8a7790 device tree. Signed-off-by: Kuninori Morimoto [geert: corrected spelling of audmac1] Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 64 +++++++++++++++++++++++++++++-- include/dt-bindings/clock/r8a7790-clock.h | 2 + 2 files changed, 63 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 52c21569e352..2e01d4950b59 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -312,6 +312,63 @@ #dma-cells = <1>; dma-channels = <15>; }; + + audma0: dma-controller@ec700000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xec700000 0 0x10000>; + interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH + 0 320 IRQ_TYPE_LEVEL_HIGH + 0 321 IRQ_TYPE_LEVEL_HIGH + 0 322 IRQ_TYPE_LEVEL_HIGH + 0 323 IRQ_TYPE_LEVEL_HIGH + 0 324 IRQ_TYPE_LEVEL_HIGH + 0 325 IRQ_TYPE_LEVEL_HIGH + 0 326 IRQ_TYPE_LEVEL_HIGH + 0 327 IRQ_TYPE_LEVEL_HIGH + 0 328 IRQ_TYPE_LEVEL_HIGH + 0 329 IRQ_TYPE_LEVEL_HIGH + 0 330 IRQ_TYPE_LEVEL_HIGH + 0 331 IRQ_TYPE_LEVEL_HIGH + 0 332 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12"; + clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>; + clock-names = "fck"; + #dma-cells = <1>; + dma-channels = <13>; + }; + + audma1: dma-controller@ec720000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xec720000 0 0x10000>; + interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH + 0 333 IRQ_TYPE_LEVEL_HIGH + 0 334 IRQ_TYPE_LEVEL_HIGH + 0 335 IRQ_TYPE_LEVEL_HIGH + 0 336 IRQ_TYPE_LEVEL_HIGH + 0 337 IRQ_TYPE_LEVEL_HIGH + 0 338 IRQ_TYPE_LEVEL_HIGH + 0 339 IRQ_TYPE_LEVEL_HIGH + 0 340 IRQ_TYPE_LEVEL_HIGH + 0 341 IRQ_TYPE_LEVEL_HIGH + 0 342 IRQ_TYPE_LEVEL_HIGH + 0 343 IRQ_TYPE_LEVEL_HIGH + 0 344 IRQ_TYPE_LEVEL_HIGH + 0 345 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12"; + clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>; + clock-names = "fck"; + #dma-cells = <1>; + dma-channels = <13>; + }; + i2c0: i2c@e6508000 { #address-cells = <1>; #size-cells = <0>; @@ -1050,10 +1107,11 @@ mstp5_clks: mstp5_clks@e6150144 { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; - clocks = <&extal_clk>, <&p_clk>; + clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>; #clock-cells = <1>; - renesas,clock-indices = ; - clock-output-names = "thermal", "pwm"; + renesas,clock-indices = ; + clock-output-names = "audmac0", "audmac1", "thermal", "pwm"; }; mstp7_clks: mstp7_clks@e615014c { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index e3a3fb80feb6..c27b3b5133b9 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h @@ -78,6 +78,8 @@ #define R8A7790_CLK_USBDMAC1 31 /* MSTP5 */ +#define R8A7790_CLK_AUDIO_DMAC1 1 +#define R8A7790_CLK_AUDIO_DMAC0 2 #define R8A7790_CLK_THERMAL 22 #define R8A7790_CLK_PWM 23 -- cgit v1.2.3 From 8994fff677610e2e0aacb25c39b49739444844b0 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 3 Nov 2014 17:45:37 -0800 Subject: ARM: shmobile: r8a7791: Add Audio DMAC devices to DT Instantiate the two Audio DMA controllers in the r8a7791 device tree. Signed-off-by: Kuninori Morimoto [geert: corrected spelling of audmac1] Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 63 +++++++++++++++++++++++++++++-- include/dt-bindings/clock/r8a7791-clock.h | 2 + 2 files changed, 62 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index a862243f0436..b54af745141a 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -301,6 +301,62 @@ dma-channels = <15>; }; + audma0: dma-controller@ec700000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xec700000 0 0x10000>; + interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH + 0 320 IRQ_TYPE_LEVEL_HIGH + 0 321 IRQ_TYPE_LEVEL_HIGH + 0 322 IRQ_TYPE_LEVEL_HIGH + 0 323 IRQ_TYPE_LEVEL_HIGH + 0 324 IRQ_TYPE_LEVEL_HIGH + 0 325 IRQ_TYPE_LEVEL_HIGH + 0 326 IRQ_TYPE_LEVEL_HIGH + 0 327 IRQ_TYPE_LEVEL_HIGH + 0 328 IRQ_TYPE_LEVEL_HIGH + 0 329 IRQ_TYPE_LEVEL_HIGH + 0 330 IRQ_TYPE_LEVEL_HIGH + 0 331 IRQ_TYPE_LEVEL_HIGH + 0 332 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12"; + clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC0>; + clock-names = "fck"; + #dma-cells = <1>; + dma-channels = <13>; + }; + + audma1: dma-controller@ec720000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xec720000 0 0x10000>; + interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH + 0 333 IRQ_TYPE_LEVEL_HIGH + 0 334 IRQ_TYPE_LEVEL_HIGH + 0 335 IRQ_TYPE_LEVEL_HIGH + 0 336 IRQ_TYPE_LEVEL_HIGH + 0 337 IRQ_TYPE_LEVEL_HIGH + 0 338 IRQ_TYPE_LEVEL_HIGH + 0 339 IRQ_TYPE_LEVEL_HIGH + 0 340 IRQ_TYPE_LEVEL_HIGH + 0 341 IRQ_TYPE_LEVEL_HIGH + 0 342 IRQ_TYPE_LEVEL_HIGH + 0 343 IRQ_TYPE_LEVEL_HIGH + 0 344 IRQ_TYPE_LEVEL_HIGH + 0 345 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12"; + clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC1>; + clock-names = "fck"; + #dma-cells = <1>; + dma-channels = <13>; + }; + /* The memory map in the User's Manual maps the cores to bus numbers */ i2c0: i2c@e6508000 { #address-cells = <1>; @@ -1053,10 +1109,11 @@ mstp5_clks: mstp5_clks@e6150144 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; - clocks = <&extal_clk>, <&p_clk>; + clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>; #clock-cells = <1>; - renesas,clock-indices = ; - clock-output-names = "thermal", "pwm"; + renesas,clock-indices = ; + clock-output-names = "audmac0", "audmac1", "thermal", "pwm"; }; mstp7_clks: mstp7_clks@e615014c { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index dcececd9f4d0..3ea2bbc0da3f 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -69,6 +69,8 @@ #define R8A7791_CLK_USBDMAC1 31 /* MSTP5 */ +#define R8A7791_CLK_AUDIO_DMAC1 1 +#define R8A7791_CLK_AUDIO_DMAC0 2 #define R8A7791_CLK_THERMAL 22 #define R8A7791_CLK_PWM 23 -- cgit v1.2.3 From 3e58a5424c8325df8b62f1de175dc95c7373bfe1 Mon Sep 17 00:00:00 2001 From: Kouei Abe Date: Wed, 12 Nov 2014 17:55:56 +0900 Subject: ARM: shmobile: r8a7794: Add SGX clock to device tree Signed-off-by: Kouei Abe Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 11 +++++------ include/dt-bindings/clock/r8a7794-clock.h | 1 + 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 95f656d22fde..b6f8f451e3b1 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -461,16 +461,15 @@ mstp1_clks: mstp1_clks@e6150134 { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; - clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, - <&cp_clk>, - <&zs_clk>, <&zs_clk>, <&zs_clk>; + clocks = <&p_clk>, <&zg_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, + <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7794_CLK_TMU1 R8A7794_CLK_TMU3 R8A7794_CLK_TMU2 - R8A7794_CLK_CMT0 R8A7794_CLK_TMU0 + R8A7794_CLK_TMU1 R8A7794_CLK_3DG R8A7794_CLK_TMU3 + R8A7794_CLK_TMU2 R8A7794_CLK_CMT0 R8A7794_CLK_TMU0 >; clock-output-names = - "tmu1", "tmu3", "tmu2", "cmt0", "tmu0"; + "tmu1", "3dg", "tmu3", "tmu2", "cmt0", "tmu0"; }; mstp2_clks: mstp2_clks@e6150138 { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index fd7cdee6a666..9066213f5a96 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -27,6 +27,7 @@ /* MSTP1 */ #define R8A7794_CLK_TMU1 11 +#define R8A7794_CLK_3DG 12 #define R8A7794_CLK_TMU3 21 #define R8A7794_CLK_TMU2 22 #define R8A7794_CLK_CMT0 24 -- cgit v1.2.3 From dc3cf93d89c525dcaebf4460109196fd9752c706 Mon Sep 17 00:00:00 2001 From: Yoshifumi Hosoya Date: Wed, 12 Nov 2014 17:55:57 +0900 Subject: ARM: shmobile: r8a7794: Add MMP and VSP1 clocks to device tree Signed-off-by: Yoshifumi Hosoya Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 14 +++++++++----- include/dt-bindings/clock/r8a7794-clock.h | 6 ++++++ 2 files changed, 15 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index b6f8f451e3b1..19c9de3f2a5a 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -461,15 +461,19 @@ mstp1_clks: mstp1_clks@e6150134 { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; - clocks = <&p_clk>, <&zg_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, - <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>; + clocks = <&zs_clk>, <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>, + <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, <&cp_clk>, + <&zs_clk>, <&zs_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7794_CLK_TMU1 R8A7794_CLK_3DG R8A7794_CLK_TMU3 - R8A7794_CLK_TMU2 R8A7794_CLK_CMT0 R8A7794_CLK_TMU0 + R8A7794_CLK_VCP0 R8A7794_CLK_VPC0 R8A7794_CLK_TMU1 + R8A7794_CLK_3DG R8A7794_CLK_2DDMAC R8A7794_CLK_FDP1_0 + R8A7794_CLK_TMU3 R8A7794_CLK_TMU2 R8A7794_CLK_CMT0 + R8A7794_CLK_TMU0 R8A7794_CLK_VSP1_DU0 R8A7794_CLK_VSP1_S >; clock-output-names = - "tmu1", "3dg", "tmu3", "tmu2", "cmt0", "tmu0"; + "vcp0", "vpc0", "tmu1", "3dg", "2ddmac", "fdp1-0", + "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du0", "vsps"; }; mstp2_clks: mstp2_clks@e6150138 { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index 9066213f5a96..aa9c286e60c0 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -26,12 +26,18 @@ #define R8A7794_CLK_MSIOF0 0 /* MSTP1 */ +#define R8A7794_CLK_VCP0 1 +#define R8A7794_CLK_VPC0 3 #define R8A7794_CLK_TMU1 11 #define R8A7794_CLK_3DG 12 +#define R8A7794_CLK_2DDMAC 15 +#define R8A7794_CLK_FDP1_0 19 #define R8A7794_CLK_TMU3 21 #define R8A7794_CLK_TMU2 22 #define R8A7794_CLK_CMT0 24 #define R8A7794_CLK_TMU0 25 +#define R8A7794_CLK_VSP1_DU0 28 +#define R8A7794_CLK_VSP1_S 31 /* MSTP2 */ #define R8A7794_CLK_SCIFA2 2 -- cgit v1.2.3