From f4c82d5132b0592f5d6befc5b652cbd4b08f12ff Mon Sep 17 00:00:00 2001 From: R Sharada Date: Sat, 25 Jun 2005 14:58:08 -0700 Subject: [PATCH] ppc64 kexec: native hash clear Add code to clear the hash table and invalidate the tlb for native (SMP, non-LPAR) mode. Supports 16M and 4k pages. Signed-off-by: Milton Miller Signed-off-by: R Sharada Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-ppc64/mmu.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'include') diff --git a/include/asm-ppc64/mmu.h b/include/asm-ppc64/mmu.h index 9d03a98a4fa3..f373de5e3dd9 100644 --- a/include/asm-ppc64/mmu.h +++ b/include/asm-ppc64/mmu.h @@ -181,6 +181,28 @@ static inline void tlbiel(unsigned long va) asm volatile("ptesync": : :"memory"); } +static inline unsigned long slot2va(unsigned long avpn, unsigned long large, + unsigned long secondary, unsigned long slot) +{ + unsigned long va; + + va = avpn << 23; + + if (!large) { + unsigned long vpi, pteg; + + pteg = slot / HPTES_PER_GROUP; + if (secondary) + pteg = ~pteg; + + vpi = ((va >> 28) ^ pteg) & htab_hash_mask; + + va |= vpi << PAGE_SHIFT; + } + + return va; +} + /* * Handle a fault by adding an HPTE. If the address can't be determined * to be valid via Linux page tables, return 1. If handled return 0 -- cgit v1.2.3