1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX General Power Controller v2
maintainers:
- Andrey Smirnov <andrew.smirnov@gmail.com>
description: |
The i.MX7S/D General Power Control (GPC) block contains Power Gating
Control (PGC) for various power domains.
Power domains contained within GPC node are generic power domain
providers, documented in
Documentation/devicetree/bindings/power/power-domain.yaml, which are
described as subnodes of the power gating controller 'pgc' node.
IP cores belonging to a power domain should contain a 'power-domains'
property that is a phandle for PGC node representing the domain.
properties:
compatible:
enum:
- fsl,imx7d-gpc
- fsl,imx8mn-gpc
- fsl,imx8mq-gpc
- fsl,imx8mm-gpc
reg:
maxItems: 1
interrupts:
maxItems: 1
interrupt-controller: true
'#interrupt-cells':
const: 3
pgc:
type: object
description: list of power domains provided by this controller.
patternProperties:
"power-domain@[0-9]$":
type: object
properties:
'#power-domain-cells':
const: 0
reg:
description: |
Power domain index. Valid values are defined in
include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and
include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc
include/dt-bindings/power/imx8mm-power.h for fsl,imx8mm-gpc
maxItems: 1
clocks:
description: |
A number of phandles to clocks that need to be enabled during domain
power-up sequencing to ensure reset propagation into devices located
inside this power domain.
minItems: 1
maxItems: 5
power-supply: true
resets:
description: |
A number of phandles to resets that need to be asserted during
power-up sequencing of the domain. The resets belong to devices
located inside the power domain, which need to be held in reset
across the power-up sequence. So no means to specify what each
reset is in a generic power-domain binding.
minItems: 1
maxItems: 4
required:
- '#power-domain-cells'
- reg
required:
- compatible
- reg
- interrupts
- pgc
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
gpc@303a0000 {
compatible = "fsl,imx7d-gpc";
reg = <0x303a0000 0x1000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
pgc {
#address-cells = <1>;
#size-cells = <0>;
pgc_mipi_phy: power-domain@0 {
#power-domain-cells = <0>;
reg = <0>;
power-supply = <®_1p0d>;
};
pgc_pcie_phy: power-domain@1 {
#power-domain-cells = <0>;
reg = <1>;
power-supply = <®_1p0d>;
};
pgc_hsic_phy: power-domain@2 {
#power-domain-cells = <0>;
reg = <2>;
power-supply = <®_1p2>;
};
};
};
|
