summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/imx6dl.dtsi
blob: 25bbdd6f214bf8362b79519e1a1f66e0e5183a19 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include "imx6dl-pinfunc.h"
#include "imx6qdl.dtsi"

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <0>;
			next-level-cache = <&L2>;
		};

		cpu@1 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <1>;
			next-level-cache = <&L2>;
		};
	};

	soc {
		ocram: sram@00900000 {
			compatible = "mmio-sram";
			reg = <0x00900000 0x20000>;
			clocks = <&clks 142>;
		};

		aips1: aips-bus@02000000 {
			iomuxc: iomuxc@020e0000 {
				compatible = "fsl,imx6dl-iomuxc";
			};

			pxp: pxp@020f0000 {
				reg = <0x020f0000 0x4000>;
				interrupts = <0 98 0x04>;
			};

			epdc: epdc@020f4000 {
				reg = <0x020f4000 0x4000>;
				interrupts = <0 97 0x04>;
			};

			lcdif: lcdif@020f8000 {
				reg = <0x020f8000 0x4000>;
				interrupts = <0 39 0x04>;
			};
		};

		aips2: aips-bus@02100000 {
			i2c4: i2c@021f8000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx1-i2c";
				reg = <0x021f8000 0x4000>;
				interrupts = <0 35 0x04>;
				status = "disabled";
			};
		};
	};

	display-subsystem {
		compatible = "fsl,imx-display-subsystem";
		ports = <&ipu1_di0>, <&ipu1_di1>;
	};
};

&hdmi {
	compatible = "fsl,imx6dl-hdmi";
};

&ldb {
	clocks = <&clks 33>, <&clks 34>,
		 <&clks 39>, <&clks 40>,
		 <&clks 135>, <&clks 136>;
	clock-names = "di0_pll", "di1_pll",
		      "di0_sel", "di1_sel",
		      "di0", "di1";
};