1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
|
/*
* Device Tree Source for K2G SOC
*
* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/keystone.h>
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "ti,k2g","ti,keystone";
model = "Texas Instruments K2G SoC";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic>;
chosen { };
aliases {
serial0 = &uart0;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
rproc0 = &dsp0;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <0>;
};
};
gic: interrupt-controller@02561000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x02561000 0x0 0x1000>,
<0x0 0x02562000 0x0 0x2000>,
<0x0 0x02564000 0x0 0x2000>,
<0x0 0x02566000 0x0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_HIGH)>;
};
timer {
compatible = "arm,armv7-timer";
interrupts =
<GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
pmu {
compatible = "arm,cortex-a15-pmu";
interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
#pinctrl-cells = <1>;
compatible = "ti,keystone","simple-bus";
ranges = <0x0 0x0 0x0 0xc0000000>;
dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
msm_ram: msmram@0c000000 {
compatible = "mmio-sram";
reg = <0x0c000000 0x100000>;
ranges = <0x0 0x0c000000 0x100000>;
#address-cells = <1>;
#size-cells = <1>;
sram-bm@f7000 {
reg = <0x000f7000 0x8000>;
};
};
k2g_pinctrl: pinmux@02621000 {
compatible = "pinctrl-single";
reg = <0x02621000 0x410>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x001b0007>;
};
devctrl: device-state-control@02620000 {
compatible = "ti,keystone-devctrl", "syscon";
reg = <0x02620000 0x1000>;
};
uart0: serial@02530c00 {
compatible = "ti,da830-uart", "ns16550a";
current-speed = <115200>;
reg-shift = <2>;
reg-io-width = <4>;
reg = <0x02530c00 0x100>;
interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
clock-frequency = <200000000>;
status = "disabled";
};
dcan0: can@0260B200 {
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
reg = <0x0260B200 0x200>;
interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
power-domains = <&k2g_pds 0x0008>;
clocks = <&k2g_clks 0x0008 1>;
};
dcan1: can@0260B400 {
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
reg = <0x0260B400 0x200>;
interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
power-domains = <&k2g_pds 0x0009>;
clocks = <&k2g_clks 0x0009 1>;
};
i2c0: i2c@2530000 {
compatible = "ti,keystone-i2c";
reg = <0x02530000 0x400>;
clocks = <&k2g_clks 0x003a 0>;
power-domains = <&k2g_pds 0x003a>;
interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@2530400 {
compatible = "ti,keystone-i2c";
reg = <0x02530400 0x400>;
clocks = <&k2g_clks 0x003b 0>;
power-domains = <&k2g_pds 0x003b>;
interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@2530800 {
compatible = "ti,keystone-i2c";
reg = <0x02530800 0x400>;
clocks = <&k2g_clks 0x003c 0>;
power-domains = <&k2g_pds 0x003c>;
interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
kirq0: keystone_irq@026202a0 {
compatible = "ti,keystone-irq";
interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <1>;
ti,syscon-dev = <&devctrl 0x2a0>;
};
dspgpio0: keystone_dsp_gpio@02620240 {
compatible = "ti,keystone-dsp-gpio";
gpio-controller;
#gpio-cells = <2>;
gpio,syscon-dev = <&devctrl 0x240>;
};
dsp0: dsp@10800000 {
compatible = "ti,k2g-dsp";
reg = <0x10800000 0x00100000>,
<0x10e00000 0x00008000>,
<0x10f00000 0x00008000>;
reg-names = "l2sram", "l1pram", "l1dram";
power-domains = <&k2g_pds 0x0046>;
ti,syscon-dev = <&devctrl 0x844>;
resets = <&k2g_reset 0x0046 0x1>;
interrupt-parent = <&kirq0>;
interrupts = <0 8>;
interrupt-names = "vring", "exception";
kick-gpios = <&dspgpio0 27 0>;
status = "disabled";
};
msgmgr: msgmgr@02a00000 {
compatible = "ti,k2g-message-manager";
#mbox-cells = <2>;
reg-names = "queue_proxy_region",
"queue_state_debug_region";
reg = <0x02a00000 0x400000>, <0x028c3400 0x400>;
interrupt-names = "rx_005",
"rx_057";
interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
};
pmmc: pmmc@02921c00 {
compatible = "ti,k2g-sci";
/*
* In case of rare platforms that does not use k2g as
* system master, use /delete-property/
*/
ti,system-reboot-controller;
mbox-names = "rx", "tx";
mboxes= <&msgmgr 5 2>,
<&msgmgr 0 0>;
reg-names = "debug_messages";
reg = <0x02921c00 0x400>;
k2g_pds: power-controller {
compatible = "ti,sci-pm-domain";
#power-domain-cells = <1>;
};
k2g_clks: clocks {
compatible = "ti,k2g-sci-clk";
#clock-cells = <2>;
};
k2g_reset: reset-controller {
compatible = "ti,sci-reset";
#reset-cells = <2>;
};
};
gpio0: gpio@2603000 {
compatible = "ti,k2g-gpio", "ti,keystone-gpio";
reg = <0x02603000 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <144>;
ti,davinci-gpio-unbanked = <0>;
clocks = <&k2g_clks 0x001b 0x0>;
clock-names = "gpio";
};
gpio1: gpio@260a000 {
compatible = "ti,k2g-gpio", "ti,keystone-gpio";
reg = <0x0260a000 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <GIC_SPI 442 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 443 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 444 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 445 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 446 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <68>;
ti,davinci-gpio-unbanked = <0>;
clocks = <&k2g_clks 0x001c 0x0>;
clock-names = "gpio";
};
edma0: edma@02700000 {
compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
reg = <0x02700000 0x8000>;
reg-names = "edma3_cc";
interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 216 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "edma3_ccint", "emda3_mperr",
"edma3_ccerrint";
dma-requests = <64>;
#dma-cells = <2>;
ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
ti,edma-memcpy-channels = <32 33 34 35>;
power-domains = <&k2g_pds 0x3f>;
};
edma0_tptc0: tptc@02760000 {
compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
reg = <0x02760000 0x400>;
power-domains = <&k2g_pds 0x3f>;
};
edma0_tptc1: tptc@02768000 {
compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
reg = <0x02768000 0x400>;
power-domains = <&k2g_pds 0x3f>;
};
edma1: edma@02728000 {
compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
reg = <0x02728000 0x8000>;
reg-names = "edma3_cc";
interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 219 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 220 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "edma3_ccint", "emda3_mperr",
"edma3_ccerrint";
dma-requests = <64>;
#dma-cells = <2>;
ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>;
/*
* memcpy is disabled, can be enabled with:
* ti,edma-memcpy-channels = <12 13 14 15>;
* for example.
*/
power-domains = <&k2g_pds 0x4f>;
};
edma1_tptc0: tptc@027b0000 {
compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
reg = <0x027b0000 0x400>;
power-domains = <&k2g_pds 0x4f>;
};
edma1_tptc1: tptc@027b8000 {
compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
reg = <0x027b8000 0x400>;
power-domains = <&k2g_pds 0x4f>;
};
mmc0: mmc@23000000 {
compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc";
reg = <0x23000000 0x400>;
interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
dmas = <&edma1 24 0>, <&edma1 25 0>;
dma-names = "tx", "rx";
bus-width = <4>;
ti,needs-special-reset;
no-1-8-v;
max-frequency = <96000000>;
power-domains = <&k2g_pds 0xb>;
clocks = <&k2g_clks 0xb 1>, <&k2g_clks 0xb 2>;
clock-names = "fck", "mmchsdb_fck";
status = "disabled";
};
mmc1: mmc@23100000 {
compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc";
reg = <0x23100000 0x400>;
interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
dmas = <&edma1 26 0>, <&edma1 27 0>;
dma-names = "tx", "rx";
bus-width = <8>;
ti,needs-special-reset;
ti,non-removable;
max-frequency = <96000000>;
power-domains = <&k2g_pds 0xc>;
clocks = <&k2g_clks 0xc 1>, <&k2g_clks 0xc 2>;
clock-names = "fck", "mmchsdb_fck";
status = "disabled";
};
mcasp0: mcasp@02340000 {
compatible = "ti,am33xx-mcasp-audio";
reg = <0x02340000 0x2000>,
<0x21804000 0x1000>;
reg-names = "mpu","dat";
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx", "rx";
dmas = <&edma0 24 1>, <&edma0 25 1>;
dma-names = "tx", "rx";
power-domains = <&k2g_pds 0x4>;
clocks = <&k2g_clks 0x4 0>;
clock-names = "fck";
status = "disabled";
};
mcasp1: mcasp@02342000 {
compatible = "ti,am33xx-mcasp-audio";
reg = <0x02342000 0x2000>,
<0x21804400 0x1000>;
reg-names = "mpu","dat";
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx", "rx";
dmas = <&edma1 48 1>, <&edma1 49 1>;
dma-names = "tx", "rx";
power-domains = <&k2g_pds 0x5>;
clocks = <&k2g_clks 0x5 0>;
clock-names = "fck";
status = "disabled";
};
mcasp2: mcasp@02344000 {
compatible = "ti,am33xx-mcasp-audio";
reg = <0x02344000 0x2000>,
<0x21804800 0x1000>;
reg-names = "mpu","dat";
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx", "rx";
dmas = <&edma1 50 1>, <&edma1 51 1>;
dma-names = "tx", "rx";
power-domains = <&k2g_pds 0x6>;
clocks = <&k2g_clks 0x6 0>;
clock-names = "fck";
status = "disabled";
};
usb0_phy: usb-phy@0 {
compatible = "usb-nop-xceiv";
status = "disabled";
};
keystone_usb0: keystone-dwc3@2680000 {
compatible = "ti,keystone-dwc3";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2680000 0x10000>;
interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>;
ranges;
dma-coherent;
dma-ranges;
status = "disabled";
power-domains = <&k2g_pds 0x0016>;
usb0: usb@2690000 {
compatible = "snps,dwc3";
reg = <0x2690000 0x10000>;
interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>;
maximum-speed = "high-speed";
dr_mode = "otg";
usb-phy = <&usb0_phy>;
status = "disabled";
};
};
usb1_phy: usb-phy@1 {
compatible = "usb-nop-xceiv";
status = "disabled";
};
keystone_usb1: keystone-dwc3@2580000 {
compatible = "ti,keystone-dwc3";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2580000 0x10000>;
interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>;
ranges;
dma-coherent;
dma-ranges;
status = "disabled";
power-domains = <&k2g_pds 0x0017>;
usb1: usb@2590000 {
compatible = "snps,dwc3";
reg = <0x2590000 0x10000>;
interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>;
maximum-speed = "high-speed";
dr_mode = "otg";
usb-phy = <&usb1_phy>;
status = "disabled";
};
};
ecap0: pwm@21d1800 {
compatible = "ti,k2g-ecap", "ti,am3352-ecap";
#pwm-cells = <3>;
reg = <0x021d1800 0x60>;
power-domains = <&k2g_pds 0x38>;
clocks = <&k2g_clks 0x38 0>;
clock-names = "fck";
status = "disabled";
};
ecap1: pwm@21d1c00 {
compatible = "ti,k2g-ecap", "ti,am3352-ecap";
#pwm-cells = <3>;
reg = <0x021d1c00 0x60>;
power-domains = <&k2g_pds 0x39>;
clocks = <&k2g_clks 0x39 0x0>;
clock-names = "fck";
status = "disabled";
};
};
};
|