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/*
* Device Tree Source for the SILK board
*
* Copyright (C) 2014 Renesas Electronics Corporation
* Copyright (C) 2014-2015 Renesas Solutions Corp.
* Copyright (C) 2014-2015 Cogent Embedded, Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
#include "r8a7794.dtsi"
/ {
model = "SILK";
compatible = "renesas,silk", "renesas,r8a7794";
aliases {
serial0 = &scif2;
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = &scif2;
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x40000000>;
};
d3_3v: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "D3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
};
&extal_clk {
clock-frequency = <20000000>;
};
&pfc {
scif2_pins: serial2 {
renesas,groups = "scif2_data";
renesas,function = "scif2";
};
ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth";
};
phy1_pins: phy1 {
renesas,groups = "intc_irq8";
renesas,function = "intc";
};
mmcif0_pins: mmcif0 {
renesas,groups = "mmc_data8", "mmc_ctrl";
renesas,function = "mmc";
};
};
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";
status = "okay";
};
ðer {
pinctrl-0 = <ðer_pins &phy1_pins>;
pinctrl-names = "default";
phy-handle = <&phy1>;
renesas,ether-link-active-low;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
micrel,led-mode = <1>;
};
};
&mmcif0 {
pinctrl-0 = <&mmcif0_pins>;
pinctrl-names = "default";
vmmc-supply = <&d3_3v>;
vqmmc-supply = <&d3_3v>;
bus-width = <8>;
non-removable;
status = "okay";
};
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