summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-tegra/Kconfig
blob: dd1ae0183ff2a7d0540d18cec6cade84b887fa2e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
if ARCH_TEGRA

comment "NVIDIA Tegra options"

config ARCH_TEGRA_2x_SOC
	bool "Enable support for Tegra20 family"
	select ARCH_REQUIRE_GPIOLIB
	select ARM_ERRATA_720789
	select ARM_ERRATA_742230
	select ARM_ERRATA_751472
	select ARM_ERRATA_754327
	select ARM_ERRATA_764369 if SMP
	select ARM_GIC
	select CPU_FREQ_TABLE if CPU_FREQ
	select CPU_V7
	select PINCTRL
	select PINCTRL_TEGRA20
	select PL310_ERRATA_727915 if CACHE_L2X0
	select PL310_ERRATA_769419 if CACHE_L2X0
	select USB_ARCH_HAS_EHCI if USB_SUPPORT
	select USB_ULPI if USB
	select USB_ULPI_VIEWPORT if USB_SUPPORT
	help
	  Support for NVIDIA Tegra AP20 and T20 processors, based on the
	  ARM CortexA9MP CPU and the ARM PL310 L2 cache controller

config ARCH_TEGRA_3x_SOC
	bool "Enable support for Tegra30 family"
	select ARCH_REQUIRE_GPIOLIB
	select ARM_ERRATA_743622
	select ARM_ERRATA_751472
	select ARM_ERRATA_754322
	select ARM_ERRATA_764369 if SMP
	select ARM_GIC
	select CPU_FREQ_TABLE if CPU_FREQ
	select CPU_V7
	select PINCTRL
	select PINCTRL_TEGRA30
	select PL310_ERRATA_769419 if CACHE_L2X0
	select USB_ARCH_HAS_EHCI if USB_SUPPORT
	select USB_ULPI if USB
	select USB_ULPI_VIEWPORT if USB_SUPPORT
	help
	  Support for NVIDIA Tegra T30 processor family, based on the
	  ARM CortexA9MP CPU and the ARM PL310 L2 cache controller

config TEGRA_PCI
	bool "PCI Express support"
	depends on ARCH_TEGRA_2x_SOC
	select PCI

config TEGRA_AHB
	bool "Enable AHB driver for NVIDIA Tegra SoCs"
	default y
	help
	  Adds AHB configuration functionality for NVIDIA Tegra SoCs,
	  which controls AHB bus master arbitration and some
	  performance parameters(priority, prefech size).

choice
        prompt "Default low-level debug console UART"
        default TEGRA_DEBUG_UART_NONE

config TEGRA_DEBUG_UART_NONE
        bool "None"

config TEGRA_DEBUG_UARTA
        bool "UART-A"

config TEGRA_DEBUG_UARTB
        bool "UART-B"

config TEGRA_DEBUG_UARTC
        bool "UART-C"

config TEGRA_DEBUG_UARTD
        bool "UART-D"

config TEGRA_DEBUG_UARTE
        bool "UART-E"

endchoice

choice
	prompt "Automatic low-level debug console UART"
	default TEGRA_DEBUG_UART_AUTO_NONE

config TEGRA_DEBUG_UART_AUTO_NONE
	bool "None"

config TEGRA_DEBUG_UART_AUTO_ODMDATA
	bool "Via ODMDATA"
	help
	  Automatically determines which UART to use for low-level debug based
	  on the ODMDATA value. This value is part of the BCT, and is written
	  to the boot memory device using nvflash, or other flashing tool.
	  When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
	  0/1/2/3/4 are UART A/B/C/D/E.

config TEGRA_DEBUG_UART_AUTO_SCRATCH
	bool "Via UART scratch register"
	help
	  Automatically determines which UART to use for low-level debug based
	  on the UART scratch register value. Some bootloaders put ASCII 'D'
	  in this register when they initialize their own console UART output.
	  Using this option allows the kernel to automatically pick the same
	  UART.

endchoice

config TEGRA_EMC_SCALING_ENABLE
	bool "Enable scaling the memory frequency"

endif