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authorAndy Polyakov <appro@openssl.org>2012-11-17 20:04:15 +0100
committerAndy Polyakov <appro@openssl.org>2012-11-17 20:04:15 +0100
commitc5cd28bd64fa2b02f29e74486539e4b2f6741114 (patch)
tree47c1f26d5a0ce2ba6f32652f17ff240902fd5afb /crypto/x86cpuid.pl
parentperlasm/sparcv9_modes.pl: addendum to commit#22966. (diff)
downloadopenssl-c5cd28bd64fa2b02f29e74486539e4b2f6741114.tar.xz
openssl-c5cd28bd64fa2b02f29e74486539e4b2f6741114.zip
Extend OPENSSL_ia32cap_P with extra word to accomodate AVX2 capability.
Diffstat (limited to 'crypto/x86cpuid.pl')
-rw-r--r--crypto/x86cpuid.pl13
1 files changed, 13 insertions, 0 deletions
diff --git a/crypto/x86cpuid.pl b/crypto/x86cpuid.pl
index 597b7a51a7..3b6c469d08 100644
--- a/crypto/x86cpuid.pl
+++ b/crypto/x86cpuid.pl
@@ -22,6 +22,8 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
&xor ("eax","eax");
&bt ("ecx",21);
&jnc (&label("nocpuid"));
+ &mov ("esi",&wparam(0));
+ &mov (&DWP(8,"esi"),"eax"); # clear 3rd word
&cpuid ();
&mov ("edi","eax"); # max value for standard query level
@@ -89,6 +91,15 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
&shr ("edi",14);
&and ("edi",0xfff); # number of cores -1 per L1D
+ &cmp ("edi",7);
+ &jb (&label("nocacheinfo"));
+
+ &mov ("esi",&wparam(0));
+ &mov ("eax",7);
+ &xor ("ecx","ecx");
+ &cpuid ();
+ &mov (&DWP(8,"esi"),"ebx");
+
&set_label("nocacheinfo");
&mov ("eax",1);
&cpuid ();
@@ -133,6 +144,8 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
&and ("esi",0xfeffffff); # clear FXSR
&set_label("clear_avx");
&and ("ebp",0xefffe7ff); # clear AVX, FMA and AMD XOP bits
+ &mov ("edi",&wparam(0));
+ &and (&DWP(8,"edi"),0xffffffdf); # clear AVX2
&set_label("done");
&mov ("eax","esi");
&mov ("edx","ebp");