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* riscv: Fix cpuid_obj asm checks for sm4/sm3Hongren Zheng2024-07-121-1/+1
* riscv: Support sm3 on platforms with vlen >= 128.Jerry Shih2023-10-262-85/+90
* riscv: SM3: Provide a Zvksh-based implementationCharalampos Mitrodimas2023-10-264-0/+262
* * Enable extra Arm64 optimization on Windows for GHASH, RAND and AESEvgeny Karpov2023-10-101-1/+1
* Copyright year updatesMatt Caswell2023-09-071-1/+1
* Fix arm64 asm code back compatible issue with gcc 4.9.4Xiaokang Qian2023-05-311-1/+0
* Add ROTATE inline asm support for SM3Hongren (Zenithal) Zheng2022-06-221-8/+8
* Add SM3 implementation in RISC-V Zksh asmHongren (Zenithal) Zheng2022-06-221-2/+22
* Update copyright yearMatt Caswell2022-05-032-2/+2
* Fix sm3ss1 translation issue in sm3-armv8.plfangming.fang2022-01-201-8/+7
* SM3 acceleration with SM3 hardware instruction on aarch64fangming.fang2022-01-143-3/+316
* Add "origin" field to EVP_CIPHER, EVP_MDRich Salz2021-04-181-0/+1
* Update copyright yearMatt Caswell2021-04-083-3/+3
* Add ossl_ symbols for sm3 and sm4Shane Lontis2021-03-183-10/+9
* Cleanup legacy digest methods.Shane Lontis2019-12-183-53/+34
* Reorganize local header filesDr. Matthias St. Pierre2019-09-282-1/+1
* Reorganize private crypto header filesDr. Matthias St. Pierre2019-09-282-2/+2
* Move digests to providersShane Lontis2019-06-042-1/+2
* Following the license change, modify the boilerplates in crypto/smN/Richard Levitte2018-12-063-3/+3
* SM3: restructure to EVP internal and update doc to right locationRonald Tse2017-11-064-53/+86
* SM3: Add SM3 hash functionJack Lloyd2017-11-063-0/+296
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