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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2021-02-24 18:38:36 +0100 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2021-02-24 18:38:36 +0100 |
| commit | 825d1508750c0cad13e5da564d47a6d59c7612d6 (patch) | |
| tree | 0f173e39ed7638ffcc52b965f933aa7762500111 /.clang-format | |
| parent | Merge tag 'libnvdimm-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/g... (diff) | |
| parent | cxl/mem: Fix potential memory leak (diff) | |
| download | linux-825d1508750c0cad13e5da564d47a6d59c7612d6.tar.xz linux-825d1508750c0cad13e5da564d47a6d59c7612d6.zip | |
Merge tag 'cxl-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm
Pull initial support for CXL (Compute Express Link) from Dan Williams:
"Introduce an initial driver for CXL 2.0 Type-3 Memory Devices.
CXL is Compute Express Link which released the 2.0 specification in
November. The Linux relevant changes in CXL 2.0 are support for an OS
to dynamically assign address space to memory devices, support for
switches, persistent memory, and hotplug.
A Type-3 Memory Device is a PCI enumerated device presenting the CXL
Memory Device Class Code and implementing the CXL.mem protocol.
CXL.mem allows device to advertise CPU and I/O coherent memory to the
system, i.e. typical "System RAM" and "Persistent Memory" in Linux
/proc/iomem terms.
In addition to the CXL.mem fast path there is an administrative
command hardware mailbox interface for maintenance and provisioning.
It is this command interface that is the focus of the initial driver.
With this driver a CXL device that is mapped by the BIOS can be
administered by Linux.
Linux support for CXL PMEM and dynamic CXL address space management
are to be implemented post v5.12"
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
4cdadfd5e0a7 ("cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints")
13237183c735 ("cxl/mem: Add a "RAW" send command")
472b1ce6e9d6 ("cxl/mem: Enable commands via CEL")
57ee605b976c ("cxl/mem: Add set of informational commands")
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
8adaf747c9f0 ("cxl/mem: Find device capabilities")
b39cb1052a5c ("cxl/mem: Register CXL memX devices")
* tag 'cxl-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm:
cxl/mem: Fix potential memory leak
cxl/mem: Return -EFAULT if copy_to_user() fails
MAINTAINERS: Add maintainers of the CXL driver
cxl/mem: Add set of informational commands
cxl/mem: Enable commands via CEL
cxl/mem: Add a "RAW" send command
cxl/mem: Add basic IOCTL interface
cxl/mem: Register CXL memX devices
cxl/mem: Find device capabilities
cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints
Diffstat (limited to '.clang-format')
| -rw-r--r-- | .clang-format | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/.clang-format b/.clang-format index 01a341ceec6c..c24b147cac01 100644 --- a/.clang-format +++ b/.clang-format @@ -109,6 +109,7 @@ ForEachMacros: - 'css_for_each_child' - 'css_for_each_descendant_post' - 'css_for_each_descendant_pre' + - 'cxl_for_each_cmd' - 'device_for_each_child_node' - 'dma_fence_chain_for_each' - 'do_for_each_ftrace_op' |