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authorNicholas Piggin <npiggin@gmail.com>2018-08-27 05:03:02 +0200
committerMichael Ellerman <mpe@ellerman.id.au>2018-10-04 15:16:53 +0200
commit053c5a753e951c5dd1729af2cf4d8107f2e6e09b (patch)
treec98616801eaf0f0bc0598ba0cc76677ef2b831ba
parentpowerpc/64s/hash: Do not use PPC_INVALIDATE_ERAT on CPUs before POWER9 (diff)
downloadlinux-053c5a753e951c5dd1729af2cf4d8107f2e6e09b.tar.xz
linux-053c5a753e951c5dd1729af2cf4d8107f2e6e09b.zip
powerpc/64s/radix: Explicitly flush ERAT with local LPID invalidation
Local radix TLB flush operations that operate on congruence classes have explicit ERAT flushes for POWER9. The process scoped LPID flush did not have a flush, so add it. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
-rw-r--r--arch/powerpc/mm/tlb-radix.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
index fef3e1eb3a19..4e798f33c530 100644
--- a/arch/powerpc/mm/tlb-radix.c
+++ b/arch/powerpc/mm/tlb-radix.c
@@ -366,6 +366,7 @@ static inline void _tlbiel_lpid_guest(unsigned long lpid, unsigned long ric)
__tlbiel_lpid_guest(lpid, set, RIC_FLUSH_TLB);
asm volatile("ptesync": : :"memory");
+ asm volatile(PPC_INVALIDATE_ERAT : : :"memory");
}