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| author | Heiko Stuebner <heiko@sntech.de> | 2015-11-19 22:22:27 +0100 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2016-01-25 15:05:46 +0100 |
| commit | 0ace8217c242bb3b89263bb38d13ce52960d83d9 (patch) | |
| tree | f73e4f8123dcc37c2e3acdaec0b70f6c4a49886c | |
| parent | ARM: dts: rockchip: Assign RK3288 EDP_24M input centrally (diff) | |
| download | linux-0ace8217c242bb3b89263bb38d13ce52960d83d9.tar.xz linux-0ace8217c242bb3b89263bb38d13ce52960d83d9.zip | |
ARM: dts: rockchip: add clock-cells for usb phy nodes
Add the #clock-cells properties for the usbphy nodes as they
provide the pll-clocks now.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | arch/arm/boot/dts/rk3066a.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rk3188.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 3 |
3 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 81cf60c42712..56922730d285 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -202,6 +202,7 @@ reg = <0x17c>; clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; + #clock-cells = <0>; }; usbphy1: usb-phy1 { @@ -209,6 +210,7 @@ reg = <0x188>; clocks = <&cru SCLK_OTGPHY1>; clock-names = "phyclk"; + #clock-cells = <0>; }; }; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 348d46b7ada5..9271833958f9 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -171,6 +171,7 @@ reg = <0x10c>; clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; + #clock-cells = <0>; }; usbphy1: usb-phy1 { @@ -178,6 +179,7 @@ reg = <0x11c>; clocks = <&cru SCLK_OTGPHY1>; clock-names = "phyclk"; + #clock-cells = <0>; }; }; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index c5d7e61c2272..6abbab67ce99 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -968,6 +968,7 @@ reg = <0x320>; clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; + #clock-cells = <0>; }; usbphy1: usb-phy1 { @@ -975,6 +976,7 @@ reg = <0x334>; clocks = <&cru SCLK_OTGPHY1>; clock-names = "phyclk"; + #clock-cells = <0>; }; usbphy2: usb-phy2 { @@ -982,6 +984,7 @@ reg = <0x348>; clocks = <&cru SCLK_OTGPHY2>; clock-names = "phyclk"; + #clock-cells = <0>; }; }; |