diff options
| author | Alex Elder <elder@linaro.org> | 2023-03-27 21:56:04 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-04-06 18:58:15 +0200 |
| commit | 14079448cccc2fb8e2709d5ea194bd5e6a11ded9 (patch) | |
| tree | 25e5c733d05dc6a645856f11ddb3a778558995e3 | |
| parent | dt-bindings: arm: qcom: Add Yiming LTE dongle uz801-v3.0 (yiming-uz801v3) (diff) | |
| download | linux-14079448cccc2fb8e2709d5ea194bd5e6a11ded9.tar.xz linux-14079448cccc2fb8e2709d5ea194bd5e6a11ded9.zip | |
ARM: dts: qcom: sdx65: add IPA information
Add IPA-related nodes and definitions to "sdx65.dtsi". The SMP2P
nodes (ipa_smp2p_out and ipa_smp2p_in) are already present.
Enable IPA in "sdx65-mtp.dts"; this GSI firmware is loaded by Trust
Zone on this platform.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230327195605.2854123-2-elder@linaro.org
| -rw-r--r-- | arch/arm/boot/dts/qcom-sdx65-mtp.dts | 5 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom-sdx65.dtsi | 39 |
2 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts index ed98c83c141f..72e25de0db5f 100644 --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts @@ -245,6 +245,11 @@ status = "okay"; }; +&ipa { + qcom,gsi-loader = "skip"; + status = "okay"; +}; + &qpic_bam { status = "okay"; }; diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 192f9f94bc8b..74671cc12c88 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -11,6 +11,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/qcom-rpmpd.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> +#include <dt-bindings/interconnect/qcom,sdx65.h> / { #address-cells = <1>; @@ -299,6 +300,44 @@ #hwlock-cells = <1>; }; + ipa: ipa@3f40000 { + compatible = "qcom,sdx65-ipa"; + + reg = <0x03f40000 0x10000>, + <0x03f50000 0x5000>, + <0x03e04000 0xfc000>; + reg-names = "ipa-reg", + "ipa-shared", + "gsi"; + + interrupts-extended = <&intc GIC_SPI 241 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, + <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "ipa", + "gsi", + "ipa-clock-query", + "ipa-setup-ready"; + + iommus = <&apps_smmu 0x5e0 0x0>, + <&apps_smmu 0x5e2 0x0>; + + clocks = <&rpmhcc RPMH_IPA_CLK>; + clock-names = "core"; + + interconnects = <&system_noc MASTER_IPA &mc_virt SLAVE_EBI1>, + <&mem_noc MASTER_APPSS_PROC &system_noc SLAVE_IPA_CFG>; + interconnect-names = "memory", + "config"; + + qcom,smem-states = <&ipa_smp2p_out 0>, + <&ipa_smp2p_out 1>; + qcom,smem-state-names = "ipa-clock-enabled-valid", + "ipa-clock-enabled"; + + status = "disabled"; + }; + remoteproc_mpss: remoteproc@4080000 { compatible = "qcom,sdx55-mpss-pas"; reg = <0x04080000 0x4040>; |