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authorPritesh Raithatha <praithatha@nvidia.com>2012-10-17 13:39:36 +0200
committerLinus Walleij <linus.walleij@linaro.org>2012-10-17 19:47:06 +0200
commit154f3ebf53edcfbe28728452b4ab37a118581125 (patch)
treeedbea8ae52f83328d3206c236225b4b2c7ab8799
parentdt: Document: correct tegra20/30 pinctrl slew-rate name (diff)
downloadlinux-154f3ebf53edcfbe28728452b4ab37a118581125.tar.xz
linux-154f3ebf53edcfbe28728452b4ab37a118581125.zip
pinctrl: tegra: set low power mode bank width to 2
Cc: stable@kernel.org Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--drivers/pinctrl/pinctrl-tegra.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/pinctrl-tegra.c b/drivers/pinctrl/pinctrl-tegra.c
index 729b686c3ad2..7da0b371fd65 100644
--- a/drivers/pinctrl/pinctrl-tegra.c
+++ b/drivers/pinctrl/pinctrl-tegra.c
@@ -464,7 +464,7 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
*bank = g->drv_bank;
*reg = g->drv_reg;
*bit = g->lpmd_bit;
- *width = 1;
+ *width = 2;
break;
case TEGRA_PINCONF_PARAM_DRIVE_DOWN_STRENGTH:
*bank = g->drv_bank;