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author | Nicholas Piggin <npiggin@gmail.com> | 2017-10-24 15:06:52 +0200 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2017-10-25 18:00:00 +0200 |
commit | 26e53d5ebe2e2a5ff7343e820f0ffd69dd503f8e (patch) | |
tree | 7439fbc677c2fbe73e8aaaa79432fc1a74ce62ca | |
parent | powerpc: Fix check for copy/paste instructions in alignment handler (diff) | |
download | linux-26e53d5ebe2e2a5ff7343e820f0ffd69dd503f8e.tar.xz linux-26e53d5ebe2e2a5ff7343e820f0ffd69dd503f8e.zip |
powerpc/64s/radix: Fix preempt imbalance in TLB flush
Fixes: 424de9c6e3f8 ("powerpc/mm/radix: Avoid flushing the PWC on every flush_tlb_range")
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
-rw-r--r-- | arch/powerpc/mm/tlb-radix.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c index b3e849c4886e..d304028641a2 100644 --- a/arch/powerpc/mm/tlb-radix.c +++ b/arch/powerpc/mm/tlb-radix.c @@ -360,12 +360,14 @@ void radix__flush_tlb_collapsed_pmd(struct mm_struct *mm, unsigned long addr) pid = mm ? mm->context.id : 0; + preempt_disable(); if (unlikely(pid == MMU_NO_CONTEXT)) goto no_context; /* 4k page size, just blow the world */ if (PAGE_SIZE == 0x1000) { radix__flush_all_mm(mm); + preempt_enable(); return; } |