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authorChris Dearman <chris@mips.com>2007-09-21 15:50:08 +0200
committerRalf Baechle <ralf@linux-mips.org>2008-04-28 18:14:26 +0200
commit308402445e005a039a72b315cd9b5ceeaea0063c (patch)
treeb7eed05100987528df9df9d793b78373e8754ee0
parent[MIPS] Add noulri kernel argument to disable "rdhwr $29" usermode support. (diff)
downloadlinux-308402445e005a039a72b315cd9b5ceeaea0063c.tar.xz
linux-308402445e005a039a72b315cd9b5ceeaea0063c.zip
[MIPS] Add CoreFPGA5 support; distinguish between SOCit/ROCit
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/mips-boards/generic/init.c16
-rw-r--r--include/asm-mips/mips-boards/generic.h1
2 files changed, 12 insertions, 5 deletions
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c
index 1695dca5506b..07671fb9074f 100644
--- a/arch/mips/mips-boards/generic/init.c
+++ b/arch/mips/mips-boards/generic/init.c
@@ -295,15 +295,21 @@ void __init prom_init(void)
break;
case MIPS_REVISION_CORID_CORE_MSC:
case MIPS_REVISION_CORID_CORE_FPGA2:
- case MIPS_REVISION_CORID_CORE_FPGA3:
- case MIPS_REVISION_CORID_CORE_FPGA4:
case MIPS_REVISION_CORID_CORE_24K:
- case MIPS_REVISION_CORID_CORE_EMUL_MSC:
+ /*
+ * SOCit/ROCit support is essentially identical
+ * but make an attempt to distinguish them
+ */
mips_revision_sconid = MIPS_REVISION_SCON_SOCIT;
break;
+ case MIPS_REVISION_CORID_CORE_FPGA3:
+ case MIPS_REVISION_CORID_CORE_FPGA4:
+ case MIPS_REVISION_CORID_CORE_FPGA5:
+ case MIPS_REVISION_CORID_CORE_EMUL_MSC:
default:
- mips_display_message("CC Error");
- while (1); /* We die here... */
+ /* See above */
+ mips_revision_sconid = MIPS_REVISION_SCON_ROCIT;
+ break;
}
}
diff --git a/include/asm-mips/mips-boards/generic.h b/include/asm-mips/mips-boards/generic.h
index 1c39d339521e..33407bee4e73 100644
--- a/include/asm-mips/mips-boards/generic.h
+++ b/include/asm-mips/mips-boards/generic.h
@@ -68,6 +68,7 @@
#define MIPS_REVISION_CORID_CORE_FPGA3 9
#define MIPS_REVISION_CORID_CORE_24K 10
#define MIPS_REVISION_CORID_CORE_FPGA4 11
+#define MIPS_REVISION_CORID_CORE_FPGA5 12
/**** Artificial corid defines ****/
/*